[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
wzssyqa wrote: @nikic Thanks. I submit an RFC now https://discourse.llvm.org/t/rfc-fix-llvm-min-f-and-llvm-max-f-intrinsics/79735 https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
wzssyqa wrote: @nikic thanks. Please also revert https://github.com/llvm/llvm-project/commit/225d8fc8eb24fb797154c1ef6dcbe5ba033142da https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
nikic wrote: It looks like this PR was merged without being approved, and I also couldn't find the corresponding RFC for this addition on discourse. I've reverted it for now. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
https://github.com/dyung edited https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -798,6 +804,12 @@ # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}} # DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected +# DEBUG-NEXT: G_VECREDUCE_FMAXIMUMNUM (opcode 276): 2 type indices, 0 imm indices +# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined +# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined +# DEBUG-NEXT: G_VECREDUCE_FMINIMUMNUM (opcode 277): 2 type indices, 0 imm indices dyung wrote: The opcodes for G_VECREDUCE_FMAXIMUMNUM and G_VECREDUCE_FMINIMUMNUM should be a regex to be consistent with the rest of the test and to make it more flexible. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
https://github.com/wzssyqa closed https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15883,6 +15883,100 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +Standard: +" + +IEEE754 and ISO C define some min/max operations, and they have some differences +on working with qNaN/sNaN and +0.0/-0.0. Here is the list: + +.. list-table:: + :header-rows: 2 + + * - ``ISO C`` + - fmin/fmax + - fmininum/fmaximum + - fminimum_num/fmaximum_num + + * - ``IEEE754`` + - nimNum/maxNum (2008) francisvm wrote: ```suggestion - minNum/maxNum (2008) ``` https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15868,6 +15868,51 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +.. list-table:: + :header-rows: 1 + :widths: 16 28 28 28 + + * - Operation + - minnum/maxnum + - minimum/maximum + - minimumnum/maximumnum + + * - ``NUM vs qNaN`` + - NUM, no exception + - qNaN, no exception + - qNaN, no exception + + * - ``NUM vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - NUM, invalid exception + + * - ``qNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + + * - ``sNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + + * - ``+0.0 vs -0.0`` + - either one + - +0.0(max)/-0.0(min) + - +0.0(max)/-0.0(min) + + * - ``NUM vs NUM`` + - larger(max)/smaller(min) + - larger(max)/smaller(min) + - larger(max)/smaller(min) wzssyqa wrote: For constrained ones, I guess that we should add more details in another PR(s). https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15868,6 +15868,51 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +.. list-table:: + :header-rows: 1 + :widths: 16 28 28 28 + + * - Operation + - minnum/maxnum + - minimum/maximum + - minimumnum/maximumnum + + * - ``NUM vs qNaN`` + - NUM, no exception + - qNaN, no exception + - qNaN, no exception + + * - ``NUM vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - NUM, invalid exception + + * - ``qNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + + * - ``sNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + + * - ``+0.0 vs -0.0`` + - either one + - +0.0(max)/-0.0(min) + - +0.0(max)/-0.0(min) + + * - ``NUM vs NUM`` + - larger(max)/smaller(min) + - larger(max)/smaller(min) + - larger(max)/smaller(min) wzssyqa wrote: Sorry, I guess that I am not full understanding "LLVM's NaN-handling policy". As my understanding, for fmax*, we should fellow the libc's semantics. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15883,6 +15883,95 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +Standard: +" + +IEEE754 and ISO C define some min/max operations, and they have some differences +on working with qNaN/sNaN and +0.0/-0.0. Here is the list: + +.. list-table:: + :header-rows: 2 + + * - ``ISO C`` + - fmin/fmax + - none + - fmininum/fmaximum + - fminimum_num/fmaximum_num + + * - ``IEEE754`` + - none + - nimNUM/maxNUM (2008) + - minimum/maximum (2019) + - minimumNumber/maximumNumber (2019) + + * - ``+0.0 vs -0.0`` + - either one + - +0.0 > -0.0 + - +0.0 > -0.0 + - +0.0 > -0.0 + + * - ``NUM/qNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + - NUM/qNaN, invalid exception + + * - ``NUM/qNaN vs qNaN`` + - NUM/qNaN, no excpetion wzssyqa wrote: For more details about sNaN on constrained intrinsics, we may need to update them in future PRs. Since this PR is only about add `minimumnum and maximumnum`. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15883,6 +15883,95 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +Standard: +" + +IEEE754 and ISO C define some min/max operations, and they have some differences +on working with qNaN/sNaN and +0.0/-0.0. Here is the list: + +.. list-table:: + :header-rows: 2 + + * - ``ISO C`` + - fmin/fmax + - none + - fmininum/fmaximum + - fminimum_num/fmaximum_num + + * - ``IEEE754`` + - none + - nimNUM/maxNUM (2008) + - minimum/maximum (2019) + - minimumNumber/maximumNumber (2019) + + * - ``+0.0 vs -0.0`` + - either one + - +0.0 > -0.0 + - +0.0 > -0.0 + - +0.0 > -0.0 + + * - ``NUM/qNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + - NUM/qNaN, invalid exception + + * - ``NUM/qNaN vs qNaN`` + - NUM/qNaN, no excpetion wzssyqa wrote: And I split it to `NUM vs qNaN` and `qNaN vs qNaN`. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15883,6 +15883,95 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +Standard: +" + +IEEE754 and ISO C define some min/max operations, and they have some differences +on working with qNaN/sNaN and +0.0/-0.0. Here is the list: + +.. list-table:: + :header-rows: 2 + + * - ``ISO C`` + - fmin/fmax + - none + - fmininum/fmaximum + - fminimum_num/fmaximum_num + + * - ``IEEE754`` + - none + - nimNUM/maxNUM (2008) + - minimum/maximum (2019) + - minimumNumber/maximumNumber (2019) + + * - ``+0.0 vs -0.0`` + - either one + - +0.0 > -0.0 wzssyqa wrote: Thanks. You are right. I was confused by the hardware implementations of some hardware. ARM/MIPSr6/PowerPC implement +0.0>-0.0. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15883,6 +15883,95 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +Standard: +" + +IEEE754 and ISO C define some min/max operations, and they have some differences +on working with qNaN/sNaN and +0.0/-0.0. Here is the list: + +.. list-table:: + :header-rows: 2 + + * - ``ISO C`` + - fmin/fmax + - none + - fmininum/fmaximum + - fminimum_num/fmaximum_num + + * - ``IEEE754`` + - none + - nimNUM/maxNUM (2008) + - minimum/maximum (2019) + - minimumNumber/maximumNumber (2019) + + * - ``+0.0 vs -0.0`` + - either one + - +0.0 > -0.0 jcranmer-intel wrote: My copy of IEEE 754-2008 says of minNum: > minNum(x, y) is the canonicalized number x if x canonicalized number if one operand is a number and the other a quiet NaN. Otherwise it is either x or y, canonicalized (this means results might differ among implementations). IEEE 754 doesn't guarantee the sign of `minNum(-0.0, +0.0)`, just like `fmin`. Note also that TS 18611-1 bound C `fmin` to IEEE 754-2008 `minNum` (https://www.open-std.org/jtc1/sc22/wg14/www/docs/n1711.pdf)--`fmin` and `minNum` should also be considered equivalent. (Also, while I'm being pedantic, the spelling used in IEEE 754 is `minNum`, not `minNUM`. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15868,6 +15868,51 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +.. list-table:: + :header-rows: 1 + :widths: 16 28 28 28 + + * - Operation + - minnum/maxnum + - minimum/maximum + - minimumnum/maximumnum + + * - ``NUM vs qNaN`` + - NUM, no exception + - qNaN, no exception + - qNaN, no exception + + * - ``NUM vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - NUM, invalid exception + + * - ``qNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + + * - ``sNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + + * - ``+0.0 vs -0.0`` + - either one + - +0.0(max)/-0.0(min) + - +0.0(max)/-0.0(min) + + * - ``NUM vs NUM`` + - larger(max)/smaller(min) + - larger(max)/smaller(min) + - larger(max)/smaller(min) jcranmer-intel wrote: The current text still isn't covering the interaction of sNaN with LLVM's NaN-handling policy. It's also not entirely accurate to say that invalid exceptions are raised when FP exceptions are unspecified without constrained intrinsics. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15883,6 +15883,95 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +Standard: +" + +IEEE754 and ISO C define some min/max operations, and they have some differences +on working with qNaN/sNaN and +0.0/-0.0. Here is the list: + +.. list-table:: + :header-rows: 2 + + * - ``ISO C`` + - fmin/fmax + - none + - fmininum/fmaximum + - fminimum_num/fmaximum_num + + * - ``IEEE754`` + - none + - nimNUM/maxNUM (2008) + - minimum/maximum (2019) + - minimumNumber/maximumNumber (2019) + + * - ``+0.0 vs -0.0`` + - either one + - +0.0 > -0.0 + - +0.0 > -0.0 + - +0.0 > -0.0 + + * - ``NUM/qNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + - NUM/qNaN, invalid exception + + * - ``NUM/qNaN vs qNaN`` + - NUM/qNaN, no excpetion jcranmer-intel wrote: EMISSPELLED in this column https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -1449,6 +1449,16 @@ inline APFloat minimum(const APFloat , const APFloat ) { return A.isNegative() ? A : B; return B < A ? B : A; } +LLVM_READONLY kuhar wrote: Please add and an empty line before this function and document its semantics. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -1462,6 +1472,16 @@ inline APFloat maximum(const APFloat , const APFloat ) { return A.isNegative() ? B : A; return A < B ? B : A; } +LLVM_READONLY kuhar wrote: also here https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -16055,6 +16145,90 @@ of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic. Note that these are the semantics specified in the draft of IEEE 754-2019. +.. _i_minimumnum: + +'``llvm.minimumnum.*``' Intrinsic +^ + +Syntax: +""" + +This is an overloaded intrinsic. You can use ``llvm.minimumnum`` on any +floating-point or vector of floating-point type. Not all targets support +all types however. + +:: + + declare float @llvm.minimumnum.f32(float %Val0, float %Val1) + declare double@llvm.minimumnum.f64(double %Val0, double %Val1) + declare x86_fp80 @llvm.minimumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1) + declare fp128 @llvm.minimumnum.f128(fp128 %Val0, fp128 %Val1) + declare ppc_fp128 @llvm.minimumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1) + +Overview: +" + +The '``llvm.minimumnum.*``' intrinsics return the minimum of the two +arguments, not propagating NaNs and treating -0.0 as less than +0.0. + + +Arguments: +"" + +The arguments and return value are floating-point numbers of the same +type. + +Semantics: +"" +If both operands are NaNs (including sNaN), returns qNaN. If one operand +is NaN (including sNaN) and another operand is a number, return the number. +Otherwise returns the lesser of the two arguments. -0.0 is considered to +be less than +0.0 for this intrinsic. + +Note that these are the semantics of minimumNumber specified in IEEE 754-2019. wzssyqa wrote: No. minimumNumber returns NaN only when both are NaN. ``` minimumNumber(x, y) is x if x < y, y if y < x, and the number if one operand is a number and the other is a NaN. For this operation, −0 compares less than +0. If x = y and signs are the same it is either x or y. If both operands are NaNs, a quiet NaN is returned, according to 6.2. If either operand is a signaling NaN, an invalid operation exception is signaled, but unless both operands are NaNs, the signaling NaN is otherwise ignored and not converted to a quiet NaN as stated in 6.2 for other operations. ``` https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -16055,6 +16145,90 @@ of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic. Note that these are the semantics specified in the draft of IEEE 754-2019. +.. _i_minimumnum: + +'``llvm.minimumnum.*``' Intrinsic +^ + +Syntax: +""" + +This is an overloaded intrinsic. You can use ``llvm.minimumnum`` on any +floating-point or vector of floating-point type. Not all targets support +all types however. + +:: + + declare float @llvm.minimumnum.f32(float %Val0, float %Val1) + declare double@llvm.minimumnum.f64(double %Val0, double %Val1) + declare x86_fp80 @llvm.minimumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1) + declare fp128 @llvm.minimumnum.f128(fp128 %Val0, fp128 %Val1) + declare ppc_fp128 @llvm.minimumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1) + +Overview: +" + +The '``llvm.minimumnum.*``' intrinsics return the minimum of the two +arguments, not propagating NaNs and treating -0.0 as less than +0.0. + + +Arguments: +"" + +The arguments and return value are floating-point numbers of the same +type. + +Semantics: +"" +If both operands are NaNs (including sNaN), returns qNaN. If one operand +is NaN (including sNaN) and another operand is a number, return the number. +Otherwise returns the lesser of the two arguments. -0.0 is considered to +be less than +0.0 for this intrinsic. + +Note that these are the semantics of minimumNumber specified in IEEE 754-2019. + +.. _i_maximumnum: + +'``llvm.maximumnum.*``' Intrinsic +^ + +Syntax: +""" + +This is an overloaded intrinsic. You can use ``llvm.maximumnum`` on any +floating-point or vector of floating-point type. Not all targets support +all types however. + +:: + + declare float @llvm.maximumnum.f32(float %Val0, float %Val1) + declare double@llvm.maximumnum.f64(double %Val0, double %Val1) + declare x86_fp80 @llvm.maximumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1) + declare fp128 @llvm.maximumnum.f128(fp128 %Val0, fp128 %Val1) + declare ppc_fp128 @llvm.maximumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1) + +Overview: +" + +The '``llvm.maximumnum.*``' intrinsics return the maximum of the two +arguments, not propagating NaNs and treating -0.0 as less than +0.0. + + +Arguments: +"" + +The arguments and return value are floating-point numbers of the same +type. + +Semantics: +"" +If both operands are NaNs (including sNaN), returns qNaN. If one operand +is NaN (including sNaN) and another operand is a number, return the number. +Otherwise returns the greater of the two arguments. -0.0 is considered to +be less than +0.0 for this intrinsic. + +Note that these are the semantics of minimumNumber specified in IEEE 754-2019. arsenm wrote: Copy paste error minimumNumber. Also like above, this is not the signaling nan behavior (where the behavior inverts from quiet nan) https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -16055,6 +16145,90 @@ of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic. Note that these are the semantics specified in the draft of IEEE 754-2019. +.. _i_minimumnum: + +'``llvm.minimumnum.*``' Intrinsic +^ + +Syntax: +""" + +This is an overloaded intrinsic. You can use ``llvm.minimumnum`` on any +floating-point or vector of floating-point type. Not all targets support +all types however. + +:: + + declare float @llvm.minimumnum.f32(float %Val0, float %Val1) + declare double@llvm.minimumnum.f64(double %Val0, double %Val1) + declare x86_fp80 @llvm.minimumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1) + declare fp128 @llvm.minimumnum.f128(fp128 %Val0, fp128 %Val1) + declare ppc_fp128 @llvm.minimumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1) + +Overview: +" + +The '``llvm.minimumnum.*``' intrinsics return the minimum of the two +arguments, not propagating NaNs and treating -0.0 as less than +0.0. + + +Arguments: +"" + +The arguments and return value are floating-point numbers of the same +type. + +Semantics: +"" +If both operands are NaNs (including sNaN), returns qNaN. If one operand +is NaN (including sNaN) and another operand is a number, return the number. +Otherwise returns the lesser of the two arguments. -0.0 is considered to +be less than +0.0 for this intrinsic. + +Note that these are the semantics of minimumNumber specified in IEEE 754-2019. + +.. _i_maximumnum: + +'``llvm.maximumnum.*``' Intrinsic +^ + +Syntax: +""" + +This is an overloaded intrinsic. You can use ``llvm.maximumnum`` on any +floating-point or vector of floating-point type. Not all targets support +all types however. + +:: + + declare float @llvm.maximumnum.f32(float %Val0, float %Val1) + declare double@llvm.maximumnum.f64(double %Val0, double %Val1) + declare x86_fp80 @llvm.maximumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1) + declare fp128 @llvm.maximumnum.f128(fp128 %Val0, fp128 %Val1) + declare ppc_fp128 @llvm.maximumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1) + +Overview: +" + +The '``llvm.maximumnum.*``' intrinsics return the maximum of the two +arguments, not propagating NaNs and treating -0.0 as less than +0.0. + + +Arguments: +"" + +The arguments and return value are floating-point numbers of the same +type. + +Semantics: +"" +If both operands are NaNs (including sNaN), returns qNaN. If one operand +is NaN (including sNaN) and another operand is a number, return the number. +Otherwise returns the greater of the two arguments. -0.0 is considered to +be less than +0.0 for this intrinsic. + +Note that these are the semantics of minimumNumber specified in IEEE 754-2019. arsenm wrote: Should also state the explicit difference here, on the intrinsic, the comparison to minnum https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15874,6 +15874,96 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +Standard: +" + +IEEE754 and ISO C define some min/max operations, and they have some differences +on working with qNaN/sNaN and +0.0/-0.0. Here is the list: + +.. list-table:: + :header-rows: 2 + + * - ``ISO C`` + - fmin/fmax + - none + - fmininum/fmaximum + - fminimum_num/fmaximum_num + + * - ``IEEE754`` + - none + - nimNUM/maxNUM (2008) + - minimum/maximum (2019) + - minimumNumber/maximumNumber (2019) + + * - ``+0.0 vs -0.0`` + - either one + - +0.0 > -0.0 + - +0.0 > -0.0 + - +0.0 > -0.0 + + * - ``NUM vs sNaN`` + - qNaN, invalid excpetion + - qNaN, invalid excpetion + - qNaN, invalid excpetion + - NUM, invalid excpetion arsenm wrote: Typo exception throughout https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15874,6 +15874,96 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +Standard: +" + +IEEE754 and ISO C define some min/max operations, and they have some differences +on working with qNaN/sNaN and +0.0/-0.0. Here is the list: + +.. list-table:: + :header-rows: 2 + + * - ``ISO C`` + - fmin/fmax + - none + - fmininum/fmaximum + - fminimum_num/fmaximum_num + + * - ``IEEE754`` + - none + - nimNUM/maxNUM (2008) + - minimum/maximum (2019) + - minimumNumber/maximumNumber (2019) + + * - ``+0.0 vs -0.0`` + - either one + - +0.0 > -0.0 + - +0.0 > -0.0 + - +0.0 > -0.0 + + * - ``NUM vs sNaN`` + - qNaN, invalid excpetion + - qNaN, invalid excpetion + - qNaN, invalid excpetion + - NUM, invalid excpetion + + * - ``NUM vs qNaN`` + - NUM, no excpetion + - NUM, no excpetion + - qNaN, no excpetion + - NUM, no excpetion + arsenm wrote: cover nan vs. nan case https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -16055,6 +16145,90 @@ of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic. Note that these are the semantics specified in the draft of IEEE 754-2019. +.. _i_minimumnum: + +'``llvm.minimumnum.*``' Intrinsic +^ + +Syntax: +""" + +This is an overloaded intrinsic. You can use ``llvm.minimumnum`` on any +floating-point or vector of floating-point type. Not all targets support +all types however. + +:: + + declare float @llvm.minimumnum.f32(float %Val0, float %Val1) + declare double@llvm.minimumnum.f64(double %Val0, double %Val1) + declare x86_fp80 @llvm.minimumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1) + declare fp128 @llvm.minimumnum.f128(fp128 %Val0, fp128 %Val1) + declare ppc_fp128 @llvm.minimumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1) + +Overview: +" + +The '``llvm.minimumnum.*``' intrinsics return the minimum of the two +arguments, not propagating NaNs and treating -0.0 as less than +0.0. + + +Arguments: +"" + +The arguments and return value are floating-point numbers of the same +type. + +Semantics: +"" +If both operands are NaNs (including sNaN), returns qNaN. If one operand +is NaN (including sNaN) and another operand is a number, return the number. +Otherwise returns the lesser of the two arguments. -0.0 is considered to +be less than +0.0 for this intrinsic. + +Note that these are the semantics of minimumNumber specified in IEEE 754-2019. arsenm wrote: This is not the IEEE semantics for signaling nan. For a signaling nan, returns a quiet nan, not the non-non operand https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -32,27 +32,29 @@ class StoreInst; /// These are the kinds of recurrences that we support. enum class RecurKind { - None, ///< Not a recurrence. - Add, ///< Sum of integers. - Mul, ///< Product of integers. - Or, ///< Bitwise or logical OR of integers. - And, ///< Bitwise or logical AND of integers. - Xor, ///< Bitwise or logical XOR of integers. - SMin, ///< Signed integer min implemented in terms of select(cmp()). - SMax, ///< Signed integer max implemented in terms of select(cmp()). - UMin, ///< Unsigned integer min implemented in terms of select(cmp()). - UMax, ///< Unsigned integer max implemented in terms of select(cmp()). - FAdd, ///< Sum of floats. - FMul, ///< Product of floats. - FMin, ///< FP min implemented in terms of select(cmp()). - FMax, ///< FP max implemented in terms of select(cmp()). - FMinimum, ///< FP min with llvm.minimum semantics - FMaximum, ///< FP max with llvm.maximum semantics - FMulAdd, ///< Sum of float products with llvm.fmuladd(a * b + sum). - IAnyOf, ///< Any_of reduction with select(icmp(),x,y) where one of (x,y) is -///< loop invariant, and both x and y are integer type. - FAnyOf///< Any_of reduction with select(fcmp(),x,y) where one of (x,y) is -///< loop invariant, and both x and y are integer type. + None,///< Not a recurrence. + Add, ///< Sum of integers. + Mul, ///< Product of integers. + Or, ///< Bitwise or logical OR of integers. + And, ///< Bitwise or logical AND of integers. + Xor, ///< Bitwise or logical XOR of integers. + SMin,///< Signed integer min implemented in terms of select(cmp()). + SMax,///< Signed integer max implemented in terms of select(cmp()). + UMin,///< Unsigned integer min implemented in terms of select(cmp()). + UMax,///< Unsigned integer max implemented in terms of select(cmp()). + FAdd,///< Sum of floats. + FMul,///< Product of floats. + FMin,///< FP min implemented in terms of select(cmp()). + FMax,///< FP max implemented in terms of select(cmp()). + FMinimum,///< FP min with llvm.minimum semantics + FMaximum,///< FP max with llvm.maximum semantics + FMinimumnum, ///< FP min with llvm.minimumnum semantics + FMaximumnum, ///< FP max with llvm.maximumnum semantics wzssyqa wrote: Removed from this PR, and add them into TODOs. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -32,27 +32,29 @@ class StoreInst; /// These are the kinds of recurrences that we support. enum class RecurKind { - None, ///< Not a recurrence. - Add, ///< Sum of integers. - Mul, ///< Product of integers. - Or, ///< Bitwise or logical OR of integers. - And, ///< Bitwise or logical AND of integers. - Xor, ///< Bitwise or logical XOR of integers. - SMin, ///< Signed integer min implemented in terms of select(cmp()). - SMax, ///< Signed integer max implemented in terms of select(cmp()). - UMin, ///< Unsigned integer min implemented in terms of select(cmp()). - UMax, ///< Unsigned integer max implemented in terms of select(cmp()). - FAdd, ///< Sum of floats. - FMul, ///< Product of floats. - FMin, ///< FP min implemented in terms of select(cmp()). - FMax, ///< FP max implemented in terms of select(cmp()). - FMinimum, ///< FP min with llvm.minimum semantics - FMaximum, ///< FP max with llvm.maximum semantics - FMulAdd, ///< Sum of float products with llvm.fmuladd(a * b + sum). - IAnyOf, ///< Any_of reduction with select(icmp(),x,y) where one of (x,y) is -///< loop invariant, and both x and y are integer type. - FAnyOf///< Any_of reduction with select(fcmp(),x,y) where one of (x,y) is -///< loop invariant, and both x and y are integer type. + None,///< Not a recurrence. + Add, ///< Sum of integers. + Mul, ///< Product of integers. + Or, ///< Bitwise or logical OR of integers. + And, ///< Bitwise or logical AND of integers. + Xor, ///< Bitwise or logical XOR of integers. + SMin,///< Signed integer min implemented in terms of select(cmp()). + SMax,///< Signed integer max implemented in terms of select(cmp()). + UMin,///< Unsigned integer min implemented in terms of select(cmp()). + UMax,///< Unsigned integer max implemented in terms of select(cmp()). + FAdd,///< Sum of floats. + FMul,///< Product of floats. + FMin,///< FP min implemented in terms of select(cmp()). + FMax,///< FP max implemented in terms of select(cmp()). + FMinimum,///< FP min with llvm.minimum semantics + FMaximum,///< FP max with llvm.maximum semantics + FMinimumnum, ///< FP min with llvm.minimumnum semantics + FMaximumnum, ///< FP max with llvm.maximumnum semantics arsenm wrote: Not sure this is tested, but updating each optimization should be split into a separate change https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -9130,6 +9142,15 @@ void SelectionDAGBuilder::visitCall(const CallInst ) { if (visitBinaryFloatCall(I, ISD::FMAXNUM)) return; break; + case LibFunc_fminimum_num: + case LibFunc_fminimum_numf: +if (visitBinaryFloatCall(I, ISD::FMINIMUMNUM)) + return; +break; + case LibFunc_fmaximum_num: wzssyqa wrote: If need, I think that we need to a new patch, since neither other libcalls have them. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -9130,6 +9142,15 @@ void SelectionDAGBuilder::visitCall(const CallInst ) { if (visitBinaryFloatCall(I, ISD::FMAXNUM)) return; break; + case LibFunc_fminimum_num: + case LibFunc_fminimum_numf: +if (visitBinaryFloatCall(I, ISD::FMINIMUMNUM)) + return; +break; + case LibFunc_fmaximum_num: wzssyqa wrote: LibFunc_fminimum_numl LibFunc_fmaximum_numf LibFunc_fmaximum_numl Add. Should we add something like `fmaximum_numfN` and `fmaximum_numfNx `? https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
https://github.com/wzssyqa edited https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -631,6 +631,46 @@ TEST(APFloatTest, Maximum) { EXPECT_TRUE(std::isnan(maximum(nan, f1).convertToDouble())); } +TEST(APFloatTest, MinimumNumber) { + APFloat f1(1.0); + APFloat f2(2.0); + APFloat zp(0.0); + APFloat zn(-0.0); + APFloat nan = APFloat::getNaN(APFloat::IEEEdouble()); + APFloat snan = APFloat::getSNaN(APFloat::IEEEdouble()); + + EXPECT_EQ(1.0, minimumnum(f1, f2).convertToDouble()); + EXPECT_EQ(1.0, minimumnum(f2, f1).convertToDouble()); + EXPECT_EQ(-0.0, minimumnum(zp, zn).convertToDouble()); + EXPECT_EQ(-0.0, minimumnum(zn, zp).convertToDouble()); wzssyqa wrote: Let's add some new isNegtive tests. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -1723,6 +1723,18 @@ class MachineIRBuilder { return buildInstr(TargetOpcode::G_FMAXNUM_IEEE, {Dst}, {Src0, Src1}, Flags); } + MachineInstrBuilder + buildFMinimumNUM(const DstOp , const SrcOp , const SrcOp , jcranmer-intel wrote: How about `FMinimumnum` instead? https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -9130,6 +9142,15 @@ void SelectionDAGBuilder::visitCall(const CallInst ) { if (visitBinaryFloatCall(I, ISD::FMAXNUM)) return; break; + case LibFunc_fminimum_num: + case LibFunc_fminimum_numf: +if (visitBinaryFloatCall(I, ISD::FMINIMUMNUM)) + return; +break; + case LibFunc_fmaximum_num: jcranmer-intel wrote: Methinks there's quite a few missing case statements here. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -631,6 +631,46 @@ TEST(APFloatTest, Maximum) { EXPECT_TRUE(std::isnan(maximum(nan, f1).convertToDouble())); } +TEST(APFloatTest, MinimumNumber) { + APFloat f1(1.0); + APFloat f2(2.0); + APFloat zp(0.0); + APFloat zn(-0.0); + APFloat nan = APFloat::getNaN(APFloat::IEEEdouble()); + APFloat snan = APFloat::getSNaN(APFloat::IEEEdouble()); + + EXPECT_EQ(1.0, minimumnum(f1, f2).convertToDouble()); + EXPECT_EQ(1.0, minimumnum(f2, f1).convertToDouble()); + EXPECT_EQ(-0.0, minimumnum(zp, zn).convertToDouble()); + EXPECT_EQ(-0.0, minimumnum(zn, zp).convertToDouble()); jcranmer-intel wrote: I don't think this is testing what you want to test, as `0.0 == -0.0` https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -1275,6 +1283,14 @@ let IntrProperties = [IntrInaccessibleMemOnly, IntrWillReturn, IntrStrictFP] in [ LLVMMatchType<0>, LLVMMatchType<0>, llvm_metadata_ty ]>; + def int_experimental_constrained_maximumnum : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ], + [ LLVMMatchType<0>, + LLVMMatchType<0>, + llvm_metadata_ty ]>; + def int_experimental_constrained_minimumnum : DefaultAttrsIntrinsic<[ llvm_anyfloat_ty ], + [ LLVMMatchType<0>, + LLVMMatchType<0>, + llvm_metadata_ty ]>; jcranmer-intel wrote: You still need documentation for all these extra intrinsics. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15868,6 +15868,51 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +.. list-table:: + :header-rows: 1 + :widths: 16 28 28 28 + + * - Operation + - minnum/maxnum + - minimum/maximum + - minimumnum/maximumnum + + * - ``NUM vs qNaN`` + - NUM, no exception + - qNaN, no exception + - qNaN, no exception jcranmer-intel wrote: This line is not correct. (`minimumnum(x, qNaN)` is `x`) https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -15868,6 +15868,51 @@ The returned value is completely identical to the input except for the sign bit; in particular, if the input is a NaN, then the quiet/signaling bit and payload are perfectly preserved. +.. _i_fminmax_family: + +'``llvm.min.*``' Intrinsics Comparation +^^^ + +.. list-table:: + :header-rows: 1 + :widths: 16 28 28 28 + + * - Operation + - minnum/maxnum + - minimum/maximum + - minimumnum/maximumnum + + * - ``NUM vs qNaN`` + - NUM, no exception + - qNaN, no exception + - qNaN, no exception + + * - ``NUM vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - NUM, invalid exception + + * - ``qNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + + * - ``sNaN vs sNaN`` + - qNaN, invalid exception + - qNaN, invalid exception + - qNaN, invalid exception + + * - ``+0.0 vs -0.0`` + - either one + - +0.0(max)/-0.0(min) + - +0.0(max)/-0.0(min) + + * - ``NUM vs NUM`` + - larger(max)/smaller(min) + - larger(max)/smaller(min) + - larger(max)/smaller(min) jcranmer-intel wrote: It feels like this section needs a callout on how the sNaN entries interact with our current NaN-handling policy. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
wzssyqa wrote: > > 3. PowerPC: has some interaction with the behavior of `minnum/maxnum`: need > > define `fcanonicalize`. > > AMDGPU has the same handling. This is to break the signaling nan handling > from IEEE to the broken old glibc libm behavior. If we fix the definition to > match IEEE, this is no longer necessary and the operation is directly legal Added to TODO list. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -16049,6 +16094,84 @@ of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic. Note that these are the semantics specified in the draft of IEEE 754-2019. +.. _i_minimumnum: + +'``llvm.minimumnum.*``' Intrinsic +^ + +Syntax: +""" + +This is an overloaded intrinsic. You can use ``llvm.minimumnum`` on any +floating-point or vector of floating-point type. Not all targets support +all types however. + +:: + + declare float @llvm.minimumnum.f32(float %Val0, float %Val1) + declare double@llvm.minimumnum.f64(double %Val0, double %Val1) + declare x86_fp80 @llvm.minimumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1) + declare fp128 @llvm.minimumnum.f128(fp128 %Val0, fp128 %Val1) + declare ppc_fp128 @llvm.minimumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1) + +Overview: +" + +The '``llvm.minimumnum.*``' intrinsics return the minimum of the two +arguments, not propagating NaNs and treating -0.0 as less than +0.0. + + +Arguments: +"" + +The arguments and return value are floating-point numbers of the same +type. + +Semantics: +"" +If both operands are NaNs, returns qNaN. Otherwise returns the lesser +of the two arguments. -0.0 is considered to be less than +0.0 for this +intrinsic. Note that these are the semantics specified in IEEE 754-2019. wzssyqa wrote: > Needs to spell out the signaling nan behavior. If we're fixing minnum's snan > behavior to match IEEE, this is identical except with the stronger guarantee > for signed zero ordering. The documentation should also explicitly state this > is the only difference, to help reduce confusion. Alternatively, we could add > an immediate bool parameter to minnum/maxnum for whether the ordering of 0 is > guaranteed > OK. I will add more details here. > I hate the naming mess we've ended up with here, but I guess C23 has damned > us. If you're going to match the C23 names, this should be `llvm.minimum.num` > with an extra _ In fact, in my initial version of patch, I use _, then I get `llvm.minimum.num`. I considered it as a problem, since it cost some time to know in fact I should use `llvm.minimum.num` instead of `llvm.minimum_num` :( https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
peterwaller-arm wrote: > @peterwaller-arm I noticed that in > `llvm/test/CodeGen/AArch64/combine_andor_with_cmps.ll`, `FMAXNUM_IEEE` is > claimed that it is not supported. While I noticed that `fmaxnm` follows the > rules of `maxNUM` of IEEE754-2008. Is there any other limitation of `fmaxnm`? This is not an area I know a great deal about and I'm about to go on leave, so I'm probably not the best person to ask. Perhaps the author of the comment (on https://reviews.llvm.org/D159240) @kmitropoulou can help? Could the comment mean that it's not currently supported by LLVM rather than not supported by the ISA? I see that the details of how NaNs are handled matters. I'm afraid I don't have time to get to the bottom of this currently. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -5005,8 +5007,11 @@ void computeKnownFPClass(const Value *V, const APInt , // If either operand is not NaN, the result is not NaN. if (NeverNaN && (IID == Intrinsic::minnum || IID == Intrinsic::maxnum)) Known.knownNot(fcNan); + if (NeverNaN && + (IID == Intrinsic::minimumnum || IID == Intrinsic::maximumnum)) +Known.knownNot(fcNan); - if (IID == Intrinsic::maxnum) { + if (IID == Intrinsic::maxnum || IID == Intrinsic::maximumnum) { arsenm wrote: Best to keep the value tracking handling in a separate PR. This is missing test coverage https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -16049,6 +16094,84 @@ of the two arguments. -0.0 is considered to be less than +0.0 for this intrinsic. Note that these are the semantics specified in the draft of IEEE 754-2019. +.. _i_minimumnum: + +'``llvm.minimumnum.*``' Intrinsic +^ + +Syntax: +""" + +This is an overloaded intrinsic. You can use ``llvm.minimumnum`` on any +floating-point or vector of floating-point type. Not all targets support +all types however. + +:: + + declare float @llvm.minimumnum.f32(float %Val0, float %Val1) + declare double@llvm.minimumnum.f64(double %Val0, double %Val1) + declare x86_fp80 @llvm.minimumnum.f80(x86_fp80 %Val0, x86_fp80 %Val1) + declare fp128 @llvm.minimumnum.f128(fp128 %Val0, fp128 %Val1) + declare ppc_fp128 @llvm.minimumnum.ppcf128(ppc_fp128 %Val0, ppc_fp128 %Val1) + +Overview: +" + +The '``llvm.minimumnum.*``' intrinsics return the minimum of the two +arguments, not propagating NaNs and treating -0.0 as less than +0.0. + + +Arguments: +"" + +The arguments and return value are floating-point numbers of the same +type. + +Semantics: +"" +If both operands are NaNs, returns qNaN. Otherwise returns the lesser +of the two arguments. -0.0 is considered to be less than +0.0 for this +intrinsic. Note that these are the semantics specified in IEEE 754-2019. arsenm wrote: Needs to spell out the signaling nan behavior. If we're fixing minnum's snan behavior to match IEEE, this is identical except with the stronger guarantee for signed zero ordering. The documentation should also explicitly state this is the only difference, to help reduce confusion. Alternatively, we could add an immediate bool parameter to minnum/maxnum for whether the ordering of 0 is guaranteed I hate the naming mess we've ended up with here, but I guess C23 has damned us. If you're going to match the C23 names, this should be `llvm.minimum.num` with an extra _ https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
@@ -3636,6 +3648,22 @@ def Fmin : FPMathTemplate, LibBuiltin<"math.h"> { let OnlyBuiltinPrefixedAliasIsConstexpr = 1; } +def FmaximumNum : FPMathTemplate, LibBuiltin<"math.h"> { arsenm wrote: I'd prefer to split the clang changes into a separate change https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
https://github.com/arsenm commented: > 3. PowerPC: has some interaction with the behavior of `minnum/maxnum`: need > define `fcanonicalize`. AMDGPU has the same handling. This is to break the signaling nan handling from IEEE to the broken old glibc libm behavior. If we fix the definition to match IEEE, this is no longer necessary and the operation is directly legal https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
wzssyqa wrote: TODO: implement for architectures that don't have `fmin/fmax` instructions: This is the example of MIPS pre-R6: ``` mins: .setnoreorder .setnomacro mtc1$0,$f1 add.s $f0,$f12,$f1 add.s $f13,$f13,$f1 c.un.s $fcc0,$f0,$f0 movt.s $f0,$f13,$fcc0 c.un.s $fcc0,$f13,$f13 movt.s $f13,$f0,$fcc0 c.ult.s $fcc0,$f13,$f0 movt.s $f0,$f13,$fcc0 jr $31 ``` https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
wzssyqa wrote: @peterwaller-arm I noticed that in `llvm/test/CodeGen/AArch64/combine_andor_with_cmps.ll`, `FMAXNUM_IEEE` is claimed that it is not supported. While I noticed that `fmaxnm` follows the rules of `maxNUM` of IEEE754-2008. Is there any other limitation of `fmaxnm`? https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
efriedma-quic wrote: Please add a table to LangRef comparing the behavior of the three versions of min/max intrinsics for various inputs. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
wzssyqa wrote: Since we need to reuse some logic of `minnum/maxnum` to implement `minimumnum/maximumnum`, let's add them before switch the behavior of `minnum/maxnum`. Known not working ports, will be fixed in future PRs: 1. X86: the current `minnum/maxnum` cannot process +0 vs -0 as `minimumnum/maximumnum` expected. 2. ARM(32): has some interaction with the behavior of `minnum/maxnum`. 3. PowerPC: has some interaction with the behavior of `minnum/maxnum`: need define `fcanonicalize`. https://github.com/llvm/llvm-project/pull/93841 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff 6a3982f8b7e37987659706cb3e6427c54c9bc7ce d5e151568e1ebea81aabdcc42f753393095610e9 -- clang/lib/CodeGen/CGBuiltin.cpp clang/lib/Tooling/Inclusions/Stdlib/CSymbolMap.inc clang/lib/Tooling/Inclusions/Stdlib/StdSymbolMap.inc clang/test/CodeGen/builtins.c clang/test/CodeGen/math-libcalls.c llvm/include/llvm/ADT/APFloat.h llvm/include/llvm/Analysis/IVDescriptors.h llvm/include/llvm/Analysis/ValueTracking.h llvm/include/llvm/CodeGen/BasicTTIImpl.h llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h llvm/include/llvm/CodeGen/GlobalISel/Utils.h llvm/include/llvm/CodeGen/ISDOpcodes.h llvm/include/llvm/CodeGen/TargetLowering.h llvm/include/llvm/IR/IRBuilder.h llvm/include/llvm/IR/IntrinsicInst.h llvm/lib/Analysis/ConstantFolding.cpp llvm/lib/Analysis/IVDescriptors.cpp llvm/lib/Analysis/InstructionSimplify.cpp llvm/lib/Analysis/ValueTracking.cpp llvm/lib/Analysis/VectorUtils.cpp llvm/lib/CodeGen/ExpandVectorPredication.cpp llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp llvm/lib/CodeGen/GlobalISel/Utils.cpp llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/lib/CodeGen/TargetLoweringBase.cpp llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/Hexagon/HexagonISelLowering.cpp llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp llvm/lib/Target/RISCV/RISCVISelLowering.cpp llvm/lib/Target/X86/X86ISelLowering.cpp llvm/lib/Target/X86/X86TargetTransformInfo.cpp llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp llvm/unittests/ADT/APFloatTest.cpp llvm/unittests/Analysis/TargetLibraryInfoTest.cpp llvm/unittests/IR/VPIntrinsicTest.cpp `` View the diff from clang-format here. ``diff diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index f2a15dc9cf..76507c1357 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -2794,9 +2794,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, case Builtin::BI__builtin_fmaximum_numf16: case Builtin::BI__builtin_fmaximum_numl: case Builtin::BI__builtin_fmaximum_numf128: - return RValue::get(emitBinaryMaybeConstrainedFPBuiltin(*this, E, - Intrinsic::maximumnum, - Intrinsic::experimental_constrained_maximumnum)); + return RValue::get(emitBinaryMaybeConstrainedFPBuiltin( + *this, E, Intrinsic::maximumnum, + Intrinsic::experimental_constrained_maximumnum)); case Builtin::BIfminimum_num: case Builtin::BIfminimum_numf: @@ -2806,9 +2806,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, case Builtin::BI__builtin_fminimum_numf16: case Builtin::BI__builtin_fminimum_numl: case Builtin::BI__builtin_fminimum_numf128: - return RValue::get(emitBinaryMaybeConstrainedFPBuiltin(*this, E, - Intrinsic::minnum, - Intrinsic::experimental_constrained_minimumnum)); + return RValue::get(emitBinaryMaybeConstrainedFPBuiltin( + *this, E, Intrinsic::minnum, + Intrinsic::experimental_constrained_minimumnum)); // fmod() is a special-case. It maps to the frem instruction rather than an // LLVM intrinsic. diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 2339b0d792..6de4a1d8fd 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -808,18 +808,38 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine , setOperationAction(ISD::FP_ROUND, MVT::v4bf16, Custom); // AArch64 has implementations of a lot of rounding-like FP operations. - for (auto Op : - {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, -ISD::FRINT, ISD::FTRUNC, ISD::FROUND, -ISD::FROUNDEVEN, ISD::FMINNUM,
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: YunQiang Su (wzssyqa) Changes Currently, on different platform, the behaivor of llvm.minnum is different if one operand is sNaN: When we compare sNaN vs NUM: ARM/AArch64/PowerPC: follow the IEEE754-2008's minNUM: return qNaN. RISC-V/Hexagon follow the IEEE754-2019's minimumNumber: return NUM. X86: Returns NUM but not same with IEEE754-2019's minimumNumber as +0.0 is not always greater than -0.0. MIPS/LoongArch/Generic: return NUM. LIBCALL: returns qNaN. So, let's introduce llvm.minmumnum/llvm.maximumnum, which always follow IEEE754-2019's minimumNumber/maximumNumber. Half-fix: #93033 --- Patch is 170.43 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/93841.diff 78 Files Affected: - (modified) clang/include/clang/Basic/Builtins.td (+28) - (modified) clang/lib/CodeGen/CGBuiltin.cpp (+24) - (modified) clang/lib/Tooling/Inclusions/Stdlib/CSymbolMap.inc (+6) - (modified) clang/lib/Tooling/Inclusions/Stdlib/StdSymbolMap.inc (+18) - (modified) clang/test/CodeGen/builtins.c (+18) - (modified) clang/test/CodeGen/math-libcalls.c (+25) - (modified) llvm/docs/LangRef.rst (+78) - (modified) llvm/include/llvm/ADT/APFloat.h (+20) - (modified) llvm/include/llvm/Analysis/IVDescriptors.h (+25-22) - (modified) llvm/include/llvm/Analysis/TargetLibraryInfo.def (+33) - (modified) llvm/include/llvm/Analysis/ValueTracking.h (+10-8) - (modified) llvm/include/llvm/CodeGen/BasicTTIImpl.h (+10) - (modified) llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h (+2) - (modified) llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h (+12) - (modified) llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (+1) - (modified) llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h (+24) - (modified) llvm/include/llvm/CodeGen/GlobalISel/Utils.h (+4) - (modified) llvm/include/llvm/CodeGen/ISDOpcodes.h (+11) - (modified) llvm/include/llvm/CodeGen/TargetLowering.h (+7) - (modified) llvm/include/llvm/IR/ConstrainedOps.def (+2) - (modified) llvm/include/llvm/IR/IRBuilder.h (+12) - (modified) llvm/include/llvm/IR/IntrinsicInst.h (+2) - (modified) llvm/include/llvm/IR/Intrinsics.td (+40) - (modified) llvm/include/llvm/IR/RuntimeLibcalls.def (+10) - (modified) llvm/include/llvm/IR/VPIntrinsics.def (+22) - (modified) llvm/include/llvm/Support/TargetOpcodes.def (+6) - (modified) llvm/include/llvm/Target/GenericOpcodes.td (+19) - (modified) llvm/include/llvm/Target/GlobalISel/Combine.td (+3-3) - (modified) llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td (+4) - (modified) llvm/include/llvm/Target/TargetSelectionDAG.td (+18) - (modified) llvm/lib/Analysis/ConstantFolding.cpp (+8) - (modified) llvm/lib/Analysis/IVDescriptors.cpp (+4) - (modified) llvm/lib/Analysis/InstructionSimplify.cpp (+16-2) - (modified) llvm/lib/Analysis/ValueTracking.cpp (+24-7) - (modified) llvm/lib/Analysis/VectorUtils.cpp (+2) - (modified) llvm/lib/CodeGen/ExpandVectorPredication.cpp (+17-1) - (modified) llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp (+2) - (modified) llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp (+2) - (modified) llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (+8) - (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+51-2) - (modified) llvm/lib/CodeGen/GlobalISel/Utils.cpp (+9-1) - (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+9-3) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (+32) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (+61-1) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h (+4) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (+13) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (+14) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+15-3) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (+27) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp (+8) - (modified) llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (+101-5) - (modified) llvm/lib/CodeGen/TargetLoweringBase.cpp (+1) - (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+3) - (modified) llvm/lib/Target/AArch64/AArch64InstrInfo.td (+12) - (modified) llvm/lib/Target/Hexagon/HexagonISelLowering.cpp (+5) - (modified) llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (+6) - (modified) llvm/lib/Target/Hexagon/HexagonPatterns.td (+4) - (modified) llvm/lib/Target/Hexagon/HexagonPatternsHVX.td (+8) - (modified) llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp (+3-1) - (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+25-7) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoD.td (+2) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoF.td (+2) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td (+2) - (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+4) - (modified) llvm/lib/Target/X86/X86TargetTransformInfo.cpp (+12-4) -
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
llvmbot wrote: @llvm/pr-subscribers-backend-x86 Author: YunQiang Su (wzssyqa) Changes Currently, on different platform, the behaivor of llvm.minnum is different if one operand is sNaN: When we compare sNaN vs NUM: ARM/AArch64/PowerPC: follow the IEEE754-2008's minNUM: return qNaN. RISC-V/Hexagon follow the IEEE754-2019's minimumNumber: return NUM. X86: Returns NUM but not same with IEEE754-2019's minimumNumber as +0.0 is not always greater than -0.0. MIPS/LoongArch/Generic: return NUM. LIBCALL: returns qNaN. So, let's introduce llvm.minmumnum/llvm.maximumnum, which always follow IEEE754-2019's minimumNumber/maximumNumber. Half-fix: #93033 --- Patch is 170.43 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/93841.diff 78 Files Affected: - (modified) clang/include/clang/Basic/Builtins.td (+28) - (modified) clang/lib/CodeGen/CGBuiltin.cpp (+24) - (modified) clang/lib/Tooling/Inclusions/Stdlib/CSymbolMap.inc (+6) - (modified) clang/lib/Tooling/Inclusions/Stdlib/StdSymbolMap.inc (+18) - (modified) clang/test/CodeGen/builtins.c (+18) - (modified) clang/test/CodeGen/math-libcalls.c (+25) - (modified) llvm/docs/LangRef.rst (+78) - (modified) llvm/include/llvm/ADT/APFloat.h (+20) - (modified) llvm/include/llvm/Analysis/IVDescriptors.h (+25-22) - (modified) llvm/include/llvm/Analysis/TargetLibraryInfo.def (+33) - (modified) llvm/include/llvm/Analysis/ValueTracking.h (+10-8) - (modified) llvm/include/llvm/CodeGen/BasicTTIImpl.h (+10) - (modified) llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h (+2) - (modified) llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h (+12) - (modified) llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (+1) - (modified) llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h (+24) - (modified) llvm/include/llvm/CodeGen/GlobalISel/Utils.h (+4) - (modified) llvm/include/llvm/CodeGen/ISDOpcodes.h (+11) - (modified) llvm/include/llvm/CodeGen/TargetLowering.h (+7) - (modified) llvm/include/llvm/IR/ConstrainedOps.def (+2) - (modified) llvm/include/llvm/IR/IRBuilder.h (+12) - (modified) llvm/include/llvm/IR/IntrinsicInst.h (+2) - (modified) llvm/include/llvm/IR/Intrinsics.td (+40) - (modified) llvm/include/llvm/IR/RuntimeLibcalls.def (+10) - (modified) llvm/include/llvm/IR/VPIntrinsics.def (+22) - (modified) llvm/include/llvm/Support/TargetOpcodes.def (+6) - (modified) llvm/include/llvm/Target/GenericOpcodes.td (+19) - (modified) llvm/include/llvm/Target/GlobalISel/Combine.td (+3-3) - (modified) llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td (+4) - (modified) llvm/include/llvm/Target/TargetSelectionDAG.td (+18) - (modified) llvm/lib/Analysis/ConstantFolding.cpp (+8) - (modified) llvm/lib/Analysis/IVDescriptors.cpp (+4) - (modified) llvm/lib/Analysis/InstructionSimplify.cpp (+16-2) - (modified) llvm/lib/Analysis/ValueTracking.cpp (+24-7) - (modified) llvm/lib/Analysis/VectorUtils.cpp (+2) - (modified) llvm/lib/CodeGen/ExpandVectorPredication.cpp (+17-1) - (modified) llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp (+2) - (modified) llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp (+2) - (modified) llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (+8) - (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+51-2) - (modified) llvm/lib/CodeGen/GlobalISel/Utils.cpp (+9-1) - (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+9-3) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (+32) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (+61-1) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h (+4) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (+13) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (+14) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+15-3) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (+27) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp (+8) - (modified) llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (+101-5) - (modified) llvm/lib/CodeGen/TargetLoweringBase.cpp (+1) - (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+3) - (modified) llvm/lib/Target/AArch64/AArch64InstrInfo.td (+12) - (modified) llvm/lib/Target/Hexagon/HexagonISelLowering.cpp (+5) - (modified) llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (+6) - (modified) llvm/lib/Target/Hexagon/HexagonPatterns.td (+4) - (modified) llvm/lib/Target/Hexagon/HexagonPatternsHVX.td (+8) - (modified) llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp (+3-1) - (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+25-7) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoD.td (+2) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoF.td (+2) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td (+2) - (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+4) - (modified) llvm/lib/Target/X86/X86TargetTransformInfo.cpp (+12-4) -
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: YunQiang Su (wzssyqa) Changes Currently, on different platform, the behaivor of llvm.minnum is different if one operand is sNaN: When we compare sNaN vs NUM: ARM/AArch64/PowerPC: follow the IEEE754-2008's minNUM: return qNaN. RISC-V/Hexagon follow the IEEE754-2019's minimumNumber: return NUM. X86: Returns NUM but not same with IEEE754-2019's minimumNumber as +0.0 is not always greater than -0.0. MIPS/LoongArch/Generic: return NUM. LIBCALL: returns qNaN. So, let's introduce llvm.minmumnum/llvm.maximumnum, which always follow IEEE754-2019's minimumNumber/maximumNumber. Half-fix: #93033 --- Patch is 170.43 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/93841.diff 78 Files Affected: - (modified) clang/include/clang/Basic/Builtins.td (+28) - (modified) clang/lib/CodeGen/CGBuiltin.cpp (+24) - (modified) clang/lib/Tooling/Inclusions/Stdlib/CSymbolMap.inc (+6) - (modified) clang/lib/Tooling/Inclusions/Stdlib/StdSymbolMap.inc (+18) - (modified) clang/test/CodeGen/builtins.c (+18) - (modified) clang/test/CodeGen/math-libcalls.c (+25) - (modified) llvm/docs/LangRef.rst (+78) - (modified) llvm/include/llvm/ADT/APFloat.h (+20) - (modified) llvm/include/llvm/Analysis/IVDescriptors.h (+25-22) - (modified) llvm/include/llvm/Analysis/TargetLibraryInfo.def (+33) - (modified) llvm/include/llvm/Analysis/ValueTracking.h (+10-8) - (modified) llvm/include/llvm/CodeGen/BasicTTIImpl.h (+10) - (modified) llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h (+2) - (modified) llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h (+12) - (modified) llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (+1) - (modified) llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h (+24) - (modified) llvm/include/llvm/CodeGen/GlobalISel/Utils.h (+4) - (modified) llvm/include/llvm/CodeGen/ISDOpcodes.h (+11) - (modified) llvm/include/llvm/CodeGen/TargetLowering.h (+7) - (modified) llvm/include/llvm/IR/ConstrainedOps.def (+2) - (modified) llvm/include/llvm/IR/IRBuilder.h (+12) - (modified) llvm/include/llvm/IR/IntrinsicInst.h (+2) - (modified) llvm/include/llvm/IR/Intrinsics.td (+40) - (modified) llvm/include/llvm/IR/RuntimeLibcalls.def (+10) - (modified) llvm/include/llvm/IR/VPIntrinsics.def (+22) - (modified) llvm/include/llvm/Support/TargetOpcodes.def (+6) - (modified) llvm/include/llvm/Target/GenericOpcodes.td (+19) - (modified) llvm/include/llvm/Target/GlobalISel/Combine.td (+3-3) - (modified) llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td (+4) - (modified) llvm/include/llvm/Target/TargetSelectionDAG.td (+18) - (modified) llvm/lib/Analysis/ConstantFolding.cpp (+8) - (modified) llvm/lib/Analysis/IVDescriptors.cpp (+4) - (modified) llvm/lib/Analysis/InstructionSimplify.cpp (+16-2) - (modified) llvm/lib/Analysis/ValueTracking.cpp (+24-7) - (modified) llvm/lib/Analysis/VectorUtils.cpp (+2) - (modified) llvm/lib/CodeGen/ExpandVectorPredication.cpp (+17-1) - (modified) llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp (+2) - (modified) llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp (+2) - (modified) llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (+8) - (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+51-2) - (modified) llvm/lib/CodeGen/GlobalISel/Utils.cpp (+9-1) - (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+9-3) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (+32) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (+61-1) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h (+4) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (+13) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (+14) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+15-3) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (+27) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp (+8) - (modified) llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (+101-5) - (modified) llvm/lib/CodeGen/TargetLoweringBase.cpp (+1) - (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+3) - (modified) llvm/lib/Target/AArch64/AArch64InstrInfo.td (+12) - (modified) llvm/lib/Target/Hexagon/HexagonISelLowering.cpp (+5) - (modified) llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (+6) - (modified) llvm/lib/Target/Hexagon/HexagonPatterns.td (+4) - (modified) llvm/lib/Target/Hexagon/HexagonPatternsHVX.td (+8) - (modified) llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp (+3-1) - (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+25-7) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoD.td (+2) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoF.td (+2) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td (+2) - (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+4) - (modified) llvm/lib/Target/X86/X86TargetTransformInfo.cpp (+12-4) -
[clang] [llvm] Intrinsic: introduce minimumnum and maximumnum (PR #93841)
llvmbot wrote: @llvm/pr-subscribers-llvm-transforms @llvm/pr-subscribers-llvm-selectiondag Author: YunQiang Su (wzssyqa) Changes Currently, on different platform, the behaivor of llvm.minnum is different if one operand is sNaN: When we compare sNaN vs NUM: ARM/AArch64/PowerPC: follow the IEEE754-2008's minNUM: return qNaN. RISC-V/Hexagon follow the IEEE754-2019's minimumNumber: return NUM. X86: Returns NUM but not same with IEEE754-2019's minimumNumber as +0.0 is not always greater than -0.0. MIPS/LoongArch/Generic: return NUM. LIBCALL: returns qNaN. So, let's introduce llvm.minmumnum/llvm.maximumnum, which always follow IEEE754-2019's minimumNumber/maximumNumber. Half-fix: #93033 --- Patch is 170.43 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/93841.diff 78 Files Affected: - (modified) clang/include/clang/Basic/Builtins.td (+28) - (modified) clang/lib/CodeGen/CGBuiltin.cpp (+24) - (modified) clang/lib/Tooling/Inclusions/Stdlib/CSymbolMap.inc (+6) - (modified) clang/lib/Tooling/Inclusions/Stdlib/StdSymbolMap.inc (+18) - (modified) clang/test/CodeGen/builtins.c (+18) - (modified) clang/test/CodeGen/math-libcalls.c (+25) - (modified) llvm/docs/LangRef.rst (+78) - (modified) llvm/include/llvm/ADT/APFloat.h (+20) - (modified) llvm/include/llvm/Analysis/IVDescriptors.h (+25-22) - (modified) llvm/include/llvm/Analysis/TargetLibraryInfo.def (+33) - (modified) llvm/include/llvm/Analysis/ValueTracking.h (+10-8) - (modified) llvm/include/llvm/CodeGen/BasicTTIImpl.h (+10) - (modified) llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h (+2) - (modified) llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h (+12) - (modified) llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (+1) - (modified) llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h (+24) - (modified) llvm/include/llvm/CodeGen/GlobalISel/Utils.h (+4) - (modified) llvm/include/llvm/CodeGen/ISDOpcodes.h (+11) - (modified) llvm/include/llvm/CodeGen/TargetLowering.h (+7) - (modified) llvm/include/llvm/IR/ConstrainedOps.def (+2) - (modified) llvm/include/llvm/IR/IRBuilder.h (+12) - (modified) llvm/include/llvm/IR/IntrinsicInst.h (+2) - (modified) llvm/include/llvm/IR/Intrinsics.td (+40) - (modified) llvm/include/llvm/IR/RuntimeLibcalls.def (+10) - (modified) llvm/include/llvm/IR/VPIntrinsics.def (+22) - (modified) llvm/include/llvm/Support/TargetOpcodes.def (+6) - (modified) llvm/include/llvm/Target/GenericOpcodes.td (+19) - (modified) llvm/include/llvm/Target/GlobalISel/Combine.td (+3-3) - (modified) llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td (+4) - (modified) llvm/include/llvm/Target/TargetSelectionDAG.td (+18) - (modified) llvm/lib/Analysis/ConstantFolding.cpp (+8) - (modified) llvm/lib/Analysis/IVDescriptors.cpp (+4) - (modified) llvm/lib/Analysis/InstructionSimplify.cpp (+16-2) - (modified) llvm/lib/Analysis/ValueTracking.cpp (+24-7) - (modified) llvm/lib/Analysis/VectorUtils.cpp (+2) - (modified) llvm/lib/CodeGen/ExpandVectorPredication.cpp (+17-1) - (modified) llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp (+2) - (modified) llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp (+2) - (modified) llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp (+8) - (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+51-2) - (modified) llvm/lib/CodeGen/GlobalISel/Utils.cpp (+9-1) - (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+9-3) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (+32) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (+61-1) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h (+4) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp (+13) - (modified) llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (+14) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+15-3) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (+27) - (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp (+8) - (modified) llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp (+101-5) - (modified) llvm/lib/CodeGen/TargetLoweringBase.cpp (+1) - (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (+3) - (modified) llvm/lib/Target/AArch64/AArch64InstrInfo.td (+12) - (modified) llvm/lib/Target/Hexagon/HexagonISelLowering.cpp (+5) - (modified) llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp (+6) - (modified) llvm/lib/Target/Hexagon/HexagonPatterns.td (+4) - (modified) llvm/lib/Target/Hexagon/HexagonPatternsHVX.td (+8) - (modified) llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp (+3-1) - (modified) llvm/lib/Target/RISCV/RISCVISelLowering.cpp (+25-7) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoD.td (+2) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoF.td (+2) - (modified) llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td (+2) - (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+4) - (modified)