[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
jhuber6 wrote: > > How about using `--offload=` which can take a target triple? E.g. > > * `--offload=spirv64-amd` or something like that: pick HIPAMD tool chain. > > * `--offload=spirv64`: pick HIPSPV tool chain. > > > And also remove this > [limitation](https://github.com/llvm/llvm-project/blob/5fc712c4bbe84e6cbaa1f7d2a0300f613f11b0c3/clang/lib/Driver/Driver.cpp#L3130-L3136) > if you want `--offload` to work along with `--offload-arch`. > > Or alternatively allow multiple `--offload` options, deprecate > `--offload-arch` and use `--offload` instead. For convenience and easy > transition, options like `--offload=` could be allowed where the > `` is treated as an alias for an offload target (E.g. > `--offload=gfx900` could imply `--offload=amdgcn-amd-amdhsa:gfx900` or > something like that). I've been planning to improve `--offload` at some point. When using the OpenMP toolchain we have `-fopenmp-target=amdgcn-amd-amdhsa,nvptx64-nvidia-cuda` for example, which will just active those toolchains and default to whatever `nvptx-arch` and `amdgpu-arch` spit out. We can most likely use similar logic if needed. The OpenMP solution to target specific arguments is `-Xopenmp-target=amdgcn-amd-amdhsa -march=`, though that's not necessarily the best solution. https://github.com/llvm/llvm-project/pull/75357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
linehill wrote: > > Perhaps we should consider prefixing it in some way (e.g. `hip-spirv` or > > `amd-spirv`) that leaves the door open for some special handling (enable a > > particular set of extensions only for amdgpu targeting SPIRV, try to deal > > with missing builtins etc.) / flexibility? > > I think amd-spirv may be a good choice since spirv itself is ambiguous about > which HIP toolchain to choose since there are two HIP toolchains that support > SPIRV: HIPAMD and HIPSPV. > > I wonder if `-mcpu` is the correct way to encode this. Targeting SPIR-V is > > more like the triple than the architecture as far as I'm aware. > > I will see whether I can use triple instead. How about using `--offload=` which can take a target triple? E.g. * `--offload=spirv64-amd` or something like that: pick HIPAMD tool chain. * `--offload=spirv64`: pick HIPSPV tool chain. And also remove this [limitation](https://github.com/llvm/llvm-project/blob/5fc712c4bbe84e6cbaa1f7d2a0300f613f11b0c3/clang/lib/Driver/Driver.cpp#L3130-L3136) if you want `--offload` to work along with `--offload-arch`. Or alternatively allow multiple `--offload` options, deprecate `--offload-arch` and use `--offload` instead. For convenience and easy transition, options like `--offload=` could be allowed where the `` is treated as an alias for an offload target (E.g. `--offload=gfx900` could imply `--offload=amdgcn-amd-amdhsa:gfx900` or something like that). https://github.com/llvm/llvm-project/pull/75357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
@@ -209,6 +210,13 @@ void AMDGCN::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
if (JA.getType() == types::TY_LLVM_BC)
return constructLlvmLinkCommand(C, JA, Inputs, Output, Args);
+ if (Args.getLastArgValue(options::OPT_mcpu_EQ) == "generic") {
+llvm::opt::ArgStringList TrArgs{"--spirv-max-version=1.1",
yxsamliu wrote:
> I wonder if `-mcpu` is the correct way to encode this. Targeting SPIR-V is
> more like the triple than the architecture as far as I'm aware.
I will see whether I can use triple instead.
https://github.com/llvm/llvm-project/pull/75357
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[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
@@ -209,6 +210,13 @@ void AMDGCN::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
if (JA.getType() == types::TY_LLVM_BC)
return constructLlvmLinkCommand(C, JA, Inputs, Output, Args);
+ if (Args.getLastArgValue(options::OPT_mcpu_EQ) == "generic") {
+llvm::opt::ArgStringList TrArgs{"--spirv-max-version=1.1",
yxsamliu wrote:
> I'm not sure we want to stick with 1.1 here, the Translator goes up to 1.4 at
> the moment - should we consider going to that instead?
Thanks for reminder. I think we should be able to go up with the version since
we will use ToT of the LLVM/SPIRV translator.
https://github.com/llvm/llvm-project/pull/75357
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[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
yxsamliu wrote: > > > > Is generic the best name here? I feel like that's going to be heavily > > > > overloaded. I'd much prefer a new architecture that just treats > > > > "SPIR-V" as a single architecture. E.g. `--offload-arch=spirv` or > > > > something. > > > > > > For HIPAMD toolchain, `--offload-arch=generic` and `--offload-arch=spirv` > > does not make much difference. However, I understand for OpenMP toolchain > > `--offload-arch=generic` is probably too ambiguous and > > `--offload-arch=spirv` is better. I can change it to `spirv`. > > Perhaps we should consider prefixing it in some way (e.g. `hip-spirv` or > `amd-spirv`) that leaves the door open for some special handling (enable a > particular set of extensions only for amdgpu targeting SPIRV, try to deal > with missing builtins etc.) / flexibility? I think amd-spirv may be a good choice since spirv itself is ambiguous about which HIP toolchain to choose since there are two HIP toolchains that support SPIRV: HIPAMD and HIPSPV. https://github.com/llvm/llvm-project/pull/75357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
@@ -209,6 +210,13 @@ void AMDGCN::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
if (JA.getType() == types::TY_LLVM_BC)
return constructLlvmLinkCommand(C, JA, Inputs, Output, Args);
+ if (Args.getLastArgValue(options::OPT_mcpu_EQ) == "generic") {
+llvm::opt::ArgStringList TrArgs{"--spirv-max-version=1.1",
jhuber6 wrote:
I wonder if `-mcpu` is the correct way to encode this. Targeting SPIR-V is more
like the triple than the architecture as far as I'm aware.
https://github.com/llvm/llvm-project/pull/75357
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[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
jhuber6 wrote: > Perhaps we should consider prefixing it in some way (e.g. `hip-spirv` or > `amd-spirv`) that leaves the door open for some special handling (enable a > particular set of extensions only for amdgpu targeting SPIRV, try to deal > with missing builtins etc.) / flexibility? Unsure that's necessary, as we'd already have `OFK_HIP` in the clang driver or `-x hip` in `cci` to key off of if needed. https://github.com/llvm/llvm-project/pull/75357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
@@ -209,6 +210,13 @@ void AMDGCN::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
if (JA.getType() == types::TY_LLVM_BC)
return constructLlvmLinkCommand(C, JA, Inputs, Output, Args);
+ if (Args.getLastArgValue(options::OPT_mcpu_EQ) == "generic") {
+llvm::opt::ArgStringList TrArgs{"--spirv-max-version=1.1",
AlexVlx wrote:
I'm not sure we want to stick with 1.1 here, the Translator goes up to 1.4 at
the moment - should we consider going to that instead?
https://github.com/llvm/llvm-project/pull/75357
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[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
AlexVlx wrote: > > > Is generic the best name here? I feel like that's going to be heavily > > > overloaded. I'd much prefer a new architecture that just treats "SPIR-V" > > > as a single architecture. E.g. `--offload-arch=spirv` or something. > > For HIPAMD toolchain, `--offload-arch=generic` and `--offload-arch=spirv` > does not make much difference. However, I understand for OpenMP toolchain > `--offload-arch=generic` is probably too ambiguous and `--offload-arch=spirv` > is better. I can change it to `spirv`. Perhaps we should consider prefixing it in some way (e.g. `hip-spirv` or `amd-spirv`) that leaves the door open for some special handling (enable a particular set of extensions only for amdgpu targeting SPIRV, try to deal with missing builtins etc.) / flexibility? https://github.com/llvm/llvm-project/pull/75357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
jhuber6 wrote: I feel like we should treat `spirv` in the same way we handle stuff like `sm_90` in the `CudaArch` enum. (We should probably also rename that as it's used for generic offloading now). OpenMP infers the triple from the arch, so in the future when OpenMP can handle SPIR-V we can simply re-use that. https://github.com/llvm/llvm-project/pull/75357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
yxsamliu wrote: > > Is generic the best name here? I feel like that's going to be heavily > > overloaded. I'd much prefer a new architecture that just treats "SPIR-V" as > > a single architecture. E.g. `--offload-arch=spirv` or something. For HIPAMD toolchain, `--offload-arch=generic` and `--offload-arch=spirv` does not make much difference. However, I understand `--offload-arch=generic` is probably too ambiguous and `--offload-arch=spirv` is better. I can change it to `spirv`. https://github.com/llvm/llvm-project/pull/75357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
jhuber6 wrote: > Is generic the best name here? I feel like that's going to be heavily > overloaded. I'd much prefer a new architecture that just treats "SPIR-V" as a > single architecture. E.g. `--offload-arch=spirv` or something. https://github.com/llvm/llvm-project/pull/75357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
jhuber6 wrote: Is generic the best name here? I feel like that's going to be heavily overloaded. https://github.com/llvm/llvm-project/pull/75357 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Yaxun (Sam) Liu (yxsamliu)
Changes
Make changes to clang driver and HIPAMD to allow compile HIP programs to SPIRV
with HIPAMD toolchain.
---
Full diff: https://github.com/llvm/llvm-project/pull/75357.diff
8 Files Affected:
- (modified) clang/docs/HIPSupport.rst (+28)
- (modified) clang/lib/Basic/TargetID.cpp (+4-1)
- (modified) clang/lib/Driver/Driver.cpp (+2-1)
- (modified) clang/lib/Driver/ToolChain.cpp (+4)
- (modified) clang/lib/Driver/ToolChains/AMDGPU.cpp (+3-2)
- (modified) clang/lib/Driver/ToolChains/HIPAMD.cpp (+8)
- (modified) clang/test/Driver/hip-phases.hip (+11-5)
- (modified) clang/test/Driver/hip-toolchain-no-rdc.hip (+17)
``diff
diff --git a/clang/docs/HIPSupport.rst b/clang/docs/HIPSupport.rst
index 84cee45e83ba3c..803dd5ab2b8545 100644
--- a/clang/docs/HIPSupport.rst
+++ b/clang/docs/HIPSupport.rst
@@ -266,3 +266,31 @@ Example Usage
Base* basePtr = &obj;
basePtr->virtualFunction(); // Allowed since obj is constructed in
device code
}
+
+SPIRV Support on HIPAMD ToolChain
+=
+
+SPIRV is a target-neutral device executable format. The support for SPIRV in
the ROCm and HIPAMD toolchain is under active development.
+
+Compilation Process
+---
+
+When compiling HIP programs with the intent of utilizing SPIRV, the process
diverges from the traditional compilation flow:
+
+Using ``--offload-arch=generic``
+
+
+- **Target Triple**: The ``--offload-arch=generic`` flag instructs the
compiler to use the target triple ``spirv64-unknown-unknown``. This approach
does not generate ISA (Instruction Set Architecture) for a specific GPU
architecture.
+
+- **LLVM IR Translation**: The program is compiled to LLVM Intermediate
Representation (IR), which is subsequently translated into SPIRV.
+
+- **Clang Offload Bundler**: The resulting SPIRV is embedded in the Clang
offload bundler with the bundle ID ``hipv4-hip-amdgcn-amd-amdhsa-generic``.
+
+Mixed with Normal ``--offload-arch``
+
+
+- **ISA Generation**: Alongside SPIRV, the compiler can also generate ISA for
specific GPU architectures when normal ``--offload-arch`` options are used.
+
+- **Runtime Behavior**: The HIP runtime prioritizes the use of ISA for a
specific GPU if available. In its absence, and if SPIRV is available, the
runtime will JIT (Just-In-Time) compile SPIRV into ISA.
+
+This approach allows for greater flexibility and portability in HIP
programming, particularly in environments where the specific GPU architecture
may vary or be unknown at compile time. The ability to mix SPIRV with specific
ISA generation also provides a balanced solution for optimizing performance
while maintaining portability.
diff --git a/clang/lib/Basic/TargetID.cpp b/clang/lib/Basic/TargetID.cpp
index 3c06d9bad1dc0d..06c8830de57be8 100644
--- a/clang/lib/Basic/TargetID.cpp
+++ b/clang/lib/Basic/TargetID.cpp
@@ -46,8 +46,11 @@ getAllPossibleTargetIDFeatures(const llvm::Triple &T,
/// Returns canonical processor name or empty string if \p Processor is
invalid.
static llvm::StringRef getCanonicalProcessorName(const llvm::Triple &T,
llvm::StringRef Processor) {
- if (T.isAMDGPU())
+ if (T.isAMDGPU()) {
+if (Processor == "generic")
+ return Processor;
return llvm::AMDGPU::getCanonicalArchName(T, Processor);
+ }
return Processor;
}
diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp
index e241706b9082ee..538820246cb3ca 100644
--- a/clang/lib/Driver/Driver.cpp
+++ b/clang/lib/Driver/Driver.cpp
@@ -3438,7 +3438,8 @@ class OffloadingActionBuilder final {
// compiler phases, including backend and assemble phases.
ActionList AL;
Action *BackendAction = nullptr;
-if (ToolChains.front()->getTriple().isSPIRV()) {
+if (ToolChains.front()->getTriple().isSPIRV() ||
+StringRef(GpuArchList[I]) == "generic") {
// Emit LLVM bitcode for SPIR-V targets. SPIR-V device tool chain
// (HIPSPVToolChain) runs post-link LLVM IR passes.
types::ID Output = Args.hasArg(options::OPT_S)
diff --git a/clang/lib/Driver/ToolChain.cpp b/clang/lib/Driver/ToolChain.cpp
index ab19166f18c2dc..6613a843c4ad3a 100644
--- a/clang/lib/Driver/ToolChain.cpp
+++ b/clang/lib/Driver/ToolChain.cpp
@@ -1008,6 +1008,10 @@ std::string ToolChain::ComputeLLVMTriple(const ArgList
&Args,
tools::arm::setFloatABIInTriple(getDriver(), Args, Triple);
return Triple.getTriple();
}
+ case llvm::Triple::amdgcn:
+if (Args.getLastArgValue(options::OPT_mcpu_EQ) == "generic")
+ return "spirv64-unknown-unknown";
+return getTripleString();
}
}
diff --git a/clang/lib/Driver/ToolChains/AMDGPU.cpp
b/clang/lib/Driver/ToolChains/AMDGPU.cpp
index cad206ea4df1bc..5e83136d40
[clang] Add SPIRV support to HIPAMD toolchain (PR #75357)
https://github.com/yxsamliu created
https://github.com/llvm/llvm-project/pull/75357
Make changes to clang driver and HIPAMD to allow compile HIP programs to SPIRV
with HIPAMD toolchain.
>From 953685cdefdb12d5e477b107e88a1c3389eb2bb5 Mon Sep 17 00:00:00 2001
From: "Yaxun (Sam) Liu"
Date: Wed, 13 Dec 2023 11:30:13 -0500
Subject: [PATCH] Add SPIRV support to HIPAMD toolchain
Make changes to clang driver and HIPAMD to allow compile
HIP programs to SPIRV with HIPAMD toolchain.
---
clang/docs/HIPSupport.rst | 28 ++
clang/lib/Basic/TargetID.cpp | 5 +++-
clang/lib/Driver/Driver.cpp| 3 ++-
clang/lib/Driver/ToolChain.cpp | 4
clang/lib/Driver/ToolChains/AMDGPU.cpp | 5 ++--
clang/lib/Driver/ToolChains/HIPAMD.cpp | 8 +++
clang/test/Driver/hip-phases.hip | 16 +
clang/test/Driver/hip-toolchain-no-rdc.hip | 17 +
8 files changed, 77 insertions(+), 9 deletions(-)
diff --git a/clang/docs/HIPSupport.rst b/clang/docs/HIPSupport.rst
index 84cee45e83ba3c..803dd5ab2b8545 100644
--- a/clang/docs/HIPSupport.rst
+++ b/clang/docs/HIPSupport.rst
@@ -266,3 +266,31 @@ Example Usage
Base* basePtr = &obj;
basePtr->virtualFunction(); // Allowed since obj is constructed in
device code
}
+
+SPIRV Support on HIPAMD ToolChain
+=
+
+SPIRV is a target-neutral device executable format. The support for SPIRV in
the ROCm and HIPAMD toolchain is under active development.
+
+Compilation Process
+---
+
+When compiling HIP programs with the intent of utilizing SPIRV, the process
diverges from the traditional compilation flow:
+
+Using ``--offload-arch=generic``
+
+
+- **Target Triple**: The ``--offload-arch=generic`` flag instructs the
compiler to use the target triple ``spirv64-unknown-unknown``. This approach
does not generate ISA (Instruction Set Architecture) for a specific GPU
architecture.
+
+- **LLVM IR Translation**: The program is compiled to LLVM Intermediate
Representation (IR), which is subsequently translated into SPIRV.
+
+- **Clang Offload Bundler**: The resulting SPIRV is embedded in the Clang
offload bundler with the bundle ID ``hipv4-hip-amdgcn-amd-amdhsa-generic``.
+
+Mixed with Normal ``--offload-arch``
+
+
+- **ISA Generation**: Alongside SPIRV, the compiler can also generate ISA for
specific GPU architectures when normal ``--offload-arch`` options are used.
+
+- **Runtime Behavior**: The HIP runtime prioritizes the use of ISA for a
specific GPU if available. In its absence, and if SPIRV is available, the
runtime will JIT (Just-In-Time) compile SPIRV into ISA.
+
+This approach allows for greater flexibility and portability in HIP
programming, particularly in environments where the specific GPU architecture
may vary or be unknown at compile time. The ability to mix SPIRV with specific
ISA generation also provides a balanced solution for optimizing performance
while maintaining portability.
diff --git a/clang/lib/Basic/TargetID.cpp b/clang/lib/Basic/TargetID.cpp
index 3c06d9bad1dc0d..06c8830de57be8 100644
--- a/clang/lib/Basic/TargetID.cpp
+++ b/clang/lib/Basic/TargetID.cpp
@@ -46,8 +46,11 @@ getAllPossibleTargetIDFeatures(const llvm::Triple &T,
/// Returns canonical processor name or empty string if \p Processor is
invalid.
static llvm::StringRef getCanonicalProcessorName(const llvm::Triple &T,
llvm::StringRef Processor) {
- if (T.isAMDGPU())
+ if (T.isAMDGPU()) {
+if (Processor == "generic")
+ return Processor;
return llvm::AMDGPU::getCanonicalArchName(T, Processor);
+ }
return Processor;
}
diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp
index e241706b9082ee..538820246cb3ca 100644
--- a/clang/lib/Driver/Driver.cpp
+++ b/clang/lib/Driver/Driver.cpp
@@ -3438,7 +3438,8 @@ class OffloadingActionBuilder final {
// compiler phases, including backend and assemble phases.
ActionList AL;
Action *BackendAction = nullptr;
-if (ToolChains.front()->getTriple().isSPIRV()) {
+if (ToolChains.front()->getTriple().isSPIRV() ||
+StringRef(GpuArchList[I]) == "generic") {
// Emit LLVM bitcode for SPIR-V targets. SPIR-V device tool chain
// (HIPSPVToolChain) runs post-link LLVM IR passes.
types::ID Output = Args.hasArg(options::OPT_S)
diff --git a/clang/lib/Driver/ToolChain.cpp b/clang/lib/Driver/ToolChain.cpp
index ab19166f18c2dc..6613a843c4ad3a 100644
--- a/clang/lib/Driver/ToolChain.cpp
+++ b/clang/lib/Driver/ToolChain.cpp
@@ -1008,6 +1008,10 @@ std::string ToolChain::ComputeLLVMTriple(const ArgList
&Args,
tools::arm::setFloatABIInTriple(getDriver(), Args, Triple);
return Triple.getTriple();
}
+ case llvm::Triple::amdgcn:
