https://github.com/4vtomat updated
https://github.com/llvm/llvm-project/pull/66860
>From a43d20450eef2d41e88ab867de2656e2fd9631b7 Mon Sep 17 00:00:00 2001
From: 4vtomat
Date: Tue, 19 Sep 2023 23:06:01 -0700
Subject: [PATCH 1/3] [RISCV] Fix wrong implication for zvknhb.
---
clang/include/clang/Basic/riscv_vector.td| 9 -
.../include/clang/Support/RISCVVIntrinsicUtils.h | 5 +++--
clang/lib/Sema/SemaRISCVVectorLookup.cpp | 1 +
clang/test/Sema/zvk-invalid-zvknha.c | 11 +++
clang/utils/TableGen/RISCVVEmitter.cpp | 1 +
llvm/lib/Support/RISCVISAInfo.cpp| 2 --
llvm/lib/Target/RISCV/RISCVFeatures.td | 16 +++-
llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td | 16 +++-
llvm/test/CodeGen/RISCV/attributes.ll| 16
llvm/test/CodeGen/RISCV/rvv/vsha2ch.ll | 6 ++
llvm/test/CodeGen/RISCV/rvv/vsha2cl.ll | 6 ++
llvm/test/CodeGen/RISCV/rvv/vsha2ms.ll | 6 ++
llvm/test/MC/RISCV/attribute-arch.s | 8
llvm/test/MC/RISCV/rvv/zvknh.s | 6 +++---
14 files changed, 79 insertions(+), 30 deletions(-)
create mode 100644 clang/test/Sema/zvk-invalid-zvknha.c
diff --git a/clang/include/clang/Basic/riscv_vector.td
b/clang/include/clang/Basic/riscv_vector.td
index 8bbfd1cef5106a5..1d24b4e75f9dd5f 100644
--- a/clang/include/clang/Basic/riscv_vector.td
+++ b/clang/include/clang/Basic/riscv_vector.td
@@ -2588,8 +2588,15 @@ let UnMaskedPolicyScheme = HasPolicyOperand, HasMasked =
false in {
defm vaesz : RVVOutBuiltinSetZvk;
}
- // zvknha or zvknhb
+ // zvknha
let RequiredFeatures = ["Zvknha"] in {
+defm vsha2ch : RVVOutOp2BuiltinSetVVZvk<"i">;
+defm vsha2cl : RVVOutOp2BuiltinSetVVZvk<"i">;
+defm vsha2ms : RVVOutOp2BuiltinSetVVZvk<"i">;
+ }
+
+ // zvknhb
+ let RequiredFeatures = ["Zvknhb"] in {
defm vsha2ch : RVVOutOp2BuiltinSetVVZvk<"il">;
defm vsha2cl : RVVOutOp2BuiltinSetVVZvk<"il">;
defm vsha2ms : RVVOutOp2BuiltinSetVVZvk<"il">;
diff --git a/clang/include/clang/Support/RISCVVIntrinsicUtils.h
b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
index 90d99b7efa8aff9..c455bb2c45889f3 100644
--- a/clang/include/clang/Support/RISCVVIntrinsicUtils.h
+++ b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
@@ -493,8 +493,9 @@ enum RVVRequire : uint16_t {
RVV_REQ_Zvkg = 1 << 8,
RVV_REQ_Zvkned = 1 << 9,
RVV_REQ_Zvknha = 1 << 10,
- RVV_REQ_Zvksed = 1 << 11,
- RVV_REQ_Zvksh = 1 << 12,
+ RVV_REQ_Zvknhb = 1 << 11,
+ RVV_REQ_Zvksed = 1 << 12,
+ RVV_REQ_Zvksh = 1 << 13,
LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_Zvksh)
};
diff --git a/clang/lib/Sema/SemaRISCVVectorLookup.cpp
b/clang/lib/Sema/SemaRISCVVectorLookup.cpp
index acdf3260007bc3a..1ba68f54b6db19c 100644
--- a/clang/lib/Sema/SemaRISCVVectorLookup.cpp
+++ b/clang/lib/Sema/SemaRISCVVectorLookup.cpp
@@ -213,6 +213,7 @@ void RISCVIntrinsicManagerImpl::ConstructRVVIntrinsics(
{"experimental-zvkg", RVV_REQ_Zvkg},
{"experimental-zvkned", RVV_REQ_Zvkned},
{"experimental-zvknha", RVV_REQ_Zvknha},
+ {"experimental-zvknhb", RVV_REQ_Zvknhb},
{"experimental-zvksed", RVV_REQ_Zvksed},
{"experimental-zvksh", RVV_REQ_Zvksh}};
diff --git a/clang/test/Sema/zvk-invalid-zvknha.c
b/clang/test/Sema/zvk-invalid-zvknha.c
new file mode 100644
index 000..0ce2e321a175f5f
--- /dev/null
+++ b/clang/test/Sema/zvk-invalid-zvknha.c
@@ -0,0 +1,11 @@
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature
+experimental-zvknha %s -fsyntax-only -verify
+
+#include
+
+void test_zvk_features() {
+ // zvknhb
+ __riscv_vsha2ch_vv_u64m1(); // expected-error {{call to undeclared function
'__riscv_vsha2ch_vv_u64m1'; ISO C99 and later do not support implicit function
declarations}}
+ __riscv_vsha2cl_vv_u64m1(); // expected-error {{call to undeclared function
'__riscv_vsha2cl_vv_u64m1'; ISO C99 and later do not support implicit function
declarations}}
+ __riscv_vsha2ms_vv_u64m1(); // expected-error {{call to undeclared function
'__riscv_vsha2ms_vv_u64m1'; ISO C99 and later do not support implicit function
declarations}}
+}
diff --git a/clang/utils/TableGen/RISCVVEmitter.cpp
b/clang/utils/TableGen/RISCVVEmitter.cpp
index 07d31642188eafd..d697099e47733fa 100644
--- a/clang/utils/TableGen/RISCVVEmitter.cpp
+++ b/clang/utils/TableGen/RISCVVEmitter.cpp
@@ -664,6 +664,7 @@ void RVVEmitter::createRVVIntrinsics(
.Case("Zvkg", RVV_REQ_Zvkg)
.Case("Zvkned", RVV_REQ_Zvkned)
.Case("Zvknha", RVV_REQ_Zvknha)
+ .Case("Zvknhb", RVV_REQ_Zvknhb)
.Case("Zvksed", RVV_REQ_Zvksed)
.Case("Zvksh", RVV_REQ_Zvksh)
