https://github.com/OutOfCache updated
https://github.com/llvm/llvm-project/pull/74471
>From 94ed734c0d8864a08e3b77600dda811040270bd9 Mon Sep 17 00:00:00 2001
From: Jessica Del
Date: Tue, 5 Dec 2023 13:45:58 +0100
Subject: [PATCH 1/5] [AMDGPU] - Add address space for strided buffers
This is an experimental address space for strided buffers.
These buffers can have structs as elements and
a stride > 1.
These pointers allow the indexed access in units of stride,
i.e., they point at `buffer[index * stride]`.
Thus, we can use the `idxen` modifier for buffer loads.
We assign address space 9 to 192-bit buffer pointers which
contain a 128-bit descriptor, a 32-bit offset and a 32-bit
index. Essentially, they are fat buffer pointers with
an additional 32-bit index.
---
llvm/docs/AMDGPUUsage.rst | 48 -
llvm/lib/Target/AMDGPU/AMDGPU.h | 32 +
.../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 7 +-
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 +-
.../AMDGPU/AMDGPUTargetTransformInfo.cpp | 3 +-
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 13 +++-
.../CodeGen/AMDGPU/amdgpu-alias-analysis.ll | 70 +++
.../AMDGPU/vectorize-buffer-fat-pointer.ll| 19 -
8 files changed, 154 insertions(+), 40 deletions(-)
diff --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index 7fb3d70bbeffeb..ff45efac7e8486 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -703,23 +703,24 @@ supported for the ``amdgcn`` target.
.. table:: AMDGPU Address Spaces
:name: amdgpu-address-spaces-table
- = === ===
===
- ..
64-Bit Process Address Space
- - --- ---
- Address Space NameLLVM IR Address HSA Segment Hardware
Address NULL Value
- Space NumberNameName
Size
- = === ===
===
- Generic 0 flatflat
64 0x
- Global1 global global
64 0x
- Region2 N/A GDS
32 *not implemented for AMDHSA*
- Local 3 group LDS
32 0x
- Constant 4 constant*same as
global* 64 0x
- Private 5 private scratch
32 0x
- Constant 32-bit 6 *TODO*
0x
- Buffer Fat Pointer (experimental) 7 *TODO*
- Buffer Resource (experimental)8 *TODO*
- Streamout Registers 128 N/A GS_REGS
- = === ===
===
+ = === ===
===
+ ..
64-Bit Process Address Space
+ - --- ---
+ Address Space NameLLVM IR Address HSA Segment
Hardware Address NULL Value
+ Space NumberNameName
Size
+ = === ===
===
+ Generic 0 flatflat
64 0x
+ Global1 global global
64 0x
+ Region2 N/A GDS
32 *not implemented for AMDHSA*
+ Local 3 group LDS
32 0x
+ Constant 4 constant*same
as global* 64 0x
+ Private 5 private scratch
32 0x
+ Constant 32-bit 6 *TODO*
0x
+ Buffer Fat Pointer (experimental) 7 *TODO*
+