[PATCH] D27123: Add AVR target and toolchain to Clang
dylanmckay added a comment. Signed off by Jonathan Roelofs via cfe-commits https://reviews.llvm.org/D27123 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[libcxx] r291081 - Fix test suite configuration when no lit.site.cfg is available
Author: ericwf
Date: Wed Jan 4 23:18:37 2017
New Revision: 291081
URL: http://llvm.org/viewvc/llvm-project?rev=291081&view=rev
Log:
Fix test suite configuration when no lit.site.cfg is available
Modified:
libcxx/trunk/test/libcxx/test/config.py
Modified: libcxx/trunk/test/libcxx/test/config.py
URL:
http://llvm.org/viewvc/llvm-project/libcxx/trunk/test/libcxx/test/config.py?rev=291081&r1=291080&r2=291081&view=diff
==
--- libcxx/trunk/test/libcxx/test/config.py (original)
+++ libcxx/trunk/test/libcxx/test/config.py Wed Jan 4 23:18:37 2017
@@ -450,9 +450,11 @@ class Configuration(object):
self.lit_config.fatal("cxx_headers='%s' is not a directory."
% cxx_headers)
self.cxx.compile_flags += ['-I' + cxx_headers]
-cxxabi_headers = os.path.join(self.libcxx_obj_root, 'include',
'c++-build')
-if os.path.isdir(cxxabi_headers):
-self.cxx.compile_flags += ['-I' + cxxabi_headers]
+if self.libcxx_obj_root is not None:
+cxxabi_headers = os.path.join(self.libcxx_obj_root, 'include',
+ 'c++-build')
+if os.path.isdir(cxxabi_headers):
+self.cxx.compile_flags += ['-I' + cxxabi_headers]
def configure_config_site_header(self):
# Check for a possible __config_site in the build directory. We
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r291082 - Add AVR target and toolchain to Clang
Author: dylanmckay
Date: Wed Jan 4 23:20:27 2017
New Revision: 291082
URL: http://llvm.org/viewvc/llvm-project?rev=291082&view=rev
Log:
Add AVR target and toolchain to Clang
Summary:
Authored by Senthil Kumar Selvaraj
This patch adds barebones support in Clang for the (experimental) AVR target.
It uses the integrated assembler for assembly, and the GNU linker for linking,
as lld doesn't know about the target yet.
The DataLayout string is the same as the one in AVRTargetMachine.cpp. The
alignment specs look wrong to me, as it's an 8 bit target and all types only
need 8 bit alignment. Clang failed with a datalayout mismatch error when I
tried to change it, so I left it that way for now.
Reviewers: rsmith, dylanmckay, cfe-commits, rengolin
Subscribers: rengolin, jroelofs, wdng
Differential Revision: https://reviews.llvm.org/D27123
Added:
cfe/trunk/test/Driver/avr-toolchain.c
Modified:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/Driver/Driver.cpp
cfe/trunk/lib/Driver/ToolChains.cpp
cfe/trunk/lib/Driver/ToolChains.h
cfe/trunk/lib/Driver/Tools.cpp
cfe/trunk/lib/Driver/Tools.h
cfe/trunk/test/Preprocessor/init.c
Modified: cfe/trunk/lib/Basic/Targets.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=291082&r1=291081&r2=291082&view=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Wed Jan 4 23:20:27 2017
@@ -8385,6 +8385,97 @@ public:
}
};
+
+// AVR Target
+class AVRTargetInfo : public TargetInfo {
+public:
+ AVRTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
+ : TargetInfo(Triple) {
+TLSSupported = false;
+PointerWidth = 16;
+PointerAlign = 8;
+IntWidth = 16;
+IntAlign = 8;
+LongWidth = 32;
+LongAlign = 8;
+LongLongWidth = 64;
+LongLongAlign = 8;
+SuitableAlign = 8;
+DefaultAlignForAttributeAligned = 8;
+HalfWidth = 16;
+HalfAlign = 8;
+FloatWidth = 32;
+FloatAlign = 8;
+DoubleWidth = 32;
+DoubleAlign = 8;
+DoubleFormat = &llvm::APFloat::IEEEsingle();
+LongDoubleWidth = 32;
+LongDoubleAlign = 8;
+LongDoubleFormat = &llvm::APFloat::IEEEsingle();
+SizeType = UnsignedInt;
+PtrDiffType = SignedInt;
+IntPtrType = SignedInt;
+Char16Type = UnsignedInt;
+WCharType = SignedInt;
+WIntType = SignedInt;
+Char32Type = UnsignedLong;
+SigAtomicType = SignedChar;
+resetDataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
+ "-f32:32:32-f64:64:64-n8");
+ }
+ void getTargetDefines(const LangOptions &Opts,
+MacroBuilder &Builder) const override {
+Builder.defineMacro("__AVR__");
+ }
+ ArrayRef getTargetBuiltins() const override {
+return None;
+ }
+ BuiltinVaListKind getBuiltinVaListKind() const override {
+return TargetInfo::VoidPtrBuiltinVaList;
+ }
+ const char *getClobbers() const override {
+return "";
+ }
+ ArrayRef getGCCRegNames() const override {
+static const char * const GCCRegNames[] = {
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "X","Y","Z","SP"
+};
+return llvm::makeArrayRef(GCCRegNames);
+ }
+ ArrayRef getGCCRegAliases() const override {
+return None;
+ }
+ ArrayRef getGCCAddlRegNames() const override {
+static const TargetInfo::AddlRegName AddlRegNames[] = {
+ { { "r26", "r27"}, 26 },
+ { { "r28", "r29"}, 27 },
+ { { "r30", "r31"}, 28 },
+ { { "SPL", "SPH"}, 29 },
+};
+return llvm::makeArrayRef(AddlRegNames);
+ }
+ bool validateAsmConstraint(const char *&Name,
+ TargetInfo::ConstraintInfo &Info) const override {
+return false;
+ }
+ IntType getIntTypeByWidth(unsigned BitWidth,
+bool IsSigned) const final {
+// AVR prefers int for 16-bit integers.
+return BitWidth == 16 ? (IsSigned ? SignedInt : UnsignedInt)
+ : TargetInfo::getIntTypeByWidth(BitWidth, IsSigned);
+ }
+ IntType getLeastIntTypeByWidth(unsigned BitWidth,
+ bool IsSigned) const final {
+// AVR uses int for int_least16_t and int_fast16_t.
+return BitWidth == 16
+ ? (IsSigned ? SignedInt : UnsignedInt)
+ : TargetInfo::getLeastIntTypeByWidth(BitWidth, IsSigned);
+ }
+};
+
} // end anonymous namespace
//===--===//
@@ -8507,6 +8598,8 @@ static TargetInfo *AllocateTarget(const
return new ARMbeTargetInfo(Triple, Opts);
}
+ case llvm::Triple::avr:
+return new AVRTargetInfo(Triple, Opts);
case llvm::Triple::bpfeb:
case llvm::Triple::bpfel:
[PATCH] D27123: Add AVR target and toolchain to Clang
This revision was automatically updated to reflect the committed changes.
Closed by commit rL291082: Add AVR target and toolchain to Clang (authored by
dylanmckay).
Changed prior to commit:
https://reviews.llvm.org/D27123?vs=80721&id=83191#toc
Repository:
rL LLVM
https://reviews.llvm.org/D27123
Files:
cfe/trunk/lib/Basic/Targets.cpp
cfe/trunk/lib/Driver/Driver.cpp
cfe/trunk/lib/Driver/ToolChains.cpp
cfe/trunk/lib/Driver/ToolChains.h
cfe/trunk/lib/Driver/Tools.cpp
cfe/trunk/lib/Driver/Tools.h
cfe/trunk/test/Driver/avr-toolchain.c
cfe/trunk/test/Preprocessor/init.c
Index: cfe/trunk/lib/Driver/ToolChains.h
===
--- cfe/trunk/lib/Driver/ToolChains.h
+++ cfe/trunk/lib/Driver/ToolChains.h
@@ -1349,6 +1349,16 @@
SanitizerMask getSupportedSanitizers() const override;
};
+class LLVM_LIBRARY_VISIBILITY AVRToolChain : public Generic_ELF {
+protected:
+ Tool *buildLinker() const override;
+public:
+ AVRToolChain(const Driver &D, const llvm::Triple &Triple,
+ const llvm::opt::ArgList &Args);
+ bool IsIntegratedAssemblerDefault() const override { return true; }
+};
+
+
} // end namespace toolchains
} // end namespace driver
} // end namespace clang
Index: cfe/trunk/lib/Driver/Tools.h
===
--- cfe/trunk/lib/Driver/Tools.h
+++ cfe/trunk/lib/Driver/Tools.h
@@ -990,6 +990,19 @@
} // end namespace NVPTX
+namespace AVR {
+class LLVM_LIBRARY_VISIBILITY Linker : public GnuTool {
+public:
+ Linker(const ToolChain &TC) : GnuTool("AVR::Linker", "avr-ld", TC) {}
+ bool hasIntegratedCPP() const override { return false; }
+ bool isLinkJob() const override { return true; }
+ void ConstructJob(Compilation &C, const JobAction &JA,
+const InputInfo &Output, const InputInfoList &Inputs,
+const llvm::opt::ArgList &TCArgs,
+const char *LinkingOutput) const override;
+};
+} // end namespace AVR
+
} // end namespace tools
} // end namespace driver
} // end namespace clang
Index: cfe/trunk/lib/Driver/ToolChains.cpp
===
--- cfe/trunk/lib/Driver/ToolChains.cpp
+++ cfe/trunk/lib/Driver/ToolChains.cpp
@@ -5318,3 +5318,12 @@
Res |= SanitizerKind::SafeStack;
return Res;
}
+
+/// AVR Toolchain
+AVRToolChain::AVRToolChain(const Driver &D, const llvm::Triple &Triple,
+ const ArgList &Args)
+ : Generic_ELF(D, Triple, Args) { }
+Tool *AVRToolChain::buildLinker() const {
+ return new tools::AVR::Linker(*this);
+}
+// End AVR
Index: cfe/trunk/lib/Driver/Tools.cpp
===
--- cfe/trunk/lib/Driver/Tools.cpp
+++ cfe/trunk/lib/Driver/Tools.cpp
@@ -12191,3 +12191,19 @@
const char *Exec = Args.MakeArgString(TC.GetProgramPath("fatbinary"));
C.addCommand(llvm::make_unique(JA, *this, Exec, CmdArgs, Inputs));
}
+
+void AVR::Linker::ConstructJob(Compilation &C, const JobAction &JA,
+ const InputInfo &Output,
+ const InputInfoList &Inputs,
+ const ArgList &Args,
+ const char *LinkingOutput) const {
+
+ std::string Linker = getToolChain().GetProgramPath(getShortName());
+ ArgStringList CmdArgs;
+ AddLinkerInputs(getToolChain(), Inputs, Args, CmdArgs, JA);
+ CmdArgs.push_back("-o");
+ CmdArgs.push_back(Output.getFilename());
+ C.addCommand(llvm::make_unique(JA, *this, Args.MakeArgString(Linker),
+ CmdArgs, Inputs));
+}
+// AVR tools end.
Index: cfe/trunk/lib/Driver/Driver.cpp
===
--- cfe/trunk/lib/Driver/Driver.cpp
+++ cfe/trunk/lib/Driver/Driver.cpp
@@ -3764,6 +3764,9 @@
case llvm::Triple::wasm64:
TC = new toolchains::WebAssembly(*this, Target, Args);
break;
+ case llvm::Triple::avr:
+TC = new toolchains::AVRToolChain(*this, Target, Args);
+break;
default:
if (Target.getVendor() == llvm::Triple::Myriad)
TC = new toolchains::MyriadToolChain(*this, Target, Args);
Index: cfe/trunk/lib/Basic/Targets.cpp
===
--- cfe/trunk/lib/Basic/Targets.cpp
+++ cfe/trunk/lib/Basic/Targets.cpp
@@ -8385,6 +8385,97 @@
}
};
+
+// AVR Target
+class AVRTargetInfo : public TargetInfo {
+public:
+ AVRTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
+ : TargetInfo(Triple) {
+TLSSupported = false;
+PointerWidth = 16;
+PointerAlign = 8;
+IntWidth = 16;
+IntAlign = 8;
+LongWidth = 32;
+LongAlign = 8;
+LongLongWidth = 64;
+LongLongAlign = 8;
+SuitableAlign = 8;
+DefaultAlignForAttributeAligned = 8;
+HalfWidth = 16;
+HalfAlign = 8;
+FloatWidth = 32;
r291083 - [AVR] Support r26 through r31 in inline assembly
Author: dylanmckay
Date: Wed Jan 4 23:31:12 2017
New Revision: 291083
URL: http://llvm.org/viewvc/llvm-project?rev=291083&view=rev
Log:
[AVR] Support r26 through r31 in inline assembly
These are synonyms for the X,Y, and Z registers.
Modified:
cfe/trunk/lib/Basic/Targets.cpp
Modified: cfe/trunk/lib/Basic/Targets.cpp
URL:
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=291083&r1=291082&r2=291083&view=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Wed Jan 4 23:31:12 2017
@@ -8423,31 +8423,39 @@ public:
resetDataLayout("e-p:16:16:16-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
"-f32:32:32-f64:64:64-n8");
}
+
void getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const override {
Builder.defineMacro("__AVR__");
}
+
ArrayRef getTargetBuiltins() const override {
return None;
}
+
BuiltinVaListKind getBuiltinVaListKind() const override {
return TargetInfo::VoidPtrBuiltinVaList;
}
+
const char *getClobbers() const override {
return "";
}
+
ArrayRef getGCCRegNames() const override {
static const char * const GCCRegNames[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
"r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- "r24", "r25", "X","Y","Z","SP"
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
+ "X","Y","Z","SP"
};
return llvm::makeArrayRef(GCCRegNames);
}
+
ArrayRef getGCCRegAliases() const override {
return None;
}
+
ArrayRef getGCCAddlRegNames() const override {
static const TargetInfo::AddlRegName AddlRegNames[] = {
{ { "r26", "r27"}, 26 },
@@ -8457,16 +8465,19 @@ public:
};
return llvm::makeArrayRef(AddlRegNames);
}
+
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
return false;
}
+
IntType getIntTypeByWidth(unsigned BitWidth,
bool IsSigned) const final {
// AVR prefers int for 16-bit integers.
return BitWidth == 16 ? (IsSigned ? SignedInt : UnsignedInt)
: TargetInfo::getIntTypeByWidth(BitWidth, IsSigned);
}
+
IntType getLeastIntTypeByWidth(unsigned BitWidth,
bool IsSigned) const final {
// AVR uses int for int_least16_t and int_fast16_t.
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D28343: [AVR] Fix register numbers for in getGCCAddlRegNames()
dylanmckay created this revision.
dylanmckay added a reviewer: saaadhu.
dylanmckay added a subscriber: cfe-commits.
These do not match up with the register numbers defined in LLVM's
AVRRegisterInfo.td
Adding Senthil as a reviewer as he originally implemented this.
https://reviews.llvm.org/D28343
Files:
lib/Basic/Targets.cpp
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -8459,9 +8459,9 @@
ArrayRef getGCCAddlRegNames() const override {
static const TargetInfo::AddlRegName AddlRegNames[] = {
{ { "r26", "r27"}, 26 },
- { { "r28", "r29"}, 27 },
- { { "r30", "r31"}, 28 },
- { { "SPL", "SPH"}, 29 },
+ { { "r28", "r29"}, 28 },
+ { { "r30", "r31"}, 30 },
+ { { "SPL", "SPH"}, 32 },
};
return llvm::makeArrayRef(AddlRegNames);
}
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -8459,9 +8459,9 @@
ArrayRef getGCCAddlRegNames() const override {
static const TargetInfo::AddlRegName AddlRegNames[] = {
{ { "r26", "r27"}, 26 },
- { { "r28", "r29"}, 27 },
- { { "r30", "r31"}, 28 },
- { { "SPL", "SPH"}, 29 },
+ { { "r28", "r29"}, 28 },
+ { { "r30", "r31"}, 30 },
+ { { "SPL", "SPH"}, 32 },
};
return llvm::makeArrayRef(AddlRegNames);
}
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D28220: provide Win32 native threading
EricWF accepted this revision. EricWF added a comment. This revision is now accepted and ready to land. This LGTM. I'm sure we can flush out any bugs once we get the tests running. Repository: rL LLVM https://reviews.llvm.org/D28220 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D28212: typeinfo: provide a partial implementation for Win32
EricWF added inline comments.
Comment at: include/typeinfo:75
+#elif defined(_WIN32)
+#define _LIBCPP_HAS_WINDOWS_TYPEINFO
+#else
compnerd wrote:
> rnk wrote:
> > Is _WIN32 the right condition? It seems like this is intended to match the
> > MS ABI RTTI structure, not the Itanium one. _MSC_VER maybe?
> Yeah, this is meant to match the MS ABI RTTI. Yeah, _MSC_VER seems more
> appropriate than _WIN32.
I agree. Please make this change before committing.
Comment at: include/typeinfo:193
+
+type_info::type_info(const char* __n)
+: __type_name(__n) {}
This constructor is almost certainly not correct. @compnerd do you know what
constructor call `clang-cl` generates to construct `type_info`?
Comment at: src/typeinfo.cpp:28-32
+ static constexpr const size_t fnv_offset_basis = 14695981039346656037;
+ static constexpr const size_t fnv_prime = 10995116282110;
+#else
+ static constexpr const size_t fnv_offset_basis = 2166136261;
+ static constexpr const size_t fnv_prime = 16777619;
compnerd wrote:
> rnk wrote:
> > compnerd wrote:
> > > majnemer wrote:
> > > > majnemer wrote:
> > > > > Why make these static? Seems strange to use that storage duration.
> > > > These literals are ill-formed, I think you need a ULL suffix here.
> > > Oh, just to ensure that they are handled as literal constants. I can
> > > drop the static if you like, since the compiler should do the right thing
> > > anyways.
> > Isn't `constexpr const` redundant?
> Yeah, intentional. I should be using `_LIBCPP_CONSTEXPR` just incase the
> compiler doesn't support constexpr.
All supported compiler provide `constexpr` when building the dylib, so you can
assume we have it.
I have no strong objection to the redundancy, but I'm not opposed to removing
either `const` or `constexpr`.
https://reviews.llvm.org/D28212
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D28131: [libcxx] Fix PR31402: map::__find_equal_key has undefined behavior.
EricWF accepted this revision. EricWF added a reviewer: EricWF. EricWF added a comment. This revision is now accepted and ready to land. In https://reviews.llvm.org/D28131#632516, @vsk wrote: > LGTM. I'm not sure what to do for a test. Have you tried checking the IR for > the affected object file in tablegen at '-O2 -fsanitize=undefined'? If > there's an unconditional call to the ubsan handler, maybe the tablegen source > could be used to find a small reproducer? Good idea. I'll have to try that, however I'll try to write a test post-commit. https://reviews.llvm.org/D28131 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D28344: [AVR] Add support for the full set of inline asm constraints
dylanmckay created this revision.
dylanmckay added a reviewer: jroelofs.
dylanmckay added subscribers: cfe-commits, saaadhu.
Previously the method would simply return false, causing every single
inline assembly constraint to trigger a compile error.
This adds inline assembly constraint support for the AVR target.
This patch is derived from the code in
AVRISelLowering::getConstraintType.
More details can be found on the AVR-GCC reference wiki
http://www.nongnu.org/avr-libc/user-manual/inline_asm.html
https://reviews.llvm.org/D28344
Files:
lib/Basic/Targets.cpp
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -8468,7 +8468,53 @@
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
-return false;
+// There aren't any multi-character AVR specific constraints.
+if (StringRef(Name).size() > 1) return false;
+
+switch (*Name) {
+ default: return false;
+ case 'a': // Simple upper registers
+ case 'b': // Base pointer registers pairs
+ case 'd': // Upper register
+ case 'l': // Lower registers
+ case 'e': // Pointer register pairs
+ case 'q': // Stack pointer register
+ case 'r': // Any register
+ case 'w': // Special upper register pairs
+ case 't': // Temporary register
+ case 'x': case 'X': // Pointer register pair X
+ case 'y': case 'Y': // Pointer register pair Y
+ case 'z': case 'Z': // Pointer register pair Z
+Info.setAllowsRegister();
+return true;
+ case 'I': // 6-bit positive integer constant
+Info.setRequiresImmediate(0, 63);
+return true;
+ case 'J': // 6-bit negative integer constant
+Info.setRequiresImmediate(-63, 0);
+return true;
+ case 'K': // Integer constant (Range: 2)
+Info.setRequiresImmediate(2);
+return true;
+ case 'L': // Integer constant (Range: 0)
+Info.setRequiresImmediate(0);
+return true;
+ case 'M': // 8-bit integer constant
+Info.setRequiresImmediate(0, 0xff);
+return true;
+ case 'N': // Integer constant (Range: -1)
+Info.setRequiresImmediate(-1);
+ case 'O': // Integer constant (Range: 8, 16, 24)
+Info.setRequiresImmediate({8, 16, 24});
+ case 'P': // Integer constant (Range: 1)
+Info.setRequiresImmediate(1);
+ case 'R': // Integer constant (Range: -6 to 5)
+Info.setRequiresImmediate(-6, 5);
+return true;
+ case 'G': // Floating point constant
+ case 'Q': // A memory address based on Y or Z pointer with displacement.
+return true;
+}
}
IntType getIntTypeByWidth(unsigned BitWidth,
Index: lib/Basic/Targets.cpp
===
--- lib/Basic/Targets.cpp
+++ lib/Basic/Targets.cpp
@@ -8468,7 +8468,53 @@
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override {
-return false;
+// There aren't any multi-character AVR specific constraints.
+if (StringRef(Name).size() > 1) return false;
+
+switch (*Name) {
+ default: return false;
+ case 'a': // Simple upper registers
+ case 'b': // Base pointer registers pairs
+ case 'd': // Upper register
+ case 'l': // Lower registers
+ case 'e': // Pointer register pairs
+ case 'q': // Stack pointer register
+ case 'r': // Any register
+ case 'w': // Special upper register pairs
+ case 't': // Temporary register
+ case 'x': case 'X': // Pointer register pair X
+ case 'y': case 'Y': // Pointer register pair Y
+ case 'z': case 'Z': // Pointer register pair Z
+Info.setAllowsRegister();
+return true;
+ case 'I': // 6-bit positive integer constant
+Info.setRequiresImmediate(0, 63);
+return true;
+ case 'J': // 6-bit negative integer constant
+Info.setRequiresImmediate(-63, 0);
+return true;
+ case 'K': // Integer constant (Range: 2)
+Info.setRequiresImmediate(2);
+return true;
+ case 'L': // Integer constant (Range: 0)
+Info.setRequiresImmediate(0);
+return true;
+ case 'M': // 8-bit integer constant
+Info.setRequiresImmediate(0, 0xff);
+return true;
+ case 'N': // Integer constant (Range: -1)
+Info.setRequiresImmediate(-1);
+ case 'O': // Integer constant (Range: 8, 16, 24)
+Info.setRequiresImmediate({8, 16, 24});
+ case 'P': // Integer constant (Range: 1)
+Info.setRequiresImmediate(1);
+ case 'R': // Integer constant (Range: -6 to 5)
+Info.setRequiresImmediate(-6, 5);
+return true;
+ case 'G': // Floating point constant
+ case 'Q': // A memory address based on Y or Z pointer with displace
[libcxx] r291087 - [libcxx] Fix PR31402: map::__find_equal_key has undefined behavior.
Author: ericwf
Date: Thu Jan 5 00:06:18 2017
New Revision: 291087
URL: http://llvm.org/viewvc/llvm-project?rev=291087&view=rev
Log:
[libcxx] Fix PR31402: map::__find_equal_key has undefined behavior.
Summary:
This patch fixes llvm.org/PR31402 by replacing `map::__find_equal_key` with
`__tree::__find_equal`, which has already addressed the same undefined behavior.
Unfortunately I haven't been able to write a test case which causes the UBSAN
diagnostic mentioned in the bug report. I can write tests which exercise the UB
but for some reason they do not cause UBSAN to fail. Any help writing a test
case would be appreciated.
Reviewers: mclow.lists, vsk, EricWF
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D28131
Modified:
libcxx/trunk/include/__tree
libcxx/trunk/include/map
Modified: libcxx/trunk/include/__tree
URL:
http://llvm.org/viewvc/llvm-project/libcxx/trunk/include/__tree?rev=291087&r1=291086&r2=291087&view=diff
==
--- libcxx/trunk/include/__tree (original)
+++ libcxx/trunk/include/__tree Thu Jan 5 00:06:18 2017
@@ -1397,10 +1397,17 @@ private:
__node_base_pointer&
__find_leaf(const_iterator __hint,
__parent_pointer& __parent, const key_type& __v);
+// FIXME: Make this function const qualified. Unfortunetly doing so
+// breaks existing code which uses non-const callable comparators.
template
__node_base_pointer&
__find_equal(__parent_pointer& __parent, const _Key& __v);
template
+_LIBCPP_INLINE_VISIBILITY __node_base_pointer&
+__find_equal(__parent_pointer& __parent, const _Key& __v) const {
+ return const_cast<__tree*>(this)->__find_equal(__parent, __v);
+}
+template
__node_base_pointer&
__find_equal(const_iterator __hint, __parent_pointer& __parent,
__node_base_pointer& __dummy,
Modified: libcxx/trunk/include/map
URL:
http://llvm.org/viewvc/llvm-project/libcxx/trunk/include/map?rev=291087&r1=291086&r2=291087&view=diff
==
--- libcxx/trunk/include/map (original)
+++ libcxx/trunk/include/map Thu Jan 5 00:06:18 2017
@@ -533,7 +533,7 @@ public:
using _VSTD::swap;
swap(comp, __y.comp);
}
-
+
#if _LIBCPP_STD_VER > 11
template
_LIBCPP_INLINE_VISIBILITY
@@ -730,7 +730,7 @@ public:
friend _LIBCPP_INLINE_VISIBILITY
bool operator==(const __map_iterator& __x, const __map_iterator& __y)
{return __x.__i_ == __y.__i_;}
-friend
+friend
_LIBCPP_INLINE_VISIBILITY
bool operator!=(const __map_iterator& __x, const __map_iterator& __y)
{return __x.__i_ != __y.__i_;}
@@ -895,7 +895,7 @@ public:
#if _LIBCPP_STD_VER > 11
template
-_LIBCPP_INLINE_VISIBILITY
+_LIBCPP_INLINE_VISIBILITY
map(_InputIterator __f, _InputIterator __l, const allocator_type& __a)
: map(__f, __l, key_compare(), __a) {}
#endif
@@ -961,7 +961,7 @@ public:
}
#if _LIBCPP_STD_VER > 11
-_LIBCPP_INLINE_VISIBILITY
+_LIBCPP_INLINE_VISIBILITY
map(initializer_list __il, const allocator_type& __a)
: map(__il, key_compare(), __a) {}
#endif
@@ -1297,6 +1297,7 @@ private:
typedef typename __base::__node_allocator __node_allocator;
typedef typename __base::__node_pointer__node_pointer;
typedef typename __base::__node_base_pointer __node_base_pointer;
+typedef typename __base::__parent_pointer __parent_pointer;
typedef __map_node_destructor<__node_allocator> _Dp;
typedef unique_ptr<__node, _Dp> __node_holder;
@@ -1304,65 +1305,9 @@ private:
#ifdef _LIBCPP_CXX03_LANG
__node_holder __construct_node_with_key(const key_type& __k);
#endif
-
-__node_base_pointer const&
-__find_equal_key(__node_base_pointer& __parent, const key_type& __k) const;
-
-_LIBCPP_INLINE_VISIBILITY
-__node_base_pointer&
-__find_equal_key(__node_base_pointer& __parent, const key_type& __k) {
-map const* __const_this = this;
-return const_cast<__node_base_pointer&>(
-__const_this->__find_equal_key(__parent, __k));
-}
};
-// Find __k
-// Set __parent to parent of null leaf and
-//return reference to null leaf iv __k does not exist.
-// If __k exists, set parent to node of __k and return reference to node of __k
-template
-typename map<_Key, _Tp, _Compare, _Allocator>::__node_base_pointer const&
-map<_Key, _Tp, _Compare, _Allocator>::__find_equal_key(__node_base_pointer&
__parent,
- const key_type& __k)
const
-{
-__node_pointer __nd = __tree_.__root();
-if (__nd != nullptr)
-{
-while (true)
-{
-if (__tree_.value_comp().key_comp()(__k,
__nd->__value_.__cc.first))
-{
-if (__
[PATCH] D12644: Using -isysroot on Apple platform
EricWF resigned from this revision. EricWF removed a reviewer: EricWF. EricWF added a comment. I'm resigning as a reviewer. I suggested an alternative fix and explained why this fix wasn't correct in a comment above. Please re-add me as a reviewer if you disagree with my analysis. https://reviews.llvm.org/D12644 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D20660: Remove `auto_ptr` in C++17.
EricWF added inline comments. Comment at: include/memory:1962 +#if _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_NO_REMOVE_AUTOPTR) template I would love to have a semi-consistent naming scheme for macros which re-enable removed C++17 features. Maybe `_LIBCPP_ENABLE_REMOVED_CXX17_FOO`? I'l apply whatever naming scheme we decide on to the changes in D28172 Comment at: include/memory:2019 }; +#endif Comment on the `#endif`? Comment at: test/libcxx/depr/depr.auto.ptr/auto.ptr/auto_ptr.cxx1z.pass.cpp:20 +#define _LIBCPP_NO_REMOVE_AUTOPTR + +#include Please add `// MODULES_DEFINES: _LIBCPP_NO_REMOVE_AUTOPTR` Comment at: test/std/depr/depr.auto.ptr/auto.ptr/auto.ptr.cons/assignment.pass.cpp:16 +// XFAIL: c++1z + Please use `REQUIRES: c++98, c++03, c++11, c++14` instead of `XFAIL: c++1z` for two reasons: 1) The former is future proof to new standard dialects whereas the latter is not. 2) `XFAIL` should only be used on tests that fail due to a bug or missing compiler feature, not for tests which we expect to fail for well defined reasons. https://reviews.llvm.org/D20660 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D28343: [AVR] Fix register numbers for in getGCCAddlRegNames()
saaadhu added a comment. If you've added X, Y, Z and SP to GCCRegNames, you don't need AddlRegNames array at all, The reason I had them in AddlRegNames was to tell Clang that they alias regs in GCCRegNames. I followed X86TargetInfo's example - it has "ax" in GCCRegNames, and "al", "ah", "eax" and "rax" in AddlRegNames. I figured Clang could potentially use the fact that they alias when analyzing inline asm to detect unintended clobbers. https://reviews.llvm.org/D28343 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D28298: [OpenMP] Add fields for flags in the offload entry descriptor.
Hahnfeld added a subscriber: cfe-commits. Hahnfeld added a comment. Otherwise SGTM Comment at: lib/CodeGen/CGOpenMPRuntime.h:250-252 + // \brief Flags associated the device global. + int32_t Flags; + Is that intentionally not in the `protected` section below? https://reviews.llvm.org/D28298 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Re: [PATCH] D28343: [AVR] Fix register numbers for in getGCCAddlRegNames()
I see, that's a good idea. I'll revert r291083 and we can go forward with this patch. On Thu, Jan 5, 2017 at 8:05 PM, Senthil Kumar Selvaraj via Phabricator < revi...@reviews.llvm.org> wrote: > saaadhu added a comment. > > If you've added X, Y, Z and SP to GCCRegNames, you don't need AddlRegNames > array at all, > > The reason I had them in AddlRegNames was to tell Clang that they alias > regs in GCCRegNames. I followed X86TargetInfo's example - it has "ax" in > GCCRegNames, and "al", "ah", "eax" and "rax" in AddlRegNames. I figured > Clang could potentially use the fact that they alias when analyzing inline > asm to detect unintended clobbers. > > > https://reviews.llvm.org/D28343 > > > > ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
r291090 - [AVR] Revert the functional part of r291083
Author: dylanmckay Date: Thu Jan 5 01:17:46 2017 New Revision: 291090 URL: http://llvm.org/viewvc/llvm-project?rev=291090&view=rev Log: [AVR] Revert the functional part of r291083 As Senthil points out, this is unnecessary as we already have these registers in AddlRegNames. Modified: cfe/trunk/lib/Basic/Targets.cpp Modified: cfe/trunk/lib/Basic/Targets.cpp URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=291090&r1=291089&r2=291090&view=diff == --- cfe/trunk/lib/Basic/Targets.cpp (original) +++ cfe/trunk/lib/Basic/Targets.cpp Thu Jan 5 01:17:46 2017 @@ -8446,8 +8446,7 @@ public: "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", - "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", - "X","Y","Z","SP" + "r24", "r25", "X","Y","Z","SP" }; return llvm::makeArrayRef(GCCRegNames); } ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D28220: provide Win32 native threading
halyavin added inline comments. Comment at: include/__threading_support:474 + system_clock::time_point(duration_cast(duration)); + auto timeout_ms = duration_cast(abstime - system_clock::now()); + Since negative timeouts can't be avoided, we must make sure that timeout_ms.count() is at least zero. Comment at: include/__threading_support:476 + + _LIBCPP_ASSERT(timeout_ms.count() > INFINITE && "timeout duration overflow"); + if (!SleepConditionVariableSRW(__cv, __m, timeout_ms.count(), 0)) It is >= INFINITE. _LIBCPP_ASSERT has 2 arguments and supports error message out of the box. Repository: rL LLVM https://reviews.llvm.org/D28220 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
