[PATCH] D50321: AMDGPU: Add builtin for s_dcache_wb

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM


https://reviews.llvm.org/D50321



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[PATCH] D50320: AMDGPU: Add builtin for s_dcache_inv_vol

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM


https://reviews.llvm.org/D50320



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[PATCH] D50376: AMDGPU: Fix enabling denormals by default on pre-VI targets

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM


https://reviews.llvm.org/D50376



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[PATCH] D50493: AMDGPU: Add another missing builtin

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM


https://reviews.llvm.org/D50493



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[PATCH] D50843: AMDGPU: Correct errors in device table

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM


https://reviews.llvm.org/D50843



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[PATCH] D38698: AMDGPU: Add read_exec_lo/hi builtins

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM.


https://reviews.llvm.org/D38698



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[PATCH] D36802: AMDGPU: Cleanup most of the macros

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Need to only define canonical names.


https://reviews.llvm.org/D36802



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[PATCH] D43094: AMDGPU: Enable PIC by default for amdgcn

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
kzhuravl added reviewers: nhaehnle, t-tye, timcorringham, tpr, tstellar.
Herald added subscribers: dstuttard, yaxunl, wdng.

https://reviews.llvm.org/D43094

Files:
  lib/Driver/ToolChains/CommonArgs.cpp
  test/Driver/amdgcn-toolchain-pic.cl


Index: test/Driver/amdgcn-toolchain-pic.cl
===
--- test/Driver/amdgcn-toolchain-pic.cl
+++ test/Driver/amdgcn-toolchain-pic.cl
@@ -0,0 +1,7 @@
+// RUN: %clang -### -target amdgcn-- -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd- -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd-amdhsa -mcpu=gfx803 %s 2>&1 | FileCheck 
%s
+// RUN: %clang -### -target amdgcn-amd-amdpal -mcpu=gfx803 %s 2>&1 | FileCheck 
%s
+// RUN: %clang -### -target amdgcn-amd-mesa3d -mcpu=gfx803 %s 2>&1 | FileCheck 
%s
+
+// CHECK: clang{{.*}} "-mrelocation-model" "pic" "-pic-level" "1"
Index: lib/Driver/ToolChains/CommonArgs.cpp
===
--- lib/Driver/ToolChains/CommonArgs.cpp
+++ lib/Driver/ToolChains/CommonArgs.cpp
@@ -864,6 +864,10 @@
 }
   }
 
+  // AMDGPU-specific defaults for PIC.
+  if (Triple.getArch() == llvm::Triple::amdgcn)
+PIC = true;
+
   // The last argument relating to either PIC or PIE wins, and no
   // other argument is used. If the last argument is any flavor of the
   // '-fno-...' arguments, both PIC and PIE are disabled. Any PIE


Index: test/Driver/amdgcn-toolchain-pic.cl
===
--- test/Driver/amdgcn-toolchain-pic.cl
+++ test/Driver/amdgcn-toolchain-pic.cl
@@ -0,0 +1,7 @@
+// RUN: %clang -### -target amdgcn-- -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd- -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd-amdhsa -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd-amdpal -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd-mesa3d -mcpu=gfx803 %s 2>&1 | FileCheck %s
+
+// CHECK: clang{{.*}} "-mrelocation-model" "pic" "-pic-level" "1"
Index: lib/Driver/ToolChains/CommonArgs.cpp
===
--- lib/Driver/ToolChains/CommonArgs.cpp
+++ lib/Driver/ToolChains/CommonArgs.cpp
@@ -864,6 +864,10 @@
 }
   }
 
+  // AMDGPU-specific defaults for PIC.
+  if (Triple.getArch() == llvm::Triple::amdgcn)
+PIC = true;
+
   // The last argument relating to either PIC or PIE wins, and no
   // other argument is used. If the last argument is any flavor of the
   // '-fno-...' arguments, both PIC and PIE are disabled. Any PIE
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[PATCH] D43094: AMDGPU: Enable PIC by default for amdgcn

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

I thought we could override `isPICDefault` in AMDGPUToolChain instead of doing 
what is posted. But AMDGPUToolChain is only created for AMDHSA OS.

Do we want to enable PIC by default for all AMDGCNs? Or only for AMDHSA?


https://reviews.llvm.org/D43094



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[PATCH] D40045: AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was not accepted when it landed; it landed in state "Changes 
Planned".
This revision was automatically updated to reflect the committed changes.
kzhuravl marked an inline comment as done.
Closed by commit rL324714: AMDGPU/GCN: Bring processors in sync with 
AMDGPUUsage (authored by kzhuravl, committed by ).
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D40045?vs=122893&id=133568#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D40045

Files:
  cfe/trunk/lib/Basic/Targets/AMDGPU.h
  cfe/trunk/test/Driver/amdgpu-mcpu.cl

Index: cfe/trunk/lib/Basic/Targets/AMDGPU.h
===
--- cfe/trunk/lib/Basic/Targets/AMDGPU.h
+++ cfe/trunk/lib/Basic/Targets/AMDGPU.h
@@ -69,51 +69,65 @@
 AMDGPUTargetInfo::GPUKind Kind;
   };
 
-  static constexpr NameGPUKind R600Names[25] = {
+  static constexpr NameGPUKind R600Names[26] = {
   {{"r600"}, GK_R600},
-  {{"rv610"}, GK_R600},
-  {{"rv620"}, GK_R600},
   {{"rv630"}, GK_R600},
   {{"rv635"}, GK_R600},
+  {{"r630"}, GK_R600},
   {{"rs780"}, GK_R600},
   {{"rs880"}, GK_R600},
+  {{"rv610"}, GK_R600},
+  {{"rv620"}, GK_R600},
   {{"rv670"}, GK_R600_DOUBLE_OPS},
   {{"rv710"}, GK_R700},
   {{"rv730"}, GK_R700},
   {{"rv740"}, GK_R700_DOUBLE_OPS},
   {{"rv770"}, GK_R700_DOUBLE_OPS},
-  {{"palm"}, GK_EVERGREEN},
   {{"cedar"}, GK_EVERGREEN},
+  {{"palm"}, GK_EVERGREEN},
+  {{"cypress"}, GK_EVERGREEN_DOUBLE_OPS},
+  {{"hemlock"}, GK_EVERGREEN_DOUBLE_OPS},
+  {{"juniper"}, GK_EVERGREEN},
+  {{"redwood"}, GK_EVERGREEN},
   {{"sumo"}, GK_EVERGREEN},
   {{"sumo2"}, GK_EVERGREEN},
-  {{"redwood"}, GK_EVERGREEN},
-  {{"juniper"}, GK_EVERGREEN},
-  {{"hemlock"}, GK_EVERGREEN_DOUBLE_OPS},
-  {{"cypress"}, GK_EVERGREEN_DOUBLE_OPS},
   {{"barts"}, GK_NORTHERN_ISLANDS},
-  {{"turks"}, GK_NORTHERN_ISLANDS},
   {{"caicos"}, GK_NORTHERN_ISLANDS},
-  {{"cayman"}, GK_CAYMAN},
+  {{"turks"}, GK_NORTHERN_ISLANDS},
   {{"aruba"}, GK_CAYMAN},
+  {{"cayman"}, GK_CAYMAN},
   };
-  static constexpr NameGPUKind AMDGCNNames[33] = {
-  {{"gfx600"}, GK_GFX6},{{"tahiti"}, GK_GFX6},
-  {{"gfx601"}, GK_GFX6},{{"pitcairn"}, GK_GFX6},
-  {{"verde"}, GK_GFX6}, {{"oland"}, GK_GFX6},
-  {{"hainan"}, GK_GFX6},{{"gfx700"}, GK_GFX7},
-  {{"bonaire"}, GK_GFX7},   {{"kaveri"}, GK_GFX7},
-  {{"gfx701"}, GK_GFX7},{{"hawaii"}, GK_GFX7},
-  {{"gfx702"}, GK_GFX7},{{"gfx703"}, GK_GFX7},
-  {{"kabini"}, GK_GFX7},{{"mullins"}, GK_GFX7},
-  {{"gfx800"}, GK_GFX8},{{"iceland"}, GK_GFX8},
-  {{"gfx801"}, GK_GFX8},{{"carrizo"}, GK_GFX8},
-  {{"gfx802"}, GK_GFX8},{{"tonga"}, GK_GFX8},
-  {{"gfx803"}, GK_GFX8},{{"fiji"}, GK_GFX8},
-  {{"polaris10"}, GK_GFX8}, {{"polaris11"}, GK_GFX8},
-  {{"gfx804"}, GK_GFX8},{{"gfx810"}, GK_GFX8},
-  {{"stoney"}, GK_GFX8},{{"gfx900"}, GK_GFX9},
-  {{"gfx901"}, GK_GFX9},{{"gfx902"}, GK_GFX9},
-  {{"gfx903"}, GK_GFX9},
+  static constexpr NameGPUKind AMDGCNNames[30] = {
+  {{"gfx600"}, GK_GFX6},
+  {{"tahiti"}, GK_GFX6},
+  {{"gfx601"}, GK_GFX6},
+  {{"hainan"}, GK_GFX6},
+  {{"oland"}, GK_GFX6},
+  {{"pitcairn"}, GK_GFX6},
+  {{"verde"}, GK_GFX6},
+  {{"gfx700"}, GK_GFX7},
+  {{"kaveri"}, GK_GFX7},
+  {{"gfx701"}, GK_GFX7},
+  {{"hawaii"}, GK_GFX7},
+  {{"gfx702"}, GK_GFX7},
+  {{"gfx703"}, GK_GFX7},
+  {{"kabini"}, GK_GFX7},
+  {{"mullins"}, GK_GFX7},
+  {{"gfx704"}, GK_GFX7},
+  {{"bonaire"}, GK_GFX7},
+  {{"gfx801"}, GK_GFX8},
+  {{"carrizo"}, GK_GFX8},
+  {{"gfx802"}, GK_GFX8},
+  {{"iceland"}, GK_GFX8},
+  {{"tonga"}, GK_GFX8},
+  {{"gfx803"}, GK_GFX8},
+  {{"fiji"}, GK_GFX8},
+  {{"polaris10"}, GK_GFX8},
+  {{"polaris11"}, GK_GFX8},
+  {{"gfx810"}, GK_GFX8},
+  {{"stoney"}, GK_GFX8},
+  {{"gfx900"}, GK_GFX9},
+  {{"gfx902"}, GK_GFX9},
   };
 
   bool hasFP64 : 1;
Index: cfe/trunk/test/Driver/amdgpu-mcpu.cl
===
--- cfe/trunk/test/Driver/amdgpu-mcpu.cl
+++ cfe/trunk/test/Driver/amdgpu-mcpu.cl
@@ -1,112 +1,115 @@
-t// Check that -mcpu works for all supported GPUs
+// Check that -mcpu works for all supported GPUs.
 
-// RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=r600 %s -o - 2>&1 | FileCheck --check-prefix=R600-CHECK %s
-// RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv630 %s -o - 2>&1 | FileCheck --check-prefix=R600-CHECK %s
-// RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv635 %s -o - 2>&1 | FileCheck --check-prefix=R600-CHECK %s
-// RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv610 %s -o - 2>&1 | FileCheck --check-prefix=RS880-CHECK %s
-// RUN: %clang -### -target r600 -x cl -S -emit-

[PATCH] D40045: AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

In https://reviews.llvm.org/D40045#925400, @t-tye wrote:

> LGTM except for Bonaire.


Done. Also removed gfx800 as per latest docs.


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https://reviews.llvm.org/D40045



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[PATCH] D36802: AMDGPU: Cleanup most of the macros

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl updated this revision to Diff 133569.
kzhuravl added a comment.

Define only canonical names.


https://reviews.llvm.org/D36802

Files:
  lib/Basic/Targets/AMDGPU.cpp
  lib/Basic/Targets/AMDGPU.h
  test/Driver/amdgpu-macros.cl

Index: test/Driver/amdgpu-macros.cl
===
--- test/Driver/amdgpu-macros.cl
+++ test/Driver/amdgpu-macros.cl
@@ -0,0 +1,136 @@
+// Check that appropriate macros are defined for every supported AMDGPU
+// "-target" and "-mcpu" options.
+
+//
+// R600-based processors.
+//
+
+// RUN: %clang -E -dM -target r600 -mcpu=r600 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R600 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv630 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R600 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv635 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R600 %s
+// RUN: %clang -E -dM -target r600 -mcpu=r630 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R630 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rs780 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rs880 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv610 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv620 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv670 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV670 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv710 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV710 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv730 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV730 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv740 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV770 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv770 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV770 %s
+// RUN: %clang -E -dM -target r600 -mcpu=cedar %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CEDAR %s
+// RUN: %clang -E -dM -target r600 -mcpu=palm %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CEDAR %s
+// RUN: %clang -E -dM -target r600 -mcpu=cypress %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CYPRESS %s
+// RUN: %clang -E -dM -target r600 -mcpu=hemlock %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CYPRESS %s
+// RUN: %clang -E -dM -target r600 -mcpu=juniper %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,JUNIPER %s
+// RUN: %clang -E -dM -target r600 -mcpu=redwood %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,REDWOOD %s
+// RUN: %clang -E -dM -target r600 -mcpu=sumo %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,SUMO %s
+// RUN: %clang -E -dM -target r600 -mcpu=sumo2 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,SUMO %s
+// RUN: %clang -E -dM -target r600 -mcpu=barts %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,BARTS %s
+// RUN: %clang -E -dM -target r600 -mcpu=caicos %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CAICOS %s
+// RUN: %clang -E -dM -target r600 -mcpu=turks %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,TURKS %s
+// RUN: %clang -E -dM -target r600 -mcpu=aruba %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CAYMAN %s
+// RUN: %clang -E -dM -target r600 -mcpu=cayman %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CAYMAN %s
+
+// ARCH-R600-DAG: #define __AMD__ 1
+// ARCH-R600-DAG: #define __AMDGPU__ 1
+// ARCH-R600-DAG: #define __R600__ 1
+
+// R600:#define __r600 1
+// R600:#define __r600__ 1
+// R630:#define __r630 1
+// R630:#define __r630__ 1
+// RS880:   #define __rs880 1
+// RS880:   #define __rs880__ 1
+// RV670:   #define __rv670 1
+// RV670:   #define __rv670__ 1
+// RV710:   #define __rv710 1
+// RV710:   #define __rv710__ 1
+// RV730:   #define __rv730 1
+// RV730:   #define __rv730__ 1
+// RV770:   #define __rv770 1
+// RV770:   #define __rv770__ 1
+// CEDAR:   #define __cedar 1
+// CEDAR:   #define __cedar__ 1
+// CYPRESS: #define __cypress 1
+// CYPRESS: #define __cypress__ 1
+// JUNIPER: #define __juniper 1
+// JUNIPER: #define __juniper__ 1
+// REDWOOD: #define __redwood 1
+// REDWOOD: #define __redwood__ 1
+// SUMO:#define __sumo 1
+// SUMO:#define __sumo__ 1
+// BARTS:   #define __barts 1
+// BARTS:   #define __barts__ 1
+// CAICOS:  #define __caicos 1
+// CAICOS:  #define __caicos__ 1
+// TURKS:   #define __turks 1
+// TURKS:   #define __turks__ 1
+// CAYMAN:  #define __cayman 1
+// CAYMAN:  #define __cayman__ 1
+
+//
+// AMDGCN-based processors.
+//
+
+// RUN: %clang -E -dM -target amdgcn -mcpu=gfx600 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX600 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX600 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=gfx601 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=hainan %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=oland %s 2>&1 | FileCheck --check-prefixes=ARC

[PATCH] D36802: AMDGPU: Cleanup most of the macros

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Ping.


https://reviews.llvm.org/D36802



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[PATCH] D43094: AMDGPU: Enable PIC by default for amdgcn

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Ping.


https://reviews.llvm.org/D43094



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[PATCH] D36802: AMDGPU: Cleanup most of the macros

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl updated this revision to Diff 134335.
kzhuravl edited the summary of this revision.
kzhuravl added a comment.

Address review feedback.


https://reviews.llvm.org/D36802

Files:
  lib/Basic/Targets/AMDGPU.cpp
  lib/Basic/Targets/AMDGPU.h
  test/Driver/amdgpu-macros.cl

Index: test/Driver/amdgpu-macros.cl
===
--- test/Driver/amdgpu-macros.cl
+++ test/Driver/amdgpu-macros.cl
@@ -0,0 +1,107 @@
+// Check that appropriate macros are defined for every supported AMDGPU
+// "-target" and "-mcpu" options.
+
+//
+// R600-based processors.
+//
+
+// RUN: %clang -E -dM -target r600 -mcpu=r600 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R600 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv630 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R600 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv635 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R600 %s
+// RUN: %clang -E -dM -target r600 -mcpu=r630 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R630 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rs780 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rs880 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv610 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv620 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv670 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV670 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv710 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV710 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv730 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV730 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv740 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV770 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv770 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV770 %s
+// RUN: %clang -E -dM -target r600 -mcpu=cedar %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CEDAR %s
+// RUN: %clang -E -dM -target r600 -mcpu=palm %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CEDAR %s
+// RUN: %clang -E -dM -target r600 -mcpu=cypress %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CYPRESS %s
+// RUN: %clang -E -dM -target r600 -mcpu=hemlock %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CYPRESS %s
+// RUN: %clang -E -dM -target r600 -mcpu=juniper %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,JUNIPER %s
+// RUN: %clang -E -dM -target r600 -mcpu=redwood %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,REDWOOD %s
+// RUN: %clang -E -dM -target r600 -mcpu=sumo %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,SUMO %s
+// RUN: %clang -E -dM -target r600 -mcpu=sumo2 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,SUMO %s
+// RUN: %clang -E -dM -target r600 -mcpu=barts %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,BARTS %s
+// RUN: %clang -E -dM -target r600 -mcpu=caicos %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CAICOS %s
+// RUN: %clang -E -dM -target r600 -mcpu=turks %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,TURKS %s
+// RUN: %clang -E -dM -target r600 -mcpu=aruba %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CAYMAN %s
+// RUN: %clang -E -dM -target r600 -mcpu=cayman %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CAYMAN %s
+
+// ARCH-R600-DAG: #define __AMD__ 1
+// ARCH-R600-DAG: #define __AMDGPU__ 1
+// ARCH-R600-DAG: #define __R600__ 1
+
+// R600:#define __r600__ 1
+// R630:#define __r630__ 1
+// RS880:   #define __rs880__ 1
+// RV670:   #define __rv670__ 1
+// RV710:   #define __rv710__ 1
+// RV730:   #define __rv730__ 1
+// RV770:   #define __rv770__ 1
+// CEDAR:   #define __cedar__ 1
+// CYPRESS: #define __cypress__ 1
+// JUNIPER: #define __juniper__ 1
+// REDWOOD: #define __redwood__ 1
+// SUMO:#define __sumo__ 1
+// BARTS:   #define __barts__ 1
+// CAICOS:  #define __caicos__ 1
+// TURKS:   #define __turks__ 1
+// CAYMAN:  #define __cayman__ 1
+
+//
+// AMDGCN-based processors.
+//
+
+// RUN: %clang -E -dM -target amdgcn -mcpu=gfx600 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX600 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX600 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=gfx601 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=hainan %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=oland %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=pitcairn %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=verde %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=gfx700 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX700 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=kaveri %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX700 %s
+// RUN: %clan

[PATCH] D36802: AMDGPU: Cleanup most of the macros

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL325193: AMDGPU: Cleanup most of the macros (authored by 
kzhuravl, committed by ).
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D36802?vs=134335&id=134336#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D36802

Files:
  cfe/trunk/lib/Basic/Targets/AMDGPU.cpp
  cfe/trunk/lib/Basic/Targets/AMDGPU.h
  cfe/trunk/test/Driver/amdgpu-macros.cl

Index: cfe/trunk/test/Driver/amdgpu-macros.cl
===
--- cfe/trunk/test/Driver/amdgpu-macros.cl
+++ cfe/trunk/test/Driver/amdgpu-macros.cl
@@ -0,0 +1,107 @@
+// Check that appropriate macros are defined for every supported AMDGPU
+// "-target" and "-mcpu" options.
+
+//
+// R600-based processors.
+//
+
+// RUN: %clang -E -dM -target r600 -mcpu=r600 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R600 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv630 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R600 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv635 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R600 %s
+// RUN: %clang -E -dM -target r600 -mcpu=r630 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,R630 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rs780 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rs880 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv610 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv620 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RS880 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv670 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV670 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv710 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV710 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv730 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV730 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv740 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV770 %s
+// RUN: %clang -E -dM -target r600 -mcpu=rv770 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,RV770 %s
+// RUN: %clang -E -dM -target r600 -mcpu=cedar %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CEDAR %s
+// RUN: %clang -E -dM -target r600 -mcpu=palm %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CEDAR %s
+// RUN: %clang -E -dM -target r600 -mcpu=cypress %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CYPRESS %s
+// RUN: %clang -E -dM -target r600 -mcpu=hemlock %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CYPRESS %s
+// RUN: %clang -E -dM -target r600 -mcpu=juniper %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,JUNIPER %s
+// RUN: %clang -E -dM -target r600 -mcpu=redwood %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,REDWOOD %s
+// RUN: %clang -E -dM -target r600 -mcpu=sumo %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,SUMO %s
+// RUN: %clang -E -dM -target r600 -mcpu=sumo2 %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,SUMO %s
+// RUN: %clang -E -dM -target r600 -mcpu=barts %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,BARTS %s
+// RUN: %clang -E -dM -target r600 -mcpu=caicos %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CAICOS %s
+// RUN: %clang -E -dM -target r600 -mcpu=turks %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,TURKS %s
+// RUN: %clang -E -dM -target r600 -mcpu=aruba %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CAYMAN %s
+// RUN: %clang -E -dM -target r600 -mcpu=cayman %s 2>&1 | FileCheck --check-prefixes=ARCH-R600,CAYMAN %s
+
+// ARCH-R600-DAG: #define __AMD__ 1
+// ARCH-R600-DAG: #define __AMDGPU__ 1
+// ARCH-R600-DAG: #define __R600__ 1
+
+// R600:#define __r600__ 1
+// R630:#define __r630__ 1
+// RS880:   #define __rs880__ 1
+// RV670:   #define __rv670__ 1
+// RV710:   #define __rv710__ 1
+// RV730:   #define __rv730__ 1
+// RV770:   #define __rv770__ 1
+// CEDAR:   #define __cedar__ 1
+// CYPRESS: #define __cypress__ 1
+// JUNIPER: #define __juniper__ 1
+// REDWOOD: #define __redwood__ 1
+// SUMO:#define __sumo__ 1
+// BARTS:   #define __barts__ 1
+// CAICOS:  #define __caicos__ 1
+// TURKS:   #define __turks__ 1
+// CAYMAN:  #define __cayman__ 1
+
+//
+// AMDGCN-based processors.
+//
+
+// RUN: %clang -E -dM -target amdgcn -mcpu=gfx600 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX600 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX600 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=gfx601 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=hainan %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=oland %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=pitcairn %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,GFX601 %s
+// RUN: %clang -E -dM -target amdgcn -mcpu=verde %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,

[PATCH] D43094: AMDGPU: Enable PIC by default for amdgcn

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL325196: AMDGPU: Enable PIC by default for amdgcn (authored 
by kzhuravl, committed by ).
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D43094?vs=133520&id=134342#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D43094

Files:
  cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
  cfe/trunk/test/Driver/amdgcn-toolchain-pic.cl


Index: cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
===
--- cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
+++ cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
@@ -864,6 +864,10 @@
 }
   }
 
+  // AMDGPU-specific defaults for PIC.
+  if (Triple.getArch() == llvm::Triple::amdgcn)
+PIC = true;
+
   // The last argument relating to either PIC or PIE wins, and no
   // other argument is used. If the last argument is any flavor of the
   // '-fno-...' arguments, both PIC and PIE are disabled. Any PIE
Index: cfe/trunk/test/Driver/amdgcn-toolchain-pic.cl
===
--- cfe/trunk/test/Driver/amdgcn-toolchain-pic.cl
+++ cfe/trunk/test/Driver/amdgcn-toolchain-pic.cl
@@ -0,0 +1,7 @@
+// RUN: %clang -### -target amdgcn-- -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd- -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd-amdhsa -mcpu=gfx803 %s 2>&1 | FileCheck 
%s
+// RUN: %clang -### -target amdgcn-amd-amdpal -mcpu=gfx803 %s 2>&1 | FileCheck 
%s
+// RUN: %clang -### -target amdgcn-amd-mesa3d -mcpu=gfx803 %s 2>&1 | FileCheck 
%s
+
+// CHECK: clang{{.*}} "-mrelocation-model" "pic" "-pic-level" "1"


Index: cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
===
--- cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
+++ cfe/trunk/lib/Driver/ToolChains/CommonArgs.cpp
@@ -864,6 +864,10 @@
 }
   }
 
+  // AMDGPU-specific defaults for PIC.
+  if (Triple.getArch() == llvm::Triple::amdgcn)
+PIC = true;
+
   // The last argument relating to either PIC or PIE wins, and no
   // other argument is used. If the last argument is any flavor of the
   // '-fno-...' arguments, both PIC and PIE are disabled. Any PIE
Index: cfe/trunk/test/Driver/amdgcn-toolchain-pic.cl
===
--- cfe/trunk/test/Driver/amdgcn-toolchain-pic.cl
+++ cfe/trunk/test/Driver/amdgcn-toolchain-pic.cl
@@ -0,0 +1,7 @@
+// RUN: %clang -### -target amdgcn-- -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd- -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd-amdhsa -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd-amdpal -mcpu=gfx803 %s 2>&1 | FileCheck %s
+// RUN: %clang -### -target amdgcn-amd-mesa3d -mcpu=gfx803 %s 2>&1 | FileCheck %s
+
+// CHECK: clang{{.*}} "-mrelocation-model" "pic" "-pic-level" "1"
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[PATCH] D53325: Disable code object version 3 for HIP toolchain

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM


https://reviews.llvm.org/D53325



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[PATCH] D53558: Add gfx909 to GPU Arch

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Are changes for 
https://github.com/llvm-mirror/clang/blob/master/lib/Basic/Targets/AMDGPU.cpp#L137
 in a separate review? (I could not locate it).


Repository:
  rC Clang

https://reviews.llvm.org/D53558



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[PATCH] D53558: Add gfx909 to GPU Arch

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

In https://reviews.llvm.org/D53558#1272673, @kzhuravl wrote:

> Are changes for 
> https://github.com/llvm-mirror/clang/blob/master/lib/Basic/Targets/AMDGPU.cpp#L137
>  in a separate review? (I could not locate it).


https://reviews.llvm.org/rC345181


Repository:
  rC Clang

https://reviews.llvm.org/D53558



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[PATCH] D53223: AMDGPU: Add sram-ecc feature options

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

ping


https://reviews.llvm.org/D53223



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[PATCH] D53223: AMDGPU: Add sram-ecc feature options

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

ping


https://reviews.llvm.org/D53223



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[PATCH] D53223: AMDGPU: Add sram-ecc feature options

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rC346178: AMDGPU: Add sram-ecc feature options (authored by 
kzhuravl, committed by ).

Repository:
  rL LLVM

https://reviews.llvm.org/D53223

Files:
  include/clang/Driver/Options.td
  test/Driver/amdgpu-features.c


Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -2104,6 +2104,10 @@
   HelpText<"Enable XNACK (AMDGPU only)">;
 def mno_xnack : Flag<["-"], "mno-xnack">, Group,
   HelpText<"Disable XNACK (AMDGPU only)">;
+def msram_ecc : Flag<["-"], "msram-ecc">, Group,
+  HelpText<"Enable SRAM ECC (AMDGPU only)">;
+def mno_sram_ecc : Flag<["-"], "mno-sram-ecc">, Group,
+  HelpText<"Disable SRAM ECC (AMDGPU only)">;
 
 def faltivec : Flag<["-"], "faltivec">, Group, Flags<[DriverOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, 
Flags<[DriverOption]>;
Index: test/Driver/amdgpu-features.c
===
--- test/Driver/amdgpu-features.c
+++ test/Driver/amdgpu-features.c
@@ -17,3 +17,9 @@
 
 // RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-xnack %s 2>&1 | FileCheck 
--check-prefix=NO-XNACK %s
 // NO-XNACK: "-target-feature" "-xnack"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -msram-ecc %s 2>&1 | FileCheck 
--check-prefix=SRAM-ECC %s
+// SRAM-ECC: "-target-feature" "+sram-ecc"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-sram-ecc %s 2>&1 | 
FileCheck --check-prefix=NO-SRAM-ECC %s
+// NO-SRAM-ECC: "-target-feature" "-sram-ecc"


Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -2104,6 +2104,10 @@
   HelpText<"Enable XNACK (AMDGPU only)">;
 def mno_xnack : Flag<["-"], "mno-xnack">, Group,
   HelpText<"Disable XNACK (AMDGPU only)">;
+def msram_ecc : Flag<["-"], "msram-ecc">, Group,
+  HelpText<"Enable SRAM ECC (AMDGPU only)">;
+def mno_sram_ecc : Flag<["-"], "mno-sram-ecc">, Group,
+  HelpText<"Disable SRAM ECC (AMDGPU only)">;
 
 def faltivec : Flag<["-"], "faltivec">, Group, Flags<[DriverOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, Flags<[DriverOption]>;
Index: test/Driver/amdgpu-features.c
===
--- test/Driver/amdgpu-features.c
+++ test/Driver/amdgpu-features.c
@@ -17,3 +17,9 @@
 
 // RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-xnack %s 2>&1 | FileCheck --check-prefix=NO-XNACK %s
 // NO-XNACK: "-target-feature" "-xnack"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -msram-ecc %s 2>&1 | FileCheck --check-prefix=SRAM-ECC %s
+// SRAM-ECC: "-target-feature" "+sram-ecc"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-sram-ecc %s 2>&1 | FileCheck --check-prefix=NO-SRAM-ECC %s
+// NO-SRAM-ECC: "-target-feature" "-sram-ecc"
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[PATCH] D53223: AMDGPU: Add sram-ecc feature options

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL346178: AMDGPU: Add sram-ecc feature options (authored by 
kzhuravl, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D53223?vs=169499&id=172665#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D53223

Files:
  cfe/trunk/include/clang/Driver/Options.td
  cfe/trunk/test/Driver/amdgpu-features.c


Index: cfe/trunk/include/clang/Driver/Options.td
===
--- cfe/trunk/include/clang/Driver/Options.td
+++ cfe/trunk/include/clang/Driver/Options.td
@@ -2104,6 +2104,10 @@
   HelpText<"Enable XNACK (AMDGPU only)">;
 def mno_xnack : Flag<["-"], "mno-xnack">, Group,
   HelpText<"Disable XNACK (AMDGPU only)">;
+def msram_ecc : Flag<["-"], "msram-ecc">, Group,
+  HelpText<"Enable SRAM ECC (AMDGPU only)">;
+def mno_sram_ecc : Flag<["-"], "mno-sram-ecc">, Group,
+  HelpText<"Disable SRAM ECC (AMDGPU only)">;
 
 def faltivec : Flag<["-"], "faltivec">, Group, Flags<[DriverOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, 
Flags<[DriverOption]>;
Index: cfe/trunk/test/Driver/amdgpu-features.c
===
--- cfe/trunk/test/Driver/amdgpu-features.c
+++ cfe/trunk/test/Driver/amdgpu-features.c
@@ -17,3 +17,9 @@
 
 // RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-xnack %s 2>&1 | FileCheck 
--check-prefix=NO-XNACK %s
 // NO-XNACK: "-target-feature" "-xnack"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -msram-ecc %s 2>&1 | FileCheck 
--check-prefix=SRAM-ECC %s
+// SRAM-ECC: "-target-feature" "+sram-ecc"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-sram-ecc %s 2>&1 | 
FileCheck --check-prefix=NO-SRAM-ECC %s
+// NO-SRAM-ECC: "-target-feature" "-sram-ecc"


Index: cfe/trunk/include/clang/Driver/Options.td
===
--- cfe/trunk/include/clang/Driver/Options.td
+++ cfe/trunk/include/clang/Driver/Options.td
@@ -2104,6 +2104,10 @@
   HelpText<"Enable XNACK (AMDGPU only)">;
 def mno_xnack : Flag<["-"], "mno-xnack">, Group,
   HelpText<"Disable XNACK (AMDGPU only)">;
+def msram_ecc : Flag<["-"], "msram-ecc">, Group,
+  HelpText<"Enable SRAM ECC (AMDGPU only)">;
+def mno_sram_ecc : Flag<["-"], "mno-sram-ecc">, Group,
+  HelpText<"Disable SRAM ECC (AMDGPU only)">;
 
 def faltivec : Flag<["-"], "faltivec">, Group, Flags<[DriverOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, Flags<[DriverOption]>;
Index: cfe/trunk/test/Driver/amdgpu-features.c
===
--- cfe/trunk/test/Driver/amdgpu-features.c
+++ cfe/trunk/test/Driver/amdgpu-features.c
@@ -17,3 +17,9 @@
 
 // RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-xnack %s 2>&1 | FileCheck --check-prefix=NO-XNACK %s
 // NO-XNACK: "-target-feature" "-xnack"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -msram-ecc %s 2>&1 | FileCheck --check-prefix=SRAM-ECC %s
+// SRAM-ECC: "-target-feature" "+sram-ecc"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-sram-ecc %s 2>&1 | FileCheck --check-prefix=NO-SRAM-ECC %s
+// NO-SRAM-ECC: "-target-feature" "-sram-ecc"
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[PATCH] D58847: AMDGPU: Fix the mapping of sub group sync scope

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
kzhuravl added reviewers: b-sumner, rampitec, t-tye.
Herald added subscribers: jfb, tpr, dstuttard, yaxunl, wdng.

Map memory_scope_sub_group to "wavefront" sync scope


https://reviews.llvm.org/D58847

Files:
  lib/CodeGen/TargetInfo.cpp
  test/CodeGenOpenCL/atomic-ops.cl


Index: test/CodeGenOpenCL/atomic-ops.cl
===
--- test/CodeGenOpenCL/atomic-ops.cl
+++ test/CodeGenOpenCL/atomic-ops.cl
@@ -41,7 +41,7 @@
   // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} seq_cst
   x = __opencl_atomic_load(i, memory_order_seq_cst, 
memory_scope_all_svm_devices);
 
-  // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} syncscope("subgroup") 
seq_cst
+  // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} syncscope("wavefront") 
seq_cst
   x = __opencl_atomic_load(i, memory_order_seq_cst, memory_scope_sub_group);
 }
 
@@ -109,7 +109,7 @@
   // CHECK: load atomic i32, i32* %{{.*}} seq_cst
   // CHECK: br label %[[continue]]
   // CHECK: [[opencl_subgroup]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") seq_cst
   // CHECK: br label %[[continue]]
   // CHECK: [[continue]]:
   int x = __opencl_atomic_load(i, memory_order_seq_cst, scope);
@@ -147,7 +147,7 @@
   // CHECK: [[MON_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} monotonic
   // CHECK: [[MON_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") monotonic
   // CHECK: [[ACQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") acquire
   // CHECK: [[ACQ_DEV]]:
@@ -155,7 +155,7 @@
   // CHECK: [[ACQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} acquire
   // CHECK: [[ACQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") acquire
   // CHECK: [[SEQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") seq_cst
   // CHECK: [[SEQ_DEV]]:
@@ -163,7 +163,7 @@
   // CHECK: [[SEQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} seq_cst
   // CHECK: [[SEQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") seq_cst
   int x = __opencl_atomic_load(i, order, scope);
 }
 
Index: lib/CodeGen/TargetInfo.cpp
===
--- lib/CodeGen/TargetInfo.cpp
+++ lib/CodeGen/TargetInfo.cpp
@@ -7959,7 +7959,7 @@
 Name = "";
 break;
   case SyncScope::OpenCLSubGroup:
-Name = "subgroup";
+Name = "wavefront";
   }
   return C.getOrInsertSyncScopeID(Name);
 }


Index: test/CodeGenOpenCL/atomic-ops.cl
===
--- test/CodeGenOpenCL/atomic-ops.cl
+++ test/CodeGenOpenCL/atomic-ops.cl
@@ -41,7 +41,7 @@
   // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} seq_cst
   x = __opencl_atomic_load(i, memory_order_seq_cst, memory_scope_all_svm_devices);
 
-  // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} syncscope("wavefront") seq_cst
   x = __opencl_atomic_load(i, memory_order_seq_cst, memory_scope_sub_group);
 }
 
@@ -109,7 +109,7 @@
   // CHECK: load atomic i32, i32* %{{.*}} seq_cst
   // CHECK: br label %[[continue]]
   // CHECK: [[opencl_subgroup]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") seq_cst
   // CHECK: br label %[[continue]]
   // CHECK: [[continue]]:
   int x = __opencl_atomic_load(i, memory_order_seq_cst, scope);
@@ -147,7 +147,7 @@
   // CHECK: [[MON_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} monotonic
   // CHECK: [[MON_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") monotonic
   // CHECK: [[ACQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") acquire
   // CHECK: [[ACQ_DEV]]:
@@ -155,7 +155,7 @@
   // CHECK: [[ACQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} acquire
   // CHECK: [[ACQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") acquire
   // CHECK: [[SEQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") seq_cst
   // CHECK: [[SEQ_DEV]]:
@@ -163,7 +163,7 @@
   // CHECK: [[SEQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} seq_cst
   // CHECK: [[SEQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") seq_cst
   int x = __opencl_atomic_load(i, order, scope);
 }
 
Index: lib/CodeGen/TargetInfo.cpp

[PATCH] D58847: AMDGPU: Fix the mapping of sub group sync scope

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rC355549: AMDGPU: Fix the mapping of sub group sync scope 
(authored by kzhuravl, committed by ).
Herald added a project: clang.

Repository:
  rC Clang

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D58847/new/

https://reviews.llvm.org/D58847

Files:
  lib/CodeGen/TargetInfo.cpp
  test/CodeGenOpenCL/atomic-ops.cl


Index: test/CodeGenOpenCL/atomic-ops.cl
===
--- test/CodeGenOpenCL/atomic-ops.cl
+++ test/CodeGenOpenCL/atomic-ops.cl
@@ -41,7 +41,7 @@
   // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} seq_cst
   x = __opencl_atomic_load(i, memory_order_seq_cst, 
memory_scope_all_svm_devices);
 
-  // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} syncscope("subgroup") 
seq_cst
+  // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} syncscope("wavefront") 
seq_cst
   x = __opencl_atomic_load(i, memory_order_seq_cst, memory_scope_sub_group);
 }
 
@@ -109,7 +109,7 @@
   // CHECK: load atomic i32, i32* %{{.*}} seq_cst
   // CHECK: br label %[[continue]]
   // CHECK: [[opencl_subgroup]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") seq_cst
   // CHECK: br label %[[continue]]
   // CHECK: [[continue]]:
   int x = __opencl_atomic_load(i, memory_order_seq_cst, scope);
@@ -147,7 +147,7 @@
   // CHECK: [[MON_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} monotonic
   // CHECK: [[MON_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") monotonic
   // CHECK: [[ACQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") acquire
   // CHECK: [[ACQ_DEV]]:
@@ -155,7 +155,7 @@
   // CHECK: [[ACQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} acquire
   // CHECK: [[ACQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") acquire
   // CHECK: [[SEQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") seq_cst
   // CHECK: [[SEQ_DEV]]:
@@ -163,7 +163,7 @@
   // CHECK: [[SEQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} seq_cst
   // CHECK: [[SEQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") seq_cst
   int x = __opencl_atomic_load(i, order, scope);
 }
 
Index: lib/CodeGen/TargetInfo.cpp
===
--- lib/CodeGen/TargetInfo.cpp
+++ lib/CodeGen/TargetInfo.cpp
@@ -7959,7 +7959,7 @@
 Name = "";
 break;
   case SyncScope::OpenCLSubGroup:
-Name = "subgroup";
+Name = "wavefront";
   }
   return C.getOrInsertSyncScopeID(Name);
 }


Index: test/CodeGenOpenCL/atomic-ops.cl
===
--- test/CodeGenOpenCL/atomic-ops.cl
+++ test/CodeGenOpenCL/atomic-ops.cl
@@ -41,7 +41,7 @@
   // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} seq_cst
   x = __opencl_atomic_load(i, memory_order_seq_cst, memory_scope_all_svm_devices);
 
-  // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{[.0-9A-Z_a-z]+}} syncscope("wavefront") seq_cst
   x = __opencl_atomic_load(i, memory_order_seq_cst, memory_scope_sub_group);
 }
 
@@ -109,7 +109,7 @@
   // CHECK: load atomic i32, i32* %{{.*}} seq_cst
   // CHECK: br label %[[continue]]
   // CHECK: [[opencl_subgroup]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") seq_cst
   // CHECK: br label %[[continue]]
   // CHECK: [[continue]]:
   int x = __opencl_atomic_load(i, memory_order_seq_cst, scope);
@@ -147,7 +147,7 @@
   // CHECK: [[MON_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} monotonic
   // CHECK: [[MON_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") monotonic
   // CHECK: [[ACQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") acquire
   // CHECK: [[ACQ_DEV]]:
@@ -155,7 +155,7 @@
   // CHECK: [[ACQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} acquire
   // CHECK: [[ACQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") acquire
   // CHECK: [[SEQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") seq_cst
   // CHECK: [[SEQ_DEV]]:
@@ -163,7 +163,7 @@
   // CHECK: [[SEQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} seq_cst
   // CHECK: [[SEQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("subgroup") seq_cst
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") seq_cst
   i

[PATCH] D59494: AMDGPU: Add support for cross address space synchronization scopes

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Backend change will be posted later today. I am currently working on adding 
backend tests.


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  https://reviews.llvm.org/D59494/new/

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[PATCH] D59494: AMDGPU: Add support for cross address space synchronization scopes

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
kzhuravl added reviewers: b-sumner, rampitec, t-tye.
Herald added subscribers: jfb, tpr, dstuttard, yaxunl, wdng.
kzhuravl added a comment.

Backend change will be posted later today. I am currently working on adding 
backend tests.


https://reviews.llvm.org/D59494

Files:
  lib/CodeGen/CGAtomic.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/CodeGen/TargetInfo.h
  test/CodeGenOpenCL/atomic-ops.cl

Index: test/CodeGenOpenCL/atomic-ops.cl
===
--- test/CodeGenOpenCL/atomic-ops.cl
+++ test/CodeGenOpenCL/atomic-ops.cl
@@ -83,7 +83,7 @@
 
 bool fi4(atomic_int *i) {
   // CHECK-LABEL: @fi4(
-  // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] syncscope("workgroup") acquire acquire
+  // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] syncscope("workgroup-one-as") acquire acquire
   // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
   // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
   // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
@@ -141,21 +141,21 @@
   // CHECK-NEXT: i32 4, label %[[SEQ_SUB:.*]]
   // CHECK-NEXT: ]
   // CHECK: [[MON_WG]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup-one-as") monotonic
   // CHECK: [[MON_DEV]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("agent") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("agent-one-as") monotonic
   // CHECK: [[MON_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} monotonic
   // CHECK: [[MON_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront-one-as") monotonic
   // CHECK: [[ACQ_WG]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup-one-as") acquire
   // CHECK: [[ACQ_DEV]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("agent") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("agent-one-as") acquire
   // CHECK: [[ACQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} acquire
   // CHECK: [[ACQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront-one-as") acquire
   // CHECK: [[SEQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") seq_cst
   // CHECK: [[SEQ_DEV]]:
@@ -169,13 +169,13 @@
 
 float ff1(global atomic_float *d) {
   // CHECK-LABEL: @ff1
-  // CHECK: load atomic i32, i32 addrspace(1)* {{.*}} syncscope("workgroup") monotonic
+  // CHECK: load atomic i32, i32 addrspace(1)* {{.*}} syncscope("workgroup-one-as") monotonic
   return __opencl_atomic_load(d, memory_order_relaxed, memory_scope_work_group);
 }
 
 void ff2(atomic_float *d) {
   // CHECK-LABEL: @ff2
-  // CHECK: store atomic i32 {{.*}} syncscope("workgroup") release
+  // CHECK: store atomic i32 {{.*}} syncscope("workgroup-one-as") release
   __opencl_atomic_store(d, 1, memory_order_release, memory_scope_work_group);
 }
 
@@ -198,7 +198,7 @@
 
 // CHECK-LABEL: @failureOrder
 void failureOrder(atomic_int *ptr, int *ptr2) {
-  // CHECK: cmpxchg i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} syncscope("workgroup") acquire monotonic
+  // CHECK: cmpxchg i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} syncscope("workgroup-one-as") acquire monotonic
   __opencl_atomic_compare_exchange_strong(ptr, ptr2, 43, memory_order_acquire, memory_order_relaxed, memory_scope_work_group);
 
   // CHECK: cmpxchg weak i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} syncscope("workgroup") seq_cst acquire
Index: lib/CodeGen/TargetInfo.h
===
--- lib/CodeGen/TargetInfo.h
+++ lib/CodeGen/TargetInfo.h
@@ -262,8 +262,10 @@
llvm::Type *DestTy) const;
 
   /// Get the syncscope used in LLVM IR.
-  virtual llvm::SyncScope::ID getLLVMSyncScopeID(SyncScope S,
- llvm::LLVMContext &C) const;
+  virtual llvm::SyncScope::ID getLLVMSyncScopeID(const LangOptions &LangOpts,
+ SyncScope Scope,
+ llvm::AtomicOrdering Ordering,
+ llvm::LLVMContext &Ctx) const;
 
   /// Interface class for filling custom fields of a block literal for OpenCL.
   class TargetOpenCLBlockHelper {
Index: lib/CodeGen/TargetInfo.cpp

[PATCH] D59494: AMDGPU: Add support for cross address space synchronization scopes (clang)

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: lib/CodeGen/TargetInfo.cpp:7976
+
+Name = Twine(Twine(Name) + Twine("one-as")).str();
+  }

rampitec wrote:
> I think subgroup is in the single address space even if sequentially 
> consistent.
I have synced with @t-tye, and it seems like it might not be. @b-sumner, do you 
know what opencl spec states? Thanks.


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[PATCH] D59494: AMDGPU: Add support for cross address space synchronization scopes (clang)

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl updated this revision to Diff 191193.
kzhuravl marked an inline comment as done.
kzhuravl added a comment.

Address review feedback.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59494/new/

https://reviews.llvm.org/D59494

Files:
  lib/CodeGen/CGAtomic.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/CodeGen/TargetInfo.h
  test/CodeGenOpenCL/atomic-ops.cl

Index: test/CodeGenOpenCL/atomic-ops.cl
===
--- test/CodeGenOpenCL/atomic-ops.cl
+++ test/CodeGenOpenCL/atomic-ops.cl
@@ -83,7 +83,7 @@
 
 bool fi4(atomic_int *i) {
   // CHECK-LABEL: @fi4(
-  // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] syncscope("workgroup") acquire acquire
+  // CHECK: [[PAIR:%[.0-9A-Z_a-z]+]] = cmpxchg i32* [[PTR:%[.0-9A-Z_a-z]+]], i32 [[EXPECTED:%[.0-9A-Z_a-z]+]], i32 [[DESIRED:%[.0-9A-Z_a-z]+]] syncscope("workgroup-one-as") acquire acquire
   // CHECK: [[OLD:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 0
   // CHECK: [[CMP:%[.0-9A-Z_a-z]+]] = extractvalue { i32, i1 } [[PAIR]], 1
   // CHECK: br i1 [[CMP]], label %[[STORE_EXPECTED:[.0-9A-Z_a-z]+]], label %[[CONTINUE:[.0-9A-Z_a-z]+]]
@@ -141,21 +141,21 @@
   // CHECK-NEXT: i32 4, label %[[SEQ_SUB:.*]]
   // CHECK-NEXT: ]
   // CHECK: [[MON_WG]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup-one-as") monotonic
   // CHECK: [[MON_DEV]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("agent") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("agent-one-as") monotonic
   // CHECK: [[MON_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} monotonic
   // CHECK: [[MON_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") monotonic
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront-one-as") monotonic
   // CHECK: [[ACQ_WG]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup-one-as") acquire
   // CHECK: [[ACQ_DEV]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("agent") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("agent-one-as") acquire
   // CHECK: [[ACQ_ALL]]:
   // CHECK: load atomic i32, i32* %{{.*}} acquire
   // CHECK: [[ACQ_SUB]]:
-  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront") acquire
+  // CHECK: load atomic i32, i32* %{{.*}} syncscope("wavefront-one-as") acquire
   // CHECK: [[SEQ_WG]]:
   // CHECK: load atomic i32, i32* %{{.*}} syncscope("workgroup") seq_cst
   // CHECK: [[SEQ_DEV]]:
@@ -169,13 +169,13 @@
 
 float ff1(global atomic_float *d) {
   // CHECK-LABEL: @ff1
-  // CHECK: load atomic i32, i32 addrspace(1)* {{.*}} syncscope("workgroup") monotonic
+  // CHECK: load atomic i32, i32 addrspace(1)* {{.*}} syncscope("workgroup-one-as") monotonic
   return __opencl_atomic_load(d, memory_order_relaxed, memory_scope_work_group);
 }
 
 void ff2(atomic_float *d) {
   // CHECK-LABEL: @ff2
-  // CHECK: store atomic i32 {{.*}} syncscope("workgroup") release
+  // CHECK: store atomic i32 {{.*}} syncscope("workgroup-one-as") release
   __opencl_atomic_store(d, 1, memory_order_release, memory_scope_work_group);
 }
 
@@ -198,7 +198,7 @@
 
 // CHECK-LABEL: @failureOrder
 void failureOrder(atomic_int *ptr, int *ptr2) {
-  // CHECK: cmpxchg i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} syncscope("workgroup") acquire monotonic
+  // CHECK: cmpxchg i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} syncscope("workgroup-one-as") acquire monotonic
   __opencl_atomic_compare_exchange_strong(ptr, ptr2, 43, memory_order_acquire, memory_order_relaxed, memory_scope_work_group);
 
   // CHECK: cmpxchg weak i32* {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z._]+}}, i32 {{%[0-9A-Za-z_.]+}} syncscope("workgroup") seq_cst acquire
Index: lib/CodeGen/TargetInfo.h
===
--- lib/CodeGen/TargetInfo.h
+++ lib/CodeGen/TargetInfo.h
@@ -262,8 +262,10 @@
llvm::Type *DestTy) const;
 
   /// Get the syncscope used in LLVM IR.
-  virtual llvm::SyncScope::ID getLLVMSyncScopeID(SyncScope S,
- llvm::LLVMContext &C) const;
+  virtual llvm::SyncScope::ID getLLVMSyncScopeID(const LangOptions &LangOpts,
+ SyncScope Scope,
+ llvm::AtomicOrdering Ordering,
+ llvm::LLVMContext &Ctx) const;
 
   /// Interface class for filling custom fields of a block literal for OpenCL.
   class TargetOpenCLBlockHelper {
Index: lib/CodeGen/TargetInfo.cpp
===
--- lib/CodeGen/TargetInfo.cpp
+++ lib/Co

[PATCH] D59494: AMDGPU: Add support for cross address space synchronization scopes (clang)

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rC356947: AMDGPU: Add support for cross address space 
synchronization scopes (clang) (authored by kzhuravl, committed by ).
Herald added a subscriber: ebevhan.
Herald added a project: clang.

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  rC Clang

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Files:
  lib/CodeGen/CGAtomic.cpp
  lib/CodeGen/TargetInfo.cpp
  lib/CodeGen/TargetInfo.h
  test/CodeGenOpenCL/atomic-ops.cl

Index: lib/CodeGen/CGAtomic.cpp
===
--- lib/CodeGen/CGAtomic.cpp
+++ lib/CodeGen/CGAtomic.cpp
@@ -679,7 +679,8 @@
   // Handle constant scope.
   if (auto SC = dyn_cast(Scope)) {
 auto SCID = CGF.getTargetHooks().getLLVMSyncScopeID(
-ScopeModel->map(SC->getZExtValue()), CGF.CGM.getLLVMContext());
+CGF.CGM.getLangOpts(), ScopeModel->map(SC->getZExtValue()),
+Order, CGF.CGM.getLLVMContext());
 EmitAtomicOp(CGF, Expr, Dest, Ptr, Val1, Val2, IsWeak, FailureOrder, Size,
  Order, SCID);
 return;
@@ -708,7 +709,9 @@
 Builder.SetInsertPoint(B);
 EmitAtomicOp(CGF, Expr, Dest, Ptr, Val1, Val2, IsWeak, FailureOrder, Size,
  Order,
- CGF.getTargetHooks().getLLVMSyncScopeID(ScopeModel->map(S),
+ CGF.getTargetHooks().getLLVMSyncScopeID(CGF.CGM.getLangOpts(),
+ ScopeModel->map(S),
+ Order,
  CGF.getLLVMContext()));
 Builder.CreateBr(ContBB);
   }
Index: lib/CodeGen/TargetInfo.h
===
--- lib/CodeGen/TargetInfo.h
+++ lib/CodeGen/TargetInfo.h
@@ -268,8 +268,10 @@
llvm::Type *DestTy) const;
 
   /// Get the syncscope used in LLVM IR.
-  virtual llvm::SyncScope::ID getLLVMSyncScopeID(SyncScope S,
- llvm::LLVMContext &C) const;
+  virtual llvm::SyncScope::ID getLLVMSyncScopeID(const LangOptions &LangOpts,
+ SyncScope Scope,
+ llvm::AtomicOrdering Ordering,
+ llvm::LLVMContext &Ctx) const;
 
   /// Interface class for filling custom fields of a block literal for OpenCL.
   class TargetOpenCLBlockHelper {
Index: lib/CodeGen/TargetInfo.cpp
===
--- lib/CodeGen/TargetInfo.cpp
+++ lib/CodeGen/TargetInfo.cpp
@@ -462,8 +462,11 @@
 }
 
 llvm::SyncScope::ID
-TargetCodeGenInfo::getLLVMSyncScopeID(SyncScope S, llvm::LLVMContext &C) const {
-  return C.getOrInsertSyncScopeID(""); /* default sync scope */
+TargetCodeGenInfo::getLLVMSyncScopeID(const LangOptions &LangOpts,
+  SyncScope Scope,
+  llvm::AtomicOrdering Ordering,
+  llvm::LLVMContext &Ctx) const {
+  return Ctx.getOrInsertSyncScopeID(""); /* default sync scope */
 }
 
 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
@@ -7824,8 +7827,10 @@
   }
   LangAS getGlobalVarAddressSpace(CodeGenModule &CGM,
   const VarDecl *D) const override;
-  llvm::SyncScope::ID getLLVMSyncScopeID(SyncScope S,
- llvm::LLVMContext &C) const override;
+  llvm::SyncScope::ID getLLVMSyncScopeID(const LangOptions &LangOpts,
+ SyncScope Scope,
+ llvm::AtomicOrdering Ordering,
+ llvm::LLVMContext &Ctx) const override;
   llvm::Function *
   createEnqueuedBlockKernel(CodeGenFunction &CGF,
 llvm::Function *BlockInvokeFunc,
@@ -7971,10 +7976,12 @@
 }
 
 llvm::SyncScope::ID
-AMDGPUTargetCodeGenInfo::getLLVMSyncScopeID(SyncScope S,
-llvm::LLVMContext &C) const {
-  StringRef Name;
-  switch (S) {
+AMDGPUTargetCodeGenInfo::getLLVMSyncScopeID(const LangOptions &LangOpts,
+SyncScope Scope,
+llvm::AtomicOrdering Ordering,
+llvm::LLVMContext &Ctx) const {
+  std::string Name;
+  switch (Scope) {
   case SyncScope::OpenCLWorkGroup:
 Name = "workgroup";
 break;
@@ -7987,7 +7994,15 @@
   case SyncScope::OpenCLSubGroup:
 Name = "wavefront";
   }
-  return C.getOrInsertSyncScopeID(Name);
+
+  if (Ordering != llvm::AtomicOrdering::SequentiallyConsistent) {
+if (!Name.empty())
+  Name = Twine(Twine(Name) + Twine("-")).str();
+
+Name = Twine(Twine(Name) + Twi

[PATCH] D59008: [AMDGPU] Switch default dwarf version to 5

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.

LGTM


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[PATCH] D57977: [HIP] compile option code-object-v3 propagate to llc

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Can you handle all features as follows instead of checking a particular option?

‘handleTargetFeaturesGroup(

  Args, Features, options::OPT_m_amdgpu_Features_Group);’ ?

There is code in AMDGPU tool chain you can use as a reference.


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[PATCH] D57977: [HIP] compile option code-object-v3 propagate to llc

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

https://github.com/llvm-mirror/clang/blob/master/lib/Driver/ToolChains/AMDGPU.cpp#L52


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[PATCH] D57977: [HIP] compile option code-object-v3 propagate to llc

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Can you add some tests? Preferably with -mxnack/-mno-xnack, 
-msram-ecc/-mno-sram-ecc, -mcode-object-v3/-mno-code-object-v3


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[PATCH] D57977: [HIP] compile option code-object-v3 propagate to llc

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Is it still code object v2 by default?


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[PATCH] D57977: [HIP] compile option code-object-v3 propagate to llc

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM. Please make sure to update your commit message as your patch processes 
all m options now.


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[PATCH] D58526: AMDGPU: Don't emit debugger subtarget features

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: test/Driver/amdgpu-features.c:4
 // CHECK-MAMDGPU-DEBUGGER-ABI-0-0: the clang compiler does not support 
'-mamdgpu-debugger-abi=0.0'
-
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri 
-mamdgpu-debugger-abi=1.0 %s -o - 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-1-0 %s
-// CHECK-MAMDGPU-DEBUGGER-ABI-1-0: "-target-feature" 
"+amdgpu-debugger-insert-nops" "-target-feature" 
"+amdgpu-debugger-emit-prologue"
+// CHECK-MAMDGPU-DEBUGGER-ABI-1-0: the clang compiler does not support 
'-mamdgpu-debugger-abi=0.0'
 

I do not see this prefix in the run line?


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[PATCH] D58526: AMDGPU: Don't emit debugger subtarget features

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM


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[PATCH] D36802: AMDGPU: Cleanup most of the macros

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl updated this revision to Diff 112761.
kzhuravl marked an inline comment as done.
kzhuravl retitled this revision from "AMDGPU: Insert __devicename__ macros" to 
"AMDGPU: Cleanup most of the macros".
kzhuravl edited the summary of this revision.
kzhuravl added a comment.

fast fmaf macro will be in the follow up patch.


https://reviews.llvm.org/D36802

Files:
  lib/Basic/Targets/AMDGPU.cpp
  lib/Basic/Targets/AMDGPU.h
  test/Driver/amdgpu-macros.cl

Index: test/Driver/amdgpu-macros.cl
===
--- /dev/null
+++ test/Driver/amdgpu-macros.cl
@@ -0,0 +1,182 @@
+// Check that appropriate macros are defined for every supported AMDGPU
+// "-target" and "-mcpu".
+
+//
+// R600.
+//
+
+// RUN: %clang -target r600 -mcpu=r600 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=R600-CHECK %s
+// RUN: %clang -target r600 -mcpu=rv630 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=R600-CHECK %s
+// RUN: %clang -target r600 -mcpu=rv635 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=R600-CHECK %s
+// RUN: %clang -target r600 -mcpu=rv610 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=RS880-CHECK %s
+// RUN: %clang -target r600 -mcpu=rv620 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=RS880-CHECK %s
+// RUN: %clang -target r600 -mcpu=rs780 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=RS880-CHECK %s
+// RUN: %clang -target r600 -mcpu=rs880 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=RS880-CHECK %s
+// RUN: %clang -target r600 -mcpu=rv670 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=RV670-CHECK %s
+// RUN: %clang -target r600 -mcpu=rv710 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=RV710-CHECK %s
+// RUN: %clang -target r600 -mcpu=rv730 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=RV730-CHECK %s
+// RUN: %clang -target r600 -mcpu=rv740 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=RV770-CHECK %s
+// RUN: %clang -target r600 -mcpu=rv770 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=RV770-CHECK %s
+// RUN: %clang -target r600 -mcpu=palm -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=CEDAR-CHECK %s
+// RUN: %clang -target r600 -mcpu=cedar -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=CEDAR-CHECK %s
+// RUN: %clang -target r600 -mcpu=sumo -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=SUMO-CHECK %s
+// RUN: %clang -target r600 -mcpu=sumo2 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=SUMO-CHECK %s
+// RUN: %clang -target r600 -mcpu=redwood -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=REDWOOD-CHECK %s
+// RUN: %clang -target r600 -mcpu=juniper -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=JUNIPER-CHECK %s
+// RUN: %clang -target r600 -mcpu=juniper -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=JUNIPER-CHECK %s
+// RUN: %clang -target r600 -mcpu=hemlock -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=CYPRESS-CHECK %s
+// RUN: %clang -target r600 -mcpu=cypress -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=CYPRESS-CHECK %s
+// RUN: %clang -target r600 -mcpu=barts -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=BARTS-CHECK %s
+// RUN: %clang -target r600 -mcpu=turks -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=TURKS-CHECK %s
+// RUN: %clang -target r600 -mcpu=caicos -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=CAICOS-CHECK %s
+// RUN: %clang -target r600 -mcpu=cayman -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=CAYMAN-CHECK %s
+// RUN: %clang -target r600 -mcpu=aruba -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-R600-CHECK --check-prefix=CAYMAN-CHECK %s
+
+//
+// GCN.
+//
+
+// RUN: %clang -target amdgcn -mcpu=gfx600 -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --check-prefix=ARCH-GCN-CHECK --check-prefix=GFX600-CHECK %s
+// RUN: %clang -target amdgcn -mcpu=tahiti -E -dM %s | FileCheck --check-prefix=AMDGPU-CHECK --chec

[PATCH] D37599: Add '\n' in ClangDataCollectorsEmitter

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
Herald added subscribers: ilya-biryukov, wdng.

Otherwise it breaks our internal windows builders:

  StmtDataCollectors.inc: error C2220: warning treated as error - no 'object' 
file generated
  StmtDataCollectors.inc: warning C4335: Mac file format detected: please 
convert the source file to either DOS or UNIX format


https://reviews.llvm.org/D37599

Files:
  utils/TableGen/ClangDataCollectorsEmitter.cpp


Index: utils/TableGen/ClangDataCollectorsEmitter.cpp
===
--- utils/TableGen/ClangDataCollectorsEmitter.cpp
+++ utils/TableGen/ClangDataCollectorsEmitter.cpp
@@ -8,7 +8,7 @@
   const auto &Defs = RK.getClasses();
   for (const auto &Entry : Defs) {
 Record &R = *Entry.second;
-OS << "DEF_ADD_DATA(" << R.getName() << ", {";
+OS << "DEF_ADD_DATA(" << R.getName() << ", {\n";
 auto Code = R.getValue("Code")->getValue();
 OS << Code->getAsUnquotedString() << "}\n)";
 OS << "\n";


Index: utils/TableGen/ClangDataCollectorsEmitter.cpp
===
--- utils/TableGen/ClangDataCollectorsEmitter.cpp
+++ utils/TableGen/ClangDataCollectorsEmitter.cpp
@@ -8,7 +8,7 @@
   const auto &Defs = RK.getClasses();
   for (const auto &Entry : Defs) {
 Record &R = *Entry.second;
-OS << "DEF_ADD_DATA(" << R.getName() << ", {";
+OS << "DEF_ADD_DATA(" << R.getName() << ", {\n";
 auto Code = R.getValue("Code")->getValue();
 OS << Code->getAsUnquotedString() << "}\n)";
 OS << "\n";
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[PATCH] D37599: Add '\n' in ClangDataCollectorsEmitter

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL312795: Add '\n' in ClangDataCollectorsEmitter (authored by 
kzhuravl).

Changed prior to commit:
  https://reviews.llvm.org/D37599?vs=114269&id=114376#toc

Repository:
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https://reviews.llvm.org/D37599

Files:
  cfe/trunk/utils/TableGen/ClangDataCollectorsEmitter.cpp


Index: cfe/trunk/utils/TableGen/ClangDataCollectorsEmitter.cpp
===
--- cfe/trunk/utils/TableGen/ClangDataCollectorsEmitter.cpp
+++ cfe/trunk/utils/TableGen/ClangDataCollectorsEmitter.cpp
@@ -8,7 +8,7 @@
   const auto &Defs = RK.getClasses();
   for (const auto &Entry : Defs) {
 Record &R = *Entry.second;
-OS << "DEF_ADD_DATA(" << R.getName() << ", {";
+OS << "DEF_ADD_DATA(" << R.getName() << ", {\n";
 auto Code = R.getValue("Code")->getValue();
 OS << Code->getAsUnquotedString() << "}\n)";
 OS << "\n";


Index: cfe/trunk/utils/TableGen/ClangDataCollectorsEmitter.cpp
===
--- cfe/trunk/utils/TableGen/ClangDataCollectorsEmitter.cpp
+++ cfe/trunk/utils/TableGen/ClangDataCollectorsEmitter.cpp
@@ -8,7 +8,7 @@
   const auto &Defs = RK.getClasses();
   for (const auto &Entry : Defs) {
 Record &R = *Entry.second;
-OS << "DEF_ADD_DATA(" << R.getName() << ", {";
+OS << "DEF_ADD_DATA(" << R.getName() << ", {\n";
 auto Code = R.getValue("Code")->getValue();
 OS << Code->getAsUnquotedString() << "}\n)";
 OS << "\n";
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[PATCH] D37599: Add '\n' in ClangDataCollectorsEmitter

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

In https://reviews.llvm.org/D37599#864376, @arphaman wrote:

> LGTM. Do you have commit access?


Yep, committed. Thanks.


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[PATCH] D63256: [OpenCL] Split type and macro definitions into opencl-c-base.h

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added subscribers: b-sumner, kzhuravl.
kzhuravl added a comment.

+ @b-sumner




Comment at: cfe/trunk/lib/Headers/opencl-c.h:13638-13640
-#ifndef ATOMIC_VAR_INIT
-#define ATOMIC_VAR_INIT(x) (x)
-#endif //ATOMIC_VAR_INIT

Any reason this piece of code got completely removed?


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[PATCH] D63256: [OpenCL] Split type and macro definitions into opencl-c-base.h

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: cfe/trunk/lib/Headers/opencl-c.h:13638-13640
-#ifndef ATOMIC_VAR_INIT
-#define ATOMIC_VAR_INIT(x) (x)
-#endif //ATOMIC_VAR_INIT

svenvh wrote:
> yaxunl wrote:
> > kzhuravl wrote:
> > > Any reason this piece of code got completely removed?
> > Removing ATOMIC_VAR_INIT caused regression in our compiler.
> > 
> > Could you please put it back?
> > 
> > Thanks.
> Apologies, that was not intended; thanks for reporting!  Restored the macro 
> in r364174 together with a test.
Thanks!


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[PATCH] D56525: [AMDGPU] Separate feature dot-insts

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM


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[PATCH] D124536: [AMDGPU] Add gfx11 subtarget ELF definition

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Looks like this change is missing doc updates?


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  rG LLVM Github Monorepo

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[PATCH] D124536: [AMDGPU] Add gfx11 subtarget ELF definition

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl requested changes to this revision.
kzhuravl added a comment.
This revision now requires changes to proceed.

Need to update processor table: 
https://llvm.org/docs/AMDGPUUsage.html#processors
Need to update EF_AMDGPU_MACH_AMDGCN table: 
https://llvm.org/docs/AMDGPUUsage.html#amdgpu-ef-amdgpu-mach-table


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[PATCH] D124536: [AMDGPU] Add gfx11 subtarget ELF definition

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
kzhuravl added a comment.
This revision is now accepted and ready to land.

LGTM, thanks


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[PATCH] D36771: AMDGPU: add missing amdgcn processors and tests

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
Herald added subscribers: tpr, dstuttard, yaxunl, nhaehnle, wdng.

- gfx600
- gfx601
- gfx703
- gfx902
- gfx903


https://reviews.llvm.org/D36771

Files:
  lib/Basic/Targets/AMDGPU.cpp
  test/Driver/r600-mcpu.cl

Index: test/Driver/r600-mcpu.cl
===
--- test/Driver/r600-mcpu.cl
+++ test/Driver/r600-mcpu.cl
@@ -26,22 +26,6 @@
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=caicos %s -o - 2>&1 | FileCheck --check-prefix=CAICOS-CHECK %s
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=cayman %s -o - 2>&1 | FileCheck --check-prefix=CAYMAN-CHECK %s
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=aruba %s -o - 2>&1 | FileCheck --check-prefix=CAYMAN-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=tahiti %s -o - 2>&1 | FileCheck --check-prefix=TAHITI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=pitcairn %s -o - 2>&1 | FileCheck --check-prefix=PITCAIRN-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=verde %s -o - 2>&1 | FileCheck --check-prefix=VERDE-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=oland %s -o - 2>&1 | FileCheck --check-prefix=OLAND-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=bonaire %s -o - 2>&1 | FileCheck --check-prefix=BONAIRE-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kabini %s -o - 2>&1 | FileCheck --check-prefix=KABINI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri %s -o - 2>&1 | FileCheck --check-prefix=KAVERI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=hawaii %s -o - 2>&1 | FileCheck --check-prefix=HAWAII-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=mullins %s -o - 2>&1 | FileCheck --check-prefix=MULLINS-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=tonga %s -o - 2>&1 | FileCheck --check-prefix=TONGA-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=iceland %s -o - 2>&1 | FileCheck --check-prefix=ICELAND-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=carrizo %s -o - 2>&1 | FileCheck --check-prefix=CARRIZO-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=fiji %s -o - 2>&1 | FileCheck --check-prefix=FIJI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=stoney %s -o - 2>&1 | FileCheck --check-prefix=STONEY-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx900 %s -o - 2>&1 | FileCheck --check-prefix=GFX900-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx901 %s -o - 2>&1 | FileCheck --check-prefix=GFX901-CHECK %s
 
 // R600-CHECK:  "-target-cpu" "r600"
 // RS880-CHECK: "-target-cpu" "rs880"
@@ -58,19 +42,71 @@
 // TURKS-CHECK: "-target-cpu" "turks"
 // CAICOS-CHECK: "-target-cpu" "caicos"
 // CAYMAN-CHECK: "-target-cpu" "cayman"
+
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx600 %s -o - 2>&1 | FileCheck --check-prefix=GFX600-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=tahiti %s -o - 2>&1 | FileCheck --check-prefix=TAHITI-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx601 %s -o - 2>&1 | FileCheck --check-prefix=GFX601-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=pitcairn %s -o - 2>&1 | FileCheck --check-prefix=PITCAIRN-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=verde %s -o - 2>&1 | FileCheck --check-prefix=VERDE-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=oland %s -o - 2>&1 | FileCheck --check-prefix=OLAND-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=hainan %s -o - 2>&1 | FileCheck --check-prefix=HAINAN-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx700 %s -o - 2>&1 | FileCheck --check-prefix=GFX700-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=bonaire %s -o - 2>&1 | FileCheck --check-prefix=BONAIRE-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri %s -o - 2>&1 | FileCheck --check-prefix=KAVERI-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx701 %s -o - 2>&1 | FileCheck --check-prefix=GFX701-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=hawaii %s -o - 2>&1 | FileCheck --check-prefix=HAWAII-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx702 %s -o - 2>&1 | FileCheck --check-prefix=GFX702-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx703 %s -o - 2>&1 | FileCheck --check-prefix=GFX703-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kabini %s -o - 2>&1 | FileCheck --check-prefix=KABINI-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=mullins %s -o - 2>&1 | FileCheck --check-prefi

[PATCH] D36802: AMDGPU: Insert __devicename__ macros

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng.

https://reviews.llvm.org/D36802

Files:
  lib/Basic/Targets/AMDGPU.cpp
  lib/Basic/Targets/AMDGPU.h
  test/Driver/amdgcn-mcpu-macro.cl
  test/Driver/r600-mcpu-macro.cl
  test/Driver/r600-mcpu.cl

Index: test/Driver/r600-mcpu.cl
===
--- test/Driver/r600-mcpu.cl
+++ test/Driver/r600-mcpu.cl
@@ -1,4 +1,4 @@
-t// Check that -mcpu works for all supported GPUs
+// Check that -mcpu works for all supported GPUs
 
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=r600 %s -o - 2>&1 | FileCheck --check-prefix=R600-CHECK %s
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=rv630 %s -o - 2>&1 | FileCheck --check-prefix=R600-CHECK %s
@@ -26,22 +26,6 @@
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=caicos %s -o - 2>&1 | FileCheck --check-prefix=CAICOS-CHECK %s
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=cayman %s -o - 2>&1 | FileCheck --check-prefix=CAYMAN-CHECK %s
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=aruba %s -o - 2>&1 | FileCheck --check-prefix=CAYMAN-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=tahiti %s -o - 2>&1 | FileCheck --check-prefix=TAHITI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=pitcairn %s -o - 2>&1 | FileCheck --check-prefix=PITCAIRN-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=verde %s -o - 2>&1 | FileCheck --check-prefix=VERDE-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=oland %s -o - 2>&1 | FileCheck --check-prefix=OLAND-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=bonaire %s -o - 2>&1 | FileCheck --check-prefix=BONAIRE-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kabini %s -o - 2>&1 | FileCheck --check-prefix=KABINI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri %s -o - 2>&1 | FileCheck --check-prefix=KAVERI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=hawaii %s -o - 2>&1 | FileCheck --check-prefix=HAWAII-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=mullins %s -o - 2>&1 | FileCheck --check-prefix=MULLINS-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=tonga %s -o - 2>&1 | FileCheck --check-prefix=TONGA-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=iceland %s -o - 2>&1 | FileCheck --check-prefix=ICELAND-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=carrizo %s -o - 2>&1 | FileCheck --check-prefix=CARRIZO-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=fiji %s -o - 2>&1 | FileCheck --check-prefix=FIJI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=stoney %s -o - 2>&1 | FileCheck --check-prefix=STONEY-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx900 %s -o - 2>&1 | FileCheck --check-prefix=GFX900-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx901 %s -o - 2>&1 | FileCheck --check-prefix=GFX901-CHECK %s
 
 // R600-CHECK:  "-target-cpu" "r600"
 // RS880-CHECK: "-target-cpu" "rs880"
@@ -58,19 +42,71 @@
 // TURKS-CHECK: "-target-cpu" "turks"
 // CAICOS-CHECK: "-target-cpu" "caicos"
 // CAYMAN-CHECK: "-target-cpu" "cayman"
+
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx600 %s -o - 2>&1 | FileCheck --check-prefix=GFX600-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=tahiti %s -o - 2>&1 | FileCheck --check-prefix=TAHITI-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx601 %s -o - 2>&1 | FileCheck --check-prefix=GFX601-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=pitcairn %s -o - 2>&1 | FileCheck --check-prefix=PITCAIRN-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=verde %s -o - 2>&1 | FileCheck --check-prefix=VERDE-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=oland %s -o - 2>&1 | FileCheck --check-prefix=OLAND-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=hainan %s -o - 2>&1 | FileCheck --check-prefix=HAINAN-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx700 %s -o - 2>&1 | FileCheck --check-prefix=GFX700-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=bonaire %s -o - 2>&1 | FileCheck --check-prefix=BONAIRE-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri %s -o - 2>&1 | FileCheck --check-prefix=KAVERI-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx701 %s -o - 2>&1 | FileCheck --check-prefix=GFX701-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=hawaii %s -o - 2>&1 | FileCheck --check-prefix=HAWAII-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx702

[PATCH] D36771: AMDGPU: add missing amdgcn processors and tests

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

In https://reviews.llvm.org/D36771#842837, @arsenm wrote:

> We should also be defining __devicename__ macros. I opened a bug for this 
> last week


https://reviews.llvm.org/D36802


https://reviews.llvm.org/D36771



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[PATCH] D36802: AMDGPU: Insert __devicename__ macros

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Do we need this for r600?


https://reviews.llvm.org/D36802



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[PATCH] D36771: AMDGPU: add missing amdgcn processors and tests

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL311141: AMDGPU: add missing amdgcn processors and tests 
(authored by kzhuravl).

Changed prior to commit:
  https://reviews.llvm.org/D36771?vs=111270&id=111595#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D36771

Files:
  cfe/trunk/lib/Basic/Targets/AMDGPU.cpp
  cfe/trunk/test/Driver/r600-mcpu.cl

Index: cfe/trunk/test/Driver/r600-mcpu.cl
===
--- cfe/trunk/test/Driver/r600-mcpu.cl
+++ cfe/trunk/test/Driver/r600-mcpu.cl
@@ -26,22 +26,6 @@
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=caicos %s -o - 2>&1 | FileCheck --check-prefix=CAICOS-CHECK %s
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=cayman %s -o - 2>&1 | FileCheck --check-prefix=CAYMAN-CHECK %s
 // RUN: %clang -### -target r600 -x cl -S -emit-llvm -mcpu=aruba %s -o - 2>&1 | FileCheck --check-prefix=CAYMAN-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=tahiti %s -o - 2>&1 | FileCheck --check-prefix=TAHITI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=pitcairn %s -o - 2>&1 | FileCheck --check-prefix=PITCAIRN-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=verde %s -o - 2>&1 | FileCheck --check-prefix=VERDE-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=oland %s -o - 2>&1 | FileCheck --check-prefix=OLAND-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=bonaire %s -o - 2>&1 | FileCheck --check-prefix=BONAIRE-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kabini %s -o - 2>&1 | FileCheck --check-prefix=KABINI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri %s -o - 2>&1 | FileCheck --check-prefix=KAVERI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=hawaii %s -o - 2>&1 | FileCheck --check-prefix=HAWAII-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=mullins %s -o - 2>&1 | FileCheck --check-prefix=MULLINS-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=tonga %s -o - 2>&1 | FileCheck --check-prefix=TONGA-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=iceland %s -o - 2>&1 | FileCheck --check-prefix=ICELAND-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=carrizo %s -o - 2>&1 | FileCheck --check-prefix=CARRIZO-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=fiji %s -o - 2>&1 | FileCheck --check-prefix=FIJI-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=stoney %s -o - 2>&1 | FileCheck --check-prefix=STONEY-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx900 %s -o - 2>&1 | FileCheck --check-prefix=GFX900-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx901 %s -o - 2>&1 | FileCheck --check-prefix=GFX901-CHECK %s
 
 // R600-CHECK:  "-target-cpu" "r600"
 // RS880-CHECK: "-target-cpu" "rs880"
@@ -58,19 +42,71 @@
 // TURKS-CHECK: "-target-cpu" "turks"
 // CAICOS-CHECK: "-target-cpu" "caicos"
 // CAYMAN-CHECK: "-target-cpu" "cayman"
+
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx600 %s -o - 2>&1 | FileCheck --check-prefix=GFX600-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=tahiti %s -o - 2>&1 | FileCheck --check-prefix=TAHITI-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx601 %s -o - 2>&1 | FileCheck --check-prefix=GFX601-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=pitcairn %s -o - 2>&1 | FileCheck --check-prefix=PITCAIRN-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=verde %s -o - 2>&1 | FileCheck --check-prefix=VERDE-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=oland %s -o - 2>&1 | FileCheck --check-prefix=OLAND-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=hainan %s -o - 2>&1 | FileCheck --check-prefix=HAINAN-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx700 %s -o - 2>&1 | FileCheck --check-prefix=GFX700-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=bonaire %s -o - 2>&1 | FileCheck --check-prefix=BONAIRE-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri %s -o - 2>&1 | FileCheck --check-prefix=KAVERI-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx701 %s -o - 2>&1 | FileCheck --check-prefix=GFX701-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=hawaii %s -o - 2>&1 | FileCheck --check-prefix=HAWAII-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx702 %s -o - 2>&1 | FileCheck --check-prefix=GFX702-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx703 %s -o - 2>&1 | FileCheck --check-prefix=GFX703-CHECK %s
+// RUN: %clang -### -target amdgcn -x cl -S -e

[PATCH] D93018: [AMDGPU] Add missing targets to target-invalid-cpu-note.c

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
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[PATCH] D93017: [AMDGPU] Add missing targets to amdgpu-features.cl

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

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[PATCH] D93181: [NFC][AMDGPU] Reformat AMD GPU targets in cuda.cpp

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[PATCH] D89091: Regenerate ClangCommandLineReference.rst

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rGb581c5a42f05: Regenerate ClangCommandLineReference.rst 
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Index: clang/docs/ClangCommandLineReference.rst
===
--- clang/docs/ClangCommandLineReference.rst
+++ clang/docs/ClangCommandLineReference.rst
@@ -144,8 +144,6 @@
 
 .. option:: --constant-cfstrings
 
-.. option:: -coverage, --coverage
-
 .. option:: --cuda-compile-host-device
 
 Compile CUDA code for both host and device (default).  Has no effect on non-CUDA compilations.
@@ -178,6 +176,10 @@
 
 Filename (or -) to write dependency output to
 
+.. option:: -dsym-dir
+
+Directory to output dSYM's (if any) to
+
 .. option:: -dumpmachine
 
 .. option:: -dumpversion
@@ -200,6 +202,10 @@
 
 Emit Clang AST files for source inputs
 
+.. option:: --emit-static-lib
+
+Enable linker job to emit a static library.
+
 .. option:: -enable-trivial-auto-var-init-zero-knowing-it-will-be-removed-from-clang
 
 Trivial automatic variable initialization to zero is only here for benchmarks, it'll eventually be removed, and I'm OK with that because I'm only using it to benchmark
@@ -262,6 +268,10 @@
 
 .. option:: -ginline-line-tables, -gno-inline-line-tables
 
+.. option:: --gpu-instrument-lib=
+
+Instrument device library for HIP, which is a LLVM bitcode containing \_\_cyg\_profile\_func\_enter and \_\_cyg\_profile\_func\_exit
+
 .. option:: --gpu-max-threads-per-block=
 
 Default max threads per block for kernel launch bounds for HIP
@@ -280,6 +290,10 @@
 
 Link clang-offload-bundler bundles for HIP
 
+.. option:: --hip-version=
+
+HIP version in the format of major.minor.patch
+
 .. option:: -ibuiltininc
 
 Enable builtin #include directories even when -nostdinc is used before or after -ibuiltininc. Using -nobuiltininc after the option disables it
@@ -310,6 +324,10 @@
 
 Enforce targets of indirect branches and function returns
 
+.. option:: -mharden-sls=
+
+Select straight-line speculation hardening scope
+
 .. option:: --migrate
 
 Run the migrator
@@ -374,8 +392,6 @@
 
 .. option:: -noseglinkedit
 
-.. option:: -nostartfiles
-
 .. option:: -nostdinc, --no-standard-includes
 
 .. program:: clang1
@@ -384,11 +400,7 @@
 
 Disable standard #include directories for the C++ standard library
 
-.. option:: -nostdlib, --no-standard-libraries
-
-.. program:: clang1
 .. option:: -nostdlib++
-.. program:: clang
 
 .. option:: -nostdlibinc
 
@@ -464,7 +476,7 @@
 
 .. option:: --offload-arch=, --cuda-gpu-arch=, --no-offload-arch=
 
-CUDA/HIP offloading device architecture (e.g. sm\_35, gfx906).  May be specified more than once.
+CUDA offloading device architecture (e.g. sm\_35), or HIP offloading target ID in the form of a device architecture followed by target ID features delimited by a colon. Each target ID feature is a pre-defined string followed by a plus or minus sign (e.g. gfx908:xnack+:sram-ecc-).  May be specified more than once.
 
 .. option:: -p, --profile
 
@@ -474,8 +486,6 @@
 
 Enable mcount instrumentation
 
-.. option:: -pie
-
 .. option:: -pipe, --pipe
 
 Use pipes between commands, when possible
@@ -538,8 +548,6 @@
 
 .. option:: -pthreads
 
-.. option:: -rdynamic
-
 .. option:: -read\_only\_relocs 
 
 .. option:: -relocatable-pch, --relocatable-pch
@@ -602,8 +610,6 @@
 
 Serialize compiler diagnostics to a file
 
-.. option:: -shared, --shared
-
 .. option:: -shared-libgcc
 
 .. option:: -shared-libsan, -shared-libasan
@@ -612,10 +618,6 @@
 
 .. option:: -single\_module
 
-.. option:: -specs=, --specs=
-
-.. option:: -static, --static
-
 .. option:: -static-libgcc
 
 .. option:: -static-libsan
@@ -628,8 +630,6 @@
 
 Use the static host OpenMP runtime while linking.
 
-.. option:: -static-pie
-
 .. option:: -std-default=
 
 .. option:: -stdlib=, --stdlib=, --stdlib 
@@ -734,7 +734,7 @@
 
 .. option:: -emit-interface-stubs
 
-Generate Inteface Stub Files.
+Generate Interface Stub Files.
 
 .. option:: -emit-llvm
 
@@ -820,7 +820,7 @@
 
 .. option:: -fexperimental-strict-floating-point
 
-Enables the use of non-default rounding modes and non-default exception handling on targets that are not currently ready.
+Enables experimental strict floating point in LLVM.
 
 .. option:: -ffine-grained-bitfield-accesses, -fno-fine-grained-bitfield-accesses
 
@@ -886,11 +886,11 @@
 
 Generalize pointers in CFI indirect call type signature checks
 
-.. option:: -fsanitize-coverage-allowlist=
+.. option:: -fsanitize-coverage-allowlist=, -fsanitize-coverage-whitelist=
 
 Restrict sanitizer coverage instrumentation exclusively to modules and functions that match the provided special case list, except the blocked ones
 
-.. option:: -fsanitize-covera

[PATCH] D89125: AMDGPU: Remove -mamdgpu-debugger-abi option

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

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  clang/include/clang/Driver/Options.td
  clang/lib/Driver/ToolChains/AMDGPU.cpp
  clang/test/Driver/amdgpu-features.c


Index: clang/test/Driver/amdgpu-features.c
===
--- clang/test/Driver/amdgpu-features.c
+++ clang/test/Driver/amdgpu-features.c
@@ -1,11 +1,3 @@
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri 
-mamdgpu-debugger-abi=0.0 %s -o - 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-0-0 %s
-// CHECK-MAMDGPU-DEBUGGER-ABI-0-0: the clang compiler does not support 
'-mamdgpu-debugger-abi=0.0'
-
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri 
-mamdgpu-debugger-abi=1.0 %s -o - 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-1-0 %s
-// CHECK-MAMDGPU-DEBUGGER-ABI-1-0: the clang compiler does not support 
'-mamdgpu-debugger-abi=1.0'
-
 // RUN: %clang -### -target amdgcn -mcpu=gfx700 -mcode-object-v3 %s 2>&1 | 
FileCheck --check-prefix=CODE-OBJECT-V3 %s
 // CODE-OBJECT-V3: "-target-feature" "+code-object-v3"
 
Index: clang/lib/Driver/ToolChains/AMDGPU.cpp
===
--- clang/lib/Driver/ToolChains/AMDGPU.cpp
+++ clang/lib/Driver/ToolChains/AMDGPU.cpp
@@ -365,9 +365,6 @@
  const llvm::Triple &Triple,
  const llvm::opt::ArgList &Args,
  std::vector &Features) {
-  if (const Arg *dAbi = Args.getLastArg(options::OPT_mamdgpu_debugger_abi))
-D.Diag(diag::err_drv_clang_unsupported) << dAbi->getAsString(Args);
-
   // Add target ID features to -target-feature options. No diagnostics should
   // be emitted here since invalid target ID is diagnosed at other places.
   StringRef TargetID = Args.getLastArgValue(options::OPT_mcpu_EQ);
Index: clang/include/clang/Driver/Options.td
===
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -2461,12 +2461,6 @@
  Values<"command,reactor">,
  HelpText<"Execution model (WebAssembly only)">;
 
-def mamdgpu_debugger_abi : Joined<["-"], "mamdgpu-debugger-abi=">,
-  Flags<[HelpHidden]>,
-  Group,
-  HelpText<"Generate additional code for specified  of debugger ABI 
(AMDGPU only)">,
-  MetaVarName<"">;
-
 def mcode_object_v3 : Flag<["-"], "mcode-object-v3">, 
Group,
   HelpText<"Enable code object v3 (AMDGPU only)">;
 def mno_code_object_v3 : Flag<["-"], "mno-code-object-v3">, 
Group,
Index: clang/docs/ClangCommandLineReference.rst
===
--- clang/docs/ClangCommandLineReference.rst
+++ clang/docs/ClangCommandLineReference.rst
@@ -2655,10 +2655,6 @@
 
 .. option:: -mcmodel=, -mcmodel=medany (equivalent to -mcmodel=medium), 
-mcmodel=medlow (equivalent to -mcmodel=small)
 
-.. option:: -mcode-object-v3, -mno-code-object-v3
-
-Enable code object v3 (AMDGPU only)
-
 .. option:: -mconsole
 
 .. program:: clang1
@@ -2939,6 +2935,10 @@
 
 AMDGPU
 --
+.. option:: -mcode-object-v3, -mno-code-object-v3
+
+Enable code object v3 (AMDGPU only)
+
 .. option:: -mcumode, -mno-cumode
 
 CU wavefront execution mode is used (AMDGPU only)


Index: clang/test/Driver/amdgpu-features.c
===
--- clang/test/Driver/amdgpu-features.c
+++ clang/test/Driver/amdgpu-features.c
@@ -1,11 +1,3 @@
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri -mamdgpu-debugger-abi=0.0 %s -o - 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-0-0 %s
-// CHECK-MAMDGPU-DEBUGGER-ABI-0-0: the clang compiler does not support '-mamdgpu-debugger-abi=0.0'
-
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri -mamdgpu-debugger-abi=1.0 %s -o - 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-1-0 %s
-// CHECK-MAMDGPU-DEBUGGER-ABI-1-0: the clang compiler does not support '-mamdgpu-debugger-abi=1.0'
-
 // RUN: %clang -### -target amdgcn -mcpu=gfx700 -mcode-object-v3 %s 2>&1 | FileCheck --check-prefix=CODE-OBJECT-V3 %s
 // CODE-OBJECT-V3: "-target-feature" "+code-object-v3"
 
Index: clang/lib/Driver/ToolChains/AMDGPU.cpp
===
--- clang/lib/Driver/ToolChains/AMDGPU.cpp
+++ clang/lib/Driver/ToolChains/AMDGPU.cpp
@@ -365,9 +365,6 @@
  const llvm::Triple &Triple,

[PATCH] D89478: AMDGPU: Make sure both cc1 and cc1as process -m[no-]code-object-v3

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
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  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/Driver/amdgpu-features-as.s
  clang/test/Driver/amdgpu-features.c

Index: clang/test/Driver/amdgpu-features.c
===
--- clang/test/Driver/amdgpu-features.c
+++ clang/test/Driver/amdgpu-features.c
@@ -6,6 +6,10 @@
 // NO-CODE-OBJECT-V3: warning: argument '-mno-code-object-v3' is deprecated, use '-mllvm --amdhsa-code-object-version=2' instead [-Wdeprecated]
 // NO-CODE-OBJECT-V3: "-mllvm" "--amdhsa-code-object-version=2"
 
+// RUN: %clang -### -target amdgcn-amd-amdhsa -mcpu=gfx700 -mcode-object-v3 -mno-code-object-v3 -mcode-object-v3 %s 2>&1 | FileCheck --check-prefix=MUL-CODE-OBJECT-V3 %s
+// MUL-CODE-OBJECT-V3: warning: argument '-mcode-object-v3' is deprecated, use '-mllvm --amdhsa-code-object-version=3' instead [-Wdeprecated]
+// MUL-CODE-OBJECT-V3: "-mllvm" "--amdhsa-code-object-version=3"
+
 // RUN: %clang -### -target amdgcn-amdhsa -mcpu=gfx900:xnack+ %s 2>&1 | FileCheck --check-prefix=XNACK %s
 // XNACK: "-target-feature" "+xnack"
 
Index: clang/test/Driver/amdgpu-features-as.s
===
--- /dev/null
+++ clang/test/Driver/amdgpu-features-as.s
@@ -0,0 +1,11 @@
+// RUN: %clang -### -target amdgcn-amd-amdhsa -mcpu=gfx900 -mcode-object-v3 %s 2>&1 | FileCheck --check-prefix=CODE-OBJECT-V3 %s
+// CODE-OBJECT-V3: warning: argument '-mcode-object-v3' is deprecated, use '-mllvm --amdhsa-code-object-version=3' instead [-Wdeprecated]
+// CODE-OBJECT-V3: "-mllvm" "--amdhsa-code-object-version=3"
+
+// RUN: %clang -### -target amdgcn-amd-amdhsa amdgcn -mcpu=gfx900 -mno-code-object-v3 %s 2>&1 | FileCheck --check-prefix=NO-CODE-OBJECT-V3 %s
+// NO-CODE-OBJECT-V3: warning: argument '-mno-code-object-v3' is deprecated, use '-mllvm --amdhsa-code-object-version=2' instead [-Wdeprecated]
+// NO-CODE-OBJECT-V3: "-mllvm" "--amdhsa-code-object-version=2"
+
+// RUN: %clang -### -target amdgcn-amd-amdhsa -mcpu=gfx900 -mcode-object-v3 -mno-code-object-v3 -mcode-object-v3 %s 2>&1 | FileCheck --check-prefix=MUL-CODE-OBJECT-V3 %s
+// MUL-CODE-OBJECT-V3: warning: argument '-mcode-object-v3' is deprecated, use '-mllvm --amdhsa-code-object-version=3' instead [-Wdeprecated]
+// MUL-CODE-OBJECT-V3: "-mllvm" "--amdhsa-code-object-version=3"
Index: clang/lib/Driver/ToolChains/Clang.cpp
===
--- clang/lib/Driver/ToolChains/Clang.cpp
+++ clang/lib/Driver/ToolChains/Clang.cpp
@@ -1073,6 +1073,25 @@
   llvm_unreachable("Unknown Reloc::Model kind");
 }
 
+static void HandleAmdgcnLegacyOptions(const Driver &D,
+  const ArgList &Args,
+  ArgStringList &CmdArgs) {
+  if (auto *CodeObjArg = Args.getLastArg(options::OPT_mcode_object_v3_legacy,
+ options::OPT_mno_code_object_v3_legacy)) {
+if (CodeObjArg->getOption().getID() == options::OPT_mcode_object_v3_legacy) {
+  D.Diag(diag::warn_drv_deprecated_arg) << "-mcode-object-v3" <<
+"-mllvm --amdhsa-code-object-version=3";
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("--amdhsa-code-object-version=3");
+} else {
+  D.Diag(diag::warn_drv_deprecated_arg) << "-mno-code-object-v3" <<
+"-mllvm --amdhsa-code-object-version=2";
+  CmdArgs.push_back("-mllvm");
+  CmdArgs.push_back("--amdhsa-code-object-version=2");
+}
+  }
+}
+
 void Clang::AddPreprocessingOptions(Compilation &C, const JobAction &JA,
 const Driver &D, const ArgList &Args,
 ArgStringList &CmdArgs,
@@ -6122,6 +6141,8 @@
 }
   }
 
+  HandleAmdgcnLegacyOptions(D, Args, CmdArgs);
+
   // For all the host OpenMP offloading compile jobs we need to pass the targets
   // information using -fopenmp-targets= option.
   if (JA.isHostOffloading(Action::OFK_OpenMP)) {
@@ -7085,6 +7106,8 @@
 CmdArgs.push_back(SplitDebugName(JA, Args, Input, Output));
   }
 
+  HandleAmdgcnLegacyOptions(D, Args, CmdArgs);
+
   assert(Input.isFilename() && "Invalid input.");
   CmdArgs.push_back(Input.getFilename());
 
Index: clang/lib/Driver/ToolChains/AMDGPU.cpp
===
--- clang/lib/Driver/ToolChains/AMDGPU.cpp
+++ clang/lib/Driver/ToolChains/AMDGPU.cpp
@@ -525,19 +525,6 @@
 CC1Args.push_back("hidden");
 CC1Args.push_back("-fapply-global-visibility-to-externs");
   }
-
-  if (Drive

[PATCH] D89484: [AMDGPU][HIP] Switch default DWARF version to 5

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
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[PATCH] D91310: [AMDGPU] Add -mcode-object-version=n

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[PATCH] D92434: [NFC][AMDGPU] AMDGPU code object V4 ABI documentation

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
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[PATCH] D92441: Add CLangOffloadBundler documentation to Clang index

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[PATCH] D90364: [AMDGPU] Update AMD GPU documentation

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl accepted this revision.
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[PATCH] D102306: Add gfx1034

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a subscriber: t-tye.
kzhuravl added a comment.

In D102306#2760806 , @tra wrote:

> In D102306#2760775 , @msearles 
> wrote:
>
>> In D102306#2758166 , 
>> @JonChesterfield wrote:
>>
>>> Is there documentation for the mapping from product names to gfx numbers?
>>
>> See the Processors section of https://llvm.org/docs/AMDGPUUsage.html
>
> It appears to be missing some GPUs. None of WX series are listed, for example.

+ @t-tye

@t-tye usually updates product names as they become available.


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[PATCH] D102306: Add gfx1034

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: llvm/include/llvm/BinaryFormat/ELF.h:737
   EF_AMDGPU_MACH_AMDGCN_GFX1033   = 0x039,
+  EF_AMDGPU_MACH_AMDGCN_GFX1034   = 0x03e,
   EF_AMDGPU_MACH_AMDGCN_GFX602= 0x03a,

For future reference, MACH values are sorted by value, reserved MACHs need to 
be replaced with real MACHs (see line 742 in this review).


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[PATCH] D96906: [AMDGPU] gfx90a support

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll:23
+
+; CO-V3: .amdhsa_system_vgpr_workitem_id 0
+; PACKED-TID: .amdhsa_system_vgpr_workitem_id 0

foad wrote:
> CO-V3 isn't tested by any RUN line. I think FileCheck might complain about 
> this in future.
Thanks for spotting this. I think issue was introduced in one of the merges 
from trunk. Fixed in https://reviews.llvm.org/D96967



Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll:41
+
+; UNPACKED-TID-NOT: v1
+; UNPACKED-TID: {{buffer|flat}}_store_dword {{.*}}v1

foad wrote:
> UNPACKED-TID isn't tested by any RUN line.
Thanks for spotting this. I think issue was introduced in one of the merges 
from trunk. Fixed in https://reviews.llvm.org/D96967


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[PATCH] D96906: [AMDGPU] gfx90a support

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

> The point is that nobody upstream even got a chance to chime in.

We are and will be taking care of any feedback provided in this review 
post-commit.


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[PATCH] D96906: [AMDGPU] gfx90a support

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: llvm/include/llvm/BinaryFormat/ELF.h:737
   EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
-  EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX805,
+  EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX90A,
 

tra wrote:
> Nit: This looks odd. GFX90A does not need to be in the middle of the list. It 
> makes it somewhat confusing to tell which ID is really the last. The `_LAST` 
> enum says it's GFX90A, but it's not the last item of the list. There are 
> already out-of-name-order GPUs at the end of the list, so putting 90A at the 
> end would probably be a better choice. At least we'd still have the numeric 
> values in order. Right now the list is ordered neither by the name nor by the 
> value.
> 
> There's also a question of whether something needs to be done about the 
> missing values 0x3c..0x3e. Presumably the `_FIRST`..`_LAST` enums specify the 
> range we'll use to iterate over the GPU IDs. Do we handle the missing values 
> correctly?
> 
> Looks like it's benign at the moment as we're only using it to return amdgcn 
> triple in ELFObjectFile.h. I'd add the placeholder enums for the 
> reserved/unused values within the range.
> 
https://reviews.llvm.org/D97010


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[PATCH] D96906: [AMDGPU] gfx90a support

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: clang/include/clang/Driver/Options.td:3097-3101
+def mtgsplit : Flag<["-"], "mtgsplit">, Group,
+  HelpText<"Enable threadgroup split execution mode (AMDGPU only)">;
+def mno_tgsplit : Flag<["-"], "mno-tgsplit">, Group,
+  HelpText<"Disable threadgroup split execution mode (AMDGPU only)">;
+

tra wrote:
> We have `BoolFOption` to generate `-fsomething` and `-fno-something`
The reason we use m_amdgpu_Features_Group is it is getting transformed to 
target features (-mtgsplit to +tgsplit, mno-tgsplit to -tgsplit. For example, 
tgsplit target feature in AMDGPU backend:

https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/AMDGPU.td#L157

Does BoolFOption get translated to target features as well?


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[PATCH] D96906: [AMDGPU] gfx90a support

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: clang/include/clang/Driver/Options.td:3097-3101
+def mtgsplit : Flag<["-"], "mtgsplit">, Group,
+  HelpText<"Enable threadgroup split execution mode (AMDGPU only)">;
+def mno_tgsplit : Flag<["-"], "mno-tgsplit">, Group,
+  HelpText<"Disable threadgroup split execution mode (AMDGPU only)">;
+

kzhuravl wrote:
> tra wrote:
> > We have `BoolFOption` to generate `-fsomething` and `-fno-something`
> The reason we use m_amdgpu_Features_Group is it is getting transformed to 
> target features (-mtgsplit to +tgsplit, mno-tgsplit to -tgsplit. For example, 
> tgsplit target feature in AMDGPU backend:
> 
> https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/AMDGPU.td#L157
> 
> Does BoolFOption get translated to target features as well?
Quickly glancing over Options.td, BoolFOption is in f_group, and does not get 
automatically converted to target-features


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[PATCH] D96906: [AMDGPU] gfx90a support

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: clang/include/clang/Driver/Options.td:3097-3101
+def mtgsplit : Flag<["-"], "mtgsplit">, Group,
+  HelpText<"Enable threadgroup split execution mode (AMDGPU only)">;
+def mno_tgsplit : Flag<["-"], "mno-tgsplit">, Group,
+  HelpText<"Disable threadgroup split execution mode (AMDGPU only)">;
+

kzhuravl wrote:
> rampitec wrote:
> > kzhuravl wrote:
> > > kzhuravl wrote:
> > > > tra wrote:
> > > > > We have `BoolFOption` to generate `-fsomething` and `-fno-something`
> > > > The reason we use m_amdgpu_Features_Group is it is getting transformed 
> > > > to target features (-mtgsplit to +tgsplit, mno-tgsplit to -tgsplit. For 
> > > > example, tgsplit target feature in AMDGPU backend:
> > > > 
> > > > https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/AMDGPU.td#L157
> > > > 
> > > > Does BoolFOption get translated to target features as well?
> > > Quickly glancing over Options.td, BoolFOption is in f_group, and does not 
> > > get automatically converted to target-features
> > We could probably create similar BoolMOption. This is not only tgsplit, 
> > there are plenty of such binary options around.
> agreed, seems like a good choice given there is BoolFOption, BoolGOption
but it will still need to be in m_amdgpu_Features_Group because 
https://github.com/llvm/llvm-project/blob/main/clang/lib/Driver/ToolChains/AMDGPU.cpp#L403
 unless we want to switch away from that. so maybe make a group an optional, 
last template parameter to BoolMOption?


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[PATCH] D96906: [AMDGPU] gfx90a support

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: clang/include/clang/Driver/Options.td:3097-3101
+def mtgsplit : Flag<["-"], "mtgsplit">, Group,
+  HelpText<"Enable threadgroup split execution mode (AMDGPU only)">;
+def mno_tgsplit : Flag<["-"], "mno-tgsplit">, Group,
+  HelpText<"Disable threadgroup split execution mode (AMDGPU only)">;
+

kzhuravl wrote:
> kzhuravl wrote:
> > rampitec wrote:
> > > kzhuravl wrote:
> > > > kzhuravl wrote:
> > > > > tra wrote:
> > > > > > We have `BoolFOption` to generate `-fsomething` and `-fno-something`
> > > > > The reason we use m_amdgpu_Features_Group is it is getting 
> > > > > transformed to target features (-mtgsplit to +tgsplit, mno-tgsplit to 
> > > > > -tgsplit. For example, tgsplit target feature in AMDGPU backend:
> > > > > 
> > > > > https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/AMDGPU.td#L157
> > > > > 
> > > > > Does BoolFOption get translated to target features as well?
> > > > Quickly glancing over Options.td, BoolFOption is in f_group, and does 
> > > > not get automatically converted to target-features
> > > We could probably create similar BoolMOption. This is not only tgsplit, 
> > > there are plenty of such binary options around.
> > agreed, seems like a good choice given there is BoolFOption, BoolGOption
> but it will still need to be in m_amdgpu_Features_Group because 
> https://github.com/llvm/llvm-project/blob/main/clang/lib/Driver/ToolChains/AMDGPU.cpp#L403
>  unless we want to switch away from that. so maybe make a group an optional, 
> last template parameter to BoolMOption?
Other targets also have its own corresponding groups: 
https://github.com/llvm/llvm-project/blob/main/clang/include/clang/Driver/Options.td#L151


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[PATCH] D96906: [AMDGPU] gfx90a support

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: clang/include/clang/Driver/Options.td:3097-3101
+def mtgsplit : Flag<["-"], "mtgsplit">, Group,
+  HelpText<"Enable threadgroup split execution mode (AMDGPU only)">;
+def mno_tgsplit : Flag<["-"], "mno-tgsplit">, Group,
+  HelpText<"Disable threadgroup split execution mode (AMDGPU only)">;
+

rampitec wrote:
> kzhuravl wrote:
> > kzhuravl wrote:
> > > tra wrote:
> > > > We have `BoolFOption` to generate `-fsomething` and `-fno-something`
> > > The reason we use m_amdgpu_Features_Group is it is getting transformed to 
> > > target features (-mtgsplit to +tgsplit, mno-tgsplit to -tgsplit. For 
> > > example, tgsplit target feature in AMDGPU backend:
> > > 
> > > https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/AMDGPU.td#L157
> > > 
> > > Does BoolFOption get translated to target features as well?
> > Quickly glancing over Options.td, BoolFOption is in f_group, and does not 
> > get automatically converted to target-features
> We could probably create similar BoolMOption. This is not only tgsplit, there 
> are plenty of such binary options around.
agreed, seems like a good choice given there is BoolFOption, BoolGOption


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[PATCH] D96906: [AMDGPU] gfx90a support

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: clang/include/clang/Driver/Options.td:3097-3101
+def mtgsplit : Flag<["-"], "mtgsplit">, Group,
+  HelpText<"Enable threadgroup split execution mode (AMDGPU only)">;
+def mno_tgsplit : Flag<["-"], "mno-tgsplit">, Group,
+  HelpText<"Disable threadgroup split execution mode (AMDGPU only)">;
+

rampitec wrote:
> kzhuravl wrote:
> > kzhuravl wrote:
> > > kzhuravl wrote:
> > > > rampitec wrote:
> > > > > kzhuravl wrote:
> > > > > > kzhuravl wrote:
> > > > > > > tra wrote:
> > > > > > > > We have `BoolFOption` to generate `-fsomething` and 
> > > > > > > > `-fno-something`
> > > > > > > The reason we use m_amdgpu_Features_Group is it is getting 
> > > > > > > transformed to target features (-mtgsplit to +tgsplit, 
> > > > > > > mno-tgsplit to -tgsplit. For example, tgsplit target feature in 
> > > > > > > AMDGPU backend:
> > > > > > > 
> > > > > > > https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/AMDGPU.td#L157
> > > > > > > 
> > > > > > > Does BoolFOption get translated to target features as well?
> > > > > > Quickly glancing over Options.td, BoolFOption is in f_group, and 
> > > > > > does not get automatically converted to target-features
> > > > > We could probably create similar BoolMOption. This is not only 
> > > > > tgsplit, there are plenty of such binary options around.
> > > > agreed, seems like a good choice given there is BoolFOption, BoolGOption
> > > but it will still need to be in m_amdgpu_Features_Group because 
> > > https://github.com/llvm/llvm-project/blob/main/clang/lib/Driver/ToolChains/AMDGPU.cpp#L403
> > >  unless we want to switch away from that. so maybe make a group an 
> > > optional, last template parameter to BoolMOption?
> > Other targets also have its own corresponding groups: 
> > https://github.com/llvm/llvm-project/blob/main/clang/include/clang/Driver/Options.td#L151
> Looks like. It is not just the same thing as BoolFOption or BoolGOption.
@tra , do you have any suggestion based on the comments above? thanks.


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[PATCH] D103658: CUDA/HIP: Change device-use-host-var.cu's NOT "external" check to include "addrspace"

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
kzhuravl added a reviewer: yaxunl.
kzhuravl requested review of this revision.
Herald added a subscriber: wdng.

Otherwise it is causing one of our build jobs to fail, it is using "external" 
as directory, and NOT is failing because "external" is found in ModuleID.


https://reviews.llvm.org/D103658

Files:
  clang/test/CodeGenCUDA/device-use-host-var.cu


Index: clang/test/CodeGenCUDA/device-use-host-var.cu
===
--- clang/test/CodeGenCUDA/device-use-host-var.cu
+++ clang/test/CodeGenCUDA/device-use-host-var.cu
@@ -65,7 +65,7 @@
 // NEG-NOT: @_ZN1BIiE1yE
 // NEG-NOT: @_Z1bIdE
 // NEG-NOT: @_ZL13var_host_only
-// NEG-NOT: external
+// NEG-NOT: external addrspace
 
 // CHECK-LABEL: define{{.*}}@_Z7dev_funPiPPKi
 // CHECK: store i32 1


Index: clang/test/CodeGenCUDA/device-use-host-var.cu
===
--- clang/test/CodeGenCUDA/device-use-host-var.cu
+++ clang/test/CodeGenCUDA/device-use-host-var.cu
@@ -65,7 +65,7 @@
 // NEG-NOT: @_ZN1BIiE1yE
 // NEG-NOT: @_Z1bIdE
 // NEG-NOT: @_ZL13var_host_only
-// NEG-NOT: external
+// NEG-NOT: external addrspace
 
 // CHECK-LABEL: define{{.*}}@_Z7dev_funPiPPKi
 // CHECK: store i32 1
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[PATCH] D103658: CUDA/HIP: Change device-use-host-var.cu's NOT "external" check to include "addrspace"

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl updated this revision to Diff 349732.
kzhuravl marked an inline comment as done.
kzhuravl added a comment.

Address review feedback.


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Files:
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Index: clang/test/CodeGenCUDA/device-use-host-var.cu
===
--- clang/test/CodeGenCUDA/device-use-host-var.cu
+++ clang/test/CodeGenCUDA/device-use-host-var.cu
@@ -65,7 +65,7 @@
 // NEG-NOT: @_ZN1BIiE1yE
 // NEG-NOT: @_Z1bIdE
 // NEG-NOT: @_ZL13var_host_only
-// NEG-NOT: external
+// NEG-NOT: {{^}}@{{.*}} = external
 
 // CHECK-LABEL: define{{.*}}@_Z7dev_funPiPPKi
 // CHECK: store i32 1


Index: clang/test/CodeGenCUDA/device-use-host-var.cu
===
--- clang/test/CodeGenCUDA/device-use-host-var.cu
+++ clang/test/CodeGenCUDA/device-use-host-var.cu
@@ -65,7 +65,7 @@
 // NEG-NOT: @_ZN1BIiE1yE
 // NEG-NOT: @_Z1bIdE
 // NEG-NOT: @_ZL13var_host_only
-// NEG-NOT: external
+// NEG-NOT: {{^}}@{{.*}} = external
 
 // CHECK-LABEL: define{{.*}}@_Z7dev_funPiPPKi
 // CHECK: store i32 1
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[PATCH] D103658: CUDA/HIP: Change device-use-host-var.cu's NOT "external" check to include "addrspace"

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG4d9f8527dbfb: CUDA/HIP: Change device-use-host-var.cu's 
NOT "external" check to include… (authored by kzhuravl).
Herald added a project: clang.

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Files:
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Index: clang/test/CodeGenCUDA/device-use-host-var.cu
===
--- clang/test/CodeGenCUDA/device-use-host-var.cu
+++ clang/test/CodeGenCUDA/device-use-host-var.cu
@@ -65,7 +65,7 @@
 // NEG-NOT: @_ZN1BIiE1yE
 // NEG-NOT: @_Z1bIdE
 // NEG-NOT: @_ZL13var_host_only
-// NEG-NOT: external
+// NEG-NOT: {{^}}@{{.*}} = external
 
 // CHECK-LABEL: define{{.*}}@_Z7dev_funPiPPKi
 // CHECK: store i32 1


Index: clang/test/CodeGenCUDA/device-use-host-var.cu
===
--- clang/test/CodeGenCUDA/device-use-host-var.cu
+++ clang/test/CodeGenCUDA/device-use-host-var.cu
@@ -65,7 +65,7 @@
 // NEG-NOT: @_ZN1BIiE1yE
 // NEG-NOT: @_Z1bIdE
 // NEG-NOT: @_ZL13var_host_only
-// NEG-NOT: external
+// NEG-NOT: {{^}}@{{.*}} = external
 
 // CHECK-LABEL: define{{.*}}@_Z7dev_funPiPPKi
 // CHECK: store i32 1
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[PATCH] D39857: [AMDGPU] Late parsed / dependent arguments for AMDGPU kernel attributes

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a subscriber: cfe-commits.
kzhuravl added a reviewer: aaron.ballman.
kzhuravl added a comment.

Hi Alex, can you rebase on top of trunk (I think you brought in some extra 
changes from hcc branch) and upload a full diff?




Comment at: include/clang/Basic/Attr.td:1328
+  ExprArgument<"Max", 1>,
   StringArgument<"ISA", 1>];
   let Documentation = [AMDGPUFlatWorkGroupSizeDocs];

Not in trunk.



Comment at: include/clang/Basic/Attr.td:1339
+  ExprArgument<"Max", 1>,
   StringArgument<"ISA", 1>];
   let Documentation = [AMDGPUWavesPerEUDocs];

Not in trunk.



Comment at: include/clang/Basic/Attr.td:1361-1370
+def AMDGPUMaxWorkGroupDim : InheritableAttr {
   let Spellings = [CXX11<"","hc_max_workgroup_dim", 201511>];
-  let Args = [IntArgument<"X">,
-  IntArgument<"Y", 1>,
-  IntArgument<"Z", 1>,
+  let Args = [ExprArgument<"X">,
+  ExprArgument<"Y">,
+  ExprArgument<"Z">,
   StringArgument<"ISA", 1>];
   let Subjects = SubjectList<[Function], ErrorDiag>;

Not in trunk.


https://reviews.llvm.org/D39857



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[PATCH] D39877: AMDGPU/NFC: Move getAMDGPUTargetFeatures to AMDGPU toolchain

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
Herald added subscribers: tpr, dstuttard, yaxunl, nhaehnle, wdng.

https://reviews.llvm.org/D39877

Files:
  lib/Driver/ToolChains/AMDGPU.cpp
  lib/Driver/ToolChains/AMDGPU.h
  lib/Driver/ToolChains/Clang.cpp

Index: lib/Driver/ToolChains/Clang.cpp
===
--- lib/Driver/ToolChains/Clang.cpp
+++ lib/Driver/ToolChains/Clang.cpp
@@ -15,6 +15,7 @@
 #include "Arch/Sparc.h"
 #include "Arch/SystemZ.h"
 #include "Arch/X86.h"
+#include "AMDGPU.h"
 #include "CommonArgs.h"
 #include "Hexagon.h"
 #include "InputInfo.h"
@@ -278,23 +279,6 @@
   handleTargetFeaturesGroup(Args, Features, options::OPT_m_wasm_Features_Group);
 }
 
-static void getAMDGPUTargetFeatures(const Driver &D, const ArgList &Args,
-std::vector &Features) {
-  if (const Arg *dAbi = Args.getLastArg(options::OPT_mamdgpu_debugger_abi)) {
-StringRef value = dAbi->getValue();
-if (value == "1.0") {
-  Features.push_back("+amdgpu-debugger-insert-nops");
-  Features.push_back("+amdgpu-debugger-reserve-regs");
-  Features.push_back("+amdgpu-debugger-emit-prologue");
-} else {
-  D.Diag(diag::err_drv_clang_unsupported) << dAbi->getAsString(Args);
-}
-  }
-
-  handleTargetFeaturesGroup(
-Args, Features, options::OPT_m_amdgpu_Features_Group);
-}
-
 static void getTargetFeatures(const ToolChain &TC, const llvm::Triple &Triple,
   const ArgList &Args, ArgStringList &CmdArgs,
   bool ForAS) {
@@ -347,7 +331,7 @@
 break;
   case llvm::Triple::r600:
   case llvm::Triple::amdgcn:
-getAMDGPUTargetFeatures(D, Args, Features);
+amdgpu::getAMDGPUTargetFeatures(D, Args, Features);
 break;
   }
 
Index: lib/Driver/ToolChains/AMDGPU.h
===
--- lib/Driver/ToolChains/AMDGPU.h
+++ lib/Driver/ToolChains/AMDGPU.h
@@ -19,7 +19,6 @@
 namespace clang {
 namespace driver {
 namespace tools {
-
 namespace amdgpu {
 
 class LLVM_LIBRARY_VISIBILITY Linker : public GnuTool {
@@ -33,6 +32,9 @@
 const char *LinkingOutput) const override;
 };
 
+void getAMDGPUTargetFeatures(const Driver &D, const llvm::opt::ArgList &Args,
+ std::vector &Features);
+
 } // end namespace amdgpu
 } // end namespace tools
 
Index: lib/Driver/ToolChains/AMDGPU.cpp
===
--- lib/Driver/ToolChains/AMDGPU.cpp
+++ lib/Driver/ToolChains/AMDGPU.cpp
@@ -11,6 +11,7 @@
 #include "CommonArgs.h"
 #include "InputInfo.h"
 #include "clang/Driver/Compilation.h"
+#include "clang/Driver/DriverDiagnostic.h"
 #include "llvm/Option/ArgList.h"
 
 using namespace clang::driver;
@@ -35,6 +36,24 @@
   CmdArgs, Inputs));
 }
 
+void amdgpu::getAMDGPUTargetFeatures(const Driver &D,
+ const llvm::opt::ArgList &Args,
+ std::vector &Features) {
+  if (const Arg *dAbi = Args.getLastArg(options::OPT_mamdgpu_debugger_abi)) {
+StringRef value = dAbi->getValue();
+if (value == "1.0") {
+  Features.push_back("+amdgpu-debugger-insert-nops");
+  Features.push_back("+amdgpu-debugger-reserve-regs");
+  Features.push_back("+amdgpu-debugger-emit-prologue");
+} else {
+  D.Diag(diag::err_drv_clang_unsupported) << dAbi->getAsString(Args);
+}
+  }
+
+  handleTargetFeaturesGroup(
+Args, Features, options::OPT_m_amdgpu_Features_Group);
+}
+
 /// AMDGPU Toolchain
 AMDGPUToolChain::AMDGPUToolChain(const Driver &D, const llvm::Triple &Triple,
  const ArgList &Args)
___
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[PATCH] D39878: AMDGPU: Add -mxnack/-mno-xnack options that set +/-xnack feature

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
Herald added subscribers: tpr, dstuttard, yaxunl, nhaehnle, wdng.

https://reviews.llvm.org/D39878

Files:
  include/clang/Driver/Options.td
  test/Driver/amdgpu-features.c


Index: test/Driver/amdgpu-features.c
===
--- test/Driver/amdgpu-features.c
+++ test/Driver/amdgpu-features.c
@@ -5,3 +5,9 @@
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri 
-mamdgpu-debugger-abi=1.0 %s -o - 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-1-0 %s
 // CHECK-MAMDGPU-DEBUGGER-ABI-1-0: "-target-feature" 
"+amdgpu-debugger-insert-nops" "-target-feature" 
"+amdgpu-debugger-reserve-regs" "-target-feature" 
"+amdgpu-debugger-emit-prologue"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mxnack %s 2>&1 | FileCheck 
--check-prefix=XNACK %s
+// XNACK: "-target-feature" "+xnack"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-xnack %s 2>&1 | FileCheck 
--check-prefix=NO-XNACK %s
+// NO-XNACK: "-target-feature" "-xnack"
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1822,7 +1822,6 @@
 
 def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, 
Group,
   HelpText<"Generate code which only uses the general purpose registers 
(AArch64 only)">;
-
 def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">,
   Group,
   HelpText<"Workaround Cortex-A53 erratum 835769 (AArch64 only)">;
@@ -1840,6 +1839,10 @@
   Group,
   HelpText<"Generate additional code for specified  of debugger ABI 
(AMDGPU only)">,
   MetaVarName<"">;
+def mxnack : Flag<["-"], "mxnack">, Group,
+  HelpText<"Enable XNACK (AMDGPU only)">;
+def mno_xnack : Flag<["-"], "mno-xnack">, Group,
+  HelpText<"Disable XNACK (AMDGPU only)">;
 
 def faltivec : Flag<["-"], "faltivec">, Group, Flags<[DriverOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, 
Flags<[DriverOption]>;


Index: test/Driver/amdgpu-features.c
===
--- test/Driver/amdgpu-features.c
+++ test/Driver/amdgpu-features.c
@@ -5,3 +5,9 @@
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri -mamdgpu-debugger-abi=1.0 %s -o - 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-1-0 %s
 // CHECK-MAMDGPU-DEBUGGER-ABI-1-0: "-target-feature" "+amdgpu-debugger-insert-nops" "-target-feature" "+amdgpu-debugger-reserve-regs" "-target-feature" "+amdgpu-debugger-emit-prologue"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mxnack %s 2>&1 | FileCheck --check-prefix=XNACK %s
+// XNACK: "-target-feature" "+xnack"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-xnack %s 2>&1 | FileCheck --check-prefix=NO-XNACK %s
+// NO-XNACK: "-target-feature" "-xnack"
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1822,7 +1822,6 @@
 
 def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, Group,
   HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">;
-
 def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">,
   Group,
   HelpText<"Workaround Cortex-A53 erratum 835769 (AArch64 only)">;
@@ -1840,6 +1839,10 @@
   Group,
   HelpText<"Generate additional code for specified  of debugger ABI (AMDGPU only)">,
   MetaVarName<"">;
+def mxnack : Flag<["-"], "mxnack">, Group,
+  HelpText<"Enable XNACK (AMDGPU only)">;
+def mno_xnack : Flag<["-"], "mno-xnack">, Group,
+  HelpText<"Disable XNACK (AMDGPU only)">;
 
 def faltivec : Flag<["-"], "faltivec">, Group, Flags<[DriverOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, Flags<[DriverOption]>;
___
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[PATCH] D39879: AMDGPU: Remove -mamdgpu-debugger-abi option

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
Herald added subscribers: tpr, dstuttard, yaxunl, nhaehnle, wdng.

https://reviews.llvm.org/D39879

Files:
  include/clang/Driver/Options.td
  lib/Driver/ToolChains/AMDGPU.cpp
  test/Driver/amdgpu-features.c


Index: test/Driver/amdgpu-features.c
===
--- test/Driver/amdgpu-features.c
+++ test/Driver/amdgpu-features.c
@@ -1,11 +1,3 @@
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri 
-mamdgpu-debugger-abi=0.0 %s -o - 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-0-0 %s
-// CHECK-MAMDGPU-DEBUGGER-ABI-0-0: the clang compiler does not support 
'-mamdgpu-debugger-abi=0.0'
-
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri 
-mamdgpu-debugger-abi=1.0 %s -o - 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-1-0 %s
-// CHECK-MAMDGPU-DEBUGGER-ABI-1-0: "-target-feature" 
"+amdgpu-debugger-insert-nops" "-target-feature" 
"+amdgpu-debugger-reserve-regs" "-target-feature" 
"+amdgpu-debugger-emit-prologue"
-
 // RUN: %clang -### -target amdgcn -mcpu=gfx700 -mxnack %s 2>&1 | FileCheck 
--check-prefix=XNACK %s
 // XNACK: "-target-feature" "+xnack"
 
Index: lib/Driver/ToolChains/AMDGPU.cpp
===
--- lib/Driver/ToolChains/AMDGPU.cpp
+++ lib/Driver/ToolChains/AMDGPU.cpp
@@ -39,17 +39,6 @@
 void amdgpu::getAMDGPUTargetFeatures(const Driver &D,
  const llvm::opt::ArgList &Args,
  std::vector &Features) {
-  if (const Arg *dAbi = Args.getLastArg(options::OPT_mamdgpu_debugger_abi)) {
-StringRef value = dAbi->getValue();
-if (value == "1.0") {
-  Features.push_back("+amdgpu-debugger-insert-nops");
-  Features.push_back("+amdgpu-debugger-reserve-regs");
-  Features.push_back("+amdgpu-debugger-emit-prologue");
-} else {
-  D.Diag(diag::err_drv_clang_unsupported) << dAbi->getAsString(Args);
-}
-  }
-
   handleTargetFeaturesGroup(
 Args, Features, options::OPT_m_amdgpu_Features_Group);
 }
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1834,11 +1834,6 @@
 def msimd128 : Flag<["-"], "msimd128">, Group;
 def mno_simd128 : Flag<["-"], "mno-simd128">, Group;
 
-def mamdgpu_debugger_abi : Joined<["-"], "mamdgpu-debugger-abi=">,
-  Flags<[HelpHidden]>,
-  Group,
-  HelpText<"Generate additional code for specified  of debugger ABI 
(AMDGPU only)">,
-  MetaVarName<"">;
 def mxnack : Flag<["-"], "mxnack">, Group,
   HelpText<"Enable XNACK (AMDGPU only)">;
 def mno_xnack : Flag<["-"], "mno-xnack">, Group,


Index: test/Driver/amdgpu-features.c
===
--- test/Driver/amdgpu-features.c
+++ test/Driver/amdgpu-features.c
@@ -1,11 +1,3 @@
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri -mamdgpu-debugger-abi=0.0 %s -o - 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-0-0 %s
-// CHECK-MAMDGPU-DEBUGGER-ABI-0-0: the clang compiler does not support '-mamdgpu-debugger-abi=0.0'
-
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri -mamdgpu-debugger-abi=1.0 %s -o - 2>&1 \
-// RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-1-0 %s
-// CHECK-MAMDGPU-DEBUGGER-ABI-1-0: "-target-feature" "+amdgpu-debugger-insert-nops" "-target-feature" "+amdgpu-debugger-reserve-regs" "-target-feature" "+amdgpu-debugger-emit-prologue"
-
 // RUN: %clang -### -target amdgcn -mcpu=gfx700 -mxnack %s 2>&1 | FileCheck --check-prefix=XNACK %s
 // XNACK: "-target-feature" "+xnack"
 
Index: lib/Driver/ToolChains/AMDGPU.cpp
===
--- lib/Driver/ToolChains/AMDGPU.cpp
+++ lib/Driver/ToolChains/AMDGPU.cpp
@@ -39,17 +39,6 @@
 void amdgpu::getAMDGPUTargetFeatures(const Driver &D,
  const llvm::opt::ArgList &Args,
  std::vector &Features) {
-  if (const Arg *dAbi = Args.getLastArg(options::OPT_mamdgpu_debugger_abi)) {
-StringRef value = dAbi->getValue();
-if (value == "1.0") {
-  Features.push_back("+amdgpu-debugger-insert-nops");
-  Features.push_back("+amdgpu-debugger-reserve-regs");
-  Features.push_back("+amdgpu-debugger-emit-prologue");
-} else {
-  D.Diag(diag::err_drv_clang_unsupported) << dAbi->getAsString(Args);
-}
-  }
-
   handleTargetFeaturesGroup(
 Args, Features, options::OPT_m_amdgpu_Features_Group);
 }
Index: include/clang/Driver/Options.td
===
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1834,11 +1834,6 @@
 def msimd128 : Flag<["-"], "msimd128">, Group;
 def mno_simd128 : Flag<["-"], "mno-simd128">, Group

[PATCH] D39877: AMDGPU/NFC: Move getAMDGPUTargetFeatures to AMDGPU toolchain

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL317909: AMDGPU/NFC: Move getAMDGPUTargetFeatures to AMDGPU 
toolchain (authored by kzhuravl).

Changed prior to commit:
  https://reviews.llvm.org/D39877?vs=122354&id=122487#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D39877

Files:
  cfe/trunk/lib/Driver/ToolChains/AMDGPU.cpp
  cfe/trunk/lib/Driver/ToolChains/AMDGPU.h
  cfe/trunk/lib/Driver/ToolChains/Clang.cpp

Index: cfe/trunk/lib/Driver/ToolChains/AMDGPU.cpp
===
--- cfe/trunk/lib/Driver/ToolChains/AMDGPU.cpp
+++ cfe/trunk/lib/Driver/ToolChains/AMDGPU.cpp
@@ -11,6 +11,7 @@
 #include "CommonArgs.h"
 #include "InputInfo.h"
 #include "clang/Driver/Compilation.h"
+#include "clang/Driver/DriverDiagnostic.h"
 #include "llvm/Option/ArgList.h"
 
 using namespace clang::driver;
@@ -35,6 +36,24 @@
   CmdArgs, Inputs));
 }
 
+void amdgpu::getAMDGPUTargetFeatures(const Driver &D,
+ const llvm::opt::ArgList &Args,
+ std::vector &Features) {
+  if (const Arg *dAbi = Args.getLastArg(options::OPT_mamdgpu_debugger_abi)) {
+StringRef value = dAbi->getValue();
+if (value == "1.0") {
+  Features.push_back("+amdgpu-debugger-insert-nops");
+  Features.push_back("+amdgpu-debugger-reserve-regs");
+  Features.push_back("+amdgpu-debugger-emit-prologue");
+} else {
+  D.Diag(diag::err_drv_clang_unsupported) << dAbi->getAsString(Args);
+}
+  }
+
+  handleTargetFeaturesGroup(
+Args, Features, options::OPT_m_amdgpu_Features_Group);
+}
+
 /// AMDGPU Toolchain
 AMDGPUToolChain::AMDGPUToolChain(const Driver &D, const llvm::Triple &Triple,
  const ArgList &Args)
Index: cfe/trunk/lib/Driver/ToolChains/AMDGPU.h
===
--- cfe/trunk/lib/Driver/ToolChains/AMDGPU.h
+++ cfe/trunk/lib/Driver/ToolChains/AMDGPU.h
@@ -19,7 +19,6 @@
 namespace clang {
 namespace driver {
 namespace tools {
-
 namespace amdgpu {
 
 class LLVM_LIBRARY_VISIBILITY Linker : public GnuTool {
@@ -33,6 +32,9 @@
 const char *LinkingOutput) const override;
 };
 
+void getAMDGPUTargetFeatures(const Driver &D, const llvm::opt::ArgList &Args,
+ std::vector &Features);
+
 } // end namespace amdgpu
 } // end namespace tools
 
Index: cfe/trunk/lib/Driver/ToolChains/Clang.cpp
===
--- cfe/trunk/lib/Driver/ToolChains/Clang.cpp
+++ cfe/trunk/lib/Driver/ToolChains/Clang.cpp
@@ -15,6 +15,7 @@
 #include "Arch/Sparc.h"
 #include "Arch/SystemZ.h"
 #include "Arch/X86.h"
+#include "AMDGPU.h"
 #include "CommonArgs.h"
 #include "Hexagon.h"
 #include "InputInfo.h"
@@ -278,23 +279,6 @@
   handleTargetFeaturesGroup(Args, Features, options::OPT_m_wasm_Features_Group);
 }
 
-static void getAMDGPUTargetFeatures(const Driver &D, const ArgList &Args,
-std::vector &Features) {
-  if (const Arg *dAbi = Args.getLastArg(options::OPT_mamdgpu_debugger_abi)) {
-StringRef value = dAbi->getValue();
-if (value == "1.0") {
-  Features.push_back("+amdgpu-debugger-insert-nops");
-  Features.push_back("+amdgpu-debugger-reserve-regs");
-  Features.push_back("+amdgpu-debugger-emit-prologue");
-} else {
-  D.Diag(diag::err_drv_clang_unsupported) << dAbi->getAsString(Args);
-}
-  }
-
-  handleTargetFeaturesGroup(
-Args, Features, options::OPT_m_amdgpu_Features_Group);
-}
-
 static void getTargetFeatures(const ToolChain &TC, const llvm::Triple &Triple,
   const ArgList &Args, ArgStringList &CmdArgs,
   bool ForAS) {
@@ -347,7 +331,7 @@
 break;
   case llvm::Triple::r600:
   case llvm::Triple::amdgcn:
-getAMDGPUTargetFeatures(D, Args, Features);
+amdgpu::getAMDGPUTargetFeatures(D, Args, Features);
 break;
   }
 
___
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[PATCH] D39878: AMDGPU: Add -mxnack/-mno-xnack options that set +/-xnack feature

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL317917: AMDGPU: Add -mxnack/-mno-xnack options that set 
+/-xnack feature (authored by kzhuravl).

Changed prior to commit:
  https://reviews.llvm.org/D39878?vs=122355&id=122489#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D39878

Files:
  cfe/trunk/include/clang/Driver/Options.td
  cfe/trunk/test/Driver/amdgpu-features.c


Index: cfe/trunk/include/clang/Driver/Options.td
===
--- cfe/trunk/include/clang/Driver/Options.td
+++ cfe/trunk/include/clang/Driver/Options.td
@@ -1822,7 +1822,6 @@
 
 def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, 
Group,
   HelpText<"Generate code which only uses the general purpose registers 
(AArch64 only)">;
-
 def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">,
   Group,
   HelpText<"Workaround Cortex-A53 erratum 835769 (AArch64 only)">;
@@ -1840,6 +1839,10 @@
   Group,
   HelpText<"Generate additional code for specified  of debugger ABI 
(AMDGPU only)">,
   MetaVarName<"">;
+def mxnack : Flag<["-"], "mxnack">, Group,
+  HelpText<"Enable XNACK (AMDGPU only)">;
+def mno_xnack : Flag<["-"], "mno-xnack">, Group,
+  HelpText<"Disable XNACK (AMDGPU only)">;
 
 def faltivec : Flag<["-"], "faltivec">, Group, Flags<[DriverOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, 
Flags<[DriverOption]>;
Index: cfe/trunk/test/Driver/amdgpu-features.c
===
--- cfe/trunk/test/Driver/amdgpu-features.c
+++ cfe/trunk/test/Driver/amdgpu-features.c
@@ -5,3 +5,9 @@
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri 
-mamdgpu-debugger-abi=1.0 %s -o - 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-1-0 %s
 // CHECK-MAMDGPU-DEBUGGER-ABI-1-0: "-target-feature" 
"+amdgpu-debugger-insert-nops" "-target-feature" 
"+amdgpu-debugger-reserve-regs" "-target-feature" 
"+amdgpu-debugger-emit-prologue"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mxnack %s 2>&1 | FileCheck 
--check-prefix=XNACK %s
+// XNACK: "-target-feature" "+xnack"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-xnack %s 2>&1 | FileCheck 
--check-prefix=NO-XNACK %s
+// NO-XNACK: "-target-feature" "-xnack"


Index: cfe/trunk/include/clang/Driver/Options.td
===
--- cfe/trunk/include/clang/Driver/Options.td
+++ cfe/trunk/include/clang/Driver/Options.td
@@ -1822,7 +1822,6 @@
 
 def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, Group,
   HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">;
-
 def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">,
   Group,
   HelpText<"Workaround Cortex-A53 erratum 835769 (AArch64 only)">;
@@ -1840,6 +1839,10 @@
   Group,
   HelpText<"Generate additional code for specified  of debugger ABI (AMDGPU only)">,
   MetaVarName<"">;
+def mxnack : Flag<["-"], "mxnack">, Group,
+  HelpText<"Enable XNACK (AMDGPU only)">;
+def mno_xnack : Flag<["-"], "mno-xnack">, Group,
+  HelpText<"Disable XNACK (AMDGPU only)">;
 
 def faltivec : Flag<["-"], "faltivec">, Group, Flags<[DriverOption]>;
 def fno_altivec : Flag<["-"], "fno-altivec">, Group, Flags<[DriverOption]>;
Index: cfe/trunk/test/Driver/amdgpu-features.c
===
--- cfe/trunk/test/Driver/amdgpu-features.c
+++ cfe/trunk/test/Driver/amdgpu-features.c
@@ -5,3 +5,9 @@
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=kaveri -mamdgpu-debugger-abi=1.0 %s -o - 2>&1 \
 // RUN:   | FileCheck --check-prefix=CHECK-MAMDGPU-DEBUGGER-ABI-1-0 %s
 // CHECK-MAMDGPU-DEBUGGER-ABI-1-0: "-target-feature" "+amdgpu-debugger-insert-nops" "-target-feature" "+amdgpu-debugger-reserve-regs" "-target-feature" "+amdgpu-debugger-emit-prologue"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mxnack %s 2>&1 | FileCheck --check-prefix=XNACK %s
+// XNACK: "-target-feature" "+xnack"
+
+// RUN: %clang -### -target amdgcn -mcpu=gfx700 -mno-xnack %s 2>&1 | FileCheck --check-prefix=NO-XNACK %s
+// NO-XNACK: "-target-feature" "-xnack"
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[PATCH] D40045: AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
Herald added subscribers: tpr, dstuttard, yaxunl, nhaehnle, wdng.

- Remove gfx804
- Remove gfx901
- Remove gfx903


https://reviews.llvm.org/D40045

Files:
  lib/Basic/Targets/AMDGPU.cpp
  test/Driver/amdgpu-mcpu.cl


Index: test/Driver/amdgpu-mcpu.cl
===
--- test/Driver/amdgpu-mcpu.cl
+++ test/Driver/amdgpu-mcpu.cl
@@ -69,13 +69,10 @@
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=fiji %s -o - 2>&1 
| FileCheck --check-prefix=FIJI-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=polaris10 %s -o - 
2>&1 | FileCheck --check-prefix=POLARIS10-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=polaris11 %s -o - 
2>&1 | FileCheck --check-prefix=POLARIS11-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx804 %s -o - 
2>&1 | FileCheck --check-prefix=GFX804-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx810 %s -o - 
2>&1 | FileCheck --check-prefix=GFX810-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=stoney %s -o - 
2>&1 | FileCheck --check-prefix=STONEY-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx900 %s -o - 
2>&1 | FileCheck --check-prefix=GFX900-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx901 %s -o - 
2>&1 | FileCheck --check-prefix=GFX901-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx902 %s -o - 
2>&1 | FileCheck --check-prefix=GFX902-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx903 %s -o - 
2>&1 | FileCheck --check-prefix=GFX903-CHECK %s
 
 // GFX600-CHECK: "-target-cpu" "gfx600"
 // TAHITI-CHECK: "-target-cpu" "tahiti"
@@ -103,10 +100,7 @@
 // FIJI-CHECK: "-target-cpu" "fiji"
 // POLARIS10-CHECK: "-target-cpu" "polaris10"
 // POLARIS11-CHECK: "-target-cpu" "polaris11"
-// GFX804-CHECK: "-target-cpu" "gfx804"
 // GFX810-CHECK: "-target-cpu" "gfx810"
 // STONEY-CHECK: "-target-cpu" "stoney"
 // GFX900-CHECK: "-target-cpu" "gfx900"
-// GFX901-CHECK: "-target-cpu" "gfx901"
 // GFX902-CHECK: "-target-cpu" "gfx902"
-// GFX903-CHECK: "-target-cpu" "gfx903"
Index: lib/Basic/Targets/AMDGPU.cpp
===
--- lib/Basic/Targets/AMDGPU.cpp
+++ lib/Basic/Targets/AMDGPU.cpp
@@ -286,13 +286,10 @@
   .Case("fiji", GK_GFX8)
   .Case("polaris10", GK_GFX8)
   .Case("polaris11", GK_GFX8)
-  .Case("gfx804", GK_GFX8)
   .Case("gfx810", GK_GFX8)
   .Case("stoney", GK_GFX8)
   .Case("gfx900", GK_GFX9)
-  .Case("gfx901", GK_GFX9)
   .Case("gfx902", GK_GFX9)
-  .Case("gfx903", GK_GFX9)
   .Default(GK_NONE);
 }
 


Index: test/Driver/amdgpu-mcpu.cl
===
--- test/Driver/amdgpu-mcpu.cl
+++ test/Driver/amdgpu-mcpu.cl
@@ -69,13 +69,10 @@
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=fiji %s -o - 2>&1 | FileCheck --check-prefix=FIJI-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=polaris10 %s -o - 2>&1 | FileCheck --check-prefix=POLARIS10-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=polaris11 %s -o - 2>&1 | FileCheck --check-prefix=POLARIS11-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx804 %s -o - 2>&1 | FileCheck --check-prefix=GFX804-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx810 %s -o - 2>&1 | FileCheck --check-prefix=GFX810-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=stoney %s -o - 2>&1 | FileCheck --check-prefix=STONEY-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx900 %s -o - 2>&1 | FileCheck --check-prefix=GFX900-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx901 %s -o - 2>&1 | FileCheck --check-prefix=GFX901-CHECK %s
 // RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx902 %s -o - 2>&1 | FileCheck --check-prefix=GFX902-CHECK %s
-// RUN: %clang -### -target amdgcn -x cl -S -emit-llvm -mcpu=gfx903 %s -o - 2>&1 | FileCheck --check-prefix=GFX903-CHECK %s
 
 // GFX600-CHECK: "-target-cpu" "gfx600"
 // TAHITI-CHECK: "-target-cpu" "tahiti"
@@ -103,10 +100,7 @@
 // FIJI-CHECK: "-target-cpu" "fiji"
 // POLARIS10-CHECK: "-target-cpu" "polaris10"
 // POLARIS11-CHECK: "-target-cpu" "polaris11"
-// GFX804-CHECK: "-target-cpu" "gfx804"
 // GFX810-CHECK: "-target-cpu" "gfx810"
 // STONEY-CHECK: "-target-cpu" "stoney"
 // GFX900-CHECK: "-target-cpu" "gfx900"
-// GFX901-CHECK: "-target-cpu" "gfx901"
 // GFX902-CHECK: "-target-cpu" "gfx902"
-// GFX903-CHECK: "-target-cpu" "gfx903"
Index: lib/Basic/Targets/AMDGPU.cpp
===
--- lib/Basic/Targets/AMDGPU.cpp
+++ lib/Basic/Targets/AMDGPU.cpp
@@ -286,13 +286,10 @@
   .Case("fiji", GK_GFX8)
   .Case("polaris10", GK_GFX8)
  

[PATCH] D39879: AMDGPU: Remove -mamdgpu-debugger-abi option

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Ping.


https://reviews.llvm.org/D39879



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[PATCH] D39879: AMDGPU: Remove -mamdgpu-debugger-abi option

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl abandoned this revision.
kzhuravl added a comment.

Agreed to do it later.


https://reviews.llvm.org/D39879



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[PATCH] D145671: [clang] Remove legacy -m(no)-code-object-v3 options

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

In D145671#4181568 , @yaxunl wrote:

> Did you go through the deprecation process for this option? We need to send a 
> documentation team first so that it is announced to the users. Then in the 
> next release we can deprecate it.

Yes, it went through deprecation process. V2 has been deprecated in full for 
more than a year now.


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[PATCH] D146023: [AMDGPU] Remove Code Object V2

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: llvm/docs/AMDGPUUsage.rst:1379
 .. warning::
-  Code object V2 is not the default code object version emitted by
-  this version of LLVM.
+  Code object V2 emission is no longer supported by this version of LLVM.
 

emission->generation?



Comment at: llvm/docs/AMDGPUUsage.rst:2647
 .. warning::
-  Code object V2 is not the default code object version emitted by this version
-  of LLVM.
+  Code object V2 emission is no longer supported by this version of LLVM.
 

emission->generation?



Comment at: llvm/docs/AMDGPUUsage.rst:14597
 .. warning::
-  Code object V2 is not the default code object version emitted by
-  this version of LLVM.
+  Code object V2 emission is no longer supported by this version of LLVM.
 

ditto



Comment at: llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp:749-750
-case AMDGPU::AMDHSA_COV2:
-  // Code object V2 only supported specific processors and had fixed
-  // settings for the XNACK.
-  if (Processor == "gfx600") {

Nice to see this finally go


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[PATCH] D141700: AMDGPU: Move enqueued block handling into clang

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

Overall looks good.




Comment at: llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp:299
+
+  Attrs.mRuntimeHandle = getEnqueuedBlockSymbolName(TM, Func);
 }

Do we really need/want to update code object v2?


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[PATCH] D149982: AMDGPU: Add basic gfx941 target

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
kzhuravl added reviewers: arsenm, msearles, rampitec, t-tye.
Herald added subscribers: kosarev, mattd, gchakrabarti, asavonic, foad, 
kerbowa, hiraditya, tpr, dstuttard, yaxunl, jvesely, emaste.
Herald added a reviewer: jhenderson.
Herald added a reviewer: MaskRay.
Herald added a project: All.
kzhuravl requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, wdng, jholewinski.
Herald added projects: clang, LLVM.

Repository:
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https://reviews.llvm.org/D149982

Files:
  clang/include/clang/Basic/Cuda.h
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/test/CodeGenOpenCL/amdgpu-features.cl
  clang/test/Driver/amdgpu-macros.cl
  clang/test/Driver/amdgpu-mcpu.cl
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/docs/AMDGPUUsage.rst
  llvm/include/llvm/BinaryFormat/ELF.h
  llvm/include/llvm/TargetParser/TargetParser.h
  llvm/lib/Object/ELFObjectFile.cpp
  llvm/lib/ObjectYAML/ELFYAML.cpp
  llvm/lib/Target/AMDGPU/AMDGPU.td
  llvm/lib/Target/AMDGPU/GCNProcessors.td
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
  llvm/lib/TargetParser/TargetParser.cpp
  llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
  llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
  llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
  llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
  llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
  llvm/tools/llvm-readobj/ELFDumper.cpp

Index: llvm/tools/llvm-readobj/ELFDumper.cpp
===
--- llvm/tools/llvm-readobj/ELFDumper.cpp
+++ llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -1588,6 +1588,7 @@
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90A),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90C),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX940),
+  LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX941),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
@@ -1648,6 +1649,7 @@
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90A),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90C),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX940),
+  LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX941),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
Index: llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
===
--- llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
+++ llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
@@ -205,6 +205,15 @@
 # RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX940
 # RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX940 -DFLAG_VALUE=0x40
 
+# RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941 -DFLAG_VALUE=0x4B
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=1 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=1 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941 -DFLAG_VALUE=0x4B
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941 -DFLAG_VALUE=0x4B
+
 # RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1010
 # RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1010 -DFLAG_VALUE=0x33
 
Index: llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
===
--- llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
+++ llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
@@ -85,6 +85,11 @@
 
 ; --GFX9---
 ;
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx941 -filetype=obj -O0 -o %t.o %s
+; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx941 %t.o > %t-specify.txt
+; RUN: llvm-objdump -D %t.o > %t-detect.txt
+; RUN: diff %t-specify.txt %t-detect.txt
+
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 -filetype=obj -O0 -o

[PATCH] D149983: AMDGPU: Add basic gfx942 target

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
kzhuravl added reviewers: arsenm, msearles, rampitec, t-tye.
Herald added subscribers: kosarev, mattd, gchakrabarti, asavonic, foad, 
kerbowa, hiraditya, tpr, dstuttard, yaxunl, jvesely, emaste.
Herald added a reviewer: jhenderson.
Herald added a reviewer: MaskRay.
Herald added a project: All.
kzhuravl requested review of this revision.
Herald added subscribers: llvm-commits, cfe-commits, wdng, jholewinski.
Herald added projects: clang, LLVM.

Repository:
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https://reviews.llvm.org/D149983

Files:
  clang/include/clang/Basic/Cuda.h
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/test/CodeGenOpenCL/amdgpu-features.cl
  clang/test/Driver/amdgpu-macros.cl
  clang/test/Driver/amdgpu-mcpu.cl
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/docs/AMDGPUUsage.rst
  llvm/include/llvm/BinaryFormat/ELF.h
  llvm/include/llvm/TargetParser/TargetParser.h
  llvm/lib/Object/ELFObjectFile.cpp
  llvm/lib/ObjectYAML/ELFYAML.cpp
  llvm/lib/Target/AMDGPU/AMDGPU.td
  llvm/lib/Target/AMDGPU/GCNProcessors.td
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
  llvm/lib/TargetParser/TargetParser.cpp
  llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
  llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
  llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
  llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
  llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
  llvm/tools/llvm-readobj/ELFDumper.cpp

Index: llvm/tools/llvm-readobj/ELFDumper.cpp
===
--- llvm/tools/llvm-readobj/ELFDumper.cpp
+++ llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -1589,6 +1589,7 @@
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90C),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX940),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX941),
+  LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX942),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
@@ -1650,6 +1651,7 @@
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90C),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX940),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX941),
+  LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX942),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
Index: llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
===
--- llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
+++ llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
@@ -214,6 +214,15 @@
 # RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941
 # RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941 -DFLAG_VALUE=0x4B
 
+# RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942 -DFLAG_VALUE=0x4C
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=1 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=1 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942 -DFLAG_VALUE=0x4C
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942 -DFLAG_VALUE=0x4C
+
 # RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1010
 # RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1010 -DFLAG_VALUE=0x33
 
Index: llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
===
--- llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
+++ llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
@@ -85,6 +85,11 @@
 
 ; --GFX9---
 ;
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -filetype=obj -O0 -o %t.o %s
+; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx942 %t.o > %t-specify.txt
+; RUN: llvm-objdump -D %t.o > %t-detect.txt
+; RUN: diff %t-specify.txt %t-detect.txt
+
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx941 -filetype=obj -O0 -o

[PATCH] D149986: AMDGPU: Force sc0 and sc1 on stores for gfx940 and gfx941

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added a comment.

In D149986#4329302 , @arsenm wrote:

> Should this be a feature set by default in the subtarget constructor instead? 
> Should you be able to turn this off?

Users should not be able to turn this off. If user wants it off, user can use 
gfx942. Should it be moved to the subtarget constructor?


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[PATCH] D149982: AMDGPU: Add basic gfx941 target

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG1fc70210a6a5: AMDGPU: Add basic gfx941 target (authored by 
kzhuravl).

Repository:
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Files:
  clang/include/clang/Basic/Cuda.h
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/test/CodeGenOpenCL/amdgpu-features.cl
  clang/test/Driver/amdgpu-macros.cl
  clang/test/Driver/amdgpu-mcpu.cl
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/docs/AMDGPUUsage.rst
  llvm/include/llvm/BinaryFormat/ELF.h
  llvm/include/llvm/TargetParser/TargetParser.h
  llvm/lib/Object/ELFObjectFile.cpp
  llvm/lib/ObjectYAML/ELFYAML.cpp
  llvm/lib/Target/AMDGPU/AMDGPU.td
  llvm/lib/Target/AMDGPU/GCNProcessors.td
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
  llvm/lib/TargetParser/TargetParser.cpp
  llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
  llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
  llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
  llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
  llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
  llvm/tools/llvm-readobj/ELFDumper.cpp

Index: llvm/tools/llvm-readobj/ELFDumper.cpp
===
--- llvm/tools/llvm-readobj/ELFDumper.cpp
+++ llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -1588,6 +1588,7 @@
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90A),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90C),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX940),
+  LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX941),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
@@ -1648,6 +1649,7 @@
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90A),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90C),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX940),
+  LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX941),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
Index: llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
===
--- llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
+++ llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
@@ -205,6 +205,15 @@
 # RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX940
 # RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX940 -DFLAG_VALUE=0x40
 
+# RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941 -DFLAG_VALUE=0x4B
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=1 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=1 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941 -DFLAG_VALUE=0x4B
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941 -DFLAG_VALUE=0x4B
+
 # RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1010
 # RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1010 -DFLAG_VALUE=0x33
 
Index: llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
===
--- llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
+++ llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
@@ -85,6 +85,11 @@
 
 ; --GFX9---
 ;
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx941 -filetype=obj -O0 -o %t.o %s
+; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx941 %t.o > %t-specify.txt
+; RUN: llvm-objdump -D %t.o > %t-detect.txt
+; RUN: diff %t-specify.txt %t-detect.txt
+
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 -filetype=obj -O0 -o %t.o %s
 ; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx940 %t.o > %t-specify.txt
 ; RUN: llvm-objdump -D %t.o > %t-detect.txt
Index: llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
=

[PATCH] D149983: AMDGPU: Add basic gfx942 target

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG9d0572797233: AMDGPU: Add basic gfx942 target (authored by 
kzhuravl).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
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Files:
  clang/include/clang/Basic/Cuda.h
  clang/lib/Basic/Cuda.cpp
  clang/lib/Basic/Targets/NVPTX.cpp
  clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
  clang/test/CodeGenOpenCL/amdgpu-features.cl
  clang/test/Driver/amdgpu-macros.cl
  clang/test/Driver/amdgpu-mcpu.cl
  clang/test/Misc/target-invalid-cpu-note.c
  llvm/docs/AMDGPUUsage.rst
  llvm/include/llvm/BinaryFormat/ELF.h
  llvm/include/llvm/TargetParser/TargetParser.h
  llvm/lib/Object/ELFObjectFile.cpp
  llvm/lib/ObjectYAML/ELFYAML.cpp
  llvm/lib/Target/AMDGPU/AMDGPU.td
  llvm/lib/Target/AMDGPU/GCNProcessors.td
  llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
  llvm/lib/TargetParser/TargetParser.cpp
  llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
  llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
  llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
  llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
  llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
  llvm/tools/llvm-readobj/ELFDumper.cpp

Index: llvm/tools/llvm-readobj/ELFDumper.cpp
===
--- llvm/tools/llvm-readobj/ELFDumper.cpp
+++ llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -1589,6 +1589,7 @@
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90C),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX940),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX941),
+  LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX942),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
@@ -1650,6 +1651,7 @@
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX90C),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX940),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX941),
+  LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX942),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1010),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1011),
   LLVM_READOBJ_ENUM_ENT(ELF, EF_AMDGPU_MACH_AMDGCN_GFX1012),
Index: llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
===
--- llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
+++ llvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
@@ -214,6 +214,15 @@
 # RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941
 # RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX941 -DFLAG_VALUE=0x4B
 
+# RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942 -DFLAG_VALUE=0x4C
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=1 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=1 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942 -DFLAG_VALUE=0x4C
+
+# RUN: yaml2obj %s -o %t -DABI_VERSION=2 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942
+# RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=2 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX942 -DFLAG_VALUE=0x4C
+
 # RUN: yaml2obj %s -o %t -DABI_VERSION=0 -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1010
 # RUN: llvm-readobj -h %t | FileCheck %s --check-prefixes=ALL,KNOWN-ABI-VERSION,SINGLE-FLAG --match-full-lines -DABI_VERSION=0 -DFILE=%t -DFLAG_NAME=EF_AMDGPU_MACH_AMDGCN_GFX1010 -DFLAG_VALUE=0x33
 
Index: llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
===
--- llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
+++ llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
@@ -85,6 +85,11 @@
 
 ; --GFX9---
 ;
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -filetype=obj -O0 -o %t.o %s
+; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx942 %t.o > %t-specify.txt
+; RUN: llvm-objdump -D %t.o > %t-detect.txt
+; RUN: diff %t-specify.txt %t-detect.txt
+
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx941 -filetype=obj -O0 -o %t.o %s
 ; RUN: llvm-objdump -D --arch-name=amdgcn --mcpu=gfx941 %t.o > %t-specify.txt
 ; RUN: llvm-objdump -D %t.o > %t-detect.txt
Index: llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
=

[PATCH] D149986: AMDGPU: Force sc0 and sc1 on stores for gfx940 and gfx941

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl marked an inline comment as done.
kzhuravl added inline comments.



Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:524
+ SIAtomicAddrSpace::NONE)
+  return enableSC0Bit(MI) | enableSC1Bit(MI);
+return false;

jmmartinez wrote:
> NIT: Is the use of the bitwise or " | " intended? I'd use the logical or " || 
> " instead.
It is intentional, we need both SC0 and SC1 bits set. If I switch this to || it 
will short circuit and not invoke enableSC1Bit.


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[PATCH] D149986: AMDGPU: Force sc0 and sc1 on stores for gfx940 and gfx941

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl marked an inline comment as done.
kzhuravl added a comment.

In D149986#4334274 , @Pierre-vh wrote:

> I think that if this is a new property of the GFX940/941 targets, and turning 
> it off shouldn't be possible, we shouldn't even bother with a feature and 
> just set a bool in the ST for those targets

AFAIK, the subtarget only knows the generation and has access to features. The 
subtarget cannot differentiate between gfx940, gfx941, gfx942.


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[PATCH] D149986: AMDGPU: Force sc0 and sc1 on stores for gfx940 and gfx941

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl added inline comments.



Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:524
+ SIAtomicAddrSpace::NONE)
+  return enableSC0Bit(MI) | enableSC1Bit(MI);
+return false;

Pierre-vh wrote:
> kzhuravl wrote:
> > jmmartinez wrote:
> > > NIT: Is the use of the bitwise or " | " intended? I'd use the logical or 
> > > " || " instead.
> > It is intentional, we need both SC0 and SC1 bits set. If I switch this to 
> > || it will short circuit and not invoke enableSC1Bit.
> IMHO then it needs a comment to explain that it's intentional, otherwise some 
> innocent maintainer in the future could think it's a typo and change it
Added comment.


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[PATCH] D28257: [OpenCL] Re-enable supported core extensions based on opencl version when disabling all extensions using pragma

[Konstantin Zhuravlyov via Phabricator via cfe-commits]

kzhuravl created this revision.
kzhuravl added reviewers: yaxunl, Anastasia, b-sumner.
kzhuravl added a subscriber: cfe-commits.
Herald added a subscriber: wdng.

https://reviews.llvm.org/D28257

Files:
  lib/Parse/ParsePragma.cpp
  test/SemaOpenCL/extensions.cl


Index: test/SemaOpenCL/extensions.cl
===
--- test/SemaOpenCL/extensions.cl
+++ test/SemaOpenCL/extensions.cl
@@ -22,6 +22,17 @@
 // RUN: %clang_cc1 %s -triple spir-unknown-unknown -verify -pedantic 
-fsyntax-only -cl-ext=-all -cl-ext=+cl_khr_fp64 -cl-ext=+cl_khr_fp16 
-cl-ext=-cl_khr_fp64 -DNOFP64
 // RUN: %clang_cc1 %s -triple spir-unknown-unknown -verify -pedantic 
-fsyntax-only -cl-ext=-all -cl-ext=+cl_khr_fp64,-cl_khr_fp64,+cl_khr_fp16 
-DNOFP64
 
+// Test with -finclude-default-header, which includes opencl-c.h. opencl-c.h
+// disables all extensions by default, but supported core extensions for a
+// particular OpenCL version must be re-enabled (for example, cl_khr_fp64 is
+// enabled by default with -cl-std=CL2.0).
+//
+// RUN: %clang_cc1 %s -triple amdgcn-unknown-unknown -verify -pedantic 
-fsyntax-only -cl-std=CL2.0 -finclude-default-header
+
+#ifdef _OPENCL_H_
+// expected-no-diagnostics
+#endif
+
 #ifdef FP64
 // expected-no-diagnostics
 #endif
@@ -33,13 +44,15 @@
 }
 #endif
 
+#ifndef _OPENCL_H_
 int isnan(float x) {
 return __builtin_isnan(x);
 }
 
 int isfinite(float x) {
 return __builtin_isfinite(x);
 }
+#endif
 
 #pragma OPENCL EXTENSION cl_khr_fp64 : enable
 #ifdef NOFP64
Index: lib/Parse/ParsePragma.cpp
===
--- lib/Parse/ParsePragma.cpp
+++ lib/Parse/ParsePragma.cpp
@@ -506,10 +506,12 @@
   // overriding all previously issued extension directives, but only if the
   // behavior is set to disable."
   if (Name == "all") {
-if (State == Disable)
+if (State == Disable) {
   Opt.disableAll();
-else
+  Opt.enableSupportedCore(getLangOpts().OpenCLVersion);
+} else {
   PP.Diag(NameLoc, diag::warn_pragma_expected_predicate) << 1;
+}
   } else if (State == Begin) {
 if (!Opt.isKnown(Name) ||
 !Opt.isSupported(Name, getLangOpts().OpenCLVersion)) {


Index: test/SemaOpenCL/extensions.cl
===
--- test/SemaOpenCL/extensions.cl
+++ test/SemaOpenCL/extensions.cl
@@ -22,6 +22,17 @@
 // RUN: %clang_cc1 %s -triple spir-unknown-unknown -verify -pedantic -fsyntax-only -cl-ext=-all -cl-ext=+cl_khr_fp64 -cl-ext=+cl_khr_fp16 -cl-ext=-cl_khr_fp64 -DNOFP64
 // RUN: %clang_cc1 %s -triple spir-unknown-unknown -verify -pedantic -fsyntax-only -cl-ext=-all -cl-ext=+cl_khr_fp64,-cl_khr_fp64,+cl_khr_fp16 -DNOFP64
 
+// Test with -finclude-default-header, which includes opencl-c.h. opencl-c.h
+// disables all extensions by default, but supported core extensions for a
+// particular OpenCL version must be re-enabled (for example, cl_khr_fp64 is
+// enabled by default with -cl-std=CL2.0).
+//
+// RUN: %clang_cc1 %s -triple amdgcn-unknown-unknown -verify -pedantic -fsyntax-only -cl-std=CL2.0 -finclude-default-header
+
+#ifdef _OPENCL_H_
+// expected-no-diagnostics
+#endif
+
 #ifdef FP64
 // expected-no-diagnostics
 #endif
@@ -33,13 +44,15 @@
 }
 #endif
 
+#ifndef _OPENCL_H_
 int isnan(float x) {
 return __builtin_isnan(x);
 }
 
 int isfinite(float x) {
 return __builtin_isfinite(x);
 }
+#endif
 
 #pragma OPENCL EXTENSION cl_khr_fp64 : enable
 #ifdef NOFP64
Index: lib/Parse/ParsePragma.cpp
===
--- lib/Parse/ParsePragma.cpp
+++ lib/Parse/ParsePragma.cpp
@@ -506,10 +506,12 @@
   // overriding all previously issued extension directives, but only if the
   // behavior is set to disable."
   if (Name == "all") {
-if (State == Disable)
+if (State == Disable) {
   Opt.disableAll();
-else
+  Opt.enableSupportedCore(getLangOpts().OpenCLVersion);
+} else {
   PP.Diag(NameLoc, diag::warn_pragma_expected_predicate) << 1;
+}
   } else if (State == Begin) {
 if (!Opt.isKnown(Name) ||
 !Opt.isSupported(Name, getLangOpts().OpenCLVersion)) {
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