Re: [coreboot] coreboot lenovo x230
Mario Goljak wrote: I've been following coreboots official guide http://www.coreboot.org/Board:lenovo/x230 but I'm unable to read bios chip content with the buspirate and flashrom. I've connected it according to this datasheet http://www.macronix.com/Lists/DataSheet/Attachments/1740/MX25L3206E,%203V,%2032Mb,%20v1.5.pdf but I'm not exactly sure how to connect 3.3V power lines from another computer. Not at all, ideally. Never apply a voltage to a voltage rail without knowing that you are actually following the required power sequence for the system. Sometimes this is documented in the schematic, other times not, then you can't know. See if you can let the board power the voltage rail. Look for flash chip accesses if you only connect the power but do not power on the system. Macronix flash is very sensitive to signal integrity. Keep your wires as short as possible, max 2-3 cm. //Peter -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Hello coreboot
Hi Łukasz, * Łukasz Dmitrowski lukasz.dmitrow...@gmail.com [150314 10:23]: My name is Lukasz and I am a Computer Science student at West Pomeranian University of Technology in Szczecin. Main area of my interests are embedded systems and for me coreboot is the most interesting organization in GSoC 2015. Thats why I am here. I have experience with low level programming and good knowledge of C and C++. Often I use Arduino, Raspberry Pi and BeagleBone Black for fast prototyping my ideas. I have also teamwork experience gained while working on the embedded systems commercial project for automotive industry. I am interested in participating in GSoC 2015 through realization of one of the coreboot projects as I find it as a good start for diving into computer firmware. For now I am getting familiar with coreboot and trying to build it and run it in QEMU. More detailed information I will give you through my proposal, but if you want to ask me some questions now please feel free to do that. I will be also often available on #coreboot IRC channel. Great, welcome to coreboot! I have one question: Are project ideas on coreboot wiki prioritized or acceptance depends only on student attitude, arrangements(build coreboot + send patch) and quality of proposal? Thank you in advance. No, the projects are not prioritized on the coreboot ideas page. All projects will be judged by quality of the proposals and student engagement. Stefan -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] Hello coreboot
Hello coreboot, My name is Lukasz and I am a Computer Science student at West Pomeranian University of Technology in Szczecin. Main area of my interests are embedded systems and for me coreboot is the most interesting organization in GSoC 2015. Thats why I am here. I have experience with low level programming and good knowledge of C and C++. Often I use Arduino, Raspberry Pi and BeagleBone Black for fast prototyping my ideas. I have also teamwork experience gained while working on the embedded systems commercial project for automotive industry. I am interested in participating in GSoC 2015 through realization of one of the coreboot projects as I find it as a good start for diving into computer firmware. For now I am getting familiar with coreboot and trying to build it and run it in QEMU. More detailed information I will give you through my proposal, but if you want to ask me some questions now please feel free to do that. I will be also often available on #coreboot IRC channel. I have one question: Are project ideas on coreboot wiki prioritized or acceptance depends only on student attitude, arrangements(build coreboot + send patch) and quality of proposal? Thank you in advance. Regards, Lukasz Dmitrowski -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [Almost solved][Mohon Peak] Console output on external UARTs behind PCIe
On Fri, 2015-03-13 at 16:47 +0100, Patrick Agrain wrote: Hello, One step further !! I succeed to get it working. Several modification has to be made. I will try (next week) to get them in a readable form. - in ./src/device/pci_early.c:pci_early_bridge_init() : -- secondary = 1 for Mohon Peak. The value of 'secondary' should not matter here, it does not need to match with the value you later see in lspci. -- remove udelay() in PCI_VENDOR_ID reading (that's the big point). I will try to have a look at it. Probably something very specific to this chipset. No clue about that. -- Put 'if (ret)' condition on the last 'pci_bridge_set_secondary(p2p_bridge, 0);'. Don't, as you would leave _some_ bridge claiming the bus number 'secondary', and PCI tree enumeration later in ramstage may try to assign the same number to another bridge. If you find this is really required, you would need to use a large value of 'secondary' to avoid such a collision. - in ./src/drivers/uart/oxpcie_early.c:pci_early_device_probe() : -- uart1base is at CONFIG_EARLY_PCI_MMIO_BASE + 0x1200 for the Startech board I have. What PCI ID did your card report again? Different IDs will use different resource mapping, I'll need to compare against the datasheet. BTW, I also included the patch covered by http://review.coreboot.org/#/c/8660/. Compiler does not complain anymore (and 'in fine' it works). I have submitted iteration #2 of this change. Logs are now available from 'coreboot-... ramstage starting'. Let's try to make it work from the .. romstage starting message. Thanks for your support. Regards, Patrick Agrain Kyösti -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] coreboot lenovo x230
I've been following coreboots official guide http://www.coreboot.org/Board:lenovo/x230 but I'm unable to read bios chip content with the buspirate and flashrom. I've connected it according to this datasheet http://www.macronix.com/Lists/DataSheet/Attachments/1740/MX25L3206E,%203V,%2032Mb,%20v1.5.pdf but I'm not exactly sure how to connect 3.3V power lines from another computer. can somebody please give me some guidelines. thanks in advance. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
