Re: [coreboot] Automated test system: Nominations wanted
On 02/18/2015 05:14 PM, Carl-Daniel Hailfinger wrote: Hi, I am currently planning to set up a test system with 5 (later up to 10) machines boot testing each new coreboot commit. This test system will be serviced (i.e. recovery from bricking) Mo-Fr during CET/CEST office hours. Just wanted to mention that Raptor Engineering now has an automated test stand for the ASUS KFSN4-DRE board, run nightly with automatic bricking recovery. It has two Opteron 2431 (AMD Family 10h, 6 core @ 2.4GHz)CPUs and 6GB of DDR2-667 memory installed on Node 0. Each successful test result is recorded to the board-status repository, and each failure is reported to this list. Enjoy! -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 http://www.raptorengineeringinc.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] GCC update broke AMD Fam10h boot
On Sunday, March 15, 2015 02:04:51 PM Timothy Pearson wrote: > All, > > Just a heads up as there is no bugtracker for this project. GIT commit > 53c388fe, which updates the crossgcc GCC version from 4.8.3 to 4.9.2, > breaks ramstage on AMD Fam10h systems (ramstage loads, sends its 0x39 > POST code, but then goes into an infinite loop). Downgrading the GCC > version repairs the boot failure. > > Not sure if you want to revert that commit until someone can figure out > what changed to cause the problem. Unless there's a clear case to be made that this is a compiler bug, I'd go with finding and fixing the bug in our code that causes that. Alex -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] GCC update broke AMD Fam10h boot
All, Just a heads up as there is no bugtracker for this project. GIT commit 53c388fe, which updates the crossgcc GCC version from 4.8.3 to 4.9.2, breaks ramstage on AMD Fam10h systems (ramstage loads, sends its 0x39 POST code, but then goes into an infinite loop). Downgrading the GCC version repairs the boot failure. Not sure if you want to revert that commit until someone can figure out what changed to cause the problem. -- Timothy Pearson Raptor Engineering +1 (415) 727-8645 http://www.raptorengineeringinc.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] coreboot GSoC 2015 student application period
The GSoC student application window opens on Monday! 16 March: 19:00 UTC - Student application period opens. 27 March: 19:00 UTC - Student application deadline. Everything you need to know about coreboot GSoC 2015 is on this page: http://www.coreboot.org/GSoC Regards, Marc -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Tianocore boot fails, [GSoc] CBFS support in tiano - discussion (C Ganesh Sundar)
Hi Ganesh, On Thu, Mar 12, 2015 at 1:35 PM <107112...@nitt.edu> wrote: > > Hi! > > I tried booting ELILO (disk.img - in gpt), ubuntu & windows 8(iso) on QEMU > but wasn't successful. I am able to boot into serial uefi shell only(a > blank fully black screen). I tried std vga ROM in QEMU too but no result. > Any comments/help would be grateful. Below is the serial output: > I don't use qemu often, but filo, grub2, or seabios for paylaods to boot gpt. > Booting EFI DVD/CDROM > BlockSize : 2048 > LastBlock : 1E9AF3 > BlockSize : 2048 > LastBlock : 7 > BlockSize : 2048 > LastBlock : 1E9539 > PlatformBdsBootFail > Boot Failed. EFI DVD/CDROM > Memory Previous CurrentNext > TypePages Pages Pages > == >0A0004 0002 0004 >090008 0002 0008 >000004 0004 >060065 0051 0065 >050030 002D 0030 >030180 0170 0180 >040F00 07C2 0F00 > Booting EFI Internal Shell > InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 78064A8 > Loading driver at 0x6B0E000 EntryPoint=0x6B0E240 Shell.efi > -- > > > I want to try creating CBFS support in tianocore by writing a UEFI DXE > Driver. > Since the ROM's address will be known, raw access of memory > corresponding to the > ROM could be done and parsing functions provided. For CBFS located > elsewhere a > base address could be provided as an argument. Existing cbfstool's > code could be > used. I would like to know if this is a correct approach. > > You could read up on the cbfs header to understand how the addressing would work. > > Thanking You! > Ganesh > > -- > coreboot mailing list: coreboot@coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
