Re: [coreboot] [help]build cbfstool fail with cygwin64
2015-09-09 11:42 GMT+02:00 Kurt Qiao : > 5.make > then fail as below > > : In function 'yy_init_buffer': > :1395:9: error: implicit declaration of function 'fileno' > [-Werror=implicit-function-declaration] > --- > > i follow link [2] to modify cbfstool makefile, add _D_GNU_SOURCE for > TOOLCPPFLAGS, CPPFLAGS That doesn't fix the missing fileno declaration, which is the root cause. C standard library providers for Windows seem to be undecided what to do on this function (according to a quick internet search for cygwin and fileno). Sadly I haven't found a simple solution and don't have a system around for testing. Patrick -- Google Germany GmbH, ABC-Str. 19, 20354 Hamburg Registergericht und -nummer: Hamburg, HRB 86891, Sitz der Gesellschaft: Hamburg Geschäftsführer: Graham Law, Christine Elizabeth Flores -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] STACK_SIZE pcengines apu1
It is better to review the pcengines apu1 boot code--pay attention on any function that uses >= 64B stack storage (function arguments and local variables). Try reduce the stack size of such functions instead of increasing the STACK_SIZE. On Thu, Sep 10, 2015 at 7:02 AM, Aaron Durbin wrote: > On Sun, Sep 6, 2015 at 9:10 AM, Maxime de Roucy > wrote: > > Hello, > > > > I am building a coreboot rom for my pcengines apu1. > > A bug is logged during the boot process : > > > http://review.coreboot.org/gitweb?p=board-status.git;a=blob;f=pcengines/apu1/4.0-9873-g7b9762f/2015-06-04T15:16:28Z/coreboot_console.txt;hb=HEAD#l1281 > > > > In order to solve it I applied this changed : > > > > diff --git a/src/Kconfig b/src/Kconfig > > index 9c01687..c8b8ad2 100644 > > --- a/src/Kconfig > > +++ b/src/Kconfig > > @@ -427,7 +427,7 @@ config HEAP_SIZE > > config STACK_SIZE > > hex > > default 0x0 if (ARCH_RAMSTAGE_ARM || ARCH_RAMSTAGE_MIPS || > ARCH_RAMSTAGE_RISCV) > > - default 0x1000 > > + default 0x2000 > > > > config MAX_CPUS > > int > > > > I don't see the bug line anymore, instead I see : > > > > CPU0: stack: 00148000 - 0014a000, lowest used address 00148d34, > stack used: 4812 bytes > > > > I now the patch is not good since it change the default stack size for > > all the boards. I didn't found the right place the change the stack > > size only for pcengines apu1 board. > > But maybe those informations can help developers to improve coreboot. > > That's quite the stack usage. It'd be interesting to know what's > using all that stack. Could you apply this patch and run w/ it? It'd > help narrow down at what point in the boot where the stack gets used > up. Also, that you used 4812 bytes just means you overwrote the other > CPU's stack at some point when STACK_SIZE == 4KiB. > > > diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c > index b3c0c35..8a241b2 100644 > --- a/src/lib/hardwaremain.c > +++ b/src/lib/hardwaremain.c > @@ -378,6 +378,8 @@ static void bs_walk_state_machine(void) > bs_report_time(state); > > state->complete = 1; > + > + checkstack(_estack, 0); > } > } > > > > -- > > Regards > > Maxime de Roucy > > -- > > coreboot mailing list: coreboot@coreboot.org > > http://www.coreboot.org/mailman/listinfo/coreboot > > -- > coreboot mailing list: coreboot@coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot > -- Sheng-Liang Song | Software Engineer | s...@google.com | 650-537-5017 -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] coreinfo "General Protection Fault Exception"
Dear Maxime, Am Sonntag, den 06.09.2015, 16:20 +0200 schrieb Maxime de Roucy: > On a pcengines apu1 when I tried to leave coreinfo (press ESC) I get a > "General Protection Fault Exception". > > I attached my .config file of coreinfo (it's the default > configuration) and the console output when coreinfo crash. does that also happen, when using the same payloads files with QEMU? If yes, maybe it can be better debugged there. Thanks, Paul signature.asc Description: This is a digitally signed message part -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] coreboot conference 2015: Looking for room mate (was: Hotel rooms: coreboot conference 2015)
Dear coreboot folks, Am Donnerstag, den 10.09.2015, 22:14 +0200 schrieb Carl-Daniel Hailfinger: > The venue still has 7 very affordable single/double rooms available! Would somebody share a double room to reduce the costs a little? If yes, please contact me. Thanks, Paul signature.asc Description: This is a digitally signed message part -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] STACK_SIZE pcengines apu1
Dear coreboot folks, Am Donnerstag, den 10.09.2015, 16:25 -0700 schrieb Julius Werner: > I'd bet it's just a single large allocation somewhere. You can try adding > > CFLAGS_ramstage += -Wstack-usage=1024 > > somewhere in coreboot/Makefile.inc and then clean+rebuild your code while > passing '-k' to make. You'll get a bunch of compiler warnings, and one of > them is likely to be the culprit. It looks like that Julius was dead on! Building the similar ASRock E350M1 with the modification proposed by Julius, building stops with the error below. ``` $ make […] CC northbridge/amd/agesa/oem_s3.ramstage.o src/northbridge/amd/agesa/oem_s3.c: In function 'OemS3Save': src/northbridge/amd/agesa/oem_s3.c:118:14: error: stack usage might be 4144 bytes [-Werror=stack-usage=] AGESA_STATUS OemS3Save(void *vS3SaveParams) ^ ``` Thanks, Paul signature.asc Description: This is a digitally signed message part -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] STACK_SIZE pcengines apu1
On Fri, Sep 11, 2015 at 3:36 PM, Paul Menzel wrote: > Dear coreboot folks, > > > Am Donnerstag, den 10.09.2015, 16:25 -0700 schrieb Julius Werner: >> I'd bet it's just a single large allocation somewhere. You can try adding >> >> CFLAGS_ramstage += -Wstack-usage=1024 >> >> somewhere in coreboot/Makefile.inc and then clean+rebuild your code while >> passing '-k' to make. You'll get a bunch of compiler warnings, and one of >> them is likely to be the culprit. > > It looks like that Julius was dead on! Building the similar ASRock > E350M1 with the modification proposed by Julius, building stops with > the error below. > > ``` > $ make > […] > CC northbridge/amd/agesa/oem_s3.ramstage.o > src/northbridge/amd/agesa/oem_s3.c: In function 'OemS3Save': > src/northbridge/amd/agesa/oem_s3.c:118:14: error: stack usage might be 4144 > bytes [-Werror=stack-usage=] > AGESA_STATUS OemS3Save(void *vS3SaveParams) > ^ > ``` Fun. 4KiB buffer on the stack for the win. $ git grep S3_DATA_MTRR_SIZE -- src/northbridge/amd/agesa/ | grep define src/northbridge/amd/agesa/oem_s3.c:#define S3_DATA_MTRR_SIZE 0x1000 > > > Thanks, > > Paul -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] Berlin User Group Meeting 21.Sep
Hi folks, I'm starting a User Group in Berlin. The first meeting will take place on 21. Sep. in the CCCB. For more information about the location take a look on https://berlin.ccc.de/wiki/Club_Discordia Best, lynxis PS: Yes it's Monday evening and it's open for everyone. -- Alexander Couzens mail: lyn...@fe80.eu jabber: lyn...@jabber.ccc.de mobile: +4915123277221 pgpjEA1O6rRNV.pgp Description: OpenPGP digital signature -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Berlin User Group Meeting 21.Sep
Opps, I forgot to mention the time ;) 21.Sep 20:30 pgpHZ5795WI5M.pgp Description: OpenPGP digital signature -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] STACK_SIZE pcengines apu1
On pe, 2015-09-11 at 15:49 -0500, Aaron Durbin wrote: > On Fri, Sep 11, 2015 at 3:36 PM, Paul Menzel > wrote: > > Dear coreboot folks, > > > > > > Am Donnerstag, den 10.09.2015, 16:25 -0700 schrieb Julius Werner: > >> I'd bet it's just a single large allocation somewhere. You can try adding > >> > >> CFLAGS_ramstage += -Wstack-usage=1024 > >> > >> somewhere in coreboot/Makefile.inc and then clean+rebuild your code while > >> passing '-k' to make. You'll get a bunch of compiler warnings, and one of > >> them is likely to be the culprit. > > > > It looks like that Julius was dead on! Building the similar ASRock > > E350M1 with the modification proposed by Julius, building stops with > > the error below. > > > > ``` > > $ make > > […] > > CC northbridge/amd/agesa/oem_s3.ramstage.o > > src/northbridge/amd/agesa/oem_s3.c: In function 'OemS3Save': > > src/northbridge/amd/agesa/oem_s3.c:118:14: error: stack usage might be 4144 > > bytes [-Werror=stack-usage=] > > AGESA_STATUS OemS3Save(void *vS3SaveParams) > > ^ > > ``` > > Fun. 4KiB buffer on the stack for the win. > > $ git grep S3_DATA_MTRR_SIZE -- src/northbridge/amd/agesa/ | grep define > src/northbridge/amd/agesa/oem_s3.c:#define S3_DATA_MTRR_SIZE > 0x1000 > Yeah, my bad. I overlooked stack usage while wondering if those MTRRs really need to be backed up in SPI in the first place. http://review.coreboot.org/#/c/11633/ Thanks, Kyösti -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [help]build cbfstool fail with cygwin64
You can remove the -Werror In util/cbfstool/Makefile.inc Try again. Zheng. > -Original Message- > From: coreboot [mailto:coreboot-boun...@coreboot.org] On Behalf Of Kurt Qiao > Sent: Wednesday, September 09, 2015 5:43 PM > To: coreboot@coreboot.org > Subject: [coreboot] [help]build cbfstool fail with cygwin64 > > does anyone try cygwin64 to build coreboot in windows7 64bit? > i got fail when build cbfstool with cygwin64. > my steps as below: > > 1. cygwin64 install utility "patch", "flex", 'wget' etc. > > 2. git pull latest coreboot from github > build crossgcc > ./buildgcc -j 4 > > 3. build iasl > download src from link [1] > make > cp acpica-unix-20150818/generate/unix/bin/iasl /usr/local/bin > > 4. make menuconfig > choose "emulation/qemu-q35" in my case > > 5.make > then fail as below > > : In function 'yy_init_buffer': > :1395:9: error: implicit declaration of function 'fileno' > [-Werror=implicit-function-declaration] > cc1: all warnings being treated as errors > util/cbfstool/Makefile.inc:59: recipe for target > 'build/util/cbfstool/fmd_scanner.o' failed > make: *** [build/util/cbfstool/fmd_scanner.o] Error 1 > --- > > i follow link [2] to modify cbfstool makefile, add _D_GNU_SOURCE for > TOOLCPPFLAGS, CPPFLAGS and fail as below log. > --- > Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 432 Optimizations > HOSTCC cbfstool/fmaptool.o > HOSTCC cbfstool/cbfs_sections.o > HOSTCC cbfstool/fmap_from_fmd.o > HOSTCC cbfstool/fmd.o > HOSTCC cbfstool/fmd_parser.o > HOSTCC cbfstool/fmd_scanner.o > HOSTCC cbfstool/fmap.o > HOSTCC cbfstool/kv_pair.o > HOSTCC cbfstool/valstr.o > HOSTCC cbfstool/fmaptool (link) > build/util/cbfstool/fmd.o:fmd.c:(.text+0xa23): undefined reference to > `yylex_destroy' > build/util/cbfstool/fmd.o:fmd.c:(.text+0xa23): relocation truncated to > fit: R_X86_64_PC32 against undefined symbol `yylex_destroy' > build/util/cbfstool/fmd.o:fmd.c:(.rdata$.refptr.yyin[.refptr.yyin]+0x0): > undefined reference to `yyin' > build/util/cbfstool/fmd_parser.o:fmd_parser.c:(.text+0x386): undefined > reference to `yylex' > build/util/cbfstool/fmd_parser.o:fmd_parser.c:(.text+0x386): > relocation truncated to fit: R_X86_64_PC32 against undefined symbol `yylex' > collect2: error: ld returned 1 exit status > util/cbfstool/Makefile.inc:83: recipe for target > 'build/util/cbfstool/fmaptool' failed > make: *** [build/util/cbfstool/fmaptool] Error 1 > --- > > [1]:https://acpica.org/sites/acpica/files/acpica-unix-20150818.tar.gz > [2]:http://review.coreboot.org/#/c/10027/1 > > -- > coreboot mailing list: coreboot@coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
