[coreboot] Unable to build coreboot with Intel FSP debug binary on BayleyBay

2016-05-05 Thread Kathappan E 
Hi all,

I am able to build Coreboot with FSP Baytrail release 
binary(BAYTRAIL_FSP_GOLD_004_22-MAY-2015.fd).

But I am unable to build with FSP Baytrail debug binary  
(BAYTRAIL_FSP_GOLD_004_22-MAY-2015_DEBUG.fd) and it throws the below error says 
that binary size is large and fails to add into image.

The sections containing CBFSes are: COREBOOT
Performing operation on 'COREBOOT' region...
Created CBFS (capacity = 2096856 bytes)
Performing operation on 'COREBOOT' region...
Performing operation on 'COREBOOT' region...
CBFS   fsp.bin
Performing operation on 'COREBOOT' region...
E: Not enough space for content.
E: Could not add [fsp, 294912 bytes (288 KB)@0x1bff00]; too big?
E: Failed to add '../intel/fsp/baytrail/BAYTRAIL_FSP_D.fd' into ROM image.
E: Failed while operating on 'COREBOOT' region!
E: The image will be left unmodified.
make: *** [build/coreboot.pre] Error 1

Can you please anyone help me on this?

Thanks in advance,
Kathappan

L Technology Services Ltd

www.LntTechservices.com

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Re: [coreboot] How to protect binary in flash chip? OTP?

2016-05-05 Thread Persmule 
DRM methods cannot "protect" anything. They can only do harm to end users.

For example, I believe end users have the right to back up the content of the 
flash chip, in order to reflash it back once the content of the flash gets 
broken, just as we do when developing coreboot, which will become impossible if 
copy protection is applied.

As you have said, the problem seems only lying between you and some hardware 
vendors. I suggest you not let it harm end users of your code.

Please forgive my arrogence, but please, do not harm end users.

On Fri May   6 12:17:51 2016 Persmule  wrote:
> Sorry for my rudeness, but I do not believe copy protection, or any form
> of immoral Digital Restriction Management is able to be a solution to
> count products.
>
> On Fri May    6 11:39:54 2016 Zheng Bao  wrote:
> > I don't protect my source. I gave the source to customers. I just want
> > to protect binary. Customer doesnt know how to build.
> >
> > In a business, customer dont tell the correct production amount as what
> > is wrote in the contract.    It is not my fault.
> >
> >
> >
> > 
> > > From: persm...@gmail.com
> > > To: fishb...@hotmail.com; coreboot@coreboot.org
> > > Subject: Re: [coreboot] How to protect binary in flash chip? OTP?
> > > Date: Fri, 6 May 2016 10:41:44 +0800
> > >
> > >
> > > Don't you feel ashamed to ask coreboot, a free firmware project, for
> > >       copy protection techiques?
> > >
> > > On Fri May    6 08:45:51 2016 Zheng Bao    
> > > > wrote:
> > > > Hi, All,
> > > > Is there any way to protect the binary image in flash chip from
> > > > being    copied? Once the customers gets the image, they can produce
> > > > millions of    board and do not tell me. I just want to know the
> > > > amount of the mass    production.
> > > >
> > > > OTP seems to be a way, but it is not 100%. The data in OTP is
> > > > readable    and can be copied to a new chip's OTP erea.
> > > >
> > > > Do you guys have any more suggestion?
> > > >
> > > > Zheng
> > > >
> > > >
> > > > --
> > > > coreboot mailing list:
> > > > coreboot@coreboot.org
> > > > https://www.coreboot.org/mailman/listinfo/coreboot
> > >
> >                                 
>

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Re: [coreboot] How to protect binary in flash chip? OTP?

2016-05-05 Thread Persmule 
Sorry for my rudeness, but I do not believe copy protection, or any form of 
immoral Digital Restriction Management is able to be a solution to count 
products. 

On Fri May   6 11:39:54 2016 Zheng Bao  wrote:
> I don't protect my source. I gave the source to customers. I just want
> to protect binary. Customer doesnt know how to build.
> 
> In a business, customer dont tell the correct production amount as what
> is wrote in the contract.   It is not my fault.
> 
> 
> 
> 
> > From: persm...@gmail.com 
> > To: fishb...@hotmail.com; coreboot@coreboot.org 
> > Subject: Re: [coreboot] How to protect binary in flash chip? OTP? 
> > Date: Fri, 6 May 2016 10:41:44 +0800 
> > 
> > 
> > Don't you feel ashamed to ask coreboot, a free firmware project, for   
> > copy protection techiques? 
> > 
> > On Fri May   6 08:45:51 2016 Zheng Bao   
> > > wrote: 
> > > Hi, All, 
> > > Is there any way to protect the binary image in flash chip from
> > > being   copied? Once the customers gets the image, they can produce
> > > millions of   board and do not tell me. I just want to know the
> > > amount of the mass   production. 
> > > 
> > > OTP seems to be a way, but it is not 100%. The data in OTP is
> > > readable   and can be copied to a new chip's OTP erea. 
> > > 
> > > Do you guys have any more suggestion? 
> > > 
> > > Zheng 
> > > 
> > > 
> > > -- 
> > > coreboot mailing list:
> > > coreboot@coreboot.org 
> > > https://www.coreboot.org/mailman/listinfo/coreboot 
> > 
>                                

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Re: [coreboot] How to protect binary in flash chip? OTP?

2016-05-05 Thread ron minnich 
On Thu, May 5, 2016 at 7:54 PM Persmule  wrote:

> Don't you feel ashamed to ask coreboot, a free firmware project, for copy
> protection techiques?
>
>
>
>
Zheng Bao has nothing to be ashamed of, he made at least 187 commits to
coreboot from 2008 to 2015 -- and they were not simple ones by any means.

Your comment is unfair.

ron
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Re: [coreboot] How to protect binary in flash chip? OTP?

2016-05-05 Thread Zheng Bao 
I don't protect my source. I gave the source to customers. I just want to 
protect binary.
Customer doesnt know how to build.

In a business, customer dont tell the correct production amount as what is 
wrote in the contract. 
It is not my fault.




> From: persm...@gmail.com 
> To: fishb...@hotmail.com; coreboot@coreboot.org 
> Subject: Re: [coreboot] How to protect binary in flash chip? OTP? 
> Date: Fri, 6 May 2016 10:41:44 +0800 
>  
>  
> Don't you feel ashamed to ask coreboot, a free firmware project, for  
> copy protection techiques? 
>  
> On Fri May  6 08:45:51 2016 Zheng Bao  
> > wrote: 
> > Hi, All, 
> > Is there any way to protect the binary image in flash chip from being 
> > copied? Once the customers gets the image, they can produce millions of 
> > board and do not tell me. I just want to know the amount of the mass 
> > production. 
> > 
> > OTP seems to be a way, but it is not 100%. The data in OTP is readable 
> > and can be copied to a new chip's OTP erea. 
> > 
> > Do you guys have any more suggestion? 
> > 
> > Zheng 
> > 
> > 
> > -- 
> > coreboot mailing list: coreboot@coreboot.org 
> > https://www.coreboot.org/mailman/listinfo/coreboot 
>  
  
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Re: [coreboot] How to protect binary in flash chip? OTP?

2016-05-05 Thread Persmule 
Don't you feel ashamed to ask coreboot, a free firmware project,  for copy 
protection techiques?

On Fri May   6 08:45:51 2016 Zheng Bao  wrote:
> Hi, All,
> Is there any way to protect the binary image in flash chip from being
> copied? Once the customers gets the image, they can produce millions of
> board and do not tell me. I just want to know the amount of the mass
> production.
> 
> OTP seems to be a way, but it is not 100%. The data in OTP is readable
> and can be copied to a new chip's OTP erea.
> 
> Do you guys have any more suggestion?
> 
> Zheng
> 
>                                
> -- 
> coreboot mailing list: coreboot@coreboot.org
> https://www.coreboot.org/mailman/listinfo/coreboot

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[coreboot] How to protect binary in flash chip? OTP?

2016-05-05 Thread Zheng Bao 
Hi, All,
Is there any way to protect the binary image in flash chip from being copied? 
Once the customers
gets the image, they can produce millions of board and do not tell me. I just 
want to know the
amount of the mass production.

OTP seems to be a way, but it is not 100%. The data in OTP is readable and can 
be copied to a new chip's
OTP erea.

Do you guys have any more suggestion?

Zheng

  
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Re: [coreboot] sign fsfe radio lock down statement

2016-05-05 Thread Martin Roth 
Hey Lynxis,
  In general, the feeling is that the coreboot project should stay out
of politics if it's not explicitly about coreboot.  This issue is
probably close enough that we'd at least be interested in hearing more
about what the expectations are.

  I'll send an email to the fsfe campaign manager and include you and stefan.

Martin

On Wed, May 4, 2016 at 10:51 AM, Alexander Couzens  wrote:
> hi,
>
> https://fsfe.org/activities/radiodirective/statement
>
> IMHO: this lockdown is also one thing against coreboot, because the
> hardware has to be locked downed.
>
> Can we sign it?
>
> Best,
> lynxis
> --
> Alexander Couzens
>
> mail: lyn...@fe80.eu
> jabber: lyn...@fe80.eu
> mobile: +4915123277221
> gpg: 390D CF78 8BF9 AA50 4F8F  F1E2 C29E 9DA6 A0DF 8604
>
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Re: [coreboot] autoport segfault on ibexpeak

2016-05-05 Thread Stefan Tauner 
On Wed, 4 May 2016 19:00:40 -0600
Trammell Hudson  wrote:

> On Thu, May 05, 2016 at 01:14:28AM +0200, Stefan Tauner wrote:
> > Felix suggested that inteltool -a might be the culprit... and I can
> > confirm this. However, inteltool has worked without such issues in the
> > past on this machine... if nobody beats me to it I'll investigate
> > further/bisect when time allows.
> 
> inteltool -a causes a hard lockup on my X1 with Skylake (i7-6600U).
> I've been slowly trying to add support for it.

I could bisect the issue and it is due to the dumping of the graphics
registers (in my case). See also
https://review.coreboot.org/14624
https://review.coreboot.org/14627

> 
> autoport also fails with a null pointer in DetectGPE, due to an
> unsupported Southbridge (QM170?).
> 

Yes... I won't touch that for now.

-- 
Kind regards/Mit freundlichen Grüßen, Stefan Tauner

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[coreboot] Serial prints not coming on Minnowboard Turbot

2016-05-05 Thread Mayuri Tendulkar 
Hi

I have built coreboot using Minnowmax config file in coreboot with seabios 
payload.

I don't see any serial console prints. Can you please confirm what could be the 
issue?

If I flash Minnowboard Max file given on intel site, everything works fine and 
I see UEFI shell prompt.

Regards
Mayuri

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