[coreboot] Re: Instruction to verify emulation on GEM5
Dear Vivek, Am 16.07.20 um 00:46 schrieb Vivek Gupta via coreboot: I am currently looking to setup AARCH64 platform simulation verification of coreboot on Gem5 simulation environment. Do we have any document/wikipage to understand the compilation and configuration process? The tutorial [1] should get you started. Basically, coreboot uses Kconfig, but there is also the tool abuild [2], you might want to look at. Kind regards, Paul [1]: https://doc.coreboot.org/tutorial/index.html [2]: https://doc.coreboot.org/util.html ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Re: request simple information
Hi Marco, On Wed, Jul 15, 2020 at 6:25 PM Marco Franchi Moretti wrote: > > Thanks all coreboot core team for support and innovation, privacy and > free technology. I have a technician question. I have Onda OBook 11 > Plus, Intel Cherry Trail Z8300 64bit Quad Core and Intel Graphics. I > can ask at core team Coreboot: please suggest how to select in > menuconfig for try to install coreboot inside this tablet ? This mainboard isn't supported. That means there isn't any entry in menuconfig to build coreboot for this board. In such cases, one would need to port the board to coreboot, which would be rather complicated for Cherry Trail: there aren't any other Cherry Trail boards in the tree, and I don't know if the Braswell FSP supports Cherry Trail. > I hope someone respond, thanks for all. > ___ > coreboot mailing list -- coreboot@coreboot.org > To unsubscribe send an email to coreboot-le...@coreboot.org Best regards, Angel ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Instruction to verify emulation on GEM5
I am currently looking to setup AARCH64 platform simulation verification of coreboot on Gem5 simulation environment. Do we have any document/wikipage to understand the compilation and configuration process? -- Best regards, Vivek Gupta ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Coreboot on Samsung Kevin
Hey guys, i'm stumped and getting not much ideas on #coreboot on this. I bought an ssd-bricked samsung kevin and want to compile coreboot for it to make it boot arch from sd without crossystem flags set. My image compiles fine with the following hacks: use latest vboot, pin chromeec to commit before kevin support was dropped. I got an ec.bin to put into coreboot and enabled ELOG because i miss UART. The image boots after 2-3 reboots with a red stripe (this happens even without included ec.bin): https://i.imgur.com/qXA4hvI.jpg I take from it that basic init works. ELOG paste in hex is here: https://bpa.st/MYPQ - i cannot make any sense out of it. My menuconfig options should be kinda fine, i used boardname kevin where applicable and copied config.gru to config.kevin for libpayload. kevin has a soldered on servo header, but i will not be able to get my hands on a servo board from google, so i might try basic UART (no idea what this means honestly). I like ARM architecture and would like to open similiar designs to https://github.com/SolidHal/PrawnOS Any ideas are appreciated! Thanks, R ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Re: coreboot on Supermicro X9SCM-F?
On Thu, Jul 09, 2020 at 11:12:39PM +0100, U'll Be King of the Stars wrote: > Hello all, > > I was very excited when I saw that the Supermicro X9SCL(+-F) and X9SCM(+F) > boards seem to be supported by coreboot. > > Can somebody please tell me whether the -F versions are supported, and how > well? I have several X9SCM-F boards, and I would love for coreboot to be an > option for them. If it helps I would be very happy to test coreboot on the > X9SCM-F to help understand the unknowns. > While I have "successfully" tested on X9SCM-F, I have not extensively tested the BMC functionality while booted with coreboot, among other less-trivial to test features. Currently coreboot ignores the IPMI KCS functionality of X9SCL family boards, and even when it's enabled in coreboot, about all it does is wait for the BMC to finish booting. In any case, there doesn't seem to be glaringly obvious problems caused by ignoring the BMC in coreboot. Some BMC feature completeness could perhaps be improved with some changes that are/were going through review recently. I do not have complete information on what signals exist between the BMC and the rest of the mainboard other than the obvious PCI, LPC, and power state management signals. This may limit what degree of completeness can be accomplished with a reasonable amount of work. I should look at my working tree to see what else may need to be submitted upstream for a more complete port. I know there are some things missing upstream still, such as thermostat setup for the fan controller. I currently have X9SCL, X9SCM-F, and X9SCL+-F boards to test with. These boards have a jumper and header for SPI access should the coreboot build not function correctly. The initial coreboot flashing can be completed without an external programmer, although I strongly recommend having a suitable external programmer setup (and backup flash image) that is known to work should any problems arise. Jonathan ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Re: F2A85-M - amdgpu fails, integrated GPU works fine
Hi, this time I'm using Debian testing. Drivers shouldn't be a problem since I get drastically different results on the same hardware/software combination, the only difference being different BIOS chip plugged in(F2-A85m allows to swap them easily). One chip has proprietary BIOS, second one Coreboot. 14 Jul 2020, 11:57 by mikeb...@gmail.com: > Hi Grzegorz , please remind what Linux distro you're using and how > fresh is its' drivers/software. AMD drivers really improved during the > last couple of years, but if you're running some ancient "debian" - of > course GPU performance is lower than expected. Myself, I'm currently > using Artix Linux - while it has a really fresh software (just like > Arch), it almost never breaks, and doesn't have a SystemD (good for > you if you don't like it as well). > > On Mon, Jul 6, 2020 at 11:39 PM Grzegorz Bogdał > wrote: > >> >> Sorry, I've been overeager with that report. GPU initializes and is good for >> desktop use, but the performance in games is abysmal >> >> >> 6 Jul 2020, 20:56 by bogdal.grzeg...@tutanota.com: >> >> It took a while, but I've flashed coreboot from newest master on F2-A85m+RX >> 570 and it works. Great stuff, thank you for your work: ) >> >> >> 13 Jan 2020, 17:28 by mikeb...@gmail.com: >> >> Jan 12, 2020, 14:43 by mikeb...@gmail.com: >> >> Solution for your coreboot + discrete GPU problems like >> >> amdgpu kernel bo map failed [...] error -22 >> amdgpu_vram_scratch_init failed [...] error -22 >> fatal error in GPU initialization >> >> It turned out that a fix like >> https://review.coreboot.org/c/coreboot/+/38215 ( /* Set to 0xD0 >> instead of 0xE0 to avoid the PCI resource allocation problems. */ >> InitPost->MemConfig.BottomIo = 0xD0; // at the beginning of >> board_BeforeInitPost function at board's OemCustomize.c ) that worked >> for HD6670, is not enough for a huge RX590 - which is huge in all >> relations, but most importantly the memory ranges! >> >> To get RX590 working with ASUS A88XM-E, I had to decrease a BottomIo >> even further - to 0xC0 - and also to reduce the >> BLDCFG_UMA_ALLOCATION_SIZE at board's buildOpts.c from 0x2000 (512MB) >> to 0x1000 (256MB), - to get this extra "0xD0-0xC0"=0x1000 room. >> And then it worked perfectly, at least with DRI_PRIME=1 ./Supertuxkart >> GPU offloading: ultra settings on integrated - 4 or 5 fps, with >> offloading - 60 fps. I'm sure this fix will work for your other RX 5** >> as well, but don't know if I should be trying to commit it to master, >> since it lowers the integrated GPU's shared memory. >> >> RX590 is the most powerful AMD GPU which does not contain a Platform >> Security Processor aka PSP (yes, they've started adding this crap to >> the GPUs as well, and newer Vega / RX 5*** are all contaminated - see >> for yourself at freedesktop drm/amdgpu sources) . That's why it was >> really important to get RX590 working. So happy it was possible, >> thanks to you all ;-) >> >> On Mon, Jan 13, 2020 at 2:21 AM Grzegorz Bogdał >> wrote: >> Great job!: ) So, A10-6800k/FX-8xxx combined with RX 590 is probably the >> strongest x86 desktop without PSP/ME that we'll get in this reality? >> >> >> Yes, if you meant x86 desktop "supported by coreboot master" - >> regarding the CPUs ;-) Otherwise there is a supported-by-coreboot-4.11 >> M5A88-V motherboard with AM3+ (maybe can put FX-9590 there, if >> coreboot supports and without frying it?) and KGPE-D16 with its' two >> Opterons 6386 SE for a large desktop. Also, PDF [link 1] at page 12 >> says Carrizo is the "1st ARM Trustzone Capable Performance APU", that >> means Kaveri and its' refresh Godavari (i.e. A10-7890K) doesn't have a >> PSP. A88XM-E motherboard is FM2+ socket, so theoretically it could >> support Godavari A10-7890K. However Balazs wrote that AGESA of Kaveri >> is a blob (not good!) and there's uncertainty if could get it working >> without getting this APU for trying. >> >> As you see, there are CPUs more powerful than A10-6800K which don't >> have a PSP crap but their coreboot master support is questionable. And >> don't want to be without coreboot, since UEFI could have many holes >> and stuff like Computrace which doesn't need to rely on ME/PSP to >> function. So yes, A10-6800K seems to be the best at the moment. I got >> A10-6700 only because its' quite hard to find a new A10-6800K for a >> reasonable price and I read about bad overclockers who played too much >> with core voltages and cores deteriorate, becoming unstable even at >> stock speeds (so one needs to underclock then). A10-6700 is the most >> powerful with a locked multiplier, so less attractive to overclockers >> and may be safer to buy used. >> >> GPUs: yes, RX590 is the most powerful GPU without PSP ! (not >> considering NVidia at all because of their proprietary driver tricks >> and hostility towards the opensource) . Although there is RX600 series >> [link 2], they are hard to buy and lower performance. Unlike the >> majority of people (who don't care abo
[coreboot] request simple information
Thanks all coreboot core team for support and innovation, privacy and free technology. I have a technician question. I have Onda OBook 11 Plus, Intel Cherry Trail Z8300 64bit Quad Core and Intel Graphics. I can ask at core team Coreboot: please suggest how to select in menuconfig for try to install coreboot inside this tablet ? I hope someone respond, thanks for all. ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Re: Extended IvyBridge CPU configuration
Hi Lars, list, On Wed, Jul 15, 2020 at 5:41 PM Lars Hochstetter wrote: > > Update: I tried the https://review.coreboot.org/c/coreboot/+/42547/ on > my T430 (i7-3840QM, Debian Buster 4.19.0-9-amd64) using coreboot v4.12 + > SeaBIOS as base. > > I used s-tui to track the CPU frequency. > > Without the patch on coreboot v4.12 the CPU reached its "usual" 3.3 - > 3.4 GHz (4C/8T) using the stress function of s-tui. > > With the patch the CPU reached at most 3.2GHz (intel_pstate) / 2.8GHz > (acpi-cpufreq). Thanks for testing! I'm the one who made that change, and I currently only have two CPUs to test it with. I generally check the CPU frequency with: `cat /proc/cpuinfo | grep MHz` > Maybe there is an issue with mobile CPUs? I'd say the issue is because of how I determine the overclocking headroom that the CPU is capable of. On my CPUs, it happens that the number of OC bins is the same as the number of steps between the base frequency ratio and the maximum turbo ratio. I imagine this isn't the case for other CPUs (which I do not currently have any of nearby) and would explain why the gains aren't as high as expected. It would be nice if you could provide a few MSR values from that CPU. You can use `rdmsr` from msr-tools: https://github.com/intel/msr-tools * 0xce (MSR_PLATFORM_INFO) * 0x194 (MSR_FLEX_RATIO) * 0x1ad (MSR_TURBO_RATIO_LIMIT) > On 24.06.20 20:00, Lars Hochstetter wrote: > > Hi, thanks for the pointer! > > > > I only fear that running my CPU at the maximum possible Turbo Ratio > > will overheat it. > > > > I can give it a try but I'm actually looking for an option to limit > > the maximum Turbo Ratio the CPU is allowed to reach (hence the > > disabling of TurboBoost altogether). In its current state, my patch seems to achieve that :P > > On 21/06/2020 00:52, Evgeny Zinoviev via coreboot wrote: > >> Hi again. There's another patch that fits to the topic that you will > >> probably want to try out: > >> https://review.coreboot.org/c/coreboot/+/42547/ > >> > >> On 12/15/19 3:57 PM, Lars Hochstetter wrote: > >>> Hi everyone, > >>> > >>> I'm looking for an option to configure my Intel IvyBridge CPU > >>> (enable / disable Hyperthreading, TurboBoost, set configurable TDP > >>> level etc.) using coreboot / nvramcui. My board is a Lenovo Thinkpad > >>> T430. So far, "only virtualization" is configurable and can not be > >>> enabled / disabled "in flight" but requires a rebuild of coreboot. > >>> > >>> Is anyone currently working on something similar? > >>> > >>> Is anything planned in that regard? > >>> > >>> Kind regards > >>> > >>> lhochstetter Thanks in advance, Angel ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Re: Extended IvyBridge CPU configuration
Update: I tried the https://review.coreboot.org/c/coreboot/+/42547/ on my T430 (i7-3840QM, Debian Buster 4.19.0-9-amd64) using coreboot v4.12 + SeaBIOS as base. I used s-tui to track the CPU frequency. Without the patch on coreboot v4.12 the CPU reached its "usual" 3.3 - 3.4 GHz (4C/8T) using the stress function of s-tui. With the patch the CPU reached at most 3.2GHz (intel_pstate) / 2.8GHz (acpi-cpufreq). Maybe there is an issue with mobile CPUs? On 24.06.20 20:00, Lars Hochstetter wrote: Hi, thanks for the pointer! I only fear that running my CPU at the maximum possible Turbo Ratio will overheat it. I can give it a try but I'm actually looking for an option to limit the maximum Turbo Ratio the CPU is allowed to reach (hence the disabling of TurboBoost altogether). On 21/06/2020 00:52, Evgeny Zinoviev via coreboot wrote: Hi again. There's another patch that fits to the topic that you will probably want to try out: https://review.coreboot.org/c/coreboot/+/42547/ On 12/15/19 3:57 PM, Lars Hochstetter wrote: Hi everyone, I'm looking for an option to configure my Intel IvyBridge CPU (enable / disable Hyperthreading, TurboBoost, set configurable TDP level etc.) using coreboot / nvramcui. My board is a Lenovo Thinkpad T430. So far, "only virtualization" is configurable and can not be enabled / disabled "in flight" but requires a rebuild of coreboot. Is anyone currently working on something similar? Is anything planned in that regard? Kind regards lhochstetter ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Porting Coreboot without Intel FSP
Pardon me for absurd questions, I am a noob. Is there any way to port coreboot to my netbook without Intel FSP. Or is there any way I could generate Intel FSP for my netbook? My netbook has Intel Atom N2600 CPU which doesn't seem to have any Intel FSP available. Please, if there is any guide to port coreboot to a new device WITHOUT Intel FSP, tell me about it. And can you tell me the difference between Coreboot and U-Boot and how each one is different from the other? Thanks Alif ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
