[coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
Hi, Despite my many test I can not run correctly coreboot on my motherboard. Here is my hardware: _F2A85-M REV 1.02 _AMD A8-6600K APU (Radeon HD 8570D vga = 1002,990e) _Corsair Value Select 4 Go DDR3 1333 MHz CL9 (CMV4GX3M1A1333C9) lspci 00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 10h-1fh) Processor Root Complex 00:01.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Richland [Radeon HD 8570D] 00:01.1 Audio device: Advanced Micro Devices, Inc. [AMD/ATI] Trinity HDMI Audio Controller 00:10.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB XHCI Controller (rev 03) 00:10.1 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB XHCI Controller (rev 03) 00:11.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] (rev 40) 00:12.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller (rev 11) 00:12.2 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller (rev 11) 00:13.0 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB OHCI Controller (rev 11) 00:13.2 USB controller: Advanced Micro Devices, Inc. [AMD] FCH USB EHCI Controller (rev 11) 00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 14) 00:14.2 Audio device: Advanced Micro Devices, Inc. [AMD] FCH Azalia Controller (rev 01) 00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 11) 00:14.4 PCI bridge: Advanced Micro Devices, Inc. [AMD] FCH PCI Bridge (rev 40) 00:15.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Hudson PCI to PCI bridge (PCIE port 0) 00:15.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Hudson PCI to PCI bridge (PCIE port 1) 00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 10h-1fh) Processor Function 0 00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 10h-1fh) Processor Function 1 00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 10h-1fh) Processor Function 2 00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 10h-1fh) Processor Function 3 00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 10h-1fh) Processor Function 4 00:18.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Family 15h (Models 10h-1fh) Processor Function 5 03:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 09) I proceeded to build a standard coreboot image using seabios as a payload (using a local copy of the VGA bios and embedding this into the coreboot image), leaving all the settings as default apart from selecting the motherboard, upon writing this to the flash and rebooting the machine I had no output from the VGA & HDMI adapter and and my keyboard is frozen. Can you send me a link to a known-good image that you use? So that i can verify my hardware is compatible. Does he work the revision 1.02 of this motherboard in coreboot? Thank you for your help. -- Best regards, HacKurx (Loic) hackurx.wordpress.org -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
> Is it Richland or Trinity? Seems it is Richland. I haven't tried with > Richland yet. Yes indeed it's Richland. > It would be helpful if you could include log from serial console. Maybe you > hit some other problem. How without serial port? > You can also try to put memory only to blue slots. Okay I'll test this. >Mine board is also 1.02 version. I think something wrong is with memory setup >or cpu setup. Does original BIOS use 1.65V for DDR2 memory? >You should select >that in configuration too. In the original bios I saw 1.5V for DDR3 memory. But I'll look and test it. Thanks. 2014-01-29 Rudolf Marek : > Hi, > >> _F2A85-M REV 1.02 >> >> _AMD A8-6600K APU (Radeon HD 8570D vga = 1002,990e) >> _Corsair Value Select 4 Go DDR3 1333 MHz CL9 (CMV4GX3M1A1333C9) > > > Is it Richland or Trinity? Seems it is Richland. I haven't tried with > Richland yet. > >> I proceeded to build a standard coreboot image using seabios as a >> payload (using a local copy of the VGA bios and embedding this into >> the coreboot image), leaving all the settings as >> default apart from selecting the motherboard, upon writing this to the >> flash and rebooting the machine I had no output from the VGA & HDMI >> adapter and >> and my keyboard is frozen. > > > It would be helpful if you could include log from serial console. Maybe you > hit some other problem. > > You can also try to put memory only to blue slots. > >> Can you send me a link to a known-good image that you use? So that i can >> verify my hardware is compatible. > > > >> Does he work the revision 1.02 of this motherboard in coreboot? > > Mine board is also 1.02 version. I think something wrong is with memory > setup or cpu setup. Does original BIOS use 1.65V for DDR2 memory? You should > select that in configuration too. > > You can come to IRC #coreboot on freenode.net > > I'm here until midnight GMT+2 > > Thanks > Rudolf > > > >> >> >> Thank you for your help. >> > -- Best regards, HacKurx www.hackurx.info -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
> No way. You will need to use serial port. Just plug the header to mainboard > and use some USB 2 serial from other computer (together with null > modem cable) if you need more info please let me know. Do you have any links, diagram or picture for this method? Thanks > It looks some people can send me some money and I could buy the richland to > see if it works... but this could happen somewhere in March. Okay, I could send you the ddr3 memory if you need it. > The image I sent to you will most likely not POST the image because of > different IDs, but X.org could initialize it. I tested it and I do not even turn on the LEDs on my keyboard. I also think that I do not even reaches grub. I also designed several Roms defining "1002,990e" for the vga bios but I get the same result. I can put online my vgabios if you want. Thank you very much. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
2014-02-01 Rudolf Marek : > You should see some output of coreboot. Capture it via (ctrl a l shortcut in > minicom) to a file and send it back to list. > > If is something unclear, please let us know. You need to make it up to next > Friday. I will be then long time AFK and I will back in March. Perfect thank you for this whole procedure. This is what I obtain: My rom (with my vga bios): coreboot-4.0-5394-gba6b07e Thu Jan 30 19:48:58 CET 2014 starting... BSP Family_Model: 00610f31 cpu_init_detectedx = agesawrapper_amdinitreset Your rom (with your vga bios): coreboot-4.0-5310-g065289c Tue Jan 21 15:52:56 CET 2014 starting... BSP Family_Model: 00610f31 cpu_init_detectedx = agesawrapper_amdinitreset idwer rom (http://ra.openbios.org/~idwer/f2a85-m/coreboot_1002_990c.rom): coreboot-4.0-4745-g1ce4860-dirty Tue Oct 29 17:29:28 UTC 2013 starting... BSP Family_Model: 00610f31 cpu_init_detectedx = agesawrapper_amdinitreset Obviously this should be the processor that is the problem. Thanks, Best regards, HacKurx -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
> OK. Please can you enable AGESA debug stuff. It should produce more > output. > > You can do that by uncommenting #define IDSOPT_IDS_ENABLED in mainboard > directory OptionsIds.h file. > > We dont have a menuconfig for that yet. I made it. There is in my file: grep "#define IDSOPT_IDS_ENABLED" coreboot/src/mainboard/asus/f2a85-m/OptionsIds.h #define IDSOPT_IDS_ENABLED TRUE I get exactly the same result with this option... I also tested the following options without success. : CONFIG_DEBUG_CBFS CONFIG_DEBUG_MALLOC CONFIG_DEBUG_ACPI CONFIG_DEBUG_SPI_FLASH What can I do now? Thanks. Best regards, -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
> Please double check IDSOPT_IDS_ENABLED. > > I have first-hand experience with Rudolf's suggestion to use that #define, I > have an F2A85-M as well. With IDSOPT_IDS_ENABLED, the serial output is > significantly longer. I suspect the build system does not catch the change > since it's not in menuconfig. > > Perhaps try 'make clean' followed by all the normal build steps? I tried several times but I still get the same result. I tried to start with clean git, and I've already used "make clean" to no avail. If in doubt, do not hesitate to create a rom for me that I test. So the output now that I can get without this: coreboot-4.0-5454-g400c05c-dirty vendredi 7 février 2014, 09:25:15 (UTC+0100) starting... POST: 0x34 BSP Family_Model: 00610f31 cpu_init_detectedx = POST: 0x37 agesawrapper_amdinitreset Thank -- Best regards, HacKurx www.hackurx.info -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
>> Very odd. I had hoped it was something easy. I wonder what differs for >> Richland (as Idwer said) so that it doesn't work. My best understanding of >> Richland (A10-6800K) is that the memory controller has higher rated speeds >> but should work with Trinity AGESA code, since the Trinity AGESA code >> already had the ability to overclock to 2133 MHz DDR3. >> >> It seems the problem is getting a good debug log with IDSOPT_IDS_ENABLED, >> and that is baffling. I've attached a coreboot image, but please check the >> config and use cbfstool for payloads *before* flashing it. >> >> David >> >> Here is the .config I used. Also, this is a pretty old version of coreboot >> (7bb29d72ab89c300fa899a8cf39803ae8f101ff4). > > The email with the rom attached is too big for the coreboot list, but > HacKurx, please let me know if you try out the rom. > > David Thank you, I tested your rom and I get the same result: coreboot-4.0-4561-g7bb29d7 Wed Jul 24 23:26:25 MDT 2013 starting... BSP Family_Model: 00610f31 cpu_init_detectedx = agesawrapper_amdinitreset > The problem is that we don't have Richland AGESA code: > src/vendorcode/amd/agesa/f15rl/ does, unfortunately, not exist. > > Idwer Thank you for this information. Please indicate the compatible processor on the motherboard page. I think tried to contact people from AMD to get the Richland AGESA code. -- Best regards, HacKurx www.hackurx.info -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
Peter wrote: > You might want to test my patch which exposes the IDS options in Kconfig: Ok thank you I'll test it soon (I'm in the middle of moving). Idwer wrote: > I'll add it to the board's wiki page. Perfect thank you. I am in contact with a responsable from AMD I hope get the Richland AGESA code. Time will tell... -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
> Peter wrote: >> You might want to test my patch which exposes the IDS options in Kconfig: Thank you for adding this great feature that I hope will be added by default in Kconfig. Unfortunately, this option has no more help me to solve my problem with the richland architecture. With no response from AMD I despair. -- Best regards, -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
> Scott wrote: > > The cupid is not found because trinity support is included but > richland support is needed. I do not know if forcing the trinity > code to run on richland will work, but you could try it. One way > to try it is to change the == to != on line 255 of file > vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.c. Thank you very much, it is more verbose: http://pastebin.com/Nszbv9p1 What do you think from this? Thanks -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
> David wrote: > With just 1 stick in the A1 slot, please post a pastebin of the console > output. Perfect! It is perfectly detailed, the cpu is not recognized: http://pastebin.com/2Lbew82b Thanks, best regards, -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
> David wrote: > It would still be helpful if you can post the details for this stick. 1 Corsair CMV4GX3M1A1333C9 (4Gb & 1,5 Volt) http://www.ldlc.com/fiche/PB00104214.html > You may also want to post the output of "git diff" for others who may want to > try Richland on the F2A85-M. Ok, no problem :) http://pastebin.com/sTFzE5YN > Scott wrote: > you could try adding your cupid to the list One more step :) http://pastebin.com/kD2zmbua Thanks, 2014-02-26 23:20 GMT+01:00 Scott Duplichan : > HacKurx [mailto:hack...@gmail.com] wrote: > > ]> David wrote: > ]> With just 1 stick in the A1 slot, please post a pastebin of the console > ]> output. > ] > ]Perfect! It is perfectly detailed, the cpu is not recognized: > ]http://pastebin.com/2Lbew82b > > you could try adding your cupid to the list in > src/cpu/amd/agesa/family15tn/model_15_init.c: > > static struct cpu_device_id cpu_table[] = { > { X86_VENDOR_AMD, 0x610f00 }, /* TN-A0 */ > { X86_VENDOR_AMD, 0x610f31 }, /* RL-A1 */ > { 0, 0 }, > }; > Thanks, > Scott > > > ]Thanks, best regards, > > -- Best regards, HacKurx www.hackurx.info -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
> Scott wrote: > diff --git > a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c > b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c > index 8157b57..bfcaa9a 100644 > --- > a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c > +++ > b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnLogicalIdTables.c > @@ -86,6 +86,12 @@ STATIC CONST CPU_LOGICAL_ID_XLAT ROMDATA > CpuF15TnLogicalIdAndRevArray[] = > 0x6101, > AMD_F15_TN_A1 >}, > + > + { // HACK: let Richland run Trinity agesa code > +0x6131, > +AMD_F15_TN_A1 > + }, > + >{ > 0x6100, > 0x0100ull Perfect! It works, thank you very much! Coreboot log: http://pastebin.com/B0Z1bTQu Diff (I used CROSSGCC 1.23 because CROSSGCC 1.24 can not be compil on my system - Debian Wheezy amd64) : http://pastebin.com/nbt0JmqN My config file : http://pastebin.com/zJLQPkgX My CPU seems a little slower but it works :) It remains only to integrate this into the wiki and coreboot, I know that I can count on you ;) >From my side I will continue my tests. Thank you everybody, best regards. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Unable to start correctly coreboot on Asus f2a85-m REV 1.02
Rudolf Marek : Do you own also Trinity CPU? No only a Richland CPU. But I can do the tests you want to send you the results. maybe we can do some #ifdef config option which would enable this hack via configuration option. I test this hack since several days and I am very satisfied, I had no problem with him. Indeed, I think we should add it in the F2A85-M menu under a name "Experimental Support for Richand APU." Thanks -- Best regards, hackurx.wordpress.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] ASRock E350M1 start automatically after a electric cut
Hi, My E350M1 start automatically after a electric cut. I tested this in the hope but I get the same result: http://review.coreboot.org/#/c/5397/ I do not have this problem with the manufacturer bios. Does watchdog is used by default? Do you have an idea or solution? Thanks, best regards -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] ASRock E350M1 start automatically after a electric cut
>> Do you have an idea or solution? >Have a look at the power loss control bits inside the superio chip. They >specify what to do when the mainboard gets its standby power. Okay, but how please? I find things that seem interesting to me: cat /coreboot/src/mainboard/asrock/e350m1/buildOpts.c | grep POWER //#define BLDOPT_REMOVE_LOW_POWER_STATE_FOR_PROCHOT TRUE #define BLDCFG_VRM_LOW_POWER_THRESHOLD 24000 #define BLDCFG_VRM_NB_LOW_POWER_THRESHOLD 1 //#define BLDCFG_PLATFORM_POWER_POLICY_MODE Performance #define BLDCFG_MEMORY_POWER_DOWNTRUE #define BLDCFG_POWER_DOWN_MODE POWER_DOWN_BY_CHIP_SELECT /* POWER_DOWN_MODE */ #define POWER_DOWN_BY_CHANNEL0 ///< Channel power down mode #define POWER_DOWN_BY_CHIP_SELECT1 ///< Chip select power down mode Thanks, best regards -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] ASRock E350M1 start automatically after a electric cut
Hi, Sorry for the late reply. Tue Apr 15 08:42:36 CEST 2014, Paul : > The problem is probably that you have `USE_OPTION_TABLE` selected, where > the default is to restart on powerloss. The default option is "# CONFIG_USE_OPTION_TABLE is not set". I activated this option "CONFIG_USE_OPTION_TABLE=y" and I encounter no problems since :) Thanks you very much, best regards -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] F2A85-M: Chassis Fan Not Working
Hi, I just update coreboot on my motherboard and after reboot of my computer the chassis fan stopped working. I did not have this problem with the version of coreboot from 1 March 2014: http://review.coreboot.org/#/c/5226/ Have you an idea of the problem? Thank you -- Best regards, HacKurx hackurx.wordpress.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] F2A85-M: Chassis Fan Not Working
I implemented the initialization of hardware monitor ldn inside the ite chip. What do you mean "not working" stopped spinning? Thanks Rudolf Yes, stopped spinning. Thanks. -- Best regards, hackurx.wordpress.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] F2A85-M: Chassis Fan Not Working
Mon Jun 30 09:13:27 CEST 2014 schrieb Paul: does a start spinning for a moment and then stops or does it not start at all? Yes start spinning for a moment and then stops (Obviously until seabios menu.) Could you please bisect it and verify that commit 80b627eb (Asus F2A85-M: Move to ther proper SIO) [1] is the culprit? Okay. Already I have not had any problems with this version: http://review.coreboot.org/#/c/4498/ Thanks. -- Best regards, hackurx.wordpress.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] F2A85-M: Chassis Fan Not Working
Thu Jul 3 16:04:09 CEST 2014 Idwer Vollering : No, I can't reproduce that (see console output below). Then again, I don't use the boxed fan ;) Do(es) the fan(s) start when you put some load on your machine, to 'warm up' the APU? Play some 1080p video or compile a linux kernel I just compile a linux kernel and the fan still does not work. For me, the chassis fan must always run continuously. Wed Jul 2 10:01:49 CEST 2014 Paul Menzel : Could you test the versions afterward please? http://review.coreboot.org/#/c/4498 = Work (May 23, 2014 8:07 PM) http://review.coreboot.org/#/c/5800 = Does not work (May 23, 2014 8:13 PM) http://review.coreboot.org/#/c/5685 = Does not work (May 26, 2014 9:29 AM) http://review.coreboot.org/#/c/6179 = Does not work (Jul 5, 2014 12:39 PM) I will continue my tests and research on my free time. Thanks. -- Best regards, hackurx.wordpress.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] F2A85-M: Chassis Fan Not Working (resolved)
Sun Jul 6 22:47:58 CEST 2014 Rudolf Marek : Hi Hi, I think this is the problem: change the following line in the devicetree.cb register hwm_fan2_ctl_pwm = "0x80" To 0x00 Yes it perfect, my problem is resolved. For some reason automatic settings for fan2 does not work... or is badly set up. My fan is a "be quiet! pure wings 2" with 3-pin connector (therefore not PWM). Thank you very much for your help. -- Best regards, hackurx.wordpress.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] Asrock E350M1: Display regression in Linux
Good morning, everyone, I hadn't updated my coreboot version for a long time on my Asrock E350M1 card because of lack of time and because this one was on a very stable version. While trying to test the current 4.12 version, I encountered problems in Debian 10. Indeed, there is a bad graphical detection, the resolution of my hdmi output went from 1360x768 to 720x400 pixels. Xorg indicates that the drm device cannot be opened : (EE) open /dev/dri/card0: No such file or directory I once had a Oops kernel message: https://pastebin.com/uZLZyYrq My coreboot graphical configuration is as follows: CONFIG_VGA_BIOS_ID="1002,9802" CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_VGA_BIOS=y CONFIG_VGA_BIOS_FILE="vgabios.bin" I manage to restore normal working in coreboot 4.12-git by removing the commits: a5c2ac6256d0dae112b24c422d1270919acb6321 "x86/acpi: Add VFCT table" 6f978cfd1ab6a57e5729e19bed3df7702c4f09cb "x86/acpi: Use initialized VBIOS in VFCT table" Thank you. Best regards, Loic ___ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-le...@coreboot.org
[coreboot] Re: Asrock E350M1: Display regression in Linux
Le 2020-06-04 12:49, Paul Menzel a écrit : > Thank you for the report. Thank you for your answer. > Am 04.06.20 um 11:26 schrieb HacKurx: >> Good morning, everyone, >> >> I hadn't updated my coreboot version for a long time on my Asrock >> E350M1 card because of lack of time and because this one was on a very > > I guess you mean *board* and not *card*? Motherboard. Sorry for English ;) >> stable version. While trying to test the current 4.12 version, I >> encountered problems in Debian 10. > > What coreboot version did you use before? Before, coreboot-4.2-20160128 with SeaBIOS-1.9.0 But because of the problem, I've been testing coreboot-4.5-20170204 (commit 8a06cc7ec8 util/ifdtool: Fix ICH Gbe unlock) with SeaBIOS-1.13.0-20200603 which works well (it's the commit before the one I had to reverse). >> Indeed, there is a bad graphical detection, the resolution of my hdmi >> output went from 1360x768 to 720x400 pixels. >> Xorg indicates that the drm device cannot be opened : >> (EE) open /dev/dri/card0: No such file or directory >> >> I once had a Oops kernel message: >> https://pastebin.com/uZLZyYrq > > For the future, please attach the logs to the message, so people can > read it offline. All right. >> I manage to restore normal working in coreboot 4.12-git by removing the >> commits: >> a5c2ac6256d0dae112b24c422d1270919acb6321 "x86/acpi: Add VFCT table" >> 6f978cfd1ab6a57e5729e19bed3df7702c4f09cb "x86/acpi: Use initialized >> VBIOS in VFCT table" > > I cannot remember seeing this on my board [1], but I am only using the > VGA adapter (shouldn’t matter). > > [1.552912] [drm] Found smc ucode version: 0x00010601 In linux : drivers/gpu/drm/radeon/sumo_dpm.c:DRM_INFO("Found smc ucode version: 0x%08x\n", pi->fw_version); > These commits have been present since coreboot 4.6, and I have not > seen this. It just provides the VGA Optiom ROM/Video BIOS to the > graphics driver via ACPI. I just change the coreboot version without changing my OS. As soon as I overrun a version with this commit, I get a display problem. > Do you have the AMD graphics firmware files installed under > `/lib/firmware/radeon`? Yes. We can even see the loading the dmesg: [4.816786] [drm] Loading PALM Microcode [4.816872] radeon :00:01.0: firmware: direct-loading firmware radeon/PALM_pfp.bin [4.816909] radeon :00:01.0: firmware: direct-loading firmware radeon/PALM_me.bin [4.816941] radeon :00:01.0: firmware: direct-loading firmware radeon/SUMO_rlc.bin [4.816957] [drm] Found smc ucode version: 0x00010601 [4.817038] BUG: unable to handle kernel NULL pointer dereference at md5sum /lib/firmware/radeon/* 59375dccb37f974c045575cd9428009a /lib/firmware/radeon/ARUBA_me.bin b3072fac01a6eab4711c18148c8bc305 /lib/firmware/radeon/ARUBA_pfp.bin 246d1c75a5946829f6864dbd5f71d850 /lib/firmware/radeon/ARUBA_rlc.bin c46650c28080fe43f674a92d6445c24c /lib/firmware/radeon/banks_k_2_smc.bin 158f8e21ccf228ef063888c4f637fbf0 /lib/firmware/radeon/BARTS_mc.bin 8012e24b187c6b1ba17fa48691c3b048 /lib/firmware/radeon/BARTS_me.bin b08d560e8f57d700fd67957584e0567c /lib/firmware/radeon/BARTS_pfp.bin 24a4c72d0bc120ffd2283e428faf432b /lib/firmware/radeon/BARTS_smc.bin eafb0d4d92a7e3f43997529598bbf885 /lib/firmware/radeon/bonaire_ce.bin 44ec9d529b6fb44d4dd0a219e3218a1e /lib/firmware/radeon/BONAIRE_ce.bin 53fcd7884233b08265e25a9774c551a8 /lib/firmware/radeon/bonaire_k_smc.bin a5c850b985edffb7cae097f207f0611e /lib/firmware/radeon/BONAIRE_mc2.bin 5e7f277ceff8dc0c4bb1f6f5146881db /lib/firmware/radeon/bonaire_mc.bin ef4e1c28226020f29718c1b4a71e4936 /lib/firmware/radeon/BONAIRE_mc.bin d45537a488327b32836d8202b6960574 /lib/firmware/radeon/bonaire_me.bin 16a295b3cfe280ea070727713049a2d9 /lib/firmware/radeon/BONAIRE_me.bin f695b8ac5384a9ca8935b41d651becc6 /lib/firmware/radeon/bonaire_mec.bin e2a1fb791002c7ce24f770d234700104 /lib/firmware/radeon/BONAIRE_mec.bin 5d1f1f3da044bcb1b7aa8b1bf4ad5ec4 /lib/firmware/radeon/bonaire_pfp.bin 48db59feaf30154dc5183301781ee7c5 /lib/firmware/radeon/BONAIRE_pfp.bin 9c251bba137e876563eb63cd83e03dc4 /lib/firmware/radeon/bonaire_rlc.bin 85eabd2f0f48679eeade573c471814ad /lib/firmware/radeon/BONAIRE_rlc.bin 084389ee7523fd04003779ee4d4a4335 /lib/firmware/radeon/bonaire_sdma1.bin 7be93381e34d1d4cf9b16740a7c69c78 /lib/firmware/radeon/bonaire_sdma.bin 0f6501d69df393af36f8f3bcb59d3835 /lib/firmware/radeon/BONAIRE_sdma.bin 35f34655261c8a4623c871c1811993b6 /lib/firmware/radeon/bonaire_smc.bin a3525ea5cf34e8e30bf6ca1b23a43876 /lib/firmware/radeon/BONAIRE_smc.bin 3106157934a8feb55145c4f5de3128e2 /lib/firmware/radeon/bonaire_uvd.bin ebdff39e40da745e770fd07ef0f943b4 /lib/firmware/radeon/BONAIRE_uvd.bin d8188b0ca84749c029f7012d7aea17ae /lib/firmware/ra
[coreboot] Re: Asrock E350M1: Display regression in Linux
Le jeu. 4 juin 2020 à 21:36, HacKurx a écrit : > > Le 2020-06-04 12:49, Paul Menzel a écrit : > > Thank you for the report. > > Thank you for your answer. > > > Am 04.06.20 um 11:26 schrieb HacKurx: > >> Good morning, everyone, > >> > >> I hadn't updated my coreboot version for a long time on my Asrock > >> E350M1 card because of lack of time and because this one was on a very > > > > I guess you mean *board* and not *card*? > > Motherboard. Sorry for English ;) > > >> stable version. While trying to test the current 4.12 version, I > >> encountered problems in Debian 10. > > > > What coreboot version did you use before? > > Before, coreboot-4.2-20160128 with SeaBIOS-1.9.0 > > But because of the problem, I've been testing coreboot-4.5-20170204 > (commit 8a06cc7ec8 util/ifdtool: Fix ICH Gbe unlock) with > SeaBIOS-1.13.0-20200603 which works well (it's the commit before the > one I had to reverse). > > >> Indeed, there is a bad graphical detection, the resolution of my hdmi > >> output went from 1360x768 to 720x400 pixels. > >> Xorg indicates that the drm device cannot be opened : > >> (EE) open /dev/dri/card0: No such file or directory > >> > >> I once had a Oops kernel message: > >> https://pastebin.com/uZLZyYrq > > > > For the future, please attach the logs to the message, so people can > > read it offline. > > All right. > > >> I manage to restore normal working in coreboot 4.12-git by removing the commits: > >> a5c2ac6256d0dae112b24c422d1270919acb6321 "x86/acpi: Add VFCT table" > >> 6f978cfd1ab6a57e5729e19bed3df7702c4f09cb "x86/acpi: Use initialized > >> VBIOS in VFCT table" > > > > I cannot remember seeing this on my board [1], but I am only using the > > VGA adapter (shouldn’t matter). > > > > [1.552912] [drm] Found smc ucode version: 0x00010601 > > In linux : > drivers/gpu/drm/radeon/sumo_dpm.c:DRM_INFO("Found smc ucode > version: 0x%08x\n", pi->fw_version); > > > These commits have been present since coreboot 4.6, and I have not > > seen this. It just provides the VGA Optiom ROM/Video BIOS to the > > graphics driver via ACPI. > > I just change the coreboot version without changing my OS. As soon as > I overrun a version with this commit, I get a display problem. > > > Do you have the AMD graphics firmware files installed under > > `/lib/firmware/radeon`? > > Yes. We can even see the loading the dmesg: > [4.816786] [drm] Loading PALM Microcode > [4.816872] radeon :00:01.0: firmware: direct-loading firmware > radeon/PALM_pfp.bin > [4.816909] radeon :00:01.0: firmware: direct-loading firmware > radeon/PALM_me.bin > [4.816941] radeon :00:01.0: firmware: direct-loading firmware > radeon/SUMO_rlc.bin > [4.816957] [drm] Found smc ucode version: 0x00010601 > [4.817038] BUG: unable to handle kernel NULL pointer dereference > at > > md5sum /lib/firmware/radeon/* > ... > > > Please attach your coreboot configuration (`defconfig` generated by > > `make savedefconfig`), and the output of `build/cbfstool > > build/coreboot.rom print`. > > $ cat defconfig > CONFIG_VENDOR_ASROCK=y > CONFIG_VGA_BIOS=y > CONFIG_BOARD_ASROCK_E350M1=y > CONFIG_DRIVERS_PS2_KEYBOARD=y > CONFIG_SEABIOS_MASTER=y > CONFIG_COREINFO_SECONDARY_PAYLOAD=y > > $ build/cbfstool build/coreboot.rom > FMAP REGION: COREBOOT > Name Offset Type Size Comp > cbfs master header 0x0cbfs header32 none > fallback/romstage 0x80 stage 185300 none > fallback/ramstage 0x2d4c0stage 117630 none > config 0x4a080raw 219 none > revision 0x4a1c0raw 674 none > fallback/dsdt.aml 0x4a4c0raw 9607 none > cmos_layout.bin0x4cac0cmos_layout 1228 none > pci1002,9802.rom 0x4d000optionrom 57856 none > fallback/postcar 0x5b280stage 16372 none > img/coreinfo 0x5f2c0simple elf 52655 none > fallback/payload 0x6c0c0simple elf 69955 none > payload_config 0x7d240raw 1621 none > payload_revision 0x7d900raw 238 none > (empty)0x7da40null 3613528 none > s3nv 0x3efdc0 raw 8192 none > (e
[coreboot] Re: Asrock E350M1: Display regression in Linux
Le ven. 12 juin 2020 à 15:16, HacKurx a écrit : > > Le lun. 8 juin 2020 à 19:10, Paul Menzel a écrit : > > > > Dear HacKurx, > > > > > > Am 04.06.20 um 12:49 schrieb Paul Menzel: > > > > > Am 04.06.20 um 11:26 schrieb HacKurx: > > >> Good morning, everyone, > > >> > > >> I hadn't updated my coreboot version for a long time on my Asrock > > >> E350M1 card because of lack of time and because this one was on a very > > > > > > I guess you mean *board* and not *card*? > > > > > >> stable version. While trying to test the current 4.12 version, I > > >> encountered problems in Debian 10. > > > > > > What coreboot version did you use before? > > > > > >> Indeed, there is a bad graphical detection, the resolution of my hdmi > > >> output went from 1360x768 to 720x400 pixels. > > >> Xorg indicates that the drm device cannot be opened : > > >> (EE) open /dev/dri/card0: No such file or directory > > >> > > >> I once had a Oops kernel message: > > >> https://pastebin.com/uZLZyYrq > > > > > > For the future, please attach the logs to the message, so people can > > > read it offline. > > > > > > I paste the error below. > > > > > >> [4.816957] [drm] Found smc ucode version: 0x00010601 > > >> [4.817038] BUG: unable to handle kernel NULL pointer dereference > > >> at > > >> [4.817171] PGD 0 P4D 0 > > >> [4.817225] Oops: [#1] SMP NOPTI > > >> [4.817280] CPU: 1 PID: 111 Comm: systemd-udevd Not tainted > > >> 4.19.0-9-amd64 #1 Debian 4.19.118-2 > > >> [4.817338] Hardware name: ASROCK E350M1/E350M1, BIOS > > >> 4.12-371-g3b8284f37a 05/28/2020 > > >> [4.817478] RIP: 0010:sumo_dpm_enable+0x2ed/0x510 [radeon] > > >> [4.817603] Code: ff ff 80 bd 77 01 00 00 00 0f 85 ed 01 00 00 80 > > >> bd 7b 01 00 00 00 0f 85 d3 01 00 00 48 8b 8b a0 1d 00 00 48 8b 83 40 > > >> 1e 00 00 <48> 8b 31 48 8b 51 28 48 89 b0 80 01 00 00 48 8b 71 08 48 89 > > >> b0 88 > > >> [4.817672] RSP: 0018:ad9980fab9c0 EFLAGS: 00010246 > > >> [4.817727] RAX: 9ad1eb9d8c00 RBX: 9ad1eb0a RCX: > > >> > > >> [4.817782] RDX: ad998118 RSI: 9ad1eb0a01e8 RDI: > > >> 9ad1eb0a0178 > > >> [4.817837] RBP: 9ad1eb9d8c00 R08: ad9980fab9a4 R09: > > >> ad9980fab9a0 > > >> [4.817893] R10: 0010 R11: R12: > > >> 9ad1eb0a01e8 > > >> [4.817948] R13: R14: ad9980fab9c0 R15: > > >> ad9980fab9c4 > > >> [4.818004] FS: 7f94e95d7d40() GS:9ad1f710() > > >> knlGS: > > >> [4.818061] CS: 0010 DS: ES: CR0: 80050033 > > >> [4.818115] CR2: CR3: 00026ba34000 CR4: > > >> 06e0 > > >> [4.818171] Call Trace: > > >> [4.818295] radeon_pm_init+0x5a5/0x720 [radeon] > > >> [4.818493] evergreen_init+0x149/0x370 [radeon] > > >> [4.818680] radeon_device_init+0x681/0xcd0 [radeon] > > >> [4.818868] radeon_driver_load_kms+0x77/0x260 [radeon] > > >> [4.819037] drm_dev_register+0x109/0x140 [drm] > > >> [4.819195] drm_get_pci_dev+0x8f/0x170 [drm] > > >> [4.819316] radeon_pci_probe+0xf9/0x1b0 [radeon] > > >> [4.819450] local_pci_probe+0x41/0x90 > > >> [4.819512] pci_device_probe+0xff/0x1b0 > > >> [4.819574] really_probe+0x24b/0x3b0 > > >> [4.819635] driver_probe_device+0xb3/0xf0 > > >> [4.819696] __driver_attach+0xea/0x110 > > >> [4.819757] ? driver_probe_device+0xf0/0xf0 > > >> [4.819818] bus_for_each_dev+0x77/0xc0 > > >> [4.819879] ? klist_add_tail+0x3b/0x70 > > >> [4.819939] bus_add_driver+0x152/0x230 > > >> [4.82] ? 0xc04d8000 > > >> [4.820058] driver_register+0x6b/0xb0 > > >> [4.820118] ? 0xc04d8000 > > >> [4.820178] do_one_initcall+0x46/0x1c3 > > >> [4.820240] ? _cond_resched+0x15/0x30 > > >> [4.820300] ? kmem_cache_alloc_trace+0x172/0x1e0 > > >> [4.820363] do_init_module+0x5a/0x210 > > >> [4.820423] load_modul
[coreboot] Re: Asrock E350M1: Display regression in Linux
Le lun. 8 juin 2020 à 19:10, Paul Menzel a écrit : > > Dear HacKurx, > > > Am 04.06.20 um 12:49 schrieb Paul Menzel: > > > Am 04.06.20 um 11:26 schrieb HacKurx: > >> Good morning, everyone, > >> > >> I hadn't updated my coreboot version for a long time on my Asrock > >> E350M1 card because of lack of time and because this one was on a very > > > > I guess you mean *board* and not *card*? > > > >> stable version. While trying to test the current 4.12 version, I > >> encountered problems in Debian 10. > > > > What coreboot version did you use before? > > > >> Indeed, there is a bad graphical detection, the resolution of my hdmi > >> output went from 1360x768 to 720x400 pixels. > >> Xorg indicates that the drm device cannot be opened : > >> (EE) open /dev/dri/card0: No such file or directory > >> > >> I once had a Oops kernel message: > >> https://pastebin.com/uZLZyYrq > > > > For the future, please attach the logs to the message, so people can > > read it offline. > > > > I paste the error below. > > > >> [4.816957] [drm] Found smc ucode version: 0x00010601 > >> [4.817038] BUG: unable to handle kernel NULL pointer dereference > >> at > >> [4.817171] PGD 0 P4D 0 > >> [4.817225] Oops: [#1] SMP NOPTI > >> [4.817280] CPU: 1 PID: 111 Comm: systemd-udevd Not tainted > >> 4.19.0-9-amd64 #1 Debian 4.19.118-2 > >> [4.817338] Hardware name: ASROCK E350M1/E350M1, BIOS > >> 4.12-371-g3b8284f37a 05/28/2020 > >> [4.817478] RIP: 0010:sumo_dpm_enable+0x2ed/0x510 [radeon] > >> [4.817603] Code: ff ff 80 bd 77 01 00 00 00 0f 85 ed 01 00 00 80 > >> bd 7b 01 00 00 00 0f 85 d3 01 00 00 48 8b 8b a0 1d 00 00 48 8b 83 40 > >> 1e 00 00 <48> 8b 31 48 8b 51 28 48 89 b0 80 01 00 00 48 8b 71 08 48 89 > >> b0 88 > >> [4.817672] RSP: 0018:ad9980fab9c0 EFLAGS: 00010246 > >> [4.817727] RAX: 9ad1eb9d8c00 RBX: 9ad1eb0a RCX: > >> > >> [4.817782] RDX: ad998118 RSI: 9ad1eb0a01e8 RDI: > >> 9ad1eb0a0178 > >> [4.817837] RBP: 9ad1eb9d8c00 R08: ad9980fab9a4 R09: > >> ad9980fab9a0 > >> [4.817893] R10: 0010 R11: R12: > >> 9ad1eb0a01e8 > >> [4.817948] R13: R14: ad9980fab9c0 R15: > >> ad9980fab9c4 > >> [4.818004] FS: 7f94e95d7d40() GS:9ad1f710() > >> knlGS: > >> [4.818061] CS: 0010 DS: ES: CR0: 80050033 > >> [4.818115] CR2: CR3: 00026ba34000 CR4: > >> 06e0 > >> [4.818171] Call Trace: > >> [4.818295] radeon_pm_init+0x5a5/0x720 [radeon] > >> [4.818493] evergreen_init+0x149/0x370 [radeon] > >> [4.818680] radeon_device_init+0x681/0xcd0 [radeon] > >> [4.818868] radeon_driver_load_kms+0x77/0x260 [radeon] > >> [4.819037] drm_dev_register+0x109/0x140 [drm] > >> [4.819195] drm_get_pci_dev+0x8f/0x170 [drm] > >> [4.819316] radeon_pci_probe+0xf9/0x1b0 [radeon] > >> [4.819450] local_pci_probe+0x41/0x90 > >> [4.819512] pci_device_probe+0xff/0x1b0 > >> [4.819574] really_probe+0x24b/0x3b0 > >> [4.819635] driver_probe_device+0xb3/0xf0 > >> [4.819696] __driver_attach+0xea/0x110 > >> [4.819757] ? driver_probe_device+0xf0/0xf0 > >> [4.819818] bus_for_each_dev+0x77/0xc0 > >> [4.819879] ? klist_add_tail+0x3b/0x70 > >> [4.819939] bus_add_driver+0x152/0x230 > >> [4.82] ? 0xc04d8000 > >> [4.820058] driver_register+0x6b/0xb0 > >> [4.820118] ? 0xc04d8000 > >> [4.820178] do_one_initcall+0x46/0x1c3 > >> [4.820240] ? _cond_resched+0x15/0x30 > >> [4.820300] ? kmem_cache_alloc_trace+0x172/0x1e0 > >> [4.820363] do_init_module+0x5a/0x210 > >> [4.820423] load_module+0x2167/0x23d0 > >> [4.820487] ? __do_sys_finit_module+0xad/0x110 > >> [4.820547] __do_sys_finit_module+0xad/0x110 > >> [4.820608] do_syscall_64+0x53/0x110 > >> [4.820666] entry_SYSCALL_64_after_hwframe+0x44/0xa9 > >> [4.820726] RIP: 0033:0x7f94e9dc1f59 > >> [4.820783] Code: 00 c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44 00 > >> 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24
Re: [coreboot] ASUS F2A85-M questions
On Fri Oct 31 03:25:55 CET 2014, Patrick 'P. J.' McDermott wrote: > Hi, Hi, > I'm interested in running coreboot on the ASUS F2A85-M, and I have a few > questions. > The wiki page for the board says that hardware virtualization is > untested. Has anyone tested this since the page was created in 2012? > Or could someone with this board please test this? KVM works very well for me. > How reliable is the hack for supporting Richland CPUs? No problems with this. I always use it without problems :) > Are other variants of the F2A85-M (e.g. F2A85-M2) supported? I don't know. Probably need make a patch for this. -- Best regards, HacKurx -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot