[coreboot] gRT->SetVariable ACCESS DENIED error

2018-07-03 Thread Toan Le manh
 Dear all,

I'm facing the Status EFI_ACCESS_DENIED when using gRT->SetVariable()
method.
There is no description of this returned status for SetVariable()  in UEFI
spec.
Have you ever faced this type of error? Could you please give me any idea
on how this happen?
Sorry for any inconvenience.

Thanks & Best Regards,
Toan
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[coreboot] Intel Reference Board doesn't work after inserting INT 15h/86h into Flat32.asm

2018-03-14 Thread Toan Le manh
 Hello everyone,

I'm so sorry if this question does not really relate to Coreboot. But I'm
facing a serious problem and trying to get help from you who have excellent
knowledge about BIOS and HW.

I have an Intel Reference Board. I was trying to force BIOS to wait 1
second in SEC phase.
I inserted these assemble code (BIOS wait function) into very first of
ProtectedModeEntryPoint in Flat32.asm file:

  MOV CX, 0FH
  MOV DX, 4240H
  MOV AH, 86H
  INT 15H

Then, the board stopped working. Status code showed "00".
Even when I re-flashed its original BIOS, it's still not worked.

Could anyone please help me to figure out what's happen here?
I  appreciate your helps.

Thanks & BRs,
Toan
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Re: [coreboot] Can coreboot for KabyLake rvp11 work on Intel Sasby Island kit?

2018-01-08 Thread Toan Le manh
Dear Naresh,

Thanks a lot for your advice. I'm finding correct blobs for KBL U. I'll
update once I get result.


2018-01-07 22:05 GMT+07:00 Naresh G. Solanki 
:

> Hi Toan Le,
>
> For Sasby Island, which is based on KBL U, you'll need corresponding
> blobs(me descriptor & ucode).
> Use kblrvp7 as starting point. And based on schematic(of Sasby Island) &
> your requirement(interface/device), you may have change settings(like gpio,
> devicetree.cb etc).
>
> Make sure you are using right config & blobs. For this you can get in
> touch with Intel FAE.
>
> Regards,
> Naresh G Solanki
>
>
> On Jan 6, 2018 7:45 AM, "Toan Le manh"  wrote:
>
> Hi Naresh,
>
> Thanks a lot for your reply.
> Could you please advise which settings should be modified for sasby island?
>
> Thanks.
>
>
> 2018-01-06 2:33 GMT+07:00 Naresh G. Solanki  >:
>
>> I guess you have coreboot working on rvp11.
>>
>> You may have to modify few settings based on sasby island.
>>
>>
>>
>> On Jan 4, 2018 7:58 AM, "Toan Le manh"  wrote:
>>
>>> Hi,
>>>
>>> I had a Intel Sasby Island kit, which has CPU family: SkyLake, model
>>> i7-6600U, Memory: LPDDR4.
>>> Do you think coreboot for Intel rvp11 (Kabylake U, LPDDR4) can work on
>>> that Sasby Island kit?
>>>
>>> Thanks & BRs,
>>> Toan Le
>>>
>>> --
>>> coreboot mailing list: coreboot@coreboot.org
>>> https://mail.coreboot.org/mailman/listinfo/coreboot
>>>
>>
>
>
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Re: [coreboot] Can coreboot for KabyLake rvp11 work on Intel Sasby Island kit?

2018-01-05 Thread Toan Le manh
Hi Naresh,

Thanks a lot for your reply.
Could you please advise which settings should be modified for sasby island?

Thanks.


2018-01-06 2:33 GMT+07:00 Naresh G. Solanki :

> I guess you have coreboot working on rvp11.
>
> You may have to modify few settings based on sasby island.
>
>
>
> On Jan 4, 2018 7:58 AM, "Toan Le manh"  wrote:
>
>> Hi,
>>
>> I had a Intel Sasby Island kit, which has CPU family: SkyLake, model
>> i7-6600U, Memory: LPDDR4.
>> Do you think coreboot for Intel rvp11 (Kabylake U, LPDDR4) can work on
>> that Sasby Island kit?
>>
>> Thanks & BRs,
>> Toan Le
>>
>> --
>> coreboot mailing list: coreboot@coreboot.org
>> https://mail.coreboot.org/mailman/listinfo/coreboot
>>
>
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[coreboot] Can coreboot for KabyLake rvp11 work on Intel Sasby Island kit?

2018-01-03 Thread Toan Le manh
Hi,

I had a Intel Sasby Island kit, which has CPU family: SkyLake, model
i7-6600U, Memory: LPDDR4.
Do you think coreboot for Intel rvp11 (Kabylake U, LPDDR4) can work on that
Sasby Island kit?

Thanks & BRs,
Toan Le
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[coreboot] Confusing about displayed POST CODE values

2017-04-25 Thread Toan Le manh
Dear all,

I'm using Intel Leaf Hill CRB with coreboot.
Sometimes, the postcode value is "08". But sometimes it shows "8" only.
Are they the same postcode? If not, what is difference?

Thanks and BRs,
Toan
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Re: [coreboot] SPI Flash does not work on Intel LeafHill CRB

2017-03-31 Thread Toan Le manh
2017-03-31 12:41 GMT+07:00 Zeh, Werner :

>
> In regard to the Winbond flash we had issues that has shown the same
> behavior like your case.
> The root cause in our case was the "security register" called region in
> the flash which resides above the 16 MB address range and
> has a size of 0x300 bytes (on W25Q128FV for example). The original flash
> contents on the CRB contains some data
> in that region and we were only able to boot the CRB after re-flashing if
> this region was transferred to the new flash completely.
> To do so, you must tweak BeeProg a bit, there are special options to erase
> and program this security registers.
>
>
Dear Werner,

Thank you very much for the reply.
I hope and believe that this is our case too.
Could you please guide me to transfer the "security register" region from
the original flash to new flash using BeeProg?

Once again, thanks a lot.
Best Regards,
Toan
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Re: [coreboot] SPI Flash does not work on Intel LeafHill CRB

2017-03-30 Thread Toan Le manh
Dear Goetz,

Thanks for your reply. I'm trying to rebuild the image.
Another question here: I had an 8 MB Intel-provided image. I'm using
BeeProg2C flashing device (with PG4UW software).
Is there any "trick" forcing the flashing device to flash 8 MB image into
16 MB SPI chip? Something likes flash to the low-8MB of chip instead of
high-8MB?
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Re: [coreboot] SPI Flash does not work on Intel LeafHill CRB

2017-03-30 Thread Toan Le manh
Thanks Andrey,  that was what I mean.
I tried as your suggestion: flashed an 8 MB Intel-provided image, read back
from SPI chip right after flashing, got a 16 MB file (since SPI chip is 16
MB size).
The first 8 MB of 2 files are exactly the same. So, flashing should work
fine.

I also went through coreboot mailing list and saw this thread:
https://www.coreboot.org/pipermail/coreboot/2017-February/083413.html
The guy here got the same problem with me:

>* Currently:*

>* DS6B1 : Green ON*

>* DS6B2 : Green ON*

>* DS2C1 : OFF*

> *DS3B1 : RED ON*

>
> >* No Output on serial console or HDMI. *


And you commented:

Red light is never a good sign. Do you have a way to know if PLTRST# has
> been de-asserted?



Another thing is that when you stitch with FIT you need to turn off boot
> guard completely. I suspect you have it on and that makes CSE to check
> signatures. Please check that in Platform protection -> Bootguard
> configuration it is set to "bootguard profile 0 - legacy". Then try
> restitching fit image and rebuilding coreboot again.



- Andrey


In my case:
- PLTRST#  has not been de-asserted. I plugged a PostCode display module in
the CRB and RST LED is always Green ON.
- Bootguard configuration is already set to  "bootguard profile 0 - legacy".

Could you please give me further advice?
Thanks a lot.
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Re: [coreboot] SPI Flash does not work on Intel LeafHill CRB

2017-03-29 Thread Toan Le manh
Hi Andrey,

Even I tried flashing with IFWI .bin file released by Intel, the board
> still doesn't boot.


 So I think the flashing file is not the problem.
May problem be caused by flashing tool ?

2017-03-30 9:00 GMT+07:00 Andrey Petrov :

> Hi,
>
> On 03/29/2017 06:48 PM, Toan Le manh wrote:
>
>> @Andrey: The flashing is OK, but the board doesn't boot anything. The
>> POST CODE is always "0".
>> Even I tried flashing with IFWI .bin file released by Intel, the board
>> still doesn't boot.
>> Where can I select "Use IFWI stitching"?
>>
>
> make nconfig, select board, there will be option to "use IFWI stitching".
> Then you will need to provide path to the ifwi file.
>
> Best
> Andrey
>



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lemanhtoa...@gmail.com
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Re: [coreboot] SPI Flash does not work on Intel LeafHill CRB

2017-03-29 Thread Toan Le manh
@Zoran: I tried flashing with the IFWI .bin file released by Intel, and the
file I got after building coreboot and stitching. Both don't work.

2017-03-29 18:00 GMT+01:00 Zoran Stojsavljevic <
zoran.stojsavlje...@gmail.com>:

> > ...tried flashing SPI chip (Winbond W25Q128FW)...
>
> Flashing with what (context in question)?
>
> (we'll come later to INTEL stitching tool, I have good
> perception/anticipation, developed for by INTEL) ;-)
>
> Thank you,
> Zoran
>
> On Wed, Mar 29, 2017 at 1:29 PM, Toan Le manh 
> wrote:
>
>> I got the LeafHill CRB from Intel, tried flashing SPI chip (Winbond
>> W25Q128FW) using BeeProg2C.
>> However nothing worked. The Status Code remained "0".
>> Does anyone face the same problem? Could you please give me some advice?
>> Thanks a lot.
>>
>>
>>
>> --
>> coreboot mailing list: coreboot@coreboot.org
>> https://www.coreboot.org/mailman/listinfo/coreboot
>>
>
>


-- 
-
Manh Toan Le
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mimoOn GmbH - http://www.mimoon.de/
(84) (97) 844-4764
(84) (363) 638-811
lemanhtoa...@gmail.com
toan...@mimoon.de
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Re: [coreboot] SPI Flash does not work on Intel LeafHill CRB

2017-03-29 Thread Toan Le manh
@Andrey: The flashing is OK, but the board doesn't boot anything. The POST
CODE is always "0".
Even I tried flashing with IFWI .bin file released by Intel, the board
still doesn't boot.
Where can I select "Use IFWI stitching"?


2017-03-29 14:56 GMT+01:00 Andrey Petrov :

> Hi,
>
> On 03/29/2017 04:29 AM, Toan Le manh wrote:
>
>> I got the LeafHill CRB from Intel, tried flashing SPI chip (Winbond
>> W25Q128FW) using BeeProg2C.
>> However nothing worked. The Status Code remained "0".
>>
>
> Are you saying the flashing didn't work OR board doesn't boot after?
>
> If latter, did you select "Use IFWI stitching" ?
>
> Andrey
>
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>



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(84) (97) 844-4764
(84) (363) 638-811
lemanhtoa...@gmail.com
toan...@mimoon.de
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[coreboot] SPI Flash does not work on Intel LeafHill CRB

2017-03-29 Thread Toan Le manh
I got the LeafHill CRB from Intel, tried flashing SPI chip (Winbond
W25Q128FW) using BeeProg2C.
However nothing worked. The Status Code remained "0".
Does anyone face the same problem? Could you please give me some advice?
Thanks a lot.
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