Re: [coreboot] [PATCH][superiotool] ITE IT8500 EC support
Hi Donald, David, Yung-Chieh, donald.hu...@ite.com.tw wrote: Please see the attached file. Thank you very much! I'm very happy that this contribution is now included in superiotool! //Peter -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [PATCH][superiotool] ITE IT8500 EC support
The attached patch adds a register table for the IT8500 embedded controller. Here is a sample of the output: superiotool r5679 Found ITE IT8500 (id=0x8500, rev=0x1) at 0x2e Register dump: idx 20 21 22 23 25 2d 2e 2f 30 val 85 00 01 01 00 00 00 00 01 def 85 00 01 01 00 00 NA NA 00 LDN 0x04 (System Wake-Up Control (SWUC)) idx 30 60 61 62 63 70 71 val 01 00 00 00 00 00 01 def 00 00 00 00 00 00 01 LDN 0x05 (KBC/Mouse Interface) idx 30 60 61 62 63 70 71 val 01 00 00 00 00 0c 01 def 00 00 00 00 00 0c 01 LDN 0x06 (KBC/Keyboard Interface) idx 30 60 61 62 63 70 71 val 01 00 60 00 64 01 01 def 00 00 60 00 64 01 01 LDN 0x0f (Shared Memory/Flash Interface (SMFI)) idx 30 60 61 62 63 70 71 f4 val 01 02 00 00 00 00 00 09 def 00 00 00 00 00 00 00 NA LDN 0x10 (BRAM) idx 30 62 63 70 71 f3 f4 f5 val 01 05 00 08 01 00 3f 3f def 00 00 72 08 01 NA NA NA LDN 0x11 (Power Management I/F Channel 1 (PMC1)) idx 30 60 61 62 63 70 71 val 01 00 62 00 66 00 01 def 00 00 62 00 66 01 01 LDN 0x12 (Power Management I/F Channel 2 (PMC2)) idx 30 60 61 62 63 64 65 70 71 f0 val 01 00 80 00 84 04 00 02 01 00 def 00 00 68 00 6c 00 00 01 01 NA Found SMSC SCH5317 (id=0x85, rev=0x00) at 0x2e No dump available for this Super I/O Signed-off by: Donald Huang (donald.hu...@ite.com.tw) Signed-off by: Yung-chieh Lo (yj...@google.com) Signed-off by: David Hendricks (dhend...@google.com) -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH][superiotool] ITE IT8500 EC support
On 8/10/10 4:26 AM, donald.hu...@ite.com.tw wrote: The attached patch adds a register table for the IT8500 embedded controller. Here is a sample of the output: superiotool r5679 [..] Signed-off by: Donald Huang (donald.hu...@ite.com.tw mailto:donald.hu...@ite.com.tw) Signed-off by: Yung-chieh Lo (yj...@google.com mailto:yj...@google.com) Signed-off by: David Hendricks (dhend...@google.com mailto:dhend...@google.com) Dear Donald, thank you very much for you work. However, it seems the patch didn't arrive on the mailing list. Can you try sending it again? Regards, Stefan -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH][superiotool] ITE IT8500 EC support
Dear Stefan, OK! Please see the attached file. BR, Donald From: Stefan Reinauer [mailto:stefan.reina...@coresystems.de] Sent: Tuesday, August 10, 2010 2:47 PM To: Donald Huang (黃麒豪) Cc: coreboot@coreboot.org; dhend...@google.com; yj...@google.com Subject: Re: [coreboot] [PATCH][superiotool] ITE IT8500 EC support On 8/10/10 4:26 AM, donald.hu...@ite.com.tw wrote: The attached patch adds a register table for the IT8500 embedded controller. Here is a sample of the output: superiotool r5679 [..] Signed-off by: Donald Huang (donald.hu...@ite.com.tw) Signed-off by: Yung-chieh Lo (yj...@google.com) Signed-off by: David Hendricks (dhend...@google.com) Dear Donald, thank you very much for you work. However, it seems the patch didn't arrive on the mailing list. Can you try sending it again? Regards, Stefan it8500_ec.patch Description: it8500_ec.patch -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH][superiotool] ITE IT8500 EC support
On Mon, Aug 9, 2010 at 11:47 PM, Stefan Reinauer stefan.reina...@coresystems.de wrote: On 8/10/10 4:26 AM, donald.hu...@ite.com.tw wrote: The attached patch adds a register table for the IT8500 embedded controller. Here is a sample of the output: superiotool r5679 [..] Signed-off by: Donald Huang (donald.hu...@ite.com.tw) Signed-off by: Yung-chieh Lo (yj...@google.com) Signed-off by: David Hendricks (dhend...@google.com) Dear Donald, thank you very much for you work. However, it seems the patch didn't arrive on the mailing list. Can you try sending it again? Hey Stefan, I think your mail filters may be preventing the patch from coming thru. Try downloading attachment-0001.obj from http://www.coreboot.org/pipermail/coreboot/2010-August/059616.html . -- David Hendricks (dhendrix) Systems Software Engineer, Google Inc. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [PATCH][superiotool] ITE IT8500 EC support
On 10.08.2010 10:10, donald.hu...@ite.com.tw wrote: On 8/10/10 4:26 AM, donald.hu...@ite.com.tw wrote: The attached patch adds a register table for the IT8500 embedded controller. Here is a sample of the output: Signed-off by: Donald Huang (donald.hu...@ite.com.tw) Signed-off by: Yung-chieh Lo (yj...@google.com) Signed-off by: David Hendricks (dhend...@google.com) Acked-by: Carl-Daniel Hailfinger c-d.hailfinger.devel.2...@gmx.net I changed IT8500 to IT8500B/E because it seems that chip has multiple variants, and I wanted to make sure all of them are listed. Thanks for your patch, committed in r5690. Regards, Carl-Daniel -- http://www.hailfinger.org/ -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] [PATCH][superiotool] ITE IT8500 EC support
The attached patch adds a register table for the IT8500 embedded controller. Here is a sample of the output: superiotool r5679 Found ITE IT8500 (id=0x8500, rev=0x1) at 0x2e Register dump: idx 20 21 22 23 25 2d 2e 2f 30 val 85 00 01 01 00 00 00 00 01 def 85 00 01 01 00 00 NA NA 00 LDN 0x04 (System Wake-Up Control (SWUC)) idx 30 60 61 62 63 70 71 val 01 00 00 00 00 00 01 def 00 00 00 00 00 00 01 LDN 0x05 (KBC/Mouse Interface) idx 30 60 61 62 63 70 71 val 01 00 00 00 00 0c 01 def 00 00 00 00 00 0c 01 LDN 0x06 (KBC/Keyboard Interface) idx 30 60 61 62 63 70 71 val 01 00 60 00 64 01 01 def 00 00 60 00 64 01 01 LDN 0x0f (Shared Memory/Flash Interface (SMFI)) idx 30 60 61 62 63 70 71 f4 val 01 02 00 00 00 00 00 09 def 00 00 00 00 00 00 00 NA LDN 0x10 (BRAM) idx 30 62 63 70 71 f3 f4 f5 val 01 05 00 08 01 00 3f 3f def 00 00 72 08 01 NA NA NA LDN 0x11 (Power Management I/F Channel 1 (PMC1)) idx 30 60 61 62 63 70 71 val 01 00 62 00 66 00 01 def 00 00 62 00 66 01 01 LDN 0x12 (Power Management I/F Channel 2 (PMC2)) idx 30 60 61 62 63 64 65 70 71 f0 val 01 00 80 00 84 04 00 02 01 00 def 00 00 68 00 6c 00 00 01 01 NA Found SMSC SCH5317 (id=0x85, rev=0x00) at 0x2e No dump available for this Super I/O Signed-off by: Donald Huang (donald.hu...@ite.com.tw) Signed-off by: Yung-chieh Lo (yj...@google.com) Signed-off by: David Hendricks (dhend...@google.com) -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot