Re: [coreboot] [PATCH 1/2] Geode GX2 cleanup again

2011-01-06 Thread Marc Bertens 
Uwe,

i did not know if you saw my message on IRC, so to be sure by mail too.

Are there any guidelines for me to read how to use the wiki pages, 
I was just keeping the mainpage of the Nokia-ip530 related to the 
hardware and status of the implementation. And keep other things 
away from here, like installation descriptions. This was basically 
due to that there was not clear page regarding to installing 
coreboot on a system, or even special systems. So maybe it would 
be a good idea to make a more general page for installing coreboot 
(stable release) on a system with even some simple pointers howto 
install a OS. This to make it easier for newbies (like I was when 
I started in april 2010) life a little easier. And this makes our 
lives easier too (as (more) experienced guys :-)) And maybe i'm 
somewhat of an odd guy how like to make documentation under the 
KISS principal ;-) 

Let me know what you think

Marc


-- 
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] [PATCH 1/2] Geode GX2 cleanup again

2011-01-04 Thread Uwe Hermann 
On Fri, Dec 31, 2010 at 07:57:34AM +0100, Stefan Reinauer wrote:
 On 12/30/10 10:48 PM, Nils wrote:
  -   {0x,{0x, 0x}},
  +   {0x,{0x, 0x}},
 
 I don't think we should capitalize hexadecimal numbers. We never did (on
 purpose) anywhere else.
 
 Bikeshed, anyone?

Yup, I also prefer non-capitalized, but that's probably a matter of
taste. I'm relatively sure the majority of our code-base uses lower-case
right now.

 
Uwe.
-- 
http://hermann-uwe.de | http://sigrok.org
http://randomprojects.org | http://unmaintained-free-software.org

-- 
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] [PATCH 1/2] Geode GX2 cleanup again

2010-12-30 Thread Nils 
For gx2/northbridgeinit.c
-some white space fixes
-some codingstyle fixes
-some comment fixes.

Signed-off-by: Nils Jacobs njaco...@hetnet.nl

Thanks, Nils.
Index: src/northbridge/amd/gx2/northbridgeinit.c
===
--- src/northbridge/amd/gx2/northbridgeinit.c	(revision 6225)
+++ src/northbridge/amd/gx2/northbridgeinit.c	(working copy)
@@ -13,8 +13,6 @@
 #include cpu/x86/msr.h
 #include cpu/x86/cache.h
 
-/* put this here for now, we are not sure where it belongs */
-
 struct gliutable
 {
 	unsigned long desc_name;
@@ -23,29 +21,29 @@
 };
 
 struct gliutable gliu0table[] = {
-	{.desc_name=GLIU0_P2D_BM_0,  .desc_type= BM,.hi= MSR_MC + 0x0,.lo=  0x0FFF80},			/* 0-7 to MC */
-	{.desc_name=GLIU0_P2D_BM_1,  .desc_type= BM,.hi= MSR_MC + 0x0,.lo=(0x80  20) + 0x0FFFE0},	/* 8-9 to Mc */
-	{.desc_name=GLIU0_P2D_SC_0, .desc_type= SC_SHADOW,.hi=  MSR_MC + 0x0,.lo=  0x03},		/* C-F split to MC and PCI (sub decode) A-B handled by SoftVideo */
-	{.desc_name=GLIU0_P2D_R_0, .desc_type= R_SYSMEM,.hi=  MSR_MC,.lo=  0x0},			/* Catch and fix dynamicly. */
-	{.desc_name=GLIU0_P2D_BMO_1,.desc_type= BMO_DMM,.hi=  MSR_MC,.lo=  0x0},			/* Catch and fix dynamicly. */
-	{.desc_name=GLIU0_P2D_BMO_0,.desc_type= BMO_SMM,.hi=  MSR_MC,.lo=  0x0},			/* Catch and fix dynamicly. */
-	{.desc_name=GLIU0_GLD_MSR_COH,.desc_type= OTHER,.hi= 0x0,.lo= GL0_CPU},
-	{.desc_name=GL_END,   .desc_type= GL_END,.hi= 0x0,.lo= 0x0},
+	{.desc_name=GLIU0_P2D_BM_0,	.desc_type= BM,.hi= MSR_MC + 0x0,.lo= 0x0FFF80},		/* 0-7 to MC */
+	{.desc_name=GLIU0_P2D_BM_1,	.desc_type= BM,.hi= MSR_MC + 0x0,.lo=(0x80  20) + 0x0FFFE0},	/* 8-9 to Mc */
+	{.desc_name=GLIU0_P2D_SC_0,	.desc_type= SC_SHADOW,.hi= MSR_MC + 0x0,.lo= 0x03},		/* C-F split to MC and PCI (sub decode) A-B handled by SoftVideo */
+	{.desc_name=GLIU0_P2D_R_0,	.desc_type= R_SYSMEM,.hi= MSR_MC,.lo= 0x0},			/* Catch and fix dynamicly. */
+	{.desc_name=GLIU0_P2D_BMO_1,	.desc_type= BMO_DMM,.hi= MSR_MC,.lo= 0x0},			/* Catch and fix dynamicly. */
+	{.desc_name=GLIU0_P2D_BMO_0,	.desc_type= BMO_SMM,.hi= MSR_MC,.lo= 0x0},			/* Catch and fix dynamicly. */
+	{.desc_name=GLIU0_GLD_MSR_COH,	.desc_type= OTHER,.hi= 0x0,.lo= GL0_CPU},
+	{.desc_name=GL_END,		.desc_type= GL_END,.hi= 0x0,.lo= 0x0},
 };
 
 struct gliutable gliu1table[] = {
-	{.desc_name=GLIU1_P2D_BM_0,.desc_type=  BM,.hi=  MSR_GL0 + 0x0,.lo=  0x0FFF80},		/* 0-7 to MC */
-	{.desc_name=GLIU1_P2D_BM_1,.desc_type=  BM,.hi=  MSR_GL0 + 0x0,.lo= (0x80  20) +0x0FFFE0},	/* 8-9 to Mc */
-	{.desc_name=GLIU1_P2D_SC_0,.desc_type=  SC_SHADOW,.hi=  MSR_GL0 + 0x0,.lo=  0x03},		/* C-F split to MC and PCI (sub decode) */
-	{.desc_name=GLIU1_P2D_R_0,.desc_type=  R_SYSMEM,.hi=  MSR_GL0,.lo=  0x0},			/* Catch and fix dynamicly. */
-	{.desc_name=GLIU1_P2D_BM_4,.desc_type=  BM_DMM,.hi=  MSR_GL0,.lo=  0x0},/* Catch and fix dynamicly. */
-	{.desc_name=GLIU1_P2D_BM_3,.desc_type=  BM_SMM,.hi=  MSR_GL0,.lo=  0x0},/* Catch and fix dynamicly. */
-	{.desc_name=GLIU1_GLD_MSR_COH,.desc_type= OTHER,.hi= 0x0,.lo= GL1_GLIU0},
-	{.desc_name=GLIU1_IOD_SC_0,.desc_type=  SCIO,.hi=  (GL1_GLCP  29) + 0x0,.lo=  0x033000F0}, /* FooGlue FPU 0xF0 */
-	{.desc_name=GL_END,.desc_type= GL_END,.hi= 0x0,.lo= 0x0},
+	{.desc_name=GLIU1_P2D_BM_0,	.desc_type= BM,.hi= MSR_GL0 + 0x0,.lo= 0x0FFF80},		/* 0-7 to MC */
+	{.desc_name=GLIU1_P2D_BM_1,	.desc_type= BM,.hi= MSR_GL0 + 0x0,.lo= (0x80  20) + 0x0FFFE0},/* 8-9 to Mc */
+	{.desc_name=GLIU1_P2D_SC_0,	.desc_type= SC_SHADOW,.hi= MSR_GL0 + 0x0,.lo= 0x03},		/* C-F split to MC and PCI (sub decode) */
+	{.desc_name=GLIU1_P2D_R_0,	.desc_type= R_SYSMEM,.hi= MSR_GL0,.lo= 0x0},			/* Catch and fix dynamicly. */
+	{.desc_name=GLIU1_P2D_BM_4,	.desc_type= BM_DMM,.hi= MSR_GL0,.lo= 0x0},			/* Catch and fix dynamicly. */
+	{.desc_name=GLIU1_P2D_BM_3,	.desc_type= BM_SMM,.hi= MSR_GL0,.lo= 0x0},			/* Catch and fix dynamicly. */
+	{.desc_name=GLIU1_GLD_MSR_COH,	.desc_type= OTHER,.hi= 0x0,.lo= GL1_GLIU0},
+	{.desc_name=GLIU1_IOD_SC_0,	.desc_type= SCIO,.hi= (GL1_GLCP  29) + 0x0,.lo= 0x033000F0},	/* FooGlue FPU 0xF0 */
+	{.desc_name=GL_END,		.desc_type= GL_END,.hi= 0x0,.lo= 0x0},
 };
 
-struct gliutable *gliutables[]  = {gliu0table, gliu1table, 0};
+struct gliutable *gliutables[] = { gliu0table, gliu1table, 0 };
 
 struct msrinit
 {
@@ -53,7 +51,7 @@
 	msr_t msr;
 };
 
-struct msrinit ClockGatingDefault [] = {
+struct msrinit ClockGatingDefault[] = {
 	{GLIU0_GLD_MSR_PM,	{.hi=0x00,.lo=0x0005}},
 	/* MC must stay off in SDR mode. It is turned on in CPUBug??? lotus #77.142 */
 	{MC_GLD_MSR_PM,		{.hi=0x00,.lo=0x}},
@@ -64,7 +62,7 @@
 	{GLCP_GLD_MSR_PM,	{.hi=0x00,.lo=0x0015}},
 	{GLPCI_GLD_MSR_PM,	{.hi=0x00,.lo=0x0015}},
 	{FG_GLD_MSR_PM,		{.hi=0x00,.lo=0x}},	/* Always on */
-	{0x, {0x, 0x}},
+	{0x, {0x, 0x}},
 };
 
 /* All On */
@@ -78,7 +76,7 @@

Re: [coreboot] [PATCH 1/2] Geode GX2 cleanup again

2010-12-30 Thread Stefan Reinauer 
On 12/30/10 10:48 PM, Nils wrote:
 - {0x,{0x, 0x}},
 + {0x,{0x, 0x}},

I don't think we should capitalize hexadecimal numbers. We never did (on
purpose) anywhere else.

Bikeshed, anyone?


-- 
coreboot mailing list: coreboot@coreboot.org
http://www.coreboot.org/mailman/listinfo/coreboot