Re: [coreboot] 690/600 Just starting out.

2008-12-31 Thread Dan Lykowski
Ron,
 That sounds ok. I copied over dbm690t in both the mainboard and target 
directories to advantech/som-5781. I will be getting things to work in those 
directories. Should I submit a non-working patch to get things started? 

The som-5781 is com-express so the SuperIO lives on the baseboard. The 
developer baseboard that I am using has an ITE chip on it whereas the release 
board will have a Winbond. I don't see any way to select at configuration time 
which SuperIO/Baseboard is connected. Would it make sense to implement a 
standard SuperIO interface and just link against the one we want? Would there 
be a need to support multiple SuperIO in the same system? Has there been any 
steps taken towards doing this? Any interest other than myself?

The release baseboard is a custom embedded design so it doesn't really make 
sense to have a directory for it. Thoughts on how to handle this?

Thanks
Dan Lykowski

--- On Wed, 12/31/08, ron minnich rminn...@gmail.com wrote:

 From: ron minnich rminn...@gmail.com
 Subject: Re: [coreboot] 690/600 Just starting out.
 To: Bao, Zheng zheng@amd.com
 Cc: engineerguy3...@yahoo.com, coreboot@coreboot.org
 Date: Wednesday, December 31, 2008, 12:32 AM
 On Tue, Dec 30, 2008 at 6:20 PM, Bao, Zheng
 zheng@amd.com wrote:
  The dbm690t uses S1G1 socket. The
 mainboard/amd/xxx/Config.lb should be
  modified to AM2.
 
 
 That's fine for testing but, Dan, if that test works
 let's get a
 mainboard directory set up for your new board the
 right way.
 
 Thanks
 
 ron
 
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Re: [coreboot] 690/600 Just starting out.

2008-12-31 Thread Zheng Bao

When we did our dbm690t, we set up a SVN server in our own server, which 
everyday work was submit to. When we think the work is good enough, we send a 
patch to the community. That is a little complicated, but I believe it is a 
good way.
Currently the SuperIO is not only configured in Config.lb, but also is included 
in cache_as_ram.c. Based on this code structure, it is difficult to make a 
single switch to decide which SuperIO we are using.
Everything makes its own sense. I believe you should make up a new directory in 
mainboard for each SuperIO. Anyone else? Date: Wed, 31 Dec 2008 01:25:53 
-0800 From: engineerguy3...@yahoo.com To: rminn...@gmail.com CC: 
coreboot@coreboot.org Subject: Re: [coreboot] 690/600 Just starting out.  
Ron, That sounds ok. I copied over dbm690t in both the mainboard and target 
directories to advantech/som-5781. I will be getting things to work in those 
directories. Should I submit a non-working patch to get things started?   The 
som-5781 is com-express so the SuperIO lives on the baseboard. The developer 
baseboard that I am using has an ITE chip on it whereas the release board will 
have a Winbond. I don't see any way to select at configuration time which 
SuperIO/Baseboard is connected. Would it make sense to implement a standard 
SuperIO interface and just link against the one we want? Would there be a need 
to support multiple SuperIO in the same system? Has there been any steps taken 
towards doing this? Any interest other than myself?  The release baseboard is 
a custom embedded design so it doesn't really make sense to have a directory 
for it. Thoughts on how to handle this?  Thanks Dan Lykowski  --- On Wed, 
12/31/08, ron minnich rminn...@gmail.com wrote:   From: ron minnich 
rminn...@gmail.com  Subject: Re: [coreboot] 690/600 Just starting out.  
To: Bao, Zheng zheng@amd.com  Cc: engineerguy3...@yahoo.com, 
coreboot@coreboot.org  Date: Wednesday, December 31, 2008, 12:32 AM  On 
Tue, Dec 30, 2008 at 6:20 PM, Bao, Zheng  zheng@amd.com wrote:   The 
dbm690t uses S1G1 socket. The  mainboard/amd/xxx/Config.lb should be   
modified to AM2.  That's fine for testing but, Dan, if that test 
works  let's get a  mainboard directory set up for your new board the  
right way.Thanksron--  coreboot mailing list: 
coreboot@coreboot.org  http://www.coreboot.org/mailman/listinfo/coreboot   
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Re: [coreboot] 690/600 Just starting out.

2008-12-31 Thread ron minnich
On Wed, Dec 31, 2008 at 4:59 AM, Zheng Bao fishb...@hotmail.com wrote:

 Everything makes its own sense. I believe you should make up a new directory
 in mainboard for each SuperIO. Anyone else?


I agree. The design of the config tool and runtime is not set up for
different types of superios. Just make two boards.

Thanks

ron

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[coreboot] 690/600 Just starting out.

2008-12-30 Thread Dan Lykowski
Hi, 
I'm just starting to find the time to get involved in coreboot.
My board is an Advantec SOM-5781. It seems pretty close to the reference design 
so I thought I would give loading the vanilla dbm690t bios a shot.
I have a Sempron 2100+ in a AM2 socket. ITE IT8712F SuperIO @ 0x2E.

Has anyone seen this before? It keeps happening over and over. I'll be looking 
in to it tonight. My understanding so far is that it is only supposed to happen 
once.

Thanks
Dan Lykowski


coreboot-2.0.0 Tue Dec 30 10:32:31 PST 2008 starting...
bsp_apicid=0x0
core0 started: 
SBLink=00
NC node|link=00
rs690_early_setup()
get_cpu_rev EAX=0x40fc2.
CPU Rev is K8_Fx.
NB Revision is A12.
k8_optimization()
rs690_por_init
sb600_early_setup()
sb600_devices_por_init()
sb600_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is 0x13
sb600_devices_por_init(): IDE Device, BDF:0-20-1
sb600_devices_por_init(): LPC Device, BDF:0-20-3
sb600_devices_por_init(): P2P Bridge, BDF:0-20-4
sb600_devices_por_init(): SATA Device, BDF:0-18-0
sb600_pmio_por_init()



INIT detected from  --- {  APICID = 00 NODEID = 00 COREID = 00} ---

Issuing SOFT_RESET...


coreboot-2.0.0 Tue Dec 30 10:32:31 PST 2008 starting...
bsp_apicid=0x0
core0 started: 
SBLink=00
NC node|link=00
rs690_early_setup()
get_cpu_rev EAX=0x40fc2.
CPU Rev is K8_Fx.
NB Revision is A12.
k8_optimization()
rs690_por_init
sb600_early_setup()
sb600_devices_por_init()
sb600_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is 0x13
sb600_devices_por_init(): IDE Device, BDF:0-20-1
sb600_devices_por_init(): LPC Device, BDF:0-20-3
sb600_devices_por_init(): P2P Bridge, BDF:0-20-4
sb600_devices_por_init(): SATA Device, BDF:0-18-0
sb600_pmio_por_init()



INIT detected from  --- {  APICID = 00 NODEID = 00 COREID = 00} ---

Issuing SOFT_RESET...




  

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Re: [coreboot] 690/600 Just starting out.

2008-12-30 Thread Bao, Zheng
The dbm690t uses S1G1 socket. The mainboard/amd/xxx/Config.lb should be
modified to AM2.

Zheng

-Original Message-
From: coreboot-boun...@coreboot.org
[mailto:coreboot-boun...@coreboot.org] On Behalf Of Dan Lykowski
Sent: Wednesday, December 31, 2008 10:17 AM
To: coreboot@coreboot.org
Subject: [coreboot] 690/600 Just starting out.

Hi, 
I'm just starting to find the time to get involved in coreboot.
My board is an Advantec SOM-5781. It seems pretty close to the reference
design so I thought I would give loading the vanilla dbm690t bios a
shot.
I have a Sempron 2100+ in a AM2 socket. ITE IT8712F SuperIO @ 0x2E.

Has anyone seen this before? It keeps happening over and over. I'll be
looking in to it tonight. My understanding so far is that it is only
supposed to happen once.

Thanks
Dan Lykowski


coreboot-2.0.0 Tue Dec 30 10:32:31 PST 2008 starting...
bsp_apicid=0x0
core0 started: 
SBLink=00
NC node|link=00
rs690_early_setup()
get_cpu_rev EAX=0x40fc2.
CPU Rev is K8_Fx.
NB Revision is A12.
k8_optimization()
rs690_por_init
sb600_early_setup()
sb600_devices_por_init()
sb600_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is 0x13
sb600_devices_por_init(): IDE Device, BDF:0-20-1
sb600_devices_por_init(): LPC Device, BDF:0-20-3
sb600_devices_por_init(): P2P Bridge, BDF:0-20-4
sb600_devices_por_init(): SATA Device, BDF:0-18-0
sb600_pmio_por_init()



INIT detected from  --- {  APICID = 00 NODEID = 00 COREID = 00} ---

Issuing SOFT_RESET...


coreboot-2.0.0 Tue Dec 30 10:32:31 PST 2008 starting...
bsp_apicid=0x0
core0 started: 
SBLink=00
NC node|link=00
rs690_early_setup()
get_cpu_rev EAX=0x40fc2.
CPU Rev is K8_Fx.
NB Revision is A12.
k8_optimization()
rs690_por_init
sb600_early_setup()
sb600_devices_por_init()
sb600_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is 0x13
sb600_devices_por_init(): IDE Device, BDF:0-20-1
sb600_devices_por_init(): LPC Device, BDF:0-20-3
sb600_devices_por_init(): P2P Bridge, BDF:0-20-4
sb600_devices_por_init(): SATA Device, BDF:0-18-0
sb600_pmio_por_init()



INIT detected from  --- {  APICID = 00 NODEID = 00 COREID = 00} ---

Issuing SOFT_RESET...




  

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Re: [coreboot] 690/600 Just starting out.

2008-12-30 Thread ron minnich
On Tue, Dec 30, 2008 at 6:20 PM, Bao, Zheng zheng@amd.com wrote:
 The dbm690t uses S1G1 socket. The mainboard/amd/xxx/Config.lb should be
 modified to AM2.


That's fine for testing but, Dan, if that test works let's get a
mainboard directory set up for your new board the right way.

Thanks

ron

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