Re: [coreboot] Problems compiling H8DMR_FAM10 because of section overlaps.
Marc Jones escribió: > On Wed, Dec 16, 2009 at 10:04 AM, Peter Stuge wrote: > >> Knut Kujat wrote: >> >>> I'm only getting rubbish from the serial using standard settings >>> 115200 8n1. Some suggestions? >>> >> Try all other speeds. It's not uncommon for a clock multiplier to be >> off, causing double or half the expected speed. >> >> > > As Peter said, it is probably the SIO clock setting. Check the setup > in cach_as_ram_auto.c. > > Marc > > > thanks for your replies. And yep I had to use a different speed to start seeing things and now it's working ok. Not at a 100% but I can see enough to see where it's failing ;). thanks, Knut Kujat. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Problems compiling H8DMR_FAM10 because of section overlaps.
On Wed, Dec 16, 2009 at 10:04 AM, Peter Stuge wrote: > Knut Kujat wrote: >> I'm only getting rubbish from the serial using standard settings >> 115200 8n1. Some suggestions? > > Try all other speeds. It's not uncommon for a clock multiplier to be > off, causing double or half the expected speed. > As Peter said, it is probably the SIO clock setting. Check the setup in cach_as_ram_auto.c. Marc -- http://marcjonesconsulting.com -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Problems compiling H8DMR_FAM10 because of section overlaps.
Knut Kujat wrote: > I'm only getting rubbish from the serial using standard settings > 115200 8n1. Some suggestions? Try all other speeds. It's not uncommon for a clock multiplier to be off, causing double or half the expected speed. //Peter -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Problems compiling H8DMR_FAM10 because of section overlaps.
Patrick Georgi escribió: > Am 16.12.2009 15:30, schrieb Knut Kujat: >> Hello, >> >> I'm now trying to get coreboot working on a Supermicro H8QME-2+ >> board. This board is really similar to the H8DMR/H8DMR_FAM10 boards >> already supported by coreboot. Since my board is populated with 4 >> Opteron family 10 processors I thought of trying to compile the >> H8DMR_FAM10 to get a rom and flash it to board to see what happens. >> But compiling I got the section overlaps error since its recommended >> to increase the ROM_IMAGE_SIZE I added the following lines to Kconfig: > Fam10 is not supported with kconfig yet. > > > Regards, > Patrick Georgi Aham, thx for the hint. Now it worked building it with ./builtarget but I'm only getting rubbish from the serial using standard settings 115200 8n1. Some suggestions? thx, Knut Kujat. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] Problems compiling H8DMR_FAM10 because of section overlaps.
Am 16.12.2009 15:30, schrieb Knut Kujat: > Hello, > > I'm now trying to get coreboot working on a Supermicro H8QME-2+ board. > This board is really similar to the H8DMR/H8DMR_FAM10 boards already > supported by coreboot. Since my board is populated with 4 Opteron > family 10 processors I thought of trying to compile the H8DMR_FAM10 > to get a rom and flash it to board to see what happens. But compiling > I got the section overlaps error since its recommended to increase the > ROM_IMAGE_SIZE I added the following lines to Kconfig: Fam10 is not supported with kconfig yet. Regards, Patrick Georgi -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
[coreboot] Problems compiling H8DMR_FAM10 because of section overlaps.
Hello, I'm now trying to get coreboot working on a Supermicro H8QME-2+ board. This board is really similar to the H8DMR/H8DMR_FAM10 boards already supported by coreboot. Since my board is populated with 4 Opteron family 10 processors I thought of trying to compile the H8DMR_FAM10 to get a rom and flash it to board to see what happens. But compiling I got the section overlaps error since its recommended to increase the ROM_IMAGE_SIZE I added the following lines to Kconfig: config ROM_IMAGE_SIZE hex default 0x15800 depends on BOARD_SUPERMICRO_H8DMR_FAM10 than a made a make distclean, make config, make and got following message: /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: section .reset [fff0 -> ] overlaps section .rom [5800 -> 0001929f] /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: /home/knut/Documents/Supertrunk4978/build/coreboot: section .reset vma 0xfff0 overlaps previous sections Taking a good look at the ranges I increased ROM_SIZE to 0x1 and it worked but not at all because: /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: section .id [0001fffeff58 -> 0001fffeff7f] overlaps section .rom [0001fffe -> 00013a9f] /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: /home/knut/Documents/Supertrunk4978/build/coreboot: section .id vma 0x1fffeff58 overlaps previous sections /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: /home/knut/Documents/Supertrunk4978/build/coreboot: section .romstrap vma 0x1fffeffa0 overlaps previous sections now it's .id that overlaps section .rom and not .reset :( Now I followed the instructions on the coreboot side about section overlaps and I did this: 00013a9f-0001fffeff58= 3b47 => 3b48 config ROM_IMAGE_SIZE hex default 0x13b48 depends on BOARD_SUPERMICRO_H8DMR_FAM10 make distclean, make config, make and got /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: section .id [00013aa0 -> 00013ac7] overlaps section .rom [0001fffe3b48 -> 000175ef] /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: /home/knut/Documents/Supertrunk4978/build/coreboot: section .id vma 0x13aa0 overlaps previous sections /usr/lib64/gcc/x86_64-suse-linux/4.3/../../../../x86_64-suse-linux/bin/ld: /home/knut/Documents/Supertrunk4978/build/coreboot: section .romstrap vma 0x13ae8 overlaps previous sections I can see that no only the .rom range changed but also the .id range should it do that?? So what can I do to make it work? A little frustrated I successfully compiled the H8DMR rom and flashed it into the bios chip thinking that at least some debug messages should appear since on both boards the way to the winbond chip is the same but I only got some ·$·)"?· rubbish. I of course tested the serial before and it worked fine. thanks, Knut Kujat. -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
