Re: [coreboot] [LinuxBIOS] Please add support for MX25L8005 and MX25L3205D
On 22.01.2008 16:34, Harald Gutmann wrote: > Here is just a little and simple patch to get the MX25L3205D working. > I've tested and verified the chip myself, and it seems to work everything > like > supposted, since Carl has patched flashrom to use the read funktion on > verifying. > > "benchvice flashrom # ./flashrom -m gigabyte:m57sli -v test.4mb > Calibrating delay loop... OK. > No coreboot table found. > Found chipset "NVIDIA MCP55", enabling flash write... OK. > Found board "GIGABYTE GA-M57SLI-S4": enabling flash write... Serial flash > segment 0xfffe-0x enabled > Serial flash segment 0x000e-0x000f enabled > Serial flash segment 0xffee-0xffef disabled > Serial flash segment 0xfff8-0xfffe enabled > LPC write to serial flash enabled > serial flash pin 29 > OK. > MX25L3205 found at physical address 0xffc0. > Flash part is MX25L3205 (4096 KB). > Flash image seems to be a legacy BIOS. Disabling checks. > Verifying flash... VERIFIED. > benchvice flashrom # ls -lh test.4mb > -rw-r--r-- 1 root root 4,0M 22. Jan 16:27 test.4mb > benchvice flashrom # ls -l test.4mb > -rw-r--r-- 1 root root 4194304 22. Jan 16:27 test.4mb > benchvice flashrom #" > > Signed-off-by: Harald Gutmann <[EMAIL PROTECTED]> > Acked-by: Carl-Daniel Hailfinger <[EMAIL PROTECTED]> Thanks, r3072. Regards, Carl-Daniel -- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [LinuxBIOS] Please add support for MX25L8005 and MX25L3205D
Here is just a little and simple patch to get the MX25L3205D working.
I've tested and verified the chip myself, and it seems to work everything like
supposted, since Carl has patched flashrom to use the read funktion on
verifying.
"benchvice flashrom # ./flashrom -m gigabyte:m57sli -v test.4mb
Calibrating delay loop... OK.
No coreboot table found.
Found chipset "NVIDIA MCP55", enabling flash write... OK.
Found board "GIGABYTE GA-M57SLI-S4": enabling flash write... Serial flash
segment 0xfffe-0x enabled
Serial flash segment 0x000e-0x000f enabled
Serial flash segment 0xffee-0xffef disabled
Serial flash segment 0xfff8-0xfffe enabled
LPC write to serial flash enabled
serial flash pin 29
OK.
MX25L3205 found at physical address 0xffc0.
Flash part is MX25L3205 (4096 KB).
Flash image seems to be a legacy BIOS. Disabling checks.
Verifying flash... VERIFIED.
benchvice flashrom # ls -lh test.4mb
-rw-r--r-- 1 root root 4,0M 22. Jan 16:27 test.4mb
benchvice flashrom # ls -l test.4mb
-rw-r--r-- 1 root root 4194304 22. Jan 16:27 test.4mb
benchvice flashrom #"
Signed-off-by: Harald Gutmann <[EMAIL PROTECTED]>
Index: flashchips.c
===
--- flashchips.c(Revision 3070)
+++ flashchips.c(Arbeitskopie)
@@ -54,6 +54,8 @@
probe_spi, generic_spi_chip_erase_c7,
generic_spi_chip_write, generic_spi_chip_read},
{"MX25L8005", MX_ID, MX_25L8005, 1024, 256,
probe_spi, generic_spi_chip_erase_c7,
generic_spi_chip_write, generic_spi_chip_read},
+ {"MX25L3205", MX_ID, MX_25L3205, 4096, 256,
+probe_spi, generic_spi_chip_erase_c7,
generic_spi_chip_write, generic_spi_chip_read},
{"SST25VF040B", SST_ID, SST_25VF040B, 512,256,
probe_spi, generic_spi_chip_erase_c7,
generic_spi_chip_write, generic_spi_chip_read},
{"SST25VF016B", SST_ID, SST_25VF016B, 2048, 256,
--
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Re: [coreboot] [LinuxBIOS] Please add support for MX25L8005 and MX25L3205D
Am Dienstag, 22. Januar 2008 00:48:30 schrieben Sie: > On 21.01.2008 17:15, Harald Gutmann wrote: > > Hello! > > > > As in the thread "Re: [coreboot] SST25VF016B (2MB) flash on m57sli > > (IT8716F)" there was added support for writing/reading lager SPI chips > > than 512kB i had a look on the current flashrom code, in svn revision > > 3067. > > > > I recogniced that the MX25L8005 calls the same function than the > > SST25VF016B in the flashchips.c file. The function called there are > > generic_spi_chip_erase_c7, generic_spi_chip_write and > > generic_spi_chip_read. The write function is in spi.c, and checks if the > > total_size is bigger than 512kB, as result of that check the > > it8716f_over512k_spi_chip_write should be called to write the chip. The > > SST25VF016B can be programmed/verified/erased but not the MX25L8005. > > Probably either the chip does not support BYTE-PROGRAM or we have a > timing issue. > I checked the datasheet and the MX25L8005 indeed has a PAGE-PROGRAM > mode, but it can be abused for BYTE-PROGRAM. > > > Writing random data to the chip results in a failed verify. Erasing the > > chip seems to work. > > Here is the file which i wrote to the chip, and the file which i get as > > result when trying to read the chip. (looks quite strange in hexdump, > > there are many FF lines in the read file.) > > http://rapidshare.com/files/85450682/read_write_diff-r3067.tar.gz.html > > This is a timing issue with ~95% probability. Simply look at the > readback result. Will send a patch. I got the patch, and tested it. It seems to work like ron said! More in the SST thread. > > I also wondered if the mx25l4005.c file is needed any more, because the > > functions in there aren't called anywhere. > > Hm. Are you sure this file exists in the official tree? I can't find it. Oh, seems that you're right, i trusted in svn diff/revert, and svn diff didn't mention any differenceses between my version and the actual repository, but it's like you said, that this file isn't existing in the official tree. > > Regards, > Carl-Daniel regards, Harald -- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [LinuxBIOS] Please add support for MX25L8005 and MX25L3205D
On 21.01.2008 17:15, Harald Gutmann wrote: > Hello! > > As in the thread "Re: [coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F)" > there was added support for writing/reading lager SPI chips than 512kB i had > a look on the current flashrom code, in svn revision 3067. > > I recogniced that the MX25L8005 calls the same function than the SST25VF016B > in the flashchips.c file. The function called there are > generic_spi_chip_erase_c7, generic_spi_chip_write and generic_spi_chip_read. > The write function is in spi.c, and checks if the total_size is bigger than > 512kB, as result of that check the it8716f_over512k_spi_chip_write should be > called to write the chip. The SST25VF016B can be programmed/verified/erased > but not the MX25L8005. > Probably either the chip does not support BYTE-PROGRAM or we have a timing issue. I checked the datasheet and the MX25L8005 indeed has a PAGE-PROGRAM mode, but it can be abused for BYTE-PROGRAM. > Writing random data to the chip results in a failed verify. Erasing the chip > seems to work. > Here is the file which i wrote to the chip, and the file which i get as > result > when trying to read the chip. (looks quite strange in hexdump, there are many > FF lines in the read file.) > http://rapidshare.com/files/85450682/read_write_diff-r3067.tar.gz.html > This is a timing issue with ~95% probability. Simply look at the readback result. Will send a patch. > I also wondered if the mx25l4005.c file is needed any more, because the > functions in there aren't called anywhere. > Hm. Are you sure this file exists in the official tree? I can't find it. Regards, Carl-Daniel -- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
Re: [coreboot] [LinuxBIOS] Please add support for MX25L8005 and MX25L3205D
Hello! As in the thread "Re: [coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F)" there was added support for writing/reading lager SPI chips than 512kB i had a look on the current flashrom code, in svn revision 3067. I recogniced that the MX25L8005 calls the same function than the SST25VF016B in the flashchips.c file. The function called there are generic_spi_chip_erase_c7, generic_spi_chip_write and generic_spi_chip_read. The write function is in spi.c, and checks if the total_size is bigger than 512kB, as result of that check the it8716f_over512k_spi_chip_write should be called to write the chip. The SST25VF016B can be programmed/verified/erased but not the MX25L8005. Writing random data to the chip results in a failed verify. Erasing the chip seems to work. Here is the file which i wrote to the chip, and the file which i get as result when trying to read the chip. (looks quite strange in hexdump, there are many FF lines in the read file.) http://rapidshare.com/files/85450682/read_write_diff-r3067.tar.gz.html I also wondered if the mx25l4005.c file is needed any more, because the functions in there aren't called anywhere. kind regards, Harald -- coreboot mailing list coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot
