[PATCH] [MTD] driver/Makefile: Initialize "mtd" and "spi" before "net"

2009-08-18 Thread Sudhakar Rajashekhara
On TI's da850/omap-l138 EVM, MAC address is stored in SPI flash.

This patch changes the initialization sequence of the drivers
by moving mtd and spi ahead of net in drivers/Makefile thereby
enabling da850/omap-l138 ethernet driver to read the MAC address
while booting.

Signed-off-by: Sudhakar Rajashekhara 
---
 drivers/Makefile |4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/Makefile b/drivers/Makefile
index bc4205d..2a1d41f 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -42,6 +42,8 @@ obj-y += macintosh/
 obj-$(CONFIG_IDE)  += ide/
 obj-$(CONFIG_SCSI) += scsi/
 obj-$(CONFIG_ATA)  += ata/
+obj-$(CONFIG_MTD)  += mtd/
+obj-$(CONFIG_SPI)  += spi/
 obj-y  += net/
 obj-$(CONFIG_ATM)  += atm/
 obj-$(CONFIG_FUSION)   += message/
@@ -50,8 +52,6 @@ obj-y += ieee1394/
 obj-$(CONFIG_UIO)  += uio/
 obj-y  += cdrom/
 obj-y  += auxdisplay/
-obj-$(CONFIG_MTD)  += mtd/
-obj-$(CONFIG_SPI)  += spi/
 obj-$(CONFIG_PCCARD)   += pcmcia/
 obj-$(CONFIG_DIO)  += dio/
 obj-$(CONFIG_SBUS) += sbus/
-- 
1.5.6

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[PATCH] [MTD] mtdpart: memory accessor interface for MTD layer

2009-08-18 Thread Sudhakar Rajashekhara
This patch implements memory accessor interface in the MTD
layer which enables the kernel to access flash data.

This patch adds two new members to the mtd_partition structure,
a function handler which will be called during setup of the
partition and an argument to be passed to this setup function.

Example:
+static struct mtd_partition spi_flash_partitions[] = {
+   [0] = {
+   .name   = "U-Boot",
+   .offset = 0,
+   .size   = SZ_256K,
+   .mask_flags = MTD_WRITEABLE,
+   },
+   [1] = {
+   .name   = "U-Boot Environment",
+   .offset = MTDPART_OFS_NXTBLK,
+   .size   = SZ_64K,
+   .mask_flags = MTD_WRITEABLE,
+   },
+   [2] = {
+   .name   = "Linux",
+   .offset = MTDPART_OFS_NXTBLK,
+   .size   = SZ_7M,
+   .mask_flags = 0,
+   },
+   [3] = {
+   .name   = "MAC Address",
+   .offset = MTDPART_OFS_NXTBLK,
+   .size   = SZ_64K,
+   .mask_flags = 0,
+   .setup  = davinci_get_mac_addr,
+   .context= (void *)0,
+   },
+};

The davinci_get_mac_addr function reads the MAC address from
offset ZERO of last MTD partition.

Signed-off-by: Sudhakar Rajashekhara 
---
 drivers/mtd/mtdpart.c  |   40 
 include/linux/mtd/partitions.h |3 +++
 2 files changed, 43 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 349fcbe..8f14653 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -26,6 +26,7 @@ static LIST_HEAD(mtd_partitions);
 struct mtd_part {
struct mtd_info mtd;
struct mtd_info *master;
+   struct memory_accessor macc;
uint64_t offset;
struct list_head list;
 };
@@ -327,6 +328,39 @@ int del_mtd_partitions(struct mtd_info *master)
 }
 EXPORT_SYMBOL(del_mtd_partitions);
 
+/*
+ * This lets other kernel code access the flash data. For example, it
+ * might hold a board's Ethernet address, or board-specific calibration
+ * data generated on the manufacturing floor.
+ */
+static ssize_t mtd_macc_read(struct memory_accessor *macc, char *buf,
+   off_t offset, size_t count)
+{
+   struct mtd_part *part = container_of(macc, struct mtd_part, macc);
+   ssize_t ret = -EIO;
+   size_t retlen;
+
+   if (part_read((struct mtd_info *)part, offset, count,
+   &retlen, buf) == 0)
+   ret = retlen;
+
+   return ret;
+}
+
+static ssize_t mtd_macc_write(struct memory_accessor *macc, const char *buf,
+   off_t offset, size_t count)
+{
+   struct mtd_part *part = container_of(macc, struct mtd_part, macc);
+   ssize_t ret = -EIO;
+   size_t retlen;
+
+   if (part_write((struct mtd_info *)part, offset, count,
+   &retlen, buf) == 0)
+   ret = retlen;
+
+   return ret;
+}
+
 static struct mtd_part *add_one_partition(struct mtd_info *master,
const struct mtd_partition *part, int partno,
uint64_t cur_offset)
@@ -364,6 +398,9 @@ static struct mtd_part *add_one_partition(struct mtd_info 
*master,
slave->mtd.read = part_read;
slave->mtd.write = part_write;
 
+   slave->macc.read = mtd_macc_read;
+   slave->macc.write = mtd_macc_write;
+
if (master->panic_write)
slave->mtd.panic_write = part_panic_write;
 
@@ -428,6 +465,9 @@ static struct mtd_part *add_one_partition(struct mtd_info 
*master,
printk(KERN_NOTICE "0x%012llx-0x%012llx : \"%s\"\n", (unsigned long 
long)slave->offset,
(unsigned long long)(slave->offset + slave->mtd.size), 
slave->mtd.name);
 
+   if (part->setup)
+   part->setup(&slave->macc, (void *)part->context);
+
/* let's do some sanity checks */
if (slave->offset >= master->size) {
/* let's register it anyway to preserve ordering */
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index af6dcb9..cc76779 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -10,6 +10,7 @@
 #define MTD_PARTITIONS_H
 
 #include 
+#include 
 
 
 /*
@@ -40,6 +41,8 @@ struct mtd_partition {
uint64_t offset;/* offset within the master MTD space */
uint32_t mask_flags;/* master MTD flags to mask out for 
this partition */
struct nand_ecclayout *ecclayout;   /* out of band layout for this 
partition (NAND only)*/
+   void (*setup)(struct memory_accessor *, void *context);
+   void *context;
 };
 
 #define MTDPART_OFS_NXTBLK (-2)
-- 
1.5.6

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RE: [PATCH] [MTD] m25p80: memory accessor interface for SPI MTD driver

2009-08-18 Thread Sudhakar Rajashekhara
On Tue, Aug 04, 2009 at 06:54:01, David Brownell wrote:
> On Monday 03 August 2009, Sudhakar Rajashekhara wrote:
> > On TI's da850/omap-l138 EVM, MAC address is stored in SPI flash.
> > This patch implements memory accessor interface for SPI MTD
> > driver which enables the kernel to access flash data.
> 
> If that's going to be possible, shouldn't it work for any
> MTD device?  And the lack of protection bothers me a bit
> more here than with EEPROMs and NVRAM, since it seems kind
> of easy to clobber UBI (or JFFS2 etc) data.  Maybe there
> should be a way to make jus a specific partition available
> this way?
> 

I have submitted the modified version of this patch which
implements the accessor interface in mtdpart.c file so that
it works for any mtd drivers (NAND, NOR, SPI).

Regards, Sudhakar


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Re: [PATCH RFC 1/2] MUSB: CPPI 4.1 DMA driver (take 4)

2009-08-18 Thread Sergei Shtylyov

Hello.

stanley.miao wrote:


Texas Instruments CPPI 4.1 DMA support for the MUSBMHRDC driver.
 ..
Index: linux-davinci/drivers/usb/musb/Makefile
===
--- linux-davinci.orig/drivers/usb/musb/Makefile
+++ linux-davinci/drivers/usb/musb/Makefile
@@ -53,9 +53,13 @@ ifneq ($(CONFIG_MUSB_PIO_ONLY),y)
   musb_hdrc-objs+= cppi_dma.o
 
 else

-  ifeq ($(CONFIG_USB_TUSB_OMAP_DMA),y)
-musb_hdrc-objs+= tusb6010_omap.o
+  ifeq ($(CONFIG_USB_TI_CPPI41_DMA),y)
+musb_hdrc-objs+= cppi41_dma.o
 
+ifeq ($(CONFIG_USB_TUSB_OMAP_DMA),y)

+  musb_hdrc-objs+= tusb6010_omap.o
+
+endif
   endif
 endif
   endif
  


You put the "ifeq($(CONFIG_USB_TUSB_OMAP_DMA),y)" in the
"ifeq ($(CONFIG_USB_TI_CPPI41_DMA),y) . endif".

So if CONFIG_USB_TI_CPPI41_DMA is not enabled, tusb6010_omap.c will 
not be compiled.


  Hum, you're right. The patch is broken -- there should be 'else' there...


Stanley.


WBR, Sergei



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RE: [PATCH] [MTD] driver/Makefile: Initialize "mtd" and "spi" before "net"

2009-08-18 Thread Sudhakar Rajashekhara
On Tue, Aug 18, 2009 at 13:49:30, Andrew Morton wrote:
> On Tue, 18 Aug 2009 12:34:04 -0400 Sudhakar Rajashekhara 
>  wrote:
> 
> > On TI's da850/omap-l138 EVM, MAC address is stored in SPI flash.
> > 
> > This patch changes the initialization sequence of the drivers
> > by moving mtd and spi ahead of net in drivers/Makefile thereby
> > enabling da850/omap-l138 ethernet driver to read the MAC address
> > while booting.
> > 
> > Signed-off-by: Sudhakar Rajashekhara 
> > ---
> >  drivers/Makefile |4 ++--
> >  1 files changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/Makefile b/drivers/Makefile
> > index bc4205d..2a1d41f 100644
> > --- a/drivers/Makefile
> > +++ b/drivers/Makefile
> > @@ -42,6 +42,8 @@ obj-y += macintosh/
> >  obj-$(CONFIG_IDE)  += ide/
> >  obj-$(CONFIG_SCSI) += scsi/
> >  obj-$(CONFIG_ATA)  += ata/
> > +obj-$(CONFIG_MTD)  += mtd/
> > +obj-$(CONFIG_SPI)  += spi/
> >  obj-y  += net/
> >  obj-$(CONFIG_ATM)  += atm/
> >  obj-$(CONFIG_FUSION)   += message/
> > @@ -50,8 +52,6 @@ obj-y += ieee1394/
> >  obj-$(CONFIG_UIO)  += uio/
> >  obj-y  += cdrom/
> >  obj-y  += auxdisplay/
> > -obj-$(CONFIG_MTD)  += mtd/
> > -obj-$(CONFIG_SPI)  += spi/
> >  obj-$(CONFIG_PCCARD)   += pcmcia/
> >  obj-$(CONFIG_DIO)  += dio/
> >  obj-$(CONFIG_SBUS) += sbus/
> 
> That isn't a particularly maintainable way of fixing this, especially
> as there are no comments in that Makefile to prevent someone from
> rebreaking it in the future.
> 
> A better fix would be to use suitably prioritised initcalls - see
> include/linux/init.h around line 187.
> 

Currently mtd, spi and net subsystems are initialized with module_init.
If I change the way in which these sub-systems are initialized, then
I'll be breaking the support for these sub-systems to work as modules.

There are some comments in drivers/Makefile which say why particular
sub-systems are ahead of others like:

...
...
# PnP must come after ACPI since it will eventually need to check if 
acpi
# was used and do nothing if so
...
...
# char/ comes before serial/ etc so that the VT console is the boot-time
# default.
...

I'll add comments in the Makefile stating the need of mtd and spi
ahead of net and re-submit the patch.

Regards, Sudhakar


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uImage not booting kernel

2009-08-18 Thread rohan tabish
hi everyone i am trying to embedded linux in DM6446. i am using open
source code to build the kernel, using cross compiler. when i load the
kernel using tftp and run it the kernel gets halted.can anyone help
me.here is whaT I AM GETTING.
i have not loaded the file system for the kernel.


bootargs=mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp
bootcmd=setenv setboot setenv bootargs \$(bootargs) 
video=dm64xxfb:output=\$(videostd);run setboot
baudrate=115200
bootfile="uImage"
ethaddr=00:1c:c0:0a:00:02
ipaddr=172.16.0.91
serverip=172.16.0.97
gatewayip=172.16.0.10
netmask=255.255.240.0
stdin=serial
stdout=serial
stderr=serial
serial#=FAILED
ver=U-Boot 2009.06 (Aug 10 2009 - 18:38:34)
 
Environment size: 418/131068 bytes
U-Boot > bootm

## Booting kernel from Legacy Image at 8070 ...

   Image Name:   Linux-2.6.31-rc5-davinci1

   Created:  2009-08-16  13:56:56 UTC

   Image Type:   ARM Linux Kernel Image (uncompressed)

   Data Size:    1478408 Bytes =  1.4 MB

   Load Address: 80008000

   Entry Point:  80008000

   Verifying Checksum ... OK

   Loading Kernel Image ... OK

OK

 

Starting kernel ...

 

Uncompressing Linux.

... done, booting the kernel.


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System Hangs up problem

2009-08-18 Thread amr ali

Hi all,

I am now running a video player that uses the DSP. Sometimes when I start the 
player all the system hangs with no message being printed.

Any ideas?

--

Amr

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RE: [PATCH] [MTD] driver/Makefile: Initialize "mtd" and "spi" before "net"

2009-08-18 Thread Sudhakar Rajashekhara
On Tue, Aug 18, 2009 at 15:19:08, Andrew Morton wrote:
> On Tue, 18 Aug 2009 15:06:35 +0530 "Sudhakar Rajashekhara" 
>  wrote:
> 
> > On Tue, Aug 18, 2009 at 13:49:30, Andrew Morton wrote:
> > > On Tue, 18 Aug 2009 12:34:04 -0400 Sudhakar Rajashekhara 
> > >  wrote:
> > > 
> > > > On TI's da850/omap-l138 EVM, MAC address is stored in SPI flash.
> > > > 
> > > > This patch changes the initialization sequence of the drivers by 
> > > > moving mtd and spi ahead of net in drivers/Makefile thereby 
> > > > enabling da850/omap-l138 ethernet driver to read the MAC address 
> > > > while booting.
> > > > 
> > > > Signed-off-by: Sudhakar Rajashekhara 
> > > > ---
> > > >  drivers/Makefile |4 ++--
> > > >  1 files changed, 2 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/drivers/Makefile b/drivers/Makefile index 
> > > > bc4205d..2a1d41f 100644
> > > > --- a/drivers/Makefile
> > > > +++ b/drivers/Makefile
> > > > @@ -42,6 +42,8 @@ obj-y += macintosh/
> > > >  obj-$(CONFIG_IDE)  += ide/
> > > >  obj-$(CONFIG_SCSI) += scsi/
> > > >  obj-$(CONFIG_ATA)  += ata/
> > > > +obj-$(CONFIG_MTD)  += mtd/
> > > > +obj-$(CONFIG_SPI)  += spi/
> > > >  obj-y  += net/
> > > >  obj-$(CONFIG_ATM)  += atm/
> > > >  obj-$(CONFIG_FUSION)   += message/
> > > > @@ -50,8 +52,6 @@ obj-y += ieee1394/
> > > >  obj-$(CONFIG_UIO)  += uio/
> > > >  obj-y  += cdrom/
> > > >  obj-y  += auxdisplay/
> > > > -obj-$(CONFIG_MTD)  += mtd/
> > > > -obj-$(CONFIG_SPI)  += spi/
> > > >  obj-$(CONFIG_PCCARD)   += pcmcia/
> > > >  obj-$(CONFIG_DIO)  += dio/
> > > >  obj-$(CONFIG_SBUS) += sbus/
> > > 
> > > That isn't a particularly maintainable way of fixing this, 
> > > especially as there are no comments in that Makefile to prevent 
> > > someone from rebreaking it in the future.
> > > 
> > > A better fix would be to use suitably prioritised initcalls - see 
> > > include/linux/init.h around line 187.
> > > 
> > 
> > Currently mtd, spi and net subsystems are initialized with module_init.
> > If I change the way in which these sub-systems are initialized, then 
> > I'll be breaking the support for these sub-systems to work as modules.
> 
> In what way?
> 

Now I got what you were saying. I was able to get the EMAC driver initialize
later than spi and mtd by using late_initcall. With this change EMAC works
as module as well. The patch looks as below:

===
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 12fd446..5e6652b 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -2817,7 +2817,7 @@ static int __init davinci_emac_init(void)
 {
return platform_driver_register(&davinci_emac_driver);
 }
-module_init(davinci_emac_init);
+late_initcall(davinci_emac_init);

 /**
  * davinci_emac_exit: EMAC driver module exit
===

I'll submit this patch to netdev list.

Thanks,
Sudhakar


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Re: uImage not booting kernel

2009-08-18 Thread Koen Kooi

On 18-08-09 12:36, rohan tabish wrote:

hi everyone i am trying to embedded linux in DM6446. i am using open
source code to build the kernel, using cross compiler. when i load the
kernel using tftp and run it the kernel gets halted.can anyone help
me.here is whaT I AM GETTING.

i have not loaded the file system for the kernel.


If you enable CONFIG_DEBUG_LL and the printascii hack, do get something 
like:


<2>kernel BUG at arch/arm/mach-davinci/time.c:375!
<1>Unable to handle kernel NULL pointer dereference at virtual address 


<1>pgd = c0004000

?

regards,

Koen


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[PATCH v3 5/5] davinci: DA850/OMAP-L138: JTAG ID register should derive from SYSCFG base

2009-08-18 Thread Sekhar Nori
This makes it clear that JTAG ID register is part of the
SYSCFG module

Signed-off-by: Sekhar Nori 
---
 arch/arm/mach-davinci/include/mach/da8xx.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index bc411b2..69f5dc6 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -30,12 +30,12 @@
 #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
 
 #define DA8XX_BOOT_CFG_BASE(IO_PHYS + 0x14000)
+#define DA8XX_JTAG_ID_REG  (DA8XX_BOOT_CFG_BASE + 0x18)
 #define DA8XX_CFGCHIP0_REG (DA8XX_BOOT_CFG_BASE + 0x17c)
 #define DA8XX_CFGCHIP3_REG (DA8XX_BOOT_CFG_BASE + 0x188)
 
 #define DA8XX_PSC0_BASE0x01c1
 #define DA8XX_PLL0_BASE0x01c11000
-#define DA8XX_JTAG_ID_REG  0x01c14018
 #define DA8XX_TIMER64P0_BASE   0x01c2
 #define DA8XX_TIMER64P1_BASE   0x01c21000
 #define DA8XX_GPIO_BASE0x01e26000
-- 
1.6.2.4

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[PATCH v3 1/5] davinci: clock framework updates for CPUFreq support

2009-08-18 Thread Sekhar Nori
Update the clock framework for dynamic CPU frequency change.

clk_round_rate, clk_set_rate have been updated to handle dynamic frequency
changes.

davinci_set_pllrate() changes the PLL rate of a given PLL. This function
has been presented as a generic function though it has been tested only
on OMAP-L138 EVM. No other currently available DaVinci device will probably
use this function, but any future device specific changes will hopefully be
small enough to get taken care using a cpu_is_xxx() macro.

The clk_set_parent() API is implemented to reparent clocks to
asynchronous domains where possible and insulate them from frequency
changes.

An inline function is introduced to get to the parent PLL of a given
clock. This is useful in finding out all the clocks which gets
affected by a PLL rate change.

Finally, another function is implemented to recalculate the PLL derived
rates after the PLL rate has been changed.

Tested on OMAP-L138 EVM.

Signed-off-by: Sekhar Nori 
---
 arch/arm/mach-davinci/clock.c |  140 -
 arch/arm/mach-davinci/clock.h |   18 +
 2 files changed, 155 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 83d54d5..5cbb95e 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -99,20 +100,50 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
if (clk == NULL || IS_ERR(clk))
return -EINVAL;
 
+   if (clk->round_rate)
+   return clk->round_rate(clk, rate);
+
return clk->rate;
 }
 EXPORT_SYMBOL(clk_round_rate);
 
 int clk_set_rate(struct clk *clk, unsigned long rate)
 {
+   unsigned long flags;
+   int ret = -EINVAL;
+
if (clk == NULL || IS_ERR(clk))
-   return -EINVAL;
+   return ret;
 
-   /* changing the clk rate is not supported */
-   return -EINVAL;
+   spin_lock_irqsave(&clockfw_lock, flags);
+   if (clk->set_rate)
+   ret = clk->set_rate(clk, rate);
+   spin_unlock_irqrestore(&clockfw_lock, flags);
+
+   return ret;
 }
 EXPORT_SYMBOL(clk_set_rate);
 
+/* Currently only 'leaf' clocks are supported */
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+   unsigned long flags;
+   int ret = -EINVAL;
+
+   if (clk == NULL || IS_ERR(clk))
+   return ret;
+
+   spin_lock_irqsave(&clockfw_lock, flags);
+   if (clk->parent && !(clk->flags & CLK_PLL)) {
+   clk->parent = parent;
+   clk->rate = clk->parent->rate;
+   ret = 0;
+   }
+   spin_unlock_irqrestore(&clockfw_lock, flags);
+
+   return ret;
+}
+
 int clk_register(struct clk *clk)
 {
if (clk == NULL || IS_ERR(clk))
@@ -273,6 +304,109 @@ static void __init clk_pll_init(struct clk *clk)
pr_debug("] --> %lu MHz output.\n", clk->rate / 100);
 }
 
+/**
+ * davinci_set_pllrate - set the output rate of a given PLL.
+ *
+ * Note: Currently tested to work with OMAP-L138 only.
+ *
+ * @pll: pll whose rate needs to be changed.
+ * @prediv: The pre divider value. Passing 0 disables the pre-divider.
+ * @pllm: The multiplier value. Passing 0 leads to multiply-by-one.
+ * @postdiv: The post divider value. Passing 0 disables the post-divider.
+ */
+int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
+   unsigned int mult, unsigned int postdiv)
+{
+   u32 ctrl;
+   unsigned int locktime;
+
+   if (pll->base == NULL)
+   return -EINVAL;
+
+   /*
+*  PLL lock time required per OMAP-L138 datasheet is
+* (2000 * prediv)/sqrt(pllm) OSCIN cycles. We approximate sqrt(pllm)
+* as 4 and OSCIN cycle as 25 MHz.
+*/
+   if (prediv) {
+   locktime = ((2000 * prediv) / 100);
+   prediv = (prediv - 1) | PLLDIV_EN;
+   } else {
+   locktime = 20;
+   }
+   if (postdiv)
+   postdiv = (postdiv - 1) | PLLDIV_EN;
+   if (mult)
+   mult = mult - 1;
+
+   ctrl = __raw_readl(pll->base + PLLCTL);
+
+   /* Switch the PLL to bypass mode */
+   ctrl &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN);
+   __raw_writel(ctrl, pll->base + PLLCTL);
+
+   /*
+* Wait for 4 OSCIN/CLKIN cycles to ensure that the PLLC has switched
+* to bypass mode. Delay of 1us ensures we are good for all > 4MHz
+* OSCIN/CLKIN inputs. Typically the input is ~25MHz.
+*/
+   udelay(1);
+
+   /* Reset and enable PLL */
+   ctrl &= ~(PLLCTL_PLLRST | PLLCTL_PLLDIS);
+   __raw_writel(ctrl, pll->base + PLLCTL);
+
+   if (pll->flags & PLL_HAS_PREDIV)
+   __raw_writel(prediv, pll->base + PREDIV);
+
+   __raw_writel(mult, pll->base + PLLM);
+
+   if (pll->flags & PLL_HAS_POSTDIV)
+   __raw_writel(postd

[PATCH v3 4/5] davinci: DA850/OMAP-L138: add CPUFreq support

2009-08-18 Thread Sekhar Nori
Adds basic CPUFreq support for DA850/OMAP-L138.

Currently, frequency scaling only on PLL0 is supported. No scaling of PLL1
or voltage levels as yet.

Peripherals like MMC/SD which have a clock input synchronous with
ARM clock will not work well since the clock will change behind their backs.
Support for notification to such devices to adjust themselves to the
new frequency will be added in later patches. Current defconfigs keep
CPUFreq disabled so it will not affect normal operation.

The OPP defintions assume clock input of 24MHz to the SoC. This is inline
with hardcoding of input frequency in the .c files. At some point
this will need to move into board dependent code as new boards appear with
a different input clock.

Tested with ondemand governer and a shell script to vary processor load.

Signed-off-by: Sekhar Nori 
---
 arch/arm/mach-davinci/da850.c  |  171 
 arch/arm/mach-davinci/include/mach/da8xx.h |1 +
 2 files changed, 172 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 4123ea5..5f379c4 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -40,6 +41,10 @@
 #define DA850_REF_FREQ 2400
 
 #define CFGCHIP3_ASYNC3_CLKSRC BIT(4)
+#define CFGCHIP0_PLL_MASTER_LOCK   BIT(4)
+
+static int da850_set_armrate(struct clk *clk, unsigned long rate);
+static int da850_round_armrate(struct clk *clk, unsigned long rate);
 
 static struct pll_data pll0_data = {
.num= 1,
@@ -283,6 +288,8 @@ static struct clk arm_clk = {
.parent = &pll0_sysclk6,
.lpsc   = DA8XX_LPSC0_ARM,
.flags  = ALWAYS_ENABLED,
+   .set_rate   = da850_set_armrate,
+   .round_rate = da850_round_armrate,
 };
 
 static struct clk rmii_clk = {
@@ -798,6 +805,148 @@ static struct davinci_timer_info da850_timer_info = {
 };
 
 #ifdef CONFIG_CPU_FREQ
+/*
+ * Notes:
+ * According to the TRM, minimum PLLM results in maximum power savings.
+ * The OPP definitions below should keep the PLLM as low as possible.
+ *
+ * The output of the PLLM must be between 400 to 600 MHz.
+ * This rules out prediv of anything but divide-by-one for 24Mhz OSC input.
+ */
+struct da850_opp {
+   unsigned intfreq;   /* in KHz */
+   unsigned intprediv;
+   unsigned intmult;
+   unsigned intpostdiv;
+};
+
+static const struct da850_opp da850_opp_300 = {
+   .freq   = 30,
+   .prediv = 1,
+   .mult   = 25,
+   .postdiv= 2,
+};
+
+static const struct da850_opp da850_opp_200 = {
+   .freq   = 20,
+   .prediv = 1,
+   .mult   = 25,
+   .postdiv= 3,
+};
+
+static const struct da850_opp da850_opp_96 = {
+   .freq   = 96000,
+   .prediv = 1,
+   .mult   = 20,
+   .postdiv= 5,
+};
+
+#define OPP(freq)  \
+   {   \
+   .index = (unsigned int) &da850_opp_##freq,  \
+   .frequency = freq * 1000, \
+   }
+
+static struct cpufreq_frequency_table da850_freq_table[] = {
+   OPP(300),
+   OPP(200),
+   OPP(96),
+   {
+   .index  = 0,
+   .frequency  = CPUFREQ_TABLE_END,
+   },
+};
+
+static struct davinci_clk da850_pll0_clks[ARRAY_SIZE(da850_clks)];
+
+static void da850_init_cpufreq_table(struct cpufreq_frequency_table **table)
+{
+   *table = &da850_freq_table[0];
+}
+
+static void da850_init_pll0_childlist(void)
+{
+   struct davinci_clk *c, *v = da850_pll0_clks;
+
+   for (c = da850_clks; c->lk.clk; c++) {
+   struct clk *clk = c->lk.clk;
+   struct clk *pll = clk_get_parent_pll(clk);
+
+   if (pll && !strcmp(pll->name, "pll0"))
+   *v++ = *c;
+   }
+}
+
+static int da850_round_armrate(struct clk *clk, unsigned long rate)
+{
+   int i, ret = 0, diff;
+   unsigned int best = (unsigned int) -1;
+
+   rate /= 1000; /* convert to kHz */
+
+   for (i = 0; da850_freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
+   diff = da850_freq_table[i].frequency - rate;
+   if (diff < 0)
+   diff = -diff;
+
+   if (diff < best) {
+   best = diff;
+   ret = da850_freq_table[i].frequency;
+   }
+   }
+
+   return ret * 1000;
+}
+
+static int da850_set_armrate(struct clk *clk, unsigned long rate)
+{
+   int i;
+   unsigned int prediv, mult, postdiv;
+   struct da850_opp *opp;
+   struct clk *pllclk = &pll0_clk;
+   struct pll_data *pll = pllclk->pll_data;
+   unsigned int v;
+   int ret;
+
+   /* convert to KHz */
+   rate /= 1000;
+
+   for (i = 0; d

[PATCH v3 2/5] cpufreq: add generic CPUFreq driver for DaVinci

2009-08-18 Thread Sekhar Nori
Adds a basic CPUFreq driver for DaVinci devices registering with the
kernel CPUFreq infrastructure.

Signed-off-by: Sekhar Nori 
---
 arch/arm/Kconfig|2 +-
 arch/arm/mach-davinci/Makefile  |3 +
 arch/arm/mach-davinci/cpufreq.c |  183 +++
 arch/arm/mach-davinci/include/mach/common.h |3 +
 4 files changed, 190 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/mach-davinci/cpufreq.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index aef63c8..38482a6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1241,7 +1241,7 @@ endmenu
 
 menu "CPU Power Management"
 
-if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_PXA || ARCH_S3C64XX)
+if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_PXA || ARCH_S3C64XX || 
ARCH_DAVINCI_DA8XX)
 
 source "drivers/cpufreq/Kconfig"
 
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 2e11e84..be629c5 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -29,3 +29,6 @@ obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o
 obj-$(CONFIG_MACH_DAVINCI_DM365_EVM)   += board-dm365-evm.o
 obj-$(CONFIG_MACH_DAVINCI_DA830_EVM)   += board-da830-evm.o
 obj-$(CONFIG_MACH_DAVINCI_DA850_EVM)   += board-da850-evm.o
+
+# Power Management
+obj-$(CONFIG_CPU_FREQ) += cpufreq.o
diff --git a/arch/arm/mach-davinci/cpufreq.c b/arch/arm/mach-davinci/cpufreq.c
new file mode 100644
index 000..65393b9
--- /dev/null
+++ b/arch/arm/mach-davinci/cpufreq.c
@@ -0,0 +1,183 @@
+/*
+ * CPU frequency scaling for DaVinci
+ *
+ * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * Based on linux/arch/arm/plat-omap/cpu-omap.c. Original Copyright follows:
+ *
+ *  Copyright (C) 2005 Nokia Corporation
+ *  Written by Tony Lindgren 
+ *
+ *  Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
+ *
+ * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Updated to support OMAP3
+ * Rajendra Nayak 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+
+#include "clock.h"
+
+static struct cpufreq_frequency_table *freq_table;
+static struct clk *armclk;
+
+static int davinci_verify_speed(struct cpufreq_policy *policy)
+{
+   if (freq_table)
+   return cpufreq_frequency_table_verify(policy, freq_table);
+
+   if (policy->cpu)
+   return -EINVAL;
+
+   cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
+policy->cpuinfo.max_freq);
+
+   policy->min = clk_round_rate(armclk, policy->min * 1000) / 1000;
+   policy->max = clk_round_rate(armclk, policy->max * 1000) / 1000;
+   cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
+policy->cpuinfo.max_freq);
+   return 0;
+}
+
+static unsigned int davinci_getspeed(unsigned int cpu)
+{
+   unsigned long rate;
+
+   if (cpu)
+   return 0;
+
+   rate = clk_get_rate(armclk) / 1000;
+
+   return rate;
+}
+
+static int davinci_target(struct cpufreq_policy *policy,
+  unsigned int target_freq,
+  unsigned int relation)
+{
+   struct cpufreq_freqs freqs;
+   int ret = 0;
+
+   /*
+* Ensure desired rate is within allowed range.  Some govenors
+* (ondemand) will just pass target_freq=0 to get the minimum.
+*/
+   if (target_freq < policy->cpuinfo.min_freq)
+   target_freq = policy->cpuinfo.min_freq;
+   if (target_freq > policy->cpuinfo.max_freq)
+   target_freq = policy->cpuinfo.max_freq;
+
+   freqs.old = davinci_getspeed(0);
+   freqs.new = clk_round_rate(armclk, target_freq * 1000) / 1000;
+   freqs.cpu = 0;
+
+   if (freqs.old == freqs.new)
+   return ret;
+   cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
+#ifdef CONFIG_CPU_FREQ_DEBUG
+   printk(KERN_DEBUG "cpufreq-davinci: transition: %u --> %u\n",
+  freqs.old, freqs.new);
+#endif
+   ret = clk_set_rate(armclk, freqs.new * 1000);
+   cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
+
+   return ret;
+}
+
+static int __init davinci_cpu_init(struct cpufreq_policy *policy)
+{
+   int result = 0;
+
+   armclk = clk_get(NULL, "arm");
+   if (IS_ERR(armclk)) {
+   printk(KERN_ERR "cpufreq-davinci: Unable to get ARM clock\n");
+   return PTR_ERR(armclk);
+   }
+
+   if (policy->cpu != 0) {
+   clk_put(armclk);
+   return -EINVAL;
+   }
+
+   policy->cur = policy->min = policy->max = davinci_getspeed(0);
+
+

[PATCH v3 3/5] davinci: DA850/OMAP-L138: allow async3 source to be changed

2009-08-18 Thread Sekhar Nori
The patch allows Async3 clock source to be selected between PLL1 SYSCLK2
and PLL0 SYSCLK2.

Having Async3 source from PLL1 SYSCLK2 allows peripherals on that
domain to remain unaffected by frequency scaling on PLL0.

Signed-off-by: Sekhar Nori 
---
 arch/arm/mach-davinci/clock.h  |4 +-
 arch/arm/mach-davinci/da850.c  |   39 
 arch/arm/mach-davinci/include/mach/da8xx.h |1 +
 3 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 74e0389..0b06121 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -69,9 +69,9 @@ struct clk {
const char  *name;
unsigned long   rate;
u8  usecount;
-   u8  flags;
u8  lpsc;
u8  psc_ctlr;
+   u32 flags;
struct clk  *parent;
struct pll_data *pll_data;
u32 div_reg;
@@ -79,7 +79,7 @@ struct clk {
int (*round_rate) (struct clk *clk, unsigned long rate);
 };
 
-/* Clock flags */
+/* Clock flags: SoC-specific flags start at BIT(16) */
 #define ALWAYS_ENABLED BIT(1)
 #define CLK_PSC BIT(2)
 #define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 192d719..4123ea5 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -30,12 +30,17 @@
 #include "clock.h"
 #include "mux.h"
 
+/* SoC specific clock flags */
+#define DA850_CLK_ASYNC3   BIT(16)
+
 #define DA850_PLL1_BASE0x01e1a000
 #define DA850_TIMER64P2_BASE   0x01f0c000
 #define DA850_TIMER64P3_BASE   0x01f0d000
 
 #define DA850_REF_FREQ 2400
 
+#define CFGCHIP3_ASYNC3_CLKSRC BIT(4)
+
 static struct pll_data pll0_data = {
.num= 1,
.phys_base  = DA8XX_PLL0_BASE,
@@ -232,6 +237,7 @@ static struct clk uart1_clk = {
.name   = "uart1",
.parent = &pll0_sysclk2,
.lpsc   = DA8XX_LPSC1_UART1,
+   .flags  = DA850_CLK_ASYNC3,
.psc_ctlr   = 1,
 };
 
@@ -239,6 +245,7 @@ static struct clk uart2_clk = {
.name   = "uart2",
.parent = &pll0_sysclk2,
.lpsc   = DA8XX_LPSC1_UART2,
+   .flags  = DA850_CLK_ASYNC3,
.psc_ctlr   = 1,
 };
 
@@ -790,6 +797,36 @@ static struct davinci_timer_info da850_timer_info = {
.clocksource_id = T0_TOP,
 };
 
+#ifdef CONFIG_CPU_FREQ
+static void da850_set_async3_src(int pllnum)
+{
+   struct clk *clk, *newparent = pllnum ? &pll1_sysclk2 : &pll0_sysclk2;
+   struct davinci_clk *c;
+   unsigned int v;
+   int ret;
+
+   for (c = da850_clks; c->lk.clk; c++) {
+   clk = c->lk.clk;
+   if (clk->flags & DA850_CLK_ASYNC3) {
+   ret = clk_set_parent(clk, newparent);
+   WARN(ret, "DA850: unable to re-parent clock %s",
+   clk->name);
+   }
+   }
+
+   v = __raw_readl(IO_ADDRESS(DA8XX_CFGCHIP3_REG));
+   if (pllnum)
+   v |= CFGCHIP3_ASYNC3_CLKSRC;
+   else
+   v &= ~CFGCHIP3_ASYNC3_CLKSRC;
+   __raw_writel(v, IO_ADDRESS(DA8XX_CFGCHIP3_REG));
+}
+#else
+static void da850_set_async3_src(int pllnum)
+{
+}
+#endif
+
 static struct davinci_soc_info davinci_soc_info_da850 = {
.io_desc= da850_io_desc,
.io_desc_num= ARRAY_SIZE(da850_io_desc),
@@ -817,4 +854,6 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
 void __init da850_init(void)
 {
davinci_common_init(&davinci_soc_info_da850);
+
+   da850_set_async3_src(1);
 }
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h 
b/arch/arm/mach-davinci/include/mach/da8xx.h
index d4095d0..e3eb953 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -30,6 +30,7 @@
 #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
 
 #define DA8XX_BOOT_CFG_BASE(IO_PHYS + 0x14000)
+#define DA8XX_CFGCHIP3_REG (DA8XX_BOOT_CFG_BASE + 0x188)
 
 #define DA8XX_PSC0_BASE0x01c1
 #define DA8XX_PLL0_BASE0x01c11000
-- 
1.6.2.4

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RE: [PATCH 3/3] davinci: DA850/OMAP-L138: add CPUFreq support

2009-08-18 Thread Nori, Sekhar
On Tue, Aug 11, 2009 at 04:31:38, Kevin Hilman wrote:
> Sekhar Nori  writes:
>
>

[...]

> > +static int da850_set_armrate(struct clk *clk, unsigned long rate)
> > +{
> > +

[...]

> > +   /* Propogate new rate */
> > +   pllclk->rate = pllclk->parent->rate;
> > +   pllclk->rate /= prediv;
> > +   pllclk->rate *= mult;
> > +   pllclk->rate /= postdiv;
> > +
> > +   /* FIXME: unnecessarily re-calculates rates for PLL1 as well */
> > +   davinci_clk_recalc_rates(da850_clks);
>
>
> Hmm, possible update for PATCH 1/3, I'll hold off on pushing 1/3 until
> I hear back.
>
> maybe have another flag in the PLL which says that one of the child
> clocks has been changed.  Any calls to clk_set_rate() or set_pllrate()
> will set that flag in the PLL.  If that flag is not set, then
> recalc_rates() can check if that flag is set and only recalc rates as
> necessary.
>

Kevin,

I implemented this little differently as I thought getting
to PLL data for each clock  for checking the 'rate changed'
flag will incur high runtime overhead during frequency
transitions.

So, I shifted that computation to init time and now maintain
another list of clocks whose rates need to be re-computed
when PLL0 rate changes.

Thanks,
Sekhar
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[PATCH] DaVinci: DM365: Adding entries for DM365 IRQ's

2009-08-18 Thread s-paulraj
From: Sandeep Paulraj 

This patch adds definitions for some DM365 IRQs that are used by
the codecs. Codecs will also use the IRQs.
Entries are being added to enable/disable IRQ's.
There is no use as such for these entires in the kernel itself.
Instead these will be used by the "linuxutils" package of the DVSDK.

For further information on IRQ muxing refer to
http://focus.ti.com/lit/ug/sprufg5a/sprufg5a.pdf

Signed-off-by: Sandeep Paulraj 
Signed-off-by: Sneha Narnakaje 
---
 arch/arm/mach-davinci/dm365.c |8 
 arch/arm/mach-davinci/include/mach/irqs.h |3 +++
 arch/arm/mach-davinci/include/mach/mux.h  |8 
 3 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index f8bac94..e815174 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -595,6 +595,14 @@ INT_CFG(DM365,  INT_EMAC_RXTHRESH,   14,1,1, 
false)
 INT_CFG(DM365,  INT_EMAC_RXPULSE,15,1,1, false)
 INT_CFG(DM365,  INT_EMAC_TXPULSE,16,1,1, false)
 INT_CFG(DM365,  INT_EMAC_MISCPULSE,  17,1,1, false)
+INT_CFG(DM365,  INT_IMX0_ENABLE, 0, 1,0, false)
+INT_CFG(DM365,  INT_IMX0_DISABLE,0, 1,1, false)
+INT_CFG(DM365,  INT_HDVICP_ENABLE,   0, 1,1, false)
+INT_CFG(DM365,  INT_HDVICP_DISABLE,  0, 1,0, false)
+INT_CFG(DM365,  INT_IMX1_ENABLE, 24,1,1, false)
+INT_CFG(DM365,  INT_IMX1_DISABLE,24,1,0, false)
+INT_CFG(DM365,  INT_NSF_ENABLE,  25,1,1, false)
+INT_CFG(DM365,  INT_NSF_DISABLE, 25,1,0, false)
 #endif
 };
 
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h 
b/arch/arm/mach-davinci/include/mach/irqs.h
index 7f755cc..3c918a7 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -205,6 +205,9 @@
 
 /* DaVinci DM365-specific Interrupts */
 #define IRQ_DM365_INSFINT  7
+#define IRQ_DM365_IMXINT1  8
+#define IRQ_DM365_IMXINT0  10
+#define IRQ_DM365_KLD_ARMINT   10
 #define IRQ_DM365_IMCOPINT 11
 #define IRQ_DM365_RTOINT   13
 #define IRQ_DM365_TINT514
diff --git a/arch/arm/mach-davinci/include/mach/mux.h 
b/arch/arm/mach-davinci/include/mach/mux.h
index 88cd22a..ac46362 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -294,6 +294,14 @@ enum davinci_dm365_index {
DM365_INT_EMAC_RXPULSE,
DM365_INT_EMAC_TXPULSE,
DM365_INT_EMAC_MISCPULSE,
+   DM365_INT_IMX0_ENABLE,
+   DM365_INT_IMX0_DISABLE,
+   DM365_INT_HDVICP_ENABLE,
+   DM365_INT_HDVICP_DISABLE,
+   DM365_INT_IMX1_ENABLE,
+   DM365_INT_IMX1_DISABLE,
+   DM365_INT_NSF_ENABLE,
+   DM365_INT_NSF_DISABLE,
 
/* EDMA event muxing */
DM365_EVT2_ASP_TX,
-- 
1.6.0.4

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cp command source code

2009-08-18 Thread Dilip Kumar

Hi fnds,

How to get cp command source code in any linux version.

Thanks,
Dilip Kumar



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RE: [PATCH v1 - 1/5] DaVinci - restructuring code to support vpif capture driver

2009-08-18 Thread Karicheri, Muralidharan
Mauro,

I need to send a set of patches for adding vpif capture driver. Currently the 
linux-next doesn't have the last patch from Chaithrika applied for vpif 
display. Is it possible to apply this asap so that I can create the vpif 
capture patch today?

Murali Karicheri
Software Design Engineer
Texas Instruments Inc.
Germantown, MD 20874
new phone: 301-407-9583
Old Phone : 301-515-3736 (will be deprecated)
email: m-kariche...@ti.com

>-Original Message-
>From: Hans Verkuil [mailto:hverk...@xs4all.nl]
>Sent: Tuesday, August 18, 2009 2:51 AM
>To: Karicheri, Muralidharan
>Cc: linux-me...@vger.kernel.org; davinci-linux-open-
>sou...@linux.davincidsp.com; khil...@deeprootsystems.com
>Subject: Re: [PATCH v1 - 1/5] DaVinci - restructuring code to support vpif
>capture driver
>
>On Tuesday 18 August 2009 08:49:13 Hans Verkuil wrote:
>> On Tuesday 18 August 2009 01:23:10 Karicheri, Muralidharan wrote:
>> > Hans,
>> >
>> > I have re-send vpfe capture patch. I will re-send vpif patches tomorrow.
>>
>> These patches apply fine. I'll merge them in my v4l-dvb-dm646x tree
>tonight.
>
>Oops, wrong tree. It's v4l-dvb-vpif.
>
>Regards,
>
>   Hans
>
>--
>Hans Verkuil - video4linux developer - sponsored by TANDBERG Telecom

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Re: [PATCH 20/24] davinci: da8xx: Add base DA830/OMAP-L137 SoC support

2009-08-18 Thread Sergei Shtylyov

Hello.

Kevin Hilman wrote:


From: Mark A. Greer 



The da830/omap l137 is a new SoC from TI that is similar
to the davinci line.  Since its so similar to davinci,
put the support for the da830 in the same directory as
the davinci code.



There are differences, however.  Some of those differences
prevent support for davinci and da830 platforms to work
in the same kernel binary.  Those differences are:



1) Different physical address for RAM.  This is relevant
   to Makefile.boot addresses and PHYS_OFFSET.  The
   Makefile.boot issue isn't truly a kernel issue but
   it means u-boot won't work with a uImage including
   both architectures.  The PHYS_OFFSET issue is
   addressed by the "Allow for runtime-determined
   PHYS_OFFSET" patch by Lennert Buytenhek but it
   hasn't been accepted yet.



2) Different uart addresses.  This is only an issue
   for the 'addruart' assembly macro when CONFIG_DEBUG_LL
   is enabled.  Since the code in that macro is called
   so early (e.g., by _error_p in kernel/head.S when
   the processor lookup fails), we can't determine what
   platform the kernel is running on at runtime to use
   the correct uart address.



These areas have compile errors intentionally inserted
to indicate to the builder they're doing something wrong.



A new config variable, CONFIG_ARCH_DAVINCI_DMx, is added
to distinguish between a true davinci architecture and
the da830 architecture.



Note that the da830 currently has an issue with writeback
data cache so CONFIG_CPU_DCACHE_WRITETHROUGH should be
enabled when building a da830 kernel.



Additional generalizations for future SoCs in the da8xx family done by
Sudhakar Rajashekhara and Sekhar Nori.



Signed-off-by: Steve Chen 
Signed-off-by: Mikhail Cherkashin 
Signed-off-by: Mark A. Greer 
Cc: Sudhakar Rajashekhara 
Cc: Sekhar Nori 
Signed-off-by: Kevin Hilman 


[...]


diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
new file mode 100644
index 000..ab42428
--- /dev/null
+++ b/arch/arm/mach-davinci/da830.c
@@ -0,0 +1,1247 @@

[...]

+static struct davinci_clk da830_clks[] = {

[...]

+   CLK("musb_hdrc",  NULL,   &usb20_clk),


   Matching this clock by device was a bad idea since I also need it in the 
OHCI glue layer... I'm afraid I'll have to redo this. :-/


WBR, Sergei

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recompiling the decode demo

2009-08-18 Thread Ramakrishnan Muthukrishnan
Hi,

I am trying to rebuild the decode demo for use with the latest git
tree and a custom built toolchain from sources. I faced several issues
along the way and I finally gave up.

1. XDC had some toolchain names hardcoded.
2. DMAI was a dependency for decode demo.
3. rebuilding dmai proved to be difficult. DMAI has capture related
files, but vpfe drivers are not yet part of the git tree. I don't want
to use the staging tree used by TI engineers.
4. I tried building DMAI from svn, but again that seem to be designed
to work with staging tree.

I am not sure what more is in store for me, so I gave up.

Does anyone know how I can proceed? is there an application repository
which tracks the upstream kernel interfaces?

Isn't it possible to keep these demo application light weight and
clean by keeping the dependencies low? May be directly use CE apis
instead of DMAI and other cruft?

-- 
  Ramakrishnan

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Re: cp command source code

2009-08-18 Thread Viral Sachde
On Tue, Aug 18, 2009 at 8:44 PM, Dilip Kumar wrote:
> Hi fnds,
>
> How to get cp command source code in any linux version.
>
> Thanks,
> Dilip Kumar

As this is core utility, check ftp://ftp.gnu.org/gnu/coreutils/

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RE: [PATCH v1 - 1/5] DaVinci - restructuring code to support vpif capture driver

2009-08-18 Thread Karicheri, Muralidharan
Mauro,

Here are the patches from Chaithrika that I am referring to.
http://www.mail-archive.com/linux-me...@vger.kernel.org/msg08254.html
http://www.mail-archive.com/linux-me...@vger.kernel.org/msg07676.html

Let me know once they are merged...

Murali Karicheri
Software Design Engineer
Texas Instruments Inc.
Germantown, MD 20874
new phone: 301-407-9583
Old Phone : 301-515-3736 (will be deprecated)
email: m-kariche...@ti.com

>-Original Message-
>From: Mauro Carvalho Chehab [mailto:mche...@infradead.org]
>Sent: Tuesday, August 18, 2009 1:28 PM
>To: Karicheri, Muralidharan
>Cc: Mauro Carvalho Chehab; linux-me...@vger.kernel.org; davinci-linux-open-
>sou...@linux.davincidsp.com; khil...@deeprootsystems.com; Hans Verkuil
>Subject: Re: [PATCH v1 - 1/5] DaVinci - restructuring code to support vpif
>capture driver
>
>Em Tue, 18 Aug 2009 11:06:54 -0500
>"Karicheri, Muralidharan"  escreveu:
>
>> Mauro,
>>
>> I need to send a set of patches for adding vpif capture driver. Currently
>the linux-next doesn't have the last patch from Chaithrika applied for vpif
>display. Is it possible to apply this asap so that I can create the vpif
>capture patch today?
>
>Sure. Could you please point me what's the patchwork ID(s)[1] of the patch
>you need
>me to apply at our development tree and at linux-next?
>   [1] http://patchwork.kernel.org/project/linux-media/list/
>
>Cheers,
>Mauro

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RE: [PATCH v4] ARM: DaVinci: DM646x Video: Platform and board specific setup

2009-08-18 Thread Karicheri, Muralidharan
Russell,

Could you please ack this patch from Chaithrika if you agree with these changes?

I have another set of patches waiting to be submitted and is dependent on this 
patch. So you response will be helpful to speed up the process.

Regards,
Murali Karicheri
Software Design Engineer
Texas Instruments Inc.
Germantown, MD 20874
email: m-kariche...@ti.com

>-Original Message-
>From: linux-media-ow...@vger.kernel.org [mailto:linux-media-
>ow...@vger.kernel.org] On Behalf Of Subrahmanya, Chaithrika
>Sent: Wednesday, August 05, 2009 1:36 AM
>To: Subrahmanya, Chaithrika; r...@arm.linux.org.uk; li...@arm.linux.org.uk
>Cc: mche...@infradead.org; hverk...@xs4all.nl; linux-me...@vger.kernel.org;
>davinci-linux-open-source@linux.davincidsp.com; 'Manjunath Hadli'; Jadav,
>Brijesh R; 'Kevin Hilman'
>Subject: RE: [PATCH v4] ARM: DaVinci: DM646x Video: Platform and board
>specific setup
>
>Russell,
>
>Requesting your ack on this patch.
>
>Regards,
>Chaithrika
>
>On Wed, Aug 05, 2009 at 20:17:42, Chaithrika U S wrote:
>> Platform specific display device setup for DM646x EVM
>>
>> Add platform device and resource structures. Also define a platform
>specific
>> clock setup function that can be accessed by the driver to configure the
>clock
>> and CPLD.
>>
>> Signed-off-by: Manjunath Hadli 
>> Signed-off-by: Brijesh Jadav 
>> Signed-off-by: Chaithrika U S 
>> Signed-off-by: Kevin Hilman 
>> ---
>> Applies to Davinci GIT tree. Minor updates like change in structure name-
>> subdev_info to vpif_subdev_info and correction to VDD3P3V_VID_MASK value.
>>
>>  arch/arm/mach-davinci/board-dm646x-evm.c|  125
>+++
>>  arch/arm/mach-davinci/dm646x.c  |   62 +
>>  arch/arm/mach-davinci/include/mach/dm646x.h |   24 +
>>  3 files changed, 211 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c
>b/arch/arm/mach-davinci/board-dm646x-evm.c
>> index b1bf18c..8c88fd0 100644
>> --- a/arch/arm/mach-davinci/board-dm646x-evm.c
>> +++ b/arch/arm/mach-davinci/board-dm646x-evm.c
>> @@ -63,6 +63,19 @@
>>  #define DM646X_EVM_PHY_MASK (0x2)
>>  #define DM646X_EVM_MDIO_FREQUENCY   (220) /* PHY bus frequency */
>>
>> +#define VIDCLKCTL_OFFSET(0x38)
>> +#define VSCLKDIS_OFFSET (0x6c)
>> +
>> +#define VCH2CLK_MASK(BIT_MASK(10) | BIT_MASK(9) | 
>> BIT_MASK(8))
>> +#define VCH2CLK_SYSCLK8 (BIT(9))
>> +#define VCH2CLK_AUXCLK  (BIT(9) | BIT(8))
>> +#define VCH3CLK_MASK(BIT_MASK(14) | BIT_MASK(13) | 
>> BIT_MASK(12))
>> +#define VCH3CLK_SYSCLK8 (BIT(13))
>> +#define VCH3CLK_AUXCLK  (BIT(14) | BIT(13))
>> +
>> +#define VIDCH2CLK   (BIT(10))
>> +#define VIDCH3CLK   (BIT(11))
>> +
>>  static struct davinci_uart_config uart_config __initdata = {
>>  .enabled_uarts = (1 << 0),
>>  };
>> @@ -288,6 +301,40 @@ static struct snd_platform_data
>dm646x_evm_snd_data[]
>= {
>>  },
>>  };
>>
>> +static struct i2c_client *cpld_client;
>> +
>> +static int cpld_video_probe(struct i2c_client *client,
>> +const struct i2c_device_id *id)
>> +{
>> +cpld_client = client;
>> +return 0;
>> +}
>> +
>> +static int __devexit cpld_video_remove(struct i2c_client *client)
>> +{
>> +cpld_client = NULL;
>> +return 0;
>> +}
>> +
>> +static const struct i2c_device_id cpld_video_id[] = {
>> +{ "cpld_video", 0 },
>> +{ }
>> +};
>> +
>> +static struct i2c_driver cpld_video_driver = {
>> +.driver = {
>> +.name   = "cpld_video",
>> +},
>> +.probe  = cpld_video_probe,
>> +.remove = cpld_video_remove,
>> +.id_table   = cpld_video_id,
>> +};
>> +
>> +static void evm_init_cpld(void)
>> +{
>> +i2c_add_driver(&cpld_video_driver);
>> +}
>> +
>>  static struct i2c_board_info __initdata i2c_info[] =  {
>>  {
>>  I2C_BOARD_INFO("24c256", 0x50),
>> @@ -300,6 +347,9 @@ static struct i2c_board_info __initdata i2c_info[] =
>{
>>  {
>>  I2C_BOARD_INFO("cpld_reg0", 0x3a),
>>  },
>> +{
>> +I2C_BOARD_INFO("cpld_video", 0x3B),
>> +},
>>  };
>>
>>  static struct davinci_i2c_platform_data i2c_pdata = {
>> @@ -307,11 +357,85 @@ static struct davinci_i2c_platform_data i2c_pdata =
>{
>>  .bus_delay  = 0 /* usec */,
>>  };
>>
>> +static int set_vpif_clock(int mux_mode, int hd)
>> +{
>> +int val = 0;
>> +int err = 0;
>> +unsigned int value;
>> +void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
>> +
>> +if (!cpld_client)
>> +return -ENXIO;
>> +
>> +/* disable the clock */
>> +value = __raw_readl(base + VSCLKDIS_OFFSET);
>> +value |= (VIDCH3CLK | VIDCH2CLK);
>> +__raw_writel(value, base + VSCLKDIS_OFFSET);
>> +
>> +val = i2c_smbus_read_byte(cpld_client);
>> +if (val < 0)
>> +return val;
>> +
>> +if (mux_mode == 1)
>> +val &= ~0x40;
>> +el

Re: davinci_enc_mngr for git 2.6.31 kernel?

2009-08-18 Thread J.C. Wren
I'm still a little fuzzy on this.  Does this mean that without the encoder
manager, NTSC output is not possible?  If not, what video modes are
supported?
--jc

On Mon, Aug 17, 2009 at 10:04 AM, Paulraj, Sandeep  wrote:

>  The encoder manager is required but is not yet part of the 2.6.31 kernel.
>
> It will be in due course of time
>
>
>
> Sandeep
>
>
>   --
>
> *From:* davinci-linux-open-source-boun...@linux.davincidsp.com [mailto:
> davinci-linux-open-source-boun...@linux.davincidsp.com] *On Behalf Of *J.C.
> Wren
> *Sent:* Monday, August 17, 2009 9:55 AM
> *To:* davinci-linux-open-source@linux.davincidsp.com
> *Subject:* davinci_enc_mngr for git 2.6.31 kernel?
>
>
>
> To pick up some later bug fixes, I'm moving from MV 2.6.18 to git kernel
> 2.6.31-rc5.  I see that the davinci_enc_mngr driver is not present in the
> git tree.  Is this driver no longer necessary, not yet supported, or what?
> If this driver isn't available, what are the ramifications?
>
> Thanks,
> --jc
>
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Re: cp command source code

2009-08-18 Thread Dilip Kumar

Viral Sachde wrote:

On Tue, Aug 18, 2009 at 8:44 PM, Dilip Kumar wrote:
  

Hi fnds,

How to get cp command source code in any linux version.

Thanks,
Dilip Kumar



As this is core utility, check ftp://ftp.gnu.org/gnu/coreutils/

  

Thanks a lot, i got the source code.

Regards,
Dilip



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Re: davinci_enc_mngr for git 2.6.31 kernel?

2009-08-18 Thread Caglar Akyuz
On Wednesday 19 August 2009 05:10:08 J.C. Wren wrote:
> I'm still a little fuzzy on this.  Does this mean that without the encoder
> manager, NTSC output is not possible?  If not, what video modes are
> supported?
> --jc
>

Recent kernels can output NTSC. Encoder manager is not needed for that 
purpose. Encoder manager and friends are needed for both framebuffer drivers 
and v4l2 drivers coexist at the same time. If you don't want v4l2 support, you 
don't need encoder manager.

I ported old 2.6.10(LSP 1.20) drivers to recent kernels and posted at [1]. If 
you need encoder manager and do not want to wait you can give them a try.

Regards,
Caglar

[1] http://n2.nabble.com/-PATCH-0-9--This-patch-series-ports-VPBE-drivers-
from-2.6.10-tree.-td3151814.html

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compile help

2009-08-18 Thread rohan tabish
Hey guys i have downloaded the latest source code from git for Davinci 
Kernel.When i load the kernel in the board it gets halt.

 Booting kernel from Legacy Image at 8070 ...

   Image Name:   Linux-2.6.31-rc5-davinci1
   Created:  2009-08-16  13:56:56 UTC
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    1478408 Bytes =  1.4 MB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Starting kernel ...

Uncompressing 
Linux
 done, booting the kernel.


 after that.
 I have checked the version of the kernel in the linux on which i am compiling 
the source code.The version is  2.6.23.17 -88.fc7.It is found  by command 
"uname  -r".Is this the cause for that.if so plz tell me how to update the 
kernel.

I have found in some forums 2 set the bootargs. My bootargs are correct. they 
are:

bootargs=mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp

Can any1 tell me whats going wrong.



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