[PATCH v4 4/4] davinci: dm646x EVM: Specify reserved EDMA channel/slots

2010-06-28 Thread Sekhar Nori
From: Rajashekhara, Sudhakar 

Not all the channels and slots available on the DM646x EVM
are used by the devices on the EVM. These resources can be
used by the DSP to speed up codec operations.

This patch reserves these channels for the DSP.

Signed-off-by: Sudhakar Rajashekhara 
Signed-off-by: Sekhar Nori 
---
No changes since last post.

 arch/arm/mach-davinci/board-dm646x-evm.c|   35 +++
 arch/arm/mach-davinci/dm646x.c  |8 +-
 arch/arm/mach-davinci/include/mach/dm646x.h |1 +
 3 files changed, 43 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c 
b/arch/arm/mach-davinci/board-dm646x-evm.c
index 6d88893..b8b1dec 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -721,6 +721,39 @@ static struct davinci_uart_config uart_config __initdata = 
{
 #define DM646X_EVM_PHY_MASK(0x2)
 #define DM646X_EVM_MDIO_FREQUENCY  (220) /* PHY bus frequency */
 
+/*
+ * The following EDMA channels/slots are not being used by drivers (for
+ * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
+ * reserved for codecs on the DSP side.
+ */
+static const s16 dm646x_dma_rsv_chans[][2] = {
+   /* (offset, number) */
+   { 0,  4},
+   {13,  3},
+   {24,  4},
+   {30,  2},
+   {54,  3},
+   {-1, -1}
+};
+
+static const s16 dm646x_dma_rsv_slots[][2] = {
+   /* (offset, number) */
+   { 0,  4},
+   {13,  3},
+   {24,  4},
+   {30,  2},
+   {54,  3},
+   {128, 384},
+   {-1, -1}
+};
+
+static struct edma_rsv_info dm646x_edma_rsv[] = {
+   {
+   .rsv_chans  = dm646x_dma_rsv_chans,
+   .rsv_slots  = dm646x_dma_rsv_slots,
+   },
+};
+
 static __init void evm_init(void)
 {
struct davinci_soc_info *soc_info = &davinci_soc_info;
@@ -732,6 +765,8 @@ static __init void evm_init(void)
 
platform_device_register(&davinci_nand_device);
 
+   dm646x_init_edma(dm646x_edma_rsv);
+
if (HAS_ATA)
davinci_init_ide();
 
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index bfc887e..e4a3df1 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -879,6 +879,13 @@ void dm646x_setup_vpif(struct vpif_display_config 
*display_config,
platform_device_register(&vpif_capture_dev);
 }
 
+int __init dm646x_init_edma(struct edma_rsv_info *rsv)
+{
+   edma_cc0_info.rsv = rsv;
+
+   return platform_device_register(&dm646x_edma_device);
+}
+
 void __init dm646x_init(void)
 {
dm646x_board_setup_refclk(&ref_clk);
@@ -890,7 +897,6 @@ static int __init dm646x_init_devices(void)
if (!cpu_is_davinci_dm646x())
return 0;
 
-   platform_device_register(&dm646x_edma_device);
platform_device_register(&dm646x_emac_device);
return 0;
 }
diff --git a/arch/arm/mach-davinci/include/mach/dm646x.h 
b/arch/arm/mach-davinci/include/mach/dm646x.h
index add6f79..0a27ee9 100644
--- a/arch/arm/mach-davinci/include/mach/dm646x.h
+++ b/arch/arm/mach-davinci/include/mach/dm646x.h
@@ -32,6 +32,7 @@ void __init dm646x_init(void);
 void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
 void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
 void __init dm646x_board_setup_refclk(struct clk *clk);
+int __init dm646x_init_edma(struct edma_rsv_info *rsv);
 
 void dm646x_video_init(void);
 
-- 
1.6.2.4

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[PATCH v3 2/4] davinci: support for EDMA resource sharing

2010-06-28 Thread Sekhar Nori
From: Rajashekhara, Sudhakar 

Current EDMA driver is not taking care of EDMA channels/slots
which are allocated from other processor, say DSP. If a
channel/slot is allocated from DSP, the existing EDMA driver
can still allocate the same resource on ARM.

This patch enables the user to pass the channel/slots reserved
for DSP as platform data. EDMA driver scans this list during
probe and prepares a bitmap of channel/slots which can be used
on ARM side.

Trying to reserve channels by doing a 'pre-allocate' using
edma_alloc_{slot|channel}() API does not work because

1) The reservation should be done in probe() to avoid race
   with other ARM side driver trying to use EDMA

2) The alloc channel API sets up the access through shadow region
   0 which will be incorrect for DSP usage. It also sets up the
   channel <-> queue number mapping which is not required as DSP
   will likely do its own mapping anyway.

3) (minor) There is no API to allocate channels in bulk.

Signed-off-by: Sudhakar Rajashekhara 
Cc: David Brownell 
Signed-off-by: Sekhar Nori 
---
Since v2, take care of the fact that the edma_soc_info is now passed to
edma probe as an array of pointers to edma_soc_info structures instead
of array of structures earlier. Also added some text to patch description
explaining the alternate considered.

 arch/arm/mach-davinci/dma.c   |   41 -
 arch/arm/mach-davinci/include/mach/edma.h |9 ++
 2 files changed, 49 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index 0b6c01f..2ede598 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -205,6 +205,18 @@ static inline void edma_parm_or(unsigned ctlr, int offset, 
int param_no,
edma_or(ctlr, EDMA_PARM + offset + (param_no << 5), or);
 }
 
+static inline void set_bits(int offset, int len, unsigned long *p)
+{
+   for (; len > 0; len--)
+   set_bit(offset + (len - 1), p);
+}
+
+static inline void clear_bits(int offset, int len, unsigned long *p)
+{
+   for (; len > 0; len--)
+   clear_bit(offset + (len - 1), p);
+}
+
 /*/
 
 /* actual number of DMA channels and slots on this silicon */
@@ -1377,8 +1389,10 @@ static int __init edma_probe(struct platform_device 
*pdev)
struct edma_soc_info**info = pdev->dev.platform_data;
const s8(*queue_priority_mapping)[2];
const s8(*queue_tc_mapping)[2];
-   int i, j, found = 0;
+   int i, j, off, ln, found = 0;
int status = -1;
+   const s16   (*rsv_chans)[2];
+   const s16   (*rsv_slots)[2];
int irq[EDMA_MAX_CC] = {0, 0};
int err_irq[EDMA_MAX_CC] = {0, 0};
struct resource *r[EDMA_MAX_CC] = {NULL};
@@ -1446,6 +1460,31 @@ static int __init edma_probe(struct platform_device 
*pdev)
memset(edma_cc[j]->edma_unused, 0xff,
sizeof(edma_cc[j]->edma_unused));
 
+   if (info[j]->rsv) {
+
+   /* Clear the reserved channels in unused list */
+   rsv_chans = info[j]->rsv->rsv_chans;
+   if (rsv_chans) {
+   for (i = 0; rsv_chans[i][0] != -1; i++) {
+   off = rsv_chans[i][0];
+   ln = rsv_chans[i][1];
+   clear_bits(off, ln,
+   edma_cc[j]->edma_unused);
+   }
+   }
+
+   /* Set the reserved slots in inuse list */
+   rsv_slots = info[j]->rsv->rsv_slots;
+   if (rsv_slots) {
+   for (i = 0; rsv_slots[i][0] != -1; i++) {
+   off = rsv_slots[i][0];
+   ln = rsv_slots[i][1];
+   set_bits(off, ln,
+   edma_cc[j]->edma_inuse);
+   }
+   }
+   }
+
sprintf(irq_name, "edma%d", j);
irq[j] = platform_get_irq_byname(pdev, irq_name);
edma_cc[j]->irq_res_start = irq[j];
diff --git a/arch/arm/mach-davinci/include/mach/edma.h 
b/arch/arm/mach-davinci/include/mach/edma.h
index 9a3bcc6..dc10ef6 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -271,6 +271,12 @@ void edma_clear_event(unsigned channel);
 void edma_pause(unsigned channel);
 void edma_resume(unsigned channel);
 
+struct edma_rsv_info {
+
+   const s16   (*rsv_chans)[2];
+   const s16 

[PATCH 0/4] davinci: edma resource reservation

2010-06-28 Thread Sekhar Nori
Apologies to the reviewers for posting a follow-up so late.

For convinience, here was the last discussion thread:

http://www.mail-archive.com/davinci-linux-open-source@linux.davincidsp.com/msg17032.html

Two issues were pending:

1) Ability to determine if there is a mismatch between number
   of CC information structures provided and the number of CC
   resources configured. This was not an issue per se with the
   series, but was seen as a precursor. This has been taken care 
   in patch 1/4.

2) Ability for some DA850 boards to reserve channels/slots only
   for one CC easily. This has been done using modification
   to patch 3/4 wherein the EDMA register function now takes an
   array of pointers so it is easy to pass NULL if a boad is not
   interested in resource reservation on a particular CC.

Another issue that was discussed was the CC info structures
being copied over in the EDMA probe. However, the structure
being allocated is actually 'struct edma' and I had since renamed
the variable to 'edma_cc' instead of 'edma_info' through a
patch which is already committed.

The whole series has been tested on DM644x, DM355, DM365, DM6467,
OMAP-L137 and OMAP-L138 EVMs taking audio as an example EDMA user.
I do not have access to TNETV107x hardware so did not test there.
   
Rajashekhara, Sudhakar (3):
  davinci: support for EDMA resource sharing
  davinci: da8xx/omapl EVM: Specify reserved channels/slots
  davinci: dm646x EVM: Specify reserved EDMA channel/slots

Sekhar Nori (1):
  davinci: edma: provide ability to detect insufficient CC info data

 arch/arm/mach-davinci/board-da830-evm.c |   32 +-
 arch/arm/mach-davinci/board-da850-evm.c |   52 ++-
 arch/arm/mach-davinci/board-dm646x-evm.c|   35 +++
 arch/arm/mach-davinci/devices-da8xx.c   |   51 +-
 arch/arm/mach-davinci/devices-tnetv107x.c   |   24 ++-
 arch/arm/mach-davinci/dm355.c   |   22 +
 arch/arm/mach-davinci/dm365.c   |   24 ++-
 arch/arm/mach-davinci/dm644x.c  |   22 +
 arch/arm/mach-davinci/dm646x.c  |   30 -
 arch/arm/mach-davinci/dma.c |   62 +-
 arch/arm/mach-davinci/include/mach/da8xx.h  |3 +-
 arch/arm/mach-davinci/include/mach/dm646x.h |1 +
 arch/arm/mach-davinci/include/mach/edma.h   |   11 +
 13 files changed, 281 insertions(+), 88 deletions(-)

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[PATCH 1/4] davinci: edma: provide ability to detect insufficient CC info data

2010-06-28 Thread Sekhar Nori
This patch modifies the EDMA driver to expect the channel
controller (CC) infomation passed on by the platform as a fixed
size (EDMA_MAX_CC) array of pointers to structures.

Doing so helps catch errors of the sort where the resource
structure has information for more channel controllers than
the number channel controller info structures defined.

Such insufficient platform data would lead to illegal memory
accesses.

Signed-off-by: Sekhar Nori 
---
This patch has been newly added into the series.

 arch/arm/mach-davinci/devices-da8xx.c |   29 ++---
 arch/arm/mach-davinci/devices-tnetv107x.c |   24 +---
 arch/arm/mach-davinci/dm355.c |   22 --
 arch/arm/mach-davinci/dm365.c |   24 +---
 arch/arm/mach-davinci/dm644x.c|   22 --
 arch/arm/mach-davinci/dm646x.c|   22 --
 arch/arm/mach-davinci/dma.c   |   21 ++---
 arch/arm/mach-davinci/include/mach/edma.h |2 ++
 8 files changed, 92 insertions(+), 74 deletions(-)

diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 8cda729..1d956bf 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -111,19 +111,21 @@ static const s8 da850_queue_priority_mapping[][2] = {
{-1, -1}
 };
 
-static struct edma_soc_info da830_edma_info[] = {
-   {
-   .n_channel  = 32,
-   .n_region   = 4,
-   .n_slot = 128,
-   .n_tc   = 2,
-   .n_cc   = 1,
-   .queue_tc_mapping   = da8xx_queue_tc_mapping,
-   .queue_priority_mapping = da8xx_queue_priority_mapping,
-   },
+static struct edma_soc_info da830_edma_cc0_info = {
+   .n_channel  = 32,
+   .n_region   = 4,
+   .n_slot = 128,
+   .n_tc   = 2,
+   .n_cc   = 1,
+   .queue_tc_mapping   = da8xx_queue_tc_mapping,
+   .queue_priority_mapping = da8xx_queue_priority_mapping,
+};
+
+static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
+   &da830_edma_cc0_info,
 };
 
-static struct edma_soc_info da850_edma_info[] = {
+static struct edma_soc_info da850_edma_cc_info[] = {
{
.n_channel  = 32,
.n_region   = 4,
@@ -144,6 +146,11 @@ static struct edma_soc_info da850_edma_info[] = {
},
 };
 
+static struct edma_soc_info *da850_edma_info[EDMA_MAX_CC] = {
+   &da850_edma_cc_info[0],
+   &da850_edma_cc_info[1],
+};
+
 static struct resource da830_edma_resources[] = {
{
.name   = "edma_cc0",
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c 
b/arch/arm/mach-davinci/devices-tnetv107x.c
index 4eef6cc..2718a3a 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -69,16 +69,18 @@ static const s8 edma_priority_mapping[][2] = {
{   -1, -1  }
 };
 
-static struct edma_soc_info edma_info[] = {
-   {
-   .n_channel  = EDMA_TNETV107X_NUM_DMACH,
-   .n_region   = EDMA_TNETV107X_NUM_REGIONS,
-   .n_slot = EDMA_TNETV107X_NUM_PARAMENTRY,
-   .n_tc   = EDMA_TNETV107X_NUM_TC,
-   .n_cc   = 1,
-   .queue_tc_mapping   = edma_tc_mapping,
-   .queue_priority_mapping = edma_priority_mapping,
-   },
+static struct edma_soc_info edma_cc0_info = {
+   .n_channel  = EDMA_TNETV107X_NUM_DMACH,
+   .n_region   = EDMA_TNETV107X_NUM_REGIONS,
+   .n_slot = EDMA_TNETV107X_NUM_PARAMENTRY,
+   .n_tc   = EDMA_TNETV107X_NUM_TC,
+   .n_cc   = 1,
+   .queue_tc_mapping   = edma_tc_mapping,
+   .queue_priority_mapping = edma_priority_mapping,
+};
+
+static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
+   &edma_cc0_info,
 };
 
 static struct resource edma_resources[] = {
@@ -117,7 +119,7 @@ static struct platform_device edma_device = {
.id = -1,
.num_resources  = ARRAY_SIZE(edma_resources),
.resource   = edma_resources,
-   .dev.platform_data = edma_info,
+   .dev.platform_data = tnetv107x_edma_info,
 };
 
 static struct plat_serial8250_port serial_data[] = {
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 3834781..3d996b6 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -591,16 +591,18 @@ queue_priority_mapping[][2] = {
{-1, -1},
 };
 
-static struct edma_soc_info dm355_edma_info[] = {
-   {
-   .n_channel   

[PATCH v5 3/4] davinci: da8xx/omapl EVM: Specify reserved channels/slots

2010-06-28 Thread Sekhar Nori
From: Rajashekhara, Sudhakar 

The drivers on da8xx/omapl EVMs do not utilize all the channels
and slots provided by EDMA. Some of these are better utilitzed by
the DSP on the SoC for speeding up codec operations.

Reserve these channels/slots for the DSP.

Signed-off-by: Sudhakar Rajashekhara 
Signed-off-by: Sekhar Nori 
---
Since v4, pass the DA850 resource reservation structures to
edma register API as array of pointers to structures so it is
easy for a board to pass any of them as NULL.

 arch/arm/mach-davinci/board-da830-evm.c|   32 -
 arch/arm/mach-davinci/board-da850-evm.c|   52 +++-
 arch/arm/mach-davinci/devices-da8xx.c  |   21 ++-
 arch/arm/mach-davinci/include/mach/da8xx.h |3 +-
 4 files changed, 96 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da830-evm.c 
b/arch/arm/mach-davinci/board-da830-evm.c
index 212d970..b61e872 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -494,12 +494,42 @@ static struct davinci_i2c_platform_data 
da830_evm_i2c_0_pdata = {
.bus_delay  = 0,/* usec */
 };
 
+/*
+ * The following EDMA channels/slots are not being used by drivers (for
+ * example: Timer, GPIO, UART events etc) on da830/omap-l137 EVM, hence
+ * they are being reserved for codecs on the DSP side.
+ */
+static const s16 da830_dma_rsv_chans[][2] = {
+   /* (offset, number) */
+   { 8,  2},
+   {12,  2},
+   {24,  4},
+   {30,  2},
+   {-1, -1}
+};
+
+static const s16 da830_dma_rsv_slots[][2] = {
+   /* (offset, number) */
+   { 8,  2},
+   {12,  2},
+   {24,  4},
+   {30, 26},
+   {-1, -1}
+};
+
+static struct edma_rsv_info da830_edma_rsv[] = {
+   {
+   .rsv_chans  = da830_dma_rsv_chans,
+   .rsv_slots  = da830_dma_rsv_slots,
+   },
+};
+
 static __init void da830_evm_init(void)
 {
struct davinci_soc_info *soc_info = &davinci_soc_info;
int ret;
 
-   ret = da8xx_register_edma();
+   ret = da830_register_edma(da830_edma_rsv);
if (ret)
pr_warning("da830_evm_init: edma registration failed: %d\n",
ret);
diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index 2ec3095..ef7d9de 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -629,6 +629,56 @@ static int __init da850_evm_config_emac(void)
 }
 device_initcall(da850_evm_config_emac);
 
+/*
+ * The following EDMA channels/slots are not being used by drivers (for
+ * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
+ * they are being reserved for codecs on the DSP side.
+ */
+static const s16 da850_dma0_rsv_chans[][2] = {
+   /* (offset, number) */
+   { 8,  6},
+   {24,  4},
+   {30,  2},
+   {-1, -1}
+};
+
+static const s16 da850_dma0_rsv_slots[][2] = {
+   /* (offset, number) */
+   { 8,  6},
+   {24,  4},
+   {30, 50},
+   {-1, -1}
+};
+
+static const s16 da850_dma1_rsv_chans[][2] = {
+   /* (offset, number) */
+   { 0, 28},
+   {30,  2},
+   {-1, -1}
+};
+
+static const s16 da850_dma1_rsv_slots[][2] = {
+   /* (offset, number) */
+   { 0, 28},
+   {30, 90},
+   {-1, -1}
+};
+
+static struct edma_rsv_info da850_edma_cc0_rsv = {
+   .rsv_chans  = da850_dma0_rsv_chans,
+   .rsv_slots  = da850_dma0_rsv_slots,
+};
+
+static struct edma_rsv_info da850_edma_cc1_rsv = {
+   .rsv_chans  = da850_dma1_rsv_chans,
+   .rsv_slots  = da850_dma1_rsv_slots,
+};
+
+static struct edma_rsv_info *da850_edma_rsv[2] = {
+   &da850_edma_cc0_rsv,
+   &da850_edma_cc1_rsv,
+};
+
 static __init void da850_evm_init(void)
 {
int ret;
@@ -638,7 +688,7 @@ static __init void da850_evm_init(void)
pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n",
ret);
 
-   ret = da8xx_register_edma();
+   ret = da850_register_edma(da850_edma_rsv);
if (ret)
pr_warning("da850_evm_init: edma registration failed: %d\n",
ret);
diff --git a/arch/arm/mach-davinci/devices-da8xx.c 
b/arch/arm/mach-davinci/devices-da8xx.c
index 1d956bf..52bc7b1 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -255,18 +255,21 @@ static struct platform_device da850_edma_device = {
.resource   = da850_edma_resources,
 };
 
-int __init da8xx_register_edma(void)
+int __init da830_register_edma(struct edma_rsv_info *rsv)
 {
-   struct platform_device *pdev;
+   da830_edma_cc0_info.rsv = rsv;
 
-   if (cpu_is_davinci_da830())
-   pdev = &da830_edma_device;
-   else if (cpu_is_davinci_da850())
-   pdev = &da850_edma_device;
-   else
-   return -ENODEV;

Re: [spi-devel-general] [PATCH 0/3] davinci: spi: replace existing SPI driver

2010-06-28 Thread Grant Likely
On Mon, Jun 28, 2010 at 10:57 AM, Nori, Sekhar  wrote:
> Hi Grant,
>
> On Sun, Jun 27, 2010 at 11:33:13, Grant Likely wrote:
>> Any users of the current davinci_spi driver care to comment on this
>> series?  I'm hesitant to apply a complete replacement to a driver that
>> was only added in December without having a lot more information.
>
> Inside TI, we tested the new driver using SPI flash in DMA, interrupt and
> polled modes and found it to be working fine. Please see:
>
> http://www.mail-archive.com/davinci-linux-open-source@linux.davincidsp.com/msg18139.html
> and
> http://www.mail-archive.com/davinci-linux-open-source@linux.davincidsp.com/msg18198.html
>
> Other folks have tested it too and are happy with the fixes it bring in:
>
> http://www.mail-archive.com/davinci-linux-open-source@linux.davincidsp.com/msg18184.html
>
> http://www.mail-archive.com/davinci-linux-open-source@linux.davincidsp.com/msg18195.html
>
> Thanks,
> Sekhar

Thanks Sekhar.  I'll take a look at them when I get back home tomorrow.

g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
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RE: [spi-devel-general] [PATCH 0/3] davinci: spi: replace existing SPI driver

2010-06-28 Thread Nori, Sekhar
Hi Grant,

On Sun, Jun 27, 2010 at 11:33:13, Grant Likely wrote:
> Any users of the current davinci_spi driver care to comment on this
> series?  I'm hesitant to apply a complete replacement to a driver that
> was only added in December without having a lot more information.

Inside TI, we tested the new driver using SPI flash in DMA, interrupt and
polled modes and found it to be working fine. Please see:

http://www.mail-archive.com/davinci-linux-open-source@linux.davincidsp.com/msg18139.html
and
http://www.mail-archive.com/davinci-linux-open-source@linux.davincidsp.com/msg18198.html

Other folks have tested it too and are happy with the fixes it bring in:

http://www.mail-archive.com/davinci-linux-open-source@linux.davincidsp.com/msg18184.html

http://www.mail-archive.com/davinci-linux-open-source@linux.davincidsp.com/msg18195.html

Thanks,
Sekhar

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Re: Anyone else having trouble with their AM1808 evaluation board?

2010-06-28 Thread Philipp Schrader
Hi Gabriele,

Unfortunately, I do not have the resources to find what specific part could
be the problem.
I only have an 8cm fan available that I can put on top of the EVM.

With the fan, it looks like the problem goes away; the board keeps running.
If I take the fan away, the board will shut down within 2 minutes so I
believe your suspicion of thermal issues is probably right.

Sorry I can't give you any more details, but at least I can do some testing
now.
Thanks!
Philipp

On Mon, Jun 28, 2010 at 02:55, Gabriele Filosofi wrote:

>  Philipp,
>
>
>
> I faced the same problem with the Zoom AM1808 board we received from TI’s
> sales representatives.
>
> They substituted our EVM with a new one, and this new board works very
> good.
>
> I could not conduct any serious investigation on the faulty board, but I
> can suggest you to make some verification on thermal effects as the possible
> cause.
>
> Please, try to selectively cool the AM1808-SOM-M1 module (with a fan or
> cooling spray)
>
> Please, let we know any results you could find
>
>
>
> Thanks
>
> Gabriele
>
>
>
>
>
> *Da:* davinci-linux-open-source-boun...@linux.davincidsp.com [mailto:
> davinci-linux-open-source-boun...@linux.davincidsp.com] *Per conto di *Philipp
> Schrader
> *Inviato:* venerdì 25 giugno 2010 20.04
> *A:* davinci-linux-open-source@linux.davincidsp.com
> *Oggetto:* Anyone else having trouble with their AM1808 evaluation board?
>
>
>
> Hi all,
>
> I am trying to do some development on the Zoom AM1808 EVM from LogicPD.
>
> The demo appears to boot just fine since the demo loads and I can interact
> with the screen, login over UART and telnet.
> However, after half a minute to a minute the board stops responding; the
> screen goes blank and it doesn't respond to any input anymore.
>
> I'm really not sure whether it's a kernel crash or some other issue.
> I do get various errors such as:
>
> "Unable to handle kernel paging request at virtual address e3120004 pgd =
> c1ffc000 [e3120004] *pgd= Internal error: Oops: 5 [#1] PREEMPT"
>
> "udevd[528]: inotify_add_watch(3, (null), 10) failed: Bad address"
>
> "Internal error: Oops - undefined instruction: 0 [#1] PREEMPT"
>
> I am unsure if they point to the real problem though.
> If anyone has encountered something like this, I'd appreciate any ideas.
>
> Thanks,
> Philipp
>
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Lauterbach and DM365

2010-06-28 Thread Kieran Bingham

Hi Guys,

Has anyone used a lauterbach to connect the DM365?

I can't find documentation anywhere on what settings to use...

--
Regards
Kieran
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RE: [PATCH 1/2] davinci: da8xx: sparse cleanup: remove duplicate entries in irq priorities structure

2010-06-28 Thread Nori, Sekhar
On Mon, Jun 28, 2010 at 17:16:37, I wrote:
> This patch helps get rid of the following sparse warnings
> of the type:
>
>   CHECK   arch/arm/mach-davinci/da830.c
> arch/arm/mach-davinci/da830.c:1026:3: warning: Initializer entry defined twice
> arch/arm/mach-davinci/da830.c:1027:3:   also defined here
>
> coming from the irq priorities structure init.

Argh, that's an array not a structure. Will repost
with updated patch description after checking if there are
any other comments.

Thanks,
Sekhar

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[PATCH 2/2] davinci: da850 evm: sparse cleanup: make file local variables static

2010-06-28 Thread Sekhar Nori
Without this cleanup, sparse checker reports warnings of the type:

  CHECK   arch/arm/mach-davinci/board-da850-evm.c
arch/arm/mach-davinci/board-da850-evm.c:112:22: warning: symbol 
'da850_evm_nandflash_partition' was not declared. Should it be static?

The nand flash partitions and regulator supplies are used within
the EVM file and so should have been static

This patch has been boot tested on DA830 and DA850 EVMs.

Signed-off-by: Sekhar Nori 
---
 arch/arm/mach-davinci/board-da850-evm.c |   14 +++---
 1 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index 2ec3095..af6e9c6 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -109,7 +109,7 @@ static struct platform_device da850_pm_device = {
  * to boot, using TI's tools to install the secondary boot loader
  * (UBL) and U-Boot.
  */
-struct mtd_partition da850_evm_nandflash_partition[] = {
+static struct mtd_partition da850_evm_nandflash_partition[] = {
{
.name   = "u-boot env",
.offset = 0,
@@ -405,7 +405,7 @@ static int da850_lcd_hw_init(void)
 /* TPS65070 voltage regulator support */
 
 /* 3.3V */
-struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
+static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
{
.supply = "usb0_vdda33",
},
@@ -415,7 +415,7 @@ struct regulator_consumer_supply tps65070_dcdc1_consumers[] 
= {
 };
 
 /* 3.3V or 1.8V */
-struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
+static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
{
.supply = "dvdd3318_a",
},
@@ -428,14 +428,14 @@ struct regulator_consumer_supply 
tps65070_dcdc2_consumers[] = {
 };
 
 /* 1.2V */
-struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
+static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
{
.supply = "cvdd",
},
 };
 
 /* 1.8V LDO */
-struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
+static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
{
.supply = "sata_vddr",
},
@@ -451,7 +451,7 @@ struct regulator_consumer_supply tps65070_ldo1_consumers[] 
= {
 };
 
 /* 1.2V LDO */
-struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
+static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
{
.supply = "sata_vdd",
},
@@ -469,7 +469,7 @@ struct regulator_consumer_supply tps65070_ldo2_consumers[] 
= {
},
 };
 
-struct regulator_init_data tps65070_regulator_data[] = {
+static struct regulator_init_data tps65070_regulator_data[] = {
/* dcdc1 */
{
.constraints = {
-- 
1.6.2.4

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[PATCH 1/2] davinci: da8xx: sparse cleanup: remove duplicate entries in irq priorities structure

2010-06-28 Thread Sekhar Nori
This patch helps get rid of the following sparse warnings
of the type:

  CHECK   arch/arm/mach-davinci/da830.c
arch/arm/mach-davinci/da830.c:1026:3: warning: Initializer entry defined twice
arch/arm/mach-davinci/da830.c:1027:3:   also defined here

coming from the irq priorities structure init.

Apart from one instance of genuinie repetition, most are are instances
of multiple #defines of the same interrupt number. I have not
removed the multiple definitions from the irq.h file in the hope
that someone might decide to use them as shared interrupts at some
point of time. The priority initialization however needs to be done
only once and hence has been corrected.

Signed-off-by: Sekhar Nori 
---
 arch/arm/mach-davinci/da830.c |5 -
 arch/arm/mach-davinci/da850.c |   25 -
 2 files changed, 0 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 23e9eda..ec23ab4 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1024,7 +1024,6 @@ static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = 
{
[IRQ_DA8XX_EVTOUT4] = 7,
[IRQ_DA8XX_EVTOUT5] = 7,
[IRQ_DA8XX_EVTOUT6] = 7,
-   [IRQ_DA8XX_EVTOUT6] = 7,
[IRQ_DA8XX_EVTOUT7] = 7,
[IRQ_DA8XX_CCINT0]  = 7,
[IRQ_DA8XX_CCERRINT]= 7,
@@ -1042,11 +1041,7 @@ static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] 
= {
[IRQ_DA8XX_TINT34_1]= 7,
[IRQ_DA8XX_UARTINT0]= 7,
[IRQ_DA8XX_KEYMGRINT]   = 7,
-   [IRQ_DA8XX_SECINT]  = 7,
-   [IRQ_DA8XX_SECKEYERR]   = 7,
[IRQ_DA830_MPUERR]  = 7,
-   [IRQ_DA830_IOPUERR] = 7,
-   [IRQ_DA830_BOOTCFGERR]  = 7,
[IRQ_DA8XX_CHIPINT0]= 7,
[IRQ_DA8XX_CHIPINT1]= 7,
[IRQ_DA8XX_CHIPINT2]= 7,
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 6b8331b..68ed58a 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -643,7 +643,6 @@ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
[IRQ_DA8XX_EVTOUT4] = 7,
[IRQ_DA8XX_EVTOUT5] = 7,
[IRQ_DA8XX_EVTOUT6] = 7,
-   [IRQ_DA8XX_EVTOUT6] = 7,
[IRQ_DA8XX_EVTOUT7] = 7,
[IRQ_DA8XX_CCINT0]  = 7,
[IRQ_DA8XX_CCERRINT]= 7,
@@ -661,27 +660,7 @@ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
[IRQ_DA8XX_TINT34_1]= 7,
[IRQ_DA8XX_UARTINT0]= 7,
[IRQ_DA8XX_KEYMGRINT]   = 7,
-   [IRQ_DA8XX_SECINT]  = 7,
-   [IRQ_DA8XX_SECKEYERR]   = 7,
[IRQ_DA850_MPUADDRERR0] = 7,
-   [IRQ_DA850_MPUPROTERR0] = 7,
-   [IRQ_DA850_IOPUADDRERR0]= 7,
-   [IRQ_DA850_IOPUPROTERR0]= 7,
-   [IRQ_DA850_IOPUADDRERR1]= 7,
-   [IRQ_DA850_IOPUPROTERR1]= 7,
-   [IRQ_DA850_IOPUADDRERR2]= 7,
-   [IRQ_DA850_IOPUPROTERR2]= 7,
-   [IRQ_DA850_BOOTCFG_ADDR_ERR]= 7,
-   [IRQ_DA850_BOOTCFG_PROT_ERR]= 7,
-   [IRQ_DA850_MPUADDRERR1] = 7,
-   [IRQ_DA850_MPUPROTERR1] = 7,
-   [IRQ_DA850_IOPUADDRERR3]= 7,
-   [IRQ_DA850_IOPUPROTERR3]= 7,
-   [IRQ_DA850_IOPUADDRERR4]= 7,
-   [IRQ_DA850_IOPUPROTERR4]= 7,
-   [IRQ_DA850_IOPUADDRERR5]= 7,
-   [IRQ_DA850_IOPUPROTERR5]= 7,
-   [IRQ_DA850_MIOPU_BOOTCFG_ERR]   = 7,
[IRQ_DA8XX_CHIPINT0]= 7,
[IRQ_DA8XX_CHIPINT1]= 7,
[IRQ_DA8XX_CHIPINT2]= 7,
@@ -722,8 +701,6 @@ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
[IRQ_DA8XX_EHRPWM1] = 7,
[IRQ_DA8XX_EHRPWM1TZ]   = 7,
[IRQ_DA850_SATAINT] = 7,
-   [IRQ_DA850_TINT12_2]= 7,
-   [IRQ_DA850_TINT34_2]= 7,
[IRQ_DA850_TINTALL_2]   = 7,
[IRQ_DA8XX_ECAP0]   = 7,
[IRQ_DA8XX_ECAP1]   = 7,
@@ -751,8 +728,6 @@ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
[IRQ_DA850_CCINT1]  = 7,
[IRQ_DA850_CCERRINT1]   = 7,
[IRQ_DA850_TCERRINT2]   = 7,
-   [IRQ_DA850_TINT12_3]= 7,
-   [IRQ_DA850_TINT34_3]= 7,
[IRQ_DA850_TINTALL_3]   = 7,
[IRQ_DA850_MCBSP0RINT]  = 7,
[IRQ_DA850_MCBSP0XINT]  = 7,
-- 
1.6.2.4

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Re: Option -j passed to flash_erase.

2010-06-28 Thread Andrea Gasparini
Hi, 

> It is not mandatory unless you want to use JFFS2 under u-boot for the
> kernel partition as well. Actually, I don't know any reason why someone
> would want something like that.

Ok, doens't seems good to have them removed from the wiki?

> Those are discarded by plain 'nand read' or 'nboot' commands. In my
> experience these 2 cases are the same:
> 
> $flash_eraseall -j /dev/mtd2
> $nandwrite -p /dev/mtd2 uImage
> 
> and:
> 
> $flash_eraseall /dev/mtd2
> $nandwrite -p /dev/mtd2 uImage

well, I encountered a case in which a nand read from uboot after a '-j' 
erased partition run from linux gives problem.
Don't know why, and I'm still investigating.

Anyway, better to have everything consistent to only one notation.
Thanks.
-- 
Andrea Gasparini 
 ImaVis S.r.l. 
web: www.imavis.com
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