[PATCH 02/12] spi: davinci: Added support for chip select using gpio

[Raffaele Recalcati]

From: Raffaele Recalcati <raffaele.recalc...@bticino.it>
Date: Fri, 4 Jun 2010 16:16:37 +0200
Subject: [PATCH 02/12] spi: davinci: Added support for chip select using
gpio

    Signed-off-by: Davide Bonfanti <davide.bonfa...@bticino.it>
---
 arch/arm/mach-davinci/dm365.c |   10 ++++++----
 drivers/spi/davinci_spi.c     |   26 +++++++++++++++++---------
 2 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a146849..42fd4a4 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -677,10 +677,12 @@ void __init dm365_init_spi0(unsigned chipselect_mask,
     davinci_cfg_reg(DM365_SPI0_SDO);

     /* not all slaves will be wired up */
-    if (chipselect_mask & BIT(0))
-        davinci_cfg_reg(DM365_SPI0_SDENA0);
-    if (chipselect_mask & BIT(1))
-        davinci_cfg_reg(DM365_SPI0_SDENA1);
+    if  (!((unsigned long) info->controller_data)) {
+        if (chipselect_mask & BIT(0))
+            davinci_cfg_reg(DM365_SPI0_SDENA0);
+        if (chipselect_mask & BIT(1))
+            davinci_cfg_reg(DM365_SPI0_SDENA1);
+    }

     spi_register_board_info(info, len);

diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 95afb6b..6a305ca 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -29,6 +29,7 @@
 #include <linux/spi/spi_bitbang.h>
 #include <linux/slab.h>

+#include <mach/gpio.h>
 #include <mach/spi.h>
 #include <mach/edma.h>

@@ -270,18 +271,25 @@ static void davinci_spi_chipselect(struct spi_device
*spi, int value)
     pdata = davinci_spi->pdata;

     /*
-     * Board specific chip select logic decides the polarity and cs
-     * line for the controller
-     */
+    * Board specific chip select logic decides the polarity and cs
+    * line for the controller
+    */
     if (value == BITBANG_CS_INACTIVE) {
-        set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT);
-
-        data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
-        iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+        if  ((unsigned long) spi->controller_data) {
+            gpio_set_value(spi->controller_data, !(spi->mode &
SPI_CS_HIGH));
+        } else {
+            set_io_bits(davinci_spi->base + SPIDEF, CS_DEFAULT);

+            data1_reg_val |= CS_DEFAULT << SPIDAT1_CSNR_SHIFT;
+            iowrite32(data1_reg_val, davinci_spi->base + SPIDAT1);
+        }
         while ((ioread32(davinci_spi->base + SPIBUF)
-                    & SPIBUF_RXEMPTY_MASK) == 0)
+                & SPIBUF_RXEMPTY_MASK) == 0)
             cpu_relax();
+    } else {
+        if  ((unsigned long) spi->controller_data) {
+            gpio_set_value(spi->controller_data, (spi->mode &
SPI_CS_HIGH));
+        }
     }
 }

-- 
1.6.3.3

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