RE: [PATCH 3/6] DM365 SOC specific File
Kevin,
Pleas see inline
Sandeep
-Original Message-
From: Kevin Hilman [mailto:khil...@deeprootsystems.com]
Sent: Wednesday, June 03, 2009 6:52 PM
To: Paulraj, Sandeep
Cc: davinci-linux-open-source@linux.davincidsp.com
Subject: Re: [PATCH 3/6] DM365 SOC specific File
s-paul...@ti.com writes:
Patch adds DM365 SOC specific entries related to
clocks on the DM365 SOC.
Patch also assigns priorities to IRQs on the DM365
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
arch/arm/mach-davinci/dm365.c | 660
+
1 files changed, 660 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-davinci/dm365.c
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-
davinci/dm365.c
new file mode 100644
index 000..c82c107
--- /dev/null
+++ b/arch/arm/mach-davinci/dm365.c
@@ -0,0 +1,660 @@
+/*
+ * TI DaVinci DM365 chip specific setup
+ *
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include linux/kernel.h
+#include linux/init.h
+#include linux/clk.h
+#include linux/serial_8250.h
+#include linux/platform_device.h
+#include linux/dma-mapping.h
+
+#include asm/mach/map.h
+
+#include mach/dm365.h
+#include mach/clock.h
+#include mach/cpu.h
+#include mach/edma.h
+#include mach/psc.h
+#include mach/mux.h
+#include mach/irqs.h
+#include mach/time.h
+#include mach/gpio.h
+#include mach/serial.h
+#include mach/common.h
+
+#include clock.h
+#include mux.h
+
+#define DM365_REF_FREQ 2400/* 24 MHz on the DM365
EVM
*/
+
+static struct pll_data pll1_data = {
+ .num = 1,
+ .phys_base = DAVINCI_PLL1_BASE,
+ .flags = PLL_HAS_PREDIV,
+};
According to the dm365 ARM Subsystem spec (sprufg5) it also has a POSTDIV.
+
+static struct pll_data pll2_data = {
+ .num = 2,
+ .phys_base = DAVINCI_PLL2_BASE,
+ .flags = PLL_HAS_PREDIV,
+};
Looks like dm365 has a programmable POSTDIV too, where as dm355 was
fixed at /1.
+static struct clk ref_clk = {
+ .name = ref_clk,
+ .rate = DM365_REF_FREQ,
+};
+
+static struct clk pll1_clk = {
+ .name = pll1,
+ .parent = ref_clk,
+ .flags = CLK_PLL,
+ .pll_data = pll1_data,
+};
+
+static struct clk pll1_sysclk1 = {
+ .name = pll1_sysclk1,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV1,
+};
+
+static struct clk pll1_sysclk2 = {
+ .name = pll1_sysclk2,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV2,
+};
+
+static struct clk pll1_sysclk3 = {
+ .name = pll1_sysclk3,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV3,
+};
+
+static struct clk pll1_sysclk4 = {
+ .name = pll1_sysclk4,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV4,
+};
+
+static struct clk pll1_sysclk5 = {
+ .name = pll1_sysclk5,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV5,
+};
+
+static struct clk pll1_sysclk6 = {
+ .name = pll1_sysclk6,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV6,
+};
+
+static struct clk pll1_sysclk7 = {
+ .name = pll1_sysclk7,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV7,
+};
+
+static struct clk pll1_sysclk8 = {
+ .name = pll1_sysclk8,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV8,
+};
+
+static struct clk pll1_sysclk9 = {
+ .name = pll1_sysclk9,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV9,
+};
You added sysclk5-9, but dropped sysclkbp. Looks like there's a
sysckbp in the spec, and is used as USB ref clock.
You should also model the OBSCLK (CLKOUT0) which is PRE_PLL.
+static struct clk pll2_clk = {
+ .name = pll2,
+ .parent = ref_clk,
+ .flags = CLK_PLL,
+ .pll_data = pll2_data,
+};
+
+static struct clk pll2_sysclk1 = {
+ .name = pll2_sysclk1,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV1,
+};
+
+static struct clk pll2_sysclk2 = {
+ .name = pll2_sysclk2,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV2,
+};
+
+static struct clk pll2_sysclk3 = {
+ .name = pll2_sysclk3,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV3,
+};
+
+static struct clk pll2_sysclk4 = {
+ .name = pll2_sysclk4
Re: [PATCH 3/6] DM365 SOC specific File
Paulraj, Sandeep s-paul...@ti.com writes:
+static struct clk timer2_clk = {
+ .name = timer2,
+ .parent = ref_clk,
+ .lpsc = DAVINCI_LPSC_TIMER2,
+ .usecount = 1, /* REVISIT: why cant' this be disabled?
*/
+};
Is this really a problem on dm365 also? or is this a copy-paste remnant
from dm355?
[Sandeep] While working on my next set of patches I tries this and
the same problem exists on the DM365 as well
Thanks for confirming.
Any chance you might be able dig a little to understand why disabling
this LPSC is hanging the system?
Kevin
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RE: [PATCH 3/6] DM365 SOC specific File
-Original Message-
From: Kevin Hilman [mailto:khil...@deeprootsystems.com]
Sent: Friday, June 05, 2009 2:52 PM
To: Paulraj, Sandeep
Cc: davinci-linux-open-source@linux.davincidsp.com
Subject: Re: [PATCH 3/6] DM365 SOC specific File
Paulraj, Sandeep s-paul...@ti.com writes:
+static struct clk timer2_clk = {
+ .name = timer2,
+ .parent = ref_clk,
+ .lpsc = DAVINCI_LPSC_TIMER2,
+ .usecount = 1, /* REVISIT: why cant' this be
disabled?
*/
+};
Is this really a problem on dm365 also? or is this a copy-paste
remnant
from dm355?
[Sandeep] While working on my next set of patches I tries this and
the same problem exists on the DM365 as well
Thanks for confirming.
[Sandeep] OK
Any chance you might be able dig a little to understand why disabling
this LPSC is hanging the system?
[Sandeep] Sure, after I free up with some of the patchwork for DM3XX
Kevin
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[PATCH 3/6] DM365 SOC specific File
Patch adds DM365 SOC specific entries related to
clocks on the DM365 SOC.
Patch also assigns priorities to IRQs on the DM365
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
arch/arm/mach-davinci/dm365.c | 660 +
1 files changed, 660 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/mach-davinci/dm365.c
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
new file mode 100644
index 000..c82c107
--- /dev/null
+++ b/arch/arm/mach-davinci/dm365.c
@@ -0,0 +1,660 @@
+/*
+ * TI DaVinci DM365 chip specific setup
+ *
+ * Copyright (C) 2009 Texas Instruments
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed as is WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#include linux/kernel.h
+#include linux/init.h
+#include linux/clk.h
+#include linux/serial_8250.h
+#include linux/platform_device.h
+#include linux/dma-mapping.h
+
+#include asm/mach/map.h
+
+#include mach/dm365.h
+#include mach/clock.h
+#include mach/cpu.h
+#include mach/edma.h
+#include mach/psc.h
+#include mach/mux.h
+#include mach/irqs.h
+#include mach/time.h
+#include mach/gpio.h
+#include mach/serial.h
+#include mach/common.h
+
+#include clock.h
+#include mux.h
+
+#define DM365_REF_FREQ 2400/* 24 MHz on the DM365 EVM */
+
+static struct pll_data pll1_data = {
+ .num = 1,
+ .phys_base = DAVINCI_PLL1_BASE,
+ .flags = PLL_HAS_PREDIV,
+};
+
+static struct pll_data pll2_data = {
+ .num = 2,
+ .phys_base = DAVINCI_PLL2_BASE,
+ .flags = PLL_HAS_PREDIV,
+};
+
+static struct clk ref_clk = {
+ .name = ref_clk,
+ .rate = DM365_REF_FREQ,
+};
+
+static struct clk pll1_clk = {
+ .name = pll1,
+ .parent = ref_clk,
+ .flags = CLK_PLL,
+ .pll_data = pll1_data,
+};
+
+static struct clk pll1_sysclk1 = {
+ .name = pll1_sysclk1,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV1,
+};
+
+static struct clk pll1_sysclk2 = {
+ .name = pll1_sysclk2,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV2,
+};
+
+static struct clk pll1_sysclk3 = {
+ .name = pll1_sysclk3,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV3,
+};
+
+static struct clk pll1_sysclk4 = {
+ .name = pll1_sysclk4,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV4,
+};
+
+static struct clk pll1_sysclk5 = {
+ .name = pll1_sysclk5,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV5,
+};
+
+static struct clk pll1_sysclk6 = {
+ .name = pll1_sysclk6,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV6,
+};
+
+static struct clk pll1_sysclk7 = {
+ .name = pll1_sysclk7,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV7,
+};
+
+static struct clk pll1_sysclk8 = {
+ .name = pll1_sysclk8,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV8,
+};
+
+static struct clk pll1_sysclk9 = {
+ .name = pll1_sysclk9,
+ .parent = pll1_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV9,
+};
+
+static struct clk pll2_clk = {
+ .name = pll2,
+ .parent = ref_clk,
+ .flags = CLK_PLL,
+ .pll_data = pll2_data,
+};
+
+static struct clk pll2_sysclk1 = {
+ .name = pll2_sysclk1,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV1,
+};
+
+static struct clk pll2_sysclk2 = {
+ .name = pll2_sysclk2,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV2,
+};
+
+static struct clk pll2_sysclk3 = {
+ .name = pll2_sysclk3,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV3,
+};
+
+static struct clk pll2_sysclk4 = {
+ .name = pll2_sysclk4,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV4,
+};
+
+static struct clk pll2_sysclk5 = {
+ .name = pll2_sysclk5,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV5,
+};
+
+static struct clk pll2_sysclk6 = {
+ .name = pll2_sysclk6,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV6,
+};
+
+static struct clk pll2_sysclk7 = {
+ .name = pll2_sysclk7,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV7,
+};
+
+static struct clk pll2_sysclk8 = {
+ .name = pll2_sysclk8,
+ .parent = pll2_clk,
+ .flags = CLK_PLL,
+ .div_reg = PLLDIV8,
+};
+
+static struct clk pll2_sysclk9 = {
+ .name =
Re: [PATCH 3/6] DM365 SOC specific File
On Wednesday 03 June 2009, s-paul...@ti.com wrote:
+
+static int __init dm365_init_devices(void)
+{
+ if (!cpu_is_davinci_dm365())
+ return 0;
+
+ return 0;
+}
+postcore_initcall(dm365_init_devices);
That's useless...
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RE: [PATCH 3/6] DM365 SOC specific File
-Original Message-
From: David Brownell [mailto:davi...@pacbell.net]
Sent: Wednesday, June 03, 2009 5:51 PM
To: davinci-linux-open-source@linux.davincidsp.com
Cc: Paulraj, Sandeep
Subject: Re: [PATCH 3/6] DM365 SOC specific File
On Wednesday 03 June 2009, s-paul...@ti.com wrote:
+
+static int __init dm365_init_devices(void)
+{
+ if (!cpu_is_davinci_dm365())
+ return 0;
+
+ return 0;
+}
+postcore_initcall(dm365_init_devices);
That's useless...
[Sandeep] That's true at this point of time. But we will add EDMA, VPBE and
VPFE soon. Considering that in my next set of patches should I keep this or
remove it?
Thanks,
Sandeep
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Re: [PATCH 3/6] DM365 SOC specific File
Paulraj, Sandeep s-paul...@ti.com writes:
[...]
You added sysclk5-9, but dropped sysclkbp. Looks like there's a
sysckbp in the spec, and is used as USB ref clock.
[Sandeep] will add but I believe there are multiple ways to source USB clock.
OK, but all the sources should still be defined.
[...]
Hmm, the spec only shows PLL2 SYSCLK1-5, and you have 6-9 as well.
Is that a spec bug or a copy-paste bug?
[Sandeep] definitely not a copy paste error. I use it in the UBL
which BTW I design so I know it is used. Don't know if TI wants to
keep it a secret.
Well, the secret is out. :)
[...]
+static struct clk timer2_clk = {
+ .name = timer2,
+ .parent = ref_clk,
+ .lpsc = DAVINCI_LPSC_TIMER2,
+ .usecount = 1, /* REVISIT: why cant' this be disabled?
*/
+};
Is this really a problem on dm365 also? or is this a copy-paste remnant
from dm355?
[Sandeep] I'll check it out myself. Till then it is most probably
because I copy pasted
The easiest way is to test with the disable-unused-clocks feature
enabled and see if this clock can be disabled.
[...]
+static int __init dm365_init_devices(void)
+{
+ if (!cpu_is_davinci_dm365())
+ return 0;
+
+ return 0;
+}
+postcore_initcall(dm365_init_devices);
Another copy paste problem. You don't need an empty initcall.
[Sandeep] This was intentional.
Is there any reason you didn't include the EDMA stuff which is what
this initcall is used for in dm355?
[Sandeep] I was under the impression that EDMA has to be added in a
separate patch
I'd prefer it in a separate patch, yes.
If you're not going to included EDMA, then add this initcall when you
need it.
[Sandeep] I am going to in subsequent patches.
The truth of the matter is I am supposed to leave it for someone else to add
EDMA so just laid the groundwork
OK, then add this initcall along with the EDMA support.
Kevin
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RE: [PATCH 3/6] DM365 SOC specific File
-Original Message-
From: Kevin Hilman [mailto:khil...@deeprootsystems.com]
Sent: Wednesday, June 03, 2009 7:41 PM
To: Paulraj, Sandeep
Cc: davinci-linux-open-source@linux.davincidsp.com
Subject: Re: [PATCH 3/6] DM365 SOC specific File
Paulraj, Sandeep s-paul...@ti.com writes:
[...]
You added sysclk5-9, but dropped sysclkbp. Looks like there's a
sysckbp in the spec, and is used as USB ref clock.
[Sandeep] will add but I believe there are multiple ways to source USB
clock.
OK, but all the sources should still be defined.
[...]
Hmm, the spec only shows PLL2 SYSCLK1-5, and you have 6-9 as well.
Is that a spec bug or a copy-paste bug?
[Sandeep] definitely not a copy paste error. I use it in the UBL
which BTW I design so I know it is used. Don't know if TI wants to
keep it a secret.
Well, the secret is out. :)
[Sandeep] as I mentioned in another e-mail
PLL1-PLLDIV8 = 0x8003; // POST DIV 486/4 - MMC0/SD0
The above is from UBL code
So for the MMC driver to work properly I need SYSCLK8.
That does not leave me with much room for maneuver does it?
[...]
+static struct clk timer2_clk = {
+ .name = timer2,
+ .parent = ref_clk,
+ .lpsc = DAVINCI_LPSC_TIMER2,
+ .usecount = 1, /* REVISIT: why cant' this be
disabled?
*/
+};
Is this really a problem on dm365 also? or is this a copy-paste
remnant
from dm355?
[Sandeep] I'll check it out myself. Till then it is most probably
because I copy pasted
The easiest way is to test with the disable-unused-clocks feature
enabled and see if this clock can be disabled.
[Sandeep] OK
[...]
+static int __init dm365_init_devices(void)
+{
+ if (!cpu_is_davinci_dm365())
+ return 0;
+
+ return 0;
+}
+postcore_initcall(dm365_init_devices);
Another copy paste problem. You don't need an empty initcall.
[Sandeep] This was intentional.
Is there any reason you didn't include the EDMA stuff which is what
this initcall is used for in dm355?
[Sandeep] I was under the impression that EDMA has to be added in a
separate patch
I'd prefer it in a separate patch, yes.
[Sandeep] OK
If you're not going to included EDMA, then add this initcall when you
need it.
[Sandeep] I am going to in subsequent patches.
The truth of the matter is I am supposed to leave it for someone else to
add EDMA so just laid the groundwork
OK, then add this initcall along with the EDMA support.
[Sandeep] OK
Kevin
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