RE: OMAP-L13x DDR Self-refresh bug

2010-02-10 Thread Nori, Sekhar 
On Tue, Feb 09, 2010 at 23:42:36, James Nuss wrote:
 Hi Sekhar

 Nori, Sekhar wrote:
  On Tue, Feb 09, 2010 at 21:51:01, James Nuss wrote:

[...]

 
  Putting the DDR into self-refresh and subsequently gating the clocks for
greater power savings, requires significantly  more work (Refer to
  Section 2.16 OMAP-L1x DDR2/mDDR Memory Controller User's Guide).
 
  This is implemented as part of suspend-to-RAM support. Have a look at
  arch/arm/mach-davinci/pm.c file.

 I see. So is the DDR self-refresh only feasible as a suspend-to-RAM
 option? i.e. Is it too slow to enter/exit to use in a running state?

Putting DDR in self-refresh is feasible from running system. Gating DDR
clock though needs co-operation of peripherals. This is done by invoking
suspend/resume routines of drivers (suspend-to-RAM).


 I have successfully put the board to sleep using:
 echo mem /sys/power/state

 But how do you resume from this suspended state? Do all peripherals have
 support for resuming from suspend right now?

You need RTC alarm to wake up. You can use rtcwake command do this.

Example invocation:

rtcwake -s 30 -d /dev/rtc0 -m mem

This command is present in arago filesystem we use for testing. You can
grab the latest version from here: http://arago-project.org/files/releases/

Drivers like MMC/SD, LCD etc already support suspend/resume in Kevin's tree.
We are working towards a release which will support suspend/resume for all
OMAP-L138 drivers (except SATA). The master branch of the tree
http://arago-project.org/git/people/?p=sekhar/linux-omapl1.git;a=summary
hosts the work in progress. It contains patches which have not been submitted,
but provides additional functionality. We will submit the patches back to the
subsystem lists in coming weeks.

Thanks,
Sekhar


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RE: OMAP-L13x DDR Self-refresh bug

2010-02-09 Thread Nori, Sekhar 
Hi James,

On Tue, Feb 09, 2010 at 21:51:01, James Nuss wrote:
 Hi,

 I have discovered a bug in the cpuidle code for the OMAP-L13x (da8xx)
 platform.

 In the state described as WFI and DDR Self-Refresh, the code is
 actually putting the DDR into the Power Down mode which is not the
 same as self-refresh.

 So the description string should read WFI and DDR Power Down.

Yes, going into power down on OMAP-L138 was intentional (it is
supposed to save more power than self-refresh). I agree the state
description could have been conditional on pdata-ddr2_pdown value.


 Putting the DDR into self-refresh and subsequently gating the clocks for
   greater power savings, requires significantly  more work (Refer to
 Section 2.16 OMAP-L1x DDR2/mDDR Memory Controller User's Guide).

This is implemented as part of suspend-to-RAM support. Have a look at
arch/arm/mach-davinci/pm.c file.

Thanks,
Sekhar

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