Re: [PATCH v2 4/6] ARM: davinci: da850: add DT node for eth0.
Sekhar,
On Mon, Feb 4, 2013 at 11:20 PM, Sekhar Nori nsek...@ti.com wrote:
On 2/4/2013 10:37 AM, Prabhakar Lad wrote:
Sekhar ,
On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori nsek...@ti.com wrote:
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
From: Lad, Prabhakar prabhakar@ti.com
Add eth0 device tree node information and pinmux for mii to da850 by
providing interrupt details and local mac address of eth0.
Signed-off-by: Lad, Prabhakar prabhakar@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ker...@vger.kernel.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: net...@vger.kernel.org
Cc: devicetree-disc...@lists.ozlabs.org
Cc: Sekhar Nori nsek...@ti.com
Cc: Heiko Schocher h...@denx.de
---
arch/arm/boot/dts/da850-evm.dts |5 +
arch/arm/boot/dts/da850.dtsi| 35 +++
2 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/da850-evm.dts
b/arch/arm/boot/dts/da850-evm.dts
index a319491..19aa2b3 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -30,6 +30,11 @@
mdio: davinci_mdio@1e24000 {
status = okay;
};
+ eth0: emac@1e2 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = mii_pins;
+ };
};
nand_cs3@6200 {
status = okay;
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ba28f2d..76905f3 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -56,6 +56,26 @@
0x30 0x0110 0x0ff0
;
};
+ mii_pins: pinmux_mii_pins {
+ pinctrl-single,bits =
+ /*
+ * MII_TXEN, MII_TXCLK, MII_COL
+ * MII_TXD_3, MII_TXD_2, MII_TXD_1
+ * MII_TXD_0
+ */
+ 0x8 0x8880 0xfff0
+ /*
+ * MII_RXER, MII_CRS, MII_RXCLK
+ * MII_RXDV, MII_RXD_3, MII_RXD_2
+ * MII_RXD_1, MII_RXD_0
+ */
+ 0xc 0x 0x
+ /* MDIO_CLK, MDIO_D */
You call this mii_pins, but include mdio pins in there as well. Can you
separate them out? Then some board which uses rmii can simply reuse the
entry.
Ok makes sense.
+ 0x10 0x0088 0x00ff
+ /* GPIO2_6 */
+ 0x18 0x0080 0x00f0
This is SoC specific pin list. Such board specific pins should not make
it here.
Ok, so this should be set up using GPIO API's ?
Yes, the pins ultimately will be controlled by gpiolib APIs, but the
pins should be defined under the eth node in .dts
You mean '0x18 0x0080 0x00f0' still needs to defined in eth0 node ?
Can you elaborate and give some pointers.
Regards,
--Prabhakar
Thanks,
Sekhar
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Re: [PATCH v2 4/6] ARM: davinci: da850: add DT node for eth0.
On 3/8/2013 3:15 PM, Prabhakar Lad wrote:
Sekhar,
On Mon, Feb 4, 2013 at 11:20 PM, Sekhar Nori nsek...@ti.com wrote:
On 2/4/2013 10:37 AM, Prabhakar Lad wrote:
Sekhar ,
On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori nsek...@ti.com wrote:
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
From: Lad, Prabhakar prabhakar@ti.com
Add eth0 device tree node information and pinmux for mii to da850 by
providing interrupt details and local mac address of eth0.
Signed-off-by: Lad, Prabhakar prabhakar@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ker...@vger.kernel.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: net...@vger.kernel.org
Cc: devicetree-disc...@lists.ozlabs.org
Cc: Sekhar Nori nsek...@ti.com
Cc: Heiko Schocher h...@denx.de
---
arch/arm/boot/dts/da850-evm.dts |5 +
arch/arm/boot/dts/da850.dtsi| 35
+++
2 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/da850-evm.dts
b/arch/arm/boot/dts/da850-evm.dts
index a319491..19aa2b3 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -30,6 +30,11 @@
mdio: davinci_mdio@1e24000 {
status = okay;
};
+ eth0: emac@1e2 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = mii_pins;
+ };
};
nand_cs3@6200 {
status = okay;
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ba28f2d..76905f3 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -56,6 +56,26 @@
0x30 0x0110 0x0ff0
;
};
+ mii_pins: pinmux_mii_pins {
+ pinctrl-single,bits =
+ /*
+ * MII_TXEN, MII_TXCLK, MII_COL
+ * MII_TXD_3, MII_TXD_2, MII_TXD_1
+ * MII_TXD_0
+ */
+ 0x8 0x8880 0xfff0
+ /*
+ * MII_RXER, MII_CRS, MII_RXCLK
+ * MII_RXDV, MII_RXD_3, MII_RXD_2
+ * MII_RXD_1, MII_RXD_0
+ */
+ 0xc 0x 0x
+ /* MDIO_CLK, MDIO_D */
You call this mii_pins, but include mdio pins in there as well. Can you
separate them out? Then some board which uses rmii can simply reuse the
entry.
Ok makes sense.
+ 0x10 0x0088 0x00ff
+ /* GPIO2_6 */
+ 0x18 0x0080 0x00f0
This is SoC specific pin list. Such board specific pins should not make
it here.
Ok, so this should be set up using GPIO API's ?
Yes, the pins ultimately will be controlled by gpiolib APIs, but the
pins should be defined under the eth node in .dts
You mean '0x18 0x0080 0x00f0' still needs to defined in eth0 node ?
Can you elaborate and give some pointers.
Since the GPIO usage for ethernet is board specific, it cannot be in
.dtsi which is SoC generic. I am suggesting do in the .dts file which is
board specific.
Thanks,
Sekhar
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Re: [PATCH v2 4/6] ARM: davinci: da850: add DT node for eth0.
On 2/4/2013 10:37 AM, Prabhakar Lad wrote:
Sekhar ,
On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori nsek...@ti.com wrote:
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
From: Lad, Prabhakar prabhakar@ti.com
Add eth0 device tree node information and pinmux for mii to da850 by
providing interrupt details and local mac address of eth0.
Signed-off-by: Lad, Prabhakar prabhakar@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ker...@vger.kernel.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: net...@vger.kernel.org
Cc: devicetree-disc...@lists.ozlabs.org
Cc: Sekhar Nori nsek...@ti.com
Cc: Heiko Schocher h...@denx.de
---
arch/arm/boot/dts/da850-evm.dts |5 +
arch/arm/boot/dts/da850.dtsi| 35 +++
2 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/da850-evm.dts
b/arch/arm/boot/dts/da850-evm.dts
index a319491..19aa2b3 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -30,6 +30,11 @@
mdio: davinci_mdio@1e24000 {
status = okay;
};
+ eth0: emac@1e2 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = mii_pins;
+ };
};
nand_cs3@6200 {
status = okay;
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ba28f2d..76905f3 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -56,6 +56,26 @@
0x30 0x0110 0x0ff0
;
};
+ mii_pins: pinmux_mii_pins {
+ pinctrl-single,bits =
+ /*
+ * MII_TXEN, MII_TXCLK, MII_COL
+ * MII_TXD_3, MII_TXD_2, MII_TXD_1
+ * MII_TXD_0
+ */
+ 0x8 0x8880 0xfff0
+ /*
+ * MII_RXER, MII_CRS, MII_RXCLK
+ * MII_RXDV, MII_RXD_3, MII_RXD_2
+ * MII_RXD_1, MII_RXD_0
+ */
+ 0xc 0x 0x
+ /* MDIO_CLK, MDIO_D */
You call this mii_pins, but include mdio pins in there as well. Can you
separate them out? Then some board which uses rmii can simply reuse the
entry.
Ok makes sense.
+ 0x10 0x0088 0x00ff
+ /* GPIO2_6 */
+ 0x18 0x0080 0x00f0
This is SoC specific pin list. Such board specific pins should not make
it here.
Ok, so this should be set up using GPIO API's ?
Yes, the pins ultimately will be controlled by gpiolib APIs, but the
pins should be defined under the eth node in .dts
Thanks,
Sekhar
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Re: [PATCH v2 4/6] ARM: davinci: da850: add DT node for eth0.
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
From: Lad, Prabhakar prabhakar@ti.com
Add eth0 device tree node information and pinmux for mii to da850 by
providing interrupt details and local mac address of eth0.
Signed-off-by: Lad, Prabhakar prabhakar@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ker...@vger.kernel.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: net...@vger.kernel.org
Cc: devicetree-disc...@lists.ozlabs.org
Cc: Sekhar Nori nsek...@ti.com
Cc: Heiko Schocher h...@denx.de
---
arch/arm/boot/dts/da850-evm.dts |5 +
arch/arm/boot/dts/da850.dtsi| 35 +++
2 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/da850-evm.dts b/arch/arm/boot/dts/da850-evm.dts
index a319491..19aa2b3 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -30,6 +30,11 @@
mdio: davinci_mdio@1e24000 {
status = okay;
};
+ eth0: emac@1e2 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = mii_pins;
+ };
};
nand_cs3@6200 {
status = okay;
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ba28f2d..76905f3 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -56,6 +56,26 @@
0x30 0x0110 0x0ff0
;
};
+ mii_pins: pinmux_mii_pins {
+ pinctrl-single,bits =
+ /*
+ * MII_TXEN, MII_TXCLK, MII_COL
+ * MII_TXD_3, MII_TXD_2, MII_TXD_1
+ * MII_TXD_0
+ */
+ 0x8 0x8880 0xfff0
+ /*
+ * MII_RXER, MII_CRS, MII_RXCLK
+ * MII_RXDV, MII_RXD_3, MII_RXD_2
+ * MII_RXD_1, MII_RXD_0
+ */
+ 0xc 0x 0x
+ /* MDIO_CLK, MDIO_D */
You call this mii_pins, but include mdio pins in there as well. Can you
separate them out? Then some board which uses rmii can simply reuse the
entry.
+ 0x10 0x0088 0x00ff
+ /* GPIO2_6 */
+ 0x18 0x0080 0x00f0
This is SoC specific pin list. Such board specific pins should not make
it here.
+ ;
+ };
};
serial0: serial@1c42000 {
compatible = ns16550a;
@@ -88,6 +108,21 @@
reg = 0x224000 0x1000;
bus_freq = 220;
};
+ eth0: emac@1e2 {
+ compatible = ti,davinci-dm6467-emac;
+ reg = 0x22 0x4000;
+ ti,davinci-ctrl-reg-offset = 0x3000;
+ ti,davinci-ctrl-mod-reg-offset = 0x2000;
+ ti,davinci-ctrl-ram-offset = 0;
+ ti,davinci-ctrl-ram-size = 0x2000;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = 33
+ 34
+ 35
+ 36
+ ;
+ phy-handle = mdio;
I doubt this is required. This property is to pass a handle to the phy,
not mdio bus.
Thanks,
Sekhar
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Re: [PATCH v2 4/6] ARM: davinci: da850: add DT node for eth0.
Sekhar ,
On Sun, Feb 3, 2013 at 5:33 PM, Sekhar Nori nsek...@ti.com wrote:
On 1/28/2013 7:17 PM, Prabhakar Lad wrote:
From: Lad, Prabhakar prabhakar@ti.com
Add eth0 device tree node information and pinmux for mii to da850 by
providing interrupt details and local mac address of eth0.
Signed-off-by: Lad, Prabhakar prabhakar@ti.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-ker...@vger.kernel.org
Cc: davinci-linux-open-source@linux.davincidsp.com
Cc: net...@vger.kernel.org
Cc: devicetree-disc...@lists.ozlabs.org
Cc: Sekhar Nori nsek...@ti.com
Cc: Heiko Schocher h...@denx.de
---
arch/arm/boot/dts/da850-evm.dts |5 +
arch/arm/boot/dts/da850.dtsi| 35 +++
2 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/da850-evm.dts
b/arch/arm/boot/dts/da850-evm.dts
index a319491..19aa2b3 100644
--- a/arch/arm/boot/dts/da850-evm.dts
+++ b/arch/arm/boot/dts/da850-evm.dts
@@ -30,6 +30,11 @@
mdio: davinci_mdio@1e24000 {
status = okay;
};
+ eth0: emac@1e2 {
+ status = okay;
+ pinctrl-names = default;
+ pinctrl-0 = mii_pins;
+ };
};
nand_cs3@6200 {
status = okay;
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dtsi
index ba28f2d..76905f3 100644
--- a/arch/arm/boot/dts/da850.dtsi
+++ b/arch/arm/boot/dts/da850.dtsi
@@ -56,6 +56,26 @@
0x30 0x0110 0x0ff0
;
};
+ mii_pins: pinmux_mii_pins {
+ pinctrl-single,bits =
+ /*
+ * MII_TXEN, MII_TXCLK, MII_COL
+ * MII_TXD_3, MII_TXD_2, MII_TXD_1
+ * MII_TXD_0
+ */
+ 0x8 0x8880 0xfff0
+ /*
+ * MII_RXER, MII_CRS, MII_RXCLK
+ * MII_RXDV, MII_RXD_3, MII_RXD_2
+ * MII_RXD_1, MII_RXD_0
+ */
+ 0xc 0x 0x
+ /* MDIO_CLK, MDIO_D */
You call this mii_pins, but include mdio pins in there as well. Can you
separate them out? Then some board which uses rmii can simply reuse the
entry.
Ok makes sense.
+ 0x10 0x0088 0x00ff
+ /* GPIO2_6 */
+ 0x18 0x0080 0x00f0
This is SoC specific pin list. Such board specific pins should not make
it here.
Ok, so this should be set up using GPIO API's ?
+ ;
+ };
};
serial0: serial@1c42000 {
compatible = ns16550a;
@@ -88,6 +108,21 @@
reg = 0x224000 0x1000;
bus_freq = 220;
};
+ eth0: emac@1e2 {
+ compatible = ti,davinci-dm6467-emac;
+ reg = 0x22 0x4000;
+ ti,davinci-ctrl-reg-offset = 0x3000;
+ ti,davinci-ctrl-mod-reg-offset = 0x2000;
+ ti,davinci-ctrl-ram-offset = 0;
+ ti,davinci-ctrl-ram-size = 0x2000;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = 33
+ 34
+ 35
+ 36
+ ;
+ phy-handle = mdio;
I doubt this is required. This property is to pass a handle to the phy,
not mdio bus.
Ok I'll check on this.
Regards,
--Prabhakar
Thanks,
Sekhar
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