Attached new debdiff and diffstat files (v2) with the following fixes:
* target jessie
Full diffstat:
changelog | 13
debian/changelog | 58
microcode-20161104.dat |61630
microcode-20170511.dat |61886 +
releasenote| 41
5 files changed, 61998 insertions(+), 61630 deletions(-)
Abridged diffstat:
changelog| 13
debian/changelog | 58 +++
releasenote | 41 ++
3 files changed, 112 insertions(+)
Thank you!
--
Henrique Holschuh
diff -Nru intel-microcode-3.20161104.1~deb8u1/changelog
intel-microcode-3.20170511.1~deb8u1/changelog
--- intel-microcode-3.20161104.1~deb8u1/changelog 2016-12-16
08:53:58.0 -0200
+++ intel-microcode-3.20170511.1~deb8u1/changelog 2017-05-29
19:28:58.0 -0300
@@ -1,3 +1,16 @@
+2017-05-11:
+ * Updated Microcodes:
+sig 0x000306c3, pf_mask 0x32, 2017-01-27, rev 0x0022, size 22528
+sig 0x000306d4, pf_mask 0xc0, 2017-01-27, rev 0x0025, size 17408
+sig 0x000306f2, pf_mask 0x6f, 2017-01-30, rev 0x003a, size 32768
+sig 0x000306f4, pf_mask 0x80, 2017-01-30, rev 0x000f, size 16384
+sig 0x00040651, pf_mask 0x72, 2017-01-27, rev 0x0020, size 20480
+sig 0x00040661, pf_mask 0x32, 2017-01-27, rev 0x0017, size 24576
+sig 0x00040671, pf_mask 0x22, 2017-01-27, rev 0x0017, size 11264
+sig 0x000406e3, pf_mask 0xc0, 2017-04-09, rev 0x00ba, size 98304
+sig 0x000406f1, pf_mask 0xef, 2017-03-01, rev 0xb21, size 26624
+sig 0x000506e3, pf_mask 0x36, 2017-04-09, rev 0x00ba, size 98304
+
2016-11-04:
* New Microcodes:
sig 0x00050663, pf_mask 0x10, 2016-10-12, rev 0x70d, size 20480
diff -Nru intel-microcode-3.20161104.1~deb8u1/debian/changelog
intel-microcode-3.20170511.1~deb8u1/debian/changelog
--- intel-microcode-3.20161104.1~deb8u1/debian/changelog2016-12-16
09:42:12.0 -0200
+++ intel-microcode-3.20170511.1~deb8u1/debian/changelog2017-06-20
14:13:40.0 -0300
@@ -1,3 +1,61 @@
+intel-microcode (3.20170511.1~deb8u1) jessie; urgency=high
+
+ * This is the same package as 3.20170511.1 from unstable/testing and
+3.20170511.1~bpo8+1, from jessie-backports. It has been present in
+unstable since 2017-05-15, testing since 2017-05-26, and jessie-backports
+since 2017-05-29.
+ * Urgency updated to high:
++ Confirmed fix: nightmare-level Skylake erratum SKL150
++ Confirmed: gcc may generate the code patterns that trigger SKL150
+ (unpredictable behavior). The OCaml community was hit by this erratum
+ and has been investigating the issue since 2017-01. It affected the
+ OCaml compiler, and OCaml programs when gcc was used as the backend.
+ https://caml.inria.fr/mantis/view.php?id=7452
+
+ -- Henrique de Moraes Holschuh Tue, 20 Jun 2017 14:13:38
-0300
+
+intel-microcode (3.20170511.1) unstable; urgency=medium
+
+ * New upstream microcode datafile 20170511
++ Updated Microcodes:
+ sig 0x000306c3, pf_mask 0x32, 2017-01-27, rev 0x0022, size 22528
+ sig 0x000306d4, pf_mask 0xc0, 2017-01-27, rev 0x0025, size 17408
+ sig 0x000306f2, pf_mask 0x6f, 2017-01-30, rev 0x003a, size 32768
+ sig 0x000306f4, pf_mask 0x80, 2017-01-30, rev 0x000f, size 16384
+ sig 0x00040651, pf_mask 0x72, 2017-01-27, rev 0x0020, size 20480
+ sig 0x00040661, pf_mask 0x32, 2017-01-27, rev 0x0017, size 24576
+ sig 0x00040671, pf_mask 0x22, 2017-01-27, rev 0x0017, size 11264
+ sig 0x000406e3, pf_mask 0xc0, 2017-04-09, rev 0x00ba, size 98304
+ sig 0x000406f1, pf_mask 0xef, 2017-03-01, rev 0xb21, size 26624
+ sig 0x000506e3, pf_mask 0x36, 2017-04-09, rev 0x00ba, size 98304
++ This release fixes undisclosed errata on the desktop, mobile and
+ server processor models from the Haswell, Broadwell, and Skylake
+ families, including even the high-end multi-socket server Xeons
++ Likely fix the TSC-Deadline LAPIC errata (BDF89, SKL142 and
+ similar) on several processor families
++ Fix erratum BDF90 on Xeon E7v4, E5v4(?) (closes: #862606)
++ Likely fix serious or critical Skylake errata: SKL138/144,
+ SKL137/145, SLK149
+* Likely fix nightmare-level Skylake erratum SKL150. Fortunately,
+ either this erratum is very-low-hitting, or gcc/clang/icc/msvc
+ won't usually issue the affected opcode pattern and it ends up
+ being rare.
+ SKL150 - Short loops using both the AH/BH/CH/DH registers and
+ the corresponding wide register *may* result in unpredictable
+ system behavior. Requires both logical processors of the same
+ core (i.e. sibling hyperthreads) to be active to trigger, as
+ well as a "complex set of micro-architectural conditions"
+ * source: remove unneeded intel-ucode/ directory
+