Re: Ross boot prom chip wanted

2005-10-26 Thread Hamish Greig
On Wed, 19 Oct 2005 15:39, Hamish Greig wrote:
 I have five ss20 arriving this week sometime, i'll look and let you know.
 Don't get your hopes up, they are a lot I bought with unknown specs.

 Hamish Greig

None have ross proms. I know you sorted most problems out, just letting you 
know incase you still wanted the ross prom.

Hamish Greig


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Re: Ross boot prom chip wanted

2005-10-22 Thread Jurij Smakov

On Fri, 21 Oct 2005, Martin Habets wrote:


FYI, the firmware is available at
http://public.planetmirror.com/pub/sun-bootroms/


Thanks for the pointer.


Jurij, nNot sure if I could resurect my cobbled-up programmer and burn one
for you. What country are you in? I think there is a guy in Australia
doing this kind of stuff on a regular basis. I'm in UK myself.


I have found http://mbus.sunhelp.org/ which states that all the HyperSparc 
processors up to 150MHz should work with prom version 2.25 *or* 2.25r, and 
I have 2.25 installed. So the problems I'm seeing are not related to the 
prom versions. And I was finally able to resolve most of them, even though 
it was a pretty bumpy ride.


First of all, any attempt to install using 2.4 kernel from Sarge would 
result in Watchdog Reset and system dropping back to prom during the 
second stage boot. The 2.6.8 kernel from Sarge flatly refused to detect 
the hard drives. Whenever it came to partitioning, it would say No 
partitionable media found, or the installer would hang on Scanning 
disks, depending on how lucky one is. Logs were full of messages like


esp0: SCSI bus reset interrupt
scsi: Device offlined - not ready after error recovery: host 0 channel 0 id 3 
lun 6
scsi0 (3:6): rejecting I/O to offline device
sdg: Unit Not Ready, error = 0x402
scsi0 (3:6): rejecting I/O to offline device
scsi0 (3:6): rejecting I/O to offline device
scsi0 (3:6): rejecting I/O to offline device
sdg : READ CAPACITY failed.
sdg : status=1, message=00, host=0, driver=04
sdg : sense not available.
scsi0 (3:6): rejecting I/O to offline device
sdg: asking for cache data failed
sdg: assuming drive cache: write through
Attached scsi disk sdg at scsi0, channel 0, id 3, lun 6
esp0: target 3 [period 100ns offset 15 10.00MHz FAST SCSI-II]
esp0: Resetting scsi bus
esp0: SCSI bus reset interrupt
esp0: SCSI bus reset interrupt
scsi: Device offlined - not ready after error recovery: host 0 channel 0 id 3 
lun 7
scsi0 (3:7): rejecting I/O to offline device
scsi0 (3:7): rejecting I/O to offline device
sdh: Unit Not Ready, error = 0x402
scsi0 (3:7): rejecting I/O to offline device
scsi0 (3:7): rejecting I/O to offline device
scsi0 (3:7): rejecting I/O to offline device
sdh : READ CAPACITY failed.

This is strange, because the disks were detected fine with 2.4.27. 
Finally, I've installed 2.6.10 kernel, which was the last of the kernels I 
remember working reliably on sparc32. And it did not have such problems! 
So the machine is up and running now and I just need to try and build 
latest kernels and see how they perform there.


Thanks for all the help,

Jurij Smakov[EMAIL PROTECTED]
Key: http://www.wooyd.org/pgpkey/   KeyID: C99E03CC


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Re: Ross boot prom chip wanted

2005-10-21 Thread Martin Habets
On Thu, Oct 20, 2005 at 09:25:58PM +0200, Hartwig Atrops wrote:
 I have access to an EPROM programmer, I can read out the chip if that's the 
 firmware you need. But you would have to burn it yourself.

FYI, the firmware is available at
 http://public.planetmirror.com/pub/sun-bootroms/

Jurij, nNot sure if I could resurect my cobbled-up programmer and burn one
for you. What country are you in? I think there is a guy in Australia
doing this kind of stuff on a regular basis. I'm in UK myself.

-- 
Martin


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Re: Ross boot prom chip wanted

2005-10-20 Thread Hartwig Atrops
Hello.

On Wednesday 19 October 2005 07:32, Jurij Smakov wrote:
 Hello,

 I've recently got a Sparcstation 20 (thanks to Blars) which I plan to use
 in an attempt to resurrect the sparc32 support. 

Like to hear that!

 It has multiple Ross
 Hypersparc CPUs, however the boot prom chip is Sun-made. I believe that
 this is the reason why I see various random problems, like watchdog reset
 interrupt and unstable SCSI subsystem performance. AFAIK, there is
 special Ross-branded boot prom, which should be used with these CPUs.

Never heard about special Ross proms, but this might explain some problems 
with my Ross 120 dual machine (showing up after inserting the 2nd CPU).

To find out if my problems are Linux or hardware based I bought a Ross dual 
150 equipped Sparcstation 20 at eBay. It arrived two days ago.

I just checked the ROM version: 2.25

What would the special Ross prom report? 2.25 or 2.25r?

My new SS20 seems to be one of the late ones - full size CDROM slot. But that 
is no guarantee that nobody did update the EPPROM with wrong firmware.

I have access to an EPROM programmer, I can read out the chip if that's the 
firmware you need. But you would have to burn it yourself.

Regards,

   Hartwig


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Re: Ross boot prom chip wanted

2005-10-20 Thread Jurij Smakov

On Thu, 20 Oct 2005, Hartwig Atrops wrote:


Never heard about special Ross proms, but this might explain some problems
with my Ross 120 dual machine (showing up after inserting the 2nd CPU).

To find out if my problems are Linux or hardware based I bought a Ross dual
150 equipped Sparcstation 20 at eBay. It arrived two days ago.

I just checked the ROM version: 2.25

What would the special Ross prom report? 2.25 or 2.25r?


I believe that 2.25 is the last prom released by Sun, at least according 
to [0]. The only note there is adds 150MHz HyperSparc support, so I have 
no idea whether it should work in your situation. 2.25r is the 
Ross-specific version, probably required for higher frequency CPUs.


[0] http://sunsolve.sun.com/handbook_pub/Systems/SS10/PROM_BootPROM_Sun4m.html

Best regards,

Jurij Smakov[EMAIL PROTECTED]
Key: http://www.wooyd.org/pgpkey/   KeyID: C99E03CC


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Ross boot prom chip wanted

2005-10-18 Thread Jurij Smakov

Hello,

I've recently got a Sparcstation 20 (thanks to Blars) which I plan to use 
in an attempt to resurrect the sparc32 support. It has multiple Ross 
Hypersparc CPUs, however the boot prom chip is Sun-made. I believe that 
this is the reason why I see various random problems, like watchdog reset 
interrupt and unstable SCSI subsystem performance. AFAIK, there is 
special Ross-branded boot prom, which should be used with these CPUs. They 
were available on Ebay some time ago, but I cannot find them any more (or 
they are bundled with CPUs which I don't need). If someone has such an 
unneeded chip lying around (preferrably version 2.25r which is the 
latest), I would gladly pay for shipping it my way.


Thanks and best regards,

Jurij Smakov[EMAIL PROTECTED]
Key: http://www.wooyd.org/pgpkey/   KeyID: C99E03CC


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Re: Ross boot prom chip wanted

2005-10-18 Thread Hamish Greig
On Wed, 19 Oct 2005 15:32, Jurij Smakov wrote:
 Hello,

 I've recently got a Sparcstation 20 (thanks to Blars) which I plan to use
 in an attempt to resurrect the sparc32 support. It has multiple Ross
 Hypersparc CPUs, however the boot prom chip is Sun-made. I believe that
 this is the reason why I see various random problems, like watchdog reset
 interrupt and unstable SCSI subsystem performance. AFAIK, there is
 special Ross-branded boot prom, which should be used with these CPUs. They
 were available on Ebay some time ago, but I cannot find them any more (or
 they are bundled with CPUs which I don't need). If someone has such an
 unneeded chip lying around (preferrably version 2.25r which is the
 latest), I would gladly pay for shipping it my way.

 Thanks and best regards,

 Jurij Smakov[EMAIL PROTECTED]
 Key: http://www.wooyd.org/pgpkey/   KeyID: C99E03CC

I have five ss20 arriving this week sometime, i'll look and let you know. 
Don't get your hopes up, they are a lot I bought with unknown specs.

Hamish Greig


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