[dpdk-dev] [PATCH v4 00/16] Vector Rx/Tx PMD implementation for fm10k
> > Chen Jing D(Mark) (16): > > fm10k: add new vPMD file > > fm10k: add vPMD pre-condition check for each RX queue > > fm10k: Add a new func to initialize all parameters > > fm10k: add func to re-allocate mbuf for RX ring > > fm10k: add 2 functions to parse pkt_type and offload flag > > fm10k: add Vector RX function > > fm10k: add func to do Vector RX condition check > > fm10k: add Vector RX scatter function > > fm10k: add function to decide best RX function > > fm10k: add func to release mbuf in case Vector RX applied > > fm10k: add Vector TX function > > fm10k: use func pointer to reset TX queue and mbuf release > > fm10k: introduce 2 funcs to reset TX queue and mbuf release > > fm10k: Add function to decide best TX func > > fm10k: fix a crash issue in vector RX func > > doc: release notes update for fm10k Vector PMD > > Acked-by: Cunming Liang Sorry, there are some checkpatch warnings and a compilation error: SPACING: No space is necessary after a cast SPACING: spaces preferred around that '+' LINE_CONTINUATIONS: Avoid unnecessary line continuations And more important, with clang: fm10k_rxtx_vec.c:69:1: error: unused function 'fm10k_rxq_rearm'
[dpdk-dev] Release of Packet Journey
Hi Nikita,
First of all thank you for published your project.
Please apply this patch below
diff --git a/app/acl.h b/app/acl.h
index fb2f73a..74a1dd5 100644
--- a/app/acl.h
+++ b/app/acl.h
@@ -72,4 +72,21 @@ extern struct acl_parm acl_parm_config;
extern struct rte_acl_ctx *ipv4_acx[NB_SOCKETS];
extern struct rte_acl_ctx *ipv6_acx[NB_SOCKETS];
+/*
+ * That effectively defines order of IPV4VLAN classifications:
+ * - PROTO
+ * - VLAN (TAG and DOMAIN)
+ * - SRC IP ADDRESS
+ * - DST IP ADDRESS
+ * - PORTS (SRC and DST)
+ */
+enum {
+RTE_ACL_IPV4VLAN_PROTO,
+RTE_ACL_IPV4VLAN_VLAN,
+RTE_ACL_IPV4VLAN_SRC,
+RTE_ACL_IPV4VLAN_DST,
+RTE_ACL_IPV4VLAN_PORTS,
+RTE_ACL_IPV4VLAN_NUM
+};
+
#endif
without it your project is not compiled.
Further your app breaks with segment fault. I run it as follows
root at war202:~/PKTJ/packet-journey#
./build/app/x86_64-native-linuxapp-gcc/app/pktj -l 0,1,2,3 -n 4
--socket-mem=4096 --log-level=4 -- --configfile
/home/medved/PKTJ/packet-journey/tests/integration/lab00/pktj.conf
PKTJ_ACL: IPv6 ACL entries 0:
PKTJ_ACL: IPv4 ACL entries 1:
PKTJ_ACL: 1:PKTJ_ACL: 0.0.0.0/0 PKTJ_ACL: 1.2.6.0/24 PKTJ_ACL: 0 :
65535 0 : 65535 0x0/0x0 PKTJ_ACL: 0x-0x0-0xf000 PKTJ_ACL:
acl context @0x7fd3bf41aa80
socket_id=0
alg=3
max_rules=10
rule_size=96
num_rules=1
num_categories=1
num_tries=1
ACL: allocation of 9600904 bytes on socket 1 for ACL_pktj-acl-ipv41-0 failed
PKTJ_ACL: Failed to create ACL context
PKTJ_ACL: setup_acl failed for ipv4 with socketid 1, keeping previous rules
for that socket
ACL: allocation of 9600904 bytes on socket 2 for ACL_pktj-acl-ipv42-0 failed
PKTJ_ACL: Failed to create ACL context
PKTJ_ACL: setup_acl failed for ipv4 with socketid 2, keeping previous rules
for that socket
ACL: allocation of 9600904 bytes on socket 3 for ACL_pktj-acl-ipv43-0 failed
PKTJ_ACL: Failed to create ACL context
PKTJ_ACL: setup_acl failed for ipv4 with socketid 3, keeping previous rules
for that socket
Address:90:E2:BA:39:2A:D8
port=0 tx_queueid=3 nb_txd=512 kni
launching control thread for socketid 0 on lcore 0
CMDLINE1: symlink() failed
Segmentation fault
Regards,
Vladimir
2015-10-29 22:53 GMT+03:00 Nikita Kozlov :
> Hello,
>
> We have opensourced our dpdk-based project, Packet Journey
> https://github.com/Gandi/packet-journey .
>
> Packet Journey is a combinationof Linux RT_NETLINK and severalparts
> ofDPDK (rte_kni, rte_lpm, rte_acl, rte_cmdline) and is intended to
> serveas an edge router.
>
> Our use case is:
> - pktj starts several forwarding threads and a KNI thread per external port
> - pktj launches a script which configures the KNI interface (MAC, IP,
> VLAN) and launches a BGP daemon
> - the host receives routes from the BGP daemon
> - the BGP daemon injects the routes in Linux
> - pktj receives the routes from NETLINK and put them in LPM in our
> "control" threads
> - pktj forwards packets to the KNI if the packets are
> - for the KNI IP or
> - if the neighbor is not known yet
> - if ttl reaches 0
> - pktj filters packets if they match an ACLor if they exceed the rate
> limit, kni output is also rate-limited
> - pktj forwards packetsdirectly from the RXqueue to the TXqueue if the
> neighbor is known
>
> --
> Nikita
>
[dpdk-dev] [PATCH 0/5] ARMv8 additions to ARMv7 support
I've failed to compile kni/igb for ARMv8. Any ideas? Is it Linux 4.2 compatbile? CC [M] /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.o /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c: In functi on ?igb_ndo_bridge_getlink?: /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c:2279:9: er ror: too few arguments to function ?ndo_dflt_bridge_getlink? return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags); ^ In file included from /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/net/dst.h:13:0, from /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/net/sock.h:67, from /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/linux/tcp.h:22, from /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c:34: /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/linux/rtnetlink.h:115:12: note: declared here extern int ndo_dflt_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, ^ /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c:2286:1: error: control reaches end of non-void function [-Werror=return-type] } ^ cc1: all warnings being treated as errors /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/scripts/Makefile.build:258: recipe for target '/home/jviki/Projects/bu ildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.o' failed Regards Jan On Thu, 29 Oct 2015 17:29:49 + David Hunt wrote: > Hi DPDK Community. > > This is an updated patchset for ARMv8 that now sits on top of the previously > submitted ARMv7 code by RehiveTech. It re-uses a lot of that code, and splits > some header files into 32-bit and 64-bit versions, so uses the same arm > include > directory. > > Tested on an XGene 64-bit arm server board, with PCI slots. Passes traffic > between > two physical ports on an Intel 82599 dual-port 10Gig NIC. Should work with > many > other NICS, but these are as yet untested. > > Compiles igb_uio, kni and all the physical device PMDs. > > ACL and LPM are disabled due to compilation issues. > > Note added to the Release notes. > > > David Hunt (5): > eal/arm: split arm rte_memcpy.h into 32 and 64 bit versions. > eal/arm: split arm rte_prefetch.h into 32 and 64 bit versions > eal/arm: fix 64-bit compilation for armv8 > mk: Add makefile support for armv8 architecture > test: add test for cpu flags on armv8 > > MAINTAINERS| 3 +- > app/test/test_cpuflags.c | 13 +- > config/defconfig_arm64-armv8a-linuxapp-gcc | 56 > doc/guides/rel_notes/release_2_2.rst | 7 +- > .../common/include/arch/arm/rte_cpuflags.h | 9 + > .../common/include/arch/arm/rte_memcpy.h | 302 +-- > .../common/include/arch/arm/rte_memcpy_32.h| 334 > + > .../common/include/arch/arm/rte_memcpy_64.h| 322 > .../common/include/arch/arm/rte_prefetch.h | 31 +- > .../common/include/arch/arm/rte_prefetch_32.h | 61 > .../common/include/arch/arm/rte_prefetch_64.h | 61 > mk/arch/arm64/rte.vars.mk | 58 > mk/machine/armv8a/rte.vars.mk | 57 > 13 files changed, 986 insertions(+), 328 deletions(-) > create mode 100644 config/defconfig_arm64-armv8a-linuxapp-gcc > create mode 100644 lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h > create mode 100644 lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h > create mode 100644 lib/librte_eal/common/include/arch/arm/rte_prefetch_32.h > create mode 100644 lib/librte_eal/common/include/arch/arm/rte_prefetch_64.h > create mode 100644 mk/arch/arm64/rte.vars.mk > create mode 100644 mk/machine/armv8a/rte.vars.mk > -- Jan ViktorinE-mail: Viktorin at RehiveTech.com System ArchitectWeb:www.RehiveTech.com RehiveTech Brno, Czech Republic
[dpdk-dev] [PATCH v5 00/15] Support ARMv7 architecture
Hello, as Thomas M. suggested, I've made few changes to the ARMv7 code to make the ARMv8 inclusion easier. I can just say that it compiles, however, as there are no functional changes I would expect it is OK. Regards Jan --- You can pull the changes from https://github.com/RehiveTech/dpdk.git arm-support-v5 since commit 82fb702077f67585d64a07de0080e5cb6a924a72: ixgbe: support new flow director modes for X550 (2015-10-29 00:06:01 +0100) up to 285d29f6226d53c8af8035ebaf4c9edf635e2c56: maintainers: claim responsibility for ARMv7 (2015-10-30 01:13:26 +0100) --- Jan Viktorin (7): eal/arm: implement rdtsc by PMU or clock_gettime eal/arm: use vector memcpy only when NEON is enabled eal/arm: detect arm architecture in cpu flags eal/arm: rwlock support for ARM eal/arm: add very incomplete rte_vect gcc/arm: avoid alignment errors to break build maintainers: claim responsibility for ARMv7 Vlastimil Kosar (8): eal/arm: atomic operations for ARM eal/arm: byte order operations for ARM eal/arm: cpu cycle operations for ARM eal/arm: prefetch operations for ARM eal/arm: spinlock operations for ARM (without HTM) eal/arm: vector memcpy for ARM eal/arm: cpu flag checks for ARM mk: Introduce ARMv7 architecture MAINTAINERS| 4 + app/test/test_cpuflags.c | 5 + config/defconfig_arm-armv7a-linuxapp-gcc | 74 + doc/guides/rel_notes/release_2_2.rst | 5 + .../common/include/arch/arm/rte_atomic.h | 256 .../common/include/arch/arm/rte_byteorder.h| 150 + .../common/include/arch/arm/rte_cpuflags.h | 193 .../common/include/arch/arm/rte_cycles.h | 38 +++ .../common/include/arch/arm/rte_cycles_32.h| 121 .../common/include/arch/arm/rte_memcpy.h | 38 +++ .../common/include/arch/arm/rte_memcpy_32.h| 334 + .../common/include/arch/arm/rte_prefetch.h | 38 +++ .../common/include/arch/arm/rte_prefetch_32.h | 61 .../common/include/arch/arm/rte_rwlock.h | 40 +++ .../common/include/arch/arm/rte_spinlock.h | 114 +++ lib/librte_eal/common/include/arch/arm/rte_vect.h | 84 ++ mk/arch/arm/rte.vars.mk| 39 +++ mk/machine/armv7-a/rte.vars.mk | 67 + mk/rte.cpuflags.mk | 6 + mk/toolchain/gcc/rte.vars.mk | 6 + 20 files changed, 1673 insertions(+) create mode 100644 config/defconfig_arm-armv7a-linuxapp-gcc create mode 100644 lib/librte_eal/common/include/arch/arm/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_cycles_32.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_prefetch_32.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_spinlock.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_vect.h create mode 100644 mk/arch/arm/rte.vars.mk create mode 100644 mk/machine/armv7-a/rte.vars.mk -- 2.6.1
[dpdk-dev] [PATCH v5 01/15] eal/arm: atomic operations for ARM
From: Vlastimil Kosar
This patch adds architecture specific atomic operation file
for ARM architecture. It utilizes compiler intrinsics only.
Signed-off-by: Vlastimil Kosar
Signed-off-by: Jan Viktorin
---
v1 -> v2:
* improve rte_wmb()
* use __atomic_* or __sync_*? (may affect the required GCC version)
v4:
* checkpatch complaints about volatile keyword (but seems to be OK to me)
* checkpatch complaints about do { ... } while (0) for single statement
with asm volatile (but I didn't find a way how to write it without
the checkpatch complaints)
* checkpatch is now happy with whitespaces
---
.../common/include/arch/arm/rte_atomic.h | 256 +
1 file changed, 256 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_atomic.h
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic.h
b/lib/librte_eal/common/include/arch/arm/rte_atomic.h
new file mode 100644
index 000..ea1e485
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic.h
@@ -0,0 +1,256 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 RehiveTech. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_ATOMIC_ARM_H_
+#define _RTE_ATOMIC_ARM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_atomic.h"
+
+/**
+ * General memory barrier.
+ *
+ * Guarantees that the LOAD and STORE operations generated before the
+ * barrier occur before the LOAD and STORE operations generated after.
+ */
+#definerte_mb() __sync_synchronize()
+
+/**
+ * Write memory barrier.
+ *
+ * Guarantees that the STORE operations generated before the barrier
+ * occur before the STORE operations generated after.
+ */
+#definerte_wmb() do { asm volatile ("dmb st" : : : "memory"); } while
(0)
+
+/**
+ * Read memory barrier.
+ *
+ * Guarantees that the LOAD operations generated before the barrier
+ * occur before the LOAD operations generated after.
+ */
+#definerte_rmb() __sync_synchronize()
+
+/*- 16 bit atomic operations
-*/
+
+#ifndef RTE_FORCE_INTRINSICS
+static inline int
+rte_atomic16_cmpset(volatile uint16_t *dst, uint16_t exp, uint16_t src)
+{
+ return __atomic_compare_exchange(dst, &exp, &src, 0, __ATOMIC_ACQUIRE,
+ __ATOMIC_ACQUIRE) ? 1 : 0;
+}
+
+static inline int rte_atomic16_test_and_set(rte_atomic16_t *v)
+{
+ return rte_atomic16_cmpset((volatile uint16_t *)&v->cnt, 0, 1);
+}
+
+static inline void
+rte_atomic16_inc(rte_atomic16_t *v)
+{
+ __atomic_add_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE);
+}
+
+static inline void
+rte_atomic16_dec(rte_atomic16_t *v)
+{
+ __atomic_sub_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE);
+}
+
+static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
+{
+ return (__atomic_add_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE) == 0);
+}
+
+static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)
+{
+ return (__atomic_sub_fetch(&v->cnt, 1, __ATOMIC_ACQUIRE) == 0);
+}
+
+/*- 32 bit atomic operations
-*/
+
+static inline int
+rte_atomic32_cmpset(volatile uint32_t *dst, uint32_t exp, uint32_t src)
+{
+ return __atomic_compare_exchange(dst, &exp, &src, 0, __ATOMIC_ACQUIRE,
+ __ATOMIC_ACQUIRE) ? 1 : 0;
+}
+
+static inline int rte_atomic32_test_and_set(rte_atomic32_t *v)
+{
+ return rte_atomic32_cmpset((volatile uint3
[dpdk-dev] [PATCH v5 02/15] eal/arm: byte order operations for ARM
From: Vlastimil Kosar
This patch adds architecture specific byte order operations
for ARM. The architecture supports both big and little endian.
Signed-off-by: Vlastimil Kosar
Signed-off-by: Jan Viktorin
---
v4: fix passing params to asm volatile for checkpatch
---
.../common/include/arch/arm/rte_byteorder.h| 150 +
1 file changed, 150 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_byteorder.h
diff --git a/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
new file mode 100644
index 000..5776997
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_byteorder.h
@@ -0,0 +1,150 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 RehiveTech. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_BYTEORDER_ARM_H_
+#define _RTE_BYTEORDER_ARM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_byteorder.h"
+
+/*
+ * An architecture-optimized byte swap for a 16-bit value.
+ *
+ * Do not use this function directly. The preferred function is rte_bswap16().
+ */
+static inline uint16_t rte_arch_bswap16(uint16_t _x)
+{
+ register uint16_t x = _x;
+
+ asm volatile ("rev16 %0,%1"
+ : "=r" (x)
+ : "r" (x)
+ );
+ return x;
+}
+
+/*
+ * An architecture-optimized byte swap for a 32-bit value.
+ *
+ * Do not use this function directly. The preferred function is rte_bswap32().
+ */
+static inline uint32_t rte_arch_bswap32(uint32_t _x)
+{
+ register uint32_t x = _x;
+
+ asm volatile ("rev %0,%1"
+ : "=r" (x)
+ : "r" (x)
+ );
+ return x;
+}
+
+/*
+ * An architecture-optimized byte swap for a 64-bit value.
+ *
+ * Do not use this function directly. The preferred function is rte_bswap64().
+ */
+/* 64-bit mode */
+static inline uint64_t rte_arch_bswap64(uint64_t _x)
+{
+ return __builtin_bswap64(_x);
+}
+
+#ifndef RTE_FORCE_INTRINSICS
+#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \
+ rte_constant_bswap16(x) :\
+ rte_arch_bswap16(x)))
+
+#define rte_bswap32(x) ((uint32_t)(__builtin_constant_p(x) ? \
+ rte_constant_bswap32(x) :\
+ rte_arch_bswap32(x)))
+
+#define rte_bswap64(x) ((uint64_t)(__builtin_constant_p(x) ? \
+ rte_constant_bswap64(x) :\
+ rte_arch_bswap64(x)))
+#else
+/*
+ * __builtin_bswap16 is only available gcc 4.8 and upwards
+ */
+#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8)
+#define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \
+ rte_constant_bswap16(x) :\
+ rte_arch_bswap16(x)))
+#endif
+#endif
+
+/* ARM architecture is bi-endian (both big and little). */
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+
+#define rte_cpu_to_le_16(x) (x)
+#define rte_cpu_to_le_32(x) (x)
+#define rte_cpu_to_le_64(x) (x)
+
+#define rte_cpu_to_be_16(x) rte_bswap16(x)
+#define rte_cpu_to_be_32(x) rte_bswap32(x)
+#define rte_cpu_to_be_64(x) rte_bswap64(x)
+
+#define rte_le_to_cpu_16(x) (x)
+#define
[dpdk-dev] [PATCH v5 06/15] eal/arm: spinlock operations for ARM (without HTM)
From: Vlastimil Kosar
This patch adds spinlock operations for ARM architecture.
We do not support HTM in spinlocks on ARM.
Signed-off-by: Vlastimil Kosar
Signed-off-by: Jan Viktorin
---
.../common/include/arch/arm/rte_spinlock.h | 114 +
1 file changed, 114 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_spinlock.h
diff --git a/lib/librte_eal/common/include/arch/arm/rte_spinlock.h
b/lib/librte_eal/common/include/arch/arm/rte_spinlock.h
new file mode 100644
index 000..cd5ab8b
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_spinlock.h
@@ -0,0 +1,114 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 RehiveTech. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_SPINLOCK_ARM_H_
+#define _RTE_SPINLOCK_ARM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include
+#include "generic/rte_spinlock.h"
+
+/* Intrinsics are used to implement the spinlock on ARM architecture */
+
+#ifndef RTE_FORCE_INTRINSICS
+
+static inline void
+rte_spinlock_lock(rte_spinlock_t *sl)
+{
+ while (__sync_lock_test_and_set(&sl->locked, 1))
+ while (sl->locked)
+ rte_pause();
+}
+
+static inline void
+rte_spinlock_unlock(rte_spinlock_t *sl)
+{
+ __sync_lock_release(&sl->locked);
+}
+
+static inline int
+rte_spinlock_trylock(rte_spinlock_t *sl)
+{
+ return (__sync_lock_test_and_set(&sl->locked, 1) == 0);
+}
+
+#endif
+
+static inline int rte_tm_supported(void)
+{
+ return 0;
+}
+
+static inline void
+rte_spinlock_lock_tm(rte_spinlock_t *sl)
+{
+ rte_spinlock_lock(sl); /* fall-back */
+}
+
+static inline int
+rte_spinlock_trylock_tm(rte_spinlock_t *sl)
+{
+ return rte_spinlock_trylock(sl);
+}
+
+static inline void
+rte_spinlock_unlock_tm(rte_spinlock_t *sl)
+{
+ rte_spinlock_unlock(sl);
+}
+
+static inline void
+rte_spinlock_recursive_lock_tm(rte_spinlock_recursive_t *slr)
+{
+ rte_spinlock_recursive_lock(slr); /* fall-back */
+}
+
+static inline void
+rte_spinlock_recursive_unlock_tm(rte_spinlock_recursive_t *slr)
+{
+ rte_spinlock_recursive_unlock(slr);
+}
+
+static inline int
+rte_spinlock_recursive_trylock_tm(rte_spinlock_recursive_t *slr)
+{
+ return rte_spinlock_recursive_trylock(slr);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_SPINLOCK_ARM_H_ */
--
2.6.1
[dpdk-dev] [PATCH v5 08/15] eal/arm: use vector memcpy only when NEON is enabled
The GCC can be configured to avoid using NEON extensions.
For that purpose, we provide just the memcpy implementation
of the rte_memcpy.
Based on the patch by David Hunt and Armuta Zende:
lib: added support for armv7 architecture
Signed-off-by: Jan Viktorin
Signed-off-by: Amruta Zende
Signed-off-by: David Hunt
---
v5: prepare for applying ARMv8
---
.../common/include/arch/arm/rte_memcpy_32.h| 59 +-
1 file changed, 57 insertions(+), 2 deletions(-)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h
b/lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h
index 11f8241..df47c0d 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h
@@ -35,8 +35,6 @@
#include
#include
-/* ARM NEON Intrinsics are used to copy data */
-#include
#ifdef __cplusplus
extern "C" {
@@ -44,6 +42,11 @@ extern "C" {
#include "generic/rte_memcpy.h"
+#ifdef __ARM_NEON_FP
+
+/* ARM NEON Intrinsics are used to copy data */
+#include
+
static inline void
rte_mov16(uint8_t *dst, const uint8_t *src)
{
@@ -272,6 +275,58 @@ rte_memcpy_func(void *dst, const void *src, size_t n)
return ret;
}
+#else
+
+static inline void
+rte_mov16(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 16);
+}
+
+static inline void
+rte_mov32(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 32);
+}
+
+static inline void
+rte_mov48(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 48);
+}
+
+static inline void
+rte_mov64(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 64);
+}
+
+static inline void
+rte_mov128(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 128);
+}
+
+static inline void
+rte_mov256(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 256);
+}
+
+static inline void *
+rte_memcpy(void *dst, const void *src, size_t n)
+{
+ return memcpy(dst, src, n);
+}
+
+static inline void *
+rte_memcpy_func(void *dst, const void *src, size_t n)
+{
+ return memcpy(dst, src, n);
+}
+
+#endif /* __ARM_NEON_FP */
+
#ifdef __cplusplus
}
#endif
--
2.6.1
[dpdk-dev] [PATCH v5 07/15] eal/arm: vector memcpy for ARM
From: Vlastimil Kosar The SSE based memory copy in DPDK only support x86. This patch adds ARM NEON based memory copy functions for ARM architecture. The implementation improves memory copy of short or well aligned data buffers. The following measurements show improvements over the libc memcpy on Cortex CPUs. by X % faster Length (B) a15a7 a9 1 4.9 15.23.2 756.9 48.2 40.3 837.3 39.8 29.6 969.3 38.7 33.9 1560.8 35.3 23.7 1650.6 35.9 35.0 1757.7 35.7 31.1 3116.0 23.39.0 3265.9 13.5 21.4 33 3.9 10.3 -3.7 63 2.0 12.9 -2.0 6466.5 0.0 16.5 65 2.7 7.6 -35.6 127 0.1 4.5 -18.9 12866.2 1.5 -51.4 129-0.8 3.2 -35.8 255-3.1 -0.9 -69.1 25667.9 1.27.2 257-3.6 -1.9 -36.9 32067.7 1.40.0 38466.8 1.4 -14.2 511 -44.9 -2.3 -41.9 51267.3 1.4 -6.8 513 -41.7 -3.0 -36.2 1023 -82.4 -2.8 -41.2 102468.3 1.4 -11.6 1025 -80.1 -3.3 -38.1 1518 -47.3 -5.0 -38.3 1522 -48.3 -6.0 -37.9 160065.4 1.3 -27.3 204859.5 1.5 -10.9 307252.3 1.5 -12.2 409645.3 1.4 -12.5 512040.6 1.5 -14.5 614435.4 1.4 -13.4 716832.9 1.4 -13.9 819228.2 1.4 -15.1 Signed-off-by: Vlastimil Kosar Signed-off-by: Jan Viktorin --- v4: * fix whitespace issues reported by checkpatch * fix passing params to asm volatile for checkpatch v5: prepare for applying ARMv8 --- .../common/include/arch/arm/rte_memcpy.h | 38 +++ .../common/include/arch/arm/rte_memcpy_32.h| 279 + 2 files changed, 317 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/arm/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h diff --git a/lib/librte_eal/common/include/arch/arm/rte_memcpy.h b/lib/librte_eal/common/include/arch/arm/rte_memcpy.h new file mode 100644 index 000..d9f5bf1 --- /dev/null +++ b/lib/librte_eal/common/include/arch/arm/rte_memcpy.h @@ -0,0 +1,38 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2015 RehiveTech. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of RehiveTech nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTE_MEMCPY_ARM_H_ +#define _RTE_MEMCPY_ARM_H_ + +#include + +#endif /* _RTE_MEMCPY_ARM_H_ */ diff --git a/lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h b/lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h new file mode 100644 index 000..11f8241 --- /dev/null +++ b/lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h @@ -0,0 +1,279 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2015 RehiveTech. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of RehiveTech nor
[dpdk-dev] [PATCH v5 09/15] eal/arm: cpu flag checks for ARM
From: Vlastimil Kosar
This implementation is based on IBM POWER version of
rte_cpuflags. We use software emulation of HW capability
registers, because those are usually not directly accessible
from userspace on ARM.
Signed-off-by: Vlastimil Kosar
Signed-off-by: Jan Viktorin
---
app/test/test_cpuflags.c | 5 +
.../common/include/arch/arm/rte_cpuflags.h | 177 +
mk/rte.cpuflags.mk | 6 +
3 files changed, 188 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c
index 5b92061..557458f 100644
--- a/app/test/test_cpuflags.c
+++ b/app/test/test_cpuflags.c
@@ -115,6 +115,11 @@ test_cpuflags(void)
CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);
#endif
+#if defined(RTE_ARCH_ARM)
+ printf("Check for NEON:\t\t");
+ CHECK_FOR_FLAG(RTE_CPUFLAG_NEON);
+#endif
+
#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
printf("Check for SSE:\t\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_SSE);
diff --git a/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
b/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
new file mode 100644
index 000..1eadb33
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
@@ -0,0 +1,177 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 RehiveTech. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_CPUFLAGS_ARM_H_
+#define _RTE_CPUFLAGS_ARM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include
+#include
+#include
+#include
+
+#include "generic/rte_cpuflags.h"
+
+#ifndef AT_HWCAP
+#define AT_HWCAP 16
+#endif
+
+#ifndef AT_HWCAP2
+#define AT_HWCAP2 26
+#endif
+
+/* software based registers */
+enum cpu_register_t {
+ REG_HWCAP = 0,
+ REG_HWCAP2,
+};
+
+/**
+ * Enumeration of all CPU features supported
+ */
+enum rte_cpu_flag_t {
+ RTE_CPUFLAG_SWP = 0,
+ RTE_CPUFLAG_HALF,
+ RTE_CPUFLAG_THUMB,
+ RTE_CPUFLAG_A26BIT,
+ RTE_CPUFLAG_FAST_MULT,
+ RTE_CPUFLAG_FPA,
+ RTE_CPUFLAG_VFP,
+ RTE_CPUFLAG_EDSP,
+ RTE_CPUFLAG_JAVA,
+ RTE_CPUFLAG_IWMMXT,
+ RTE_CPUFLAG_CRUNCH,
+ RTE_CPUFLAG_THUMBEE,
+ RTE_CPUFLAG_NEON,
+ RTE_CPUFLAG_VFPv3,
+ RTE_CPUFLAG_VFPv3D16,
+ RTE_CPUFLAG_TLS,
+ RTE_CPUFLAG_VFPv4,
+ RTE_CPUFLAG_IDIVA,
+ RTE_CPUFLAG_IDIVT,
+ RTE_CPUFLAG_VFPD32,
+ RTE_CPUFLAG_LPAE,
+ RTE_CPUFLAG_EVTSTRM,
+ RTE_CPUFLAG_AES,
+ RTE_CPUFLAG_PMULL,
+ RTE_CPUFLAG_SHA1,
+ RTE_CPUFLAG_SHA2,
+ RTE_CPUFLAG_CRC32,
+ /* The last item */
+ RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
+};
+
+static const struct feature_entry cpu_feature_table[] = {
+ FEAT_DEF(SWP, 0x0001, 0, REG_HWCAP, 0)
+ FEAT_DEF(HALF, 0x0001, 0, REG_HWCAP, 1)
+ FEAT_DEF(THUMB, 0x0001, 0, REG_HWCAP, 2)
+ FEAT_DEF(A26BIT,0x0001, 0, REG_HWCAP, 3)
+ FEAT_DEF(FAST_MULT, 0x0001, 0, REG_HWCAP, 4)
+ FEAT_DEF(FPA, 0x0001, 0, REG_HWCAP, 5)
+ FEAT_DEF(VFP, 0x0001, 0, REG_HWCAP, 6)
+ FEAT_DEF(EDSP, 0x0001, 0, REG_HWCAP, 7)
+ FEAT_DEF(JAVA, 0x0001, 0, REG_HWCAP, 8)
+ FEAT_DEF(IWMMXT,0x0001, 0, REG_HWCAP, 9)
+ F
[dpdk-dev] [PATCH v5 10/15] eal/arm: detect arm architecture in cpu flags
Based on the patch by David Hunt and Armuta Zende:
lib: added support for armv7 architecture
Signed-off-by: Jan Viktorin
Signed-off-by: Amruta Zende
Signed-off-by: David Hunt
---
v2 -> v3: fixed forgotten include of string.h
v4: checkpatch reports few characters over 80 for checking aarch64
---
lib/librte_eal/common/include/arch/arm/rte_cpuflags.h | 16
1 file changed, 16 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
b/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
index 1eadb33..7ce9d14 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h
@@ -41,6 +41,7 @@ extern "C" {
#include
#include
#include
+#include
#include "generic/rte_cpuflags.h"
@@ -52,10 +53,15 @@ extern "C" {
#define AT_HWCAP2 26
#endif
+#ifndef AT_PLATFORM
+#define AT_PLATFORM 15
+#endif
+
/* software based registers */
enum cpu_register_t {
REG_HWCAP = 0,
REG_HWCAP2,
+ REG_PLATFORM,
};
/**
@@ -89,6 +95,8 @@ enum rte_cpu_flag_t {
RTE_CPUFLAG_SHA1,
RTE_CPUFLAG_SHA2,
RTE_CPUFLAG_CRC32,
+ RTE_CPUFLAG_AARCH32,
+ RTE_CPUFLAG_AARCH64,
/* The last item */
RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
};
@@ -121,6 +129,8 @@ static const struct feature_entry cpu_feature_table[] = {
FEAT_DEF(SHA1, 0x0001, 0, REG_HWCAP2, 2)
FEAT_DEF(SHA2, 0x0001, 0, REG_HWCAP2, 3)
FEAT_DEF(CRC32, 0x0001, 0, REG_HWCAP2, 4)
+ FEAT_DEF(AARCH32, 0x0001, 0, REG_PLATFORM, 0)
+ FEAT_DEF(AARCH64, 0x0001, 0, REG_PLATFORM, 1)
};
/*
@@ -141,6 +151,12 @@ rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,
out[REG_HWCAP] = auxv.a_un.a_val;
else if (auxv.a_type == AT_HWCAP2)
out[REG_HWCAP2] = auxv.a_un.a_val;
+ else if (auxv.a_type == AT_PLATFORM) {
+ if (!strcmp((const char *)auxv.a_un.a_val, "aarch32"))
+ out[REG_PLATFORM] = 0x0001;
+ else if (!strcmp((const char *)auxv.a_un.a_val,
"aarch64"))
+ out[REG_PLATFORM] = 0x0002;
+ }
}
}
--
2.6.1
[dpdk-dev] [PATCH v5 11/15] eal/arm: rwlock support for ARM
Just a copy from PPC.
Signed-off-by: Jan Viktorin
---
.../common/include/arch/arm/rte_rwlock.h | 40 ++
1 file changed, 40 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_rwlock.h
diff --git a/lib/librte_eal/common/include/arch/arm/rte_rwlock.h
b/lib/librte_eal/common/include/arch/arm/rte_rwlock.h
new file mode 100644
index 000..664bec8
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_rwlock.h
@@ -0,0 +1,40 @@
+/* copied from ppc_64 */
+
+#ifndef _RTE_RWLOCK_ARM_H_
+#define _RTE_RWLOCK_ARM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_rwlock.h"
+
+static inline void
+rte_rwlock_read_lock_tm(rte_rwlock_t *rwl)
+{
+ rte_rwlock_read_lock(rwl);
+}
+
+static inline void
+rte_rwlock_read_unlock_tm(rte_rwlock_t *rwl)
+{
+ rte_rwlock_read_unlock(rwl);
+}
+
+static inline void
+rte_rwlock_write_lock_tm(rte_rwlock_t *rwl)
+{
+ rte_rwlock_write_lock(rwl);
+}
+
+static inline void
+rte_rwlock_write_unlock_tm(rte_rwlock_t *rwl)
+{
+ rte_rwlock_write_unlock(rwl);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_RWLOCK_ARM_H_ */
--
2.6.1
[dpdk-dev] [PATCH v5 12/15] eal/arm: add very incomplete rte_vect
This patch does not map x86 SIMD operations to the ARM ones.
It just fills the necessary gap between the platforms to enable
compilation of libraries LPM (includes rte_vect.h, lpm_test needs
those SIMD functions) and ACL (includes rte_vect.h).
Signed-off-by: Jan Viktorin
---
v4: checkpatch reports warning for the new typedef
---
lib/librte_eal/common/include/arch/arm/rte_vect.h | 84 +++
1 file changed, 84 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_vect.h
diff --git a/lib/librte_eal/common/include/arch/arm/rte_vect.h
b/lib/librte_eal/common/include/arch/arm/rte_vect.h
new file mode 100644
index 000..7d5de97
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_vect.h
@@ -0,0 +1,84 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 RehiveTech. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_VECT_ARM_H_
+#define _RTE_VECT_ARM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define XMM_SIZE 16
+#define XMM_MASK (XMM_MASK - 1)
+
+typedef struct {
+ union uint128 {
+ uint8_t uint8[16];
+ uint32_t uint32[4];
+ } val;
+} __m128i;
+
+static inline __m128i
+_mm_set_epi32(uint32_t v0, uint32_t v1, uint32_t v2, uint32_t v3)
+{
+ __m128i res;
+
+ res.val.uint32[0] = v0;
+ res.val.uint32[1] = v1;
+ res.val.uint32[2] = v2;
+ res.val.uint32[3] = v3;
+ return res;
+}
+
+static inline __m128i
+_mm_loadu_si128(__m128i *v)
+{
+ __m128i res;
+
+ res = *v;
+ return res;
+}
+
+static inline __m128i
+_mm_load_si128(__m128i *v)
+{
+ __m128i res;
+
+ res = *v;
+ return res;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--
2.6.1
[dpdk-dev] [PATCH v5 13/15] gcc/arm: avoid alignment errors to break build
There several issues with alignment when compiling for ARMv7. They are not considered to be fatal (ARMv7 supports unaligned access of 32b words), so we just leave them as warnings. They should be solved later, however. Signed-off-by: Jan Viktorin Signed-off-by: Vlastimil Kosar --- v4: restrict -Wno-error to the cast-align only --- mk/toolchain/gcc/rte.vars.mk | 6 ++ 1 file changed, 6 insertions(+) diff --git a/mk/toolchain/gcc/rte.vars.mk b/mk/toolchain/gcc/rte.vars.mk index 0f51c66..c2c5255 100644 --- a/mk/toolchain/gcc/rte.vars.mk +++ b/mk/toolchain/gcc/rte.vars.mk @@ -77,6 +77,12 @@ WERROR_FLAGS += -Wcast-align -Wnested-externs -Wcast-qual WERROR_FLAGS += -Wformat-nonliteral -Wformat-security WERROR_FLAGS += -Wundef -Wwrite-strings +# There are many issues reported for ARMv7 architecture +# which are not necessarily fatal. Report as warnings. +ifeq ($(CONFIG_RTE_ARCH_ARMv7),y) +WERROR_FLAGS += -Wno-error=cast-align +endif + # process cpu flags include $(RTE_SDK)/mk/toolchain/$(RTE_TOOLCHAIN)/rte.toolchain-compat.mk -- 2.6.1
[dpdk-dev] [PATCH v5 14/15] mk: Introduce ARMv7 architecture
From: Vlastimil Kosar Make DPDK run on ARMv7-A architecture. This patch assumes ARM Cortex-A9. However, it is known to be working on Cortex-A7 and Cortex-A15. Signed-off-by: Vlastimil Kosar Signed-off-by: Jan Viktorin --- v2: * the -mtune parameter of GCC is configurable now * the -mfpu=neon can be turned off v3: XMM_SIZE is defined in rte_vect.h in a following patch v4: * update release notes for 2.2 * get rid of CONFIG_RTE_BITMAP_OPTIMIZATIONS=0 setting * rename arm defconfig: "armv7-a" -> "arvm7a" * disable pipeline and table modules unless lpm is fixed --- config/defconfig_arm-armv7a-linuxapp-gcc | 74 doc/guides/rel_notes/release_2_2.rst | 5 +++ mk/arch/arm/rte.vars.mk | 39 + mk/machine/armv7-a/rte.vars.mk | 67 + 4 files changed, 185 insertions(+) create mode 100644 config/defconfig_arm-armv7a-linuxapp-gcc create mode 100644 mk/arch/arm/rte.vars.mk create mode 100644 mk/machine/armv7-a/rte.vars.mk diff --git a/config/defconfig_arm-armv7a-linuxapp-gcc b/config/defconfig_arm-armv7a-linuxapp-gcc new file mode 100644 index 000..d623222 --- /dev/null +++ b/config/defconfig_arm-armv7a-linuxapp-gcc @@ -0,0 +1,74 @@ +# BSD LICENSE +# +# Copyright (C) 2015 RehiveTech. All right reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of RehiveTech nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "common_linuxapp" + +CONFIG_RTE_MACHINE="armv7-a" + +CONFIG_RTE_ARCH="arm" +CONFIG_RTE_ARCH_ARM=y +CONFIG_RTE_ARCH_ARMv7=y +CONFIG_RTE_ARCH_ARM_TUNE="cortex-a9" +CONFIG_RTE_ARCH_ARM_NEON=y + +CONFIG_RTE_TOOLCHAIN="gcc" +CONFIG_RTE_TOOLCHAIN_GCC=y + +# ARM doesn't have support for vmware TSC map +CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n + +# KNI is not supported on 32-bit +CONFIG_RTE_LIBRTE_KNI=n + +# PCI is usually not used on ARM +CONFIG_RTE_EAL_IGB_UIO=n + +# fails to compile on ARM +CONFIG_RTE_LIBRTE_ACL=n +CONFIG_RTE_LIBRTE_LPM=n +CONFIG_RTE_LIBRTE_TABLE=n +CONFIG_RTE_LIBRTE_PIPELINE=n + +# cannot use those on ARM +CONFIG_RTE_KNI_KMOD=n +CONFIG_RTE_LIBRTE_EM_PMD=n +CONFIG_RTE_LIBRTE_IGB_PMD=n +CONFIG_RTE_LIBRTE_CXGBE_PMD=n +CONFIG_RTE_LIBRTE_E1000_PMD=n +CONFIG_RTE_LIBRTE_ENIC_PMD=n +CONFIG_RTE_LIBRTE_FM10K_PMD=n +CONFIG_RTE_LIBRTE_I40E_PMD=n +CONFIG_RTE_LIBRTE_IXGBE_PMD=n +CONFIG_RTE_LIBRTE_MLX4_PMD=n +CONFIG_RTE_LIBRTE_MPIPE_PMD=n +CONFIG_RTE_LIBRTE_VIRTIO_PMD=n +CONFIG_RTE_LIBRTE_VMXNET3_PMD=n +CONFIG_RTE_LIBRTE_PMD_XENVIRT=n +CONFIG_RTE_LIBRTE_PMD_BNX2X=n diff --git a/doc/guides/rel_notes/release_2_2.rst b/doc/guides/rel_notes/release_2_2.rst index be6f827..43a3a3c 100644 --- a/doc/guides/rel_notes/release_2_2.rst +++ b/doc/guides/rel_notes/release_2_2.rst @@ -23,6 +23,11 @@ New Features * **Added vhost-user multiple queue support.** +* **Introduce ARMv7 architecture** + + It is now possible to build DPDK for the ARMv7 platform and test with + virtual PMD drivers. + Resolved Issues --- diff --git a/mk/arch/arm/rte.vars.mk b/mk/arch/arm/rte.vars.mk new file mode 100644 index 000..df0c043 --- /dev/null +++ b/mk/arch/arm/rte.vars.mk @@ -0,0 +1,39 @@ +# BSD LICENSE +# +# Copyright (C) 2015 RehiveTech. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following d
[dpdk-dev] [PATCH v5 15/15] maintainers: claim responsibility for ARMv7
Signed-off-by: Jan Viktorin --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 080a8e8..a8933eb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -124,6 +124,10 @@ IBM POWER M: Chao Zhu F: lib/librte_eal/common/include/arch/ppc_64/ +ARM v7 +M: Jan Viktorin +F: lib/librte_eal/common/include/arch/arm/ + Intel x86 M: Bruce Richardson M: Konstantin Ananyev -- 2.6.1
[dpdk-dev] [PATCH v5 03/15] eal/arm: cpu cycle operations for ARM
From: Vlastimil Kosar ARM architecture doesn't have a suitable source of CPU cycles. This patch uses clock_gettime instead. The implementation should be improved in the future. Signed-off-by: Vlastimil Kosar Signed-off-by: Jan Viktorin --- v5: prepare for applying ARMv8 --- .../common/include/arch/arm/rte_cycles.h | 38 ++ .../common/include/arch/arm/rte_cycles_32.h| 85 ++ 2 files changed, 123 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/arm/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/arm/rte_cycles_32.h diff --git a/lib/librte_eal/common/include/arch/arm/rte_cycles.h b/lib/librte_eal/common/include/arch/arm/rte_cycles.h new file mode 100644 index 000..b2372fa --- /dev/null +++ b/lib/librte_eal/common/include/arch/arm/rte_cycles.h @@ -0,0 +1,38 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2015 RehiveTech. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of RehiveTech nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTE_CYCLES_ARM_H_ +#define _RTE_CYCLES_ARM_H_ + +#include + +#endif /* _RTE_CYCLES_ARM_H_ */ diff --git a/lib/librte_eal/common/include/arch/arm/rte_cycles_32.h b/lib/librte_eal/common/include/arch/arm/rte_cycles_32.h new file mode 100644 index 000..755cc4a --- /dev/null +++ b/lib/librte_eal/common/include/arch/arm/rte_cycles_32.h @@ -0,0 +1,85 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2015 RehiveTech. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of RehiveTech nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTE_CYCLES_ARM32_H_ +#define _RTE_CYCLES_ARM32_H_ + +/* ARM v7 does not have suitable source of clock signals. The only clock counter + available in the core is 32 bit wide. Therefore it is unsuitable as the + counter overlaps every few seconds and probably is not accessible by + userspace programs. Therefore we use clock_gettime(CLOCK_MONOTONIC_RAW) to + simulate counter running at 1GH
[dpdk-dev] [PATCH v5 04/15] eal/arm: implement rdtsc by PMU or clock_gettime
Enable to choose a preferred way to read timer based on the
configuration entry CONFIG_RTE_ARM_EAL_RDTSC_USE_PMU.
It requires a kernel module that is not included to work.
Based on the patch by David Hunt and Armuta Zende:
lib: added support for armv7 architecture
Signed-off-by: Jan Viktorin
Signed-off-by: Amruta Zende
Signed-off-by: David Hunt
---
.../common/include/arch/arm/rte_cycles_32.h| 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_cycles_32.h
b/lib/librte_eal/common/include/arch/arm/rte_cycles_32.h
index 755cc4a..6c6098e 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_cycles_32.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_cycles_32.h
@@ -54,8 +54,14 @@ extern "C" {
* @return
* The time base for this lcore.
*/
+#ifndef CONFIG_RTE_ARM_EAL_RDTSC_USE_PMU
+
+/**
+ * This call is easily portable to any ARM architecture, however,
+ * it may be damn slow and inprecise for some tasks.
+ */
static inline uint64_t
-rte_rdtsc(void)
+__rte_rdtsc_syscall(void)
{
struct timespec val;
uint64_t v;
@@ -67,6 +73,36 @@ rte_rdtsc(void)
v += (uint64_t) val.tv_nsec;
return v;
}
+#define rte_rdtsc __rte_rdtsc_syscall
+
+#else
+
+/**
+ * This function requires to configure the PMCCNTR and enable
+ * userspace access to it:
+ *
+ * asm volatile("mcr p15, 0, %0, c9, c14, 0" : : "r"(1));
+ * asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(29));
+ * asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r"(0x800f));
+ *
+ * which is possible only from the priviledged mode (kernel space).
+ */
+static inline uint64_t
+__rte_rdtsc_pmccntr(void)
+{
+ unsigned tsc;
+ uint64_t final_tsc;
+
+ /* Read PMCCNTR */
+ asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r"(tsc));
+ /* 1 tick = 64 clocks */
+ final_tsc = ((uint64_t)tsc) << 6;
+
+ return (uint64_t)final_tsc;
+}
+#define rte_rdtsc __rte_rdtsc_pmccntr
+
+#endif /* RTE_ARM_EAL_RDTSC_USE_PMU */
static inline uint64_t
rte_rdtsc_precise(void)
--
2.6.1
[dpdk-dev] [PATCH v5 05/15] eal/arm: prefetch operations for ARM
From: Vlastimil Kosar
This patch adds architecture specific prefetch operations
for ARM architecture. It utilizes the pld instruction that
starts filling the appropriate cache line without blocking.
Signed-off-by: Vlastimil Kosar
Signed-off-by: Jan Viktorin
---
v4:
* checkpatch does not like the syntax of naming params
to asm volatile; switched to %0, %1 syntax
* checkpatch complatins about volatile (seems to be OK for me)
v5: prepare for applying ARMv8
---
.../common/include/arch/arm/rte_prefetch.h | 38 ++
.../common/include/arch/arm/rte_prefetch_32.h | 61 ++
2 files changed, 99 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_prefetch.h
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_prefetch_32.h
diff --git a/lib/librte_eal/common/include/arch/arm/rte_prefetch.h
b/lib/librte_eal/common/include/arch/arm/rte_prefetch.h
new file mode 100644
index 000..1f46697
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_prefetch.h
@@ -0,0 +1,38 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 RehiveTech. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_PREFETCH_ARM_H_
+#define _RTE_PREFETCH_ARM_H_
+
+#include
+
+#endif /* _RTE_PREFETCH_ARM_H_ */
diff --git a/lib/librte_eal/common/include/arch/arm/rte_prefetch_32.h
b/lib/librte_eal/common/include/arch/arm/rte_prefetch_32.h
new file mode 100644
index 000..b716384
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_prefetch_32.h
@@ -0,0 +1,61 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2015 RehiveTech. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_PREFETCH_ARM32_H_
+#define _RTE_PREFETCH_ARM32_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_prefetch.h"
+
+static inline void rte_prefetch0(const vola
[dpdk-dev] [RFC PATCH v3 2/2] vhost: Add VHOST PMD
On 2015/10/29 23:25, Xie, Huawei wrote: > On 10/22/2015 5:48 PM, Tetsuya Mukawa wrote: >> The patch introduces a new PMD. This PMD is implemented as thin wrapper >> of librte_vhost. It means librte_vhost is also needed to compile the PMD. >> The vhost messages will be handled only when a port is started. So start >> a port first, then invoke QEMU. > Hi Tetsuya: > I haven't got bandwidth to review the details of this patch but i think > it is the very right thing to do. It is still RFC patch.Is your goal to > make it into 2.2? > Hi Xie, Thanks for caring it. Yes, I want to merge it to DPDK-2.2. I've already sent not RFC patches. Could you please check below? Subject: [PATCH 0/3] Add VHOST PMD Date: Tue, 27 Oct 2015 15:12:52 +0900 Message-Id: <1445926375-18986-1-git-send-email-mukawa at igel.co.jp> Following patch involved in above patch series was submitted as a separate patch. So please ignore it. - [PATCH 1/3] vhost: Fix wrong handling of virtqueue array index Thanks, Tetsuya
[dpdk-dev] [PATCH v2 00/10] enable DCB feature on Intel XL710/X710 NIC
> -Original Message- > From: Wu, Jingjing > Sent: Thursday, October 29, 2015 4:54 PM > To: dev at dpdk.org > Cc: Wu, Jingjing; Zhang, Helin; Pei, Yulong; Liu, Jijiang > Subject: [PATCH v2 00/10] enable DCB feature on Intel XL710/X710 NIC > > The patch set enables DCB feature on Intel XL710/X710 NICs, including: > - Receive queue classification based on traffic class > - Round Robin ETS schedule (rx and tx). > - Priority flow control > To make the testpmd and ethdev lib more generic on DCB feature, this patch > set also > - adds a new API to get DCB related information on NICs. > - changes the DCB test forwarding in testpmd to be on traffic class. > - move specific validation from lib and application to drivers. > Additionally, this patch set also corrects some coding style issues. > > v2 changes: > - add a command in testpmd to display dcb info > - update testpmd guide and release note > > Jingjing Wu (10): > ethdev: rename dcb_queue to dcb_tc in dcb config struct > ethdev: move the multi-queue checking to specific drivers > i40e: enable DCB feature on FVL > ixgbe: enable DCB+RSS multi-queue mode > ethdev: new API to get dcb related information > ixgbe: get_dcb_info ops implement > i40e: get_dcb_info ops implement > app/testpmd: set up DCB forwarding based on traffic class > app/testpmd: add command to display DCB info > doc: update testpmd guide and release note > > app/test-pmd/cmdline.c | 54 ++- > app/test-pmd/config.c | 202 +- > app/test-pmd/testpmd.c | 151 > app/test-pmd/testpmd.h | 24 +- > doc/guides/rel_notes/release_2_2.rst| 6 + > doc/guides/testpmd_app_ug/testpmd_funcs.rst | 12 +- > drivers/net/e1000/igb_ethdev.c | 84 +++- > drivers/net/i40e/i40e_ethdev.c | 574 > +++- > drivers/net/i40e/i40e_ethdev.h | 14 + > drivers/net/i40e/i40e_rxtx.c| 32 +- > drivers/net/i40e/i40e_rxtx.h| 2 + > drivers/net/ixgbe/ixgbe_ethdev.c| 251 > drivers/net/ixgbe/ixgbe_ethdev.h| 3 + > drivers/net/ixgbe/ixgbe_rxtx.c | 58 +-- > examples/vmdq_dcb/main.c| 4 +- > lib/librte_ether/rte_ethdev.c | 217 +-- > lib/librte_ether/rte_ethdev.h | 68 +++- > 17 files changed, 1303 insertions(+), 453 deletions(-) > > -- > 2.4.0 Acked-by: Jijiang Liu
[dpdk-dev] [PATCH v4 0/7] e1000: add rx interrupt support
Thanks Thomas. > -Original Message- > From: Thomas Monjalon [mailto:thomas.monjalon at 6wind.com] > Sent: Friday, October 30, 2015 2:19 AM > To: Liu, Yong > Cc: dev at dpdk.org; Mcnamara, John > Subject: Re: [dpdk-dev] [PATCH v4 0/7] e1000: add rx interrupt support > > 2015-10-29 23:56, Yong Liu: > > This patch set will enable interrup for physical and emulated e1000 > device. > > Rx queue interrupt will work with uio driver or vfio driver with msi > mode. > > l3fwd-power will disable interrupt immediately when wake-up for that > e1000 not > > support interrupt auto clear. > > LSC and rxq interrupt will be seperated for e1000 can only support one > > interrupt cause in the same time. > > Don't you think it should be explained in a doc? > doc/guides/nics/e1000em.rst Yes, will update those information in the doc. > I'm especially confused by the need of changing an example for this PMD. > Does it mean the API behaviour must be changed? > After return back from sleep, Rx interrupt should always disabled until return to sleep. Some NICs like Niantic and Fortville support interrupt auto disable, so it worked normally. But e1000 not support that, so add rte_eth_dev_rx_intr_disable here to disable related interrupt. > [...] > > Marvin Liu (7): > > e1000: add rx interrupt support > > e1000: separate lsc and rxq interrupt disable function > > e1000: add ethdev rxq enable and disable function > > e1000: add rxq interrupt handler > > e1000: check lsc and rxq not enable in the same time > > e1000: lsc interrupt setup function only enable itself > > l3fwd-power: disable interrupt when wake up from sleep > > Announcing a support in first patch and making it work later > is a strange logic to review. > > You forgot to keep the Acked-by: Cunming Liang > > Applied in this order: > e1000: restrict link interrupt setup scope > e1000: separate link and Rx interrupt disabling > e1000: support Rx interrupt setup > e1000: add Rx interrupt handler > l3fwd-power: disable Rx interrupt when waking up > Thanks
[dpdk-dev] [PATCH v6 1/3] i40e: RSS/FD granularity configuration
> -Original Message-
> From: Richardson, Bruce
> Sent: Thursday, October 29, 2015 5:39 PM
> To: Zhang, Helin
> Cc: dev at dpdk.org; Pei, Yulong
> Subject: Re: [dpdk-dev] [PATCH v6 1/3] i40e: RSS/FD granularity configuration
>
> On Thu, Oct 29, 2015 at 02:02:50PM +0800, Helin Zhang wrote:
> > The default input set of fields of a received packet are loaded from
> > firmware, which cannot be modified even users want to use different
> > fields for RSS or flow director. Here adds more flexibilities of
> > selecting packet fields for hash calculation or flow director for
> > users.
> >
> > Signed-off-by: Helin Zhang
> > Signed-off-by: Andrey Chilikin
> > ---
> > drivers/net/i40e/i40e_ethdev.c | 742
>
> > drivers/net/i40e/i40e_ethdev.h | 7 +
> > drivers/net/i40e/i40e_fdir.c| 31 ++
> > lib/librte_ether/rte_eth_ctrl.h | 114 +-
> > 4 files changed, 890 insertions(+), 4 deletions(-)
> >
>
> > @@ -672,6 +776,8 @@ struct rte_eth_hash_filter_info {
> > uint8_t enable;
> > /** Global configurations of hash filter */
> > struct rte_eth_hash_global_conf global_conf;
> > + /** Global configurations of hash filter input set */
> > + struct rte_eth_input_set_conf input_set_conf;
> > } info;
> > };
> >
> Hi Helin,
>
> Just to check: Does this change affect the size of the structure and cause ABI
> issues?
Bruce, you are right, there should be ABI issue with the structure size. Thank
you very much!
I will change the size of ' struct rte_eth_input_set_conf ' to smaller one, and
then no ABI issue this time.
But I will announce ABI change to support configuring more than one input sets,
and then make the change next time.
/Helin
>
> /Bruce
[dpdk-dev] [PATCH v6 0/8] virtio ring layout optimization and simple rx/tx processing
> -Original Message- > From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Huawei Xie > Sent: Thursday, October 29, 2015 10:53 PM > To: dev at dpdk.org > Subject: [dpdk-dev] [PATCH v6 0/8] virtio ring layout optimization and simple > rx/tx processing > > Changes in v6: > - Update release notes > - Fix the error in virtio tx ring layout ascii chart in the cover-letter > .. > Huawei Xie (8): > virtio: add virtio_rxtx.h header file > virtio: add software rx ring, fake_buf into virtqueue > virtio: rx/tx ring layout optimization > virtio: fill RX avail ring with blank mbufs > virtio: virtio vec rx > virtio: simple tx routine > virtio: pick simple rx/tx func > doc: update release notes 2.2 about virtio performance optimization > > doc/guides/rel_notes/release_2_2.rst| 3 + > drivers/net/virtio/Makefile | 2 +- > drivers/net/virtio/virtio_ethdev.c | 12 +- > drivers/net/virtio/virtio_ethdev.h | 5 + > drivers/net/virtio/virtio_rxtx.c| 56 - > drivers/net/virtio/virtio_rxtx.h| 39 +++ > drivers/net/virtio/virtio_rxtx_simple.c | 414 > > drivers/net/virtio/virtqueue.h | 5 + > 8 files changed, 532 insertions(+), 4 deletions(-) create mode 100644 > drivers/net/virtio/virtio_rxtx.h create mode 100644 > drivers/net/virtio/virtio_rxtx_simple.c > > -- > 1.8.1.4 Acked-by: Jianfeng Tan
[dpdk-dev] [PATCH v2 00/10] enable DCB feature on Intel XL710/X710 NIC
> -Original Message- > From: Wu, Jingjing > Sent: Thursday, October 29, 2015 4:54 PM > To: dev at dpdk.org > Cc: Wu, Jingjing; Zhang, Helin; Pei, Yulong; Liu, Jijiang > Subject: [PATCH v2 00/10] enable DCB feature on Intel XL710/X710 NIC > > The patch set enables DCB feature on Intel XL710/X710 NICs, including: > - Receive queue classification based on traffic class > - Round Robin ETS schedule (rx and tx). > - Priority flow control > To make the testpmd and ethdev lib more generic on DCB feature, this patch set > also > - adds a new API to get DCB related information on NICs. > - changes the DCB test forwarding in testpmd to be on traffic class. > - move specific validation from lib and application to drivers. > Additionally, this patch set also corrects some coding style issues. > > v2 changes: > - add a command in testpmd to display dcb info > - update testpmd guide and release note > > Jingjing Wu (10): > ethdev: rename dcb_queue to dcb_tc in dcb config struct > ethdev: move the multi-queue checking to specific drivers > i40e: enable DCB feature on FVL > ixgbe: enable DCB+RSS multi-queue mode > ethdev: new API to get dcb related information > ixgbe: get_dcb_info ops implement > i40e: get_dcb_info ops implement > app/testpmd: set up DCB forwarding based on traffic class > app/testpmd: add command to display DCB info > doc: update testpmd guide and release note > > app/test-pmd/cmdline.c | 54 ++- > app/test-pmd/config.c | 202 +- > app/test-pmd/testpmd.c | 151 > app/test-pmd/testpmd.h | 24 +- > doc/guides/rel_notes/release_2_2.rst| 6 + > doc/guides/testpmd_app_ug/testpmd_funcs.rst | 12 +- > drivers/net/e1000/igb_ethdev.c | 84 +++- > drivers/net/i40e/i40e_ethdev.c | 574 > +++- > drivers/net/i40e/i40e_ethdev.h | 14 + > drivers/net/i40e/i40e_rxtx.c| 32 +- > drivers/net/i40e/i40e_rxtx.h| 2 + > drivers/net/ixgbe/ixgbe_ethdev.c| 251 > drivers/net/ixgbe/ixgbe_ethdev.h| 3 + > drivers/net/ixgbe/ixgbe_rxtx.c | 58 +-- > examples/vmdq_dcb/main.c| 4 +- > lib/librte_ether/rte_ethdev.c | 217 +-- > lib/librte_ether/rte_ethdev.h | 68 +++- > 17 files changed, 1303 insertions(+), 453 deletions(-) > > -- > 2.4.0 Acked-by: Helin Zhang
[dpdk-dev] [PATCH v4 00/16] Vector Rx/Tx PMD implementation for fm10k
Hi, Thomas, Best Regards, Mark > -Original Message- > From: Thomas Monjalon [mailto:thomas.monjalon at 6wind.com] > Sent: Friday, October 30, 2015 7:13 AM > To: Chen, Jing D > Cc: dev at dpdk.org; Liang, Cunming > Subject: Re: [dpdk-dev] [PATCH v4 00/16] Vector Rx/Tx PMD implementation > for fm10k > > > > Chen Jing D(Mark) (16): > > > fm10k: add new vPMD file > > > fm10k: add vPMD pre-condition check for each RX queue > > > fm10k: Add a new func to initialize all parameters > > > fm10k: add func to re-allocate mbuf for RX ring > > > fm10k: add 2 functions to parse pkt_type and offload flag > > > fm10k: add Vector RX function > > > fm10k: add func to do Vector RX condition check > > > fm10k: add Vector RX scatter function > > > fm10k: add function to decide best RX function > > > fm10k: add func to release mbuf in case Vector RX applied > > > fm10k: add Vector TX function > > > fm10k: use func pointer to reset TX queue and mbuf release > > > fm10k: introduce 2 funcs to reset TX queue and mbuf release > > > fm10k: Add function to decide best TX func > > > fm10k: fix a crash issue in vector RX func > > > doc: release notes update for fm10k Vector PMD > > > > Acked-by: Cunming Liang > > Sorry, there are some checkpatch warnings and a compilation error: > > SPACING: No space is necessary after a cast > SPACING: spaces preferred around that '+' > LINE_CONTINUATIONS: Avoid unnecessary line continuations > > And more important, with clang: > > fm10k_rxtx_vec.c:69:1: error: unused function 'fm10k_rxq_rearm' Thanks for the comments. I'll fix it.
[dpdk-dev] [PATCH v7 0/2] i40e: RSS/FD granularity configuration
v2 changes: Solved the compilation issues. v3 changes: Support selecting more input set fields. v4 changes: Removed operation of 'delete', as it is not necessary. Added FD granularity in both pmd and testpmd, as it is similar to RSS granularity. v5 changes: Fixed issue of generating wrong input set for registers on ipv6-udp and ipv6-tcp pc types. Added clear masking operations during checking if MASK registers are opcupied or not. Reworked several annotations. v6 changes: Updated documentation. v7 changes: Modified RTE_ETH_INSET_SIZE_MAX from 128 to 1, to avoid ABI changes. Split documentation into pieces and put them directly into the patch of code changes directly. Helin Zhang (2): i40e: RSS/FD granularity configuration app/testpmd: add test commands for RSS/FD granularity app/test-pmd/cmdline.c | 218 doc/guides/rel_notes/deprecation.rst| 5 + doc/guides/rel_notes/release_2_2.rst| 3 + doc/guides/testpmd_app_ug/testpmd_funcs.rst | 33 ++ drivers/net/i40e/i40e_ethdev.c | 742 drivers/net/i40e/i40e_ethdev.h | 7 + drivers/net/i40e/i40e_fdir.c| 31 ++ lib/librte_ether/rte_eth_ctrl.h | 114 - 8 files changed, 1149 insertions(+), 4 deletions(-) -- 1.9.3
[dpdk-dev] [PATCH v7 2/2] app/testpmd: add test commands for RSS/FD granularity
Test commands are added to support selecting input set, or adding
new input set per different pctype.
Signed-off-by: Helin Zhang
Signed-off-by: Andrey Chilikin
---
app/test-pmd/cmdline.c | 218
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 33 +
2 files changed, 251 insertions(+)
v3 changes:
Support selecting more input set fields.
v4 changes:
Removed operation of 'delete'.
Added test commands for FD granularity.
v7 changes:
Moved the documentation as part of this patch.
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index b3c36f3..1a2cb7d 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -690,6 +690,28 @@ static void cmd_help_long_parsed(void *parsed_result,
"ipv6-frag|ipv6-tcp|ipv6-udp|ipv6-sctp|ipv6-other|l2_payload)"
" (enable|disable)\n"
"Set the global configurations of hash filters.\n\n"
+
+ "set_hash_input_set (port_id) (ipv4|ipv4-frag|"
+ "ipv4-tcp|ipv4-udp|ipv4-sctp|ipv4-other|ipv6|"
+ "ipv6-frag|ipv6-tcp|ipv6-udp|ipv6-sctp|ipv6-other|"
+ "l2_payload) (ovlan|ivlan|src-ipv4|dst-ipv4|src-ipv6|"
+ "dst-ipv6|ipv4-tos|ipv4-proto|ipv6-tc|"
+ "ipv6-next-header|udp-src-port|udp-dst-port|"
+ "tcp-src-port|tcp-dst-port|sctp-src-port|"
+ "sctp-dst-port|sctp-veri-tag|udp-key|gre-key|fld-1st|"
+ "fld-2nd|fld-3rd|fld-4th|fld-5th|fld-6th|fld-7th|"
+ "fld-8th|none) (select|add)\n"
+ "Set the input set for hash.\n\n"
+
+ "set_fdir_input_set (port_id) (ipv4|ipv4-frag|"
+ "ipv4-tcp|ipv4-udp|ipv4-sctp|ipv4-other|ipv6|"
+ "ipv6-frag|ipv6-tcp|ipv6-udp|ipv6-sctp|ipv6-other|"
+ "l2_payload) (src-ipv4|dst-ipv4|src-ipv6|dst-ipv6|"
+ "udp-src-port|udp-dst-port|tcp-src-port|tcp-dst-port|"
+ "sctp-src-port|sctp-dst-port|sctp-veri-tag|fld-1st|"
+ "fld-2nd|fld-3rd|fld-4th|fld-5th|fld-6th|fld-7th|"
+ "fld-8th|none) (select|add)\n"
+ "Set the input set for FDir.\n\n"
);
}
}
@@ -9111,6 +9133,200 @@ cmdline_parse_inst_t cmd_set_hash_global_config = {
},
};
+/* Set hash input set */
+struct cmd_set_hash_input_set_result {
+ cmdline_fixed_string_t set_hash_input_set;
+ uint8_t port_id;
+ cmdline_fixed_string_t flow_type;
+ cmdline_fixed_string_t inset_field;
+ cmdline_fixed_string_t select;
+};
+
+static enum rte_eth_input_set_field
+str2inset(char *string)
+{
+ uint16_t i;
+
+ static const struct {
+ char str[32];
+ enum rte_eth_input_set_field inset;
+ } inset_table[] = {
+ {"ovlan", RTE_ETH_INPUT_SET_L2_OUTER_VLAN},
+ {"ivlan", RTE_ETH_INPUT_SET_L2_INNER_VLAN},
+ {"src-ipv4", RTE_ETH_INPUT_SET_L3_SRC_IP4},
+ {"dst-ipv4", RTE_ETH_INPUT_SET_L3_DST_IP4},
+ {"ipv4-tos", RTE_ETH_INPUT_SET_L3_IP4_TOS},
+ {"ipv4-proto", RTE_ETH_INPUT_SET_L3_IP4_PROTO},
+ {"src-ipv6", RTE_ETH_INPUT_SET_L3_SRC_IP6},
+ {"dst-ipv6", RTE_ETH_INPUT_SET_L3_DST_IP6},
+ {"ipv6-tc", RTE_ETH_INPUT_SET_L3_IP6_TC},
+ {"ipv6-next-header", RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER},
+ {"udp-src-port", RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT},
+ {"udp-dst-port", RTE_ETH_INPUT_SET_L4_UDP_DST_PORT},
+ {"tcp-src-port", RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT},
+ {"tcp-dst-port", RTE_ETH_INPUT_SET_L4_TCP_DST_PORT},
+ {"sctp-src-port", RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT},
+ {"sctp-dst-port", RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT},
+ {"sctp-veri-tag", RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG},
+ {"udp-key", RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY},
+ {"gre-key", RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY},
+ {"fld-1st", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD},
+ {"fld-2nd", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD},
+ {"fld-3rd", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD},
+ {"fld-4th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD},
+ {"fld-5th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD},
+ {"fld-6th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD},
+ {"fld-7th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD},
+ {"fld-8th", RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD},
+ {"none", RTE_ETH_INPUT_SET_NONE},
+ };
+
+ for (i = 0; i < RTE_DIM(inset_table); i++) {
+ if (!strcmp(string, inset_table[i].str))
+
[dpdk-dev] [PATCH v7 1/2] i40e: RSS/FD granularity configuration
The default input set of fields of a received packet are loaded from firmware, which cannot be modified even users want to use different fields for RSS or flow director. Here adds more flexibilities of selecting packet fields for hash calculation or flow director for users. Signed-off-by: Helin Zhang Signed-off-by: Andrey Chilikin --- doc/guides/rel_notes/deprecation.rst | 5 + doc/guides/rel_notes/release_2_2.rst | 3 + drivers/net/i40e/i40e_ethdev.c | 742 +++ drivers/net/i40e/i40e_ethdev.h | 7 + drivers/net/i40e/i40e_fdir.c | 31 ++ lib/librte_ether/rte_eth_ctrl.h | 114 +- 6 files changed, 898 insertions(+), 4 deletions(-) v2 changes: Solved the compilation issues. v3 changes: Support selecting more input set fields. v4 changes: Removed operation of 'delete', as it is not necessary. Added FD granularity, as it is similar to RSS granularity. v5 changes: Fixed issue of generating wrong input set for registers on ipv6-udp and ipv6-tcp pc types. Added clear masking operations during checking if MASK registers are opcupied or not. Reworked several annotations. v7 changes: Modified RTE_ETH_INSET_SIZE_MAX from 128 to 1, to avoid ABI changes. Moved documentation as part of this patch. diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst index a391ff0..856cb0f 100644 --- a/doc/guides/rel_notes/deprecation.rst +++ b/doc/guides/rel_notes/deprecation.rst @@ -52,3 +52,8 @@ Deprecation Notices and table action handlers will be updated: the pipeline parameter will be added, the packets mask parameter will be either removed (for input port action handler) or made input-only. + +* ABI changes are planned in release 2.3 for macro of RTE_ETH_INSET_SIZE_MAX, + struct rte_eth_input_set_conf, to support selecting more than one input set + items, and which will affect struct rte_eth_fdir_filter_info and + struct rte_eth_hash_filter_info. diff --git a/doc/guides/rel_notes/release_2_2.rst b/doc/guides/rel_notes/release_2_2.rst index 89e4d58..2a54ce6 100644 --- a/doc/guides/rel_notes/release_2_2.rst +++ b/doc/guides/rel_notes/release_2_2.rst @@ -31,6 +31,9 @@ New Features * **Added vhost-user multiple queue support.** +* **Added RSS/FD input set granularity on Intel X710/XL710.** + + Resolved Issues --- diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 478e94d..fb262a5 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -113,6 +113,142 @@ #define I40E_PRTTSYN_TSYNENA 0x8000 #define I40E_PRTTSYN_TSYNTYPE 0x0e00 +#define I40E_PRTQF_FD_INSET(_i, _j) (0x0025 + ((_i) * 64 + (_j) * 32)) +#define I40E_GLQF_FD_MSK(_i, _j) (0x00267200 + ((_i) * 4 + (_j) * 8)) +#define I40E_GLQF_FD_MSK_FIELD 0x +#define I40E_GLQF_HASH_INSET(_i, _j) (0x00267600 + ((_i) * 4 + (_j) * 8)) +#define I40E_GLQF_HASH_MSK(_i, _j) (0x00267A00 + ((_i) * 4 + (_j) * 8)) +#define I40E_GLQF_HASH_MSK_FIELD 0x + +#define I40E_INSET_NONE0x0ULL + +/* bit0 ~ bit 7 */ +#define I40E_INSET_DMAC0x0001ULL +#define I40E_INSET_SMAC0x0002ULL +#define I40E_INSET_VLAN_OUTER 0x0004ULL +#define I40E_INSET_VLAN_INNER 0x0008ULL +#define I40E_INSET_VLAN_TUNNEL 0x0010ULL + +/* bit 8 ~ bit 15 */ +#define I40E_INSET_IPV4_SRC0x0100ULL +#define I40E_INSET_IPV4_DST0x0200ULL +#define I40E_INSET_IPV6_SRC0x0400ULL +#define I40E_INSET_IPV6_DST0x0800ULL +#define I40E_INSET_SRC_PORT0x1000ULL +#define I40E_INSET_DST_PORT0x2000ULL +#define I40E_INSET_SCTP_VT 0x4000ULL + +/* bit 16 ~ bit 31 */ +#define I40E_INSET_IPV4_TOS0x0001ULL +#define I40E_INSET_IPV4_PROTO 0x0002ULL +#define I40E_INSET_IPV4_TTL0x0004ULL +#define I40E_INSET_IPV6_TC 0x0008ULL +#define I40E_INSET_IPV6_FLOW 0x0010ULL +#define I40E_INSET_IPV6_NEXT_HDR 0x0020ULL +#define I40E_INSET_IPV6_HOP_LIMIT 0x0040ULL +#define I40E_INSET_TCP_FLAGS 0x0080ULL + +/* bit 32 ~ bit 47, tunnel fields */ +#define I40E_INSET_TUNNEL_IPV4_DST 0x0001ULL +#define I40E_INSET_TUNNEL_IPV6_DST 0x0002ULL +#define I40E_INSET_TUNNEL_DMAC 0x0004ULL +#define I40E_INSET_TUNNEL_SRC_PORT 0x0008ULL +#define I40E_INSET_TUNNEL_DST_PORT 0x0010ULL +#define I40E_INSET_TUNNEL_ID 0x0020ULL + +/* bit 48 ~ bit 55 */ +#define I40E_INSET_LAST_ETHER_TYPE 0x0001ULL + +/* bit 56 ~ bit 63, Flex Payload */ +#define I40E_INSET_FLEX_PAYLOAD_W1 0x0100ULL +#define I40E_INSET_FLEX_PAYLOAD_W2 0x02
[dpdk-dev] [PATCH v3 0/4] fm10k: add VMDQ support
> -Original Message- > From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Shaopeng He > Sent: Tuesday, October 27, 2015 5:22 PM > To: dev at dpdk.org > Subject: [dpdk-dev] [PATCH v3 0/4] fm10k: add VMDQ support > > This patch series adds VMDQ support for fm10k. > It includes the functions to configure VMDQ mode and add MAC address for > each VMDQ queue pool. > It also includes logic to do sanity check for multi-queue settings. > > Changes in v3: > - Keep device default MAC address even in VMDQ mode after > queue pool config was changed, because some applications > (e.g. vmdq_app) always need a valid MAC address there. > > Changes in v2: > - Reword some comments and commit messages > - Updated release note > > Shaopeng He (4): > fm10k: add multi-queue checking > fm10k: add VMDQ support in MAC/VLAN filter > fm10k: add VMDQ support in multi-queue configure > doc: update release note for fm10k VMDQ support > > doc/guides/rel_notes/release_2_2.rst | 5 + > drivers/net/fm10k/fm10k.h| 3 + > drivers/net/fm10k/fm10k_ethdev.c | 358 > +++ > 3 files changed, 289 insertions(+), 77 deletions(-) > > -- > 1.9.3 Acked-by: Jingjing Wu
[dpdk-dev] [PATCH v4 0/2] add selecting different GRE key length
By default, only 3 bytes of GRE key will be used for hash or FD calculation. Here adds selecting 3 or 4 bytes of GRE key for those purpose. Note that these patches are based on another patch set of "[PATCH v7 0/2] i40e: RSS/FD granularity configuration". v2 changes: Updated with RSS/FD granularity code. v3 changes: Updated with RSS/FD granularity code. Updated documentation. v4 changes: Added the update of release note and testpmd guide to the code patches separately. Updated with RSS/FD granularity code v7. Helin Zhang (2): i40e: add selecting GRE key length app/testpmd: add test commands for selecting different GRE key sizes app/test-pmd/cmdline.c | 52 + doc/guides/rel_notes/release_2_2.rst| 2 + doc/guides/testpmd_app_ug/testpmd_funcs.rst | 11 drivers/net/i40e/i40e_ethdev.c | 87 - lib/librte_ether/rte_eth_ctrl.h | 20 +++ 5 files changed, 169 insertions(+), 3 deletions(-) -- 1.9.3
[dpdk-dev] [PATCH v4 1/2] i40e: add selecting GRE key length
By default, only first 3 bytes of GRE key will be used for hash or
FD calculation. With these changes, it can select 3 or 4 bytes of
GRE key for hash or FD calculation.
Signed-off-by: Helin Zhang
Signed-off-by: Andrey Chilikin
---
doc/guides/rel_notes/release_2_2.rst | 2 +
drivers/net/i40e/i40e_ethdev.c | 87 ++--
lib/librte_ether/rte_eth_ctrl.h | 20 +
3 files changed, 106 insertions(+), 3 deletions(-)
v4 changes:
Added the release notes update to this patch directly.
diff --git a/doc/guides/rel_notes/release_2_2.rst
b/doc/guides/rel_notes/release_2_2.rst
index 2a54ce6..4f36f96 100644
--- a/doc/guides/rel_notes/release_2_2.rst
+++ b/doc/guides/rel_notes/release_2_2.rst
@@ -33,6 +33,8 @@ New Features
* **Added RSS/FD input set granularity on Intel X710/XL710.**
+* **Added selecting different GRE key length for input set on Intel
X710/XL710.**
+
Resolved Issues
---
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index fb262a5..8de8aee 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -5339,7 +5339,7 @@ i40e_pf_config_rss(struct i40e_pf *pf)
static int
i40e_tunnel_filter_param_check(struct i40e_pf *pf,
- struct rte_eth_tunnel_filter_conf *filter)
+ struct rte_eth_tunnel_filter_conf *filter)
{
if (pf == NULL || filter == NULL) {
PMD_DRV_LOG(ERR, "Invalid parameter");
@@ -5371,9 +5371,85 @@ i40e_tunnel_filter_param_check(struct i40e_pf *pf,
return 0;
}
+#define I40E_GL_PRS_FVBM_MSK_ENA 0x8000
+#define I40E_GL_PRS_FVBM(_i) (0x00269760 + ((_i) * 4))
static int
-i40e_tunnel_filter_handle(struct rte_eth_dev *dev, enum rte_filter_op
filter_op,
- void *arg)
+i40e_dev_set_gre_key_len(struct i40e_hw *hw, uint8_t len)
+{
+ uint32_t val, reg;
+ int ret = -EINVAL;
+
+ val = I40E_READ_REG(hw, I40E_GL_PRS_FVBM(2));
+ PMD_DRV_LOG(DEBUG, "Read original GL_PRS_FVBM with 0x%08x\n", val);
+
+ if (len == 3) {
+ reg = val | I40E_GL_PRS_FVBM_MSK_ENA;
+ } else if (len == 4) {
+ reg = val & ~I40E_GL_PRS_FVBM_MSK_ENA;
+ } else {
+ PMD_DRV_LOG(ERR, "Unsupported GRE key length of %u", len);
+ return ret;
+ }
+
+ if (reg != val) {
+ ret = i40e_aq_debug_write_register(hw, I40E_GL_PRS_FVBM(2),
+ reg, NULL);
+ if (ret != 0)
+ return ret;
+ } else {
+ ret = 0;
+ }
+ PMD_DRV_LOG(DEBUG, "Read modified GL_PRS_FVBM with 0x%08x\n",
+ I40E_READ_REG(hw, I40E_GL_PRS_FVBM(2)));
+
+ return ret;
+}
+
+static int
+i40e_dev_global_config_set(struct i40e_hw *hw, struct rte_eth_global_cfg *cfg)
+{
+ int ret = -EINVAL;
+
+ if (!hw || !cfg)
+ return -EINVAL;
+
+ switch (cfg->cfg_type) {
+ case RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN:
+ ret = i40e_dev_set_gre_key_len(hw, cfg->cfg.gre_key_len);
+ break;
+ default:
+ PMD_DRV_LOG(ERR, "Unknown config type %u", cfg->cfg_type);
+ break;
+ }
+
+ return ret;
+}
+
+static int
+i40e_filter_ctrl_global_config(struct rte_eth_dev *dev,
+ enum rte_filter_op filter_op,
+ void *arg)
+{
+ struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ int ret = I40E_ERR_PARAM;
+
+ switch (filter_op) {
+ case RTE_ETH_FILTER_SET:
+ ret = i40e_dev_global_config_set(hw,
+ (struct rte_eth_global_cfg *)arg);
+ break;
+ default:
+ PMD_DRV_LOG(ERR, "unknown operation %u", filter_op);
+ break;
+ }
+
+ return ret;
+}
+
+static int
+i40e_tunnel_filter_handle(struct rte_eth_dev *dev,
+ enum rte_filter_op filter_op,
+ void *arg)
{
struct rte_eth_tunnel_filter_conf *filter;
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
@@ -5388,6 +5464,7 @@ i40e_tunnel_filter_handle(struct rte_eth_dev *dev, enum
rte_filter_op filter_op,
case RTE_ETH_FILTER_NOP:
if (!(pf->flags & I40E_FLAG_VXLAN))
ret = I40E_NOT_SUPPORTED;
+ break;
case RTE_ETH_FILTER_ADD:
ret = i40e_dev_tunnel_filter_set(pf, filter, 1);
break;
@@ -6386,6 +6463,10 @@ i40e_dev_filter_ctrl(struct rte_eth_dev *dev,
return -EINVAL;
switch (filter_type) {
+ case RTE_ETH_FILTER_NONE:
+ /* For global configuration */
+ ret = i40e_filter_ctrl_global_config(dev, filter_op, arg);
+ break;
case RTE_ETH_FILTER_HASH:
[dpdk-dev] [PATCH v4 2/2] app/testpmd: add test commands for selecting different GRE key sizes
Test commands are added to support selecting differnt length of GRE key.
Signed-off-by: Helin Zhang
Signed-off-by: Andrey Chilikin
---
app/test-pmd/cmdline.c | 52 +
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 11 ++
2 files changed, 63 insertions(+)
v4 changes:
Added testpmd guide update to this patch directly.
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 1a2cb7d..cd49637 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -6645,6 +6645,57 @@ cmdline_parse_inst_t cmd_tunnel_udp_config = {
},
};
+/* *** GLOBAL CONFIG *** */
+struct cmd_global_config_result {
+ cmdline_fixed_string_t cmd;
+ uint8_t port_id;
+ cmdline_fixed_string_t cfg_type;
+ uint8_t len;
+};
+
+static void
+cmd_global_config_parsed(void *parsed_result,
+__attribute__((unused)) struct cmdline *cl,
+__attribute__((unused)) void *data)
+{
+ struct cmd_global_config_result *res = parsed_result;
+ struct rte_eth_global_cfg conf;
+ int ret;
+
+ memset(&conf, 0, sizeof(conf));
+ conf.cfg_type = RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN;
+ conf.cfg.gre_key_len = res->len;
+ ret = rte_eth_dev_filter_ctrl(res->port_id, RTE_ETH_FILTER_NONE,
+ RTE_ETH_FILTER_SET, &conf);
+ if (ret != 0)
+ printf("Global config error\n");
+}
+
+cmdline_parse_token_string_t cmd_global_config_cmd =
+ TOKEN_STRING_INITIALIZER(struct cmd_global_config_result, cmd,
+ "global_config");
+cmdline_parse_token_num_t cmd_global_config_port_id =
+ TOKEN_NUM_INITIALIZER(struct cmd_global_config_result, port_id, UINT8);
+cmdline_parse_token_string_t cmd_global_config_type =
+ TOKEN_STRING_INITIALIZER(struct cmd_global_config_result,
+ cfg_type, "gre-key-len");
+cmdline_parse_token_num_t cmd_global_config_gre_key_len =
+ TOKEN_NUM_INITIALIZER(struct cmd_global_config_result,
+ len, UINT8);
+
+cmdline_parse_inst_t cmd_global_config = {
+ .f = cmd_global_config_parsed,
+ .data = (void *)NULL,
+ .help_str = "global_config gre-key-len ",
+ .tokens = {
+ (void *)&cmd_global_config_cmd,
+ (void *)&cmd_global_config_port_id,
+ (void *)&cmd_global_config_type,
+ (void *)&cmd_global_config_gre_key_len,
+ NULL,
+ },
+};
+
/* *** CONFIGURE VM MIRROR VLAN/POOL RULE *** */
struct cmd_set_mirror_mask_result {
cmdline_fixed_string_t set;
@@ -9484,6 +9535,7 @@ cmdline_parse_ctx_t main_ctx[] = {
(cmdline_parse_inst_t *)&cmd_vf_rate_limit,
(cmdline_parse_inst_t *)&cmd_tunnel_filter,
(cmdline_parse_inst_t *)&cmd_tunnel_udp_config,
+ (cmdline_parse_inst_t *)&cmd_global_config,
(cmdline_parse_inst_t *)&cmd_set_mirror_mask,
(cmdline_parse_inst_t *)&cmd_set_mirror_link,
(cmdline_parse_inst_t *)&cmd_reset_mirror_rule,
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index f5951c0..5ed7c66 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -1810,3 +1810,14 @@ Set the input set for Fdir::
For example to add source IP to FD input set for flow type of ipv4 on port 0::
testpmd> set_fdir_input_set 0 ipv4 src-ipv4 add
+
+global_config
+~
+
+Set different GRE key length for input set::
+
+ global_config (port_id) gre-key-len (number in bytes)
+
+For example to set GRE key length for input set to 4 bytes on port 0::
+
+ testpmd> global_config 0 gre-key-len 4
--
1.9.3
[dpdk-dev] [PATCH v3] i40e: add link flow control support for FVL
Feature Add: Rx/Tx flow control support for the i40e
All the Rx/Tx LFC enable/disable operation is done by the F/W,
so PMD driver need to use the Set PHY Config AD command to trigger the PHY
to do the auto-negotiation, after the Tx/Rx pause ability is negotiated,
the F/W will help us to set the related LFC enable/disable registers.
PMD driver also need to configure the related registers to control
how often to send the pause frame and what the value in the pause frame.
Signed-off-by: Zhe Tao
---
PATCH V1: add the LFC support for i40e
PATCH v2: move the LFC parameters init to the i40e_pf_parameter_init
PATCH v3: update the release note
doc/guides/rel_notes/release_2_2.rst | 4 +
drivers/net/i40e/i40e_ethdev.c | 170 ++-
drivers/net/i40e/i40e_ethdev.h | 12 +++
3 files changed, 183 insertions(+), 3 deletions(-)
diff --git a/doc/guides/rel_notes/release_2_2.rst
b/doc/guides/rel_notes/release_2_2.rst
index bc9b00f..3475aa7 100644
--- a/doc/guides/rel_notes/release_2_2.rst
+++ b/doc/guides/rel_notes/release_2_2.rst
@@ -39,6 +39,10 @@ Drivers
Fixed i40e issue that occurred when a DPDK application didn't initialize
ports if memory wasn't available on socket 0.
+* **i40e: Add the support for link flow control.**
+
+ Add the support for link flow control on FVL.
+
* **vhost: Fixed Qemu shutdown.**
Fixed issue with libvirt ``virsh destroy`` not killing the VM.
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2dd9fdc..e68e0b7 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -81,6 +81,27 @@
#define I40E_PRE_TX_Q_CFG_WAIT_US 10 /* 10 us */
+/* Flow control default timer */
+#define I40E_DEFAULT_PAUSE_TIME 0xU
+
+/* Flow control default high water */
+#define I40E_DEFAULT_HIGH_WATER (0x1C40/1024)
+
+/* Flow control default low water */
+#define I40E_DEFAULT_LOW_WATER (0x1A40/1024)
+
+/* Flow control enable fwd bit */
+#define I40E_PRTMAC_FWD_CTRL 0x0001
+
+/* Receive Packet Buffer size */
+#define I40E_RXPBSIZE (968 * 1024)
+
+/* Kilobytes shift */
+#define I40E_KILOSHIFT 10
+
+/* Receive Average Packet Size in Byte*/
+#define I40E_PACKET_AVERAGE_SIZE 128
+
/* Mask of PF interrupt causes */
#define I40E_PFINT_ICR0_ENA_MASK ( \
I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | \
@@ -145,6 +166,8 @@ static void i40e_vlan_strip_queue_set(struct rte_eth_dev
*dev,
static int i40e_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t pvid, int on);
static int i40e_dev_led_on(struct rte_eth_dev *dev);
static int i40e_dev_led_off(struct rte_eth_dev *dev);
+static int i40e_flow_ctrl_get(struct rte_eth_dev *dev,
+ struct rte_eth_fc_conf *fc_conf);
static int i40e_flow_ctrl_set(struct rte_eth_dev *dev,
struct rte_eth_fc_conf *fc_conf);
static int i40e_priority_flow_ctrl_set(struct rte_eth_dev *dev,
@@ -272,6 +295,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
.tx_queue_release = i40e_dev_tx_queue_release,
.dev_led_on = i40e_dev_led_on,
.dev_led_off = i40e_dev_led_off,
+ .flow_ctrl_get= i40e_flow_ctrl_get,
.flow_ctrl_set= i40e_flow_ctrl_set,
.priority_flow_ctrl_set = i40e_priority_flow_ctrl_set,
.mac_addr_add = i40e_macaddr_add,
@@ -1782,12 +1806,148 @@ i40e_dev_led_off(struct rte_eth_dev *dev)
}
static int
-i40e_flow_ctrl_set(__rte_unused struct rte_eth_dev *dev,
- __rte_unused struct rte_eth_fc_conf *fc_conf)
+i40e_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
{
+ struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
+
+ fc_conf->pause_time = pf->fc_conf.pause_time;
+ fc_conf->high_water = pf->fc_conf.high_water[I40E_MAX_TRAFFIC_CLASS];
+ fc_conf->low_water = pf->fc_conf.low_water[I40E_MAX_TRAFFIC_CLASS];
+
+/* Return current mode according to actual setting*/
+ switch (hw->fc.current_mode) {
+ case I40E_FC_FULL:
+ fc_conf->mode = RTE_FC_FULL;
+ break;
+ case I40E_FC_TX_PAUSE:
+ fc_conf->mode = RTE_FC_TX_PAUSE;
+ break;
+ case I40E_FC_RX_PAUSE:
+ fc_conf->mode = RTE_FC_RX_PAUSE;
+ break;
+ case I40E_FC_NONE:
+ default:
+ fc_conf->mode = RTE_FC_NONE;
+ };
+
+ return 0;
+}
+
+static int
+i40e_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
+{
+ uint32_t mflcn_reg, fctrl_reg, reg;
+ uint32_t max_high_water;
+ uint8_t i, aq_failure;
+ int err;
+ struct i40e_hw *hw;
+ struct i40e_pf *pf;
+ enum i40e_fc_mode rte_fcmode_2_i40e_fcmode[] = {
+ [RTE_FC_NONE] = I40E_F
[dpdk-dev] [PATCH v3] i40e: add link flow control support for FVL
> -Original Message- > From: Tao, Zhe > Sent: Friday, October 30, 2015 12:58 PM > To: dev at dpdk.org > Cc: Tao, Zhe; Wu, Jingjing > Subject: [dpdk-dev][PATCH v3] i40e: add link flow control support for FVL > > Feature Add: Rx/Tx flow control support for the i40e > > All the Rx/Tx LFC enable/disable operation is done by the F/W, so PMD driver > need to use the Set PHY Config AD command to trigger the PHY to do the > auto-negotiation, after the Tx/Rx pause ability is negotiated, the F/W will > help us to set the related LFC enable/disable registers. > PMD driver also need to configure the related registers to control how often > to send the pause frame and what the value in the pause frame. > > Signed-off-by: Zhe Tao > --- > Acked-by: Jingjing Wu > PATCH V1: add the LFC support for i40e > > PATCH v2: move the LFC parameters init to the i40e_pf_parameter_init > > PATCH v3: update the release note > > doc/guides/rel_notes/release_2_2.rst | 4 + > drivers/net/i40e/i40e_ethdev.c | 170 > ++- > drivers/net/i40e/i40e_ethdev.h | 12 +++ > 3 files changed, 183 insertions(+), 3 deletions(-)
[dpdk-dev] [PATCH v2 00/11] interrupt mode for i40e
v2 change: - rebase code base - rework to depend on one previous patch patch http://dpdk.org/dev/patchwork/patch/7504/ - always set DIS_AUTOMASK_* bit in PF to avoid ENA flag auto-clear This patch series contains four major parts. 1. always reserve vector zero for misc cause in vfio mapping 2. add api to declare the capability of multiple interrupt vector support 3. fix the rx interrupt compatible issue with mbox in ixgbe/igb IOV-PF 4. add rx interrupt support in i40e PF and VF Cunming Liang (11): eal/linux: vfio map misc intr to vector zero ixgbe: reserve intr vector zero for misc cause igb: reserve intr vector zero for misc cause eal/linux: not allow to enable zero intr efd eal/linux: add intr api to report multi-vector capability ixgbe: fix rx intr compatible issue with PF mbox ixgbevf: cleanup unnecessary interrupt handler igb: fix rx intr compatible issue with PF mbox i40e: add rx interrupt support i40evf: add rx interrupt support doc: release note update for intr mode doc/guides/rel_notes/release_2_2.rst | 4 + drivers/net/e1000/igb_ethdev.c | 63 +++- drivers/net/i40e/i40e_ethdev.c | 374 + drivers/net/i40e/i40e_ethdev.h | 17 + drivers/net/i40e/i40e_ethdev_vf.c | 143 +++- drivers/net/i40e/i40e_pf.c | 7 +- drivers/net/ixgbe/ixgbe_ethdev.c | 144 +++- .../bsdapp/eal/include/exec-env/rte_interrupts.h | 3 +- lib/librte_eal/linuxapp/eal/eal_interrupts.c | 35 +- .../linuxapp/eal/include/exec-env/rte_interrupts.h | 16 +- lib/librte_eal/linuxapp/eal/rte_eal_version.map| 7 + 11 files changed, 612 insertions(+), 201 deletions(-) -- 2.4.3
[dpdk-dev] [PATCH v2 01/11] eal/linux: vfio map misc intr to vector zero
During VFIO_DEVICE_SET_IRQS, the previous order is {Q0_fd, ... Qn_fd, misc_fd}.
The vector number of misc is indeterminable which is ugly to some NIC(e.g.
i40e, fm10k).
The patch adjusts the order in {misc_fd, Q0_fd, ... Qn_fd}, always reserve the
first vector to misc interrupt.
Signed-off-by: Cunming Liang
---
lib/librte_eal/linuxapp/eal/eal_interrupts.c | 18 --
.../linuxapp/eal/include/exec-env/rte_interrupts.h | 3 +++
2 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
index 078318c..8e76a7a 100644
--- a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
+++ b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
@@ -300,8 +300,10 @@ vfio_enable_msix(struct rte_intr_handle *intr_handle) {
irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;
irq_set->start = 0;
fd_ptr = (int *) &irq_set->data;
- memcpy(fd_ptr, intr_handle->efds, sizeof(intr_handle->efds));
- fd_ptr[intr_handle->max_intr - 1] = intr_handle->fd;
+ fd_ptr[MISC_VEC_ID] = intr_handle->fd;
+ /* follow up with misc(0) interrupt */
+ memcpy(&fd_ptr[RX_VEC_START], intr_handle->efds,
+ sizeof(*intr_handle->efds) * intr_handle->nb_efd);
ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
@@ -1068,10 +1070,13 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle,
int epfd,
struct rte_epoll_event *rev;
struct rte_epoll_data *epdata;
int epfd_op;
+ unsigned int efd_idx;
int rc = 0;
+ efd_idx = (vec >= RX_VEC_START) ? (vec - RX_VEC_START) : vec;
+
if (!intr_handle || intr_handle->nb_efd == 0 ||
- vec >= intr_handle->nb_efd) {
+ efd_idx >= intr_handle->nb_efd) {
RTE_LOG(ERR, EAL, "Wrong intr vector number.\n");
return -EPERM;
}
@@ -1079,7 +1084,7 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle, int
epfd,
switch (op) {
case RTE_INTR_EVENT_ADD:
epfd_op = EPOLL_CTL_ADD;
- rev = &intr_handle->elist[vec];
+ rev = &intr_handle->elist[efd_idx];
if (rev->status != RTE_EPOLL_INVALID) {
RTE_LOG(INFO, EAL, "Event already been added.\n");
return -EEXIST;
@@ -1091,7 +1096,8 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle, int
epfd,
epdata->data = data;
epdata->cb_fun = (rte_intr_event_cb_t)eal_intr_proc_rxtx_intr;
epdata->cb_arg = (void *)intr_handle;
- rc = rte_epoll_ctl(epfd, epfd_op, intr_handle->efds[vec], rev);
+ rc = rte_epoll_ctl(epfd, epfd_op,
+ intr_handle->efds[efd_idx], rev);
if (!rc)
RTE_LOG(DEBUG, EAL,
"efd %d associated with vec %d added on epfd %d"
@@ -1101,7 +1107,7 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle, int
epfd,
break;
case RTE_INTR_EVENT_DEL:
epfd_op = EPOLL_CTL_DEL;
- rev = &intr_handle->elist[vec];
+ rev = &intr_handle->elist[efd_idx];
if (rev->status == RTE_EPOLL_INVALID) {
RTE_LOG(INFO, EAL, "Event does not exist.\n");
return -EPERM;
diff --git a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
index 45071b7..b8fd318 100644
--- a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
+++ b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
@@ -77,6 +77,9 @@ struct rte_epoll_event {
struct rte_epoll_data epdata;
};
+#define MISC_VEC_ID(0)
+#define RX_VEC_START (MISC_VEC_ID + 1)
+
/** Handle for interrupts. */
struct rte_intr_handle {
union {
--
2.4.3
[dpdk-dev] [PATCH v2 04/11] eal/linux: not allow to enable zero intr efd
The patch adds condition check to avoid enable nothing.
In disable state, both max_intr and nb_efd are zero.
Signed-off-by: Cunming Liang
---
lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h | 3 ++-
lib/librte_eal/linuxapp/eal/eal_interrupts.c | 8 +++-
lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h | 3 ++-
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h
b/lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h
index 88d4ae1..cd8817d 100644
--- a/lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h
+++ b/lib/librte_eal/bsdapp/eal/include/exec-env/rte_interrupts.h
@@ -82,8 +82,9 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle,
*
* @param intr_handle
* Pointer to the interrupt handle.
- * @param nb_vec
+ * @param nb_efd
* Number of interrupt vector trying to enable.
+ * The value 0 is not allowed.
* @return
* - On success, zero.
* - On failure, a negative value.
diff --git a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
index 8e76a7a..96226d6 100644
--- a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
+++ b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
@@ -45,6 +45,7 @@
#include
#include
#include
+#include
#include
#include
@@ -1132,6 +1133,8 @@ rte_intr_efd_enable(struct rte_intr_handle *intr_handle,
uint32_t nb_efd)
int fd;
uint32_t n = RTE_MIN(nb_efd, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID);
+ assert(nb_efd != 0);
+
if (intr_handle->type == RTE_INTR_HANDLE_VFIO_MSIX) {
for (i = 0; i < n; i++) {
fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
@@ -1188,5 +1191,8 @@ rte_intr_dp_is_en(struct rte_intr_handle *intr_handle)
int
rte_intr_allow_others(struct rte_intr_handle *intr_handle)
{
- return !!(intr_handle->max_intr - intr_handle->nb_efd);
+ if (!rte_intr_dp_is_en(intr_handle))
+ return 1;
+ else
+ return !!(intr_handle->max_intr - intr_handle->nb_efd);
}
diff --git a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
index b8fd318..6a2f495 100644
--- a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
+++ b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
@@ -176,8 +176,9 @@ rte_intr_rx_ctl(struct rte_intr_handle *intr_handle,
*
* @param intr_handle
* Pointer to the interrupt handle.
- * @param nb_vec
+ * @param nb_efd
* Number of interrupt vector trying to enable.
+ * The value 0 is not allowed.
* @return
* - On success, zero.
* - On failure, a negative value.
--
2.4.3
[dpdk-dev] [PATCH v2 02/11] ixgbe: reserve intr vector zero for misc cause
According to the VFIO interrupt mapping, the interrupt vector id for rxq starts
from RX_VEC_START.
It doesn't impact the UIO cases.
Signed-off-by: Cunming Liang
---
drivers/net/ixgbe/ixgbe_ethdev.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 4373661..4e1467c 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -4275,7 +4275,8 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
struct ixgbe_hw *hw =
IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- uint32_t queue_id, vec = 0;
+ uint32_t queue_id, base = MISC_VEC_ID;
+ uint32_t vec = MISC_VEC_ID;
uint32_t mask;
uint32_t gpie;
@@ -4285,6 +4286,9 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
if (!rte_intr_dp_is_en(intr_handle))
return;
+ if (rte_intr_allow_others(intr_handle))
+ vec = base = RX_VEC_START;
+
/* setup GPIE for MSI-x mode */
gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
gpie |= IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
@@ -4308,23 +4312,23 @@ ixgbe_configure_msix(struct rte_eth_dev *dev)
/* by default, 1:1 mapping */
ixgbe_set_ivar_map(hw, 0, queue_id, vec);
intr_handle->intr_vec[queue_id] = vec;
- if (vec < intr_handle->nb_efd - 1)
+ if (vec < base + intr_handle->nb_efd - 1)
vec++;
}
switch (hw->mac.type) {
case ixgbe_mac_82598EB:
ixgbe_set_ivar_map(hw, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
- intr_handle->max_intr - 1);
+ MISC_VEC_ID);
break;
case ixgbe_mac_82599EB:
case ixgbe_mac_X540:
- ixgbe_set_ivar_map(hw, -1, 1, intr_handle->max_intr - 1);
+ ixgbe_set_ivar_map(hw, -1, 1, MISC_VEC_ID);
break;
default:
break;
}
- IXGBE_WRITE_REG(hw, IXGBE_EITR(queue_id),
+ IXGBE_WRITE_REG(hw, IXGBE_EITR(MISC_VEC_ID),
IXGBE_MIN_INTER_INTERRUPT_INTERVAL_DEFAULT & 0xFFF);
/* set up to autoclear timer, and the vectors */
--
2.4.3
[dpdk-dev] [PATCH v2 03/11] igb: reserve intr vector zero for misc cause
According to the VFIO interrupt mapping, the interrupt vector id for rxq starts
from RX_VEC_START.
It doesn't impact the UIO cases.
Signed-off-by: Cunming Liang
---
drivers/net/e1000/igb_ethdev.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
index 3ab082e..b3a802f 100644
--- a/drivers/net/e1000/igb_ethdev.c
+++ b/drivers/net/e1000/igb_ethdev.c
@@ -4213,7 +4213,10 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
uint32_t tmpval, regval, intr_mask;
struct e1000_hw *hw =
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- uint32_t vec = 0;
+ uint32_t vec = MISC_VEC_ID;
+ uint32_t base = MISC_VEC_ID;
+ uint32_t misc_shift = 0;
+
struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
/* won't configure msix register if no mapping is done
@@ -4222,6 +4225,11 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
if (!rte_intr_dp_is_en(intr_handle))
return;
+ if (rte_intr_allow_others(intr_handle)) {
+ vec = base = RX_VEC_START;
+ misc_shift = 1;
+ }
+
/* set interrupt vector for other causes */
if (hw->mac.type == e1000_82575) {
tmpval = E1000_READ_REG(hw, E1000_CTRL_EXT);
@@ -4250,8 +4258,8 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
E1000_GPIE_PBA | E1000_GPIE_EIAME |
E1000_GPIE_NSICR);
-
- intr_mask = (1 << intr_handle->max_intr) - 1;
+ intr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<
+ misc_shift;
regval = E1000_READ_REG(hw, E1000_EIAC);
E1000_WRITE_REG(hw, E1000_EIAC, regval | intr_mask);
@@ -4265,14 +4273,15 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)
/* use EIAM to auto-mask when MSI-X interrupt
* is asserted, this saves a register write for every interrupt
*/
- intr_mask = (1 << intr_handle->nb_efd) - 1;
+ intr_mask = RTE_LEN2MASK(intr_handle->nb_efd, uint32_t) <<
+ misc_shift;
regval = E1000_READ_REG(hw, E1000_EIAM);
E1000_WRITE_REG(hw, E1000_EIAM, regval | intr_mask);
for (queue_id = 0; queue_id < dev->data->nb_rx_queues; queue_id++) {
eth_igb_assign_msix_vector(hw, 0, queue_id, vec);
intr_handle->intr_vec[queue_id] = vec;
- if (vec < intr_handle->nb_efd - 1)
+ if (vec < base + intr_handle->nb_efd - 1)
vec++;
}
--
2.4.3
[dpdk-dev] [PATCH v2 05/11] eal/linux: add intr api to report multi-vector capability
VFIO allows multiple MSI-X vector, others doesn't, but maybe will allow it in
the future.
Device drivers need to be aware of the capability.
It's better to avoid condition check on interrupt type(VFIO) everywhere, instead
a capability api is more flexible for the condition change.
Signed-off-by: Cunming Liang
---
lib/librte_eal/linuxapp/eal/eal_interrupts.c | 9 +
lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h | 10 ++
lib/librte_eal/linuxapp/eal/rte_eal_version.map | 7 +++
3 files changed, 26 insertions(+)
diff --git a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
index 96226d6..c90bc4d 100644
--- a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
+++ b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
@@ -1196,3 +1196,12 @@ rte_intr_allow_others(struct rte_intr_handle
*intr_handle)
else
return !!(intr_handle->max_intr - intr_handle->nb_efd);
}
+
+int
+rte_intr_cap_multiple(struct rte_intr_handle *intr_handle)
+{
+ if (intr_handle->type == RTE_INTR_HANDLE_VFIO_MSIX)
+ return 1;
+
+ return 0;
+}
diff --git a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
index 6a2f495..a7b2be4 100644
--- a/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
+++ b/lib/librte_eal/linuxapp/eal/include/exec-env/rte_interrupts.h
@@ -215,4 +215,14 @@ rte_intr_dp_is_en(struct rte_intr_handle *intr_handle);
int
rte_intr_allow_others(struct rte_intr_handle *intr_handle);
+/**
+ * The multiple interrupt vector capability of interrupt handle instance.
+ * It returns zero if no multiple interrupt vector support.
+ *
+ * @param intr_handle
+ * Pointer to the interrupt handle.
+ */
+int
+rte_intr_cap_multiple(struct rte_intr_handle *intr_handle);
+
#endif /* _RTE_LINUXAPP_INTERRUPTS_H_ */
diff --git a/lib/librte_eal/linuxapp/eal/rte_eal_version.map
b/lib/librte_eal/linuxapp/eal/rte_eal_version.map
index dbb8fa1..cb9f4d6 100644
--- a/lib/librte_eal/linuxapp/eal/rte_eal_version.map
+++ b/lib/librte_eal/linuxapp/eal/rte_eal_version.map
@@ -128,3 +128,10 @@ DPDK_2.1 {
rte_memzone_free;
} DPDK_2.0;
+
+DPDK_2.2 {
+ global:
+
+ rte_intr_cap_multiple;
+
+} DPDK_2.1;
\ No newline at end of file
--
2.4.3
[dpdk-dev] [PATCH v2 06/11] ixgbe: fix rx intr compatible issue with PF mbox
When ixgbe runs as a PF, mbox interrupt is prerequisite to make VF start
normally.
And PF sometimes won't 'dev_start', so the mbox interrupt register during
'dev_init' is required.
The patch rolls back the interrupt register for mbox,lsc to the 'dev_init'.
As UIO doesn't support multiple vector, mbox has to occupy the only one.
It adds condition check on 'dev_start', rxq interrupt is not allowed when PF
running in IOV mode via UIO.
Signed-off-by: Cunming Liang
---
drivers/net/ixgbe/ixgbe_ethdev.c | 45 +++-
1 file changed, 31 insertions(+), 14 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 4e1467c..366923f 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -1032,6 +1032,13 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev)
eth_dev->data->port_id, pci_dev->id.vendor_id,
pci_dev->id.device_id);
+ rte_intr_callback_register(&pci_dev->intr_handle,
+ ixgbe_dev_interrupt_handler,
+ (void *)eth_dev);
+
+ /* enable uio/vfio intr/eventfd mapping */
+ rte_intr_enable(&pci_dev->intr_handle);
+
/* enable support intr */
ixgbe_enable_intr(eth_dev);
@@ -1708,17 +1715,19 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
ixgbe_pf_host_configure(dev);
/* check and configure queue intr-vector mapping */
- if (dev->data->dev_conf.intr_conf.rxq != 0)
+ if (((RTE_ETH_DEV_SRIOV(dev).active &&
+ rte_intr_cap_multiple(intr_handle)) ||
+!RTE_ETH_DEV_SRIOV(dev).active) &&
+ dev->data->dev_conf.intr_conf.rxq != 0) {
intr_vector = dev->data->nb_rx_queues;
-
- if (rte_intr_efd_enable(intr_handle, intr_vector))
- return -1;
+ if (rte_intr_efd_enable(intr_handle, intr_vector))
+ return -1;
+ }
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
- dev->data->nb_rx_queues * sizeof(int),
- 0);
+ dev->data->nb_rx_queues * sizeof(int), 0);
if (intr_handle->intr_vec == NULL) {
PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
" intr_vec\n", dev->data->nb_rx_queues);
@@ -1805,20 +1814,22 @@ ixgbe_dev_start(struct rte_eth_dev *dev)
skip_link_setup:
- /* check if lsc interrupt is enabled */
- if (dev->data->dev_conf.intr_conf.lsc != 0) {
- if (rte_intr_allow_others(intr_handle)) {
- rte_intr_callback_register(intr_handle,
- ixgbe_dev_interrupt_handler,
- (void *)dev);
+ if (rte_intr_allow_others(intr_handle)) {
+ /* check if lsc interrupt is enabled */
+ if (dev->data->dev_conf.intr_conf.lsc != 0)
ixgbe_dev_lsc_interrupt_setup(dev);
- } else
+ } else {
+ rte_intr_callback_unregister(intr_handle,
+ixgbe_dev_interrupt_handler,
+(void *)dev);
+ if (dev->data->dev_conf.intr_conf.lsc != 0)
PMD_INIT_LOG(INFO, "lsc won't enable because of"
" no intr multiplex\n");
}
/* check if rxq interrupt is enabled */
- if (dev->data->dev_conf.intr_conf.rxq != 0)
+ if (dev->data->dev_conf.intr_conf.rxq != 0 &&
+ rte_intr_dp_is_en(intr_handle))
ixgbe_dev_rxq_interrupt_setup(dev);
/* enable uio/vfio intr/eventfd mapping */
@@ -1930,6 +1941,12 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)
memset(filter_info->fivetuple_mask, 0,
sizeof(uint32_t) * IXGBE_5TUPLE_ARRAY_SIZE);
+ if (!rte_intr_allow_others(intr_handle))
+ /* resume to the default handler */
+ rte_intr_callback_register(intr_handle,
+ ixgbe_dev_interrupt_handler,
+ (void *)dev);
+
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
--
2.4.3
[dpdk-dev] [PATCH v2 07/11] ixgbevf: cleanup unnecessary interrupt handler
As ixgbe vf doesn't support lsc, the patch removes those unused code.
In addition, it does some tiny cleanup.
Signed-off-by: Cunming Liang
---
drivers/net/ixgbe/ixgbe_ethdev.c | 85 +---
1 file changed, 10 insertions(+), 75 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 366923f..794171c 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -206,8 +206,6 @@ static void ixgbe_dcb_init(struct ixgbe_hw *hw,struct
ixgbe_dcb_config *dcb_conf
/* For Virtual Function support */
static int eth_ixgbevf_dev_init(struct rte_eth_dev *eth_dev);
static int eth_ixgbevf_dev_uninit(struct rte_eth_dev *eth_dev);
-static int ixgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev);
-static int ixgbevf_dev_interrupt_action(struct rte_eth_dev *dev);
static int ixgbevf_dev_configure(struct rte_eth_dev *dev);
static int ixgbevf_dev_start(struct rte_eth_dev *dev);
static void ixgbevf_dev_stop(struct rte_eth_dev *dev);
@@ -223,8 +221,6 @@ static void ixgbevf_vlan_strip_queue_set(struct rte_eth_dev
*dev,
uint16_t queue, int on);
static void ixgbevf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on);
-static void ixgbevf_dev_interrupt_handler(struct rte_intr_handle *handle,
- void *param);
static int ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev,
uint16_t queue_id);
static int ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev,
@@ -2681,30 +2677,6 @@ ixgbe_dev_interrupt_get_status(struct rte_eth_dev *dev)
return 0;
}
-static int
-ixgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev)
-{
- uint32_t eicr;
- struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- struct ixgbe_interrupt *intr =
- IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private);
-
- /* clear all cause mask */
- ixgbevf_intr_disable(hw);
-
- /* read-on-clear nic registers here */
- eicr = IXGBE_READ_REG(hw, IXGBE_VTEICR);
- PMD_DRV_LOG(INFO, "eicr %x", eicr);
-
- intr->flags = 0;
-
- /* set flag for async link update */
- if (eicr & IXGBE_EICR_LSC)
- intr->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
-
- return 0;
-}
-
/**
* It gets and then prints the link status.
*
@@ -2800,18 +2772,6 @@ ixgbe_dev_interrupt_action(struct rte_eth_dev *dev)
return 0;
}
-static int
-ixgbevf_dev_interrupt_action(struct rte_eth_dev *dev)
-{
- struct ixgbe_hw *hw =
- IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-
- PMD_DRV_LOG(DEBUG, "enable intr immediately");
- ixgbevf_intr_enable(hw);
- rte_intr_enable(&dev->pci_dev->intr_handle);
- return 0;
-}
-
/**
* Interrupt handler which shall be registered for alarm callback for delayed
* handling specific interrupt to wait for the stable nic state. As the
@@ -2874,16 +2834,6 @@ ixgbe_dev_interrupt_handler(__rte_unused struct
rte_intr_handle *handle,
ixgbe_dev_interrupt_action(dev);
}
-static void
-ixgbevf_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,
- void *param)
-{
- struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
-
- ixgbevf_dev_interrupt_get_status(dev);
- ixgbevf_dev_interrupt_action(dev);
-}
-
static int
ixgbe_dev_led_on(struct rte_eth_dev *dev)
{
@@ -3492,11 +3442,11 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)
ixgbevf_dev_rxtx_start(dev);
/* check and configure queue intr-vector mapping */
- if (dev->data->dev_conf.intr_conf.rxq != 0)
+ if (dev->data->dev_conf.intr_conf.rxq != 0) {
intr_vector = dev->data->nb_rx_queues;
-
- if (rte_intr_efd_enable(intr_handle, intr_vector))
- return -1;
+ if (rte_intr_efd_enable(intr_handle, intr_vector))
+ return -1;
+ }
if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
@@ -3510,16 +3460,6 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)
}
ixgbevf_configure_msix(dev);
- if (dev->data->dev_conf.intr_conf.lsc != 0) {
- if (rte_intr_allow_others(intr_handle))
- rte_intr_callback_register(intr_handle,
- ixgbevf_dev_interrupt_handler,
- (void *)dev);
- else
- PMD_INIT_LOG(INFO, "lsc won't enable because of"
-" no intr multiplex\n");
- }
-
rte_intr_enable(intr_handle);
/* Re-enable interrupt for VF */
@@ -3565,7 +3505,6 @@ static void
ixgbevf_dev_close(struct rte_eth_dev *dev)
{
struct ixgbe_hw *hw = IXGBE_DEV_PRI
[dpdk-dev] [PATCH v2 08/11] igb: fix rx intr compatible issue with PF mbox
When igb runs as a PF, mbox interrupt is prerequisite to make VF start normally.
And PF sometimes won't 'dev_start', so the mbox interrupt register during
'dev_init' is required.
The patch rolls back the interrupt register for mbox,lsc to the 'dev_init'.
As UIO doesn't support multiple vector, mbox has to occupy the only one.
It adds condition check on 'dev_start', rxq interrupt is not allowed when PF
running in IOV mode via UIO.
Signed-off-by: Cunming Liang
---
drivers/net/e1000/igb_ethdev.c | 44 +-
1 file changed, 31 insertions(+), 13 deletions(-)
diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
index b3a802f..2494fc8 100644
--- a/drivers/net/e1000/igb_ethdev.c
+++ b/drivers/net/e1000/igb_ethdev.c
@@ -650,6 +650,13 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev)
eth_dev->data->port_id, pci_dev->id.vendor_id,
pci_dev->id.device_id);
+ rte_intr_callback_register(&pci_dev->intr_handle,
+ eth_igb_interrupt_handler,
+ (void *)eth_dev);
+
+ /* enable uio/vfio intr/eventfd mapping */
+ rte_intr_enable(&pci_dev->intr_handle);
+
/* enable support intr */
igb_intr_enable(eth_dev);
@@ -928,13 +935,16 @@ eth_igb_start(struct rte_eth_dev *dev)
igb_pf_host_configure(dev);
/* check and configure queue intr-vector mapping */
- if (dev->data->dev_conf.intr_conf.rxq != 0)
+ if (((RTE_ETH_DEV_SRIOV(dev).active &&
+ rte_intr_cap_multiple(intr_handle)) ||
+!RTE_ETH_DEV_SRIOV(dev).active) &&
+ dev->data->dev_conf.intr_conf.rxq != 0) {
intr_vector = dev->data->nb_rx_queues;
+ if (rte_intr_efd_enable(intr_handle, intr_vector))
+ return -1;
+ }
- if (rte_intr_efd_enable(intr_handle, intr_vector))
- return -1;
-
- if (rte_intr_dp_is_en(intr_handle)) {
+ if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
intr_handle->intr_vec =
rte_zmalloc("intr_vec",
dev->data->nb_rx_queues * sizeof(int), 0);
@@ -1027,20 +1037,22 @@ eth_igb_start(struct rte_eth_dev *dev)
}
e1000_setup_link(hw);
- /* check if lsc interrupt feature is enabled */
- if (dev->data->dev_conf.intr_conf.lsc != 0) {
- if (rte_intr_allow_others(intr_handle)) {
- rte_intr_callback_register(intr_handle,
- eth_igb_interrupt_handler,
- (void *)dev);
+ if (rte_intr_allow_others(intr_handle)) {
+ /* check if lsc interrupt is enabled */
+ if (dev->data->dev_conf.intr_conf.lsc != 0)
eth_igb_lsc_interrupt_setup(dev);
- } else
+ } else {
+ rte_intr_callback_unregister(intr_handle,
+eth_igb_interrupt_handler,
+(void *)dev);
+ if (dev->data->dev_conf.intr_conf.lsc != 0)
PMD_INIT_LOG(INFO, "lsc won't enable because of"
" no intr multiplex\n");
}
/* check if rxq interrupt is enabled */
- if (dev->data->dev_conf.intr_conf.rxq != 0)
+ if (dev->data->dev_conf.intr_conf.rxq != 0 &&
+ rte_intr_dp_is_en(intr_handle))
eth_igb_rxq_interrupt_setup(dev);
/* enable uio/vfio intr/eventfd mapping */
@@ -1133,6 +1145,12 @@ eth_igb_stop(struct rte_eth_dev *dev)
}
filter_info->twotuple_mask = 0;
+ if (!rte_intr_allow_others(intr_handle))
+ /* resume to the default handler */
+ rte_intr_callback_register(intr_handle,
+ eth_igb_interrupt_handler,
+ (void *)dev);
+
/* Clean datapath event and queue/vec mapping */
rte_intr_efd_disable(intr_handle);
if (intr_handle->intr_vec != NULL) {
--
2.4.3
[dpdk-dev] [PATCH v2 09/11] i40e: add rx interrupt support
v2 changes:
- add write flush
- always set DIS_AUTOMASK_* bit
The patch enables rx interrupt support on i40e PF non-IOV mode.
Per queue rx interrupt works on vfio, however on uio, all rx queues share one
interrupt vector.
Signed-off-by: Cunming Liang
---
drivers/net/i40e/i40e_ethdev.c | 342 +++--
drivers/net/i40e/i40e_ethdev.h | 2 +
drivers/net/i40e/i40e_pf.c | 2 +
3 files changed, 298 insertions(+), 48 deletions(-)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2dd9fdc..d4a663c 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -39,6 +39,7 @@
#include
#include
#include
+#include
#include
#include
@@ -174,7 +175,7 @@ static void i40e_stat_update_48(struct i40e_hw *hw,
bool offset_loaded,
uint64_t *offset,
uint64_t *stat);
-static void i40e_pf_config_irq0(struct i40e_hw *hw);
+static void i40e_pf_config_irq0(struct i40e_hw *hw, bool no_queue);
static void i40e_dev_interrupt_handler(
__rte_unused struct rte_intr_handle *handle, void *param);
static int i40e_res_pool_init(struct i40e_res_pool_info *pool,
@@ -232,6 +233,10 @@ static int i40e_timesync_read_rx_timestamp(struct
rte_eth_dev *dev,
uint32_t flags);
static int i40e_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
struct timespec *timestamp);
+static int i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev,
+uint16_t queue_id);
+static int i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev,
+ uint16_t queue_id);
static const struct rte_pci_id pci_id_i40e_map[] = {
#define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
@@ -265,6 +270,8 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
.tx_queue_start = i40e_dev_tx_queue_start,
.tx_queue_stop= i40e_dev_tx_queue_stop,
.rx_queue_setup = i40e_dev_rx_queue_setup,
+ .rx_queue_intr_enable = i40e_dev_rx_queue_intr_enable,
+ .rx_queue_intr_disable= i40e_dev_rx_queue_intr_disable,
.rx_queue_release = i40e_dev_rx_queue_release,
.rx_queue_count = i40e_dev_rx_queue_count,
.rx_descriptor_done = i40e_dev_rx_descriptor_done,
@@ -579,7 +586,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)
i40e_dev_interrupt_handler, (void *)dev);
/* configure and enable device interrupt */
- i40e_pf_config_irq0(hw);
+ i40e_pf_config_irq0(hw, TRUE);
i40e_pf_enable_irq0(hw);
/* enable uio intr after callback register */
@@ -718,6 +725,8 @@ err:
void
i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)
{
+ struct rte_eth_dev *dev = vsi->adapter->eth_dev;
+ struct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;
struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
uint16_t msix_vect = vsi->msix_intr;
uint16_t i;
@@ -729,15 +738,26 @@ i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)
}
if (vsi->type != I40E_VSI_SRIOV) {
- I40E_WRITE_REG(hw, I40E_PFINT_LNKLSTN(msix_vect - 1), 0);
- I40E_WRITE_REG(hw, I40E_PFINT_ITRN(I40E_ITR_INDEX_DEFAULT,
- msix_vect - 1), 0);
+ if (!rte_intr_allow_others(intr_handle)) {
+ I40E_WRITE_REG(hw, I40E_PFINT_LNKLST0,
+ I40E_PFINT_LNKLST0_FIRSTQ_INDX_MASK);
+ I40E_WRITE_REG(hw,
+ I40E_PFINT_ITR0(I40E_ITR_INDEX_DEFAULT),
+ 0);
+ } else {
+ I40E_WRITE_REG(hw, I40E_PFINT_LNKLSTN(msix_vect - 1),
+ I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK);
+ I40E_WRITE_REG(hw,
+ I40E_PFINT_ITRN(I40E_ITR_INDEX_DEFAULT,
+ msix_vect - 1), 0);
+ }
} else {
uint32_t reg;
reg = (hw->func_caps.num_msix_vectors_vf - 1) *
vsi->user_param + (msix_vect - 1);
- I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg), 0);
+ I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg),
+ I40E_VPINT_LNKLSTN_FIRSTQ_INDX_MASK);
}
I40E_WRITE_FLUSH(hw);
}
@@ -752,29 +772,26 @@ i40e_calc_itr_interval(int16_t interval)
return (interval/2);
}
-void
-i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)
+static void
+__vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t msix_vect,
+ int base_queue, int nb_queue
[dpdk-dev] [PATCH v2 10/11] i40evf: add rx interrupt support
v2 changes:
- turn on intr only when rxq flag is set
- rework base on patch http://dpdk.org/dev/patchwork/patch/7504/
The patch enables rx interrupt support on i40e VF and some necessary change on
PF IOV mode to support VF.
On PF side, running in IOV mode via uio won't allow rx interrupt which is
exclusive with mbox interrupt
in single vector competition.
On VF side, one single vector is shared for all the rx queues.
Signed-off-by: Cunming Liang
---
drivers/net/i40e/i40e_ethdev.c| 38 +-
drivers/net/i40e/i40e_ethdev.h| 15
drivers/net/i40e/i40e_ethdev_vf.c | 143 +++---
drivers/net/i40e/i40e_pf.c| 5 --
4 files changed, 166 insertions(+), 35 deletions(-)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index d4a663c..40ed852 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -75,11 +75,6 @@
/* Maximun number of VSI */
#define I40E_MAX_NUM_VSIS (384UL)
-/* Default queue interrupt throttling time in microseconds */
-#define I40E_ITR_INDEX_DEFAULT 0
-#define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
-#define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */
-
#define I40E_PRE_TX_Q_CFG_WAIT_US 10 /* 10 us */
/* Mask of PF interrupt causes */
@@ -762,16 +757,6 @@ i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)
I40E_WRITE_FLUSH(hw);
}
-static inline uint16_t
-i40e_calc_itr_interval(int16_t interval)
-{
- if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX)
- interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
-
- /* Convert to hardware count, as writing each 1 represents 2 us */
- return (interval/2);
-}
-
static void
__vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t msix_vect,
int base_queue, int nb_queue)
@@ -822,13 +807,24 @@ __vsi_queues_bind_intr(struct i40e_vsi *vsi, uint16_t
msix_vect,
} else {
uint32_t reg;
- /* num_msix_vectors_vf needs to minus irq0 */
- reg = (hw->func_caps.num_msix_vectors_vf - 1) *
- vsi->user_param + (msix_vect - 1);
+ if (msix_vect == MISC_VEC_ID) {
+ I40E_WRITE_REG(hw,
+ I40E_VPINT_LNKLST0(vsi->user_param),
+ (base_queue <<
+ I40E_VPINT_LNKLST0_FIRSTQ_INDX_SHIFT) |
+ (0x0 <<
+ I40E_VPINT_LNKLST0_FIRSTQ_TYPE_SHIFT));
+ } else {
+ /* num_msix_vectors_vf needs to minus irq0 */
+ reg = (hw->func_caps.num_msix_vectors_vf - 1) *
+ vsi->user_param + (msix_vect - 1);
- I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg), (base_queue <<
- I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT) |
- (0x0 << I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT));
+ I40E_WRITE_REG(hw, I40E_VPINT_LNKLSTN(reg),
+ (base_queue <<
+ I40E_VPINT_LNKLSTN_FIRSTQ_INDX_SHIFT) |
+ (0x0 <<
+ I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT));
+ }
}
I40E_WRITE_FLUSH(hw);
diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index 20d52f8..eeff6d7 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -156,6 +156,11 @@ enum i40e_flxpld_layer_idx {
(1ULL << I40E_FILTER_PCTYPE_FCOE_OTHER) | \
(1ULL << I40E_FILTER_PCTYPE_L2_PAYLOAD))
+/* Default queue interrupt throttling time in microseconds */
+#define I40E_ITR_INDEX_DEFAULT 0
+#define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */
+#define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */
+
struct i40e_adapter;
/**
@@ -578,6 +583,16 @@ i40e_align_floor(int n)
return 1 << (sizeof(n) * CHAR_BIT - 1 - __builtin_clz(n));
}
+static inline uint16_t
+i40e_calc_itr_interval(int16_t interval)
+{
+ if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX)
+ interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT;
+
+ /* Convert to hardware count, as writing each 1 represents 2 us */
+ return (interval / 2);
+}
+
#define I40E_VALID_FLOW(flow_type) \
((flow_type) == RTE_ETH_FLOW_FRAG_IPV4 || \
(flow_type) == RTE_ETH_FLOW_NONFRAG_IPV4_TCP || \
diff --git a/drivers/net/i40e/i40e_ethdev_vf.c
b/drivers/net/i40e/i40e_ethdev_vf.c
index 176a2f6..4fdb401 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -145,6 +145,10 @@ static int i40evf_dev_rss_hash_update(struct rte_eth_dev
*dev,
struct rte_eth_rss_conf *rss_conf);
static int i4
[dpdk-dev] [PATCH 11/11] doc: release note update for intr mode
Signed-off-by: Cunming Liang --- doc/guides/rel_notes/release_2_2.rst | 4 1 file changed, 4 insertions(+) diff --git a/doc/guides/rel_notes/release_2_2.rst b/doc/guides/rel_notes/release_2_2.rst index be6f827..01bd4bb 100644 --- a/doc/guides/rel_notes/release_2_2.rst +++ b/doc/guides/rel_notes/release_2_2.rst @@ -23,6 +23,7 @@ New Features * **Added vhost-user multiple queue support.** +* **Added interrupt mode support on i40e.** Resolved Issues --- @@ -72,6 +73,9 @@ Drivers Fixed issue when releasing null control queue. +* **ixgbe: Fixed PF rx interrupt compatible issue with mbox.** + +* **igb: Fixed PF rx interrupt compatible issue with mbox.** Libraries ~ -- 2.4.3
[dpdk-dev] [PATCH v2] i40e: fix the write back issue in FVL VF
Hi,
> -Original Message-
> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Jingjing Wu
> Sent: Wednesday, October 21, 2015 10:18 AM
> To: dev at dpdk.org
> Cc: Pei, Yulong
> Subject: [dpdk-dev] [PATCH v2] i40e: fix the write back issue in FVL VF
>
> If DPDK is used on VF while the host is using Linux Kernel driver
> as PF driver on FVL NIC, then VF Rx is reported only in batches of
> 4 packets. It is due to the kernel driver assumes VF driver is working
> in interrupt mode, but DPDK VF is working in Polling mode.
> This patch fixes this issue by using the V1.1 virtual channel with
> Linux i40e PF driver.
>
> Signed-off-by: Jingjing Wu
> ---
> v2:
> fix coding style issue.
>
> drivers/net/i40e/i40e_ethdev.h| 5 +++
> drivers/net/i40e/i40e_ethdev_vf.c | 65 +---
> ---
> 2 files changed, 53 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
> index 6185657..d42487d 100644
> --- a/drivers/net/i40e/i40e_ethdev.h
> +++ b/drivers/net/i40e/i40e_ethdev.h
> @@ -91,6 +91,11 @@
> #define I40E_48_BIT_WIDTH (CHAR_BIT * 6)
> #define I40E_48_BIT_MASK RTE_LEN2MASK(I40E_48_BIT_WIDTH, uint64_t)
>
> +/* Linux PF host with virtchnl version 1.1 */
> +#define PF_IS_V11(vf) \
> + (((vf)->version_major == I40E_VIRTCHNL_VERSION_MAJOR) && \
> + ((vf)->version_minor == 1))
> +
> /* index flex payload per layer */
> enum i40e_flxpld_layer_idx {
> I40E_FLXPLD_L2_IDX= 0,
> diff --git a/drivers/net/i40e/i40e_ethdev_vf.c
> b/drivers/net/i40e/i40e_ethdev_vf.c
> index b694400..1324281 100644
> --- a/drivers/net/i40e/i40e_ethdev_vf.c
> +++ b/drivers/net/i40e/i40e_ethdev_vf.c
> @@ -67,12 +67,15 @@
> #include "i40e_rxtx.h"
> #include "i40e_ethdev.h"
> #include "i40e_pf.h"
> -#define I40EVF_VSI_DEFAULT_MSIX_INTR 1
> +#define I40EVF_VSI_DEFAULT_MSIX_INTR 1
> +#define I40EVF_VSI_DEFAULT_MSIX_INTR_LNX 0
>
> /* busy wait delay in msec */
> #define I40EVF_BUSY_WAIT_DELAY 10
> #define I40EVF_BUSY_WAIT_COUNT 50
> #define MAX_RESET_WAIT_CNT 20
> +/*ITR index for NOITR*/
> +#define I40E_QINT_RQCTL_MSIX_INDX_NOITR 3
>
> struct i40evf_arq_msg_info {
> enum i40e_virtchnl_ops ops;
> @@ -412,7 +415,7 @@ i40evf_check_api_version(struct rte_eth_dev *dev)
> if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
> PMD_DRV_LOG(INFO, "Peer is DPDK PF host");
> else if ((vf->version_major == I40E_VIRTCHNL_VERSION_MAJOR) &&
> - (vf->version_minor == I40E_VIRTCHNL_VERSION_MINOR))
> + (vf->version_minor <= I40E_VIRTCHNL_VERSION_MINOR))
> PMD_DRV_LOG(INFO, "Peer is Linux PF host");
> else {
> PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-
> (%u.%u)",
> @@ -432,14 +435,23 @@ i40evf_get_vf_resource(struct rte_eth_dev *dev)
> struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data-
> >dev_private);
> int err;
> struct vf_cmd_info args;
> - uint32_t len;
> + uint32_t caps, len;
>
> args.ops = I40E_VIRTCHNL_OP_GET_VF_RESOURCES;
> - args.in_args = NULL;
> - args.in_args_size = 0;
> args.out_buffer = cmd_result_buffer;
> args.out_size = I40E_AQ_BUF_SZ;
> -
> + if (PF_IS_V11(vf)) {
> + caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
> +I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ |
> +I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG |
> +I40E_VIRTCHNL_VF_OFFLOAD_VLAN |
> +I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING;
> + args.in_args = (uint8_t *)∩︀
> + args.in_args_size = sizeof(caps);
> + } else {
> + args.in_args = NULL;
> + args.in_args_size = 0;
> + }
> err = i40evf_execute_vf_cmd(dev, &args);
>
> if (err) {
> @@ -703,11 +715,14 @@ i40evf_config_irq_map(struct rte_eth_dev *dev)
> int i, err;
> map_info = (struct i40e_virtchnl_irq_map_info *)cmd_buffer;
> map_info->num_vectors = 1;
> - map_info->vecmap[0].rxitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
> - map_info->vecmap[0].txitr_idx = RTE_LIBRTE_I40E_ITR_INTERVAL / 2;
> + map_info->vecmap[0].rxitr_idx = I40E_QINT_RQCTL_MSIX_INDX_NOITR;
> map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
> /* Alway use default dynamic MSIX interrupt */
> - map_info->vecmap[0].vector_id = I40EVF_VSI_DEFAULT_MSIX_INTR;
> + if (vf->version_major == I40E_DPDK_VERSION_MAJOR)
> + map_info->vecmap[0].vector_id =
> I40EVF_VSI_DEFAULT_MSIX_INTR;
> + else
> + map_info->vecmap[0].vector_id =
> I40EVF_VSI_DEFAULT_MSIX_INTR_LNX;
> +
> /* Don't map any tx queue */
> map_info->vecmap[0].txq_map = 0;
> map_info->vecmap[0].rxq_map = 0;
> @@ -1546,18 +1561,36 @@ i40evf_tx_init(struct rte_eth_dev *dev)
> }
>
> static inline void
> -i40evf_enable_queues_intr(struct i40e_hw *hw)
> +i40evf_enable_queues_intr(struct rte_eth_dev *dev)
> {
> -
[dpdk-dev] [PATCH v3] i40e: Add a workaround to drop flow control frames from VFs
> -Original Message- > From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Jingjing Wu > Sent: Monday, October 19, 2015 2:32 PM > To: dev at dpdk.org > Cc: Pei, Yulong > Subject: [dpdk-dev] [PATCH v3] i40e: Add a workaround to drop flow control > frames from VFs > > This patch adds a workaround to drop flow control frames from being > transmitted from VSIs. > With this patch in place a malicious VF cannot send flow control or PFC > packets > out on the wire. > > Signed-off-by: Jingjing Wu Acked-by: Helin Zhang
[dpdk-dev] [PATCH v4 0/2] add selecting different GRE key length
-Original Message- From: Zhang, Helin Sent: Friday, October 30, 2015 12:54 PM To: dev at dpdk.org Cc: Chilikin, Andrey; Pei, Yulong; Liu, Yong; Wu, Jingjing; Zhang, Helin Subject: [PATCH v4 0/2] add selecting different GRE key length By default, only 3 bytes of GRE key will be used for hash or FD calculation. Here adds selecting 3 or 4 bytes of GRE key for those purpose. Note that these patches are based on another patch set of "[PATCH v7 0/2] i40e: RSS/FD granularity configuration". v2 changes: Updated with RSS/FD granularity code. v3 changes: Updated with RSS/FD granularity code. Updated documentation. v4 changes: Added the update of release note and testpmd guide to the code patches separately. Updated with RSS/FD granularity code v7. Helin Zhang (2): i40e: add selecting GRE key length app/testpmd: add test commands for selecting different GRE key sizes app/test-pmd/cmdline.c | 52 + doc/guides/rel_notes/release_2_2.rst| 2 + doc/guides/testpmd_app_ug/testpmd_funcs.rst | 11 drivers/net/i40e/i40e_ethdev.c | 87 - lib/librte_ether/rte_eth_ctrl.h | 20 +++ 5 files changed, 169 insertions(+), 3 deletions(-) -- 1.9.3 Acked-by: Zhe Tao
[dpdk-dev] [PATCH v2 0/2] xenvirt hotplug support
On 10/28/2015 12:07 AM, Bernard Iremonger wrote: > add Port Hotplug support to the xenvirt PMD > > This patch depends on v5 of the following patch set: > > remove-pci-driver-from-vdevs.patch > > Changes in v2: > Rebase > Update release notes. Acked-by: Huawei Xie > > Bernard Iremonger (2): > xenvirt: add support for Port Hotplug > xenvirt: free queues in dev_close > > doc/guides/rel_notes/release_2_2.rst | 2 + > drivers/net/xenvirt/rte_eth_xenvirt.c | 73 > +-- > drivers/net/xenvirt/rte_xen_lib.c | 26 +++-- > drivers/net/xenvirt/rte_xen_lib.h | 5 ++- > 4 files changed, 98 insertions(+), 8 deletions(-) >
[dpdk-dev] [PATCH v2] examples/vmdq: Fix the core dump issue when mem_pool is more than 34
> -Original Message- > From: Sun, Xutao > Sent: Tuesday, October 27, 2015 1:11 PM > To: dev at dpdk.org > Cc: Wu, Jingjing; Zhang, Helin; Sun, Xutao > Subject: [PATCH v2] examples/vmdq: Fix the core dump issue when > mem_pool is more than 34 > > Macro MAX_QUEUES was defined to 128, only allow 16 vmdq_pools in > theory. > When running vmdq_app with more than 34 vmdq_pools, it will cause the > core_dump issue. > Change MAX_QUEUES to 1024 will solve this issue. > > Signed-off-by: Xutao Sun Acked-by: Jingjing Wu > --- > v2: > - rectify the NUM_MBUFS_PER_PORT since MAX_QUEUES has been > changed > > examples/vmdq/main.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > 1.9.3
[dpdk-dev] [PATCH v4] i40e: Fix the statistics issue of i40e
The old statistics on i40e only counted the packets on ports. So the discarding packets on VSI were not counted. This patch is to make statistics for packets both on ports and VSI. Also update release notes. Signed-off-by: Xutao Sun --- v2: - reword comments v3: - update release notes v4: - fix the wrong release notes and move the doc as part of this patch doc/guides/rel_notes/release_2_2.rst | 4 drivers/net/i40e/i40e_ethdev.c | 23 ++- 2 files changed, 18 insertions(+), 9 deletions(-) diff --git a/doc/guides/rel_notes/release_2_2.rst b/doc/guides/rel_notes/release_2_2.rst index 682f468..e80c20d 100644 --- a/doc/guides/rel_notes/release_2_2.rst +++ b/doc/guides/rel_notes/release_2_2.rst @@ -8,6 +8,10 @@ New Features Resolved Issues --- +* **i40e: Fix statistics of packets.** + + Add discarding packets on VSI to the stats and rectify the old statistics. + Known Issues diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 40b0526..5e20fa7 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1511,21 +1511,26 @@ i40e_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) if (pf->main_vsi) i40e_update_vsi_stats(pf->main_vsi); - stats->ipackets = ns->eth.rx_unicast + ns->eth.rx_multicast + - ns->eth.rx_broadcast; - stats->opackets = ns->eth.tx_unicast + ns->eth.tx_multicast + - ns->eth.tx_broadcast; - stats->ibytes = ns->eth.rx_bytes; - stats->obytes = ns->eth.tx_bytes; - stats->oerrors = ns->eth.tx_errors; - stats->imcasts = ns->eth.rx_multicast; + stats->ipackets = pf->main_vsi->eth_stats.rx_unicast + + pf->main_vsi->eth_stats.rx_multicast + + pf->main_vsi->eth_stats.rx_broadcast - + pf->main_vsi->eth_stats.rx_discards; + stats->opackets = pf->main_vsi->eth_stats.tx_unicast + + pf->main_vsi->eth_stats.tx_multicast + + pf->main_vsi->eth_stats.tx_broadcast; + stats->ibytes = pf->main_vsi->eth_stats.rx_bytes; + stats->obytes = pf->main_vsi->eth_stats.tx_bytes; + stats->oerrors = ns->eth.tx_errors + + pf->main_vsi->eth_stats.tx_errors; + stats->imcasts = pf->main_vsi->eth_stats.rx_multicast; stats->fdirmatch = ns->fd_sb_match; /* Rx Errors */ stats->ibadcrc = ns->crc_errors; stats->ibadlen = ns->rx_length_errors + ns->rx_undersize + ns->rx_oversize + ns->rx_fragments + ns->rx_jabber; - stats->imissed = ns->eth.rx_discards; + stats->imissed = ns->eth.rx_discards + + pf->main_vsi->eth_stats.rx_discards; stats->ierrors = stats->ibadcrc + stats->ibadlen + stats->imissed; PMD_DRV_LOG(DEBUG, "* PF stats start ***"); -- 1.9.3
[dpdk-dev] [PATCH v2] i40e: fix the write back issue in FVL VF
> -Original Message- > From: Wu, Jingjing > Sent: Wednesday, October 21, 2015 10:18 AM > To: dev at dpdk.org > Cc: Wu, Jingjing; Zhang, Helin; Pei, Yulong > Subject: [PATCH v2] i40e: fix the write back issue in FVL VF > > If DPDK is used on VF while the host is using Linux Kernel driver as PF > driver on > FVL NIC, then VF Rx is reported only in batches of > 4 packets. It is due to the kernel driver assumes VF driver is working in > interrupt > mode, but DPDK VF is working in Polling mode. > This patch fixes this issue by using the V1.1 virtual channel with Linux i40e > PF > driver. > > Signed-off-by: Jingjing Wu Acked-by: Helin Zhang
[dpdk-dev] [PATCH] vhost: fix mmap failure as len not aligned with hugepage size
This patch fixes a bug under lower version linux kernel, mmap() fails when
length is not aligned with hugepage size.
Signed-off-by: Jianfeng Tan
---
lib/librte_vhost/vhost_user/virtio-net-user.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/lib/librte_vhost/vhost_user/virtio-net-user.c
b/lib/librte_vhost/vhost_user/virtio-net-user.c
index a998ad8..641561c 100644
--- a/lib/librte_vhost/vhost_user/virtio-net-user.c
+++ b/lib/librte_vhost/vhost_user/virtio-net-user.c
@@ -147,6 +147,10 @@ user_set_mem_table(struct vhost_device_ctx ctx, struct
VhostUserMsg *pmsg)
/* This is ugly */
mapped_size = memory.regions[idx].memory_size +
memory.regions[idx].mmap_offset;
+
+ alignment = get_blk_size(pmsg->fds[idx]);
+ mapped_size = RTE_ALIGN_CEIL(mapped_size, alignment);
+
mapped_address = (uint64_t)(uintptr_t)mmap(NULL,
mapped_size,
PROT_READ | PROT_WRITE, MAP_SHARED,
@@ -154,9 +158,11 @@ user_set_mem_table(struct vhost_device_ctx ctx, struct
VhostUserMsg *pmsg)
0);
RTE_LOG(INFO, VHOST_CONFIG,
- "mapped region %d fd:%d to %p sz:0x%"PRIx64"
off:0x%"PRIx64"\n",
+ "mapped region %d fd:%d to:%p sz:0x%"PRIx64" "
+ "off:0x%"PRIx64" align:0x%"PRIx64"\n",
idx, pmsg->fds[idx], (void *)(uintptr_t)mapped_address,
- mapped_size, memory.regions[idx].mmap_offset);
+ mapped_size, memory.regions[idx].mmap_offset,
+ alignment);
if (mapped_address == (uint64_t)(uintptr_t)MAP_FAILED) {
RTE_LOG(ERR, VHOST_CONFIG,
@@ -166,7 +172,7 @@ user_set_mem_table(struct vhost_device_ctx ctx, struct
VhostUserMsg *pmsg)
pregion_orig[idx].mapped_address = mapped_address;
pregion_orig[idx].mapped_size = mapped_size;
- pregion_orig[idx].blksz = get_blk_size(pmsg->fds[idx]);
+ pregion_orig[idx].blksz = alignment;
pregion_orig[idx].fd = pmsg->fds[idx];
mapped_address += memory.regions[idx].mmap_offset;
--
2.1.4
[dpdk-dev] [PATCH v2 01/11] eal/linux: vfio map misc intr to vector zero
> -Original Message-
> From: Liang, Cunming
> Sent: Friday, October 30, 2015 1:28 PM
> To: dev at dpdk.org
> Cc: Zhang, Helin; He, Shaopeng; Wu, Jingjing; Liang, Cunming
> Subject: [PATCH v2 01/11] eal/linux: vfio map misc intr to vector zero
>
> During VFIO_DEVICE_SET_IRQS, the previous order is {Q0_fd, ... Qn_fd,
> misc_fd}.
> The vector number of misc is indeterminable which is ugly to some NIC(e.g.
> i40e, fm10k).
> The patch adjusts the order in {misc_fd, Q0_fd, ... Qn_fd}, always reserve
> the first vector to misc interrupt.
>
> Signed-off-by: Cunming Liang
Acked-by : Shaopeng He
[dpdk-dev] [PATCH v2 04/11] eal/linux: not allow to enable zero intr efd
> -Original Message- > From: Liang, Cunming > Sent: Friday, October 30, 2015 1:28 PM > To: dev at dpdk.org > Cc: Zhang, Helin; He, Shaopeng; Wu, Jingjing; Liang, Cunming > Subject: [PATCH v2 04/11] eal/linux: not allow to enable zero intr efd > > The patch adds condition check to avoid enable nothing. > In disable state, both max_intr and nb_efd are zero. > > Signed-off-by: Cunming Liang Acked-by : Shaopeng He
[dpdk-dev] [PATCH v2 05/11] eal/linux: add intr api to report multi-vector capability
> -Original Message- > From: Liang, Cunming > Sent: Friday, October 30, 2015 1:28 PM > To: dev at dpdk.org > Cc: Zhang, Helin; He, Shaopeng; Wu, Jingjing; Liang, Cunming > Subject: [PATCH v2 05/11] eal/linux: add intr api to report multi-vector > capability > > VFIO allows multiple MSI-X vector, others doesn't, but maybe will allow it in > the future. > Device drivers need to be aware of the capability. > It's better to avoid condition check on interrupt type(VFIO) everywhere, > instead > a capability api is more flexible for the condition change. > > Signed-off-by: Cunming Liang Acked-by: Shaopeng He
[dpdk-dev] [PATCH v1 0/3] lpm: increase number of next hops for lpm (ipv4)
On Mon, Oct 26, 2015 at 11:40:46AM -0700, Matthew Hall wrote: > > I can't apply patch 0001-... , could You check it please? > > I generated it from a rebase of my own copy of DPDK against DPDK upstream > master. > > So I'm not sure why it would not apply against latest DPDK master. > > But I will try it and see what could be the reason. > > Matthew. Hello Michal, I rechecked it. The patch does apply perfectly to the latest master branch from git://dpdk.org/dpdk using git apply. Can you take a second look? I compile my DPDK with the clang compiler BTW. Matthew.
[dpdk-dev] [PATCH v3] i40e: add link flow control support for FVL
> -Original Message- > From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Zhe Tao > Sent: Friday, October 30, 2015 12:58 PM > To: dev at dpdk.org > Subject: [dpdk-dev] [PATCH v3] i40e: add link flow control support for FVL > > Feature Add: Rx/Tx flow control support for the i40e > > All the Rx/Tx LFC enable/disable operation is done by the F/W, so PMD driver > need to use the Set PHY Config AD command to trigger the PHY to do the > auto-negotiation, after the Tx/Rx pause ability is negotiated, the F/W will > help us > to set the related LFC enable/disable registers. > PMD driver also need to configure the related registers to control how often > to > send the pause frame and what the value in the pause frame. > > Signed-off-by: Zhe Tao Acked-by: Helin Zhang
[dpdk-dev] [PATCH v2 09/11] i40e: add rx interrupt support
> -Original Message- > From: Liang, Cunming > Sent: Friday, October 30, 2015 1:28 PM > To: dev at dpdk.org > Cc: Zhang, Helin; He, Shaopeng; Wu, Jingjing; Liang, Cunming > Subject: [PATCH v2 09/11] i40e: add rx interrupt support > > v2 changes: > - add write flush > - always set DIS_AUTOMASK_* bit > > The patch enables rx interrupt support on i40e PF non-IOV mode. > Per queue rx interrupt works on vfio, however on uio, all rx queues share one > interrupt vector. > > Signed-off-by: Cunming Liang Acked-by: Helin Zhang
[dpdk-dev] [PATCH v2 01/11] eal/linux: vfio map misc intr to vector zero
> -Original Message-
> From: Liang, Cunming
> Sent: Friday, October 30, 2015 1:28 PM
> To: dev at dpdk.org
> Cc: Zhang, Helin; He, Shaopeng; Wu, Jingjing; Liang, Cunming
> Subject: [PATCH v2 01/11] eal/linux: vfio map misc intr to vector zero
>
> During VFIO_DEVICE_SET_IRQS, the previous order is {Q0_fd, ... Qn_fd,
> misc_fd}.
> The vector number of misc is indeterminable which is ugly to some NIC(e.g.
> i40e,
> fm10k).
> The patch adjusts the order in {misc_fd, Q0_fd, ... Qn_fd}, always reserve the
> first vector to misc interrupt.
>
> Signed-off-by: Cunming Liang
Acked-by: Helin Zhang
[dpdk-dev] [PATCH v2 09/11] i40e: add rx interrupt support
> -Original Message- > From: Liang, Cunming > Sent: Friday, October 30, 2015 1:28 PM > To: dev at dpdk.org > Cc: Zhang, Helin; He, Shaopeng; Wu, Jingjing; Liang, Cunming > Subject: [PATCH v2 09/11] i40e: add rx interrupt support > > v2 changes: > - add write flush > - always set DIS_AUTOMASK_* bit > > The patch enables rx interrupt support on i40e PF non-IOV mode. > Per queue rx interrupt works on vfio, however on uio, all rx queues share > one interrupt vector. > > Signed-off-by: Cunming Liang > --- Acked-by: Jingjing Wu > drivers/net/i40e/i40e_ethdev.c | 342 > +++-- > drivers/net/i40e/i40e_ethdev.h | 2 + > drivers/net/i40e/i40e_pf.c | 2 + > 3 files changed, 298 insertions(+), 48 deletions(-)
[dpdk-dev] [PATCH v2 10/11] i40evf: add rx interrupt support
> -Original Message- > From: Liang, Cunming > Sent: Friday, October 30, 2015 1:28 PM > To: dev at dpdk.org > Cc: Zhang, Helin; He, Shaopeng; Wu, Jingjing; Liang, Cunming > Subject: [PATCH v2 10/11] i40evf: add rx interrupt support > > v2 changes: > - turn on intr only when rxq flag is set > - rework base on patch http://dpdk.org/dev/patchwork/patch/7504/ > > The patch enables rx interrupt support on i40e VF and some necessary > change on PF IOV mode to support VF. > On PF side, running in IOV mode via uio won't allow rx interrupt which is > exclusive with mbox interrupt in single vector competition. > On VF side, one single vector is shared for all the rx queues. > > Signed-off-by: Cunming Liang > --- Acked-by: Jingjing Wu Just note that http://dpdk.org/dev/patchwork/patch/7504/ is already replace by http://dpdk.org/dev/patchwork/patch/7790/ for few code style fix. > drivers/net/i40e/i40e_ethdev.c| 38 +- > drivers/net/i40e/i40e_ethdev.h| 15 > drivers/net/i40e/i40e_ethdev_vf.c | 143 > +++--- > drivers/net/i40e/i40e_pf.c| 5 -- > 4 files changed, 166 insertions(+), 35 deletions(-) >
[dpdk-dev] [PATCH v2 10/11] i40evf: add rx interrupt support
> -Original Message- > From: Liang, Cunming > Sent: Friday, October 30, 2015 1:28 PM > To: dev at dpdk.org > Cc: Zhang, Helin; He, Shaopeng; Wu, Jingjing; Liang, Cunming > Subject: [PATCH v2 10/11] i40evf: add rx interrupt support > > v2 changes: > - turn on intr only when rxq flag is set > - rework base on patch http://dpdk.org/dev/patchwork/patch/7504/ > > The patch enables rx interrupt support on i40e VF and some necessary change on > PF IOV mode to support VF. > On PF side, running in IOV mode via uio won't allow rx interrupt which is > exclusive > with mbox interrupt in single vector competition. > On VF side, one single vector is shared for all the rx queues. > > Signed-off-by: Cunming Liang Acked-by: Helin Zhang
[dpdk-dev] [PATCH v2 0/4] extend flow director to support VF filtering in i40e driver
> -Original Message- > From: Wu, Jingjing > Sent: Wednesday, October 28, 2015 4:41 PM > To: dev at dpdk.org > Cc: Wu, Jingjing; Zhang, Helin; Pei, Yulong > Subject: [PATCH v2 0/4] extend flow director to support VF filtering in i40e > driver > > This patch set extends flow director to VF filtering in i40e driver. > > v2 change: > - rework the doc, including release notes and testpmd guide > > Jingjing Wu (4): > ethdev: extend struct to support flow director in VFs > i40e: extend flow diretcor to support filtering in VFs > testpmd: extend commands > doc: extend commands in testpmd and remove related ABI deprecation > > app/test-pmd/cmdline.c | 41 > ++--- > doc/guides/rel_notes/deprecation.rst| 4 --- > doc/guides/rel_notes/release_2_2.rst| 2 ++ > doc/guides/testpmd_app_ug/testpmd_funcs.rst | 15 ++- > drivers/net/i40e/i40e_ethdev.c | 4 +-- > drivers/net/i40e/i40e_fdir.c| 15 --- > lib/librte_ether/rte_eth_ctrl.h | 2 ++ > 7 files changed, 64 insertions(+), 19 deletions(-) > > -- > 2.4.0 Acked-by: Helin Zhang
[dpdk-dev] [PATCH v7 0/2] i40e: RSS/FD granularity configuration
> -Original Message- > From: Zhang, Helin > Sent: Friday, October 30, 2015 11:11 AM > To: dev at dpdk.org > Cc: Pei, Yulong; Liu, Yong; Wu, Jingjing; Zhang, Helin > Subject: [PATCH v7 0/2] i40e: RSS/FD granularity configuration > > v2 changes: > Solved the compilation issues. > > v3 changes: > Support selecting more input set fields. > > v4 changes: > Removed operation of 'delete', as it is not necessary. > Added FD granularity in both pmd and testpmd, as it is similar to RSS > granularity. > > v5 changes: > Fixed issue of generating wrong input set for registers on ipv6-udp and ipv6- > tcp pc types. > Added clear masking operations during checking if MASK registers are > opcupied or not. > Reworked several annotations. > > v6 changes: > Updated documentation. > > v7 changes: > Modified RTE_ETH_INSET_SIZE_MAX from 128 to 1, to avoid ABI changes. > Split documentation into pieces and put them directly into the patch of code > changes directly. > > Helin Zhang (2): > i40e: RSS/FD granularity configuration > app/testpmd: add test commands for RSS/FD granularity > > app/test-pmd/cmdline.c | 218 > doc/guides/rel_notes/deprecation.rst| 5 + > doc/guides/rel_notes/release_2_2.rst| 3 + > doc/guides/testpmd_app_ug/testpmd_funcs.rst | 33 ++ > drivers/net/i40e/i40e_ethdev.c | 742 > > drivers/net/i40e/i40e_ethdev.h | 7 + > drivers/net/i40e/i40e_fdir.c| 31 ++ > lib/librte_ether/rte_eth_ctrl.h | 114 - > 8 files changed, 1149 insertions(+), 4 deletions(-) > > -- > 1.9.3 Acked-by: Jingjing Wu
[dpdk-dev] [PATCH v5 01/14] fm10k: add new vPMD file
From: "Chen Jing D(Mark)" Add new file fm10k_rxtx_vec.c and add it into compiling. Signed-off-by: Chen Jing D(Mark) --- drivers/net/fm10k/Makefile |1 + drivers/net/fm10k/fm10k_rxtx_vec.c | 45 2 files changed, 46 insertions(+), 0 deletions(-) create mode 100644 drivers/net/fm10k/fm10k_rxtx_vec.c diff --git a/drivers/net/fm10k/Makefile b/drivers/net/fm10k/Makefile index a4a8f56..06ebf83 100644 --- a/drivers/net/fm10k/Makefile +++ b/drivers/net/fm10k/Makefile @@ -93,6 +93,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k_common.c SRCS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k_mbx.c SRCS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k_vf.c SRCS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k_api.c +SRCS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k_rxtx_vec.c # this lib depends upon: DEPDIRS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += lib/librte_eal lib/librte_ether diff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c b/drivers/net/fm10k/fm10k_rxtx_vec.c new file mode 100644 index 000..69174d9 --- /dev/null +++ b/drivers/net/fm10k/fm10k_rxtx_vec.c @@ -0,0 +1,45 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +#include +#include +#include "fm10k.h" +#include "base/fm10k_type.h" + +#include + +#ifndef __INTEL_COMPILER +#pragma GCC diagnostic ignored "-Wcast-qual" +#endif -- 1.7.7.6
[dpdk-dev] [PATCH v5 03/14] fm10k: Add a new func to initialize all parameters
From: "Chen Jing D(Mark)"
Add new function fm10k_params_init to initialize all fm10k related
variables.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k_ethdev.c | 35 +++
1 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c
index 680a7fe..8dd64bf 100644
--- a/drivers/net/fm10k/fm10k_ethdev.c
+++ b/drivers/net/fm10k/fm10k_ethdev.c
@@ -2067,6 +2067,27 @@ static const struct eth_dev_ops fm10k_eth_dev_ops = {
.rss_hash_conf_get = fm10k_rss_hash_conf_get,
};
+static void
+fm10k_params_init(struct rte_eth_dev *dev)
+{
+ struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct fm10k_dev_info *info = FM10K_DEV_PRIVATE_TO_INFO(dev);
+
+ /* Inialize bus info. Normally we would call fm10k_get_bus_info(), but
+* there is no way to get link status without reading BAR4. Until this
+* works, assume we have maximum bandwidth.
+* @todo - fix bus info
+*/
+ hw->bus_caps.speed = fm10k_bus_speed_8000;
+ hw->bus_caps.width = fm10k_bus_width_pcie_x8;
+ hw->bus_caps.payload = fm10k_bus_payload_512;
+ hw->bus.speed = fm10k_bus_speed_8000;
+ hw->bus.width = fm10k_bus_width_pcie_x8;
+ hw->bus.payload = fm10k_bus_payload_256;
+
+ info->rx_vec_allowed = true;
+}
+
static int
eth_fm10k_dev_init(struct rte_eth_dev *dev)
{
@@ -2113,18 +2134,8 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)
return -EIO;
}
- /*
-* Inialize bus info. Normally we would call fm10k_get_bus_info(), but
-* there is no way to get link status without reading BAR4. Until this
-* works, assume we have maximum bandwidth.
-* @todo - fix bus info
-*/
- hw->bus_caps.speed = fm10k_bus_speed_8000;
- hw->bus_caps.width = fm10k_bus_width_pcie_x8;
- hw->bus_caps.payload = fm10k_bus_payload_512;
- hw->bus.speed = fm10k_bus_speed_8000;
- hw->bus.width = fm10k_bus_width_pcie_x8;
- hw->bus.payload = fm10k_bus_payload_256;
+ /* Initialize parameters */
+ fm10k_params_init(dev);
/* Initialize the hw */
diag = fm10k_init_hw(hw);
--
1.7.7.6
[dpdk-dev] [PATCH v5 04/14] fm10k: add Vector RX function
From: "Chen Jing D(Mark)"
This patch add below functions:
1. Add function fm10k_rxq_rearm to re-allocate mbuf for used desc
in RX HW ring.
2. Add 2 functions, in which using SSE instructions to parse RX desc
to get pkt_type and ol_flags in mbuf.
3. Add func fm10k_recv_raw_pkts_vec to parse raw packets, in which
includes possible chained packets.
4. Add func fm10k_recv_pkts_vec to receive single mbuf packet.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h | 12 +
drivers/net/fm10k/fm10k_ethdev.c |3 +
drivers/net/fm10k/fm10k_rxtx_vec.c | 426
3 files changed, 441 insertions(+), 0 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index 362a2d0..96b30a7 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -123,6 +123,12 @@
#define FM10K_VFTA_BIT(vlan_id)(1 << ((vlan_id) & 0x1F))
#define FM10K_VFTA_IDX(vlan_id)((vlan_id) >> 5)
+#define RTE_FM10K_RXQ_REARM_THRESH 32
+#define RTE_FM10K_VPMD_TX_BURST 32
+#define RTE_FM10K_MAX_RX_BURST RTE_FM10K_RXQ_REARM_THRESH
+#define RTE_FM10K_TX_MAX_FREE_BUF_SZ64
+#define RTE_FM10K_DESCS_PER_LOOP4
+
struct fm10k_macvlan_filter_info {
uint16_t vlan_num; /* Total VLAN number */
uint16_t mac_num;/* Total mac number */
@@ -171,6 +177,8 @@ struct fm10k_rx_queue {
struct rte_mbuf *pkt_last_seg; /* Last segment of current packet. */
uint64_t hw_ring_phys_addr;
uint64_t mbuf_initializer; /* value to init mbufs */
+ /** need to alloc dummy mbuf, for wraparound when scanning hw ring */
+ struct rte_mbuf fake_mbuf;
uint16_t next_dd;
uint16_t next_alloc;
uint16_t next_trigger;
@@ -178,6 +186,9 @@ struct fm10k_rx_queue {
volatile uint32_t *tail_ptr;
uint16_t nb_desc;
uint16_t queue_id;
+ /* Below 2 fields only valid in case vPMD is applied. */
+ uint16_t rxrearm_nb; /* number of remaining to be re-armed */
+ uint16_t rxrearm_start; /* the idx we start the re-arming from */
uint8_t port_id;
uint8_t drop_en;
uint8_t rx_deferred_start; /* don't start this queue in dev start. */
@@ -318,4 +329,5 @@ uint16_t fm10k_xmit_pkts(void *tx_queue, struct rte_mbuf
**tx_pkts,
uint16_t nb_pkts);
int fm10k_rxq_vec_setup(struct fm10k_rx_queue *rxq);
+uint16_t fm10k_recv_pkts_vec(void *, struct rte_mbuf **, uint16_t);
#endif
diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c
index 8dd64bf..6be764a 100644
--- a/drivers/net/fm10k/fm10k_ethdev.c
+++ b/drivers/net/fm10k/fm10k_ethdev.c
@@ -121,6 +121,9 @@ rx_queue_reset(struct fm10k_rx_queue *q)
q->next_alloc = 0;
q->next_trigger = q->alloc_thresh - 1;
FM10K_PCI_REG_WRITE(q->tail_ptr, q->nb_desc - 1);
+ q->rxrearm_start = 0;
+ q->rxrearm_nb = 0;
+
return 0;
}
diff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c
b/drivers/net/fm10k/fm10k_rxtx_vec.c
index 34b677b..9633f35 100644
--- a/drivers/net/fm10k/fm10k_rxtx_vec.c
+++ b/drivers/net/fm10k/fm10k_rxtx_vec.c
@@ -44,6 +44,133 @@
#pragma GCC diagnostic ignored "-Wcast-qual"
#endif
+/* Handling the offload flags (olflags) field takes computation
+ * time when receiving packets. Therefore we provide a flag to disable
+ * the processing of the olflags field when they are not needed. This
+ * gives improved performance, at the cost of losing the offload info
+ * in the received packet
+ */
+#ifdef RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE
+
+/* Vlan present flag shift */
+#define VP_SHIFT (2)
+/* L3 type shift */
+#define L3TYPE_SHIFT (4)
+/* L4 type shift */
+#define L4TYPE_SHIFT (7)
+
+static inline void
+fm10k_desc_to_olflags_v(__m128i descs[4], struct rte_mbuf **rx_pkts)
+{
+ __m128i ptype0, ptype1, vtag0, vtag1;
+ union {
+ uint16_t e[4];
+ uint64_t dword;
+ } vol;
+
+ const __m128i pkttype_msk = _mm_set_epi16(
+ 0x, 0x, 0x, 0x,
+ PKT_RX_VLAN_PKT, PKT_RX_VLAN_PKT,
+ PKT_RX_VLAN_PKT, PKT_RX_VLAN_PKT);
+
+ /* mask everything except rss type */
+ const __m128i rsstype_msk = _mm_set_epi16(
+ 0x, 0x, 0x, 0x,
+ 0x000F, 0x000F, 0x000F, 0x000F);
+
+ /* map rss type to rss hash flag */
+ const __m128i rss_flags = _mm_set_epi8(0, 0, 0, 0,
+ 0, 0, 0, PKT_RX_RSS_HASH,
+ PKT_RX_RSS_HASH, 0, PKT_RX_RSS_HASH, 0,
+ PKT_RX_RSS_HASH, PKT_RX_RSS_HASH, PKT_RX_RSS_HASH, 0);
+
+ ptype0 = _mm_unpacklo_epi16(descs[0], descs[1]);
+ ptype1 = _mm_unpacklo_epi16(descs[2], descs[3]);
+ vtag0 = _mm_unpackhi_epi16(descs[0], descs[1]);
+ vtag1 = _mm_unpackhi_epi16(descs[2], descs[3]);
+
+ ptype0 = _mm_unpacklo_epi32(ptype0
[dpdk-dev] [PATCH v5 06/14] fm10k: add Vector RX scatter function
From: "Chen Jing D(Mark)"
Add func fm10k_recv_scattered_pkts_vec to receive chained packets
with SSE instructions.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h |2 +
drivers/net/fm10k/fm10k_rxtx_vec.c | 88
2 files changed, 90 insertions(+), 0 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index 6c1c698..8dba27b 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -331,4 +331,6 @@ uint16_t fm10k_xmit_pkts(void *tx_queue, struct rte_mbuf
**tx_pkts,
int fm10k_rxq_vec_setup(struct fm10k_rx_queue *rxq);
int fm10k_rx_vec_condition_check(struct rte_eth_dev *);
uint16_t fm10k_recv_pkts_vec(void *, struct rte_mbuf **, uint16_t);
+uint16_t fm10k_recv_scattered_pkts_vec(void *, struct rte_mbuf **,
+ uint16_t);
#endif
diff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c
b/drivers/net/fm10k/fm10k_rxtx_vec.c
index 64036e3..ffd022a 100644
--- a/drivers/net/fm10k/fm10k_rxtx_vec.c
+++ b/drivers/net/fm10k/fm10k_rxtx_vec.c
@@ -521,3 +521,91 @@ fm10k_recv_pkts_vec(void *rx_queue, struct rte_mbuf
**rx_pkts,
{
return fm10k_recv_raw_pkts_vec(rx_queue, rx_pkts, nb_pkts, NULL);
}
+
+static inline uint16_t
+fm10k_reassemble_packets(struct fm10k_rx_queue *rxq,
+ struct rte_mbuf **rx_bufs,
+ uint16_t nb_bufs, uint8_t *split_flags)
+{
+ struct rte_mbuf *pkts[RTE_FM10K_MAX_RX_BURST]; /*finished pkts*/
+ struct rte_mbuf *start = rxq->pkt_first_seg;
+ struct rte_mbuf *end = rxq->pkt_last_seg;
+ unsigned pkt_idx, buf_idx;
+
+ for (buf_idx = 0, pkt_idx = 0; buf_idx < nb_bufs; buf_idx++) {
+ if (end != NULL) {
+ /* processing a split packet */
+ end->next = rx_bufs[buf_idx];
+ start->nb_segs++;
+ start->pkt_len += rx_bufs[buf_idx]->data_len;
+ end = end->next;
+
+ if (!split_flags[buf_idx]) {
+ /* it's the last packet of the set */
+ start->hash = end->hash;
+ start->ol_flags = end->ol_flags;
+ pkts[pkt_idx++] = start;
+ start = end = NULL;
+ }
+ } else {
+ /* not processing a split packet */
+ if (!split_flags[buf_idx]) {
+ /* not a split packet, save and skip */
+ pkts[pkt_idx++] = rx_bufs[buf_idx];
+ continue;
+ }
+ end = start = rx_bufs[buf_idx];
+ }
+ }
+
+ /* save the partial packet for next time */
+ rxq->pkt_first_seg = start;
+ rxq->pkt_last_seg = end;
+ memcpy(rx_bufs, pkts, pkt_idx * (sizeof(*pkts)));
+ return pkt_idx;
+}
+
+/*
+ * vPMD receive routine that reassembles scattered packets
+ *
+ * Notice:
+ * - don't support ol_flags for rss and csum err
+ * - nb_pkts > RTE_FM10K_MAX_RX_BURST, only scan RTE_FM10K_MAX_RX_BURST
+ * numbers of DD bit
+ */
+uint16_t
+fm10k_recv_scattered_pkts_vec(void *rx_queue,
+ struct rte_mbuf **rx_pkts,
+ uint16_t nb_pkts)
+{
+ struct fm10k_rx_queue *rxq = rx_queue;
+ uint8_t split_flags[RTE_FM10K_MAX_RX_BURST] = {0};
+ unsigned i = 0;
+
+ /* Split_flags only can support max of RTE_FM10K_MAX_RX_BURST */
+ nb_pkts = RTE_MIN(nb_pkts, RTE_FM10K_MAX_RX_BURST);
+ /* get some new buffers */
+ uint16_t nb_bufs = fm10k_recv_raw_pkts_vec(rxq, rx_pkts, nb_pkts,
+ split_flags);
+ if (nb_bufs == 0)
+ return 0;
+
+ /* happy day case, full burst + no packets to be joined */
+ const uint64_t *split_fl64 = (uint64_t *)split_flags;
+
+ if (rxq->pkt_first_seg == NULL &&
+ split_fl64[0] == 0 && split_fl64[1] == 0 &&
+ split_fl64[2] == 0 && split_fl64[3] == 0)
+ return nb_bufs;
+
+ /* reassemble any packets that need reassembly*/
+ if (rxq->pkt_first_seg == NULL) {
+ /* find the first split flag, and only reassemble then*/
+ while (i < nb_bufs && !split_flags[i])
+ i++;
+ if (i == nb_bufs)
+ return nb_bufs;
+ }
+ return i + fm10k_reassemble_packets(rxq, &rx_pkts[i], nb_bufs - i,
+ &split_flags[i]);
+}
--
1.7.7.6
[dpdk-dev] [PATCH v5 00/14] Vector Rx/Tx PMD implementation for fm10k
From: "Chen Jing D(Mark)" v5: - Fix some warnings reported by checkpatch.pl - Squash 3 patches into 1 to avoid compile error on unsued functions. - Sync with master branch v4: - Clear HW/SW ring content after allocating mbuf failed. v3: - Add a blank line after variable definition. - Do floor alignment for passing in argument nb_pkts to avoid memory overwritten. - Only scan max of 32 desc in scatter Rx function to avoid memory overwritten. v2: - Fix a typo issue. - Fix an improper prefetch in vector RX function, in which prefetches un-initialized mbuf. - Remove limitation on number of desc pointer in vector RX function. - Re-organize some comments. - Add a new patch to fix a crash issue in vector RX func. - Add a new patch to update release notes. v1: This patch set includes Vector Rx/Tx functions to receive/transmit packets for fm10k devices. It also contains logic to do sanity check for proper RX/TX function selections. Chen Jing D(Mark) (14): fm10k: add new vPMD file fm10k: add vPMD pre-condition check for each RX queue fm10k: Add a new func to initialize all parameters fm10k: add Vector RX function fm10k: add func to do Vector RX condition check fm10k: add Vector RX scatter function fm10k: add function to decide best RX function fm10k: add func to release mbuf in case Vector RX applied fm10k: add Vector TX function fm10k: use func pointer to reset TX queue and mbuf release fm10k: introduce 2 funcs to reset TX queue and mbuf release fm10k: Add function to decide best TX func fm10k: fix a crash issue in vector RX func doc: release notes update for fm10k Vector PMD doc/guides/rel_notes/release_2_2.rst |6 + drivers/net/fm10k/Makefile |1 + drivers/net/fm10k/fm10k.h| 45 ++- drivers/net/fm10k/fm10k_ethdev.c | 172 ++- drivers/net/fm10k/fm10k_rxtx_vec.c | 847 ++ 5 files changed, 1043 insertions(+), 28 deletions(-) create mode 100644 drivers/net/fm10k/fm10k_rxtx_vec.c -- 1.7.7.6
[dpdk-dev] [PATCH v5 07/14] fm10k: add function to decide best RX function
From: "Chen Jing D(Mark)"
Add func fm10k_set_rx_function to decide best RX func in
fm10k_dev_rx_init
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h|1 +
drivers/net/fm10k/fm10k_ethdev.c | 36
2 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index 8dba27b..5666af6 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -189,6 +189,7 @@ struct fm10k_rx_queue {
/* Below 2 fields only valid in case vPMD is applied. */
uint16_t rxrearm_nb; /* number of remaining to be re-armed */
uint16_t rxrearm_start; /* the idx we start the re-arming from */
+ uint16_t rx_using_sse; /* indicates that vector RX is in use */
uint8_t port_id;
uint8_t drop_en;
uint8_t rx_deferred_start; /* don't start this queue in dev start. */
diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c
index 6be764a..70dac2a 100644
--- a/drivers/net/fm10k/fm10k_ethdev.c
+++ b/drivers/net/fm10k/fm10k_ethdev.c
@@ -67,6 +67,7 @@ static void
fm10k_MACVLAN_remove_all(struct rte_eth_dev *dev);
static void fm10k_tx_queue_release(void *queue);
static void fm10k_rx_queue_release(void *queue);
+static void fm10k_set_rx_function(struct rte_eth_dev *dev);
static void
fm10k_mbx_initlock(struct fm10k_hw *hw)
@@ -462,7 +463,6 @@ fm10k_dev_rx_init(struct rte_eth_dev *dev)
dev->data->dev_conf.rxmode.enable_scatter) {
uint32_t reg;
dev->data->scattered_rx = 1;
- dev->rx_pkt_burst = fm10k_recv_scattered_pkts;
reg = FM10K_READ_REG(hw, FM10K_SRRCTL(i));
reg |= FM10K_SRRCTL_BUFFER_CHAINING_EN;
FM10K_WRITE_REG(hw, FM10K_SRRCTL(i), reg);
@@ -478,6 +478,9 @@ fm10k_dev_rx_init(struct rte_eth_dev *dev)
/* Configure RSS if applicable */
fm10k_dev_mq_rx_configure(dev);
+
+ /* Decide the best RX function */
+ fm10k_set_rx_function(dev);
return 0;
}
@@ -2070,6 +2073,34 @@ static const struct eth_dev_ops fm10k_eth_dev_ops = {
.rss_hash_conf_get = fm10k_rss_hash_conf_get,
};
+static void __attribute__((cold))
+fm10k_set_rx_function(struct rte_eth_dev *dev)
+{
+ struct fm10k_dev_info *dev_info = FM10K_DEV_PRIVATE_TO_INFO(dev);
+ uint16_t i, rx_using_sse;
+
+ /* In order to allow Vector Rx there are a few configuration
+* conditions to be met.
+*/
+ if (!fm10k_rx_vec_condition_check(dev) && dev_info->rx_vec_allowed) {
+ if (dev->data->scattered_rx)
+ dev->rx_pkt_burst = fm10k_recv_scattered_pkts_vec;
+ else
+ dev->rx_pkt_burst = fm10k_recv_pkts_vec;
+ } else if (dev->data->scattered_rx)
+ dev->rx_pkt_burst = fm10k_recv_scattered_pkts;
+
+ rx_using_sse =
+ (dev->rx_pkt_burst == fm10k_recv_scattered_pkts_vec ||
+ dev->rx_pkt_burst == fm10k_recv_pkts_vec);
+
+ for (i = 0; i < dev->data->nb_rx_queues; i++) {
+ struct fm10k_rx_queue *rxq = dev->data->rx_queues[i];
+
+ rxq->rx_using_sse = rx_using_sse;
+ }
+}
+
static void
fm10k_params_init(struct rte_eth_dev *dev)
{
@@ -2104,9 +2135,6 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)
dev->rx_pkt_burst = &fm10k_recv_pkts;
dev->tx_pkt_burst = &fm10k_xmit_pkts;
- if (dev->data->scattered_rx)
- dev->rx_pkt_burst = &fm10k_recv_scattered_pkts;
-
/* only initialize in the primary process */
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
--
1.7.7.6
[dpdk-dev] [PATCH v5 02/14] fm10k: add vPMD pre-condition check for each RX queue
From: "Chen Jing D(Mark)"
Add condition check in rx_queue_setup func. If number of RX desc
can't satisfy vPMD requirement, record it into a variable. Or
call fm10k_rxq_vec_setup to initialize Vector RX.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h | 11 ---
drivers/net/fm10k/fm10k_ethdev.c | 11 +++
drivers/net/fm10k/fm10k_rxtx_vec.c | 21 +
3 files changed, 40 insertions(+), 3 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index c089882..362a2d0 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -135,6 +135,8 @@ struct fm10k_dev_info {
/* Protect the mailbox to avoid race condition */
rte_spinlock_tmbx_lock;
struct fm10k_macvlan_filter_infomacvlan;
+ /* Flag to indicate if RX vector conditions satisfied */
+ bool rx_vec_allowed;
};
/*
@@ -165,9 +167,10 @@ struct fm10k_rx_queue {
struct rte_mempool *mp;
struct rte_mbuf **sw_ring;
volatile union fm10k_rx_desc *hw_ring;
- struct rte_mbuf *pkt_first_seg; /**< First segment of current packet. */
- struct rte_mbuf *pkt_last_seg; /**< Last segment of current packet. */
+ struct rte_mbuf *pkt_first_seg; /* First segment of current packet. */
+ struct rte_mbuf *pkt_last_seg; /* Last segment of current packet. */
uint64_t hw_ring_phys_addr;
+ uint64_t mbuf_initializer; /* value to init mbufs */
uint16_t next_dd;
uint16_t next_alloc;
uint16_t next_trigger;
@@ -177,7 +180,7 @@ struct fm10k_rx_queue {
uint16_t queue_id;
uint8_t port_id;
uint8_t drop_en;
- uint8_t rx_deferred_start; /**< don't start this queue in dev start. */
+ uint8_t rx_deferred_start; /* don't start this queue in dev start. */
};
/*
@@ -313,4 +316,6 @@ uint16_t fm10k_recv_scattered_pkts(void *rx_queue,
uint16_t fm10k_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
+
+int fm10k_rxq_vec_setup(struct fm10k_rx_queue *rxq);
#endif
diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c
index b104fc2..680a7fe 100644
--- a/drivers/net/fm10k/fm10k_ethdev.c
+++ b/drivers/net/fm10k/fm10k_ethdev.c
@@ -1252,6 +1252,7 @@ fm10k_rx_queue_setup(struct rte_eth_dev *dev, uint16_t
queue_id,
const struct rte_eth_rxconf *conf, struct rte_mempool *mp)
{
struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct fm10k_dev_info *dev_info = FM10K_DEV_PRIVATE_TO_INFO(dev);
struct fm10k_rx_queue *q;
const struct rte_memzone *mz;
@@ -1334,6 +1335,16 @@ fm10k_rx_queue_setup(struct rte_eth_dev *dev, uint16_t
queue_id,
q->hw_ring_phys_addr = mz->phys_addr;
#endif
+ /* Check if number of descs satisfied Vector requirement */
+ if (!rte_is_power_of_2(nb_desc)) {
+ PMD_INIT_LOG(DEBUG, "queue[%d] doesn't meet Vector Rx "
+ "preconditions - canceling the feature for "
+ "the whole port[%d]",
+q->queue_id, q->port_id);
+ dev_info->rx_vec_allowed = false;
+ } else
+ fm10k_rxq_vec_setup(q);
+
dev->data->rx_queues[queue_id] = q;
return 0;
}
diff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c
b/drivers/net/fm10k/fm10k_rxtx_vec.c
index 69174d9..34b677b 100644
--- a/drivers/net/fm10k/fm10k_rxtx_vec.c
+++ b/drivers/net/fm10k/fm10k_rxtx_vec.c
@@ -43,3 +43,24 @@
#ifndef __INTEL_COMPILER
#pragma GCC diagnostic ignored "-Wcast-qual"
#endif
+
+int __attribute__((cold))
+fm10k_rxq_vec_setup(struct fm10k_rx_queue *rxq)
+{
+ uintptr_t p;
+ struct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */
+
+ mb_def.nb_segs = 1;
+ /* data_off will be ajusted after new mbuf allocated for 512-byte
+* alignment.
+*/
+ mb_def.data_off = RTE_PKTMBUF_HEADROOM;
+ mb_def.port = rxq->port_id;
+ rte_mbuf_refcnt_set(&mb_def, 1);
+
+ /* prevent compiler reordering: rearm_data covers previous fields */
+ rte_compiler_barrier();
+ p = (uintptr_t)&mb_def.rearm_data;
+ rxq->mbuf_initializer = *(uint64_t *)p;
+ return 0;
+}
--
1.7.7.6
[dpdk-dev] [PATCH v5 08/14] fm10k: add func to release mbuf in case Vector RX applied
From: "Chen Jing D(Mark)"
Since Vector RX use different variables to trace RX HW ring, it
leads to need different func to release mbuf properly.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h |1 +
drivers/net/fm10k/fm10k_ethdev.c |6 ++
drivers/net/fm10k/fm10k_rxtx_vec.c | 18 ++
3 files changed, 25 insertions(+), 0 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index 5666af6..d17b2fb 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -331,6 +331,7 @@ uint16_t fm10k_xmit_pkts(void *tx_queue, struct rte_mbuf
**tx_pkts,
int fm10k_rxq_vec_setup(struct fm10k_rx_queue *rxq);
int fm10k_rx_vec_condition_check(struct rte_eth_dev *);
+void fm10k_rx_queue_release_mbufs_vec(struct fm10k_rx_queue *rxq);
uint16_t fm10k_recv_pkts_vec(void *, struct rte_mbuf **, uint16_t);
uint16_t fm10k_recv_scattered_pkts_vec(void *, struct rte_mbuf **,
uint16_t);
diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c
index 70dac2a..3c7b707 100644
--- a/drivers/net/fm10k/fm10k_ethdev.c
+++ b/drivers/net/fm10k/fm10k_ethdev.c
@@ -143,6 +143,12 @@ rx_queue_clean(struct fm10k_rx_queue *q)
for (i = 0; i < q->nb_desc; ++i)
q->hw_ring[i] = zero;
+ /* vPMD driver has a different way of releasing mbufs. */
+ if (q->rx_using_sse) {
+ fm10k_rx_queue_release_mbufs_vec(q);
+ return;
+ }
+
/* free software buffers */
for (i = 0; i < q->nb_desc; ++i) {
if (q->sw_ring[i]) {
diff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c
b/drivers/net/fm10k/fm10k_rxtx_vec.c
index ffd022a..4d90d6a 100644
--- a/drivers/net/fm10k/fm10k_rxtx_vec.c
+++ b/drivers/net/fm10k/fm10k_rxtx_vec.c
@@ -321,6 +321,24 @@ fm10k_rxq_rearm(struct fm10k_rx_queue *rxq)
FM10K_PCI_REG_WRITE(rxq->tail_ptr, rx_id);
}
+void __attribute__((cold))
+fm10k_rx_queue_release_mbufs_vec(struct fm10k_rx_queue *rxq)
+{
+ const unsigned mask = rxq->nb_desc - 1;
+ unsigned i;
+
+ if (rxq->sw_ring == NULL || rxq->rxrearm_nb >= rxq->nb_desc)
+ return;
+
+ /* free all mbufs that are valid in the ring */
+ for (i = rxq->next_dd; i != rxq->rxrearm_start; i = (i + 1) & mask)
+ rte_pktmbuf_free_seg(rxq->sw_ring[i]);
+ rxq->rxrearm_nb = rxq->nb_desc;
+
+ /* set all entries to NULL */
+ memset(rxq->sw_ring, 0, sizeof(rxq->sw_ring[0]) * rxq->nb_desc);
+}
+
static inline uint16_t
fm10k_recv_raw_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts, uint8_t *split_packet)
--
1.7.7.6
[dpdk-dev] [PATCH v5 05/14] fm10k: add func to do Vector RX condition check
From: "Chen Jing D(Mark)"
Add func fm10k_rx_vec_condition_check to check if Vector RX
func can be applied.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h |1 +
drivers/net/fm10k/fm10k_rxtx_vec.c | 31 +++
2 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index 96b30a7..6c1c698 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -329,5 +329,6 @@ uint16_t fm10k_xmit_pkts(void *tx_queue, struct rte_mbuf
**tx_pkts,
uint16_t nb_pkts);
int fm10k_rxq_vec_setup(struct fm10k_rx_queue *rxq);
+int fm10k_rx_vec_condition_check(struct rte_eth_dev *);
uint16_t fm10k_recv_pkts_vec(void *, struct rte_mbuf **, uint16_t);
#endif
diff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c
b/drivers/net/fm10k/fm10k_rxtx_vec.c
index 9633f35..64036e3 100644
--- a/drivers/net/fm10k/fm10k_rxtx_vec.c
+++ b/drivers/net/fm10k/fm10k_rxtx_vec.c
@@ -172,6 +172,37 @@ fm10k_desc_to_pktype_v(__m128i descs[4], struct rte_mbuf
**rx_pkts)
#endif
int __attribute__((cold))
+fm10k_rx_vec_condition_check(struct rte_eth_dev *dev)
+{
+#ifndef RTE_LIBRTE_IEEE1588
+ struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
+ struct rte_fdir_conf *fconf = &dev->data->dev_conf.fdir_conf;
+
+#ifndef RTE_FM10K_RX_OLFLAGS_ENABLE
+ /* whithout rx ol_flags, no VP flag report */
+ if (rxmode->hw_vlan_extend != 0)
+ return -1;
+#endif
+
+ /* no fdir support */
+ if (fconf->mode != RTE_FDIR_MODE_NONE)
+ return -1;
+
+ /* - no csum error report support
+* - no header split support
+*/
+ if (rxmode->hw_ip_checksum == 1 ||
+ rxmode->header_split == 1)
+ return -1;
+
+ return 0;
+#else
+ RTE_SET_USED(dev);
+ return -1;
+#endif
+}
+
+int __attribute__((cold))
fm10k_rxq_vec_setup(struct fm10k_rx_queue *rxq)
{
uintptr_t p;
--
1.7.7.6
[dpdk-dev] [PATCH v5 09/14] fm10k: add Vector TX function
From: "Chen Jing D(Mark)"
Add Vector TX func fm10k_xmit_pkts_vec to transmit packets.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h |5 +
drivers/net/fm10k/fm10k_rxtx_vec.c | 150
2 files changed, 155 insertions(+), 0 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index d17b2fb..5525b72 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -217,6 +217,9 @@ struct fm10k_tx_queue {
uint16_t nb_used;
uint16_t free_thresh;
uint16_t rs_thresh;
+ /* Below 2 fields only valid in case vPMD is applied. */
+ uint16_t next_rs; /* Next pos to set RS flag */
+ uint16_t next_dd; /* Next pos to check DD flag */
volatile uint32_t *tail_ptr;
uint16_t nb_desc;
uint8_t port_id;
@@ -335,4 +338,6 @@ void fm10k_rx_queue_release_mbufs_vec(struct fm10k_rx_queue
*rxq);
uint16_t fm10k_recv_pkts_vec(void *, struct rte_mbuf **, uint16_t);
uint16_t fm10k_recv_scattered_pkts_vec(void *, struct rte_mbuf **,
uint16_t);
+uint16_t fm10k_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
+ uint16_t nb_pkts);
#endif
diff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c
b/drivers/net/fm10k/fm10k_rxtx_vec.c
index 4d90d6a..4515b26 100644
--- a/drivers/net/fm10k/fm10k_rxtx_vec.c
+++ b/drivers/net/fm10k/fm10k_rxtx_vec.c
@@ -627,3 +627,153 @@ fm10k_recv_scattered_pkts_vec(void *rx_queue,
return i + fm10k_reassemble_packets(rxq, &rx_pkts[i], nb_bufs - i,
&split_flags[i]);
}
+
+static inline void
+vtx1(volatile struct fm10k_tx_desc *txdp,
+ struct rte_mbuf *pkt, uint64_t flags)
+{
+ __m128i descriptor = _mm_set_epi64x(flags << 56 |
+ pkt->vlan_tci << 16 | pkt->data_len,
+ MBUF_DMA_ADDR(pkt));
+ _mm_store_si128((__m128i *)txdp, descriptor);
+}
+
+static inline void
+vtx(volatile struct fm10k_tx_desc *txdp,
+ struct rte_mbuf **pkt, uint16_t nb_pkts, uint64_t flags)
+{
+ int i;
+
+ for (i = 0; i < nb_pkts; ++i, ++txdp, ++pkt)
+ vtx1(txdp, *pkt, flags);
+}
+
+static inline int __attribute__((always_inline))
+fm10k_tx_free_bufs(struct fm10k_tx_queue *txq)
+{
+ struct rte_mbuf **txep;
+ uint8_t flags;
+ uint32_t n;
+ uint32_t i;
+ int nb_free = 0;
+ struct rte_mbuf *m, *free[RTE_FM10K_TX_MAX_FREE_BUF_SZ];
+
+ /* check DD bit on threshold descriptor */
+ flags = txq->hw_ring[txq->next_dd].flags;
+ if (!(flags & FM10K_TXD_FLAG_DONE))
+ return 0;
+
+ n = txq->rs_thresh;
+
+ /* First buffer to free from S/W ring is at index
+* next_dd - (rs_thresh-1)
+*/
+ txep = &txq->sw_ring[txq->next_dd - (n - 1)];
+ m = __rte_pktmbuf_prefree_seg(txep[0]);
+ if (likely(m != NULL)) {
+ free[0] = m;
+ nb_free = 1;
+ for (i = 1; i < n; i++) {
+ m = __rte_pktmbuf_prefree_seg(txep[i]);
+ if (likely(m != NULL)) {
+ if (likely(m->pool == free[0]->pool))
+ free[nb_free++] = m;
+ else {
+ rte_mempool_put_bulk(free[0]->pool,
+ (void *)free, nb_free);
+ free[0] = m;
+ nb_free = 1;
+ }
+ }
+ }
+ rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
+ } else {
+ for (i = 1; i < n; i++) {
+ m = __rte_pktmbuf_prefree_seg(txep[i]);
+ if (m != NULL)
+ rte_mempool_put(m->pool, m);
+ }
+ }
+
+ /* buffers were freed, update counters */
+ txq->nb_free = (uint16_t)(txq->nb_free + txq->rs_thresh);
+ txq->next_dd = (uint16_t)(txq->next_dd + txq->rs_thresh);
+ if (txq->next_dd >= txq->nb_desc)
+ txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+
+ return txq->rs_thresh;
+}
+
+static inline void __attribute__((always_inline))
+tx_backlog_entry(struct rte_mbuf **txep,
+struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
+{
+ int i;
+
+ for (i = 0; i < (int)nb_pkts; ++i)
+ txep[i] = tx_pkts[i];
+}
+
+uint16_t
+fm10k_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
+ uint16_t nb_pkts)
+{
+ struct fm10k_tx_queue *txq = (struct fm10k_tx_queue *)tx_queue;
+ volatile struct fm10k_tx_desc *txdp;
+ struct rte_mbuf **txep;
+ uint16_t n, nb_commit, tx_id;
+ uint64_t flags = FM10K_TXD_FLAG_LAST;
+ uint64_t rs = FM10K_TXD_FLAG_RS | FM10
[dpdk-dev] [PATCH v5 10/14] fm10k: use func pointer to reset TX queue and mbuf release
From: "Chen Jing D(Mark)"
Vector TX use different way to manage TX queue, it's necessary
to use different functions to reset TX queue and release mbuf
in TX queue. So, introduce 2 function pointers to do such ops.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h|9 +
drivers/net/fm10k/fm10k_ethdev.c | 24 +++-
2 files changed, 28 insertions(+), 5 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index 5525b72..bfb71da 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -206,11 +206,14 @@ struct fifo {
uint16_t *endp;
};
+struct fm10k_txq_ops;
+
struct fm10k_tx_queue {
struct rte_mbuf **sw_ring;
struct fm10k_tx_desc *hw_ring;
uint64_t hw_ring_phys_addr;
struct fifo rs_tracker;
+ const struct fm10k_txq_ops *ops; /* txq ops */
uint16_t last_free;
uint16_t next_free;
uint16_t nb_free;
@@ -227,6 +230,11 @@ struct fm10k_tx_queue {
uint16_t queue_id;
};
+struct fm10k_txq_ops {
+ void (*release_mbufs)(struct fm10k_tx_queue *txq);
+ void (*reset)(struct fm10k_tx_queue *txq);
+};
+
#define MBUF_DMA_ADDR(mb) \
((uint64_t) ((mb)->buf_physaddr + (mb)->data_off))
@@ -340,4 +348,5 @@ uint16_t fm10k_recv_scattered_pkts_vec(void *, struct
rte_mbuf **,
uint16_t);
uint16_t fm10k_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
+void fm10k_txq_vec_setup(struct fm10k_tx_queue *txq);
#endif
diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c
index 3c7b707..0b40797 100644
--- a/drivers/net/fm10k/fm10k_ethdev.c
+++ b/drivers/net/fm10k/fm10k_ethdev.c
@@ -292,6 +292,11 @@ tx_queue_disable(struct fm10k_hw *hw, uint16_t qnum)
return 0;
}
+static const struct fm10k_txq_ops def_txq_ops = {
+ .release_mbufs = tx_queue_free,
+ .reset = tx_queue_reset,
+};
+
static int
fm10k_dev_configure(struct rte_eth_dev *dev)
{
@@ -571,7 +576,9 @@ fm10k_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t
tx_queue_id)
PMD_INIT_FUNC_TRACE();
if (tx_queue_id < dev->data->nb_tx_queues) {
- tx_queue_reset(dev->data->tx_queues[tx_queue_id]);
+ struct fm10k_tx_queue *q = dev->data->tx_queues[tx_queue_id];
+
+ q->ops->reset(q);
/* reset head and tail pointers */
FM10K_WRITE_REG(hw, FM10K_TDH(tx_queue_id), 0);
@@ -837,8 +844,11 @@ fm10k_dev_queue_release(struct rte_eth_dev *dev)
PMD_INIT_FUNC_TRACE();
if (dev->data->tx_queues) {
- for (i = 0; i < dev->data->nb_tx_queues; i++)
- fm10k_tx_queue_release(dev->data->tx_queues[i]);
+ for (i = 0; i < dev->data->nb_tx_queues; i++) {
+ struct fm10k_tx_queue *txq = dev->data->tx_queues[i];
+
+ txq->ops->release_mbufs(txq);
+ }
}
if (dev->data->rx_queues) {
@@ -1455,7 +1465,9 @@ fm10k_tx_queue_setup(struct rte_eth_dev *dev, uint16_t
queue_id,
* different socket than was previously used.
*/
if (dev->data->tx_queues[queue_id] != NULL) {
- tx_queue_free(dev->data->tx_queues[queue_id]);
+ struct fm10k_tx_queue *txq = dev->data->tx_queues[queue_id];
+
+ txq->ops->release_mbufs(txq);
dev->data->tx_queues[queue_id] = NULL;
}
@@ -1471,6 +1483,7 @@ fm10k_tx_queue_setup(struct rte_eth_dev *dev, uint16_t
queue_id,
q->nb_desc = nb_desc;
q->port_id = dev->data->port_id;
q->queue_id = queue_id;
+ q->ops = &def_txq_ops;
q->tail_ptr = (volatile uint32_t *)
&((uint32_t *)hw->hw_addr)[FM10K_TDT(queue_id)];
if (handle_txconf(q, conf))
@@ -1529,9 +1542,10 @@ fm10k_tx_queue_setup(struct rte_eth_dev *dev, uint16_t
queue_id,
static void
fm10k_tx_queue_release(void *queue)
{
+ struct fm10k_tx_queue *q = queue;
PMD_INIT_FUNC_TRACE();
- tx_queue_free(queue);
+ q->ops->release_mbufs(q);
}
static int
--
1.7.7.6
[dpdk-dev] [PATCH v5 11/14] fm10k: introduce 2 funcs to reset TX queue and mbuf release
From: "Chen Jing D(Mark)"
Add 2 funcs to reset TX queue and mbuf release when Vector TX
applied.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k_rxtx_vec.c | 68
1 files changed, 68 insertions(+), 0 deletions(-)
diff --git a/drivers/net/fm10k/fm10k_rxtx_vec.c
b/drivers/net/fm10k/fm10k_rxtx_vec.c
index 4515b26..06beca9 100644
--- a/drivers/net/fm10k/fm10k_rxtx_vec.c
+++ b/drivers/net/fm10k/fm10k_rxtx_vec.c
@@ -44,6 +44,11 @@
#pragma GCC diagnostic ignored "-Wcast-qual"
#endif
+static void
+fm10k_tx_queue_release_mbufs_vec(struct fm10k_tx_queue *txq);
+static void
+fm10k_reset_tx_queue(struct fm10k_tx_queue *txq);
+
/* Handling the offload flags (olflags) field takes computation
* time when receiving packets. Therefore we provide a flag to disable
* the processing of the olflags field when they are not needed. This
@@ -628,6 +633,17 @@ fm10k_recv_scattered_pkts_vec(void *rx_queue,
&split_flags[i]);
}
+static const struct fm10k_txq_ops vec_txq_ops = {
+ .release_mbufs = fm10k_tx_queue_release_mbufs_vec,
+ .reset = fm10k_reset_tx_queue,
+};
+
+void __attribute__((cold))
+fm10k_txq_vec_setup(struct fm10k_tx_queue *txq)
+{
+ txq->ops = &vec_txq_ops;
+}
+
static inline void
vtx1(volatile struct fm10k_tx_desc *txdp,
struct rte_mbuf *pkt, uint64_t flags)
@@ -777,3 +793,55 @@ fm10k_xmit_pkts_vec(void *tx_queue, struct rte_mbuf
**tx_pkts,
return nb_pkts;
}
+
+static void __attribute__((cold))
+fm10k_tx_queue_release_mbufs_vec(struct fm10k_tx_queue *txq)
+{
+ unsigned i;
+ const uint16_t max_desc = (uint16_t)(txq->nb_desc - 1);
+
+ if (txq->sw_ring == NULL || txq->nb_free == max_desc)
+ return;
+
+ /* release the used mbufs in sw_ring */
+ for (i = txq->next_dd - (txq->rs_thresh - 1);
+i != txq->next_free;
+i = (i + 1) & max_desc)
+ rte_pktmbuf_free_seg(txq->sw_ring[i]);
+
+ txq->nb_free = max_desc;
+
+ /* reset tx_entry */
+ for (i = 0; i < txq->nb_desc; i++)
+ txq->sw_ring[i] = NULL;
+
+ rte_free(txq->sw_ring);
+ txq->sw_ring = NULL;
+}
+
+static void __attribute__((cold))
+fm10k_reset_tx_queue(struct fm10k_tx_queue *txq)
+{
+ static const struct fm10k_tx_desc zeroed_desc = {0};
+ struct rte_mbuf **txe = txq->sw_ring;
+ uint16_t i;
+
+ /* Zero out HW ring memory */
+ for (i = 0; i < txq->nb_desc; i++)
+ txq->hw_ring[i] = zeroed_desc;
+
+ /* Initialize SW ring entries */
+ for (i = 0; i < txq->nb_desc; i++)
+ txe[i] = NULL;
+
+ txq->next_dd = (uint16_t)(txq->rs_thresh - 1);
+ txq->next_rs = (uint16_t)(txq->rs_thresh - 1);
+
+ txq->next_free = 0;
+ txq->nb_used = 0;
+ /* Always allow 1 descriptor to be un-allocated to avoid
+* a H/W race condition
+*/
+ txq->nb_free = (uint16_t)(txq->nb_desc - 1);
+ FM10K_PCI_REG_WRITE(txq->tail_ptr, 0);
+}
--
1.7.7.6
[dpdk-dev] [PATCH v5 12/14] fm10k: Add function to decide best TX func
From: "Chen Jing D(Mark)"
Add func fm10k_set_tx_function to decide the best TX func in
fm10k_dev_tx_init.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h|1 +
drivers/net/fm10k/fm10k_ethdev.c | 38 --
2 files changed, 37 insertions(+), 2 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index bfb71da..8e2c6a4 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -224,6 +224,7 @@ struct fm10k_tx_queue {
uint16_t next_rs; /* Next pos to set RS flag */
uint16_t next_dd; /* Next pos to check DD flag */
volatile uint32_t *tail_ptr;
+ uint32_t txq_flags; /* Holds flags for this TXq */
uint16_t nb_desc;
uint8_t port_id;
uint8_t tx_deferred_start; /** < don't start this queue in dev start. */
diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c
index 0b40797..05ed90d 100644
--- a/drivers/net/fm10k/fm10k_ethdev.c
+++ b/drivers/net/fm10k/fm10k_ethdev.c
@@ -53,6 +53,9 @@
#define CHARS_PER_UINT32 (sizeof(uint32_t))
#define BIT_MASK_PER_UINT32 ((1 << CHARS_PER_UINT32) - 1)
+#define FM10K_SIMPLE_TX_FLAG ((uint32_t)ETH_TXQ_FLAGS_NOMULTSEGS | \
+ ETH_TXQ_FLAGS_NOOFFLOADS)
+
static void fm10k_close_mbx_service(struct fm10k_hw *hw);
static void fm10k_dev_promiscuous_enable(struct rte_eth_dev *dev);
static void fm10k_dev_promiscuous_disable(struct rte_eth_dev *dev);
@@ -68,6 +71,7 @@ fm10k_MACVLAN_remove_all(struct rte_eth_dev *dev);
static void fm10k_tx_queue_release(void *queue);
static void fm10k_rx_queue_release(void *queue);
static void fm10k_set_rx_function(struct rte_eth_dev *dev);
+static void fm10k_set_tx_function(struct rte_eth_dev *dev);
static void
fm10k_mbx_initlock(struct fm10k_hw *hw)
@@ -414,6 +418,10 @@ fm10k_dev_tx_init(struct rte_eth_dev *dev)
base_addr >> (CHAR_BIT * sizeof(uint32_t)));
FM10K_WRITE_REG(hw, FM10K_TDLEN(i), size);
}
+
+ /* set up vector or scalar TX function as appropriate */
+ fm10k_set_tx_function(dev);
+
return 0;
}
@@ -983,8 +991,7 @@ fm10k_dev_infos_get(struct rte_eth_dev *dev,
},
.tx_free_thresh = FM10K_TX_FREE_THRESH_DEFAULT(0),
.tx_rs_thresh = FM10K_TX_RS_THRESH_DEFAULT(0),
- .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
- ETH_TXQ_FLAGS_NOOFFLOADS,
+ .txq_flags = FM10K_SIMPLE_TX_FLAG,
};
}
@@ -1483,6 +1490,7 @@ fm10k_tx_queue_setup(struct rte_eth_dev *dev, uint16_t
queue_id,
q->nb_desc = nb_desc;
q->port_id = dev->data->port_id;
q->queue_id = queue_id;
+ q->txq_flags = conf->txq_flags;
q->ops = &def_txq_ops;
q->tail_ptr = (volatile uint32_t *)
&((uint32_t *)hw->hw_addr)[FM10K_TDT(queue_id)];
@@ -2094,6 +2102,32 @@ static const struct eth_dev_ops fm10k_eth_dev_ops = {
};
static void __attribute__((cold))
+fm10k_set_tx_function(struct rte_eth_dev *dev)
+{
+ struct fm10k_tx_queue *txq;
+ int i;
+ int use_sse = 1;
+
+ for (i = 0; i < dev->data->nb_tx_queues; i++) {
+ txq = dev->data->tx_queues[i];
+ if ((txq->txq_flags & FM10K_SIMPLE_TX_FLAG) !=
+ FM10K_SIMPLE_TX_FLAG) {
+ use_sse = 0;
+ break;
+ }
+ }
+
+ if (use_sse) {
+ for (i = 0; i < dev->data->nb_tx_queues; i++) {
+ txq = dev->data->tx_queues[i];
+ fm10k_txq_vec_setup(txq);
+ }
+ dev->tx_pkt_burst = fm10k_xmit_pkts_vec;
+ } else
+ dev->tx_pkt_burst = fm10k_xmit_pkts;
+}
+
+static void __attribute__((cold))
fm10k_set_rx_function(struct rte_eth_dev *dev)
{
struct fm10k_dev_info *dev_info = FM10K_DEV_PRIVATE_TO_INFO(dev);
--
1.7.7.6
[dpdk-dev] [PATCH v5 13/14] fm10k: fix a crash issue in vector RX func
From: "Chen Jing D(Mark)"
Vector RX function will process 4 packets at a time. When the RX
ring wrapps to the tail and the left descriptor size is not multiple
of 4, SW will overwrite memory that not belongs to it and cause crash.
The fix will allocate additional 4 HW/SW spaces at the tail to avoid
overwrite.
Signed-off-by: Chen Jing D(Mark)
---
drivers/net/fm10k/fm10k.h|4 +++-
drivers/net/fm10k/fm10k_ethdev.c | 19 +--
2 files changed, 20 insertions(+), 3 deletions(-)
diff --git a/drivers/net/fm10k/fm10k.h b/drivers/net/fm10k/fm10k.h
index 8e2c6a4..82a548f 100644
--- a/drivers/net/fm10k/fm10k.h
+++ b/drivers/net/fm10k/fm10k.h
@@ -177,7 +177,7 @@ struct fm10k_rx_queue {
struct rte_mbuf *pkt_last_seg; /* Last segment of current packet. */
uint64_t hw_ring_phys_addr;
uint64_t mbuf_initializer; /* value to init mbufs */
- /** need to alloc dummy mbuf, for wraparound when scanning hw ring */
+ /* need to alloc dummy mbuf, for wraparound when scanning hw ring */
struct rte_mbuf fake_mbuf;
uint16_t next_dd;
uint16_t next_alloc;
@@ -185,6 +185,8 @@ struct fm10k_rx_queue {
uint16_t alloc_thresh;
volatile uint32_t *tail_ptr;
uint16_t nb_desc;
+ /* Number of faked desc added at the tail for Vector RX function */
+ uint16_t nb_fake_desc;
uint16_t queue_id;
/* Below 2 fields only valid in case vPMD is applied. */
uint16_t rxrearm_nb; /* number of remaining to be re-armed */
diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c
index 05ed90d..dde067f 100644
--- a/drivers/net/fm10k/fm10k_ethdev.c
+++ b/drivers/net/fm10k/fm10k_ethdev.c
@@ -102,6 +102,7 @@ fm10k_mbx_unlock(struct fm10k_hw *hw)
static inline int
rx_queue_reset(struct fm10k_rx_queue *q)
{
+ static const union fm10k_rx_desc zero = {{0} };
uint64_t dma_addr;
int i, diag;
PMD_INIT_FUNC_TRACE();
@@ -122,6 +123,15 @@ rx_queue_reset(struct fm10k_rx_queue *q)
q->hw_ring[i].q.hdr_addr = dma_addr;
}
+ /* initialize extra software ring entries. Space for these extra
+* entries is always allocated.
+*/
+ memset(&q->fake_mbuf, 0x0, sizeof(q->fake_mbuf));
+ for (i = 0; i < q->nb_fake_desc; ++i) {
+ q->sw_ring[q->nb_desc + i] = &q->fake_mbuf;
+ q->hw_ring[q->nb_desc + i] = zero;
+ }
+
q->next_dd = 0;
q->next_alloc = 0;
q->next_trigger = q->alloc_thresh - 1;
@@ -147,6 +157,10 @@ rx_queue_clean(struct fm10k_rx_queue *q)
for (i = 0; i < q->nb_desc; ++i)
q->hw_ring[i] = zero;
+ /* zero faked descriptors */
+ for (i = 0; i < q->nb_fake_desc; ++i)
+ q->hw_ring[q->nb_desc + i] = zero;
+
/* vPMD driver has a different way of releasing mbufs. */
if (q->rx_using_sse) {
fm10k_rx_queue_release_mbufs_vec(q);
@@ -1326,6 +1340,7 @@ fm10k_rx_queue_setup(struct rte_eth_dev *dev, uint16_t
queue_id,
/* setup queue */
q->mp = mp;
q->nb_desc = nb_desc;
+ q->nb_fake_desc = FM10K_MULT_RX_DESC;
q->port_id = dev->data->port_id;
q->queue_id = queue_id;
q->tail_ptr = (volatile uint32_t *)
@@ -1335,8 +1350,8 @@ fm10k_rx_queue_setup(struct rte_eth_dev *dev, uint16_t
queue_id,
/* allocate memory for the software ring */
q->sw_ring = rte_zmalloc_socket("fm10k sw ring",
- nb_desc * sizeof(struct rte_mbuf *),
- RTE_CACHE_LINE_SIZE, socket_id);
+ (nb_desc + q->nb_fake_desc) * sizeof(struct rte_mbuf *),
+ RTE_CACHE_LINE_SIZE, socket_id);
if (q->sw_ring == NULL) {
PMD_INIT_LOG(ERR, "Cannot allocate software ring");
rte_free(q);
--
1.7.7.6
[dpdk-dev] [PATCH v5 14/14] doc: release notes update for fm10k Vector PMD
From: "Chen Jing D(Mark)" Update 2.2 release notes, add descriptions for Vector PMD implementation in fm10k driver. Signed-off-by: Chen Jing D(Mark) --- doc/guides/rel_notes/release_2_2.rst |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/doc/guides/rel_notes/release_2_2.rst b/doc/guides/rel_notes/release_2_2.rst index 89e4d58..d9d4ce5 100644 --- a/doc/guides/rel_notes/release_2_2.rst +++ b/doc/guides/rel_notes/release_2_2.rst @@ -79,6 +79,12 @@ Drivers Fixed issue when releasing null control queue. +* **fm10k: Add Vector Rx/Tx implementation.** + + This patch set includes Vector Rx/Tx functions to receive/transmit packets + for fm10k devices. It also contains logic to do sanity check for proper + RX/TX function selections. + Libraries ~ -- 1.7.7.6
[dpdk-dev] [PATCH 3/8] driver/virtio:add vhost TX offload support capability in virtio-net
From: David Marchand [mailto:david.march...@6wind.com] Sent: Thursday, October 29, 2015 8:45 PM To: Liu, Jijiang Cc: dev at dpdk.org Subject: Re: [dpdk-dev] [PATCH 3/8] driver/virtio:add vhost TX offload support capability in virtio-net Hello Jijiang, On Wed, Oct 21, 2015 at 6:46 AM, Jijiang Liu mailto:jijiang.liu at intel.com>> wrote: Add vhost TX checksum and TSO capabilities in virtio-net lib. Signed-off-by: Jijiang Liu mailto:jijiang.liu at intel.com>> --- drivers/net/virtio/virtio_ethdev.h |5 - 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/drivers/net/virtio/virtio_ethdev.h b/drivers/net/virtio/virtio_ethdev.h index 9026d42..6ee95c6 100644 --- a/drivers/net/virtio/virtio_ethdev.h +++ b/drivers/net/virtio/virtio_ethdev.h @@ -64,7 +64,10 @@ 1u << VIRTIO_NET_F_CTRL_VQ | \ 1u << VIRTIO_NET_F_CTRL_RX | \ 1u << VIRTIO_NET_F_CTRL_VLAN | \ -1u << VIRTIO_NET_F_MRG_RXBUF) +1u << VIRTIO_NET_F_MRG_RXBUF | \ +1u << VIRTIO_NET_F_HOST_TSO4 | \ +1u << VIRTIO_NET_F_HOST_TSO6 | \ +1u << VIRTIO_NET_F_CSUM) You did not update tx offload capabilities field in dev_info. -- David Marchand You meant that I should update the tx offload capabilities in the virtio_dev_info_get() function, correct?
[dpdk-dev] [PATCH v5] i40e: Fix the statistics issue of i40e
The old statistics on i40e only counted the packets on ports. So the discarding packets on VSI were not counted. This patch is to make statistics for packets both on ports and VSI. Also update release notes. Signed-off-by: Xutao Sun --- v2: - reword comments v3: - update release notes v4: - fix the wrong release notes and move the doc as part of this patch v5: - fix the patch_apply issue doc/guides/rel_notes/release_2_2.rst | 4 drivers/net/i40e/i40e_ethdev.c | 23 ++- 2 files changed, 18 insertions(+), 9 deletions(-) diff --git a/doc/guides/rel_notes/release_2_2.rst b/doc/guides/rel_notes/release_2_2.rst index 89e4d58..8991209 100644 --- a/doc/guides/rel_notes/release_2_2.rst +++ b/doc/guides/rel_notes/release_2_2.rst @@ -67,6 +67,10 @@ Drivers Fixed i40e issue that occurred when a DPDK application didn't initialize ports if memory wasn't available on socket 0. +* **i40e: Fix statistics of packets.** + + Add discarding packets on VSI to the stats and rectify the old statistics. + * **vhost: Fixed Qemu shutdown.** Fixed issue with libvirt ``virsh destroy`` not killing the VM. diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 2dd9fdc..5365192 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -1511,21 +1511,26 @@ i40e_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) if (pf->main_vsi) i40e_update_vsi_stats(pf->main_vsi); - stats->ipackets = ns->eth.rx_unicast + ns->eth.rx_multicast + - ns->eth.rx_broadcast; - stats->opackets = ns->eth.tx_unicast + ns->eth.tx_multicast + - ns->eth.tx_broadcast; - stats->ibytes = ns->eth.rx_bytes; - stats->obytes = ns->eth.tx_bytes; - stats->oerrors = ns->eth.tx_errors; - stats->imcasts = ns->eth.rx_multicast; + stats->ipackets = pf->main_vsi->eth_stats.rx_unicast + + pf->main_vsi->eth_stats.rx_multicast + + pf->main_vsi->eth_stats.rx_broadcast - + pf->main_vsi->eth_stats.rx_discards; + stats->opackets = pf->main_vsi->eth_stats.tx_unicast + + pf->main_vsi->eth_stats.tx_multicast + + pf->main_vsi->eth_stats.tx_broadcast; + stats->ibytes = pf->main_vsi->eth_stats.rx_bytes; + stats->obytes = pf->main_vsi->eth_stats.tx_bytes; + stats->oerrors = ns->eth.tx_errors + + pf->main_vsi->eth_stats.tx_errors; + stats->imcasts = pf->main_vsi->eth_stats.rx_multicast; stats->fdirmatch = ns->fd_sb_match; /* Rx Errors */ stats->ibadcrc = ns->crc_errors; stats->ibadlen = ns->rx_length_errors + ns->rx_undersize + ns->rx_oversize + ns->rx_fragments + ns->rx_jabber; - stats->imissed = ns->eth.rx_discards; + stats->imissed = ns->eth.rx_discards + + pf->main_vsi->eth_stats.rx_discards; stats->ierrors = stats->ibadcrc + stats->ibadlen + stats->imissed; PMD_DRV_LOG(DEBUG, "* PF stats start ***"); -- 1.9.3
[dpdk-dev] [PATCH v2 00/11] interrupt mode for i40e
> -Original Message- > From: Liang, Cunming > Sent: Friday, October 30, 2015 1:28 PM > To: dev at dpdk.org > Cc: Zhang, Helin; He, Shaopeng; Wu, Jingjing; Liang, Cunming > Subject: [PATCH v2 00/11] interrupt mode for i40e > > v2 change: > - rebase code base > - rework to depend on one previous patch > patch http://dpdk.org/dev/patchwork/patch/7504/ > - always set DIS_AUTOMASK_* bit in PF to avoid ENA flag auto-clear > > This patch series contains four major parts. > > 1. always reserve vector zero for misc cause in vfio mapping 2. add api to > declare > the capability of multiple interrupt vector support 3. fix the rx interrupt > compatible issue with mbox in ixgbe/igb IOV-PF 4. add rx interrupt support in > i40e PF and VF > > Cunming Liang (11): > eal/linux: vfio map misc intr to vector zero > ixgbe: reserve intr vector zero for misc cause > igb: reserve intr vector zero for misc cause > eal/linux: not allow to enable zero intr efd > eal/linux: add intr api to report multi-vector capability > ixgbe: fix rx intr compatible issue with PF mbox > ixgbevf: cleanup unnecessary interrupt handler > igb: fix rx intr compatible issue with PF mbox > i40e: add rx interrupt support > i40evf: add rx interrupt support > doc: release note update for intr mode > > doc/guides/rel_notes/release_2_2.rst | 4 + > drivers/net/e1000/igb_ethdev.c | 63 +++- > drivers/net/i40e/i40e_ethdev.c | 374 > + > drivers/net/i40e/i40e_ethdev.h | 17 + > drivers/net/i40e/i40e_ethdev_vf.c | 143 +++- > drivers/net/i40e/i40e_pf.c | 7 +- > drivers/net/ixgbe/ixgbe_ethdev.c | 144 +++- > .../bsdapp/eal/include/exec-env/rte_interrupts.h | 3 +- > lib/librte_eal/linuxapp/eal/eal_interrupts.c | 35 +- > .../linuxapp/eal/include/exec-env/rte_interrupts.h | 16 +- > lib/librte_eal/linuxapp/eal/rte_eal_version.map| 7 + > 11 files changed, 612 insertions(+), 201 deletions(-) > > -- > 2.4.3 Acked-by: Helin Zhang
[dpdk-dev] [PATCH v5] i40e: Fix the statistics issue of i40e
> -Original Message- > From: Sun, Xutao > Sent: Friday, October 30, 2015 4:21 PM > To: dev at dpdk.org > Cc: Zhang, Helin; Van Haaren, Harry; Sun, Xutao > Subject: [PATCH v5] i40e: Fix the statistics issue of i40e > > The old statistics on i40e only counted the packets on ports. > So the discarding packets on VSI were not counted. > This patch is to make statistics for packets both on ports and VSI. > Also update release notes. > > Signed-off-by: Xutao Sun Acked-by: Helin Zhang
[dpdk-dev] [PATCH v5 00/14] Vector Rx/Tx PMD implementation for fm10k
> -Original Message- > From: Chen, Jing D > Sent: Friday, October 30, 2015 4:03 PM > To: dev at dpdk.org > Cc: Liang, Cunming; Tao, Zhe; He, Shaopeng; Ananyev, Konstantin; Richardson, > Bruce; Chen, Jing D > Subject: [PATCH v5 00/14] Vector Rx/Tx PMD implementation for fm10k > > From: "Chen Jing D(Mark)" > > v5: > - Fix some warnings reported by checkpatch.pl > - Squash 3 patches into 1 to avoid compile error on unsued functions. > - Sync with master branch > > v4: > - Clear HW/SW ring content after allocating mbuf failed. > > v3: > - Add a blank line after variable definition. > - Do floor alignment for passing in argument nb_pkts to avoid memory > overwritten. > - Only scan max of 32 desc in scatter Rx function to avoid memory > overwritten. > > v2: > - Fix a typo issue. > - Fix an improper prefetch in vector RX function, in which prefetches >un-initialized mbuf. > - Remove limitation on number of desc pointer in vector RX function. > - Re-organize some comments. > - Add a new patch to fix a crash issue in vector RX func. > - Add a new patch to update release notes. > > v1: > This patch set includes Vector Rx/Tx functions to receive/transmit packets > for fm10k devices. It also contains logic to do sanity check for proper > RX/TX function selections. > > Chen Jing D(Mark) (14): > fm10k: add new vPMD file > fm10k: add vPMD pre-condition check for each RX queue > fm10k: Add a new func to initialize all parameters > fm10k: add Vector RX function > fm10k: add func to do Vector RX condition check > fm10k: add Vector RX scatter function > fm10k: add function to decide best RX function > fm10k: add func to release mbuf in case Vector RX applied > fm10k: add Vector TX function > fm10k: use func pointer to reset TX queue and mbuf release > fm10k: introduce 2 funcs to reset TX queue and mbuf release > fm10k: Add function to decide best TX func > fm10k: fix a crash issue in vector RX func > doc: release notes update for fm10k Vector PMD > > doc/guides/rel_notes/release_2_2.rst |6 + > drivers/net/fm10k/Makefile |1 + > drivers/net/fm10k/fm10k.h| 45 ++- > drivers/net/fm10k/fm10k_ethdev.c | 172 ++- > drivers/net/fm10k/fm10k_rxtx_vec.c | 847 > ++ > 5 files changed, 1043 insertions(+), 28 deletions(-) > create mode 100644 drivers/net/fm10k/fm10k_rxtx_vec.c > > -- > 1.7.7.6 Acked-by: Cunming Liang
[dpdk-dev] [PATCH 0/5] ARMv8 additions to ARMv7 support
On 30/10/2015 00:17, Jan Viktorin wrote: > I've failed to compile kni/igb for ARMv8. Any ideas? Is it Linux 4.2 > compatbile? > >CC [M] > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.o > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c: > In functi > on ?igb_ndo_bridge_getlink?: > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c:2279:9: > er > ror: too few arguments to function ?ndo_dflt_bridge_getlink? >return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags); > ^ > In file included from > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/net/dst.h:13:0, > from > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/net/sock.h:67, > from > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/linux/tcp.h:22, > from > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c:34: > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/linux/rtnetlink.h:115:12: > note: declared here > extern int ndo_dflt_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, > ^ > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c:2286:1: > error: control reaches end of non-void function [-Werror=return-type] > } > ^ > cc1: all warnings being treated as errors > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/scripts/Makefile.build:258: > recipe for target '/home/jviki/Projects/bu > ildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.o' > failed > > Regards > Jan Jan, To compile DPDK on kernels 4.2 and later, you need two patches submitted to the list last week. The ID's are 7518 - kni-rename-HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK-macro 7519 - kni-fix-igb-build-with-kernel-4.2 And if you're on a 4.3 kernel: 8131 - fix igb_uio's access to pci_dev->msi_list for kernels >= 4.3 Regards, Dave.
[dpdk-dev] [PATCH] doc: update user guide about e1000em limitations
Update interrupt related limitations for e1000em nic. It only support one interrupt source and not support auto-clear. Signed-off-by: Marvin Liu diff --git a/doc/guides/nics/e1000em.rst b/doc/guides/nics/e1000em.rst index fedafad..a84e8e1 100644 --- a/doc/guides/nics/e1000em.rst +++ b/doc/guides/nics/e1000em.rst @@ -176,3 +176,7 @@ The following are known limitations: testpmd [options] -- --mbuf-size= #. Qemu e1000 does not validate the checksum of incoming packets. + +#. Qemu e1000 only support one interrupt source, so link and Rx interrupt should be exclusive. + +#. Qemu e1000 does not support interrupt auto-clear, application should disable interrupt immediately when waked up. -- 1.9.3
[dpdk-dev] [PATCH v2 0/6] add sample ptp slave application
Add a sample application that acts as a PTP slave using the DPDK IEEE1588 functions. Also add some additional IEEE1588 support functions to enable getting, setting and adjusting the device time. V1->V2: PMDs: - add support for e1000 - add support for ixgbe - add support for i40 ethdev: - change function names to more proper. Doc: - add documentation for ptpclient sample: - add kernel adjustment option - add portmask option to provide portmask to aplication Daniel Mrzyglod (4): ethdev: add additional ieee1588 support functions ixgbe: add additional ieee1588 support functions example: PTP client slave minimal implementation doc: add a PTPCLIENT sample guide Pablo de Lara (2): igb: add additional ieee1588 support functions i40e: add additional ieee1588 support functions MAINTAINERS| 3 + doc/guides/rel_notes/release_2_2.rst | 8 + doc/guides/sample_app_ug/img/ptpclient.svg | 520 +++ doc/guides/sample_app_ug/index.rst | 3 + doc/guides/sample_app_ug/ptpclient.rst | 324 drivers/net/e1000/e1000_ethdev.h | 22 + drivers/net/e1000/igb_ethdev.c | 338 - drivers/net/i40e/i40e_ethdev.c | 214 +++- drivers/net/i40e/i40e_ethdev.h | 18 + drivers/net/ixgbe/ixgbe_ethdev.c | 313 +++- drivers/net/ixgbe/ixgbe_ethdev.h | 22 + examples/Makefile | 1 + examples/ptpclient/Makefile| 57 +++ examples/ptpclient/ptpclient.c | 788 + lib/librte_ether/rte_ethdev.c | 36 ++ lib/librte_ether/rte_ethdev.h | 64 +++ lib/librte_ether/rte_ether_version.map | 9 + 17 files changed, 2699 insertions(+), 41 deletions(-) create mode 100644 doc/guides/sample_app_ug/img/ptpclient.svg create mode 100644 doc/guides/sample_app_ug/ptpclient.rst create mode 100644 examples/ptpclient/Makefile create mode 100644 examples/ptpclient/ptpclient.c -- 2.1.0
[dpdk-dev] [PATCH v2 1/6] ethdev: add additional ieee1588 support functions
Add additional functions to support the existing IEEE1588
functionality.
* rte_eth_timesync_settime(), function to set the device clock time.
* rte_eth_timesync_gettime, function to get the device clock time.
* rte_eth_timesync_adjust, function to adjust the device clock time.
Signed-off-by: Daniel Mrzyglod
---
doc/guides/rel_notes/release_2_2.rst | 3 ++
lib/librte_ether/rte_ethdev.c | 36 +++
lib/librte_ether/rte_ethdev.h | 64 ++
lib/librte_ether/rte_ether_version.map | 9 +
4 files changed, 112 insertions(+)
diff --git a/doc/guides/rel_notes/release_2_2.rst
b/doc/guides/rel_notes/release_2_2.rst
index 89e4d58..b83ef7f 100644
--- a/doc/guides/rel_notes/release_2_2.rst
+++ b/doc/guides/rel_notes/release_2_2.rst
@@ -123,6 +123,9 @@ API Changes
* The devargs union field virtual is renamed to virt for C++ compatibility.
+* Add new functions in ethdev to support IEEE1588:
rte_eth_timesync_time_adjust()
+ rte_eth_timesync_time_get(), rte_eth_timesync_time_set()
+
ABI Changes
---
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index f593f6e..d7d2714 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -3284,6 +3284,42 @@ rte_eth_timesync_read_tx_timestamp(uint8_t port_id,
struct timespec *timestamp)
}
int
+rte_eth_timesync_time_adjust(uint8_t port_id, int64_t delta)
+{
+ struct rte_eth_dev *dev;
+
+ VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+ dev = &rte_eth_devices[port_id];
+
+ FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_time_adjust, -ENOTSUP);
+ return (*dev->dev_ops->timesync_time_adjust)(dev, delta);
+}
+
+int
+rte_eth_timesync_time_get(uint8_t port_id, struct timespec *timestamp)
+{
+ struct rte_eth_dev *dev;
+
+ VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+ dev = &rte_eth_devices[port_id];
+
+ FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_time_get, -ENOTSUP);
+ return (*dev->dev_ops->timesync_time_get)(dev, timestamp);
+}
+
+int
+rte_eth_timesync_time_set(uint8_t port_id, struct timespec *timestamp)
+{
+ struct rte_eth_dev *dev;
+
+ VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+ dev = &rte_eth_devices[port_id];
+
+ FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_time_set, -ENOTSUP);
+ return (*dev->dev_ops->timesync_time_set)(dev, timestamp);
+}
+
+int
rte_eth_dev_get_reg_length(uint8_t port_id)
{
struct rte_eth_dev *dev;
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 8a8c82b..c639064 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -1129,6 +1129,17 @@ typedef int (*eth_timesync_read_tx_timestamp_t)(struct
rte_eth_dev *dev,
struct timespec *timestamp);
/**< @internal Function used to read a TX IEEE1588/802.1AS timestamp. */
+typedef int (*eth_timesync_time_adjust)(struct rte_eth_dev *dev, int64_t);
+/**< @internal Function used to adjust device clock */
+
+typedef int (*eth_timesync_time_get)(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
+/**< @internal Function used to get time from device clock. */
+
+typedef int (*eth_timesync_time_set)(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
+/**< @internal Function used to get time from device clock */
+
typedef int (*eth_get_reg_length_t)(struct rte_eth_dev *dev);
/**< @internal Retrieve device register count */
@@ -1312,6 +1323,12 @@ struct eth_dev_ops {
eth_timesync_read_rx_timestamp_t timesync_read_rx_timestamp;
/** Read the IEEE1588/802.1AS TX timestamp. */
eth_timesync_read_tx_timestamp_t timesync_read_tx_timestamp;
+ /** Adjust the device clock */
+ eth_timesync_time_adjust timesync_time_adjust;
+ /** Get the device clock timespec */
+ eth_timesync_time_get timesync_time_get;
+ /** Set the device clock timespec */
+ eth_timesync_time_set timesync_time_set;
};
/**
@@ -3598,6 +3615,53 @@ extern int rte_eth_timesync_read_rx_timestamp(uint8_t
port_id,
extern int rte_eth_timesync_read_tx_timestamp(uint8_t port_id,
struct timespec *timestamp);
+/**
+ * Adjust the timesync clock on an Ethernet device..
+ *
+ * @param port_id
+ * The port identifier of the Ethernet device.
+ * @param delta
+ * The adjustment in nanoseconds
+ *
+ * @return
+ * - 0: Success.
+ * - -ENODEV: The port ID is invalid.
+ * - -ENOTSUP: The function is not supported by the Ethernet driver.
+ */
+extern int rte_eth_timesync_time_adjust(uint8_t port_id, int64_t delta);
+
+/**
+ * Read the time from the timesync clock on an Ethernet device.
+ *
+ * @param port_id
+ * The port identifier of the Ethernet device.
+ * @param time
+ * Pointer to the timespec struct.
+ *
+ * @return
+ * - 0: Succes
[dpdk-dev] [PATCH v2 2/6] ixgbe: add additional ieee1588 support functions
Add additional functions to support the existing IEEE1588
functionality and to enable getting, setting and adjusting
the device time.
Signed-off-by: Daniel Mrzyglod
Signed-off-by: Pablo de Lara
---
drivers/net/ixgbe/ixgbe_ethdev.c | 313 +--
drivers/net/ixgbe/ixgbe_ethdev.h | 22 +++
2 files changed, 324 insertions(+), 11 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index 4373661..2c39501 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -126,10 +126,17 @@
#define IXGBE_HKEY_MAX_INDEX 10
/* Additional timesync values. */
-#define IXGBE_TIMINCA_16NS_SHIFT 24
-#define IXGBE_TIMINCA_INCVALUE 1600
-#define IXGBE_TIMINCA_INIT ((0x02 << IXGBE_TIMINCA_16NS_SHIFT) \
- | IXGBE_TIMINCA_INCVALUE)
+#define NSEC_PER_SEC 10L
+#define IXGBE_INCVAL_10GB0x
+#define IXGBE_INCVAL_1GB 0x4000
+#define IXGBE_INCVAL_100 0x5000
+#define IXGBE_INCVAL_SHIFT_10GB 28
+#define IXGBE_INCVAL_SHIFT_1GB 24
+#define IXGBE_INCVAL_SHIFT_100 21
+#define IXGBE_INCVAL_SHIFT_82599 7
+#define IXGBE_INCPER_SHIFT_82599 24
+
+#define IXGBE_CYCLECOUNTER_MASK 0x
static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev);
static int eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev);
@@ -325,6 +332,11 @@ static int ixgbe_timesync_read_rx_timestamp(struct
rte_eth_dev *dev,
uint32_t flags);
static int ixgbe_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
struct timespec *timestamp);
+static int ixgbe_timesync_time_adjust(struct rte_eth_dev *dev, int64_t delta);
+static int ixgbe_timesync_time_get(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
+static int ixgbe_timesync_time_set(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
/*
* Define VF Stats MACRO for Non "cleared on read" register
@@ -465,6 +477,9 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {
.get_eeprom_length= ixgbe_get_eeprom_length,
.get_eeprom = ixgbe_get_eeprom,
.set_eeprom = ixgbe_set_eeprom,
+ .timesync_time_adjust = ixgbe_timesync_time_adjust,
+ .timesync_time_get = ixgbe_timesync_time_get,
+ .timesync_time_set = ixgbe_timesync_time_set,
};
/*
@@ -5267,20 +5282,273 @@ ixgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
ixgbe_dev_addr_list_itr, TRUE);
}
+static inline uint64_t
+timespec_to_ns(const struct timespec *ts)
+{
+ return ((uint64_t) ts->tv_sec * NSEC_PER_SEC) + ts->tv_nsec;
+}
+
+static struct timespec
+ns_to_timespec(uint64_t nsec)
+{
+ struct timespec ts = {0, 0};
+
+ if (nsec == 0)
+ return ts;
+
+ ts.tv_sec = nsec / NSEC_PER_SEC;
+ ts.tv_nsec = nsec % NSEC_PER_SEC;
+
+ return ts;
+}
+
+/*
+ * Converts cycle counter cycles to nanoseconds.
+ */
+static inline uint64_t
+cyclecounter_cycles_to_ns(const struct cyclecounter *cc,
+ uint64_t cycles, uint64_t mask, uint64_t *frac)
+{
+ uint64_t ns;
+
+ /* Add fractional nanoseconds */
+ ns = cycles + *frac;
+ *frac = ns & mask;
+
+ /* Shift to get only nanoseconds. */
+ return ns >> cc->shift;
+}
+
+/*
+ * Like cyclecounter_cycles_to_ns(), but this is used when
+ * computing a time previous to the stored in the cycle counter.
+ */
+static uint64_t
+cyclecounter_cycles_to_ns_backwards(const struct cyclecounter *cc,
+ uint64_t cycles, uint64_t frac)
+{
+ return ((cycles - frac) >> cc->shift);
+}
+
+/*
+ * Register units might not be nanoseconds. This function converts
+ * these units into nanoseconds and adds to the previous time stored.
+ */
+static uint64_t
+timecounter_cycles_to_ns_time(struct timecounter *tc, uint64_t cycle_tstamp)
+{
+ uint64_t delta;
+ uint64_t nsec = tc->nsec, frac = tc->frac;
+
+ delta = (cycle_tstamp - tc->cycle_last) & tc->cc->mask;
+ /*
+* Cycle counts that are correctly converted as they
+* are between -1/2 max cycle count and +1/2 max cycle count.
+*/
+ if (delta > (tc->cc->mask / 2)) {
+ delta = (tc->cycle_last - cycle_tstamp) & tc->cc->mask;
+ nsec -= cyclecounter_cycles_to_ns_backwards(tc->cc, delta,
frac);
+ } else {
+ nsec += cyclecounter_cycles_to_ns(tc->cc, delta, tc->mask,
&frac);
+ }
+
+ return nsec;
+}
+
+static uint64_t
+ixgbe_read_timesync_cyclecounter(struct rte_eth_dev *dev)
+{
+ struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ uint64_t systime_cycles = 0;
+
+ switch (hw->mac.type) {
+ case ixgbe_mac_X550:
+ /* SYSTIMEL stores ns and SYSTIMEH stores sec
[dpdk-dev] [PATCH v2 3/6] igb: add additional ieee1588 support functions
From: Pablo de Lara
Add additional functions to support the existing IEEE1588
functionality and to enable getting, setting and adjusting
the device time.
Signed-off-by: Pablo de Lara
Signed-off-by: Daniel Mrzyglod
---
drivers/net/e1000/e1000_ethdev.h | 22 +++
drivers/net/e1000/igb_ethdev.c | 338 +--
2 files changed, 350 insertions(+), 10 deletions(-)
diff --git a/drivers/net/e1000/e1000_ethdev.h b/drivers/net/e1000/e1000_ethdev.h
index 4e69e44..c8772b7 100644
--- a/drivers/net/e1000/e1000_ethdev.h
+++ b/drivers/net/e1000/e1000_ethdev.h
@@ -220,6 +220,26 @@ struct e1000_filter_info {
};
/*
+ * Structure for cyclecounter IEEE1588 functionality.
+ */
+struct cyclecounter {
+ uint64_t (*read)(struct rte_eth_dev *dev);
+ uint64_t mask;
+ uint32_t shift;
+};
+
+/*
+ * Structure to hold and calculate Unix epoch time.
+ */
+struct timecounter {
+ struct cyclecounter *cc;
+ uint64_t cycle_last;
+ uint64_t nsec;
+ uint64_t mask;
+ uint64_t frac;
+};
+
+/*
* Structure to store private data for each driver instance (for each port).
*/
struct e1000_adapter {
@@ -230,6 +250,8 @@ struct e1000_adapter {
struct e1000_vf_info*vfdata;
struct e1000_filter_info filter;
bool stopped;
+ struct cyclecounter cc;
+ struct timecounter tc;
};
#define E1000_DEV_PRIVATE(adapter) \
diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
index 3ab082e..fea11f8 100644
--- a/drivers/net/e1000/igb_ethdev.c
+++ b/drivers/net/e1000/igb_ethdev.c
@@ -78,10 +78,12 @@
#define IGB_8_BIT_MASK UINT8_MAX
/* Additional timesync values. */
-#define E1000_ETQF_FILTER_1588 3
-#define E1000_TIMINCA_INCVALUE 1600
-#define E1000_TIMINCA_INIT ((0x02 << E1000_TIMINCA_16NS_SHIFT) \
- | E1000_TIMINCA_INCVALUE)
+#define NSEC_PER_SEC 10L
+#define E1000_CYCLECOUNTER_MASK 0x
+#define E1000_ETQF_FILTER_1588 3
+#define IGB_82576_TSYNC_SHIFT16
+#define E1000_INCPERIOD_82576(1 << E1000_TIMINCA_16NS_SHIFT)
+#define E1000_INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT)
#define E1000_TSAUXC_DISABLE_SYSTIME 0x8000
static int eth_igb_configure(struct rte_eth_dev *dev);
@@ -230,6 +232,11 @@ static int igb_timesync_read_rx_timestamp(struct
rte_eth_dev *dev,
uint32_t flags);
static int igb_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
struct timespec *timestamp);
+static int igb_timesync_time_adjust(struct rte_eth_dev *dev, int64_t delta);
+static int igb_timesync_time_get(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
+static int igb_timesync_time_set(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
static int eth_igb_rx_queue_intr_enable(struct rte_eth_dev *dev,
uint16_t queue_id);
static int eth_igb_rx_queue_intr_disable(struct rte_eth_dev *dev,
@@ -327,6 +334,9 @@ static const struct eth_dev_ops eth_igb_ops = {
.get_eeprom_length= eth_igb_get_eeprom_length,
.get_eeprom = eth_igb_get_eeprom,
.set_eeprom = eth_igb_set_eeprom,
+ .timesync_time_adjust = igb_timesync_time_adjust,
+ .timesync_time_get = igb_timesync_time_get,
+ .timesync_time_set = igb_timesync_time_set,
};
/*
@@ -3883,20 +3893,286 @@ eth_igb_set_mc_addr_list(struct rte_eth_dev *dev,
return 0;
}
+static inline uint64_t
+timespec_to_ns(const struct timespec *ts)
+{
+ return ((uint64_t) ts->tv_sec * NSEC_PER_SEC) + ts->tv_nsec;
+}
+
+static struct timespec
+ns_to_timespec(uint64_t nsec)
+{
+ struct timespec ts = {0, 0};
+
+ if (nsec == 0)
+ return ts;
+
+ ts.tv_sec = nsec / NSEC_PER_SEC;
+ ts.tv_nsec = nsec % NSEC_PER_SEC;
+
+ return ts;
+}
+
+/*
+ * Converts cycle counter cycles to nanoseconds.
+ */
+static inline uint64_t
+cyclecounter_cycles_to_ns(const struct cyclecounter *cc, uint64_t cycles,
+ uint64_t mask, uint64_t *frac)
+{
+ uint64_t ns;
+
+ /* Add fractional nanoseconds. */
+ ns = cycles + *frac;
+ *frac = ns & mask;
+
+ /* Shift to get only nanoseconds. */
+ return (ns >> cc->shift);
+}
+
+/*
+ * Like cyclecounter_cycles_to_ns(), but this is used when
+ * computing a time previous to the stored in the cycle counter.
+ */
+static uint64_t
+cyclecounter_cycles_to_ns_backwards(const struct cyclecounter *cc,
+ uint64_t cycles, uint64_t frac)
+{
+ return ((cycles - frac) >> cc->shift);
+}
+
+/*
+ * Register units might not be nanoseconds. This function converts
+ * these units into nanoseconds and adds to the previous time stored.
+ */
+static uint64_t
+timecounter_cycles_to_ns_time(struct timecounter *tc, uint64_t cycle_tstamp
[dpdk-dev] [PATCH v2 4/6] i40e: add additional ieee1588 support functions
From: Pablo de Lara
Add additional functions to support the existing IEEE1588
functionality and to enable getting, setting and adjusting
the device time.
Signed-off-by: Pablo de Lara
Signed-off-by: Daniel Mrzyglod
---
drivers/net/i40e/i40e_ethdev.c | 214 +
drivers/net/i40e/i40e_ethdev.h | 18
2 files changed, 212 insertions(+), 20 deletions(-)
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 2dd9fdc..985ab24 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -107,11 +107,14 @@
(1UL << RTE_ETH_FLOW_NONFRAG_IPV6_OTHER) | \
(1UL << RTE_ETH_FLOW_L2_PAYLOAD))
-#define I40E_PTP_40GB_INCVAL 0x01ULL
-#define I40E_PTP_10GB_INCVAL 0x03ULL
-#define I40E_PTP_1GB_INCVAL 0x20ULL
-#define I40E_PRTTSYN_TSYNENA 0x8000
-#define I40E_PRTTSYN_TSYNTYPE 0x0e00
+/* Additional timesync values. */
+#define NSEC_PER_SEC 10L
+#define I40E_PTP_40GB_INCVAL 0x01ULL
+#define I40E_PTP_10GB_INCVAL 0x03ULL
+#define I40E_PTP_1GB_INCVAL 0x20ULL
+#define I40E_PRTTSYN_TSYNENA 0x8000
+#define I40E_PRTTSYN_TSYNTYPE0x0e00
+#define I40E_CYCLECOUNTER_MASK 0x
static int eth_i40e_dev_init(struct rte_eth_dev *eth_dev);
static int eth_i40e_dev_uninit(struct rte_eth_dev *eth_dev);
@@ -232,6 +235,11 @@ static int i40e_timesync_read_rx_timestamp(struct
rte_eth_dev *dev,
uint32_t flags);
static int i40e_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
struct timespec *timestamp);
+static int i40e_timesync_time_adjust(struct rte_eth_dev *dev, int64_t delta);
+static int i40e_timesync_time_get(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
+static int i40e_timesync_time_set(struct rte_eth_dev *dev,
+ struct timespec *timestamp);
static const struct rte_pci_id pci_id_i40e_map[] = {
#define RTE_PCI_DEV_ID_DECL_I40E(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
@@ -289,6 +297,9 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
.timesync_disable = i40e_timesync_disable,
.timesync_read_rx_timestamp = i40e_timesync_read_rx_timestamp,
.timesync_read_tx_timestamp = i40e_timesync_read_tx_timestamp,
+ .timesync_time_adjust = i40e_timesync_time_adjust,
+ .timesync_time_get= i40e_timesync_time_get,
+ .timesync_time_set= i40e_timesync_time_set,
};
static struct eth_driver rte_i40e_pmd = {
@@ -6175,17 +6186,116 @@ i40e_mirror_rule_reset(struct rte_eth_dev *dev,
uint8_t sw_id)
return 0;
}
-static int
-i40e_timesync_enable(struct rte_eth_dev *dev)
+static inline uint64_t
+timespec_to_ns(const struct timespec *ts)
+{
+ return ((uint64_t) ts->tv_sec * NSEC_PER_SEC) + ts->tv_nsec;
+}
+
+static struct timespec
+ns_to_timespec(uint64_t nsec)
+{
+ struct timespec ts = {0, 0};
+
+ if (nsec == 0)
+ return ts;
+
+ ts.tv_sec = nsec / NSEC_PER_SEC;
+ ts.tv_nsec = nsec % NSEC_PER_SEC;
+
+ return ts;
+}
+
+/*
+ * Adds the new cycles (in nanoseconds) to the previous time stored.
+ */
+static uint64_t
+timecounter_cycles_to_ns_time(struct timecounter *tc, uint64_t cycle_tstamp)
+{
+ uint64_t delta = (cycle_tstamp - tc->cycle_last);
+ uint64_t nsec = tc->nsec;
+
+ nsec += delta;
+
+ return nsec;
+}
+
+static uint64_t
+i40e_read_timesync_cyclecounter(struct rte_eth_dev *dev)
{
struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
- struct rte_eth_link *link = &dev->data->dev_link;
- uint32_t tsync_ctl_l;
- uint32_t tsync_ctl_h;
+ uint64_t systim_cycles = 0;
+
+ systim_cycles |= (uint64_t)I40E_READ_REG(hw, I40E_PRTTSYN_TIME_L);
+ systim_cycles |= (uint64_t)I40E_READ_REG(hw, I40E_PRTTSYN_TIME_H)
+ << 32;
+
+ return systim_cycles;
+}
+
+static uint64_t
+timecounter_read_ns_delta(struct rte_eth_dev *dev)
+{
+ uint64_t cycle_now, cycle_delta;
+ struct i40e_adapter *adapter =
+ (struct i40e_adapter *)dev->data->dev_private;
+
+ /* Read cycle counter. */
+ cycle_now = adapter->tc.cc->read(dev);
+
+ /* Calculate the delta since the last timecounter_read_delta(). */
+ cycle_delta = (cycle_now - adapter->tc.cycle_last);
+
+ /* Update time stamp of timecounter_read_delta() call. */
+ adapter->tc.cycle_last = cycle_now;
+
+ /* Delta already in nanoseconds. */
+ return cycle_delta;
+}
+
+static uint64_t
+timecounter_read(struct rte_eth_dev *dev)
+{
+ uint64_t nsec;
+ struct i40e_adapter *adapter =
+ (struct i40e_adapter *)dev->data->dev_private;
+
+ /* Increment time by nanoseconds since last call. */
+ nsec = timecounter_re
[dpdk-dev] [PATCH v2 5/6] example: PTP client slave minimal implementation
Add a sample application that acts as a PTP slave using the DPDK ieee1588 functions. Signed-off-by: Daniel Mrzyglod --- MAINTAINERS | 3 + doc/guides/rel_notes/release_2_2.rst | 5 + examples/Makefile| 1 + examples/ptpclient/Makefile | 57 +++ examples/ptpclient/ptpclient.c | 788 +++ 5 files changed, 854 insertions(+) create mode 100644 examples/ptpclient/Makefile create mode 100644 examples/ptpclient/ptpclient.c diff --git a/MAINTAINERS b/MAINTAINERS index 080a8e8..3e446d5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -514,3 +514,6 @@ F: examples/tep_termination/ F: examples/vmdq/ F: examples/vmdq_dcb/ F: doc/guides/sample_app_ug/vmdq_dcb_forwarding.rst + +M: Daniel Mrzyglod +F: examples/ptpclient diff --git a/doc/guides/rel_notes/release_2_2.rst b/doc/guides/rel_notes/release_2_2.rst index b83ef7f..840d8ea 100644 --- a/doc/guides/rel_notes/release_2_2.rst +++ b/doc/guides/rel_notes/release_2_2.rst @@ -92,6 +92,11 @@ Libraries Examples +* **ptpclient: simple PTP slave client.** + + Add a sample application that acts as a PTP slave using the + DPDK ieee1588 functions. + Other ~ diff --git a/examples/Makefile b/examples/Makefile index b4eddbd..4672534 100644 --- a/examples/Makefile +++ b/examples/Makefile @@ -74,5 +74,6 @@ DIRS-$(CONFIG_RTE_LIBRTE_XEN_DOM0) += vhost_xen DIRS-y += vmdq DIRS-y += vmdq_dcb DIRS-$(CONFIG_RTE_LIBRTE_POWER) += vm_power_manager +DIRS-$(CONFIG_RTE_LIBRTE_IEEE1588) += ptpclient include $(RTE_SDK)/mk/rte.extsubdir.mk diff --git a/examples/ptpclient/Makefile b/examples/ptpclient/Makefile new file mode 100644 index 000..1a8efb3 --- /dev/null +++ b/examples/ptpclient/Makefile @@ -0,0 +1,57 @@ +# BSD LICENSE +# +# Copyright(c) 2010-2015 Intel Corporation. All rights reserved. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of Intel Corporation nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +ifeq ($(RTE_SDK),) +$(error "Please define RTE_SDK environment variable") +endif + +# Default target, can be overriddegitn by command line or environment +RTE_TARGET ?= x86_64-native-linuxapp-gcc + +include $(RTE_SDK)/mk/rte.vars.mk + +# binary name +APP = ptpclient + +# all source are stored in SRCS-y +SRCS-y := ptpclient.c + +CFLAGS += $(WERROR_FLAGS) + +# workaround for a gcc bug with noreturn attribute +# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12603 +ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y) +CFLAGS_main.o += -Wno-return-type +endif + +EXTRA_CFLAGS += -O3 + +include $(RTE_SDK)/mk/rte.extapp.mk diff --git a/examples/ptpclient/ptpclient.c b/examples/ptpclient/ptpclient.c new file mode 100644 index 000..453c20b --- /dev/null +++ b/examples/ptpclient/ptpclient.c @@ -0,0 +1,788 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2015 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the nam
[dpdk-dev] [PATCH v2 6/6] doc: add a PTPCLIENT sample guide
It includes: - Add the ptpclient picture with svg format. - Add the ptpclient.rst file - Change the index.rst file for the above pictures index. Signed-off-by: Daniel Mrzyglod --- doc/guides/sample_app_ug/img/ptpclient.svg | 520 + doc/guides/sample_app_ug/index.rst | 3 + doc/guides/sample_app_ug/ptpclient.rst | 324 ++ 3 files changed, 847 insertions(+) create mode 100644 doc/guides/sample_app_ug/img/ptpclient.svg create mode 100644 doc/guides/sample_app_ug/ptpclient.rst diff --git a/doc/guides/sample_app_ug/img/ptpclient.svg b/doc/guides/sample_app_ug/img/ptpclient.svg new file mode 100644 index 000..55c134e --- /dev/null +++ b/doc/guides/sample_app_ug/img/ptpclient.svg @@ -0,0 +1,520 @@ + + + +http://purl.org/dc/elements/1.1/"; + xmlns:cc="http://creativecommons.org/ns#"; + xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"; + xmlns:svg="http://www.w3.org/2000/svg"; + xmlns="http://www.w3.org/2000/svg"; + xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"; + xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"; + width="105mm" + height="148mm" + viewBox="0 0 372.04724 524.40945" + id="svg2" + version="1.1" + inkscape:version="0.91 r13725" + sodipodi:docname="drawing3.svg"> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +image/svg+xml +http://purl.org/dc/dcmitype/StillImage"; /> + + + + + + + + + +T2 +FOLLOW UP:T1 + +DELAY REQUEST +T3 +T4 +T1 + +DELAY RESPONSE:T4 +time + +master + +slave +SYNC + + diff --git a/doc/guides/sample_app_ug/index.rst b/doc/guides/sample_app_ug/index.rst index 9beedd9..8ae86c0 100644 --- a/doc/guides/sample_app_ug/index.rst +++ b/doc/guides/sample_app_ug/index.rst @@ -73,6 +73,7 @@ Sample Applications User Guide vm_power_management tep_termination proc_info +ptpclient **Figures** @@ -136,6 +137,8 @@ Sample Applications User Guide :numref:`figure_overlay_networking` :ref:`figure_overlay_networking` :numref:`figure_tep_termination_arch` :ref:`figure_tep_termination_arch` +:numref:`figure_ptpclient_highlevel` :ref:`figure_ptpclient_highlevel` + **Tables** :numref:`table_qos_metering_1` :ref:`table_qos_metering_1` diff --git a/doc/guides/sample_app_ug/ptpclient.rst b/doc/guides/sample_app_ug/ptpclient.rst new file mode 100644 index 000..31aa505 --- /dev/null +++ b/doc/guides/sample_app_ug/ptpclient.rst @@ -0,0 +1,324 @@ +.. BSD LICENSE +Copyright(c) 2015 Intel Corporation. All rights reserved. +All rights reserved. + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions +are met: + +* Redistributions of source code must retain the above copyright +notice, this list of conditions and the following disclaimer. +* Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in +the documentation and/or other materials provided with the +distribution. +* Neither the name of Intel Corporation nor the names of its +contributors may be used to endorse or promote products derived +from this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +PTP Client Sample Application += + +The PTP (Precision Time Protocol) client sample application is a simple +example of using the DPDK IEEE1588 API to communicate with a PTP master clock +to synchronize the time on the NIC and, optionally, on the Linux system. + +Note, PTP is a time syncing protocol and cannot be used within DPDK as a +time-stamping mechanism. See the following for an expla
[dpdk-dev] [PATCH v2 01/10] ethdev: rename dcb_queue to dcb_tc in dcb config struct
This is an API change and should be noticed in the release notes.
[dpdk-dev] [PATCH v2 10/10] doc: update testpmd guide and release note
2015-10-29 16:53, Jingjing Wu: > Signed-off-by: Jingjing Wu > --- > doc/guides/rel_notes/release_2_2.rst| 6 ++ > doc/guides/testpmd_app_ug/testpmd_funcs.rst | 12 +++- These changes would be easier to understand if they were in the context of the code changes. I suggest to update docs in the same patch as code change.
[dpdk-dev] [PATCH v2 0/7] interrupt mode for fm10k
Hi, Thomas The previous patch set which this one is based on, has a v2 sent today as "[PATCH v2 00/11] interrupt mode for i40e" http://dpdk.org/ml/archives/dev/2015-October/026710.html. I have verified that will not affect this patch set. Because this patch set only depends on the framework part change in that patch set, most likely, later version of that patch set (if have any) will not affect this patch set too. Could you please help to apply this patch set after you merge the final version of " interrupt mode for i40e"? Thank you very much! --Shaopeng > -Original Message- > From: Chen, Jing D > Sent: Wednesday, October 28, 2015 3:35 PM > To: He, Shaopeng; dev at dpdk.org > Cc: Qiu, Michael > Subject: RE: [PATCH v2 0/7] interrupt mode for fm10k > > > > -Original Message- > > From: He, Shaopeng > > Sent: Monday, October 26, 2015 11:48 AM > > To: dev at dpdk.org > > Cc: Chen, Jing D; Qiu, Michael; He, Shaopeng > > Subject: [PATCH v2 0/7] interrupt mode for fm10k > > > > This patch series adds interrupt mode support for fm10k, > > contains four major parts: > > > > 1. implement rx_descriptor_done function in fm10k > > 2. make sure default VID available in dev_init in fm10k > > 3. fix a memory leak for non-ip packet in l3fwd-power > > 4. add rx interrupt support in fm10k PF and VF > > > > The patch set is developed based on one previous patch set > > "[PATCH v1 00/11] interrupt mode for i40e" > > http://www.dpdk.org/ml/archives/dev/2015-September/023903.html > > > > Shaopeng He (7): > > fm10k: implement rx_descriptor_done function > > fm10k: setup rx queue interrupts for PF and VF > > fm10k: remove rx queue interrupts when dev stops > > fm10k: add rx queue interrupt en/dis functions > > fm10k: make sure default VID available in dev_init > > l3fwd-power: fix a memory leak for non-ip packet > > doc: release note update for fm10k intr mode > > > > doc/guides/rel_notes/release_2_2.rst | 2 + > > drivers/net/fm10k/fm10k.h| 3 + > > drivers/net/fm10k/fm10k_ethdev.c | 164 > > +-- > > drivers/net/fm10k/fm10k_rxtx.c | 25 ++ > > examples/l3fwd-power/main.c | 3 +- > > 5 files changed, 189 insertions(+), 8 deletions(-) > > > > -- > > 1.9.3 > > Acked-by : Jing Chen
[dpdk-dev] [PATCH 0/5] ARMv8 additions to ARMv7 support
Thanks for that hint. I am able to run it in qemu. I tried several tests from the test suite and it works. Jan On Fri, 30 Oct 2015 08:52:49 + "Hunt, David" wrote: > On 30/10/2015 00:17, Jan Viktorin wrote: > > I've failed to compile kni/igb for ARMv8. Any ideas? Is it Linux 4.2 > > compatbile? > > > >CC [M] > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.o > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c: > > In functi > > on ?igb_ndo_bridge_getlink?: > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c:2279:9: > > er > > ror: too few arguments to function ?ndo_dflt_bridge_getlink? > >return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags); > > ^ > > In file included from > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/net/dst.h:13:0, > > from > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/net/sock.h:67, > > from > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/linux/tcp.h:22, > > from > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c:34: > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/include/linux/rtnetlink.h:115:12: > > note: declared here > > extern int ndo_dflt_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq, > > ^ > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.c:2286:1: > > error: control reaches end of non-void function [-Werror=return-type] > > } > > ^ > > cc1: all warnings being treated as errors > > /home/jviki/Projects/buildroot-armv8/qemu-armv8/build/linux-4.2/scripts/Makefile.build:258: > > recipe for target '/home/jviki/Projects/bu > > ildroot-armv8/qemu-armv8/build/dpdk-armv8-hunt-v1/build/build/lib/librte_eal/linuxapp/kni/igb_main.o' > > failed > > > > Regards > > Jan > > Jan, > > To compile DPDK on kernels 4.2 and later, you need two patches submitted > to the list last week. The ID's are > >7518 - kni-rename-HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK-macro >7519 - kni-fix-igb-build-with-kernel-4.2 > > And if you're on a 4.3 kernel: > >8131 - fix igb_uio's access to pci_dev->msi_list for kernels >= 4.3 > > Regards, > Dave. > > -- Jan Viktorin E-mail: Viktorin at RehiveTech.com System Architect Web:www.RehiveTech.com RehiveTech Brno, Czech Republic
