[dpdk-dev] [PATCH v2 2/2] drivers/i40e: fix the hash filter invalid calculation in X722

[Jeff Guo]

As X722 extracts IPv4 header to Field Vector different with XL710/X710,
need to corresponding to modify the fields of IPv4 header in input set
to map different default Field Vector Table of different NICs.

Signed-off-by: Jeff Guo 

---
v2:
fix compile error when x722 macro is not defined and simplify
the code to avoid duplication.
---
 drivers/net/i40e/i40e_ethdev.c | 73 ++
 1 file changed, 60 insertions(+), 13 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 920fd6d..7895c11 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -211,6 +211,16 @@
 #define I40E_REG_INSET_L3_SRC_IP40x00018000ULL
 /* Destination IPv4 address */
 #define I40E_REG_INSET_L3_DST_IP40x0018ULL
+#ifdef X722_SUPPORT
+/* Source IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_SRC_IP4   0x0006ULL
+/* Destination IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_DST_IP4   0x0600ULL
+/* IPv4 Protocol */
+#define I40E_X722_REG_INSET_L3_IP4_PROTO 0x0010ULL
+/* IPv4 Time to Live */
+#define I40E_X722_REG_INSET_L3_IP4_TTL   0x0010ULL
+#endif
 /* IPv4 Type of Service (TOS) */
 #define I40E_REG_INSET_L3_IP4_TOS0x0040ULL
 /* IPv4 Protocol */
@@ -7581,7 +7591,7 @@ i40e_parse_input_set(uint64_t *inset,
  * and vice versa
  */
 static uint64_t
-i40e_translate_input_set_reg(uint64_t input)
+i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
 {
uint64_t val = 0;
uint16_t i;
@@ -7589,17 +7599,13 @@ i40e_translate_input_set_reg(uint64_t input)
static const struct {
uint64_t inset;
uint64_t inset_reg;
-   } inset_map[] = {
+   } inset_map_common[] = {
{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
{I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
{I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
{I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},
-   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
-   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
{I40E_INSET_IPV4_TOS, I40E_REG_INSET_L3_IP4_TOS},
-   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
-   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
@@ -7627,16 +7633,56 @@ i40e_translate_input_set_reg(uint64_t input)
{I40E_INSET_FLEX_PAYLOAD_W7, I40E_REG_INSET_FLEX_PAYLOAD_WORD7},
{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
};
+#ifdef X722_SUPPORT
+
+/* some different registers map in x722*/
+   static const struct {
+   uint64_t inset;
+   uint64_t inset_reg;
+   } inset_map_diff_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
+   };
+#endif
+
+   static const struct {
+   uint64_t inset;
+   uint64_t inset_reg;
+   } inset_map_diff_not_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
+   };

if (input == 0)
return val;

/* Translate input set to register aware inset */
-   for (i = 0; i < RTE_DIM(inset_map); i++) {
-   if (input & inset_map[i].inset)
-   val |= inset_map[i].inset_reg;
+#ifdef X722_SUPPORT
+   if (type == I40E_MAC_X722) {
+   for (i = 0; i < RTE_DIM(inset_map_diff_x722); i++) {
+   if (input & inset_map_diff_x722[i].inset)
+   val |= inset_map_diff_x722[i].inset_reg;
+   }
+   } else {
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+   }
+   }
+#else
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+   }
+#endif
+   for (i 

[dpdk-dev] [PATCH v2 1/2] drivers/i40e: fix X722 macro absence result in compile

[Jeff Guo]

Since some register only be supported by X722 but may not be supported
by other NICs, so add X722 macro to distinguish that to avoid compile error
when the X722 macro is undefined.

Fixes: d0a349409bd7 (?i40e: support AQ based RSS config?)
Fixes: 001a1c0f98f4 ("ethdev: get registers width")
Fixes: a0454b5d2e08 (?i40e: update device ids?)
Fixes: 647d1eaf758b (?i40evf: support AQ based RSS config?)
Fixes: 3058891a2b02 (?net/i40e: move PCI device ids to the driver?)
Fixes: d9efd0136ac1 (?i40e: add EEPROM and registers dumping?)
Signed-off-by: Jeff Guo 

---
v2:
fix compile error when x722 macro is not define.
---
 drivers/net/i40e/i40e_ethdev.c| 36 ++-
 drivers/net/i40e/i40e_ethdev.h| 17 +++
 drivers/net/i40e/i40e_ethdev_vf.c | 27 +++
 drivers/net/i40e/i40e_regs.h  | 96 +++
 drivers/net/i40e/i40e_rxtx.c  | 18 +++-
 5 files changed, 191 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index d0640b9..920fd6d 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -468,13 +468,17 @@ static const struct rte_pci_id pci_id_i40e_map[] = {
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_B) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_SFP28) },
+#ifdef X722_SUPPORT
+#ifdef X722_A0_SUPPORT
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) },
+#endif /* X722_A0_SUPPORT */
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_I_X722) },
+#endif /* X722_SUPPORT */
{ .vendor_id = 0, /* sentinel */ },
 };

@@ -3182,6 +3186,7 @@ i40e_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
if (!lut)
return -EINVAL;

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, TRUE,
  lut, lut_size);
@@ -3190,12 +3195,15 @@ i40e_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
return ret;
}
} else {
+#endif /* X722_SUPPORT */
uint32_t *lut_dw = (uint32_t *)lut;
uint16_t i, lut_size_dw = lut_size / 4;

for (i = 0; i < lut_size_dw; i++)
lut_dw[i] = I40E_READ_REG(hw, I40E_PFQF_HLUT(i));
+#ifdef X722_SUPPORT
}
+#endif /* X722_SUPPORT */

return 0;
 }
@@ -3213,6 +3221,7 @@ i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
pf = I40E_VSI_TO_PF(vsi);
hw = I40E_VSI_TO_HW(vsi);

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, TRUE,
  lut, lut_size);
@@ -3221,13 +3230,16 @@ i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
return ret;
}
} else {
+#endif /* X722_SUPPORT */
uint32_t *lut_dw = (uint32_t *)lut;
uint16_t i, lut_size_dw = lut_size / 4;

for (i = 0; i < lut_size_dw; i++)
I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
I40E_WRITE_FLUSH(hw);
+#ifdef X722_SUPPORT
}
+#endif /* X722_SUPPORT */

return 0;
 }
@@ -3508,8 +3520,10 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)
pf->lan_nb_qps = 1;
} else {
pf->flags |= I40E_FLAG_RSS;
+#ifdef X722_SUPPORT
if (hw->mac.type == I40E_MAC_X722)
pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE;
+#endif /* X722_SUPPORT */
pf->lan_nb_qps = pf->lan_nb_qp_max;
}
qp_count += pf->lan_nb_qps;
@@ -6302,6 +6316,7 @@ i40e_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, 
uint8_t key_len)
return -EINVAL;
}

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
struct i40e_aqc_get_set_rss_key_data *key_dw =
(struct i40e_aqc_get_set_rss_key_data *)key;
@@ -6311,13 +6326,16 @@ i40e_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, 
uint8_t key_len)
PMD_INIT_LOG(ERR, "Failed to configure RSS key "
 "via AQ");
} else {
+#endif /* X722_SUPPORT */
uint32_t *hash_key = (uint32_t *)key;
uint16_t i;

for (i = 0; i <= 

[dpdk-dev] [PATCH v2 2/2] drivers/i40e: fix the hash filter invalid calculation in X722

[Jeff Guo]

As X722 extracts IPv4 header to Field Vector different with XL710/X710,
need to corresponding to modify the fields of IPv4 header in input set
to map different default Field Vector Table of different NICs.

Signed-off-by: Jeff Guo 

---
v2:
fix compile error when x722 macro is not defined and simplify
the code to avoid duplication.
---
 drivers/net/i40e/i40e_ethdev.c | 73 ++
 1 file changed, 60 insertions(+), 13 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 920fd6d..7895c11 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -211,6 +211,16 @@
 #define I40E_REG_INSET_L3_SRC_IP40x00018000ULL
 /* Destination IPv4 address */
 #define I40E_REG_INSET_L3_DST_IP40x0018ULL
+#ifdef X722_SUPPORT
+/* Source IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_SRC_IP4   0x0006ULL
+/* Destination IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_DST_IP4   0x0600ULL
+/* IPv4 Protocol */
+#define I40E_X722_REG_INSET_L3_IP4_PROTO 0x0010ULL
+/* IPv4 Time to Live */
+#define I40E_X722_REG_INSET_L3_IP4_TTL   0x0010ULL
+#endif
 /* IPv4 Type of Service (TOS) */
 #define I40E_REG_INSET_L3_IP4_TOS0x0040ULL
 /* IPv4 Protocol */
@@ -7581,7 +7591,7 @@ i40e_parse_input_set(uint64_t *inset,
  * and vice versa
  */
 static uint64_t
-i40e_translate_input_set_reg(uint64_t input)
+i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
 {
uint64_t val = 0;
uint16_t i;
@@ -7589,17 +7599,13 @@ i40e_translate_input_set_reg(uint64_t input)
static const struct {
uint64_t inset;
uint64_t inset_reg;
-   } inset_map[] = {
+   } inset_map_common[] = {
{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
{I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
{I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
{I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},
-   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
-   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
{I40E_INSET_IPV4_TOS, I40E_REG_INSET_L3_IP4_TOS},
-   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
-   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
@@ -7627,16 +7633,56 @@ i40e_translate_input_set_reg(uint64_t input)
{I40E_INSET_FLEX_PAYLOAD_W7, I40E_REG_INSET_FLEX_PAYLOAD_WORD7},
{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
};
+#ifdef X722_SUPPORT
+
+/* some different registers map in x722*/
+   static const struct {
+   uint64_t inset;
+   uint64_t inset_reg;
+   } inset_map_diff_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
+   };
+#endif
+
+   static const struct {
+   uint64_t inset;
+   uint64_t inset_reg;
+   } inset_map_diff_not_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
+   };

if (input == 0)
return val;

/* Translate input set to register aware inset */
-   for (i = 0; i < RTE_DIM(inset_map); i++) {
-   if (input & inset_map[i].inset)
-   val |= inset_map[i].inset_reg;
+#ifdef X722_SUPPORT
+   if (type == I40E_MAC_X722) {
+   for (i = 0; i < RTE_DIM(inset_map_diff_x722); i++) {
+   if (input & inset_map_diff_x722[i].inset)
+   val |= inset_map_diff_x722[i].inset_reg;
+   }
+   } else {
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+   }
+   }
+#else
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+   }
+#endif
+   for (i 

[dpdk-dev] [PATCH v2 1/2] drivers/i40e: fix X722 macro absence result in compile

[Jeff Guo]

Since some register only be supported by X722 but may not be supported
by other NICs, so add X722 macro to distinguish that to avoid compile error
when the X722 macro is undefined.

Fixes: d0a349409bd7 (?i40e: support AQ based RSS config?)
Fixes: 001a1c0f98f4 ("ethdev: get registers width")
Fixes: a0454b5d2e08 (?i40e: update device ids?)
Fixes: 647d1eaf758b (?i40evf: support AQ based RSS config?)
Fixes: 3058891a2b02 (?net/i40e: move PCI device ids to the driver?)
Fixes: d9efd0136ac1 (?i40e: add EEPROM and registers dumping?)
Signed-off-by: Jeff Guo 

---
v2:
fix compile error when x722 macro is not define.
---
 drivers/net/i40e/i40e_ethdev.c| 36 ++-
 drivers/net/i40e/i40e_ethdev.h| 17 +++
 drivers/net/i40e/i40e_ethdev_vf.c | 27 +++
 drivers/net/i40e/i40e_regs.h  | 96 +++
 drivers/net/i40e/i40e_rxtx.c  | 18 +++-
 5 files changed, 191 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index d0640b9..920fd6d 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -468,13 +468,17 @@ static const struct rte_pci_id pci_id_i40e_map[] = {
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_B) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_SFP28) },
+#ifdef X722_SUPPORT
+#ifdef X722_A0_SUPPORT
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) },
+#endif /* X722_A0_SUPPORT */
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_I_X722) },
+#endif /* X722_SUPPORT */
{ .vendor_id = 0, /* sentinel */ },
 };

@@ -3182,6 +3186,7 @@ i40e_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
if (!lut)
return -EINVAL;

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, TRUE,
  lut, lut_size);
@@ -3190,12 +3195,15 @@ i40e_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
return ret;
}
} else {
+#endif /* X722_SUPPORT */
uint32_t *lut_dw = (uint32_t *)lut;
uint16_t i, lut_size_dw = lut_size / 4;

for (i = 0; i < lut_size_dw; i++)
lut_dw[i] = I40E_READ_REG(hw, I40E_PFQF_HLUT(i));
+#ifdef X722_SUPPORT
}
+#endif /* X722_SUPPORT */

return 0;
 }
@@ -3213,6 +3221,7 @@ i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
pf = I40E_VSI_TO_PF(vsi);
hw = I40E_VSI_TO_HW(vsi);

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, TRUE,
  lut, lut_size);
@@ -3221,13 +3230,16 @@ i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
return ret;
}
} else {
+#endif /* X722_SUPPORT */
uint32_t *lut_dw = (uint32_t *)lut;
uint16_t i, lut_size_dw = lut_size / 4;

for (i = 0; i < lut_size_dw; i++)
I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
I40E_WRITE_FLUSH(hw);
+#ifdef X722_SUPPORT
}
+#endif /* X722_SUPPORT */

return 0;
 }
@@ -3508,8 +3520,10 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)
pf->lan_nb_qps = 1;
} else {
pf->flags |= I40E_FLAG_RSS;
+#ifdef X722_SUPPORT
if (hw->mac.type == I40E_MAC_X722)
pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE;
+#endif /* X722_SUPPORT */
pf->lan_nb_qps = pf->lan_nb_qp_max;
}
qp_count += pf->lan_nb_qps;
@@ -6302,6 +6316,7 @@ i40e_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, 
uint8_t key_len)
return -EINVAL;
}

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
struct i40e_aqc_get_set_rss_key_data *key_dw =
(struct i40e_aqc_get_set_rss_key_data *)key;
@@ -6311,13 +6326,16 @@ i40e_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, 
uint8_t key_len)
PMD_INIT_LOG(ERR, "Failed to configure RSS key "
 "via AQ");
} else {
+#endif /* X722_SUPPORT */
uint32_t *hash_key = (uint32_t *)key;
uint16_t i;

for (i = 0; i <= 

[dpdk-dev] [PATCH v4 00/17] Introduce SoC device/driver framework for EAL

[Shreyansh Jain]

On Saturday 15 October 2016 07:14 PM, Shreyansh Jain wrote:
[...]
>
> 4) Design considerations that are same as PCI:
>  - SoC initialization is being done through rte_eal_init(), just after PCI
>initialization is done.
>  - As in case of PCI, probe is done after rte_eal_pci_probe() to link the
>devices detected with the drivers registered.
>  - Device attach/detach functions are available and have been designed on
>the lines of PCI framework.
>  - PMDs register using DRIVER_REGISTER_SOC, very similar to
>DRIVER_REGISTER_PCI for PCI devices.
>  - Linked list of SoC driver and devices exists independent of the other
>driver/device list, but inheriting rte_driver/rte_driver, these are
>also part of a global list.
>
[...]

Two points which I missed in the Cover letter:
1. DRIVER_REGISTER_* has been replaced with RTE_PMD_REGISTER_*.
2. This is an experimental series. Verification of this has been done 
using NXP's PMD (to be published on ML soon) without using default 
scan/match helpers.

-
Shreyansh

[dpdk-dev] [PATCH v4 17/17] eal/crypto: Support rte_soc_driver/device for cryptodev

[Shreyansh Jain]

- rte_cryptodev_driver/rte_cryptodev_dev embeds rte_soc_driver/device for
  linking SoC PMDs to crypto devices.
- Add probe and remove functions linked

Signed-off-by: Hemant Agrawal 
Signed-off-by: Shreyansh Jain 
---
 lib/librte_cryptodev/rte_cryptodev.c   | 122 -
 lib/librte_cryptodev/rte_cryptodev.h   |   3 +
 lib/librte_cryptodev/rte_cryptodev_pmd.h   |  18 +++-
 lib/librte_cryptodev/rte_cryptodev_version.map |   2 +
 4 files changed, 140 insertions(+), 5 deletions(-)

diff --git a/lib/librte_cryptodev/rte_cryptodev.c 
b/lib/librte_cryptodev/rte_cryptodev.c
index 127e8d0..77ec9fe 100644
--- a/lib/librte_cryptodev/rte_cryptodev.c
+++ b/lib/librte_cryptodev/rte_cryptodev.c
@@ -422,7 +422,8 @@ rte_cryptodev_pci_probe(struct rte_pci_driver *pci_drv,

int retval;

-   cryptodrv = (struct rte_cryptodev_driver *)pci_drv;
+   cryptodrv = container_of(pci_drv, struct rte_cryptodev_driver,
+pci_drv);
if (cryptodrv == NULL)
return -ENODEV;

@@ -489,7 +490,8 @@ rte_cryptodev_pci_remove(struct rte_pci_device *pci_dev)
if (cryptodev == NULL)
return -ENODEV;

-   cryptodrv = (const struct rte_cryptodev_driver *)pci_dev->driver;
+   cryptodrv = container_of(pci_dev->driver, struct rte_cryptodev_driver,
+pci_drv);
if (cryptodrv == NULL)
return -ENODEV;

@@ -513,6 +515,111 @@ rte_cryptodev_pci_remove(struct rte_pci_device *pci_dev)
return 0;
 }

+
+int
+rte_cryptodev_soc_probe(struct rte_soc_driver *soc_drv,
+ struct rte_soc_device *soc_dev)
+{
+   struct rte_cryptodev_driver *cryptodrv;
+   struct rte_cryptodev *cryptodev;
+
+   char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
+
+   int retval;
+
+   cryptodrv = container_of(soc_drv, struct rte_cryptodev_driver,
+soc_drv);
+
+   rte_eal_soc_device_name(_dev->addr, cryptodev_name,
+   sizeof(cryptodev_name));
+
+   cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name,
+  rte_socket_id());
+   if (cryptodev == NULL)
+   return -ENOMEM;
+
+
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+   cryptodev->data->dev_private =
+   rte_zmalloc_socket(
+   "cryptodev private structure",
+   cryptodrv->dev_private_size,
+   RTE_CACHE_LINE_SIZE,
+   rte_socket_id());
+
+   if (cryptodev->data->dev_private == NULL)
+   rte_panic("Cannot allocate memzone for private "
+   "device data");
+   }
+
+   cryptodev->soc_dev = soc_dev;
+   cryptodev->driver = cryptodrv;
+
+   /* init user callbacks */
+   TAILQ_INIT(&(cryptodev->link_intr_cbs));
+
+   /* Invoke PMD device initialization function */
+   retval = (*cryptodrv->cryptodev_init)(cryptodrv, cryptodev);
+   if (retval == 0)
+   return 0;
+
+   CDEV_LOG_ERR("driver %s: cryptodev_init(%s) failed\n",
+   soc_drv->driver.name,
+   soc_dev->addr.name);
+
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+   rte_free(cryptodev->data->dev_private);
+
+   cryptodev->attached = RTE_CRYPTODEV_DETACHED;
+   cryptodev_globals.nb_devs--;
+
+   return -ENXIO;
+}
+
+int
+rte_cryptodev_soc_remove(struct rte_soc_device *soc_dev)
+{
+   const struct rte_cryptodev_driver *cryptodrv;
+   struct rte_cryptodev *cryptodev;
+   char cryptodev_name[RTE_CRYPTODEV_NAME_MAX_LEN];
+   int ret;
+
+   if (soc_dev == NULL)
+   return -EINVAL;
+
+   rte_eal_soc_device_name(_dev->addr, cryptodev_name,
+   sizeof(cryptodev_name));
+
+   cryptodev = rte_cryptodev_pmd_get_named_dev(cryptodev_name);
+   if (cryptodev == NULL)
+   return -ENODEV;
+
+   cryptodrv = container_of(soc_dev->driver,
+   struct rte_cryptodev_driver, soc_drv);
+   if (cryptodrv == NULL)
+   return -ENODEV;
+
+   /* Invoke PMD device uninit function */
+   if (*cryptodrv->cryptodev_uninit) {
+   ret = (*cryptodrv->cryptodev_uninit)(cryptodrv, cryptodev);
+   if (ret)
+   return ret;
+   }
+
+   /* free crypto device */
+   rte_cryptodev_pmd_release_device(cryptodev);
+
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+   rte_free(cryptodev->data->dev_private);
+
+   cryptodev->pci_dev = NULL;
+   cryptodev->soc_dev = NULL;
+   cryptodev->driver = NULL;
+   cryptodev->data = NULL;
+
+   return 0;
+}
+
 uint16_t
 

[dpdk-dev] [PATCH v4 16/17] ether: introduce ethernet dev probe remove

[Shreyansh Jain]

From: Jan Viktorin 

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 lib/librte_ether/rte_ethdev.c | 148 +-
 lib/librte_ether/rte_ethdev.h |  31 +
 2 files changed, 177 insertions(+), 2 deletions(-)

diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index ba9ae1e..78b3fb8 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -325,6 +325,101 @@ rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
 }

 int
+rte_eth_dev_soc_probe(struct rte_soc_driver *soc_drv,
+ struct rte_soc_device *soc_dev)
+{
+   struct eth_driver*eth_drv;
+   struct rte_eth_dev *eth_dev;
+   char ethdev_name[RTE_ETH_NAME_MAX_LEN];
+
+   int diag;
+
+   eth_drv = container_of(soc_drv, struct eth_driver, soc_drv);
+
+   rte_eal_soc_device_name(_dev->addr, ethdev_name,
+   sizeof(ethdev_name));
+
+   eth_dev = rte_eth_dev_allocate(ethdev_name);
+   if (eth_dev == NULL)
+   return -ENOMEM;
+
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+   eth_dev->data->dev_private = rte_zmalloc(
+ "ethdev private structure",
+ eth_drv->dev_private_size,
+ RTE_CACHE_LINE_SIZE);
+   if (eth_dev->data->dev_private == NULL)
+   rte_panic("Cannot allocate memzone for private port "
+ "data\n");
+   }
+   eth_dev->soc_dev = soc_dev;
+   eth_dev->driver = eth_drv;
+   eth_dev->data->rx_mbuf_alloc_failed = 0;
+
+   /* init user callbacks */
+   TAILQ_INIT(&(eth_dev->link_intr_cbs));
+
+   /*
+* Set the default MTU.
+*/
+   eth_dev->data->mtu = ETHER_MTU;
+
+   /* Invoke PMD device initialization function */
+   diag = (*eth_drv->eth_dev_init)(eth_dev);
+   if (diag == 0)
+   return 0;
+
+   RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(%s) failed\n",
+   soc_drv->driver.name,
+   soc_dev->addr.name);
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+   rte_free(eth_dev->data->dev_private);
+   rte_eth_dev_release_port(eth_dev);
+   return diag;
+}
+
+int
+rte_eth_dev_soc_remove(struct rte_soc_device *soc_dev)
+{
+   const struct eth_driver *eth_drv;
+   struct rte_eth_dev *eth_dev;
+   char ethdev_name[RTE_ETH_NAME_MAX_LEN];
+   int ret;
+
+   if (soc_dev == NULL)
+   return -EINVAL;
+
+   rte_eal_soc_device_name(_dev->addr, ethdev_name,
+   sizeof(ethdev_name));
+
+   eth_dev = rte_eth_dev_allocated(ethdev_name);
+   if (eth_dev == NULL)
+   return -ENODEV;
+
+   eth_drv = container_of(soc_dev->driver, struct eth_driver, soc_drv);
+
+   /* Invoke PMD device uninit function */
+   if (*eth_drv->eth_dev_uninit) {
+   ret = (*eth_drv->eth_dev_uninit)(eth_dev);
+   if (ret)
+   return ret;
+   }
+
+   /* free ether device */
+   rte_eth_dev_release_port(eth_dev);
+
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+   rte_free(eth_dev->data->dev_private);
+
+   eth_dev->soc_dev = NULL;
+   eth_dev->driver = NULL;
+   eth_dev->data = NULL;
+
+   return 0;
+}
+
+
+int
 rte_eth_dev_is_valid_port(uint8_t port_id)
 {
if (port_id >= RTE_MAX_ETHPORTS ||
@@ -1557,6 +1652,7 @@ rte_eth_dev_info_get(uint8_t port_id, struct 
rte_eth_dev_info *dev_info)
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
(*dev->dev_ops->dev_infos_get)(dev, dev_info);
dev_info->pci_dev = dev->pci_dev;
+   dev_info->soc_dev = dev->soc_dev;
dev_info->driver_name = dev->data->drv_name;
dev_info->nb_rx_queues = dev->data->nb_rx_queues;
dev_info->nb_tx_queues = dev->data->nb_tx_queues;
@@ -2534,8 +2630,15 @@ _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
 static inline
 struct rte_intr_handle *eth_dev_get_intr_handle(struct rte_eth_dev *dev)
 {
-   if (dev->pci_dev)
+   if (dev->pci_dev) {
+   RTE_ASSERT(dev->soc_dev == NULL);
return >pci_dev->intr_handle;
+   }
+
+   if (dev->soc_dev) {
+   RTE_ASSERT(dev->pci_dev == NULL);
+   return >soc_dev->intr_handle;
+   }

RTE_ASSERT(0);
return NULL;
@@ -2572,6 +2675,23 @@ rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int 
op, void *data)
return 0;
 }

+static inline
+const char *eth_dev_get_driver_name(const struct rte_eth_dev *dev)
+{
+   if (dev->pci_dev) {
+   RTE_ASSERT(dev->soc_dev == NULL);
+   return dev->driver->pci_drv.driver.name;
+   }
+
+   if (dev->soc_dev) {
+   

[dpdk-dev] [PATCH v4 15/17] ether: extract function eth_dev_get_intr_handle

[Shreyansh Jain]

From: Jan Viktorin 

We abstract access to the intr_handle here as we want to get
it either from the pci_dev or soc_dev.

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 lib/librte_ether/rte_ethdev.c | 14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index daa1285..ba9ae1e 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -2531,6 +2531,16 @@ _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
rte_spinlock_unlock(_eth_dev_cb_lock);
 }

+static inline
+struct rte_intr_handle *eth_dev_get_intr_handle(struct rte_eth_dev *dev)
+{
+   if (dev->pci_dev)
+   return >pci_dev->intr_handle;
+
+   RTE_ASSERT(0);
+   return NULL;
+}
+
 int
 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
 {
@@ -2543,7 +2553,7 @@ rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int 
op, void *data)
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);

dev = _eth_devices[port_id];
-   intr_handle = >pci_dev->intr_handle;
+   intr_handle = eth_dev_get_intr_handle(dev);
if (!intr_handle->intr_vec) {
RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
return -EPERM;
@@ -2603,7 +2613,7 @@ rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t 
queue_id,
return -EINVAL;
}

-   intr_handle = >pci_dev->intr_handle;
+   intr_handle = eth_dev_get_intr_handle(dev);
if (!intr_handle->intr_vec) {
RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
return -EPERM;
-- 
2.7.4

[dpdk-dev] [PATCH v4 14/17] ether: verify we copy info from a PCI device

[Shreyansh Jain]

From: Jan Viktorin 

Now that different types of ethdev exist, check for presence of PCI dev
while copying out the info.
Similar would be done for SoC.

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 lib/librte_ether/rte_ethdev.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 9aea048..daa1285 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -3205,6 +3205,8 @@ rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct 
rte_pci_device *pci_de
return;
}

+   RTE_VERIFY(eth_dev->pci_dev != NULL);
+
eth_dev->data->dev_flags = 0;
if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
-- 
2.7.4

[dpdk-dev] [PATCH v4 13/17] ether: utilize container_of for pci_drv

[Shreyansh Jain]

From: Jan Viktorin 

It is not necessary to place the rte_pci_driver at the beginning
of the rte_eth_dev struct anymore as we use the container_of macro
to get the parent pointer.

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 lib/librte_ether/rte_ethdev.c | 4 ++--
 lib/librte_ether/rte_ethdev.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 0d9d9c1..9aea048 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -241,7 +241,7 @@ rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,

int diag;

-   eth_drv = (struct eth_driver *)pci_drv;
+   eth_drv = container_of(pci_drv, struct eth_driver, pci_drv);

rte_eal_pci_device_name(_dev->addr, ethdev_name,
sizeof(ethdev_name));
@@ -302,7 +302,7 @@ rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
if (eth_dev == NULL)
return -ENODEV;

-   eth_drv = (const struct eth_driver *)pci_dev->driver;
+   eth_drv = container_of(pci_dev->driver, struct eth_driver, pci_drv);

/* Invoke PMD device uninit function */
if (*eth_drv->eth_dev_uninit) {
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index 38641e8..f893fe0 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -1850,7 +1850,7 @@ typedef int (*eth_dev_uninit_t)(struct rte_eth_dev 
*eth_dev);
  * Each Ethernet driver acts as a PCI driver and is represented by a generic
  * *eth_driver* structure that holds:
  *
- * - An *rte_pci_driver* structure (which must be the first field).
+ * - An *rte_pci_driver* structure.
  *
  * - The *eth_dev_init* function invoked for each matching PCI device.
  *
-- 
2.7.4

[dpdk-dev] [PATCH v4 12/17] eal/soc: additional features for SoC

[Shreyansh Jain]

From: Jan Viktorin 

Additional features introduced:
 - Find kernel driver through sysfs bindings
 - Dummy implementation for mapping to kernel driver
 - DMA coherency value from sysfs
 - Numa node number from sysfs
 - Support for updating device during probe if already registered

Signed-off-by: Jan Viktorin 
[Shreyansh: merge multiple patches into single set]
Signed-off-by: Shreyansh Jain 
---
 lib/librte_eal/common/eal_common_soc.c  |  30 
 lib/librte_eal/common/eal_private.h |  23 ++
 lib/librte_eal/common/include/rte_soc.h |  28 +++
 lib/librte_eal/linuxapp/eal/eal_soc.c   | 129 
 4 files changed, 210 insertions(+)

diff --git a/lib/librte_eal/common/eal_common_soc.c 
b/lib/librte_eal/common/eal_common_soc.c
index 44f5559..29c38e0 100644
--- a/lib/librte_eal/common/eal_common_soc.c
+++ b/lib/librte_eal/common/eal_common_soc.c
@@ -114,6 +114,26 @@ rte_eal_soc_probe_one_driver(struct rte_soc_driver *drv,
return ret;
}

+   if (!dev->is_dma_coherent) {
+   if (!(drv->drv_flags & RTE_SOC_DRV_ACCEPT_NONCC)) {
+   RTE_LOG(DEBUG, EAL,
+   "  device is not DMA coherent, skipping\n");
+   return 1;
+   }
+   }
+
+   if (drv->drv_flags & RTE_SOC_DRV_NEED_MAPPING) {
+   /* map resources */
+   ret = rte_eal_soc_map_device(dev);
+   if (ret)
+   return ret;
+   } else if (drv->drv_flags & RTE_SOC_DRV_FORCE_UNBIND
+   && rte_eal_process_type() == RTE_PROC_PRIMARY) {
+   /* unbind */
+   if (soc_unbind_kernel_driver(dev) < 0)
+   return -1;
+   }
+
dev->driver = drv;
RTE_VERIFY(drv->probe != NULL);
return drv->probe(drv, dev);
@@ -166,6 +186,10 @@ rte_eal_soc_detach_dev(struct rte_soc_driver *drv,
if (drv->remove && (drv->remove(dev) < 0))
return -1;  /* negative value is an error */

+   if (drv->drv_flags & RTE_SOC_DRV_NEED_MAPPING)
+   /* unmap resources for devices */
+   rte_eal_soc_unmap_device(dev);
+
/* clear driver structure */
dev->driver = NULL;

@@ -241,6 +265,12 @@ rte_eal_soc_probe_one(const struct rte_soc_addr *addr)
if (addr == NULL)
return -1;

+   /* update current SoC device in global list, kernel bindings might have
+* changed since last time we looked at it.
+*/
+   if (soc_update_device(addr) < 0)
+   goto err_return;
+
TAILQ_FOREACH(dev, _device_list, next) {
if (rte_eal_compare_soc_addr(>addr, addr))
continue;
diff --git a/lib/librte_eal/common/eal_private.h 
b/lib/librte_eal/common/eal_private.h
index d810f9f..30c648d 100644
--- a/lib/librte_eal/common/eal_private.h
+++ b/lib/librte_eal/common/eal_private.h
@@ -159,6 +159,29 @@ int pci_update_device(const struct rte_pci_addr *addr);
 int pci_unbind_kernel_driver(struct rte_pci_device *dev);

 /**
+ * Update a soc device object by asking the kernel for the latest information.
+ *
+ * This function is private to EAL.
+ *
+ * @param addr
+ *  The SoC address to look for
+ * @return
+ *   - 0 on success.
+ *   - negative on error.
+ */
+int soc_update_device(const struct rte_soc_addr *addr);
+
+/**
+ * Unbind kernel driver for this device
+ *
+ * This function is private to EAL.
+ *
+ * @return
+ *   0 on success, negative on error
+ */
+int soc_unbind_kernel_driver(struct rte_soc_device *dev);
+
+/**
  * Map the PCI resource of a PCI device in virtual memory
  *
  * This function is private to EAL.
diff --git a/lib/librte_eal/common/include/rte_soc.h 
b/lib/librte_eal/common/include/rte_soc.h
index 1865be5..93205c9 100644
--- a/lib/librte_eal/common/include/rte_soc.h
+++ b/lib/librte_eal/common/include/rte_soc.h
@@ -46,9 +46,11 @@ extern "C" {

 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 

 #include 
 #include 
@@ -63,6 +65,14 @@ extern struct soc_device_list soc_device_list;
 TAILQ_HEAD(soc_driver_list, rte_soc_driver); /**< SoC drivers in D-linked Q. */
 TAILQ_HEAD(soc_device_list, rte_soc_device); /**< SoC devices in D-linked Q. */

+#define SOC_MAX_RESOURCE 6
+
+struct rte_soc_resource {
+   uint64_t phys_addr;
+   uint64_t len;
+   void *addr;
+};
+
 struct rte_soc_id {
union {
const char *compatible; /**< OF compatible specification */
@@ -84,8 +94,12 @@ struct rte_soc_device {
struct rte_device device;   /**< Inherit code device */
struct rte_soc_addr addr;   /**< SoC device Location */
struct rte_soc_id *id;  /**< SoC device ID list */
+   struct rte_soc_resource mem_resource[SOC_MAX_RESOURCE];
struct rte_intr_handle intr_handle; /**< Interrupt handle */
struct 

[dpdk-dev] [PATCH v4 11/17] eal/soc: add default scan for Soc devices

[Shreyansh Jain]

From: Jan Viktorin 

Default implementation which scans the sysfs platform devices hierarchy.
For each device, extract the ueven and convert into rte_soc_device.

The information populated can then be used in probe to match against
the drivers registered.

Signed-off-by: Jan Viktorin 
[Shreyansh: restructure commit to be an optional implementation]
Signed-off-by: Shreyansh Jain 
---
 lib/librte_eal/common/include/rte_soc.h |  10 +-
 lib/librte_eal/linuxapp/eal/eal_soc.c   | 315 
 2 files changed, 324 insertions(+), 1 deletion(-)

diff --git a/lib/librte_eal/common/include/rte_soc.h 
b/lib/librte_eal/common/include/rte_soc.h
index 1f5f81b..1865be5 100644
--- a/lib/librte_eal/common/include/rte_soc.h
+++ b/lib/librte_eal/common/include/rte_soc.h
@@ -64,7 +64,10 @@ TAILQ_HEAD(soc_driver_list, rte_soc_driver); /**< SoC 
drivers in D-linked Q. */
 TAILQ_HEAD(soc_device_list, rte_soc_device); /**< SoC devices in D-linked Q. */

 struct rte_soc_id {
-   const char *compatible; /**< OF compatible specification */
+   union {
+   const char *compatible; /**< OF compatible specification */
+   char *_compatible;
+   };
uint64_t priv_data; /**< SoC Driver specific data */
 };

@@ -200,6 +203,11 @@ rte_eal_parse_soc_spec(const char *spec, struct 
rte_soc_addr *addr)
 }

 /**
+ * Scan for new SoC devices.
+ */
+int rte_eal_soc_scan(void);
+
+/**
  * Default function for matching the Soc driver with device. Each driver can
  * either use this function or define their own soc matching function.
  * This function relies on the compatible string extracted from sysfs. But,
diff --git a/lib/librte_eal/linuxapp/eal/eal_soc.c 
b/lib/librte_eal/linuxapp/eal/eal_soc.c
index 3929a76..d8286bb 100644
--- a/lib/librte_eal/linuxapp/eal/eal_soc.c
+++ b/lib/librte_eal/linuxapp/eal/eal_soc.c
@@ -48,6 +48,321 @@
 #include 
 #include 

+/** Pathname of SoC devices directory. */
+#define SYSFS_SOC_DEVICES "/sys/bus/platform/devices"
+
+static const char *
+soc_get_sysfs_path(void)
+{
+   const char *path = NULL;
+
+   path = getenv("SYSFS_SOC_DEVICES");
+   if (path == NULL)
+   return SYSFS_SOC_DEVICES;
+
+   return path;
+}
+
+static char *
+dev_read_uevent(const char *dirname)
+{
+   char filename[PATH_MAX];
+   struct stat st;
+   char *buf;
+   ssize_t total = 0;
+   int fd;
+
+   snprintf(filename, sizeof(filename), "%s/uevent", dirname);
+   fd = open(filename, O_RDONLY);
+   if (fd < 0) {
+   RTE_LOG(WARNING, EAL, "Failed to open file %s\n", filename);
+   return strdup("");
+   }
+
+   if (fstat(fd, ) < 0) {
+   RTE_LOG(ERR, EAL, "Failed to stat file %s\n", filename);
+   close(fd);
+   return NULL;
+   }
+
+   if (st.st_size == 0) {
+   close(fd);
+   return strdup("");
+   }
+
+   buf = malloc(st.st_size + 1);
+   if (buf == NULL) {
+   RTE_LOG(ERR, EAL, "Failed to alloc memory to read %s\n",
+   filename);
+   close(fd);
+   return NULL;
+   }
+
+   while (total < st.st_size) {
+   ssize_t rlen = read(fd, buf + total, st.st_size - total);
+   if (rlen < 0) {
+   if (errno == EINTR)
+   continue;
+
+   RTE_LOG(ERR, EAL, "Failed to read file %s\n", filename);
+
+   free(buf);
+   close(fd);
+   return NULL;
+   }
+   if (rlen == 0) /* EOF */
+   break;
+
+   total += rlen;
+   }
+
+   buf[total] = '\0';
+   close(fd);
+
+   return buf;
+}
+
+static const char *
+dev_uevent_find(const char *uevent, const char *key)
+{
+   const size_t keylen = strlen(key);
+   const size_t total = strlen(uevent);
+   const char *p = uevent;
+
+   /* check whether it is the first key */
+   if (!strncmp(uevent, key, keylen))
+   return uevent + keylen;
+
+   /* check 2nd key or further... */
+   do {
+   p = strstr(p, key);
+   if (p == NULL)
+   break;
+
+   if (p[-1] == '\n') /* check we are at a new line */
+   return p + keylen;
+
+   p += keylen; /* skip this one */
+   } while (p - uevent < (ptrdiff_t) total);
+
+   return NULL;
+}
+
+static char *
+strdup_until_nl(const char *p)
+{
+   const char *nl = strchr(p, '\n');
+   if (nl == NULL)
+   return strdup(p); /* no newline, copy until '\0' */
+
+   return strndup(p, nl - p);
+}
+
+static int
+dev_parse_uevent(struct rte_soc_device *dev, const char *uevent)
+{
+   const char *of;
+   const char *compat_n;
+   char *err;
+   long n;
+   char 

[dpdk-dev] [PATCH v4 10/17] eal/soc: add intr_handle

[Shreyansh Jain]

From: Jan Viktorin 

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 lib/librte_eal/common/include/rte_soc.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/librte_eal/common/include/rte_soc.h 
b/lib/librte_eal/common/include/rte_soc.h
index 415d409..1f5f81b 100644
--- a/lib/librte_eal/common/include/rte_soc.h
+++ b/lib/librte_eal/common/include/rte_soc.h
@@ -53,6 +53,7 @@ extern "C" {
 #include 
 #include 
 #include 
+#include 

 extern struct soc_driver_list soc_driver_list;
 /**< Global list of SoC Drivers */
@@ -80,6 +81,7 @@ struct rte_soc_device {
struct rte_device device;   /**< Inherit code device */
struct rte_soc_addr addr;   /**< SoC device Location */
struct rte_soc_id *id;  /**< SoC device ID list */
+   struct rte_intr_handle intr_handle; /**< Interrupt handle */
struct rte_soc_driver *driver;  /**< Associated driver */
 };

-- 
2.7.4

[dpdk-dev] [PATCH v4 09/17] eal/soc: add drv_flags

[Shreyansh Jain]

From: Jan Viktorin 

The flags are copied from the PCI ones. They should be refactorized into a
general set of flags in the future.

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 lib/librte_eal/common/include/rte_soc.h | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/lib/librte_eal/common/include/rte_soc.h 
b/lib/librte_eal/common/include/rte_soc.h
index 90cd6aa..415d409 100644
--- a/lib/librte_eal/common/include/rte_soc.h
+++ b/lib/librte_eal/common/include/rte_soc.h
@@ -123,8 +123,18 @@ struct rte_soc_driver {
soc_scan_t *scan_fn;/**< Callback for scanning SoC bus*/
soc_match_t *match_fn;  /**< Callback to match dev<->drv */
const struct rte_soc_id *id_table; /**< ID table, NULL terminated */
+   uint32_t drv_flags;/**< Control handling of device */
 };

+/** Device needs to map its resources by EAL */
+#define RTE_SOC_DRV_NEED_MAPPING 0x0001
+/** Device needs to be unbound even if no module is provieded */
+#define RTE_SOC_DRV_FORCE_UNBIND 0x0004
+/** Device driver supports link state interrupt */
+#define RTE_SOC_DRV_INTR_LSC0x0008
+/** Device driver supports detaching capability */
+#define RTE_SOC_DRV_DETACHABLE  0x0010
+
 /**
  * Utility function to write a SoC device name, this device name can later be
  * used to retrieve the corresponding rte_soc_addr using above functions.
-- 
2.7.4

[dpdk-dev] [PATCH v4 08/17] eal/soc: extend and utilize devargs

[Shreyansh Jain]

From: Jan Viktorin 

It is assumed that SoC Devices provided on command line are prefixed with
"soc:". This patch adds parse and attach support for such devices.

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 lib/librte_eal/common/eal_common_dev.c  | 27 +
 lib/librte_eal/common/eal_common_devargs.c  | 17 
 lib/librte_eal/common/eal_common_soc.c  | 61 -
 lib/librte_eal/common/include/rte_devargs.h |  8 
 lib/librte_eal/common/include/rte_soc.h | 24 
 5 files changed, 120 insertions(+), 17 deletions(-)

diff --git a/lib/librte_eal/common/eal_common_dev.c 
b/lib/librte_eal/common/eal_common_dev.c
index 457d227..ebbcf47 100644
--- a/lib/librte_eal/common/eal_common_dev.c
+++ b/lib/librte_eal/common/eal_common_dev.c
@@ -107,17 +107,23 @@ rte_eal_dev_init(void)

 int rte_eal_dev_attach(const char *name, const char *devargs)
 {
-   struct rte_pci_addr addr;
+   struct rte_soc_addr soc_addr;
+   struct rte_pci_addr pci_addr;

if (name == NULL || devargs == NULL) {
RTE_LOG(ERR, EAL, "Invalid device or arguments provided\n");
return -EINVAL;
}

-   if (eal_parse_pci_DomBDF(name, ) == 0) {
-   if (rte_eal_pci_probe_one() < 0)
+   memset(_addr, 0, sizeof(soc_addr));
+   if (rte_eal_parse_soc_spec(name, _addr) == 0) {
+   if (rte_eal_soc_probe_one(_addr) < 0) {
+   free(soc_addr.name);
+   goto err;
+   }
+   } else if (eal_parse_pci_DomBDF(name, _addr) == 0) {
+   if (rte_eal_pci_probe_one(_addr) < 0)
goto err;
-
} else {
if (rte_eal_vdev_init(name, devargs))
goto err;
@@ -132,15 +138,22 @@ err:

 int rte_eal_dev_detach(const char *name)
 {
-   struct rte_pci_addr addr;
+   struct rte_soc_addr soc_addr;
+   struct rte_pci_addr pci_addr;

if (name == NULL) {
RTE_LOG(ERR, EAL, "Invalid device provided.\n");
return -EINVAL;
}

-   if (eal_parse_pci_DomBDF(name, ) == 0) {
-   if (rte_eal_pci_detach() < 0)
+   memset(_addr, 0, sizeof(soc_addr));
+   if (rte_eal_parse_soc_spec(name, _addr) == 0) {
+   if (rte_eal_soc_detach(_addr) < 0) {
+   free(soc_addr.name);
+   goto err;
+   }
+   } else if (eal_parse_pci_DomBDF(name, _addr) == 0) {
+   if (rte_eal_pci_detach(_addr) < 0)
goto err;
} else {
if (rte_eal_vdev_uninit(name))
diff --git a/lib/librte_eal/common/eal_common_devargs.c 
b/lib/librte_eal/common/eal_common_devargs.c
index e403717..e1dae1a 100644
--- a/lib/librte_eal/common/eal_common_devargs.c
+++ b/lib/librte_eal/common/eal_common_devargs.c
@@ -41,6 +41,7 @@
 #include 

 #include 
+#include 
 #include 
 #include "eal_private.h"

@@ -105,6 +106,14 @@ rte_eal_devargs_add(enum rte_devtype devtype, const char 
*devargs_str)
goto fail;

break;
+
+   case RTE_DEVTYPE_WHITELISTED_SOC:
+   case RTE_DEVTYPE_BLACKLISTED_SOC:
+   /* try to parse soc device with prefix "soc:" */
+   if (rte_eal_parse_soc_spec(buf, >soc.addr) != 0)
+   goto fail;
+   break;
+
case RTE_DEVTYPE_VIRTUAL:
/* save driver name */
ret = snprintf(devargs->virt.drv_name,
@@ -166,6 +175,14 @@ rte_eal_devargs_dump(FILE *f)
   devargs->pci.addr.devid,
   devargs->pci.addr.function,
   devargs->args);
+   else if (devargs->type == RTE_DEVTYPE_WHITELISTED_SOC)
+   fprintf(f, "  SoC whitelist %s %s\n",
+  devargs->soc.addr.name,
+  devargs->soc.addr.fdt_path);
+   else if (devargs->type == RTE_DEVTYPE_BLACKLISTED_SOC)
+   fprintf(f, "  SoC blacklist %s %s\n",
+  devargs->soc.addr.name,
+  devargs->soc.addr.fdt_path);
else if (devargs->type == RTE_DEVTYPE_VIRTUAL)
fprintf(f, "  VIRTUAL %s %s\n",
   devargs->virt.drv_name,
diff --git a/lib/librte_eal/common/eal_common_soc.c 
b/lib/librte_eal/common/eal_common_soc.c
index 256cef8..44f5559 100644
--- a/lib/librte_eal/common/eal_common_soc.c
+++ b/lib/librte_eal/common/eal_common_soc.c
@@ -37,6 +37,8 @@

 #include 
 #include 
+#include 
+#include 
 #include 

 #include "eal_private.h"
@@ -70,6 +72,21 @@ rte_eal_soc_match_compat(struct rte_soc_driver *drv,
return 1;
 }

+static struct rte_devargs *soc_devargs_lookup(struct rte_soc_device *dev)
+{
+   

[dpdk-dev] [PATCH v4 07/17] eal/soc: implement probing of drivers

[Shreyansh Jain]

Each SoC PMD registers a set of callback for scanning its own bus/infra and
matching devices to drivers when probe is called.
This patch introduces the infra for calls to SoC scan on rte_eal_soc_init()
and match on rte_eal_soc_probe().

Patch also adds test case for scan and probe.

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
--
v4:
 - Update test_soc for descriptive test function names
 - Comments over test functions
 - devinit and devuninint --> probe/remove
 - RTE_VERIFY at some places
---
 app/test/test_soc.c | 205 ++-
 lib/librte_eal/bsdapp/eal/rte_eal_version.map   |   4 +
 lib/librte_eal/common/eal_common_soc.c  | 213 +++-
 lib/librte_eal/common/include/rte_soc.h |  83 -
 lib/librte_eal/linuxapp/eal/eal.c   |   5 +
 lib/librte_eal/linuxapp/eal/eal_soc.c   |  21 ++-
 lib/librte_eal/linuxapp/eal/rte_eal_version.map |   4 +
 7 files changed, 523 insertions(+), 12 deletions(-)

diff --git a/app/test/test_soc.c b/app/test/test_soc.c
index ac03e64..b587d5e 100644
--- a/app/test/test_soc.c
+++ b/app/test/test_soc.c
@@ -87,14 +87,65 @@ static int test_compare_addr(void)
  */
 struct test_wrapper {
struct rte_soc_driver soc_drv;
+   struct rte_soc_device soc_dev;
 };

+static int empty_pmd0_probe(struct rte_soc_driver *drv,
+ struct rte_soc_device *dev);
+static int empty_pmd0_remove(struct rte_soc_device *dev);
+
+static void always_find_dev0_cb(void);
+static int match_dev0_by_name(struct rte_soc_driver *drv,
+ struct rte_soc_device *dev);
+
+static void always_find_dev1_cb(void);
+static int match_dev1_by_name(struct rte_soc_driver *drv,
+ struct rte_soc_device *dev);
+
+/**
+ * Dummy probe handler for PMD driver 'pmd0'.
+ *
+ * @param drv
+ * driver object
+ * @param dev
+ * device object
+ * @return
+ * 0 on success
+ */
+static int
+empty_pmd0_probe(struct rte_soc_driver *drv __rte_unused,
+  struct rte_soc_device *dev __rte_unused)
+{
+   return 0;
+}
+
+/**
+ * Remove handler for PMD driver 'pmd0'.
+ *
+ * @param dev
+ * device to remove
+ * @return
+ * 0 on success
+ */
+static int
+empty_pmd0_remove(struct rte_soc_device *dev)
+{
+   /* Release the memory associated with dev->addr.name */
+   free(dev->addr.name);
+
+   return 0;
+}
+
 struct test_wrapper empty_pmd0 = {
.soc_drv = {
.driver = {
.name = "empty_pmd0"
},
-   },
+   .probe = empty_pmd0_probe,
+   .remove = empty_pmd0_remove,
+   .scan_fn = always_find_dev0_cb,
+   .match_fn = match_dev0_by_name,
+   }
 };

 struct test_wrapper empty_pmd1 = {
@@ -102,9 +153,87 @@ struct test_wrapper empty_pmd1 = {
.driver = {
.name = "empty_pmd1"
},
+   .scan_fn = always_find_dev1_cb,
+   .match_fn = match_dev1_by_name,
},
 };

+/**
+ * Bus scan by PMD 'pmd0' for adding device 'dev0'
+ *
+ * @param void
+ * @return void
+ */
+static void
+always_find_dev0_cb(void)
+{
+   /* SoC's scan would scan devices on its bus and add to
+* soc_device_list
+*/
+   empty_pmd0.soc_dev.addr.name = strdup("empty_pmd0_dev");
+
+   TAILQ_INSERT_TAIL(_device_list, _pmd0.soc_dev, next);
+}
+
+/**
+ * Match device 'dev0' with driver PMD pmd0
+ *
+ * @param drv
+ * Driver with this matching needs to be done; unused here
+ * @param dev
+ * device to be matched against driver
+ * @return
+ * 0 on successful matched
+ * 1 if driver<=>device don't match
+ */
+static int
+match_dev0_by_name(struct rte_soc_driver *drv __rte_unused,
+  struct rte_soc_device *dev)
+{
+   if (!dev->addr.name || strcmp(dev->addr.name, "empty_pmd0_dev"))
+   return 0;
+
+   return 1;
+}
+
+/**
+ * Bus scan by PMD 'pmd0' for adding device 'dev1'
+ *
+ * @param void
+ * @return void
+ */
+static void
+always_find_dev1_cb(void)
+{
+   /* SoC's scan would scan devices on its bus and add to
+* soc_device_list
+*/
+   empty_pmd0.soc_dev.addr.name = strdup("empty_pmd1_dev");
+
+   TAILQ_INSERT_TAIL(_device_list, _pmd1.soc_dev, next);
+}
+
+/**
+ * Match device 'dev1' with driver PMD pmd0
+ *
+ * @param drv
+ * Driver with this matching needs to be done; unused here
+ * @param dev
+ * device to be matched against driver
+ * @return
+ * 0 on successful matched
+ * 1 if driver<=>device don't match
+ */
+static int
+match_dev1_by_name(struct rte_soc_driver *drv __rte_unused,
+  struct rte_soc_device *dev)
+{
+   if (!dev->addr.name || strcmp(dev->addr.name, "empty_pmd1_dev"))
+   return 0;
+
+   return 1;
+}
+
 static int
 

[dpdk-dev] [PATCH v4 06/17] eal/soc: init SoC infra from EAL

[Shreyansh Jain]

From: Jan Viktorin 

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 lib/librte_eal/bsdapp/eal/Makefile|  1 +
 lib/librte_eal/bsdapp/eal/eal.c   |  4 +++
 lib/librte_eal/bsdapp/eal/eal_soc.c   | 46 
 lib/librte_eal/common/eal_private.h   | 10 +++
 lib/librte_eal/linuxapp/eal/Makefile  |  1 +
 lib/librte_eal/linuxapp/eal/eal.c |  3 ++
 lib/librte_eal/linuxapp/eal/eal_soc.c | 56 +++
 7 files changed, 121 insertions(+)
 create mode 100644 lib/librte_eal/bsdapp/eal/eal_soc.c
 create mode 100644 lib/librte_eal/linuxapp/eal/eal_soc.c

diff --git a/lib/librte_eal/bsdapp/eal/Makefile 
b/lib/librte_eal/bsdapp/eal/Makefile
index a15b762..42b3a2b 100644
--- a/lib/librte_eal/bsdapp/eal/Makefile
+++ b/lib/librte_eal/bsdapp/eal/Makefile
@@ -56,6 +56,7 @@ SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += eal_memory.c
 SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += eal_hugepage_info.c
 SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += eal_thread.c
 SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += eal_pci.c
+SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += eal_soc.c
 SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += eal_debug.c
 SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += eal_lcore.c
 SRCS-$(CONFIG_RTE_EXEC_ENV_BSDAPP) += eal_timer.c
diff --git a/lib/librte_eal/bsdapp/eal/eal.c b/lib/librte_eal/bsdapp/eal/eal.c
index 9b93da3..2d62b9d 100644
--- a/lib/librte_eal/bsdapp/eal/eal.c
+++ b/lib/librte_eal/bsdapp/eal/eal.c
@@ -64,6 +64,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -564,6 +565,9 @@ rte_eal_init(int argc, char **argv)
if (rte_eal_pci_init() < 0)
rte_panic("Cannot init PCI\n");

+   if (rte_eal_soc_init() < 0)
+   rte_panic("Cannot init SoC\n");
+
eal_check_mem_on_local_socket();

if (eal_plugins_init() < 0)
diff --git a/lib/librte_eal/bsdapp/eal/eal_soc.c 
b/lib/librte_eal/bsdapp/eal/eal_soc.c
new file mode 100644
index 000..cb297ff
--- /dev/null
+++ b/lib/librte_eal/bsdapp/eal/eal_soc.c
@@ -0,0 +1,46 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2016 RehiveTech. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+/* Init the SoC EAL subsystem */
+int
+rte_eal_soc_init(void)
+{
+   return 0;
+}
diff --git a/lib/librte_eal/common/eal_private.h 
b/lib/librte_eal/common/eal_private.h
index 0e8d6f7..d810f9f 100644
--- a/lib/librte_eal/common/eal_private.h
+++ b/lib/librte_eal/common/eal_private.h
@@ -122,6 +122,16 @@ int rte_eal_pci_init(void);
 struct rte_soc_driver;
 struct rte_soc_device;

+/**
+ * Init the SoC infra.
+ *
+ * This function is private to EAL.
+ *
+ * @return
+ *   0 on success, negative on error
+ */
+int rte_eal_soc_init(void);
+
 struct rte_pci_driver;
 struct rte_pci_device;

diff --git a/lib/librte_eal/linuxapp/eal/Makefile 
b/lib/librte_eal/linuxapp/eal/Makefile
index a520477..59e30fa 100644
--- a/lib/librte_eal/linuxapp/eal/Makefile
+++ b/lib/librte_eal/linuxapp/eal/Makefile
@@ -65,6 +65,7 @@ SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_vfio_mp_sync.c
 SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_pci.c
 SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_pci_uio.c
 SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_pci_vfio.c
+SRCS-$(CONFIG_RTE_EXEC_ENV_LINUXAPP) += eal_soc.c
 

[dpdk-dev] [PATCH v4 05/17] eal: introduce command line enable SoC option

[Shreyansh Jain]

From: Jan Viktorin 

Support --enable-soc. SoC support is disabled by default.

Signed-off-by: Jan Viktorin 
[Shreyansh: Change --no-soc to --enable-soc; disabled by default]
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 doc/guides/testpmd_app_ug/run_app.rst  | 4 
 lib/librte_eal/common/eal_common_options.c | 5 +
 lib/librte_eal/common/eal_internal_cfg.h   | 1 +
 lib/librte_eal/common/eal_options.h| 2 ++
 4 files changed, 12 insertions(+)

diff --git a/doc/guides/testpmd_app_ug/run_app.rst 
b/doc/guides/testpmd_app_ug/run_app.rst
index d7c5120..4dafe5f 100644
--- a/doc/guides/testpmd_app_ug/run_app.rst
+++ b/doc/guides/testpmd_app_ug/run_app.rst
@@ -156,6 +156,10 @@ See the DPDK Getting Started Guides for more information 
on these options.

 Use malloc instead of hugetlbfs.

+*   ``--enable-soc``
+
+Enable SoC framework support
+

 Testpmd Command-line Options
 
diff --git a/lib/librte_eal/common/eal_common_options.c 
b/lib/librte_eal/common/eal_common_options.c
index 6ca8af1..2156ab3 100644
--- a/lib/librte_eal/common/eal_common_options.c
+++ b/lib/librte_eal/common/eal_common_options.c
@@ -75,6 +75,7 @@ const struct option
 eal_long_options[] = {
{OPT_BASE_VIRTADDR, 1, NULL, OPT_BASE_VIRTADDR_NUM},
{OPT_CREATE_UIO_DEV,0, NULL, OPT_CREATE_UIO_DEV_NUM   },
+   {OPT_ENABLE_SOC,0, NULL, OPT_ENABLE_SOC_NUM   },
{OPT_FILE_PREFIX,   1, NULL, OPT_FILE_PREFIX_NUM  },
{OPT_HELP,  0, NULL, OPT_HELP_NUM },
{OPT_HUGE_DIR,  1, NULL, OPT_HUGE_DIR_NUM },
@@ -843,6 +844,10 @@ eal_parse_common_option(int opt, const char *optarg,
break;

/* long options */
+   case OPT_ENABLE_SOC_NUM:
+   conf->enable_soc = 1;
+   break;
+
case OPT_HUGE_UNLINK_NUM:
conf->hugepage_unlink = 1;
break;
diff --git a/lib/librte_eal/common/eal_internal_cfg.h 
b/lib/librte_eal/common/eal_internal_cfg.h
index 5f1367e..2a6e3ea 100644
--- a/lib/librte_eal/common/eal_internal_cfg.h
+++ b/lib/librte_eal/common/eal_internal_cfg.h
@@ -67,6 +67,7 @@ struct internal_config {
unsigned hugepage_unlink; /**< true to unlink backing files */
volatile unsigned xen_dom0_support; /**< support app running on Xen 
Dom0*/
volatile unsigned no_pci; /**< true to disable PCI */
+   volatile unsigned enable_soc; /**< true to enable SoC */
volatile unsigned no_hpet;/**< true to disable HPET */
volatile unsigned vmware_tsc_map; /**< true to use VMware TSC mapping

* instead of native TSC */
diff --git a/lib/librte_eal/common/eal_options.h 
b/lib/librte_eal/common/eal_options.h
index a881c62..6e679c3 100644
--- a/lib/librte_eal/common/eal_options.h
+++ b/lib/librte_eal/common/eal_options.h
@@ -49,6 +49,8 @@ enum {
OPT_BASE_VIRTADDR_NUM,
 #define OPT_CREATE_UIO_DEV"create-uio-dev"
OPT_CREATE_UIO_DEV_NUM,
+#define OPT_ENABLE_SOC"enable-soc"
+   OPT_ENABLE_SOC_NUM,
 #define OPT_FILE_PREFIX   "file-prefix"
OPT_FILE_PREFIX_NUM,
 #define OPT_HUGE_DIR  "huge-dir"
-- 
2.7.4

[dpdk-dev] [PATCH v4 04/17] eal/soc: implement SoC device list and dump

[Shreyansh Jain]

From: Jan Viktorin 

SoC devices would be linked in a separate list (from PCI). This is used for
probe function.
A helper for dumping the device list is added.

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 lib/librte_eal/bsdapp/eal/rte_eal_version.map   |  2 ++
 lib/librte_eal/common/eal_common_soc.c  | 34 +
 lib/librte_eal/common/include/rte_soc.h |  9 +++
 lib/librte_eal/linuxapp/eal/rte_eal_version.map |  2 ++
 4 files changed, 47 insertions(+)

diff --git a/lib/librte_eal/bsdapp/eal/rte_eal_version.map 
b/lib/librte_eal/bsdapp/eal/rte_eal_version.map
index cf6fb8e..86e3cfd 100644
--- a/lib/librte_eal/bsdapp/eal/rte_eal_version.map
+++ b/lib/librte_eal/bsdapp/eal/rte_eal_version.map
@@ -171,11 +171,13 @@ DPDK_16.11 {
rte_eal_dev_attach;
rte_eal_dev_detach;
rte_eal_map_resource;
+   rte_eal_soc_dump;
rte_eal_soc_register;
rte_eal_soc_unregister;
rte_eal_unmap_resource;
rte_eal_vdrv_register;
rte_eal_vdrv_unregister;
+   soc_device_list;
soc_driver_list;

 } DPDK_16.07;
diff --git a/lib/librte_eal/common/eal_common_soc.c 
b/lib/librte_eal/common/eal_common_soc.c
index 56135ed..5dcddc5 100644
--- a/lib/librte_eal/common/eal_common_soc.c
+++ b/lib/librte_eal/common/eal_common_soc.c
@@ -31,6 +31,8 @@
  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */

+#include 
+#include 
 #include 

 #include 
@@ -40,6 +42,38 @@
 /* Global SoC driver list */
 struct soc_driver_list soc_driver_list =
TAILQ_HEAD_INITIALIZER(soc_driver_list);
+struct soc_device_list soc_device_list =
+   TAILQ_HEAD_INITIALIZER(soc_device_list);
+
+/* dump one device */
+static int
+soc_dump_one_device(FILE *f, struct rte_soc_device *dev)
+{
+   int i;
+
+   fprintf(f, "%s", dev->addr.name);
+   fprintf(f, " - fdt_path: %s\n",
+   dev->addr.fdt_path ? dev->addr.fdt_path : "(none)");
+
+   for (i = 0; dev->id && dev->id[i].compatible; ++i)
+   fprintf(f, "   %s\n", dev->id[i].compatible);
+
+   return 0;
+}
+
+/* dump devices on the bus to an output stream */
+void
+rte_eal_soc_dump(FILE *f)
+{
+   struct rte_soc_device *dev = NULL;
+
+   if (!f)
+   return;
+
+   TAILQ_FOREACH(dev, _device_list, next) {
+   soc_dump_one_device(f, dev);
+   }
+}

 /* register a driver */
 void
diff --git a/lib/librte_eal/common/include/rte_soc.h 
b/lib/librte_eal/common/include/rte_soc.h
index d17b20f..4a01af5 100644
--- a/lib/librte_eal/common/include/rte_soc.h
+++ b/lib/librte_eal/common/include/rte_soc.h
@@ -56,8 +56,12 @@ extern "C" {

 extern struct soc_driver_list soc_driver_list;
 /**< Global list of SoC Drivers */
+extern struct soc_device_list soc_device_list;
+/**< Global list of SoC Devices */

 TAILQ_HEAD(soc_driver_list, rte_soc_driver); /**< SoC drivers in D-linked Q. */
+TAILQ_HEAD(soc_device_list, rte_soc_device); /**< SoC devices in D-linked Q. */
+

 struct rte_soc_id {
const char *compatible; /**< OF compatible specification */
@@ -142,6 +146,11 @@ rte_eal_compare_soc_addr(const struct rte_soc_addr *a0,
 }

 /**
+ * Dump discovered SoC devices.
+ */
+void rte_eal_soc_dump(FILE *f);
+
+/**
  * Register a SoC driver.
  */
 void rte_eal_soc_register(struct rte_soc_driver *driver);
diff --git a/lib/librte_eal/linuxapp/eal/rte_eal_version.map 
b/lib/librte_eal/linuxapp/eal/rte_eal_version.map
index ab6b985..0155025 100644
--- a/lib/librte_eal/linuxapp/eal/rte_eal_version.map
+++ b/lib/librte_eal/linuxapp/eal/rte_eal_version.map
@@ -175,11 +175,13 @@ DPDK_16.11 {
rte_eal_dev_attach;
rte_eal_dev_detach;
rte_eal_map_resource;
+   rte_eal_soc_dump;
rte_eal_soc_register;
rte_eal_soc_unregister;
rte_eal_unmap_resource;
rte_eal_vdrv_register;
rte_eal_vdrv_unregister;
+   soc_device_list;
soc_driver_list;

 } DPDK_16.07;
-- 
2.7.4

[dpdk-dev] [PATCH v4 03/17] eal/soc: add SoC PMD register/unregister logic

[Shreyansh Jain]

From: Jan Viktorin 

Registeration of a SoC driver through a helper RTE_PMD_REGISTER_SOC
(on the lines of RTE_PMD_REGISTER_PCI). soc_driver_list stores all the
registered drivers.

Test case has been introduced to verify the registration and
deregistration.

Signed-off-by: Jan Viktorin 
[Shreyansh: update PMD registration method]
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 app/test/test_soc.c | 111 
 lib/librte_eal/bsdapp/eal/rte_eal_version.map   |   3 +
 lib/librte_eal/common/eal_common_soc.c  |  56 
 lib/librte_eal/common/include/rte_soc.h |  26 ++
 lib/librte_eal/linuxapp/eal/Makefile|   1 +
 lib/librte_eal/linuxapp/eal/rte_eal_version.map |   3 +
 6 files changed, 200 insertions(+)
 create mode 100644 lib/librte_eal/common/eal_common_soc.c

diff --git a/app/test/test_soc.c b/app/test/test_soc.c
index 916a863..ac03e64 100644
--- a/app/test/test_soc.c
+++ b/app/test/test_soc.c
@@ -75,6 +75,108 @@ static int test_compare_addr(void)
free(a2.name);
free(a1.name);
free(a0.name);
+
+   return 0;
+}
+
+/**
+ * Empty PMD driver based on the SoC infra.
+ *
+ * The rte_soc_device is usually wrapped in some higher-level struct
+ * (eth_driver). We simulate such a wrapper with an anonymous struct here.
+ */
+struct test_wrapper {
+   struct rte_soc_driver soc_drv;
+};
+
+struct test_wrapper empty_pmd0 = {
+   .soc_drv = {
+   .driver = {
+   .name = "empty_pmd0"
+   },
+   },
+};
+
+struct test_wrapper empty_pmd1 = {
+   .soc_drv = {
+   .driver = {
+   .name = "empty_pmd1"
+   },
+   },
+};
+
+static int
+count_registered_socdrvs(void)
+{
+   int i;
+   struct rte_soc_driver *drv;
+
+   i = 0;
+   TAILQ_FOREACH(drv, _driver_list, next)
+   i += 1;
+
+   return i;
+}
+
+static int
+test_register_unregister(void)
+{
+   struct rte_soc_driver *drv;
+   int count;
+
+   rte_eal_soc_register(_pmd0.soc_drv);
+
+   TEST_ASSERT(!TAILQ_EMPTY(_driver_list),
+   "No PMD is present but the empty_pmd0 should be there");
+   drv = TAILQ_FIRST(_driver_list);
+   TEST_ASSERT(!strcmp(drv->driver.name, "empty_pmd0"),
+   "The registered PMD is not empty_pmd0 but '%s'",
+   drv->driver.name);
+
+   rte_eal_soc_register(_pmd1.soc_drv);
+
+   count = count_registered_socdrvs();
+   TEST_ASSERT_EQUAL(count, 2, "Expected 2 PMDs but detected %d", count);
+
+   rte_eal_soc_unregister(_pmd0.soc_drv);
+   count = count_registered_socdrvs();
+   TEST_ASSERT_EQUAL(count, 1, "Expected 1 PMDs but detected %d", count);
+
+   rte_eal_soc_unregister(_pmd1.soc_drv);
+
+   printf("%s has been successful\n", __func__);
+   return 0;
+}
+
+/* save real devices and drivers until the tests finishes */
+struct soc_driver_list real_soc_driver_list =
+   TAILQ_HEAD_INITIALIZER(real_soc_driver_list);
+
+static int test_soc_setup(void)
+{
+   struct rte_soc_driver *drv;
+
+   /* no real drivers for the test */
+   while (!TAILQ_EMPTY(_driver_list)) {
+   drv = TAILQ_FIRST(_driver_list);
+   rte_eal_soc_unregister(drv);
+   TAILQ_INSERT_TAIL(_soc_driver_list, drv, next);
+   }
+
+   return 0;
+}
+
+static int test_soc_cleanup(void)
+{
+   struct rte_soc_driver *drv;
+
+   /* bring back real drivers after the test */
+   while (!TAILQ_EMPTY(_soc_driver_list)) {
+   drv = TAILQ_FIRST(_soc_driver_list);
+   TAILQ_REMOVE(_soc_driver_list, drv, next);
+   rte_eal_soc_register(drv);
+   }
+
return 0;
 }

@@ -84,6 +186,15 @@ test_soc(void)
if (test_compare_addr())
return -1;

+   if (test_soc_setup())
+   return -1;
+
+   if (test_register_unregister())
+   return -1;
+
+   if (test_soc_cleanup())
+   return -1;
+
return 0;
 }

diff --git a/lib/librte_eal/bsdapp/eal/rte_eal_version.map 
b/lib/librte_eal/bsdapp/eal/rte_eal_version.map
index 11d9f59..cf6fb8e 100644
--- a/lib/librte_eal/bsdapp/eal/rte_eal_version.map
+++ b/lib/librte_eal/bsdapp/eal/rte_eal_version.map
@@ -171,8 +171,11 @@ DPDK_16.11 {
rte_eal_dev_attach;
rte_eal_dev_detach;
rte_eal_map_resource;
+   rte_eal_soc_register;
+   rte_eal_soc_unregister;
rte_eal_unmap_resource;
rte_eal_vdrv_register;
rte_eal_vdrv_unregister;
+   soc_driver_list;

 } DPDK_16.07;
diff --git a/lib/librte_eal/common/eal_common_soc.c 
b/lib/librte_eal/common/eal_common_soc.c
new file mode 100644
index 000..56135ed
--- /dev/null
+++ b/lib/librte_eal/common/eal_common_soc.c
@@ -0,0 +1,56 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2016 RehiveTech. All rights 

[dpdk-dev] [PATCH v4 02/17] eal/soc: introduce very essential SoC infra definitions

[Shreyansh Jain]

From: Jan Viktorin 

Define initial structures and functions for the SoC infrastructure.
This patch supports only a very minimal functions for now.
More features will be added in the following commits.

Includes rte_device/rte_driver inheritance of
rte_soc_device/rte_soc_driver.

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
Signed-off-by: Hemant Agrawal 
---
 app/test/Makefile   |   1 +
 app/test/test_soc.c |  90 +
 lib/librte_eal/common/Makefile  |   2 +-
 lib/librte_eal/common/eal_private.h |   4 +
 lib/librte_eal/common/include/rte_soc.h | 138 
 5 files changed, 234 insertions(+), 1 deletion(-)
 create mode 100644 app/test/test_soc.c
 create mode 100644 lib/librte_eal/common/include/rte_soc.h

diff --git a/app/test/Makefile b/app/test/Makefile
index 5be023a..30295af 100644
--- a/app/test/Makefile
+++ b/app/test/Makefile
@@ -77,6 +77,7 @@ APP = test
 #
 SRCS-$(CONFIG_RTE_LIBRTE_CMDLINE) := commands.c
 SRCS-y += test.c
+SRCS-y += test_soc.c
 SRCS-y += resource.c
 SRCS-y += test_resource.c
 test_resource.res: test_resource.c
diff --git a/app/test/test_soc.c b/app/test/test_soc.c
new file mode 100644
index 000..916a863
--- /dev/null
+++ b/app/test/test_soc.c
@@ -0,0 +1,90 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2016 RehiveTech. All rights reserved.
+ *   All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in
+ *   the documentation and/or other materials provided with the
+ *   distribution.
+ * * Neither the name of RehiveTech nor the names of its
+ *   contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "test.h"
+
+static char *safe_strdup(const char *s)
+{
+   char *c = strdup(s);
+
+   if (c == NULL)
+   rte_panic("failed to strdup '%s'\n", s);
+
+   return c;
+}
+
+static int test_compare_addr(void)
+{
+   struct rte_soc_addr a0;
+   struct rte_soc_addr a1;
+   struct rte_soc_addr a2;
+
+   a0.name = safe_strdup("ethernet0");
+   a0.fdt_path = NULL;
+
+   a1.name = safe_strdup("ethernet0");
+   a1.fdt_path = NULL;
+
+   a2.name = safe_strdup("ethernet1");
+   a2.fdt_path = NULL;
+
+   TEST_ASSERT(!rte_eal_compare_soc_addr(, ),
+   "Failed to compare two soc addresses that equal");
+   TEST_ASSERT(rte_eal_compare_soc_addr(, ),
+   "Failed to compare two soc addresses that differs");
+
+   free(a2.name);
+   free(a1.name);
+   free(a0.name);
+   return 0;
+}
+
+static int
+test_soc(void)
+{
+   if (test_compare_addr())
+   return -1;
+
+   return 0;
+}
+
+REGISTER_TEST_COMMAND(soc_autotest, test_soc);
diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile
index dfd64aa..b414008 100644
--- a/lib/librte_eal/common/Makefile
+++ b/lib/librte_eal/common/Makefile
@@ -33,7 +33,7 @@ include $(RTE_SDK)/mk/rte.vars.mk

 INC := rte_branch_prediction.h rte_common.h
 INC += rte_debug.h rte_eal.h rte_errno.h rte_launch.h rte_lcore.h
-INC += rte_log.h rte_memory.h rte_memzone.h rte_pci.h
+INC += rte_log.h rte_memory.h rte_memzone.h rte_soc.h rte_pci.h
 INC += rte_per_lcore.h rte_random.h
 INC += rte_tailq.h rte_interrupts.h rte_alarm.h
 INC += rte_string_fns.h rte_version.h
diff --git a/lib/librte_eal/common/eal_private.h 
b/lib/librte_eal/common/eal_private.h
index c8c2131..0e8d6f7 100644
--- a/lib/librte_eal/common/eal_private.h
+++ b/lib/librte_eal/common/eal_private.h
@@ -36,6 

[dpdk-dev] [PATCH v4 01/17] eal: define container macro

[Shreyansh Jain]

From: Jan Viktorin 

Signed-off-by: Jan Viktorin 
Signed-off-by: Shreyansh Jain 
---
 lib/librte_eal/common/include/rte_common.h | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/lib/librte_eal/common/include/rte_common.h 
b/lib/librte_eal/common/include/rte_common.h
index db5ac91..8152bd9 100644
--- a/lib/librte_eal/common/include/rte_common.h
+++ b/lib/librte_eal/common/include/rte_common.h
@@ -331,6 +331,24 @@ rte_bsf32(uint32_t v)
 #define offsetof(TYPE, MEMBER)  __builtin_offsetof (TYPE, MEMBER)
 #endif

+/**
+ * Return pointer to the wrapping struct instance.
+ * Example:
+ *
+ *  struct wrapper {
+ *  ...
+ *  struct child c;
+ *  ...
+ *  };
+ *
+ *  struct child *x = obtain(...);
+ *  struct wrapper *w = container_of(x, struct wrapper, c);
+ */
+#ifndef container_of
+#define container_of(p, type, member) \
+   ((type *) (((char *) (p)) - offsetof(type, member)))
+#endif
+
 #define _RTE_STR(x) #x
 /** Take a macro value and get a string version of it */
 #define RTE_STR(x) _RTE_STR(x)
-- 
2.7.4

[dpdk-dev] [PATCH v4 00/17] Introduce SoC device/driver framework for EAL

[Shreyansh Jain]

Introduction:
=

This patch set is direct derivative of Jan's original series [1],[2].

 - This version is based on HEAD (tag: v16.11-rc1) + patch series [11]

Aim:


As of now EAL is primarly focused on PCI initialization/probing.

 rte_eal_init()
  |- rte_eal_pci_init(): Find PCI devices from sysfs
  |- ...
  |- rte_eal_memzone_init()
  |- ...
  `- rte_eal_pci_probe(): Driver<=>Device initialization

This patchset introduces SoC framework which would enable SoC drivers and
drivers to be plugged into EAL, very similar to how PCI drivers/devices are
done today.

This is a stripped down version of PCI framework which allows the SoC PMDs
to implement their own routines for detecting devices and linking devices to
drivers.

1) Changes to EAL 
 rte_eal_init()
  |- rte_eal_pci_init(): Find PCI devices from sysfs
  |- rte_eal_soc_init(): Calls PMDs->scan_fn
  |- ...
  |- rte_eal_memzone_init()
  |- ...
  |- rte_eal_pci_probe(): Driver<=>Device initialization, PMD->devinit()
  `- rte_eal_soc_probe(): Calls PMDs->match_fn and PMDs->devinit();

2) New device/driver structures:
  - rte_soc_driver (inheriting rte_driver)
  - rte_soc_device (inheriting rte_device)
  - rte_eth_dev and eth_driver embedded rte_soc_device and rte_soc_driver,
respectively.

3) The SoC PMDs need to:
 - define rte_soc_driver with necessary scan and match callbacks
 - Register themselves using DRIVER_REGISTER_SOC()
 - Implement respective bus scanning in the scan callbacks to add necessary
   devices to SoC device list
 - Implement necessary eth_dev_init/uninint for ethernet instances

4) Design considerations that are same as PCI:
 - SoC initialization is being done through rte_eal_init(), just after PCI 
   initialization is done.
 - As in case of PCI, probe is done after rte_eal_pci_probe() to link the 
   devices detected with the drivers registered.
 - Device attach/detach functions are available and have been designed on 
   the lines of PCI framework.
 - PMDs register using DRIVER_REGISTER_SOC, very similar to 
   DRIVER_REGISTER_PCI for PCI devices.
 - Linked list of SoC driver and devices exists independent of the other 
   driver/device list, but inheriting rte_driver/rte_driver, these are
   also part of a global list.

5) Design considerations that are different from PCI:
 - Each driver implements its own scan and match function. PCI uses the BDF 
   format to read the device from sysfs, but this _may_not_ be a case for a 
   SoC ethernet device.
   = This is an important change from initial proposal by Jan in [2].
   Unlike his attempt to use /sys/bus/platform, this patch relies on the
   PMD to detect the devices. This is because SoC may require specific or
   additional info for device detection. Further, SoC may have embedded
   devices/MACs which require initialization which cannot be covered
   through sysfs parsing.
   `-> Point (6) below is a side note to above.
   = PCI based PMDs rely on EAL's capability to detect devices. This 
   proposal puts the onus on PMD to detect devices, add to soc_device_list 
   and wait for Probe. Matching, of device<=>driver is again PMD's
   callback.

6) Adding default scan and match helpers for PMDs
 - The design warrrants the PMDs implement their own scan of devices
   on bus, and match routines for probe implementation.
   This patch introduces helpers which can be used by PMDs for scan of
   the platform bus and matching devices against the compatible string
   extracted from the scan.
 - Intention is to make it easier to integrate known SoC which expose
   platform bus compliant information (compat, sys/bus/platform...).
 - PMDs which have deviations from this standard model can implement and
   hook their bus scanning and probe match callbacks while registering
   driver.

Patchset Overview:
==
 - Patches 0001~0004 introduce the base infrastructure and test case
 - Patch 0005 is for command line support for no-soc, on lines of no-pci
 - Patch 0006 enables EAL to handle SoC type devices
 - Patch 0007 adds support for scan and probe callbacks and updates the test
   framework with relevant test case.
 - Patch 0008~0010 enable device argument, driver specific flags and
   interrupt handling related basic infra. Subsequent patches build up on
   them.
 - Patch 0011~0012 add support for default function which PMDs can use for
   scanning platform bus. These functions are optional and need to be hooked
   to by PMDs.
 - Patch 0013~0014 makes changes to PCI as well as ethdev code to remove 
   assumption that eth_driver is a PCI driver.
 - Patch 0016 adds necessary ethdev probe/remove functions for PMDs to use
 - Patch 0017 adds support for SoC driver/devices, along with probe/remove
   functions for Cryptodev devices.

Future/Pending Changes:
===
- Device whitelisting/blacklist still relies on command line '-b' and '-c'
  which are internally implemented using OPT_PCI_BLACKLIST/OPT_PCI_WHITELIST.
  This needs to be changed to a 

[dpdk-dev] [PATCH v3 32/32] qede: update driver version

[Rasesh Mody]

This patch updates the qede pmd version to 1.2.0.1.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/qede_ethdev.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index 5ab36a5..5eb3f52 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -43,7 +43,7 @@
 /* Driver versions */
 #define QEDE_PMD_VER_PREFIX"QEDE PMD"
 #define QEDE_PMD_VERSION_MAJOR 1
-#define QEDE_PMD_VERSION_MINOR 1
+#define QEDE_PMD_VERSION_MINOR 2
 #define QEDE_PMD_VERSION_REVISION   0
 #define QEDE_PMD_VERSION_PATCH 1

-- 
1.8.3.1

[dpdk-dev] [PATCH v3 31/32] doc: update qede pmd documentation

[Rasesh Mody]

Signed-off-by: Rasesh Mody 
Acked-by: John McNamara 
---
 doc/guides/nics/qede.rst | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index d32fba2..105ae37 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -65,6 +65,8 @@ Non-supported Features

 - SR-IOV PF
 - Tunneling offloads
+- LRO/TSO
+- NPAR

 Supported QLogic Adapters
 -
@@ -239,7 +241,7 @@ SR-IOV: Prerequisites and Sample Application Notes

 This section provides instructions to configure SR-IOV with Linux OS.

-**Note**: librte_pmd_qede will be used to bind to SR-IOV VF device and Linux 
native kernel driver (QEDE) will function as SR-IOV PF driver.
+**Note**: librte_pmd_qede will be used to bind to SR-IOV VF device and Linux 
native kernel driver (QEDE) will function as SR-IOV PF driver. Requires PF 
driver to be 8.10.x.x or higher.

 #. Verify SR-IOV and ARI capability is enabled on the adapter using ``lspci``:

-- 
1.8.3.1

[dpdk-dev] [PATCH v3 30/32] qede: remove zlib dependency and enable PMD by default

[Rasesh Mody]

The QEDE PMD now uses unzipped firmware file eliminating the dependency
on zlib. Hence remove LDLIBS entry form the Makefile and enable qede
PMD by default.

Fixes: 6adac0bf ("qede: add missing external dependency and disable by default")

Signed-off-by: Rasesh Mody 
---
 config/common_base| 2 +-
 doc/guides/nics/qede.rst  | 5 +
 drivers/net/qede/Makefile | 2 --
 drivers/net/qede/base/ecore.h | 2 +-
 drivers/net/qede/qede_main.c  | 2 +-
 mk/rte.app.mk | 2 +-
 6 files changed, 5 insertions(+), 10 deletions(-)

diff --git a/config/common_base b/config/common_base
index 7830535..2b03d61 100644
--- a/config/common_base
+++ b/config/common_base
@@ -317,7 +317,7 @@ CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n

 # QLogic 25G/40G/100G PMD
 #
-CONFIG_RTE_LIBRTE_QEDE_PMD=n
+CONFIG_RTE_LIBRTE_QEDE_PMD=y
 CONFIG_RTE_LIBRTE_QEDE_DEBUG_INIT=n
 CONFIG_RTE_LIBRTE_QEDE_DEBUG_INFO=n
 CONFIG_RTE_LIBRTE_QEDE_DEBUG_DRIVER=n
diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index 50e6f87..d32fba2 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -77,14 +77,11 @@ Prerequisites
 - Requires firmware version **8.10.x.** and management firmware
   version **8.10.x or higher**. Firmware may be available
   inbox in certain newer Linux distros under the standard directory
-  ``E.g. /lib/firmware/qed/qed_init_values_zipped-8.10.9.0.bin``
+  ``E.g. /lib/firmware/qed/qed_init_values-8.10.9.0.bin``

 - If the required firmware files are not available then visit
   `QLogic Driver Download Center `_.

-- This driver relies on external zlib library (-lz) for uncompressing
-  the firmware file.
-
 Performance note
 

diff --git a/drivers/net/qede/Makefile b/drivers/net/qede/Makefile
index 7965a83..39751e4 100644
--- a/drivers/net/qede/Makefile
+++ b/drivers/net/qede/Makefile
@@ -14,8 +14,6 @@ LIB = librte_pmd_qede.a
 CFLAGS += -O3
 CFLAGS += $(WERROR_FLAGS)

-LDLIBS += -lz
-
 EXPORT_MAP := rte_pmd_qede_version.map

 LIBABIVER := 1
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index 89e2bd0..907b35b 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -15,7 +15,7 @@
 #include 

 #define CONFIG_ECORE_BINARY_FW
-#define CONFIG_ECORE_ZIPPED_FW
+#undef CONFIG_ECORE_ZIPPED_FW

 #ifdef CONFIG_ECORE_ZIPPED_FW
 #include 
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 4f1e3b0..2d354e1 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -21,7 +21,7 @@ static uint8_t npar_tx_switching = 1;
 char fw_file[PATH_MAX];

 const char *QEDE_DEFAULT_FIRMWARE =
-   "/lib/firmware/qed/qed_init_values_zipped-8.10.9.0.bin";
+   "/lib/firmware/qed/qed_init_values-8.10.9.0.bin";

 static void
 qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
diff --git a/mk/rte.app.mk b/mk/rte.app.mk
index 1a0095b..9b12da3 100644
--- a/mk/rte.app.mk
+++ b/mk/rte.app.mk
@@ -120,7 +120,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD)  += 
-lrte_pmd_mpipe -lgxio
 _LDLIBS-$(CONFIG_RTE_LIBRTE_NFP_PMD)+= -lrte_pmd_nfp -lm
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_NULL)   += -lrte_pmd_null
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_PCAP)   += -lrte_pmd_pcap -lpcap
-_LDLIBS-$(CONFIG_RTE_LIBRTE_QEDE_PMD)   += -lrte_pmd_qede -lz
+_LDLIBS-$(CONFIG_RTE_LIBRTE_QEDE_PMD)   += -lrte_pmd_qede
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_RING)   += -lrte_pmd_ring
 _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_SZEDATA2)   += -lrte_pmd_szedata2 -lsze2
 _LDLIBS-$(CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD) += -lrte_pmd_thunderx_nicvf -lm
-- 
1.8.3.1

[dpdk-dev] [PATCH v3 29/32] qede: add support for queue statistics

[Rasesh Mody]

This patch adds support for pulling per queue statistics.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/qede_ethdev.c | 98 +-
 drivers/net/qede/qede_ethdev.h |  3 ++
 drivers/net/qede/qede_rxtx.c   | 23 +-
 drivers/net/qede/qede_rxtx.h   |  4 +-
 4 files changed, 107 insertions(+), 21 deletions(-)

diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 73b3b54..d1b5edc 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -160,6 +160,15 @@ static const struct rte_qede_xstats_name_off 
qede_xstats_strings[] = {
offsetof(struct ecore_eth_stats, tpa_coalesced_bytes)},
 };

+static const struct rte_qede_xstats_name_off qede_rxq_xstats_strings[] = {
+   {"rx_q_segments",
+   offsetof(struct qede_rx_queue, rx_segs)},
+   {"rx_q_hw_errors",
+   offsetof(struct qede_rx_queue, rx_hw_errors)},
+   {"rx_q_allocation_errors",
+   offsetof(struct qede_rx_queue, rx_alloc_errors)}
+};
+
 static void qede_interrupt_action(struct ecore_hwfn *p_hwfn)
 {
ecore_int_sp_dpc((osal_int_ptr_t)(p_hwfn));
@@ -825,6 +834,8 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct 
rte_eth_stats *eth_stats)
struct qede_dev *qdev = eth_dev->data->dev_private;
struct ecore_dev *edev = >edev;
struct ecore_eth_stats stats;
+   unsigned int i = 0, j = 0, qid;
+   struct qede_tx_queue *txq;

qdev->ops->get_vport_stats(edev, );

@@ -855,20 +866,73 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct 
rte_eth_stats *eth_stats)
stats.tx_mcast_bytes + stats.tx_bcast_bytes;

eth_stats->oerrors = stats.tx_err_drop_pkts;
+
+   /* Queue stats */
+   for (qid = 0; qid < QEDE_QUEUE_CNT(qdev); qid++) {
+   if (qdev->fp_array[qid].type & QEDE_FASTPATH_RX) {
+   eth_stats->q_ipackets[i] =
+   *(uint64_t *)(
+   ((char *)(qdev->fp_array[(qid)].rxq)) +
+   offsetof(struct qede_rx_queue,
+   rcv_pkts));
+   eth_stats->q_errors[i] =
+   *(uint64_t *)(
+   ((char *)(qdev->fp_array[(qid)].rxq)) +
+   offsetof(struct qede_rx_queue,
+   rx_hw_errors)) +
+   *(uint64_t *)(
+   ((char *)(qdev->fp_array[(qid)].rxq)) +
+   offsetof(struct qede_rx_queue,
+   rx_alloc_errors));
+   i++;
+   }
+
+   if (qdev->fp_array[qid].type & QEDE_FASTPATH_TX) {
+   txq = qdev->fp_array[(qid)].txqs[0];
+   eth_stats->q_opackets[j] =
+   *((uint64_t *)(uintptr_t)
+   (((uint64_t)(uintptr_t)(txq)) +
+offsetof(struct qede_tx_queue,
+ xmit_pkts)));
+   j++;
+   }
+   }
+}
+
+static unsigned
+qede_get_xstats_count(struct qede_dev *qdev) {
+   return RTE_DIM(qede_xstats_strings) +
+   (RTE_DIM(qede_rxq_xstats_strings) * QEDE_RSS_COUNT(qdev));
 }

 static int
 qede_get_xstats_names(__rte_unused struct rte_eth_dev *dev,
  struct rte_eth_xstat_name *xstats_names, unsigned limit)
 {
-   unsigned int i, stat_cnt = RTE_DIM(qede_xstats_strings);
+   struct qede_dev *qdev = dev->data->dev_private;
+   const unsigned int stat_cnt = qede_get_xstats_count(qdev);
+   unsigned int i, qid, stat_idx = 0;

-   if (xstats_names != NULL)
-   for (i = 0; i < stat_cnt; i++)
-   snprintf(xstats_names[i].name,
-   sizeof(xstats_names[i].name),
+   if (xstats_names != NULL) {
+   for (i = 0; i < RTE_DIM(qede_xstats_strings); i++) {
+   snprintf(xstats_names[stat_idx].name,
+   sizeof(xstats_names[stat_idx].name),
"%s",
qede_xstats_strings[i].name);
+   stat_idx++;
+   }
+
+   for (qid = 0; qid < QEDE_RSS_COUNT(qdev); qid++) {
+   for (i = 0; i < RTE_DIM(qede_rxq_xstats_strings); i++) {
+   snprintf(xstats_names[stat_idx].name,
+   sizeof(xstats_names[stat_idx].name),
+   "%.4s%d%s",
+   qede_rxq_xstats_strings[i].name, qid,
+   qede_rxq_xstats_strings[i].name + 4);
+   

[dpdk-dev] [PATCH v3 28/32] qede: fix status_blk index for VF queues

[Rasesh Mody]

From: Harish Patil 

o Fix the fastpath status block index such that each queue pair shares
the same index value.

o Add ecore_vf_get_num_sbs() API that returns the number of status
blocks assigned by PF. Use that to decide how many VF queues can be
advertised. Additionally, restrict maximum number of VF queues to 16
for 100G VF case.

Fixes: 2ea6f76 ("qede: add core driver")

Signed-off-by: Harish Patil 
---
 drivers/net/qede/base/ecore_vf.c | 11 ++-
 drivers/net/qede/base/ecore_vf_api.h |  3 +++
 drivers/net/qede/qede_ethdev.h   |  1 +
 drivers/net/qede/qede_main.c | 13 -
 drivers/net/qede/qede_rxtx.c | 15 ++-
 5 files changed, 40 insertions(+), 3 deletions(-)

diff --git a/drivers/net/qede/base/ecore_vf.c b/drivers/net/qede/base/ecore_vf.c
index 634e2bb..be8b1ec 100644
--- a/drivers/net/qede/base/ecore_vf.c
+++ b/drivers/net/qede/base/ecore_vf.c
@@ -336,7 +336,7 @@ static enum _ecore_status_t ecore_vf_pf_acquire(struct 
ecore_hwfn *p_hwfn)
/* Learn of the possibility of CMT */
if (IS_LEAD_HWFN(p_hwfn)) {
if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) {
-   DP_NOTICE(p_hwfn, false, "100g VF\n");
+   DP_INFO(p_hwfn, "100g VF\n");
p_hwfn->p_dev->num_hwfns = 2;
}
}
@@ -1382,6 +1382,15 @@ void ecore_vf_get_num_mac_filters(struct ecore_hwfn 
*p_hwfn,
*num_mac = p_vf->acquire_resp.resc.num_mac_filters;
 }

+void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
+ u32 *num_sbs)
+{
+   struct ecore_vf_iov *p_vf;
+
+   p_vf = p_hwfn->vf_iov_info;
+   *num_sbs = (u32)p_vf->acquire_resp.resc.num_sbs;
+}
+
 bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
 {
struct ecore_bulletin_content *bulletin;
diff --git a/drivers/net/qede/base/ecore_vf_api.h 
b/drivers/net/qede/base/ecore_vf_api.h
index c73244f..571fd37 100644
--- a/drivers/net/qede/base/ecore_vf_api.h
+++ b/drivers/net/qede/base/ecore_vf_api.h
@@ -87,6 +87,9 @@ void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
 void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn,
  u32 *num_mac_filters);

+void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
+ u32 *num_sbs);
+
 /**
  * @brief Check if VF can set a MAC address
  *
diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index c3b87e8..7b235b1 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -29,6 +29,7 @@
 #include "base/ecore_hsi_eth.h"
 #include "base/ecore_dev_api.h"
 #include "base/ecore_iov_api.h"
+#include "base/ecore_cxt.h"

 #include "qede_logs.h"
 #include "qede_if.h"
diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 0483116..4f1e3b0 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -384,6 +384,7 @@ int
 qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
 {
struct qede_dev *qdev = (struct qede_dev *)edev;
+   uint8_t queues = 0;
int i;

memset(info, 0, sizeof(*info));
@@ -407,7 +408,17 @@ qed_fill_eth_dev_info(struct ecore_dev *edev, struct 
qed_dev_eth_info *info)
rte_memcpy(>port_mac, >hwfns[0].hw_info.hw_mac_addr,
   ETHER_ADDR_LEN);
} else {
-   ecore_vf_get_num_rxqs(>hwfns[0], >num_queues);
+   ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
+ >num_queues);
+   if (edev->num_hwfns > 1) {
+   ecore_vf_get_num_rxqs(>hwfns[1], );
+   info->num_queues += queues;
+   /* Restrict 100G VF to advertise 16 queues till the
+* required support is available to go beyond 16.
+*/
+   info->num_queues = RTE_MIN(info->num_queues,
+  ECORE_MAX_VF_CHAINS_PER_PF);
+   }

ecore_vf_get_num_vlan_filters(>hwfns[0],
  (u8 *)>num_vlan_filters);
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index d903a84..087a2bb 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -424,9 +424,22 @@ qede_alloc_mem_sb(struct qede_dev *qdev, struct 
ecore_sb_info *sb_info,

 int qede_alloc_fp_resc(struct qede_dev *qdev)
 {
+   struct ecore_dev *edev = >edev;
struct qede_fastpath *fp;
+   uint32_t num_sbs;
int rc, i;

+   if (IS_VF(edev))
+   ecore_vf_get_num_sbs(ECORE_LEADING_HWFN(edev), _sbs);
+   else
+   num_sbs = (ecore_cxt_get_proto_cid_count
+ (ECORE_LEADING_HWFN(edev), PROTOCOLID_ETH, NULL)) / 2;
+
+   if (num_sbs == 0) {
+  

[dpdk-dev] [PATCH v3 27/32] qede: fix driver version string

[Rasesh Mody]

From: Harish Patil 

This patch fixes the base driver version display.
The driver version notation is:


Fixes: 2ea6f76 ("qede: add core driver")

Signed-off-by: Harish Patil 
---
 drivers/net/qede/qede_ethdev.c | 43 +-
 drivers/net/qede/qede_ethdev.h | 17 -
 drivers/net/qede/qede_if.h |  3 +--
 drivers/net/qede/qede_main.c   |  4 ++--
 4 files changed, 32 insertions(+), 35 deletions(-)

diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index ae188ed..73b3b54 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -8,6 +8,7 @@

 #include "qede_ethdev.h"
 #include 
+#include 

 /* Globals */
 static const struct qed_eth_ops *qed_ops;
@@ -188,31 +189,28 @@ static void qede_print_adapter_info(struct qede_dev *qdev)
 {
struct ecore_dev *edev = >edev;
struct qed_dev_info *info = >dev_info.common;
-   static char ver_str[QED_DRV_VER_STR_SIZE];
+   static char drv_ver[QEDE_PMD_DRV_VER_STR_SIZE];
+   static char ver_str[QEDE_PMD_DRV_VER_STR_SIZE];

DP_INFO(edev, "*\n");
+   DP_INFO(edev, " DPDK version:%s\n", rte_version());
DP_INFO(edev, " Chip details : %s%d\n",
-   ECORE_IS_BB(edev) ? "BB" : "AH",
-   CHIP_REV_IS_A0(edev) ? 0 : 1);
-
-   sprintf(ver_str, "%s %s_%d.%d.%d.%d", QEDE_PMD_VER_PREFIX,
-   edev->ver_str, QEDE_PMD_VERSION_MAJOR, QEDE_PMD_VERSION_MINOR,
-   QEDE_PMD_VERSION_REVISION, QEDE_PMD_VERSION_PATCH);
-   strcpy(qdev->drv_ver, ver_str);
-   DP_INFO(edev, " Driver version : %s\n", ver_str);
-
-   sprintf(ver_str, "%d.%d.%d.%d", info->fw_major, info->fw_minor,
-   info->fw_rev, info->fw_eng);
+ ECORE_IS_BB(edev) ? "BB" : "AH",
+ CHIP_REV_IS_A0(edev) ? 0 : 1);
+   snprintf(ver_str, QEDE_PMD_DRV_VER_STR_SIZE, "%d.%d.%d.%d",
+info->fw_major, info->fw_minor, info->fw_rev, info->fw_eng);
+   snprintf(drv_ver, QEDE_PMD_DRV_VER_STR_SIZE, "%s_%s",
+ver_str, QEDE_PMD_VERSION);
+   DP_INFO(edev, " Driver version : %s\n", drv_ver);
DP_INFO(edev, " Firmware version : %s\n", ver_str);

-   sprintf(ver_str, "%d.%d.%d.%d",
+   snprintf(ver_str, MCP_DRV_VER_STR_SIZE,
+"%d.%d.%d.%d",
(info->mfw_rev >> 24) & 0xff,
(info->mfw_rev >> 16) & 0xff,
(info->mfw_rev >> 8) & 0xff, (info->mfw_rev) & 0xff);
-   DP_INFO(edev, " Management firmware version : %s\n", ver_str);
-
+   DP_INFO(edev, " Management Firmware version : %s\n", ver_str);
DP_INFO(edev, " Firmware file : %s\n", fw_file);
-
DP_INFO(edev, "*\n");
 }

@@ -1359,11 +1357,12 @@ static int qede_common_dev_init(struct rte_eth_dev 
*eth_dev, bool is_vf)
/* Start the Slowpath-process */
memset(, 0, sizeof(struct qed_slowpath_params));
params.int_mode = ECORE_INT_MODE_MSIX;
-   params.drv_major = QEDE_MAJOR_VERSION;
-   params.drv_minor = QEDE_MINOR_VERSION;
-   params.drv_rev = QEDE_REVISION_VERSION;
-   params.drv_eng = QEDE_ENGINEERING_VERSION;
-   strncpy((char *)params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
+   params.drv_major = QEDE_PMD_VERSION_MAJOR;
+   params.drv_minor = QEDE_PMD_VERSION_MINOR;
+   params.drv_rev = QEDE_PMD_VERSION_REVISION;
+   params.drv_eng = QEDE_PMD_VERSION_PATCH;
+   strncpy((char *)params.name, QEDE_PMD_VER_PREFIX,
+   QEDE_PMD_DRV_VER_STR_SIZE);

/* For CMT mode device do periodic polling for slowpath events.
 * This is required since uio device uses only one MSI-x
@@ -1400,7 +1399,7 @@ static int qede_common_dev_init(struct rte_eth_dev 
*eth_dev, bool is_vf)

qede_alloc_etherdev(adapter, _info);

-   adapter->ops->common->set_id(edev, edev->name, QEDE_DRV_MODULE_VERSION);
+   adapter->ops->common->set_id(edev, edev->name, QEDE_PMD_VERSION);

if (!is_vf)
adapter->dev_info.num_mac_addrs =
diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index 5838f33..c3b87e8 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -46,15 +46,14 @@
 #define QEDE_PMD_VERSION_REVISION   0
 #define QEDE_PMD_VERSION_PATCH 1

-#define QEDE_MAJOR_VERSION 8
-#define QEDE_MINOR_VERSION 7
-#define QEDE_REVISION_VERSION  9
-#define QEDE_ENGINEERING_VERSION   0
+#define QEDE_PMD_VERSION qede_stringify(QEDE_PMD_VERSION_MAJOR) "." \
+qede_stringify(QEDE_PMD_VERSION_MINOR) "." \
+qede_stringify(QEDE_PMD_VERSION_REVISION) "."  \
+qede_stringify(QEDE_PMD_VERSION_PATCH)
+
+#define QEDE_PMD_DRV_VER_STR_SIZE NAME_SIZE
+#define QEDE_PMD_VER_PREFIX "QEDE PMD"

[dpdk-dev] [PATCH v3 26/32] qede: skip slowpath polling for 100G VF device

[Rasesh Mody]

From: Harish Patil 

There is no need to poll for slowpath events for VF
device since the ramrod responses are received over
PF-VF backchannel synchronously. So the fix is to
restrict the slowpath polling for PF device only.

Fixes 2af14ca ("net/qede: support 100G")

Signed-off-by: Harish Patil 
---
 drivers/net/qede/qede_ethdev.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index eb9b8aa..ae188ed 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -1369,7 +1369,7 @@ static int qede_common_dev_init(struct rte_eth_dev 
*eth_dev, bool is_vf)
 * This is required since uio device uses only one MSI-x
 * interrupt vector but we need one for each engine.
 */
-   if (edev->num_hwfns > 1) {
+   if (edev->num_hwfns > 1 && IS_PF(edev)) {
rc = rte_eal_alarm_set(timer_period * US_PER_S,
   qede_poll_sp_sb_cb,
   (void *)eth_dev);
-- 
1.8.3.1

[dpdk-dev] [PATCH v3 25/32] qede/base: add support to initiate PF FLR

[Rasesh Mody]

From: Harish Patil 

Add support to send PF FLR request to the management firmware to
bringup the device in clean slate. This cleanup is necessary
in some corner cases where the device would be left in a bad
state from its previous operations. The driver will send PF FLR
request before slowpath initialization.

Signed-off-by: Harish Patil 
---
 doc/guides/nics/qede.rst  |  1 -
 drivers/net/qede/base/ecore_dev.c | 15 +++
 drivers/net/qede/base/ecore_mcp.c |  9 +
 drivers/net/qede/base/ecore_mcp.h | 11 +++
 4 files changed, 31 insertions(+), 5 deletions(-)

diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index 2a585e7..50e6f87 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -65,7 +65,6 @@ Non-supported Features

 - SR-IOV PF
 - Tunneling offloads
-- Reload of the PMD after a non-graceful termination

 Supported QLogic Adapters
 -
diff --git a/drivers/net/qede/base/ecore_dev.c 
b/drivers/net/qede/base/ecore_dev.c
index b530173..6060f9e 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -2952,13 +2952,14 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void 
OSAL_IOMEM *p_regview,
void OSAL_IOMEM *p_doorbells,
struct ecore_hw_prepare_params *p_params)
 {
+   struct ecore_dev *p_dev = p_hwfn->p_dev;
enum _ecore_status_t rc = ECORE_SUCCESS;

/* Split PCI bars evenly between hwfns */
p_hwfn->regview = p_regview;
p_hwfn->doorbells = p_doorbells;

-   if (IS_VF(p_hwfn->p_dev))
+   if (IS_VF(p_dev))
return ecore_vf_hw_prepare(p_hwfn);

/* Validate that chip access is feasible */
@@ -2982,7 +2983,7 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void 
OSAL_IOMEM *p_regview,

/* First hwfn learns basic information, e.g., number of hwfns */
if (!p_hwfn->my_id) {
-   rc = ecore_get_dev_info(p_hwfn->p_dev);
+   rc = ecore_get_dev_info(p_dev);
if (rc != ECORE_SUCCESS)
goto err1;
}
@@ -2996,6 +2997,12 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void 
OSAL_IOMEM *p_regview,
goto err1;
}

+   if (p_hwfn == ECORE_LEADING_HWFN(p_dev) && !p_dev->recov_in_prog) {
+   rc = ecore_mcp_initiate_pf_flr(p_hwfn, p_hwfn->p_main_ptt);
+   if (rc != ECORE_SUCCESS)
+   DP_NOTICE(p_hwfn, false, "Failed to initiate PF FLR\n");
+   }
+
/* Read the device configuration information from the HW and SHMEM */
rc = ecore_get_hw_info(p_hwfn, p_hwfn->p_main_ptt,
   p_params->personality, p_params->drv_resc_alloc);
@@ -3011,7 +3018,7 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void 
OSAL_IOMEM *p_regview,
goto err2;
}
 #ifndef ASIC_ONLY
-   if (CHIP_REV_IS_FPGA(p_hwfn->p_dev)) {
+   if (CHIP_REV_IS_FPGA(p_dev)) {
DP_NOTICE(p_hwfn, false,
  "FPGA: workaround; Prevent DMAE parities\n");
ecore_wr(p_hwfn, p_hwfn->p_main_ptt, PCIE_REG_PRTY_MASK, 7);
@@ -3026,7 +3033,7 @@ ecore_hw_prepare_single(struct ecore_hwfn *p_hwfn, void 
OSAL_IOMEM *p_regview,
return rc;
  err2:
if (IS_LEAD_HWFN(p_hwfn))
-   ecore_iov_free_hw_info(p_hwfn->p_dev);
+   ecore_iov_free_hw_info(p_dev);
ecore_mcp_free(p_hwfn);
  err1:
ecore_hw_hwfn_free(p_hwfn);
diff --git a/drivers/net/qede/base/ecore_mcp.c 
b/drivers/net/qede/base/ecore_mcp.c
index 500368e..2ff9715 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -2442,3 +2442,12 @@ enum _ecore_status_t ecore_mcp_get_resc_info(struct 
ecore_hwfn *p_hwfn,

return ECORE_SUCCESS;
 }
+
+enum _ecore_status_t ecore_mcp_initiate_pf_flr(struct ecore_hwfn *p_hwfn,
+  struct ecore_ptt *p_ptt)
+{
+   u32 mcp_resp, mcp_param;
+
+   return ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_INITIATE_PF_FLR,
+0, _resp, _param);
+}
diff --git a/drivers/net/qede/base/ecore_mcp.h 
b/drivers/net/qede/base/ecore_mcp.h
index d3103ff..831890c 100644
--- a/drivers/net/qede/base/ecore_mcp.h
+++ b/drivers/net/qede/base/ecore_mcp.h
@@ -353,4 +353,15 @@ enum _ecore_status_t ecore_mcp_get_resc_info(struct 
ecore_hwfn *p_hwfn,
 struct resource_info *p_resc_info,
 u32 *p_mcp_resp, u32 *p_mcp_param);

+/**
+ * @brief - Initiates PF FLR
+ *
+ * @param p_hwfn
+ * @param p_ptt
+ *
+ * @param return ECORE_SUCCESS upon success.
+ */
+enum _ecore_status_t ecore_mcp_initiate_pf_flr(struct ecore_hwfn *p_hwfn,
+  struct ecore_ptt *p_ptt);
+
 #endif /* __ECORE_MCP_H__ */
-- 

[dpdk-dev] [PATCH v3 24/32] qede/base: change rx tx queue start APIs

[Rasesh Mody]

Changed q_{rx,tx}_start APIs to use common queue start parameters

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_l2.c | 131 +++
 drivers/net/qede/base/ecore_l2.h |  26 ++-
 drivers/net/qede/base/ecore_l2_api.h |  69 +-
 drivers/net/qede/base/ecore_sriov.c  |  28 +---
 drivers/net/qede/qede_eth_if.c   |  47 ++---
 drivers/net/qede/qede_eth_if.h   |  11 ++-
 drivers/net/qede/qede_rxtx.c |  27 +---
 7 files changed, 155 insertions(+), 184 deletions(-)

diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index 83a62e0..74f61b0 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -548,12 +548,7 @@ enum _ecore_status_t
 ecore_sp_eth_rxq_start_ramrod(struct ecore_hwfn *p_hwfn,
  u16 opaque_fid,
  u32 cid,
- u16 rx_queue_id,
- u8 vf_rx_queue_id,
- u8 vport_id,
- u8 stats_id,
- u16 sb,
- u8 sb_index,
+ struct ecore_queue_start_common_params *p_params,
  u16 bd_max_bytes,
  dma_addr_t bd_chain_phys_addr,
  dma_addr_t cqe_pbl_addr,
@@ -568,22 +563,23 @@ ecore_sp_eth_rxq_start_ramrod(struct ecore_hwfn *p_hwfn,
enum _ecore_status_t rc = ECORE_NOTIMPL;

/* Store information for the stop */
-   p_rx_cid = _hwfn->p_rx_cids[rx_queue_id];
+   p_rx_cid = _hwfn->p_rx_cids[p_params->queue_id];
p_rx_cid->cid = cid;
p_rx_cid->opaque_fid = opaque_fid;
-   p_rx_cid->vport_id = vport_id;
+   p_rx_cid->vport_id = p_params->vport_id;

-   rc = ecore_fw_vport(p_hwfn, vport_id, _vport_id);
+   rc = ecore_fw_vport(p_hwfn, p_params->vport_id, _vport_id);
if (rc != ECORE_SUCCESS)
return rc;

-   rc = ecore_fw_l2_queue(p_hwfn, rx_queue_id, _rx_q_id);
+   rc = ecore_fw_l2_queue(p_hwfn, p_params->queue_id, _rx_q_id);
if (rc != ECORE_SUCCESS)
return rc;

DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
   "opaque_fid=0x%x, cid=0x%x, rx_qid=0x%x, vport_id=0x%x, 
sb_id=0x%x\n",
-  opaque_fid, cid, rx_queue_id, vport_id, sb);
+  opaque_fid, cid, p_params->queue_id,
+  p_params->vport_id, p_params->sb);

/* Get SPQ entry */
OSAL_MEMSET(_data, 0, sizeof(init_data));
@@ -599,10 +595,10 @@ ecore_sp_eth_rxq_start_ramrod(struct ecore_hwfn *p_hwfn,

p_ramrod = _ent->ramrod.rx_queue_start;

-   p_ramrod->sb_id = OSAL_CPU_TO_LE16(sb);
-   p_ramrod->sb_index = sb_index;
+   p_ramrod->sb_id = OSAL_CPU_TO_LE16(p_params->sb);
+   p_ramrod->sb_index = (u8)p_params->sb_idx;
p_ramrod->vport_id = abs_vport_id;
-   p_ramrod->stats_counter_id = stats_id;
+   p_ramrod->stats_counter_id = p_params->stats_id;
p_ramrod->rx_queue_id = OSAL_CPU_TO_LE16(abs_rx_q_id);
p_ramrod->complete_cqe_flg = 0;
p_ramrod->complete_event_flg = 1;
@@ -613,30 +609,27 @@ ecore_sp_eth_rxq_start_ramrod(struct ecore_hwfn *p_hwfn,
p_ramrod->num_of_pbl_pages = OSAL_CPU_TO_LE16(cqe_pbl_size);
DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, cqe_pbl_addr);

-   if (vf_rx_queue_id || b_use_zone_a_prod) {
-   p_ramrod->vf_rx_prod_index = vf_rx_queue_id;
+   if (p_params->vf_qid || b_use_zone_a_prod) {
+   p_ramrod->vf_rx_prod_index = (u8)p_params->vf_qid;
DP_VERBOSE(p_hwfn, ECORE_MSG_SP,
   "Queue%s is meant for VF rxq[%02x]\n",
   b_use_zone_a_prod ? " [legacy]" : "",
-  vf_rx_queue_id);
+  p_params->vf_qid);
p_ramrod->vf_rx_prod_use_zone_a = b_use_zone_a_prod;
}

return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 }

-enum _ecore_status_t ecore_sp_eth_rx_queue_start(struct ecore_hwfn *p_hwfn,
-u16 opaque_fid,
-u8 rx_queue_id,
-u8 vport_id,
-u8 stats_id,
-u16 sb,
-u8 sb_index,
-u16 bd_max_bytes,
-dma_addr_t bd_chain_phys_addr,
-dma_addr_t cqe_pbl_addr,
-u16 cqe_pbl_size,
-void OSAL_IOMEM **pp_prod)
+enum _ecore_status_t
+ecore_sp_eth_rx_queue_start(struct 

[dpdk-dev] [PATCH v3 23/32] qede: add scatter gather support

[Rasesh Mody]

From: Sony Chacko 

Add scatter gather support to enable transmit and receive of larger
packets.

Signed-off-by: Sony Chacko 
---
 doc/guides/nics/features/qede.ini|   1 +
 doc/guides/nics/features/qede_vf.ini |   1 +
 doc/guides/nics/qede.rst |   4 +-
 drivers/net/qede/qede_ethdev.c   |  19 ++--
 drivers/net/qede/qede_rxtx.c | 204 ---
 drivers/net/qede/qede_rxtx.h |   3 -
 6 files changed, 177 insertions(+), 55 deletions(-)

diff --git a/doc/guides/nics/features/qede.ini 
b/doc/guides/nics/features/qede.ini
index 1d28a23..7d75030 100644
--- a/doc/guides/nics/features/qede.ini
+++ b/doc/guides/nics/features/qede.ini
@@ -9,6 +9,7 @@ Link status  = Y
 Link status event= Y
 MTU update   = Y
 Jumbo frame  = Y
+Scattered Rx = Y
 Promiscuous mode = Y
 Allmulticast mode= Y
 Unicast MAC filter   = Y
diff --git a/doc/guides/nics/features/qede_vf.ini 
b/doc/guides/nics/features/qede_vf.ini
index b4eba0c..acb1b99 100644
--- a/doc/guides/nics/features/qede_vf.ini
+++ b/doc/guides/nics/features/qede_vf.ini
@@ -9,6 +9,7 @@ Link status  = Y
 Link status event= Y
 MTU update   = Y
 Jumbo frame  = Y
+Scattered Rx = Y
 Promiscuous mode = Y
 Allmulticast mode= Y
 Unicast MAC filter   = Y
diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index 5e31c11..2a585e7 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -47,7 +47,7 @@ Supported Features
 - Promiscuous mode
 - Allmulti mode
 - Port hardware statistics
-- Jumbo frames (using single buffer)
+- Jumbo frames
 - VLAN offload - Filtering and stripping
 - Stateless checksum offloads (IPv4/TCP/UDP)
 - Multiple Rx/Tx queues
@@ -58,11 +58,11 @@ Supported Features
 - SR-IOV VF
 - MTU change
 - Multiprocess aware
+- Scatter-Gather

 Non-supported Features
 --

-- Scatter-Gather Rx/Tx frames
 - SR-IOV PF
 - Tunneling offloads
 - Reload of the PMD after a non-graceful termination
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index c4e82d0..eb9b8aa 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -434,14 +434,14 @@ static int qede_vlan_filter_set(struct rte_eth_dev 
*eth_dev,
struct qede_vlan_entry *vlan;
int rc;

-   if (qdev->configured_vlans == dev_info->num_vlan_filters) {
-   DP_NOTICE(edev, false, "Reached max VLAN filter limit"
-" enabling accept_any_vlan\n");
-   qede_config_accept_any_vlan(qdev, true);
-   return 0;
-   }
-
if (on) {
+   if (qdev->configured_vlans == dev_info->num_vlan_filters) {
+   DP_INFO(edev, "Reached max VLAN filter limit"
+ " enabling accept_any_vlan\n");
+   qede_config_accept_any_vlan(qdev, true);
+   return 0;
+   }
+
SLIST_FOREACH(tmp, >vlan_list_head, list) {
if (tmp->vid == vlan_id) {
DP_ERR(edev, "VLAN %u already configured\n",
@@ -559,11 +559,6 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
}

/* Sanity checks and throw warnings */
-   if (rxmode->enable_scatter == 1) {
-   DP_ERR(edev, "RX scatter packets is not supported\n");
-   return -EINVAL;
-   }
-
if (rxmode->enable_lro == 1) {
DP_INFO(edev, "LRO is not supported\n");
return -EINVAL;
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index ab16c04..fce6f4f 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -804,6 +804,58 @@ static inline uint32_t qede_rx_cqe_to_pkt_type(uint16_t 
flags)
return RTE_PTYPE_L2_ETHER | p_type;
 }

+int qede_process_sg_pkts(void *p_rxq,  struct rte_mbuf *rx_mb,
+int num_frags, uint16_t pkt_len)
+{
+   struct qede_rx_queue *rxq = p_rxq;
+   struct qede_dev *qdev = rxq->qdev;
+   struct ecore_dev *edev = >edev;
+   uint16_t sw_rx_index, cur_size;
+
+   register struct rte_mbuf *seg1 = NULL;
+   register struct rte_mbuf *seg2 = NULL;
+
+   seg1 = rx_mb;
+   while (num_frags) {
+   cur_size = pkt_len > rxq->rx_buf_size ?
+   rxq->rx_buf_size : pkt_len;
+   if (!cur_size) {
+   PMD_RX_LOG(DEBUG, rxq,
+  "SG packet, len and num BD mismatch\n");
+   qede_recycle_rx_bd_ring(rxq, qdev, num_frags);
+   return -EINVAL;
+   }
+
+   if (qede_alloc_rx_buffer(rxq)) {
+   uint8_t index;
+
+   PMD_RX_LOG(DEBUG, rxq, "Buffer allocation failed\n");
+   

[dpdk-dev] [PATCH v3 22/32] qede: fix RSS related issues

[Rasesh Mody]

From: Harish Patil 

This patch contains few RSS related changes as follows:

o Fix inadvarent initializing of rss_params outside of the
  if block in qed_update_vport() which could cause FW exception.

o Fix disabling of RSS when hash function is 0.

o Rename qede_config_rss() to qede_check_vport_rss_enable()
  for better clarity.

o Avoid code duplication using a helper function
  qede_init_rss_caps().

Fixes: 4c98f27 ("qede: support RSS hash configuration")
Fixes: 2ea6f76 ("qede: add core driver")

Signed-off-by: Harish Patil 
---
 doc/guides/nics/qede.rst   |  2 +-
 drivers/net/qede/qede_eth_if.c |  2 +-
 drivers/net/qede/qede_ethdev.c | 77 +---
 drivers/net/qede/qede_ethdev.h | 23 ++-
 drivers/net/qede/qede_rxtx.c   | 88 +-
 5 files changed, 97 insertions(+), 95 deletions(-)

diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index 5b921cc..5e31c11 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -51,7 +51,7 @@ Supported Features
 - VLAN offload - Filtering and stripping
 - Stateless checksum offloads (IPv4/TCP/UDP)
 - Multiple Rx/Tx queues
-- RSS (with user configurable table/key)
+- RSS (with RETA/hash table/key)
 - TSS
 - Multiple MAC address
 - Default pause flow control
diff --git a/drivers/net/qede/qede_eth_if.c b/drivers/net/qede/qede_eth_if.c
index bf41390..a19b22e 100644
--- a/drivers/net/qede/qede_eth_if.c
+++ b/drivers/net/qede/qede_eth_if.c
@@ -143,8 +143,8 @@ qed_update_vport(struct ecore_dev *edev, struct 
qed_update_vport_params *params)
   ECORE_RSS_IND_TABLE_SIZE * sizeof(uint16_t));
rte_memcpy(sp_rss_params.rss_key, params->rss_params.rss_key,
   ECORE_RSS_KEY_SIZE * sizeof(uint32_t));
+   sp_params.rss_params = _rss_params;
}
-   sp_params.rss_params = _rss_params;

for_each_hwfn(edev, i) {
struct ecore_hwfn *p_hwfn = >hwfns[i];
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index a376f88..c4e82d0 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -537,7 +537,7 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
struct qede_dev *qdev = eth_dev->data->dev_private;
struct ecore_dev *edev = >edev;
struct rte_eth_rxmode *rxmode = _dev->data->dev_conf.rxmode;
-   int rc;
+   int rc, i, j;

PMD_INIT_FUNC_TRACE(edev);

@@ -558,10 +558,6 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
}
}

-   qdev->fp_num_tx = eth_dev->data->nb_tx_queues;
-   qdev->fp_num_rx = eth_dev->data->nb_rx_queues;
-   qdev->num_queues = qdev->fp_num_tx + qdev->fp_num_rx;
-
/* Sanity checks and throw warnings */
if (rxmode->enable_scatter == 1) {
DP_ERR(edev, "RX scatter packets is not supported\n");
@@ -580,8 +576,6 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
DP_INFO(edev, "IP/UDP/TCP checksum offload is always enabled "
  "in hw\n");

-   SLIST_INIT(>vlan_list_head);
-
/* Check for the port restart case */
if (qdev->state != QEDE_DEV_INIT) {
rc = qdev->ops->vport_stop(edev, 0);
@@ -590,6 +584,10 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
qede_dealloc_fp_resc(eth_dev);
}

+   qdev->fp_num_tx = eth_dev->data->nb_tx_queues;
+   qdev->fp_num_rx = eth_dev->data->nb_rx_queues;
+   qdev->num_queues = qdev->fp_num_tx + qdev->fp_num_rx;
+
/* Fastpath status block should be initialized before sending
 * VPORT-START in the case of VF. Anyway, do it for both VF/PF.
 */
@@ -604,6 +602,8 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
if (rc != 0)
return rc;

+   SLIST_INIT(>vlan_list_head);
+
/* Add primary mac for PF */
if (IS_PF(edev))
qede_mac_addr_set(eth_dev, >primary_mac);
@@ -615,6 +615,10 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)

qdev->state = QEDE_DEV_CONFIG;

+   DP_INFO(edev, "Allocated RSS=%d TSS=%d (with CoS=%d)\n",
+   (int)QEDE_RSS_COUNT(qdev), (int)QEDE_TSS_COUNT(qdev),
+   qdev->num_tc);
+
return 0;
 }

@@ -1037,42 +1041,51 @@ qede_dev_supported_ptypes_get(struct rte_eth_dev 
*eth_dev)
return NULL;
 }

-int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
-struct rte_eth_rss_conf *rss_conf)
+void qede_init_rss_caps(uint8_t *rss_caps, uint64_t hf)
+{
+   *rss_caps = 0;
+   *rss_caps |= (hf & ETH_RSS_IPV4)  ? ECORE_RSS_IPV4 : 0;
+   *rss_caps |= (hf & ETH_RSS_IPV6)  ? ECORE_RSS_IPV6 : 0;
+   *rss_caps |= (hf & ETH_RSS_IPV6_EX)   ? ECORE_RSS_IPV6 : 0;
+   *rss_caps |= (hf & 

[dpdk-dev] [PATCH v3 21/32] qede: add enable/disable VLAN filtering

[Rasesh Mody]

From: Harish Patil 

The device doesn't explicitly support enable/disable
of VLAN filtering. However, VLAN filtering takes effect
when a matching VLAN is configured. So in order to
support enable/disable of VLAN filtering, VLAN 0 is
added/removed respectively. A check is added to ensure that
the user removes all the configured VLANs before disabling
VLAN filtering.

Also VLAN offloads shall be enabled by default and
vlan_tci_outer is to set to 0 for Q-in-Q packets.

Fixes: 2ea6f76 ("qede: add core driver")

Signed-off-by: Harish Patil 
---
 drivers/net/qede/qede_ethdev.c | 35 ---
 drivers/net/qede/qede_ethdev.h |  4 
 drivers/net/qede/qede_rxtx.c   |  1 +
 3 files changed, 37 insertions(+), 3 deletions(-)

diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index c72d02f..a376f88 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -372,16 +372,40 @@ static void qede_vlan_offload_set(struct rte_eth_dev 
*eth_dev, int mask)
 {
struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
+   struct rte_eth_rxmode *rxmode = _dev->data->dev_conf.rxmode;

if (mask & ETH_VLAN_STRIP_MASK) {
-   if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
+   if (rxmode->hw_vlan_strip)
(void)qede_vlan_stripping(eth_dev, 1);
else
(void)qede_vlan_stripping(eth_dev, 0);
}

-   DP_INFO(edev, "vlan offload mask %d vlan-strip %d\n",
-   mask, eth_dev->data->dev_conf.rxmode.hw_vlan_strip);
+   if (mask & ETH_VLAN_FILTER_MASK) {
+   /* VLAN filtering kicks in when a VLAN is added */
+   if (rxmode->hw_vlan_filter) {
+   qede_vlan_filter_set(eth_dev, 0, 1);
+   } else {
+   if (qdev->configured_vlans > 1) { /* Excluding VLAN0 */
+   DP_NOTICE(edev, false,
+ " Please remove existing VLAN filters"
+ " before disabling VLAN filtering\n");
+   /* Signal app that VLAN filtering is still
+* enabled
+*/
+   rxmode->hw_vlan_filter = true;
+   } else {
+   qede_vlan_filter_set(eth_dev, 0, 0);
+   }
+   }
+   }
+
+   if (mask & ETH_VLAN_EXTEND_MASK)
+   DP_INFO(edev, "No offloads are supported with VLAN Q-in-Q"
+   " and classification is based on outer tag only\n");
+
+   DP_INFO(edev, "vlan offload mask %d vlan-strip %d vlan-filter %d\n",
+   mask, rxmode->hw_vlan_strip, rxmode->hw_vlan_filter);
 }

 static int qede_set_ucast_rx_vlan(struct qede_dev *qdev,
@@ -584,6 +608,11 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
if (IS_PF(edev))
qede_mac_addr_set(eth_dev, >primary_mac);

+   /* Enable VLAN offloads by default */
+   qede_vlan_offload_set(eth_dev, ETH_VLAN_STRIP_MASK  |
+  ETH_VLAN_FILTER_MASK |
+  ETH_VLAN_EXTEND_MASK);
+
qdev->state = QEDE_DEV_CONFIG;

return 0;
diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index ed2d41c..526d3be 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -152,6 +152,10 @@ struct qede_dev {
char drv_ver[QED_DRV_VER_STR_SIZE];
 };

+/* Static functions */
+static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
+   uint16_t vlan_id, int on);
+
 int qed_fill_eth_dev_info(struct ecore_dev *edev,
 struct qed_dev_eth_info *info);
 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up);
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index 6973d1c..9df0d133 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -945,6 +945,7 @@ qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, 
uint16_t nb_pkts)
 */
rx_mb->vlan_tci = rte_le_to_cpu_16(fp_cqe->vlan_tag);
rx_mb->ol_flags |= PKT_RX_QINQ_PKT;
+   rx_mb->vlan_tci_outer = 0;
}

rx_pkts[rx_pkt] = rx_mb;
-- 
1.8.3.1

[dpdk-dev] [PATCH v3 20/32] qede: fixes for VLAN filters

[Rasesh Mody]

From: Harish Patil 

fix to prevent duplicate VLAN filters:

librte_ether does not keep track of VLAN filters
configured, so it becomes driver's responsibility to
keep track of it and prevent duplicate filter
programming. The fix is to use a singly linked
list for tracking the entries and there by prevent
duplicates.

fix num vlan filters:

Fix num vlan filter when filling ethernet device infoformation.

Fixes: 2ea6f76 ("qede: add core driver")

Signed-off-by: Harish Patil 
---
 drivers/net/qede/qede_eth_if.h |  2 +-
 drivers/net/qede/qede_ethdev.c | 67 ++
 drivers/net/qede/qede_ethdev.h | 15 +-
 drivers/net/qede/qede_main.c   | 10 +--
 4 files changed, 71 insertions(+), 23 deletions(-)

diff --git a/drivers/net/qede/qede_eth_if.h b/drivers/net/qede/qede_eth_if.h
index 7840a37..5a7fdc9 100644
--- a/drivers/net/qede/qede_eth_if.h
+++ b/drivers/net/qede/qede_eth_if.h
@@ -46,7 +46,7 @@ struct qed_dev_eth_info {
uint8_t num_tc;

struct ether_addr port_mac;
-   uint8_t num_vlan_filters;
+   uint16_t num_vlan_filters;
uint32_t num_mac_addrs;
 };

diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index ebfc83e..c72d02f 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -406,10 +406,11 @@ static int qede_vlan_filter_set(struct rte_eth_dev 
*eth_dev,
struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
struct qed_dev_eth_info *dev_info = >dev_info;
+   struct qede_vlan_entry *tmp = NULL;
+   struct qede_vlan_entry *vlan;
int rc;

-   if (vlan_id != 0 &&
-   qdev->configured_vlans == dev_info->num_vlan_filters) {
+   if (qdev->configured_vlans == dev_info->num_vlan_filters) {
DP_NOTICE(edev, false, "Reached max VLAN filter limit"
 " enabling accept_any_vlan\n");
qede_config_accept_any_vlan(qdev, true);
@@ -417,28 +418,66 @@ static int qede_vlan_filter_set(struct rte_eth_dev 
*eth_dev,
}

if (on) {
+   SLIST_FOREACH(tmp, >vlan_list_head, list) {
+   if (tmp->vid == vlan_id) {
+   DP_ERR(edev, "VLAN %u already configured\n",
+  vlan_id);
+   return -EEXIST;
+   }
+   }
+
+   vlan = rte_malloc(NULL, sizeof(struct qede_vlan_entry),
+ RTE_CACHE_LINE_SIZE);
+
+   if (!vlan) {
+   DP_ERR(edev, "Did not allocate memory for VLAN\n");
+   return -ENOMEM;
+   }
+
rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_ADD,
vlan_id);
-   if (rc)
+   if (rc) {
DP_ERR(edev, "Failed to add VLAN %u rc %d\n", vlan_id,
   rc);
-   else
-   if (vlan_id != 0)
-   qdev->configured_vlans++;
+   rte_free(vlan);
+   } else {
+   vlan->vid = vlan_id;
+   SLIST_INSERT_HEAD(>vlan_list_head, vlan, list);
+   qdev->configured_vlans++;
+   DP_INFO(edev, "VLAN %u added, configured_vlans %u\n",
+   vlan_id, qdev->configured_vlans);
+   }
} else {
+   SLIST_FOREACH(tmp, >vlan_list_head, list) {
+   if (tmp->vid == vlan_id)
+   break;
+   }
+
+   if (!tmp) {
+   if (qdev->configured_vlans == 0) {
+   DP_INFO(edev,
+   "No VLAN filters configured yet\n");
+   return 0;
+   }
+
+   DP_ERR(edev, "VLAN %u not configured\n", vlan_id);
+   return -EINVAL;
+   }
+
+   SLIST_REMOVE(>vlan_list_head, tmp, qede_vlan_entry, list);
+
rc = qede_set_ucast_rx_vlan(qdev, QED_FILTER_XCAST_TYPE_DEL,
vlan_id);
-   if (rc)
+   if (rc) {
DP_ERR(edev, "Failed to delete VLAN %u rc %d\n",
   vlan_id, rc);
-   else
-   if (vlan_id != 0)
-   qdev->configured_vlans--;
+   } else {
+   qdev->configured_vlans--;
+   DP_INFO(edev, "VLAN %u removed configured_vlans %u\n",
+   vlan_id, qdev->configured_vlans);
+   }
}

-   DP_INFO(edev, "vlan_id %u on %u rc 

[dpdk-dev] [PATCH v3 19/32] qede: remove unused/dead code

[Rasesh Mody]

From: Harish Patil 

Fixes: 2ea6f76 ("qede: add core driver")

Signed-off-by: Harish Patil 
Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_iov_api.h | 312 --
 drivers/net/qede/qede_eth_if.c|  10 --
 drivers/net/qede/qede_ethdev.c|   3 -
 drivers/net/qede/qede_ethdev.h|  12 --
 drivers/net/qede/qede_if.h|   9 -
 5 files changed, 346 deletions(-)

diff --git a/drivers/net/qede/base/ecore_iov_api.h 
b/drivers/net/qede/base/ecore_iov_api.h
index 14f3f47..bb8df82 100644
--- a/drivers/net/qede/base/ecore_iov_api.h
+++ b/drivers/net/qede/base/ecore_iov_api.h
@@ -680,318 +680,6 @@ int ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn, 
int vfid);
  */
 enum _ecore_status_t ecore_iov_configure_min_tx_rate(struct ecore_dev *p_dev,
 int vfid, u32 rate);
-#else
-static OSAL_INLINE void ecore_iov_set_vfs_to_disable(struct ecore_hwfn *p_hwfn,
-u8 to_disable)
-{
-}
-
-static OSAL_INLINE void ecore_iov_set_vf_to_disable(struct ecore_hwfn *p_hwfn,
-   u16 rel_vf_id,
-   u8 to_disable)
-{
-}
-
-static OSAL_INLINE enum _ecore_status_t ecore_iov_init_hw_for_vf(struct
-ecore_hwfn
-* p_hwfn,
-struct
-ecore_ptt
-* p_ptt,
-u16 rel_vf_id,
-u16
-num_rx_queues)
-{
-   return ECORE_INVAL;
-}
-
-static OSAL_INLINE void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,
- struct ecore_ptt *p_ptt,
- int vfid)
-{
-}
-
-static OSAL_INLINE enum _ecore_status_t ecore_iov_release_hw_for_vf(struct
-   ecore_hwfn
-   * p_hwfn,
-   struct
-   ecore_ptt
-   * p_ptt,
-   u16
-   rel_vf_id)
-{
-   return ECORE_SUCCESS;
-}
-
-#ifndef LINUX_REMOVE
-static OSAL_INLINE enum _ecore_status_t ecore_iov_set_vf_ctx(struct ecore_hwfn
-*p_hwfn, u16 vf_id,
-void *ctx)
-{
-   return ECORE_INVAL;
-}
-#endif
-static OSAL_INLINE enum _ecore_status_t ecore_iov_vf_flr_cleanup(struct
-ecore_hwfn
-* p_hwfn,
-struct
-ecore_ptt
-* p_ptt)
-{
-   return ECORE_INVAL;
-}
-
-static OSAL_INLINE enum _ecore_status_t ecore_iov_single_vf_flr_cleanup(
-   struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u16 rel_vf_id)
-{
-   return ECORE_INVAL;
-}
-
-static OSAL_INLINE void ecore_iov_set_link(struct ecore_hwfn *p_hwfn, u16 vfid,
-  struct ecore_mcp_link_params *params,
-  struct ecore_mcp_link_state *link,
-  struct ecore_mcp_link_capabilities
-  *p_caps)
-{
-}
-
-static OSAL_INLINE void ecore_iov_get_link(struct ecore_hwfn *p_hwfn, u16 vfid,
-  struct ecore_mcp_link_params *params,
-  struct ecore_mcp_link_state *link,
-  struct ecore_mcp_link_capabilities
-  *p_caps)
-{
-}
-
-static OSAL_INLINE bool ecore_iov_is_vf_pending_flr(struct ecore_hwfn *p_hwfn,
-   u16 rel_vf_id)
-{
-   return false;
-}
-
-static OSAL_INLINE bool ecore_iov_is_valid_vfid(struct ecore_hwfn *p_hwfn,
-   int rel_vf_id,
-   bool b_enabled_only)
-{
-   

[dpdk-dev] [PATCH v3 18/32] qede: add missing 100G link speed capability

[Rasesh Mody]

From: Harish Patil 

This patch fixes the missing 100G link speed advertisement
when the 100G support was initially added.

Fixes 2af14ca ("net/qede: support 100G")

Signed-off-by: Harish Patil 
---
 doc/guides/nics/features/qede.ini| 1 +
 doc/guides/nics/features/qede_vf.ini | 1 +
 drivers/net/qede/qede_ethdev.c   | 3 ++-
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/features/qede.ini 
b/doc/guides/nics/features/qede.ini
index 7690773..1d28a23 100644
--- a/doc/guides/nics/features/qede.ini
+++ b/doc/guides/nics/features/qede.ini
@@ -4,6 +4,7 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Speed capabilities   = Y
 Link status  = Y
 Link status event= Y
 MTU update   = Y
diff --git a/doc/guides/nics/features/qede_vf.ini 
b/doc/guides/nics/features/qede_vf.ini
index aeb20d2..b4eba0c 100644
--- a/doc/guides/nics/features/qede_vf.ini
+++ b/doc/guides/nics/features/qede_vf.ini
@@ -4,6 +4,7 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Speed capabilities   = Y
 Link status  = Y
 Link status event= Y
 MTU update   = Y
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index deb1a30..ffce2dd 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -599,7 +599,8 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev,
 DEV_TX_OFFLOAD_UDP_CKSUM |
 DEV_TX_OFFLOAD_TCP_CKSUM);

-   dev_info->speed_capa = ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G;
+   dev_info->speed_capa = ETH_LINK_SPEED_25G | ETH_LINK_SPEED_40G |
+  ETH_LINK_SPEED_100G;
 }

 /* return 0 means link status changed, -1 means not changed */
-- 
1.8.3.1

[dpdk-dev] [PATCH v3 17/32] qede/base: allow MTU change via vport-update

[Rasesh Mody]

From: Harish Patil 

Add support to allow MTU change on a deactivated vport in
the qede/base driver and the core driver shall utilize the same.

Signed-off-by: Harish Patil 
---
 drivers/net/qede/base/ecore_l2.c | 5 +
 drivers/net/qede/base/ecore_l2_api.h | 4 
 drivers/net/qede/qede_eth_if.c   | 1 +
 drivers/net/qede/qede_eth_if.h   | 1 +
 drivers/net/qede/qede_rxtx.c | 2 ++
 5 files changed, 13 insertions(+)

diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index 5a38ad2..83a62e0 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -427,6 +427,11 @@ ecore_sp_vport_update(struct ecore_hwfn *p_hwfn,
ecore_sp_update_accept_mode(p_hwfn, p_ramrod, p_params->accept_flags);
ecore_sp_vport_update_sge_tpa(p_hwfn, p_ramrod,
  p_params->sge_tpa_params);
+   if (p_params->mtu) {
+   p_ramrod->common.update_mtu_flg = 1;
+   p_ramrod->common.mtu = OSAL_CPU_TO_LE16(p_params->mtu);
+   }
+
return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
 }

diff --git a/drivers/net/qede/base/ecore_l2_api.h 
b/drivers/net/qede/base/ecore_l2_api.h
index 09688eb..447d1fb 100644
--- a/drivers/net/qede/base/ecore_l2_api.h
+++ b/drivers/net/qede/base/ecore_l2_api.h
@@ -322,6 +322,10 @@ struct ecore_sp_vport_update_params {
struct ecore_rss_params *rss_params;
struct ecore_filter_accept_flags accept_flags;
struct ecore_sge_tpa_params *sge_tpa_params;
+   /* MTU change - notice this requires the vport to be disabled.
+* If non-zero, value would be used.
+*/
+   u16 mtu;
 };

 /**
diff --git a/drivers/net/qede/qede_eth_if.c b/drivers/net/qede/qede_eth_if.c
index e108af1..9855d0e 100644
--- a/drivers/net/qede/qede_eth_if.c
+++ b/drivers/net/qede/qede_eth_if.c
@@ -92,6 +92,7 @@ qed_update_vport(struct ecore_dev *edev, struct 
qed_update_vport_params *params)
sp_params.accept_any_vlan = params->accept_any_vlan;
sp_params.update_accept_any_vlan_flg =
params->update_accept_any_vlan_flg;
+   sp_params.mtu = params->mtu;

/* RSS - is a bit tricky, since upper-layer isn't familiar with hwfns.
 * We need to re-fix the rss values per engine for CMT.
diff --git a/drivers/net/qede/qede_eth_if.h b/drivers/net/qede/qede_eth_if.h
index 299a2aa..7840a37 100644
--- a/drivers/net/qede/qede_eth_if.h
+++ b/drivers/net/qede/qede_eth_if.h
@@ -75,6 +75,7 @@ struct qed_update_vport_params {
uint8_t accept_any_vlan;
uint8_t update_rss_flg;
struct qed_update_vport_rss_params rss_params;
+   uint16_t mtu;
 };

 struct qed_start_vport_params {
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index e3409a9..6973d1c 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -650,6 +650,8 @@ static int qede_start_queues(struct rte_eth_dev *eth_dev, 
bool clear_stats)

/* Prepare and send the vport enable */
memset(_update_params, 0, sizeof(vport_update_params));
+   /* Update MTU via vport update */
+   vport_update_params.mtu = qdev->mtu;
vport_update_params.vport_id = 0;
vport_update_params.update_vport_active_flg = 1;
vport_update_params.vport_active_flg = 1;
-- 
1.8.3.1

[dpdk-dev] [PATCH v3 16/32] qede: fix port (re)configuration issue

[Rasesh Mody]

From: Harish Patil 

Some applications set port configuration params like promisc mode
before calling dev_start(). This config results in a firmware exception
since this operation internally translates to sending of VPORT-UPDATE
before VPORT-START ramrod which is considered illegal from firmware
standpoint. So the fix is to send VPORT-START ramrod sooner
in dev_configure() rather than deferring it to dev_start().
This requires a bit of reshuffling in the code to move sending of
VPORT-START from qede_start_queues() to qede_dev_configure()
and VPORT-STOP from qede_stop_queues() to qede_dev_stop().

This sequence change also exposes a flaw in the port restart
flows where the fastpath resource allocation routine qede_init_fp()
fuctionalities need to be split, so that appropriate action is taken
based on the current port state. Eg: Do not re-initialize the status
block in a port restart case. This change ensures port start/stop
can be paired.

A new port state QEDE_DEV_CONFIG is added to distinguish between
port started from scratch vs port requiring a reconfig (like MTU).
The function qede_config_rx_mode() is removed since the individual
port config will be replayed anyways on a restart.

Fixes: 2ea6f76 ("qede: add core driver")

Signed-off-by: Harish Patil 
---
 drivers/net/qede/qede_eth_if.c |  14 ++-
 drivers/net/qede/qede_eth_if.h |   2 +
 drivers/net/qede/qede_ethdev.c | 130 ---
 drivers/net/qede/qede_ethdev.h |  12 +--
 drivers/net/qede/qede_rxtx.c   | 232 +
 drivers/net/qede/qede_rxtx.h   |   7 +-
 6 files changed, 208 insertions(+), 189 deletions(-)

diff --git a/drivers/net/qede/qede_eth_if.c b/drivers/net/qede/qede_eth_if.c
index a00f05d..e108af1 100644
--- a/drivers/net/qede/qede_eth_if.c
+++ b/drivers/net/qede/qede_eth_if.c
@@ -40,8 +40,6 @@ qed_start_vport(struct ecore_dev *edev, struct 
qed_start_vport_params *p_params)
return rc;
}

-   ecore_hw_start_fastpath(p_hwfn);
-
DP_VERBOSE(edev, ECORE_MSG_SPQ,
   "Started V-PORT %d with MTU %d\n",
   p_params->vport_id, p_params->mtu);
@@ -295,6 +293,17 @@ static int qed_fastpath_stop(struct ecore_dev *edev)
return 0;
 }

+static void qed_fastpath_start(struct ecore_dev *edev)
+{
+   struct ecore_hwfn *p_hwfn;
+   int i;
+
+   for_each_hwfn(edev, i) {
+   p_hwfn = >hwfns[i];
+   ecore_hw_start_fastpath(p_hwfn);
+   }
+}
+
 static void
 qed_get_vport_stats(struct ecore_dev *edev, struct ecore_eth_stats *stats)
 {
@@ -444,6 +453,7 @@ static const struct qed_eth_ops qed_eth_ops_pass = {
INIT_STRUCT_FIELD(q_tx_stop, _stop_txq),
INIT_STRUCT_FIELD(eth_cqe_completion, _fp_cqe_completion),
INIT_STRUCT_FIELD(fastpath_stop, _fastpath_stop),
+   INIT_STRUCT_FIELD(fastpath_start, _fastpath_start),
INIT_STRUCT_FIELD(get_vport_stats, _get_vport_stats),
INIT_STRUCT_FIELD(filter_config, _configure_filter),
 };
diff --git a/drivers/net/qede/qede_eth_if.h b/drivers/net/qede/qede_eth_if.h
index 26968eb..299a2aa 100644
--- a/drivers/net/qede/qede_eth_if.h
+++ b/drivers/net/qede/qede_eth_if.h
@@ -158,6 +158,8 @@ struct qed_eth_ops {

int (*fastpath_stop)(struct ecore_dev *edev);

+   void (*fastpath_start)(struct ecore_dev *edev);
+
void (*get_vport_stats)(struct ecore_dev *edev,
struct ecore_eth_stats *stats);

diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 93cad91..deb1a30 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -348,52 +348,6 @@ static void qede_config_accept_any_vlan(struct qede_dev 
*qdev, bool action)
}
 }

-void qede_config_rx_mode(struct rte_eth_dev *eth_dev)
-{
-   struct qede_dev *qdev = eth_dev->data->dev_private;
-   struct ecore_dev *edev = >edev;
-   /* TODO: - QED_FILTER_TYPE_UCAST */
-   enum qed_filter_rx_mode_type accept_flags =
-   QED_FILTER_RX_MODE_TYPE_REGULAR;
-   struct qed_filter_params rx_mode;
-   int rc;
-
-   /* Configure the struct for the Rx mode */
-   memset(_mode, 0, sizeof(struct qed_filter_params));
-   rx_mode.type = QED_FILTER_TYPE_RX_MODE;
-
-   rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_REPLACE,
-  eth_dev->data->mac_addrs[0].addr_bytes);
-   if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1) {
-   accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
-   } else {
-   rc = qede_set_ucast_rx_mac(qdev, QED_FILTER_XCAST_TYPE_ADD,
-  eth_dev->data->
-  mac_addrs[0].addr_bytes);
-   if (rc) {
-   DP_ERR(edev, "Unable to add filter\n");
-   return;
-  

[dpdk-dev] [PATCH v3 15/32] qede: enable support for unequal number of RX/TX queues

[Rasesh Mody]

From: Sony Chacko 

Previous release of the qede PMD had a limitation that the
driver expects the number of tx and rx queues to be the same.
This patch fixes this issue by making appropriate changes in
control and data path.

Fixes: 2ea6f76 ("qede: add core driver")

Signed-off-by: Sony Chacko 
---
 doc/guides/nics/qede.rst   |   3 +-
 drivers/net/qede/qede_ethdev.c |  23 +--
 drivers/net/qede/qede_ethdev.h |  16 +-
 drivers/net/qede/qede_rxtx.c   | 376 -
 drivers/net/qede/qede_rxtx.h   |   7 +-
 5 files changed, 212 insertions(+), 213 deletions(-)

diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index df6fecc..5b921cc 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -50,7 +50,7 @@ Supported Features
 - Jumbo frames (using single buffer)
 - VLAN offload - Filtering and stripping
 - Stateless checksum offloads (IPv4/TCP/UDP)
-- Multiple Rx/Tx queues (queue-pairs)
+- Multiple Rx/Tx queues
 - RSS (with user configurable table/key)
 - TSS
 - Multiple MAC address
@@ -63,7 +63,6 @@ Non-supported Features
 --

 - Scatter-Gather Rx/Tx frames
-- Unequal number of Rx/Tx queues
 - SR-IOV PF
 - Tunneling offloads
 - Reload of the PMD after a non-graceful termination
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 3b2d8ea..93cad91 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -496,31 +496,26 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)

PMD_INIT_FUNC_TRACE(edev);

-   if (eth_dev->data->nb_rx_queues != eth_dev->data->nb_tx_queues) {
-   DP_NOTICE(edev, false,
- "Unequal number of rx/tx queues "
- "is not supported RX=%u TX=%u\n",
- eth_dev->data->nb_rx_queues,
- eth_dev->data->nb_tx_queues);
-   return -EINVAL;
-   }
-
/* Check requirements for 100G mode */
if (edev->num_hwfns > 1) {
-   if (eth_dev->data->nb_rx_queues < 2) {
+   if (eth_dev->data->nb_rx_queues < 2 ||
+   eth_dev->data->nb_tx_queues < 2) {
DP_NOTICE(edev, false,
- "100G mode requires minimum two queues\n");
+ "100G mode needs min. 2 RX/TX queues\n");
return -EINVAL;
}

-   if ((eth_dev->data->nb_rx_queues % 2) != 0) {
+   if ((eth_dev->data->nb_rx_queues % 2 != 0) ||
+   (eth_dev->data->nb_tx_queues % 2 != 0)) {
DP_NOTICE(edev, false,
- "100G mode requires even number of queues\n");
+ "100G mode needs even no. of RX/TX queues\n");
return -EINVAL;
}
}

-   qdev->num_rss = eth_dev->data->nb_rx_queues;
+   qdev->fp_num_tx = eth_dev->data->nb_tx_queues;
+   qdev->fp_num_rx = eth_dev->data->nb_rx_queues;
+   qdev->num_queues = qdev->fp_num_tx + qdev->fp_num_rx;

/* Initial state */
qdev->state = QEDE_CLOSE;
diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index abb33af..1f62283 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -62,8 +62,8 @@
 #define QEDE_MAX_TSS_CNT(edev)  ((edev)->dev_info.num_queues * \
(edev)->dev_info.num_tc)

-#define QEDE_RSS_CNT(edev) ((edev)->num_rss)
-#define QEDE_TSS_CNT(edev) ((edev)->num_rss * (edev)->num_tc)
+#define QEDE_RSS_CNT(edev) ((edev)->fp_num_rx)
+#define QEDE_TSS_CNT(edev) ((edev)->fp_num_rx * (edev)->num_tc)

 #define QEDE_DUPLEX_FULL   1
 #define QEDE_DUPLEX_HALF   2
@@ -76,6 +76,12 @@

 #define QEDE_INIT_EDEV(adapter) (&((struct qede_dev *)adapter)->edev)

+#define QEDE_QUEUE_CNT(qdev) ((qdev)->num_queues)
+#define QEDE_RSS_COUNT(qdev) ((qdev)->num_queues - (qdev)->fp_num_tx)
+#define QEDE_TSS_COUNT(qdev) (((qdev)->num_queues - (qdev)->fp_num_rx) * \
+   (qdev)->num_tc)
+#define QEDE_TC_IDX(qdev, txqidx) ((txqidx) / QEDE_TSS_COUNT(qdev))
+
 #define QEDE_INIT(eth_dev) {   \
struct qede_dev *qdev = eth_dev->data->dev_private; \
struct ecore_dev *edev = >edev;   \
@@ -138,8 +144,10 @@ struct qede_dev {
struct qed_update_vport_rss_params rss_params;
uint32_t flags;
bool gro_disable;
-   struct qede_rx_queue **rx_queues;
-   struct qede_tx_queue **tx_queues;
+   uint16_t num_queues;
+   uint8_t fp_num_tx;
+   uint8_t fp_num_rx;
+
enum dev_state state;

/* Vlans */
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index b5a40fe..00584a9 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ 

[dpdk-dev] [PATCH v3 14/32] qede/base: add MFW crash dump support

[Rasesh Mody]

Add support for management firmware(MFW) crash dump collection.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore.h |   3 +
 drivers/net/qede/base/ecore_dev.c |  22 ++---
 drivers/net/qede/base/ecore_dev_api.h |  29 ---
 drivers/net/qede/base/ecore_mcp.c | 151 ++
 drivers/net/qede/base/ecore_mcp.h |  45 ++
 drivers/net/qede/base/ecore_mcp_api.h |  10 +++
 drivers/net/qede/qede_main.c  |  17 ++--
 7 files changed, 249 insertions(+), 28 deletions(-)

diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index 874c3a3..89e2bd0 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -735,6 +735,9 @@ struct ecore_dev {

boolattn_clr_en;

+   /* Indicates whether allowing the MFW to collect a crash dump */
+   boolmdump_en;
+
/* Indicates if the reg_fifo is checked after any register access */
boolchk_reg_fifo;

diff --git a/drivers/net/qede/base/ecore_dev.c 
b/drivers/net/qede/base/ecore_dev.c
index 319edeb..b530173 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -1619,24 +1619,20 @@ static void ecore_reset_mb_shadow(struct ecore_hwfn 
*p_hwfn,
 }

 enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
-  struct ecore_tunn_start_params *p_tunn,
-  bool b_hw_start,
-  enum ecore_int_mode int_mode,
-  bool allow_npar_tx_switch,
-  const u8 *bin_fw_data)
+  struct ecore_hw_init_params *p_params)
 {
enum _ecore_status_t rc, mfw_rc;
u32 load_code, param;
int i, j;

-   if ((int_mode == ECORE_INT_MODE_MSI) && (p_dev->num_hwfns > 1)) {
+   if (p_params->int_mode == ECORE_INT_MODE_MSI && p_dev->num_hwfns > 1) {
DP_NOTICE(p_dev, false,
  "MSI mode is not supported for CMT devices\n");
return ECORE_INVAL;
}

if (IS_PF(p_dev)) {
-   rc = ecore_init_fw_data(p_dev, bin_fw_data);
+   rc = ecore_init_fw_data(p_dev, p_params->bin_fw_data);
if (rc != ECORE_SUCCESS)
return rc;
}
@@ -1733,9 +1729,11 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev 
*p_dev,
/* Fall into */
case FW_MSG_CODE_DRV_LOAD_FUNCTION:
rc = ecore_hw_init_pf(p_hwfn, p_hwfn->p_main_ptt,
- p_tunn, p_hwfn->hw_info.hw_mode,
- b_hw_start, int_mode,
- allow_npar_tx_switch);
+ p_params->p_tunn,
+ p_hwfn->hw_info.hw_mode,
+ p_params->b_hw_start,
+ p_params->int_mode,
+ p_params->allow_npar_tx_switch);
break;
default:
rc = ECORE_NOTIMPL;
@@ -1759,6 +1757,10 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev 
*p_dev,
return mfw_rc;
}

+   ecore_mcp_mdump_get_info(p_hwfn, p_hwfn->p_main_ptt);
+   ecore_mcp_mdump_set_values(p_hwfn, p_hwfn->p_main_ptt,
+  p_params->epoch);
+
/* send DCBX attention request command */
DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
   "sending phony dcbx set command to trigger DCBx 
attention handling\n");
diff --git a/drivers/net/qede/base/ecore_dev_api.h 
b/drivers/net/qede/base/ecore_dev_api.h
index 1a810b5..042c0af 100644
--- a/drivers/net/qede/base/ecore_dev_api.h
+++ b/drivers/net/qede/base/ecore_dev_api.h
@@ -57,26 +57,31 @@ enum _ecore_status_t ecore_resc_alloc(struct ecore_dev 
*p_dev);
  */
 void ecore_resc_setup(struct ecore_dev *p_dev);

+struct ecore_hw_init_params {
+   /* tunnelling parameters */
+   struct ecore_tunn_start_params *p_tunn;
+   bool b_hw_start;
+   /* interrupt mode [msix, inta, etc.] to use */
+   enum ecore_int_mode int_mode;
+/* npar tx switching to be used for vports configured for tx-switching */
+
+   bool allow_npar_tx_switch;
+   /* binary fw data pointer in binary fw file */
+   const u8 *bin_fw_data;
+   /* the OS Epoch time in seconds */
+   u32 epoch;
+};
+
 /**
  * @brief ecore_hw_init -
  *
  * @param p_dev
- * @param p_tunn - tunneling parameters
- * @param b_hw_start
- * @param int_mode - interrupt mode [msix, inta, etc.] to use.
- * @param allow_npar_tx_switch - npar tx switching 

[dpdk-dev] [PATCH v3 13/32] qede/base: comment enhancements

[Rasesh Mody]

Comment additions and modifications

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_dev_api.h  |   4 +-
 drivers/net/qede/base/ecore_gtt_reg_addr.h |  10 +
 drivers/net/qede/base/ecore_hsi_common.h   | 863 +++-
 drivers/net/qede/base/ecore_hsi_eth.h  | 877 ++---
 drivers/net/qede/base/ecore_hw_defs.h  |  33 +-
 drivers/net/qede/base/ecore_init_ops.h |   6 +-
 drivers/net/qede/base/ecore_mcp.h  |  31 +-
 drivers/net/qede/base/ecore_sp_api.h   |   5 +-
 drivers/net/qede/base/eth_common.h | 154 +++--
 drivers/net/qede/base/mcp_public.h |  99 +++-
 10 files changed, 1519 insertions(+), 563 deletions(-)

diff --git a/drivers/net/qede/base/ecore_dev_api.h 
b/drivers/net/qede/base/ecore_dev_api.h
index e6924bd..1a810b5 100644
--- a/drivers/net/qede/base/ecore_dev_api.h
+++ b/drivers/net/qede/base/ecore_dev_api.h
@@ -98,8 +98,8 @@ enum _ecore_status_t ecore_hw_stop(struct ecore_dev *p_dev);

 /**
  * @brief ecore_hw_stop_fastpath -should be called incase
- *slowpath is still required for the device, but
- *fastpath is not.
+ *slowpath is still required for the device,
+ *but fastpath is not.
  *
  * @param p_dev
  *
diff --git a/drivers/net/qede/base/ecore_gtt_reg_addr.h 
b/drivers/net/qede/base/ecore_gtt_reg_addr.h
index 0eba1aa..6395b7c 100644
--- a/drivers/net/qede/base/ecore_gtt_reg_addr.h
+++ b/drivers/net/qede/base/ecore_gtt_reg_addr.h
@@ -10,33 +10,43 @@
 #define GTT_REG_ADDR_H

 /* Win 2 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_IGU_CMD  
0x00f000UL

 /* Win 3 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_TSDM_RAM 
0x01UL

 /* Win 4 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_MSDM_RAM 
0x011000UL

 /* Win 5 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_MSDM_RAM_1024
0x012000UL

 /* Win 6 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_USDM_RAM 
0x013000UL

 /* Win 7 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_USDM_RAM_1024
0x014000UL

 /* Win 8 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_USDM_RAM_2048
0x015000UL

 /* Win 9 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_XSDM_RAM 
0x016000UL

 /* Win 10 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_YSDM_RAM 
0x017000UL

 /* Win 11 */
+/* Access:RW   DataWidth:0x20Chips: BB_A0 BB_B0 K2 */
 #define GTT_BAR0_MAP_REG_PSDM_RAM 
0x018000UL

 #endif
diff --git a/drivers/net/qede/base/ecore_hsi_common.h 
b/drivers/net/qede/base/ecore_hsi_common.h
index 3c4d7c0..179d410 100644
--- a/drivers/net/qede/base/ecore_hsi_common.h
+++ b/drivers/net/qede/base/ecore_hsi_common.h
@@ -13,6 +13,7 @@
 //
 #include "common_hsi.h"

+
 /*
  * opcodes for the event ring
  */
@@ -30,6 +31,7 @@ enum common_event_opcode {
MAX_COMMON_EVENT_OPCODE
 };

+
 /*
  * Common Ramrod Command IDs
  */
@@ -45,6 +47,7 @@ enum common_ramrod_cmd_id {
MAX_COMMON_RAMROD_CMD_ID
 };

+
 /*
  * The core storm context for the Ystorm
  */
@@ -65,8 +68,8 @@ struct pstorm_core_conn_st_ctx {
 struct xstorm_core_conn_st_ctx {
__le32 spq_base_lo /* SPQ Ring Base Address low dword */;
__le32 spq_base_hi /* SPQ Ring Base Address high dword */;
-   struct regpair consolid_base_addr /* Consolidation Ring Base Address */
- ;
+/* Consolidation Ring Base Address */
+   struct regpair consolid_base_addr;
__le16 spq_cons /* SPQ Ring Consumer */;
__le16 consolid_cons /* Consolidation Ring Consumer */;
__le32 reserved0[55] /* Pad to 15 cycles */;
@@ -76,210 +79,300 @@ struct xstorm_core_conn_ag_ctx {
u8 reserved0 /* cdu_validation */;
u8 core_state /* state */;
u8 flags0;
+/* exist_in_qm0 */
 #define XSTORM_CORE_CONN_AG_CTX_EXIST_IN_QM0_MASK 0x1
 #define XSTORM_CORE_CONN_AG_CTX_EXIST_IN_QM0_SHIFT0
+/* exist_in_qm1 */
 #define XSTORM_CORE_CONN_AG_CTX_RESERVED1_MASK0x1
 #define XSTORM_CORE_CONN_AG_CTX_RESERVED1_SHIFT   1
+/* exist_in_qm2 */
 #define XSTORM_CORE_CONN_AG_CTX_RESERVED2_MASK0x1
 #define XSTORM_CORE_CONN_AG_CTX_RESERVED2_SHIFT   2
+/* exist_in_qm3 */
 #define XSTORM_CORE_CONN_AG_CTX_EXIST_IN_QM3_MASK 0x1
 #define XSTORM_CORE_CONN_AG_CTX_EXIST_IN_QM3_SHIFT3

[dpdk-dev] [PATCH v3 12/32] qede/base: rename structure and defines

[Rasesh Mody]

Renamed following to match with HSI changes
 - PMM_* to ETH_*
 - pmm_* to eth_*

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore_l2.c   |  90 ++---
 drivers/net/qede/base/ecore_mcp.c  |  12 +--
 drivers/net/qede/base/mcp_public.h | 158 +
 3 files changed, 140 insertions(+), 120 deletions(-)

diff --git a/drivers/net/qede/base/ecore_l2.c b/drivers/net/qede/base/ecore_l2.c
index b1190e4..5a38ad2 100644
--- a/drivers/net/qede/base/ecore_l2.c
+++ b/drivers/net/qede/base/ecore_l2.c
@@ -1583,51 +1583,51 @@ static void __ecore_get_vport_port_stats(struct 
ecore_hwfn *p_hwfn,
  OFFSETOF(struct public_port, stats),
  sizeof(port_stats));

-   p_stats->rx_64_byte_packets += port_stats.pmm.r64;
-   p_stats->rx_65_to_127_byte_packets += port_stats.pmm.r127;
-   p_stats->rx_128_to_255_byte_packets += port_stats.pmm.r255;
-   p_stats->rx_256_to_511_byte_packets += port_stats.pmm.r511;
-   p_stats->rx_512_to_1023_byte_packets += port_stats.pmm.r1023;
-   p_stats->rx_1024_to_1518_byte_packets += port_stats.pmm.r1518;
-   p_stats->rx_1519_to_1522_byte_packets += port_stats.pmm.r1522;
-   p_stats->rx_1519_to_2047_byte_packets += port_stats.pmm.r2047;
-   p_stats->rx_2048_to_4095_byte_packets += port_stats.pmm.r4095;
-   p_stats->rx_4096_to_9216_byte_packets += port_stats.pmm.r9216;
-   p_stats->rx_9217_to_16383_byte_packets += port_stats.pmm.r16383;
-   p_stats->rx_crc_errors += port_stats.pmm.rfcs;
-   p_stats->rx_mac_crtl_frames += port_stats.pmm.rxcf;
-   p_stats->rx_pause_frames += port_stats.pmm.rxpf;
-   p_stats->rx_pfc_frames += port_stats.pmm.rxpp;
-   p_stats->rx_align_errors += port_stats.pmm.raln;
-   p_stats->rx_carrier_errors += port_stats.pmm.rfcr;
-   p_stats->rx_oversize_packets += port_stats.pmm.rovr;
-   p_stats->rx_jabbers += port_stats.pmm.rjbr;
-   p_stats->rx_undersize_packets += port_stats.pmm.rund;
-   p_stats->rx_fragments += port_stats.pmm.rfrg;
-   p_stats->tx_64_byte_packets += port_stats.pmm.t64;
-   p_stats->tx_65_to_127_byte_packets += port_stats.pmm.t127;
-   p_stats->tx_128_to_255_byte_packets += port_stats.pmm.t255;
-   p_stats->tx_256_to_511_byte_packets += port_stats.pmm.t511;
-   p_stats->tx_512_to_1023_byte_packets += port_stats.pmm.t1023;
-   p_stats->tx_1024_to_1518_byte_packets += port_stats.pmm.t1518;
-   p_stats->tx_1519_to_2047_byte_packets += port_stats.pmm.t2047;
-   p_stats->tx_2048_to_4095_byte_packets += port_stats.pmm.t4095;
-   p_stats->tx_4096_to_9216_byte_packets += port_stats.pmm.t9216;
-   p_stats->tx_9217_to_16383_byte_packets += port_stats.pmm.t16383;
-   p_stats->tx_pause_frames += port_stats.pmm.txpf;
-   p_stats->tx_pfc_frames += port_stats.pmm.txpp;
-   p_stats->tx_lpi_entry_count += port_stats.pmm.tlpiec;
-   p_stats->tx_total_collisions += port_stats.pmm.tncl;
-   p_stats->rx_mac_bytes += port_stats.pmm.rbyte;
-   p_stats->rx_mac_uc_packets += port_stats.pmm.rxuca;
-   p_stats->rx_mac_mc_packets += port_stats.pmm.rxmca;
-   p_stats->rx_mac_bc_packets += port_stats.pmm.rxbca;
-   p_stats->rx_mac_frames_ok += port_stats.pmm.rxpok;
-   p_stats->tx_mac_bytes += port_stats.pmm.tbyte;
-   p_stats->tx_mac_uc_packets += port_stats.pmm.txuca;
-   p_stats->tx_mac_mc_packets += port_stats.pmm.txmca;
-   p_stats->tx_mac_bc_packets += port_stats.pmm.txbca;
-   p_stats->tx_mac_ctrl_frames += port_stats.pmm.txcf;
+   p_stats->rx_64_byte_packets += port_stats.eth.r64;
+   p_stats->rx_65_to_127_byte_packets += port_stats.eth.r127;
+   p_stats->rx_128_to_255_byte_packets += port_stats.eth.r255;
+   p_stats->rx_256_to_511_byte_packets += port_stats.eth.r511;
+   p_stats->rx_512_to_1023_byte_packets += port_stats.eth.r1023;
+   p_stats->rx_1024_to_1518_byte_packets += port_stats.eth.r1518;
+   p_stats->rx_1519_to_1522_byte_packets += port_stats.eth.r1522;
+   p_stats->rx_1519_to_2047_byte_packets += port_stats.eth.r2047;
+   p_stats->rx_2048_to_4095_byte_packets += port_stats.eth.r4095;
+   p_stats->rx_4096_to_9216_byte_packets += port_stats.eth.r9216;
+   p_stats->rx_9217_to_16383_byte_packets += port_stats.eth.r16383;
+   p_stats->rx_crc_errors += port_stats.eth.rfcs;
+   p_stats->rx_mac_crtl_frames += port_stats.eth.rxcf;
+   p_stats->rx_pause_frames += port_stats.eth.rxpf;
+   p_stats->rx_pfc_frames += port_stats.eth.rxpp;
+   p_stats->rx_align_errors += port_stats.eth.raln;
+   p_stats->rx_carrier_errors += port_stats.eth.rfcr;
+   p_stats->rx_oversize_packets += port_stats.eth.rovr;
+   p_stats->rx_jabbers += port_stats.eth.rjbr;
+   p_stats->rx_undersize_packets += port_stats.eth.rund;
+   p_stats->rx_fragments += port_stats.eth.rfrg;
+   p_stats->tx_64_byte_packets += port_stats.eth.t64;
+   

[dpdk-dev] [PATCH v3 11/32] qede/base: update base driver

[Rasesh Mody]

This patch updates the base driver and incorporates necessary changes
required to bring in the new firmware 8.10.9.0.

In addition, it would allow driver to add new functionalities that might
be needed in future.

Signed-off-by: Rasesh Mody 
---
 doc/guides/nics/features/qede.ini   |2 +
 doc/guides/nics/features/qede_vf.ini|2 +
 doc/guides/nics/qede.rst|   15 +-
 drivers/net/qede/base/bcm_osal.h|6 +-
 drivers/net/qede/base/ecore.h   |  166 ++-
 drivers/net/qede/base/ecore_chain.h |   17 +-
 drivers/net/qede/base/ecore_cxt.c   |  319 +-
 drivers/net/qede/base/ecore_cxt.h   |   49 +-
 drivers/net/qede/base/ecore_cxt_api.h   |   15 -
 drivers/net/qede/base/ecore_dcbx.c  |  581 +-
 drivers/net/qede/base/ecore_dcbx.h  |   18 +-
 drivers/net/qede/base/ecore_dcbx_api.h  |  128 ++-
 drivers/net/qede/base/ecore_dev.c   | 1551 +++---
 drivers/net/qede/base/ecore_dev_api.h   |   92 +-
 drivers/net/qede/base/ecore_hsi_eth.h   |  120 +-
 drivers/net/qede/base/ecore_hw.c|  212 ++--
 drivers/net/qede/base/ecore_hw.h|   16 +-
 drivers/net/qede/base/ecore_init_fw_funcs.c |  324 --
 drivers/net/qede/base/ecore_init_fw_funcs.h |  102 +-
 drivers/net/qede/base/ecore_init_ops.c  |5 +-
 drivers/net/qede/base/ecore_int.c   |  271 ++---
 drivers/net/qede/base/ecore_int.h   |   19 +-
 drivers/net/qede/base/ecore_int_api.h   |   11 +
 drivers/net/qede/base/ecore_iov_api.h   |  104 +-
 drivers/net/qede/base/ecore_iro.h   |  222 ++--
 drivers/net/qede/base/ecore_iro_values.h|  108 +-
 drivers/net/qede/base/ecore_l2.c|  292 ++---
 drivers/net/qede/base/ecore_l2.h|   57 +-
 drivers/net/qede/base/ecore_l2_api.h|9 +-
 drivers/net/qede/base/ecore_mcp.c   |  350 +++---
 drivers/net/qede/base/ecore_mcp.h   |   29 +-
 drivers/net/qede/base/ecore_mcp_api.h   |   81 +-
 drivers/net/qede/base/ecore_proto_if.h  |   59 +
 drivers/net/qede/base/ecore_rt_defs.h   |  639 +--
 drivers/net/qede/base/ecore_sp_commands.c   |   68 +-
 drivers/net/qede/base/ecore_sp_commands.h   |   30 +
 drivers/net/qede/base/ecore_spq.c   |  169 +--
 drivers/net/qede/base/ecore_spq.h   |5 +-
 drivers/net/qede/base/ecore_sriov.c | 1596 +--
 drivers/net/qede/base/ecore_sriov.h |  149 +--
 drivers/net/qede/base/ecore_vf.c|  736 ++--
 drivers/net/qede/base/ecore_vf.h|  224 +---
 drivers/net/qede/base/ecore_vf_api.h|   93 +-
 drivers/net/qede/base/ecore_vfpf_if.h   |  162 ++-
 drivers/net/qede/base/eth_common.h  |  203 ++--
 drivers/net/qede/base/mcp_public.h  |  408 +--
 drivers/net/qede/base/nvm_cfg.h |  606 +-
 drivers/net/qede/qede_eth_if.c  |1 +
 drivers/net/qede/qede_main.c|   20 +-
 drivers/net/qede/qede_rxtx.h|4 +
 50 files changed, 6899 insertions(+), 3566 deletions(-)

diff --git a/doc/guides/nics/features/qede.ini 
b/doc/guides/nics/features/qede.ini
index 0df93a6..7690773 100644
--- a/doc/guides/nics/features/qede.ini
+++ b/doc/guides/nics/features/qede.ini
@@ -19,6 +19,8 @@ VLAN filter  = Y
 Flow control = Y
 CRC offload  = Y
 VLAN offload = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
 Packet type parsing  = Y
 Basic stats  = Y
 Extended stats   = Y
diff --git a/doc/guides/nics/features/qede_vf.ini 
b/doc/guides/nics/features/qede_vf.ini
index f925659..aeb20d2 100644
--- a/doc/guides/nics/features/qede_vf.ini
+++ b/doc/guides/nics/features/qede_vf.ini
@@ -20,6 +20,8 @@ VLAN filter  = Y
 Flow control = Y
 CRC offload  = Y
 VLAN offload = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
 Packet type parsing  = Y
 Basic stats  = Y
 Extended stats   = Y
diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index 53d749c..df6fecc 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -32,7 +32,7 @@ QEDE Poll Mode Driver
 ==

 The QEDE poll mode driver library (**librte_pmd_qede**) implements support
-for **QLogic FastLinQ QL4 25G/40G CNA** family of adapters as well
+for **QLogic FastLinQ QL4 25G/40G/100G CNA** family of adapters as well
 as their virtual functions (VF) in SR-IOV context. It is supported on
 several standard Linux distros like RHEL7.x, SLES12.x and Ubuntu.
 It is compile-tested under FreeBSD OS.
@@ -55,14 +55,15 @@ Supported Features
 - TSS
 - Multiple MAC address
 - Default pause flow control
-- SR-IOV VF for 25G/40G modes
+- SR-IOV VF
+- MTU change
+- Multiprocess aware

 Non-supported Features
 --

 - Scatter-Gather Rx/Tx frames
 - Unequal number of Rx/Tx queues
-- MTU 

[dpdk-dev] [PATCH v3 10/32] qede: add APIs to support NIC selftests and query sensor info.

[Rasesh Mody]

From: Harish Patil 

This patch adds API support for NIC selftests (BIST) and APIs to retrieve
GPIO info, sensor data like temperature, MBA versions, ECC events etc.

Signed-off-by: Harish Patil 
---
 drivers/net/qede/base/ecore_mcp.c | 314 ++
 drivers/net/qede/base/ecore_mcp_api.h | 155 +
 drivers/net/qede/base/mcp_public.h| 100 +++
 3 files changed, 569 insertions(+)

diff --git a/drivers/net/qede/base/ecore_mcp.c 
b/drivers/net/qede/base/ecore_mcp.c
index 12e1ec1..5baa5a7 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -2021,3 +2021,317 @@ enum _ecore_status_t ecore_mcp_gpio_write(struct 
ecore_hwfn *p_hwfn,

return ECORE_SUCCESS;
 }
+
+enum _ecore_status_t ecore_mcp_gpio_info(struct ecore_hwfn *p_hwfn,
+struct ecore_ptt *p_ptt,
+u16 gpio, u32 *gpio_direction,
+u32 *gpio_ctrl)
+{
+   u32 drv_mb_param = 0, rsp, val = 0;
+   enum _ecore_status_t rc = ECORE_SUCCESS;
+
+   drv_mb_param = gpio << DRV_MB_PARAM_GPIO_NUMBER_SHIFT;
+
+   rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_GPIO_INFO,
+  drv_mb_param, , );
+   if (rc != ECORE_SUCCESS)
+   return rc;
+
+   *gpio_direction = (val & DRV_MB_PARAM_GPIO_DIRECTION_MASK) >>
+  DRV_MB_PARAM_GPIO_DIRECTION_SHIFT;
+   *gpio_ctrl = (val & DRV_MB_PARAM_GPIO_CTRL_MASK) >>
+ DRV_MB_PARAM_GPIO_CTRL_SHIFT;
+
+   if ((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_GPIO_OK)
+   return ECORE_UNKNOWN_ERROR;
+
+   return ECORE_SUCCESS;
+}
+
+enum _ecore_status_t ecore_mcp_bist_register_test(struct ecore_hwfn *p_hwfn,
+ struct ecore_ptt *p_ptt)
+{
+   u32 drv_mb_param = 0, rsp, param;
+   enum _ecore_status_t rc = ECORE_SUCCESS;
+
+   drv_mb_param = (DRV_MB_PARAM_BIST_REGISTER_TEST <<
+   DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT);
+
+   rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST,
+  drv_mb_param, , );
+
+   if (rc != ECORE_SUCCESS)
+   return rc;
+
+   if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) ||
+   (param != DRV_MB_PARAM_BIST_RC_PASSED))
+   rc = ECORE_UNKNOWN_ERROR;
+
+   return rc;
+}
+
+enum _ecore_status_t ecore_mcp_bist_clock_test(struct ecore_hwfn *p_hwfn,
+  struct ecore_ptt *p_ptt)
+{
+   u32 drv_mb_param = 0, rsp, param;
+   enum _ecore_status_t rc = ECORE_SUCCESS;
+
+   drv_mb_param = (DRV_MB_PARAM_BIST_CLOCK_TEST <<
+   DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT);
+
+   rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST,
+  drv_mb_param, , );
+
+   if (rc != ECORE_SUCCESS)
+   return rc;
+
+   if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) ||
+   (param != DRV_MB_PARAM_BIST_RC_PASSED))
+   rc = ECORE_UNKNOWN_ERROR;
+
+   return rc;
+}
+
+enum _ecore_status_t ecore_mcp_bist_nvm_test_get_num_images(
+   struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 *num_images)
+{
+   u32 drv_mb_param = 0, rsp;
+   enum _ecore_status_t rc = ECORE_SUCCESS;
+
+   drv_mb_param = (DRV_MB_PARAM_BIST_NVM_TEST_NUM_IMAGES <<
+   DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT);
+
+   rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_BIST_TEST,
+  drv_mb_param, , num_images);
+
+   if (rc != ECORE_SUCCESS)
+   return rc;
+
+   if (((rsp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK))
+   rc = ECORE_UNKNOWN_ERROR;
+
+   return rc;
+}
+
+enum _ecore_status_t ecore_mcp_bist_nvm_test_get_image_att(
+   struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+   struct bist_nvm_image_att *p_image_att, u32 image_index)
+{
+   struct ecore_mcp_nvm_params params;
+   enum _ecore_status_t rc;
+   u32 buf_size;
+
+   OSAL_MEMSET(, 0, sizeof(struct ecore_mcp_nvm_params));
+   params.nvm_common.offset = (DRV_MB_PARAM_BIST_NVM_TEST_IMAGE_BY_INDEX <<
+   DRV_MB_PARAM_BIST_TEST_INDEX_SHIFT);
+   params.nvm_common.offset |= (image_index <<
+   DRV_MB_PARAM_BIST_TEST_IMAGE_INDEX_SHIFT);
+
+   params.type = ECORE_MCP_NVM_RD;
+   params.nvm_rd.buf_size = _size;
+   params.nvm_common.cmd = DRV_MSG_CODE_BIST_TEST;
+   params.nvm_rd.buf = (u32 *)p_image_att;
+
+   rc = ecore_mcp_nvm_command(p_hwfn, p_ptt, );
+   if (rc != ECORE_SUCCESS)
+   return rc;
+
+   if (((params.nvm_common.resp & FW_MSG_CODE_MASK) != FW_MSG_CODE_OK) ||
+   (p_image_att->return_code != 1))
+   rc = ECORE_UNKNOWN_ERROR;
+
+ 

[dpdk-dev] [PATCH v3 09/32] qede: serialize access to MFW mbox

[Rasesh Mody]

From: Harish Patil 

Add ecore_mcp_mb_lock() and ecore_mcp_mb_unlock() APIs to ensure
a single thread is accessing MFW mailbox.

Signed-off-by: Harish Patil 
---
 drivers/net/qede/base/ecore_mcp.c | 70 ++-
 drivers/net/qede/base/ecore_mcp.h |  4 +++
 2 files changed, 66 insertions(+), 8 deletions(-)

diff --git a/drivers/net/qede/base/ecore_mcp.c 
b/drivers/net/qede/base/ecore_mcp.c
index 24211a3..12e1ec1 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -202,6 +202,51 @@ err:
return ECORE_NOMEM;
 }

+/* Locks the MFW mailbox of a PF to ensure a single access.
+ * The lock is achieved in most cases by holding a spinlock, causing other
+ * threads to wait till a previous access is done.
+ * In some cases (currently when a [UN]LOAD_REQ commands are sent), the single
+ * access is achieved by setting a blocking flag, which will fail other
+ * competing contexts to send their mailboxes.
+ */
+static enum _ecore_status_t ecore_mcp_mb_lock(struct ecore_hwfn *p_hwfn,
+ u32 cmd)
+{
+   OSAL_SPIN_LOCK(_hwfn->mcp_info->lock);
+
+   /* The spinlock shouldn't be acquired when the mailbox command is
+* [UN]LOAD_REQ, since the engine is locked by the MFW, and a parallel
+* pending [UN]LOAD_REQ command of another PF together with a spinlock
+* (i.e. interrupts are disabled) - can lead to a deadlock.
+* It is assumed that for a single PF, no other mailbox commands can be
+* sent from another context while sending LOAD_REQ, and that any
+* parallel commands to UNLOAD_REQ can be cancelled.
+*/
+   if (cmd == DRV_MSG_CODE_LOAD_DONE || cmd == DRV_MSG_CODE_UNLOAD_DONE)
+   p_hwfn->mcp_info->block_mb_sending = false;
+
+   if (p_hwfn->mcp_info->block_mb_sending) {
+   DP_NOTICE(p_hwfn, false,
+ "Trying to send a MFW mailbox command [0x%x] in 
parallel to [UN]LOAD_REQ. Aborting.\n",
+ cmd);
+   OSAL_SPIN_UNLOCK(_hwfn->mcp_info->lock);
+   return ECORE_BUSY;
+   }
+
+   if (cmd == DRV_MSG_CODE_LOAD_REQ || cmd == DRV_MSG_CODE_UNLOAD_REQ) {
+   p_hwfn->mcp_info->block_mb_sending = true;
+   OSAL_SPIN_UNLOCK(_hwfn->mcp_info->lock);
+   }
+
+   return ECORE_SUCCESS;
+}
+
+static void ecore_mcp_mb_unlock(struct ecore_hwfn *p_hwfn, u32 cmd)
+{
+   if (cmd != DRV_MSG_CODE_LOAD_REQ && cmd != DRV_MSG_CODE_UNLOAD_REQ)
+   OSAL_SPIN_UNLOCK(_hwfn->mcp_info->lock);
+}
+
 enum _ecore_status_t ecore_mcp_reset(struct ecore_hwfn *p_hwfn,
 struct ecore_ptt *p_ptt)
 {
@@ -214,8 +259,12 @@ enum _ecore_status_t ecore_mcp_reset(struct ecore_hwfn 
*p_hwfn,
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev))
delay = EMUL_MCP_RESP_ITER_US;
 #endif
-
-   OSAL_SPIN_LOCK(_hwfn->mcp_info->lock);
+   /* Ensure that only a single thread is accessing the mailbox at a
+* certain time.
+*/
+   rc = ecore_mcp_mb_lock(p_hwfn, DRV_MSG_CODE_MCP_RESET);
+   if (rc != ECORE_SUCCESS)
+   return rc;

/* Set drv command along with the updated sequence */
org_mcp_reset_seq = ecore_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0);
@@ -238,7 +287,7 @@ enum _ecore_status_t ecore_mcp_reset(struct ecore_hwfn 
*p_hwfn,
rc = ECORE_AGAIN;
}

-   OSAL_SPIN_UNLOCK(_hwfn->mcp_info->lock);
+   ecore_mcp_mb_unlock(p_hwfn, DRV_MSG_CODE_MCP_RESET);

return rc;
 }
@@ -327,14 +376,16 @@ ecore_mcp_cmd_and_union(struct ecore_hwfn *p_hwfn, struct 
ecore_ptt *p_ptt,
return ECORE_BUSY;
}

-   /* Acquiring a spinlock is needed to ensure that only a single thread
-* is accessing the mailbox at a certain time.
-*/
-   OSAL_SPIN_LOCK(_hwfn->mcp_info->lock);
-
union_data_addr = p_hwfn->mcp_info->drv_mb_addr +
  OFFSETOF(struct public_drv_mb, union_data);

+   /* Ensure that only a single thread is accessing the mailbox at a
+* certain time.
+*/
+   rc = ecore_mcp_mb_lock(p_hwfn, p_mb_params->cmd);
+   if (rc != ECORE_SUCCESS)
+   return rc;
+
if (p_mb_params->p_data_src != OSAL_NULL)
ecore_memcpy_to(p_hwfn, p_ptt, union_data_addr,
p_mb_params->p_data_src,
@@ -348,6 +399,9 @@ ecore_mcp_cmd_and_union(struct ecore_hwfn *p_hwfn, struct 
ecore_ptt *p_ptt,
ecore_memcpy_from(p_hwfn, p_ptt, p_mb_params->p_data_dst,
  union_data_addr,
  sizeof(*p_mb_params->p_data_dst));
+
+   ecore_mcp_mb_unlock(p_hwfn, p_mb_params->cmd);
+
return rc;
 }

diff --git a/drivers/net/qede/base/ecore_mcp.h 
b/drivers/net/qede/base/ecore_mcp.h
index 

[dpdk-dev] [PATCH v3 08/32] qede: change the API signature of ecore_mcp_cmd_and_union()

[Rasesh Mody]

From: Harish Patil 

Change ecore_mcp_cmd_and_union() to accept pointer to a structure rather
than accepting multiple arguments. A new struct ecore_mcp_mb_params is
added for that purpose. Also make this function static. This change is
mostly keeping in mind the future requests which needs additional
arguments.

Signed-off-by: Harish Patil 
---
 drivers/net/qede/base/bcm_osal.h  |   2 +
 drivers/net/qede/base/ecore_mcp.c | 138 --
 drivers/net/qede/base/ecore_mcp.h |  31 +++--
 3 files changed, 98 insertions(+), 73 deletions(-)

diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index a535058..9d84ae2 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -9,6 +9,8 @@
 #ifndef __BCM_OSAL_H
 #define __BCM_OSAL_H

+#include 
+
 #include 
 #include 
 #include 
diff --git a/drivers/net/qede/base/ecore_mcp.c 
b/drivers/net/qede/base/ecore_mcp.c
index b29e630..24211a3 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -313,32 +313,10 @@ static enum _ecore_status_t ecore_do_mcp_cmd(struct 
ecore_hwfn *p_hwfn,
return rc;
 }

-enum _ecore_status_t ecore_mcp_cmd(struct ecore_hwfn *p_hwfn,
-  struct ecore_ptt *p_ptt, u32 cmd, u32 param,
-  u32 *o_mcp_resp, u32 *o_mcp_param)
-{
-#ifndef ASIC_ONLY
-   if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
-   if (cmd == DRV_MSG_CODE_UNLOAD_REQ) {
-   loaded--;
-   loaded_port[p_hwfn->port_id]--;
-   DP_VERBOSE(p_hwfn, ECORE_MSG_SP, "Unload cnt: 0x%x\n",
-  loaded);
-   }
-   return ECORE_SUCCESS;
-   }
-#endif

-   return ecore_mcp_cmd_and_union(p_hwfn, p_ptt, cmd, param, OSAL_NULL,
-  o_mcp_resp, o_mcp_param);
-}
-
-enum _ecore_status_t ecore_mcp_cmd_and_union(struct ecore_hwfn *p_hwfn,
-   struct ecore_ptt *p_ptt,
-u32 cmd, u32 param,
-union drv_union_data *p_union_data,
-u32 *o_mcp_resp,
-u32 *o_mcp_param)
+static enum _ecore_status_t
+ecore_mcp_cmd_and_union(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+   struct ecore_mcp_mb_params *p_mb_params)
 {
u32 union_data_addr;
enum _ecore_status_t rc;
@@ -354,19 +332,54 @@ enum _ecore_status_t ecore_mcp_cmd_and_union(struct 
ecore_hwfn *p_hwfn,
 */
OSAL_SPIN_LOCK(_hwfn->mcp_info->lock);

-   if (p_union_data != OSAL_NULL) {
union_data_addr = p_hwfn->mcp_info->drv_mb_addr +
  OFFSETOF(struct public_drv_mb, union_data);
-   ecore_memcpy_to(p_hwfn, p_ptt, union_data_addr, p_union_data,
-   sizeof(*p_union_data));
-}

-   rc = ecore_do_mcp_cmd(p_hwfn, p_ptt, cmd, param, o_mcp_resp,
- o_mcp_param);
+   if (p_mb_params->p_data_src != OSAL_NULL)
+   ecore_memcpy_to(p_hwfn, p_ptt, union_data_addr,
+   p_mb_params->p_data_src,
+   sizeof(*p_mb_params->p_data_src));

-   OSAL_SPIN_UNLOCK(_hwfn->mcp_info->lock);
+   rc = ecore_do_mcp_cmd(p_hwfn, p_ptt, p_mb_params->cmd,
+ p_mb_params->param, _mb_params->mcp_resp,
+ _mb_params->mcp_param);

+   if (p_mb_params->p_data_dst != OSAL_NULL)
+   ecore_memcpy_from(p_hwfn, p_ptt, p_mb_params->p_data_dst,
+ union_data_addr,
+ sizeof(*p_mb_params->p_data_dst));
+   return rc;
+}
+
+enum _ecore_status_t ecore_mcp_cmd(struct ecore_hwfn *p_hwfn,
+  struct ecore_ptt *p_ptt, u32 cmd, u32 param,
+  u32 *o_mcp_resp, u32 *o_mcp_param)
+{
+   struct ecore_mcp_mb_params mb_params;
+   enum _ecore_status_t rc;
+
+#ifndef ASIC_ONLY
+   if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
+   if (cmd == DRV_MSG_CODE_UNLOAD_REQ) {
+   loaded--;
+   loaded_port[p_hwfn->port_id]--;
+   DP_VERBOSE(p_hwfn, ECORE_MSG_SP, "Unload cnt: 0x%x\n",
+  loaded);
+   }
+   return ECORE_SUCCESS;
+   }
+#endif
+   OSAL_MEM_ZERO(_params, sizeof(mb_params));
+   mb_params.cmd = cmd;
+   mb_params.param = param;
+   rc = ecore_mcp_cmd_and_union(p_hwfn, p_ptt, _params);
+   if (rc != ECORE_SUCCESS)
return rc;
+
+   *o_mcp_resp = mb_params.mcp_resp;
+   *o_mcp_param = mb_params.mcp_param;
+
+   return ECORE_SUCCESS;
 }

 enum 

[dpdk-dev] [PATCH v3 07/32] qede: fix 32 bit compilation

[Rasesh Mody]

Fix 32 bit compilation for gcc version 4.3.4.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/Makefile | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/qede/Makefile b/drivers/net/qede/Makefile
index fe449aa..7965a83 100644
--- a/drivers/net/qede/Makefile
+++ b/drivers/net/qede/Makefile
@@ -48,9 +48,13 @@ endif
 endif

 ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
+ifeq ($(shell gcc -Wno-unused-but-set-variable -Werror -E - < /dev/null > 
/dev/null 2>&1; echo $$?),0)
 CFLAGS_BASE_DRIVER += -Wno-unused-but-set-variable
+endif
 CFLAGS_BASE_DRIVER += -Wno-missing-declarations
+ifeq ($(shell gcc -Wno-maybe-uninitialized -Werror -E - < /dev/null > 
/dev/null 2>&1; echo $$?),0)
 CFLAGS_BASE_DRIVER += -Wno-maybe-uninitialized
+endif
 CFLAGS_BASE_DRIVER += -Wno-strict-prototypes
 ifeq ($(shell test $(GCC_VERSION) -ge 60 && echo 1), 1)
 CFLAGS_BASE_DRIVER += -Wno-shift-negative-value
-- 
1.8.3.1

[dpdk-dev] [PATCH v3 06/32] qede/base: additional formatting/comment changes

[Rasesh Mody]

Change details:
 - adds new comments
 - modifies some of the existing comments
 - abstract code into macros
 - split long lines

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore.h   |  3 +-
 drivers/net/qede/base/ecore_chain.h | 14 ++---
 drivers/net/qede/base/ecore_cxt.c   | 52 +--
 drivers/net/qede/base/ecore_cxt.h   |  3 +-
 drivers/net/qede/base/ecore_dcbx.c  |  6 ++-
 drivers/net/qede/base/ecore_dev.c   | 70 +
 drivers/net/qede/base/ecore_dev_api.h   | 33 
 drivers/net/qede/base/ecore_hsi_eth.h   |  8 +--
 drivers/net/qede/base/ecore_hw.c|  2 +-
 drivers/net/qede/base/ecore_hw.h| 31 +++
 drivers/net/qede/base/ecore_hw_defs.h   | 22 
 drivers/net/qede/base/ecore_init_fw_funcs.c |  3 ++
 drivers/net/qede/base/ecore_init_fw_funcs.h | 80 +++--
 drivers/net/qede/base/ecore_init_ops.h  |  8 ++-
 drivers/net/qede/base/ecore_int.c   |  9 ++--
 drivers/net/qede/base/ecore_iov_api.h   | 57 ++--
 drivers/net/qede/base/ecore_l2.c| 25 +
 drivers/net/qede/base/ecore_l2_api.h|  9 ++--
 drivers/net/qede/base/ecore_mcp.c   |  3 +-
 drivers/net/qede/base/ecore_sp_commands.c   | 17 +++---
 drivers/net/qede/base/ecore_spq.c   | 12 ++---
 drivers/net/qede/base/ecore_spq.h   | 21 +---
 drivers/net/qede/base/eth_common.h  | 15 --
 drivers/net/qede/base/nvm_cfg.h | 17 --
 24 files changed, 321 insertions(+), 199 deletions(-)

diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index b9127de..9f456e3 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -94,7 +94,6 @@ static OSAL_INLINE u32 DB_ADDR(u32 cid, u32 DEMS)
return db_addr;
 }

-/* @DPDK: This is a backport from latest ecore for TSS fix */
 static OSAL_INLINE u32 DB_ADDR_VF(u32 cid, u32 DEMS)
 {
u32 db_addr = FIELD_VALUE(DB_LEGACY_ADDR_DEMS, DEMS) |
@@ -107,6 +106,7 @@ static OSAL_INLINE u32 DB_ADDR_VF(u32 cid, u32 DEMS)
((sizeof(type_name) + (u32)(1 << (p_hwfn->p_dev->cache_shift)) - 1) & \
 ~((1 << (p_hwfn->p_dev->cache_shift)) - 1))

+#ifndef LINUX_REMOVE
 #ifndef U64_HI
 #define U64_HI(val) ((u32)(((u64)(val))  >> 32))
 #endif
@@ -114,6 +114,7 @@ static OSAL_INLINE u32 DB_ADDR_VF(u32 cid, u32 DEMS)
 #ifndef U64_LO
 #define U64_LO(val) ((u32)(((u64)(val)) & 0x))
 #endif
+#endif

 #ifndef __EXTRACT__LINUX__
 enum DP_LEVEL {
diff --git a/drivers/net/qede/base/ecore_chain.h 
b/drivers/net/qede/base/ecore_chain.h
index bc18c41..56b7b4d 100644
--- a/drivers/net/qede/base/ecore_chain.h
+++ b/drivers/net/qede/base/ecore_chain.h
@@ -307,21 +307,23 @@ ecore_chain_advance_page(struct ecore_chain *p_chain, 
void **p_next_elem,
(((p)->u.chain32.idx & (p)->elem_per_page_mask) == (p)->usable_per_page)

 #define is_unusable_next_idx(p, idx)   \
-   p)->u.chain16.idx + 1) & (p)->elem_per_page_mask) == \
-   (p)->usable_per_page)
+   p)->u.chain16.idx + 1) &\
+   (p)->elem_per_page_mask) == (p)->usable_per_page)

 #define is_unusable_next_idx_u32(p, idx)   \
-   p)->u.chain32.idx + 1) & (p)->elem_per_page_mask) \
-   == (p)->usable_per_page)
+   p)->u.chain32.idx + 1) &\
+   (p)->elem_per_page_mask) == (p)->usable_per_page)

 #define test_and_skip(p, idx)  \
do {\
if (is_chain_u16(p)) {  \
if (is_unusable_idx(p, idx))\
-   (p)->u.chain16.idx += (p)->elem_unusable; \
+   (p)->u.chain16.idx +=   \
+   (p)->elem_unusable; \
} else {\
if (is_unusable_idx_u32(p, idx))\
-   (p)->u.chain32.idx += (p)->elem_unusable; \
+   (p)->u.chain32.idx +=   \
+   (p)->elem_unusable; \
}   \
} while (0)

diff --git a/drivers/net/qede/base/ecore_cxt.c 
b/drivers/net/qede/base/ecore_cxt.c
index 415d1c8..22d0b25 100644
--- a/drivers/net/qede/base/ecore_cxt.c
+++ b/drivers/net/qede/base/ecore_cxt.c
@@ -378,7 +378,7 @@ static void ecore_ilt_cli_blk_fill(struct 
ecore_ilt_client_cfg *p_cli,
 {
u32 ilt_size = ILT_PAGE_IN_BYTES(p_cli->p_size.val);

-   /* verfiy called once for each block */
+   /* verify that it's called once for each block */
if (p_blk->total_size)
return;

@@ 

[dpdk-dev] [PATCH v3 05/32] qede/base: fix the attention formating string

[Rasesh Mody]

In case of attention from a signal that's represented by multiple bits
in misc AEU, the format string isn't populated with index and
resulting prints show something akin to " %d" as prefix.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/bcm_osal.c  | 21 +
 drivers/net/qede/base/bcm_osal.h  |  6 ++
 drivers/net/qede/base/ecore_int.c | 35 +--
 3 files changed, 56 insertions(+), 6 deletions(-)

diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index 67270fd..d53dfee 100644
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -65,6 +65,27 @@ inline bool qede_test_bit(u32 nr, unsigned long *addr)
return res;
 }

+static inline u32 qede_ffb(unsigned long word)
+{
+   unsigned long first_bit;
+
+   first_bit = __builtin_ffsl(word);
+   return first_bit ? (first_bit - 1) : OSAL_BITS_PER_UL;
+}
+
+inline u32 qede_find_first_bit(unsigned long *addr, u32 limit)
+{
+   u32 i;
+   u32 nwords = 0;
+   OSAL_BUILD_BUG_ON(!limit);
+   nwords = (limit - 1) / OSAL_BITS_PER_UL + 1;
+   for (i = 0; i < nwords; i++)
+   if (addr[i] != 0)
+   break;
+
+   return (i == nwords) ? limit : i * OSAL_BITS_PER_UL + qede_ffb(addr[i]);
+}
+
 static inline u32 qede_ffz(unsigned long word)
 {
unsigned long first_zero;
diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index 3e2aeb0..a535058 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -301,6 +301,10 @@ bool qede_test_bit(u32, unsigned long *);
 #define OSAL_TEST_BIT(bit, bitmap) \
qede_test_bit(bit, bitmap)

+u32 qede_find_first_bit(unsigned long *, u32);
+#define OSAL_FIND_FIRST_BIT(bitmap, length) \
+   qede_find_first_bit(bitmap, length)
+
 u32 qede_find_first_zero_bit(unsigned long *, u32);
 #define OSAL_FIND_FIRST_ZERO_BIT(bitmap, length) \
qede_find_first_zero_bit(bitmap, length)
@@ -377,6 +381,8 @@ u32 qede_osal_log2(u32);
 #define OSAL_ARRAY_SIZE(arr) RTE_DIM(arr)
 #define OSAL_SPRINTF(name, pattern, ...) \
sprintf(name, pattern, ##__VA_ARGS__)
+#define OSAL_SNPRINTF(buf, size, format, ...) \
+   snprintf(buf, size, format, ##__VA_ARGS__)
 #define OSAL_STRLEN(string) strlen(string)
 #define OSAL_STRCPY(dst, string) strcpy(dst, string)
 #define OSAL_STRNCPY(dst, string, len) strncpy(dst, string, len)
diff --git a/drivers/net/qede/base/ecore_int.c 
b/drivers/net/qede/base/ecore_int.c
index e4c002a..04c4947 100644
--- a/drivers/net/qede/base/ecore_int.c
+++ b/drivers/net/qede/base/ecore_int.c
@@ -783,7 +783,9 @@ static void ecore_int_deassertion_print_bit(struct 
ecore_hwfn *p_hwfn,
 static enum _ecore_status_t
 ecore_int_deassertion_aeu_bit(struct ecore_hwfn *p_hwfn,
  struct aeu_invert_reg_bit *p_aeu,
- u32 aeu_en_reg, u32 bitmask)
+ u32 aeu_en_reg,
+ const char *p_bit_name,
+ u32 bitmask)
 {
enum _ecore_status_t rc = ECORE_INVAL;
u32 val, mask;
@@ -795,12 +797,12 @@ ecore_int_deassertion_aeu_bit(struct ecore_hwfn *p_hwfn,
 #endif

DP_INFO(p_hwfn, "Deasserted attention `%s'[%08x]\n",
-   p_aeu->bit_name, bitmask);
+   p_bit_name, bitmask);

/* Call callback before clearing the interrupt status */
if (p_aeu->cb) {
DP_INFO(p_hwfn, "`%s (attention)': Calling Callback function\n",
-   p_aeu->bit_name);
+   p_bit_name);
rc = p_aeu->cb(p_hwfn);
}

@@ -812,7 +814,7 @@ ecore_int_deassertion_aeu_bit(struct ecore_hwfn *p_hwfn,
/* Reach assertion if attention is fatal */
if (rc != ECORE_SUCCESS) {
DP_NOTICE(p_hwfn, true, "`%s': Fatal attention\n",
- p_aeu->bit_name);
+ p_bit_name);

ecore_hw_err_notify(p_hwfn, ECORE_HW_ERR_HW_ATTN);
}
@@ -824,7 +826,7 @@ ecore_int_deassertion_aeu_bit(struct ecore_hwfn *p_hwfn,
val = ecore_rd(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg);
ecore_wr(p_hwfn, p_hwfn->p_dpc_ptt, aeu_en_reg, (val & mask));
DP_INFO(p_hwfn, "`%s' - Disabled future attentions\n",
-   p_aeu->bit_name);
+   p_bit_name);
}

if (p_aeu->flags & (ATTENTION_FW_DUMP | ATTENTION_PANIC_DUMP)) {
@@ -942,8 +944,8 @@ static enum _ecore_status_t ecore_int_deassertion(struct 
ecore_hwfn *p_hwfn,
 * previous assertion.
 */
for (j = 0, bit_idx = 0; bit_idx < 32; j++) {
+   unsigned long bitmask;
u8 bit, bit_len;
-   u32 bitmask;

[dpdk-dev] [PATCH v3 04/32] qede/base: add HSI changes and register defines

[Rasesh Mody]

 - add the hardware software interface(HSI) changes
 - add register definitions

These will be required for 8.10.9.0 FW upgrade.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/common_hsi.h   | 1202 +-
 drivers/net/qede/base/ecore_dev.c|2 -
 drivers/net/qede/base/ecore_hsi_common.h |  295 +++-
 drivers/net/qede/base/ecore_hw.c |4 +-
 drivers/net/qede/base/eth_common.h   |   27 -
 drivers/net/qede/base/reg_addr.h |   36 +
 6 files changed, 1330 insertions(+), 236 deletions(-)

diff --git a/drivers/net/qede/base/common_hsi.h 
b/drivers/net/qede/base/common_hsi.h
index 4574800..b431c78 100644
--- a/drivers/net/qede/base/common_hsi.h
+++ b/drivers/net/qede/base/common_hsi.h
@@ -8,12 +8,89 @@

 #ifndef __COMMON_HSI__
 #define __COMMON_HSI__
+//
+/* PROTOCOL COMMON FW CONSTANTS */
+//
+
+/* Temporarily here should be added to HSI automatically by resource allocation
+ * tool.
+ */
+#define T_TEST_AGG_INT_TEMP6
+#defineM_TEST_AGG_INT_TEMP8
+#defineU_TEST_AGG_INT_TEMP6
+#defineX_TEST_AGG_INT_TEMP14
+#defineY_TEST_AGG_INT_TEMP4
+#defineP_TEST_AGG_INT_TEMP4
+
+#define X_FINAL_CLEANUP_AGG_INT  1
+
+#define EVENT_RING_PAGE_SIZE_BYTES  4096
+
+#define NUM_OF_GLOBAL_QUEUES   128
+#define COMMON_QUEUE_ENTRY_MAX_BYTE_SIZE   64
+
+#define ISCSI_CDU_TASK_SEG_TYPE   0
+#define FCOE_CDU_TASK_SEG_TYPE0
+#define RDMA_CDU_TASK_SEG_TYPE1
+
+#define FW_ASSERT_GENERAL_ATTN_IDX32
+
+#define MAX_PINNED_CCFC32
+
+#define EAGLE_ENG1_WORKAROUND_NIG_FLOWCTRL_MODE3
+
+/* Queue Zone sizes in bytes */
+#define TSTORM_QZONE_SIZE8  /*tstorm_scsi_queue_zone*/
+#define MSTORM_QZONE_SIZE16  /*mstorm_eth_queue_zone. Used only for RX
+ *producer of VFs in backward compatibility
+ *mode.
+ */
+#define USTORM_QZONE_SIZE8  /*ustorm_eth_queue_zone*/
+#define XSTORM_QZONE_SIZE8  /*xstorm_eth_queue_zone*/
+#define YSTORM_QZONE_SIZE0
+#define PSTORM_QZONE_SIZE0
+
+/*Log of mstorm default VF zone size.*/
+#define MSTORM_VF_ZONE_DEFAULT_SIZE_LOG   7
+/*Maximum number of RX queues that can be allocated to VF by default*/
+#define ETH_MAX_NUM_RX_QUEUES_PER_VF_DEFAULT  16
+/*Maximum number of RX queues that can be allocated to VF with doubled VF zone
+ * size. Up to 96 VF supported in this mode
+ */
+#define ETH_MAX_NUM_RX_QUEUES_PER_VF_DOUBLE   48
+/*Maximum number of RX queues that can be allocated to VF with 4 VF zone size.
+ * Up to 48 VF supported in this mode
+ */
+#define ETH_MAX_NUM_RX_QUEUES_PER_VF_QUAD 112
+
+
+//
+/* CORE (LIGHT L2) FW CONSTANTS */
+//
+
+#define CORE_LL2_MAX_RAMROD_PER_CON8
+#define CORE_LL2_TX_BD_PAGE_SIZE_BYTES 4096
+#define CORE_LL2_RX_BD_PAGE_SIZE_BYTES 4096
+#define CORE_LL2_RX_CQE_PAGE_SIZE_BYTES4096
+#define CORE_LL2_RX_NUM_NEXT_PAGE_BDS  1
+
+#define CORE_LL2_TX_MAX_BDS_PER_PACKET 12
+
+#define CORE_SPQE_PAGE_SIZE_BYTES   4096
+
+#define MAX_NUM_LL2_RX_QUEUES  32
+#define MAX_NUM_LL2_TX_STATS_COUNTERS  32
+
+
+//
+/* Include firmware version number only- do not add constants here to avoid */
+/* redundunt compilations   */
+//

-#define CORE_SPQE_PAGE_SIZE_BYTES  4096

 #define FW_MAJOR_VERSION   8
-#define FW_MINOR_VERSION   7
-#define FW_REVISION_VERSION7
+#define FW_MINOR_VERSION   10
+#define FW_REVISION_VERSION9
 #define FW_ENGINEERING_VERSION 0

 /***/
@@ -21,70 +98,96 @@
 /***/

 /* PCI functions */
-#define MAX_NUM_PORTS_K2   (4)
-#define MAX_NUM_PORTS_BB   (2)
-#define MAX_NUM_PORTS  (MAX_NUM_PORTS_K2)
+#define MAX_NUM_PORTS_K2   (4)
+#define MAX_NUM_PORTS_BB   (2)
+#define MAX_NUM_PORTS  (MAX_NUM_PORTS_K2)

-#define MAX_NUM_PFS_K2 (16)
-#define MAX_NUM_PFS_BB (8)
-#define MAX_NUM_PFS(MAX_NUM_PFS_K2)
-#define MAX_NUM_OF_PFS_IN_CHIP (16) /* On both engines */
+#define MAX_NUM_PFS_K2 (16)
+#define MAX_NUM_PFS_BB (8)
+#define MAX_NUM_PFS(MAX_NUM_PFS_K2)
+#define MAX_NUM_OF_PFS_IN_CHIP (16) /* On both engines */

-#define MAX_NUM_VFS_K2 (192)
-#define MAX_NUM_VFS_BB (120)
-#define MAX_NUM_VFS

[dpdk-dev] [PATCH v3 03/32] qede: use FW CONFIG defines as needed

[Rasesh Mody]

Replaced CONFIG_QED_BINARY_FW with CONFIG_ECORE_BINARY_FW.
Use CONFIG_ECORE_BINARY_FW and CONFIG_ECORE_ZIPPED_FW defines as
required.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/bcm_osal.c |  2 ++
 drivers/net/qede/base/ecore.h| 20 +++-
 drivers/net/qede/qede_main.c | 20 +++-
 3 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index 16029b5..67270fd 100644
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -152,6 +152,7 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev 
*p_dev,
return mz->addr;
 }

+#ifdef CONFIG_ECORE_ZIPPED_FW
 u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 input_len,
u8 *input_buf, u32 max_size, u8 *unzip_buf)
 {
@@ -182,6 +183,7 @@ u32 qede_unzip_data(struct ecore_hwfn *p_hwfn, u32 
input_len,

return p_hwfn->stream->total_out / 4;
 }
+#endif

 void
 qede_get_mcp_proto_stats(struct ecore_dev *edev,
diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index c83b22b..b9127de 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -9,6 +9,18 @@
 #ifndef __ECORE_H
 #define __ECORE_H

+/* @DPDK */
+#include 
+#include 
+#include 
+
+#define CONFIG_ECORE_BINARY_FW
+#define CONFIG_ECORE_ZIPPED_FW
+
+#ifdef CONFIG_ECORE_ZIPPED_FW
+#include 
+#endif
+
 #include "ecore_hsi_common.h"
 #include "ecore_hsi_debug_tools.h"
 #include "ecore_hsi_init_func.h"
@@ -423,9 +435,6 @@ struct storm_stats {
u32 len;
 };

-#define CONFIG_ECORE_BINARY_FW
-#define CONFIG_ECORE_ZIPPED_FW
-
 struct ecore_fw_data {
 #ifdef CONFIG_ECORE_BINARY_FW
struct fw_ver_info *fw_ver_info;
@@ -521,8 +530,8 @@ struct ecore_hwfn {
/* QM init */
struct ecore_qm_infoqm_info;

-   /* Buffer for unzipping firmware data */
 #ifdef CONFIG_ECORE_ZIPPED_FW
+   /* Buffer for unzipping firmware data */
void *unzip_buf;
 #endif

@@ -674,9 +683,10 @@ struct ecore_dev {
boolb_is_emul_full;
 #endif

+#ifdef CONFIG_ECORE_BINARY_FW /* @DPDK */
void*firmware;
-
u64 fw_len;
+#endif

 };

diff --git a/drivers/net/qede/qede_main.c b/drivers/net/qede/qede_main.c
index 73608c6..2e62371 100644
--- a/drivers/net/qede/qede_main.c
+++ b/drivers/net/qede/qede_main.c
@@ -6,10 +6,6 @@
  * See LICENSE.qede_pmd for copyright and licensing details.
  */

-#include 
-#include 
-#include 
-#include 
 #include 
 #include 

@@ -20,7 +16,6 @@ static uint8_t npar_tx_switching = 1;
 /* Alarm timeout. */
 #define QEDE_ALARM_TIMEOUT_US 10

-#define CONFIG_QED_BINARY_FW
 /* Global variable to hold absolute path of fw file */
 char fw_file[PATH_MAX];

@@ -83,6 +78,7 @@ static int qed_nic_setup(struct ecore_dev *edev)
return rc;
 }

+#ifdef CONFIG_ECORE_ZIPPED_FW
 static int qed_alloc_stream_mem(struct ecore_dev *edev)
 {
int i;
@@ -112,7 +108,9 @@ static void qed_free_stream_mem(struct ecore_dev *edev)
OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
}
 }
+#endif

+#ifdef CONFIG_ECORE_BINARY_FW
 static int qed_load_firmware_data(struct ecore_dev *edev)
 {
int fd;
@@ -158,6 +156,7 @@ static int qed_load_firmware_data(struct ecore_dev *edev)

return 0;
 }
+#endif

 static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
 {
@@ -222,7 +221,7 @@ static int qed_slowpath_start(struct ecore_dev *edev,
struct ecore_tunn_start_params tunn_info;
 #endif

-#ifdef CONFIG_QED_BINARY_FW
+#ifdef CONFIG_ECORE_BINARY_FW
if (IS_PF(edev)) {
rc = qed_load_firmware_data(edev);
if (rc) {
@@ -240,7 +239,7 @@ static int qed_slowpath_start(struct ecore_dev *edev,
/* set int_coalescing_mode */
edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;

-   /* Should go with CONFIG_QED_BINARY_FW */
+#ifdef CONFIG_ECORE_ZIPPED_FW
if (IS_PF(edev)) {
/* Allocate stream for unzipping */
rc = qed_alloc_stream_mem(edev);
@@ -252,9 +251,10 @@ static int qed_slowpath_start(struct ecore_dev *edev,
}

qed_start_iov_task(edev);
+#endif

/* Start the slowpath */
-#ifdef CONFIG_QED_BINARY_FW
+#ifdef CONFIG_ECORE_BINARY_FW
if (IS_PF(edev))
data = edev->firmware;
 #endif
@@ -307,7 +307,7 @@ static int qed_slowpath_start(struct ecore_dev *edev,
 err2:
ecore_resc_free(edev);
 err:
-#ifdef CONFIG_QED_BINARY_FW
+#ifdef CONFIG_ECORE_BINARY_FW
if (IS_PF(edev)) {
if (edev->firmware)
rte_free(edev->firmware);
@@ -625,7 +625,9 @@ static int qed_slowpath_stop(struct ecore_dev *edev)
return -ENODEV;

if (IS_PF(edev)) {
+#ifdef CONFIG_ECORE_ZIPPED_FW
qed_free_stream_mem(edev);
+#endif

 #ifdef 

[dpdk-dev] [PATCH v3 01/32] qede/base: add new init files and rearrange the code

[Rasesh Mody]

Added ecore_hsi_debug_tools.h, ecore_hsi_init_func.h,
ecore_hsi_init_tool.h files. Rearranged code from ecore_hsi_common.h and
ecore_hsi_tools.h to the new files. Removed unused code.

Signed-off-by: Rasesh Mody 
---
 drivers/net/qede/base/ecore.h |   17 +-
 drivers/net/qede/base/ecore_dev.c |   73 +-
 drivers/net/qede/base/ecore_hsi_common.h  |  226 --
 drivers/net/qede/base/ecore_hsi_debug_tools.h | 1025 +++
 drivers/net/qede/base/ecore_hsi_init_func.h   |  132 +++
 drivers/net/qede/base/ecore_hsi_init_tool.h   |  454 +++
 drivers/net/qede/base/ecore_hsi_tools.h   | 1081 -
 drivers/net/qede/base/ecore_init_fw_funcs.c   |   67 +-
 drivers/net/qede/base/ecore_init_ops.c|2 +-
 drivers/net/qede/base/ecore_int.c |  141 +---
 10 files changed, 1678 insertions(+), 1540 deletions(-)
 create mode 100644 drivers/net/qede/base/ecore_hsi_debug_tools.h
 create mode 100644 drivers/net/qede/base/ecore_hsi_init_func.h
 create mode 100644 drivers/net/qede/base/ecore_hsi_init_tool.h
 delete mode 100644 drivers/net/qede/base/ecore_hsi_tools.h

diff --git a/drivers/net/qede/base/ecore.h b/drivers/net/qede/base/ecore.h
index d682a78..db72f03 100644
--- a/drivers/net/qede/base/ecore.h
+++ b/drivers/net/qede/base/ecore.h
@@ -10,7 +10,9 @@
 #define __ECORE_H

 #include "ecore_hsi_common.h"
-#include "ecore_hsi_tools.h"
+#include "ecore_hsi_debug_tools.h"
+#include "ecore_hsi_init_func.h"
+#include "ecore_hsi_init_tool.h"
 #include "ecore_proto_if.h"
 #include "mcp_public.h"

@@ -556,14 +558,15 @@ struct ecore_dev {
 #define ECORE_DEV_TYPE_AH  (1 << 0)
 /* Translate type/revision combo into the proper conditions */
 #define ECORE_IS_BB(dev)   ((dev)->type == ECORE_DEV_TYPE_BB)
-#define ECORE_IS_BB_A0(dev)(ECORE_IS_BB(dev) && \
-CHIP_REV_IS_A0(dev))
-#define ECORE_IS_BB_B0(dev)(ECORE_IS_BB(dev) && \
-CHIP_REV_IS_B0(dev))
+#define ECORE_IS_BB_A0(dev)(ECORE_IS_BB(dev) && CHIP_REV_IS_A0(dev))
+#ifndef ASIC_ONLY
+#define ECORE_IS_BB_B0(dev)((ECORE_IS_BB(dev) && CHIP_REV_IS_B0(dev)) || \
+(CHIP_REV_IS_TEDIBEAR(dev)))
+#else
+#define ECORE_IS_BB_B0(dev)(ECORE_IS_BB(dev) && CHIP_REV_IS_B0(dev))
+#endif
 #define ECORE_IS_AH(dev)   ((dev)->type == ECORE_DEV_TYPE_AH)
 #define ECORE_IS_K2(dev)   ECORE_IS_AH(dev)
-#define ECORE_GET_TYPE(dev)(ECORE_IS_BB_A0(dev) ? CHIP_BB_A0 : \
-ECORE_IS_BB_B0(dev) ? CHIP_BB_B0 : CHIP_K2)

u16 vendor_id;
u16 device_id;
diff --git a/drivers/net/qede/base/ecore_dev.c 
b/drivers/net/qede/base/ecore_dev.c
index 0a68969..89faa35 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -281,13 +281,6 @@ static enum _ecore_status_t ecore_init_qm_info(struct 
ecore_hwfn *p_hwfn,
for (i = 0; i < num_ports; i++) {
p_qm_port = _info->qm_port_params[i];
p_qm_port->active = 1;
-   /* @@@TMP - was NUM_OF_PHYS_TCS; Changed until dcbx will
-* be in place
-*/
-   if (num_ports == 4)
-   p_qm_port->num_active_phys_tcs = 2;
-   else
-   p_qm_port->num_active_phys_tcs = 5;
p_qm_port->num_pbf_cmd_lines = PBF_MAX_CMD_LINES / num_ports;
p_qm_port->num_btb_blocks = BTB_MAX_BLOCKS / num_ports;
}
@@ -599,19 +592,15 @@ static void ecore_calc_hw_mode(struct ecore_hwfn *p_hwfn)
 {
int hw_mode = 0;

-   switch (ECORE_GET_TYPE(p_hwfn->p_dev)) {
-   case CHIP_BB_A0:
+   if (ECORE_IS_BB_A0(p_hwfn->p_dev)) {
hw_mode |= 1 << MODE_BB_A0;
-   break;
-   case CHIP_BB_B0:
+   } else if (ECORE_IS_BB_B0(p_hwfn->p_dev)) {
hw_mode |= 1 << MODE_BB_B0;
-   break;
-   case CHIP_K2:
+   } else if (ECORE_IS_AH(p_hwfn->p_dev)) {
hw_mode |= 1 << MODE_K2;
-   break;
-   default:
-   DP_NOTICE(p_hwfn, true, "Can't initialize chip ID %d\n",
- ECORE_GET_TYPE(p_hwfn->p_dev));
+   } else {
+   DP_NOTICE(p_hwfn, true, "Unknown chip type %#x\n",
+ p_hwfn->p_dev->type);
return;
}

@@ -690,37 +679,6 @@ static void ecore_hw_init_chip(struct ecore_hwfn *p_hwfn,
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev) && ECORE_IS_AH(p_hwfn->p_dev))
ecore_wr(p_hwfn, p_ptt, MISCS_REG_RESET_PL_HV_2, 0x3ff);

-   /* initialize interrupt masks */
-   for (i = 0;
-i <
-attn_blocks[BLOCK_MISCS].chip_regs[ECORE_GET_TYPE(p_hwfn->p_dev)].
-num_of_int_regs; i++)
-   ecore_wr(p_hwfn, p_ptt,
-attn_blocks[BLOCK_MISCS].
-

[dpdk-dev] [PATCH v3 00/32] qede: update qede pmd to 1.2.0.1 and enable by default

[Rasesh Mody]

Hi,

This patch set includes changes to update the base driver, work with
newer FW 8.10.9.0, adds new features, includes enhancements and code
cleanup, provides bug fixes and updates documentation for the QEDE
poll mode driver.

It enables QEDE PMD in the dpdk config by default. The dependency on
external library libz has been addressed.

The patch set updates the QEDE PMD to 1.2.0.1.

Review comments recived for v2 series have been addressed.

Please apply to DPDK tree for v16.11 release.

Thanks!
Rasesh

Harish Patil (14):
  qede: change the API signature of ecore_mcp_cmd_and_union()
  qede: serialize access to MFW mbox
  qede: add APIs to support NIC selftests and query sensor info.
  qede: fix port (re)configuration issue
  qede/base: allow MTU change via vport-update
  qede: add missing 100G link speed capability
  qede: remove unused/dead code
  qede: fixes for VLAN filters
  qede: add enable/disable VLAN filtering
  qede: fix RSS related issues
  qede/base: add support to initiate PF FLR
  qede: skip slowpath polling for 100G VF device
  qede: fix driver version string
  qede: fix status_blk index for VF queues

Rasesh Mody (16):
  qede/base: add new init files and rearrange the code
  qede/base: formatting changes
  qede: use FW CONFIG defines as needed
  qede/base: add HSI changes and register defines
  qede/base: fix the attention formating string
  qede/base: additional formatting/comment changes
  qede: fix 32 bit compilation
  qede/base: update base driver
  qede/base: rename structure and defines
  qede/base: comment enhancements
  qede/base: add MFW crash dump support
  qede/base: change rx tx queue start APIs
  qede: add support for queue statistics
  qede: remove zlib dependency and enable PMD by default
  doc: update qede pmd documentation
  qede: update driver version

Sony Chacko (2):
  qede: enable support for unequal number of RX/TX queues
  qede: add scatter gather support

 config/common_base|2 +-
 doc/guides/nics/features/qede.ini |4 +
 doc/guides/nics/features/qede_vf.ini  |4 +
 doc/guides/nics/qede.rst  |   32 +-
 drivers/net/qede/Makefile |6 +-
 drivers/net/qede/base/bcm_osal.c  |   23 +
 drivers/net/qede/base/bcm_osal.h  |   10 +
 drivers/net/qede/base/common_hsi.h|  956 ++-
 drivers/net/qede/base/ecore.h |  631 +++
 drivers/net/qede/base/ecore_chain.h   |   51 +-
 drivers/net/qede/base/ecore_cxt.c |  387 -
 drivers/net/qede/base/ecore_cxt.h |   52 +-
 drivers/net/qede/base/ecore_cxt_api.h |   25 +-
 drivers/net/qede/base/ecore_dcbx.c|  589 ++-
 drivers/net/qede/base/ecore_dcbx.h|   18 +-
 drivers/net/qede/base/ecore_dcbx_api.h|  154 +-
 drivers/net/qede/base/ecore_dev.c | 1813 +---
 drivers/net/qede/base/ecore_dev_api.h |  238 ++-
 drivers/net/qede/base/ecore_gtt_reg_addr.h|   30 +-
 drivers/net/qede/base/ecore_gtt_values.h  |   20 +-
 drivers/net/qede/base/ecore_hsi_common.h  | 1358 +--
 drivers/net/qede/base/ecore_hsi_debug_tools.h | 1025 
 drivers/net/qede/base/ecore_hsi_eth.h |  997 ---
 drivers/net/qede/base/ecore_hsi_init_func.h   |  132 ++
 drivers/net/qede/base/ecore_hsi_init_tool.h   |  454 +
 drivers/net/qede/base/ecore_hsi_tools.h   | 1081 
 drivers/net/qede/base/ecore_hw.c  |  222 ++-
 drivers/net/qede/base/ecore_hw.h  |   75 +-
 drivers/net/qede/base/ecore_hw_defs.h |   39 +-
 drivers/net/qede/base/ecore_init_fw_funcs.c   |  400 +++--
 drivers/net/qede/base/ecore_init_fw_funcs.h   |  250 ++-
 drivers/net/qede/base/ecore_init_ops.c|   11 +-
 drivers/net/qede/base/ecore_init_ops.h|   14 +-
 drivers/net/qede/base/ecore_int.c |  446 +++--
 drivers/net/qede/base/ecore_int.h |   23 +-
 drivers/net/qede/base/ecore_int_api.h |   11 +
 drivers/net/qede/base/ecore_iov_api.h |  519 ++
 drivers/net/qede/base/ecore_iro.h |  234 ++-
 drivers/net/qede/base/ecore_iro_values.h  |  140 +-
 drivers/net/qede/base/ecore_l2.c  |  531 +++---
 drivers/net/qede/base/ecore_l2.h  |   85 +-
 drivers/net/qede/base/ecore_l2_api.h  |  167 +-
 drivers/net/qede/base/ecore_mcp.c |  881 --
 drivers/net/qede/base/ecore_mcp.h |  141 +-
 drivers/net/qede/base/ecore_mcp_api.h |  220 ++-
 drivers/net/qede/base/ecore_proto_if.h|   63 +-
 drivers/net/qede/base/ecore_rt_defs.h |  869 +-
 drivers/net/qede/base/ecore_sp_api.h  |   15 +-
 drivers/net/qede/base/ecore_sp_commands.c |   99 +-
 drivers/net/qede/base/ecore_sp_commands.h |   38 +-
 drivers/net/qede/base/ecore_spq.c |  237 +--
 drivers/net/qede/base/ecore_spq.h