[dpdk-dev] [PATCH v3] Patch introducing API to read/write Intel Architecture Model Specific Registers (MSR)...

2016-01-22 Thread Andralojc, WojciechX
> -Original Message-
> From: Ananyev, Konstantin
> Sent: Friday, January 22, 2016 11:05 AM
> To: Panu Matilainen; Andralojc, WojciechX
> Cc: dev at dpdk.org
> Subject: RE: [dpdk-dev] [PATCH v3] Patch introducing API to read/write Intel
> Architecture Model Specific Registers (MSR)...
> 
> > -Original Message-
> > From: Panu Matilainen [mailto:pmatilai at redhat.com]
> > Sent: Friday, January 22, 2016 10:06 AM
> > To: Ananyev, Konstantin; Andralojc, WojciechX
> > Cc: dev at dpdk.org
> > Subject: Re: [dpdk-dev] [PATCH v3] Patch introducing API to read/write Intel
> Architecture Model Specific Registers (MSR)...
> >
> > On 01/21/2016 12:51 PM, Ananyev, Konstantin wrote:
> > > Hi Panu,
> > >
> > >> -Original Message-
> > >> From: dev [mailto:dev-bounces at dpdk.org] On Behalf Of Panu
> > >> Matilainen
> > >> Sent: Thursday, January 21, 2016 10:39 AM
> > >> To: Andralojc, WojciechX
> > >> Cc: dev at dpdk.org
> > >> Subject: Re: [dpdk-dev] [PATCH v3] Patch introducing API to read/write
> Intel Architecture Model Specific Registers (MSR)...
> > >>
> > >> On 01/21/2016 10:18 AM, Wojciech Andralojc wrote:
> > >>> Patch reworked.
> > >>>
> > >>> Signed-off-by: Wojciech Andralojc 
> > >>> ---
> > >>>lib/librte_eal/common/include/arch/x86/rte_msr.h |  88
> +
> > >>>lib/librte_eal/linuxapp/eal/Makefile |   1 +
> > >>>lib/librte_eal/linuxapp/eal/arch/x86/rte_msr.c   | 116
> +++
> > >>>3 files changed, 205 insertions(+)
> > >>>create mode 100644
> lib/librte_eal/common/include/arch/x86/rte_msr.h
> > >>>create mode 100644
> > >>> lib/librte_eal/linuxapp/eal/arch/x86/rte_msr.c
> > >>
> > >> This creates a new arch-specific public API, with rte_msr.h
> > >> installed as a public header and implementation in the library (as
> > >> opposed to inline), and so the new functions would have to be added
> > >> to rte_eal_version.map.
> > >>
> > >> However that is a bit of a problem since it only exists on IA
> > >> architectures, so it'd mean dummy entries in the version map for
> > >> all other architectures. All the other arch-specific APIs are
> > >> inline code so this is the first of its kind.
> > >
> > > My thought was:
> > > 1. implementation is linux specific (as I know not supposed to work under
> freebsd).
> > > 2. they are not supposed to be used at run-time cide-path, so no need to 
> > > be
> inlined.
> >
> > Speed is not the only interesting attribute of inlining, inlined code
> > also effectively escapes the library ABI so it does not need
> > versioning / exporting.
> >
> > > 3. As I understand we plan to  have a library that will use these 
> > > functions
> anyway.
> >
> > Is this library going to be a generic or specific to Intel CPUs?
> 
> As I understand - yes.
> It supposed to utilise new Intel chips CAT abilities.
> Wojciech, please correct me if I missed something here.

Konstantin, yes, you are right,
CAT enabling lib is Intel CPUs specific.

> 
> > Also, if there are no other uses for the MSR API at the moment,
> > perhaps the best place for this code would be within that library anyway?
> 
> Sounds good to me.

OK, sounds good.
Thank you both for your input.

> 
> Konstantin
> 
> >
> > > About dummy entries in the .map file: if we'll create a 'weak'
> > > generic implementation, that would just return an error - would it solve 
> > > the
> issue?
> >
> > Sure it'd solve the issue of dummy entries in .map but people seemed
> > opposed to having a highly arch-specific API exposed to all architectures.
> >
> > - Panu -
> >

Wojciech Andralojc


[dpdk-dev] [PATCH] Patch introducing API to read/write Intel Architecture Model Specific Registers (MSR), rte_msr_read and rte_msr_write functions.

2016-01-06 Thread Andralojc, WojciechX
> From: Andralojc, WojciechX
> Sent: Thursday, December 17, 2015 12:13 PM
> To: dev at dpdk.org
> Cc: Andralojc, WojciechX
> Subject: [PATCH] Patch introducing API to read/write Intel Architecture Model
> Specific Registers (MSR), rte_msr_read and rte_msr_write functions.
> 
> There is work in progress to implement Intel Cache Allocation Technology (CAT)
> support in DPDK, this technology is programmed through MSRs.
> In the future it will be possible to program CAT through Linux cgroups and 
> DPDK
> CAT implementation will take advantage of it.
> 
> MSR R/W's are privileged ring 0 operations and they must be done in kernel
> space. For this reason implementation utilizes Linux MSR driver.
> 
> Signed-off-by: Wojciech Andralojc 

I've got suggestion offline that as MSRs are IA specific,
I should not give the dummy APIs for the other arches
and move MSR access functions into the EAL specific APIs
or some place more arch specific. 
Do you find submitted MSR patch OK?
or do you agree with the above feedback and patch should be re-worked?
I am looking forward to your feedback

Thank you!

Wojciech Andralojc
--
Intel Research and Development Ireland Limited
Registered in Ireland
Registered Office: Collinstown Industrial Park, Leixlip, County Kildare
Registered Number: 308263


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