[PATCH] cryptodev: add asymmetric operational capability
Asymmetric crypto algorithms such as SM2, EdDSA would need per op
capability and based on it, the input param to a crypto operation
is chosen wisely.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c| 24 ++--
.../crypto/cnxk/cnxk_cryptodev_capabilities.c | 14 +-
drivers/crypto/openssl/rte_openssl_pmd_ops.c | 27 +++---
lib/cryptodev/rte_crypto_asym.h | 12
lib/cryptodev/rte_cryptodev.c | 21 ++
lib/cryptodev/rte_cryptodev.h | 28 +++
6 files changed, 113 insertions(+), 13 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index f0b5d38543..d9b260d50e 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -2611,7 +2611,8 @@ test_sm2_sign(void)
/* Populate op with operational details */
asym_op->sm2.op_type = RTE_CRYPTO_ASYM_OP_SIGN;
- if (rte_cryptodev_asym_xform_capability_check_hash(capa,
RTE_CRYPTO_AUTH_SM3))
+ if (rte_cryptodev_asym_xform_capability_check_opcap(capa,
+ RTE_CRYPTO_ASYM_OP_SIGN, RTE_CRYPTO_SM2_PH))
asym_op->sm2.hash = RTE_CRYPTO_AUTH_SM3;
else
asym_op->sm2.hash = RTE_CRYPTO_AUTH_NULL;
@@ -2628,7 +2629,8 @@ test_sm2_sign(void)
asym_op->sm2.id.length = 0;
}
- if (capa->internal_rng != 0) {
+ if (rte_cryptodev_asym_xform_capability_check_opcap(capa,
+ RTE_CRYPTO_ASYM_OP_ENCRYPT, RTE_CRYPTO_SM2_RNG)) {
asym_op->sm2.k.data = NULL;
asym_op->sm2.k.length = 0;
} else {
@@ -2677,7 +2679,8 @@ test_sm2_sign(void)
debug_hexdump(stdout, "s:",
asym_op->sm2.s.data, asym_op->sm2.s.length);
- if (capa->internal_rng == 0) {
+ if (!rte_cryptodev_asym_xform_capability_check_opcap(capa,
+ RTE_CRYPTO_ASYM_OP_SIGN, RTE_CRYPTO_SM2_RNG)) {
/* Verify sign (by comparison). */
if (memcmp(input_params.sign_r.data, asym_op->sm2.r.data,
asym_op->sm2.r.length) != 0) {
@@ -2802,7 +2805,8 @@ test_sm2_verify(void)
/* Populate op with operational details */
asym_op->sm2.op_type = RTE_CRYPTO_ASYM_OP_VERIFY;
- if (rte_cryptodev_asym_xform_capability_check_hash(capa,
RTE_CRYPTO_AUTH_SM3))
+ if (rte_cryptodev_asym_xform_capability_check_opcap(capa,
+ RTE_CRYPTO_ASYM_OP_VERIFY, RTE_CRYPTO_SM2_PH))
asym_op->sm2.hash = RTE_CRYPTO_AUTH_SM3;
else
asym_op->sm2.hash = RTE_CRYPTO_AUTH_NULL;
@@ -2924,7 +2928,8 @@ test_sm2_enc(void)
/* Populate op with operational details */
asym_op->sm2.op_type = RTE_CRYPTO_ASYM_OP_ENCRYPT;
- if (rte_cryptodev_asym_xform_capability_check_hash(capa,
RTE_CRYPTO_AUTH_SM3))
+ if (rte_cryptodev_asym_xform_capability_check_opcap(capa,
+ RTE_CRYPTO_ASYM_OP_ENCRYPT, RTE_CRYPTO_SM2_PH))
asym_op->sm2.hash = RTE_CRYPTO_AUTH_SM3;
else
asym_op->sm2.hash = RTE_CRYPTO_AUTH_NULL;
@@ -2932,7 +2937,8 @@ test_sm2_enc(void)
asym_op->sm2.message.data = input_params.message.data;
asym_op->sm2.message.length = input_params.message.length;
- if (capa->internal_rng != 0) {
+ if (rte_cryptodev_asym_xform_capability_check_opcap(capa,
+ RTE_CRYPTO_ASYM_OP_ENCRYPT, RTE_CRYPTO_SM2_RNG)) {
asym_op->sm2.k.data = NULL;
asym_op->sm2.k.length = 0;
} else {
@@ -2978,7 +2984,8 @@ test_sm2_enc(void)
debug_hexdump(stdout, "cipher:",
asym_op->sm2.cipher.data, asym_op->sm2.cipher.length);
- if (capa->internal_rng == 0) {
+ if (!rte_cryptodev_asym_xform_capability_check_opcap(capa,
+ RTE_CRYPTO_ASYM_OP_ENCRYPT, RTE_CRYPTO_SM2_RNG)) {
if (memcmp(input_params.cipher.data, asym_op->sm2.cipher.data,
asym_op->sm2.cipher.length) != 0) {
status = TEST_FAILED;
@@ -3105,7 +3112,8 @@ test_sm2_dec(void)
/* Populate op with operational details */
asym_op->sm2.op_type = RTE_CRYPTO_ASYM_OP_DECRYPT;
- if (rte_cryptodev_asym_xform_capability_check_hash(capa,
RTE_CRYPTO_AUTH_SM3))
+ if (rte_cryptodev_asym_xform_capability_check_opcap(capa,
+ RTE_CRYPTO_ASYM_OP_DECRYPT, RTE_CRYPTO_SM2_PH))
asym_op->sm2.hash = RTE_CRYPTO_AUTH_SM3;
else
asym_op->sm2.hash = RTE_CRYPTO_AUTH_NULL;
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c
inde
[PATCH 6/6] app/test: add asymmetric tests for virtio pmd
Add asymmetric tests for Virtio PMD.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 42 +++---
app/test/test_cryptodev_rsa_test_vectors.h | 26 ++
2 files changed, 64 insertions(+), 4 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 0928367cb0..b425643211 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -475,7 +475,7 @@ testsuite_setup(void)
for (qp_id = 0; qp_id < info.max_nb_queue_pairs; qp_id++) {
TEST_ASSERT_SUCCESS(rte_cryptodev_queue_pair_setup(
dev_id, qp_id, &ts_params->qp_conf,
- rte_cryptodev_socket_id(dev_id)),
+ (int8_t)rte_cryptodev_socket_id(dev_id)),
"Failed to setup queue pair %u on cryptodev %u ASYM",
qp_id, dev_id);
}
@@ -538,7 +538,7 @@ ut_setup_asym(void)
TEST_ASSERT_SUCCESS(rte_cryptodev_queue_pair_setup(
ts_params->valid_devs[0], qp_id,
&ts_params->qp_conf,
- rte_cryptodev_socket_id(ts_params->valid_devs[0])),
+
(int8_t)rte_cryptodev_socket_id(ts_params->valid_devs[0])),
"Failed to setup queue pair %u on cryptodev %u",
qp_id, ts_params->valid_devs[0]);
}
@@ -3319,7 +3319,6 @@ rsa_encrypt(const struct rsa_test_data_2 *vector, uint8_t
*cipher_buf)
self->op->asym->rsa.cipher.data = cipher_buf;
self->op->asym->rsa.cipher.length = 0;
SET_RSA_PARAM(self->op->asym->rsa, vector, message);
- self->op->asym->rsa.padding.type = vector->padding;
rte_crypto_op_attach_asym_session(self->op, self->sess);
TEST_ASSERT_SUCCESS(send_one(),
@@ -3343,7 +3342,6 @@ rsa_decrypt(const struct rsa_test_data_2 *vector, uint8_t
*plaintext,
self->op->asym->rsa.message.data = plaintext;
self->op->asym->rsa.message.length = 0;
self->op->asym->rsa.op_type = RTE_CRYPTO_ASYM_OP_DECRYPT;
- self->op->asym->rsa.padding.type = vector->padding;
rte_crypto_op_attach_asym_session(self->op, self->sess);
TEST_ASSERT_SUCCESS(send_one(),
"Failed to process crypto op (Decryption)");
@@ -3385,6 +3383,7 @@ kat_rsa_encrypt(const void *data)
SET_RSA_PARAM(xform.rsa, vector, n);
SET_RSA_PARAM(xform.rsa, vector, e);
SET_RSA_PARAM(xform.rsa, vector, d);
+ xform.rsa.padding.type = vector->padding;
xform.rsa.key_type = RTE_RSA_KEY_TYPE_EXP;
int ret = rsa_init_session(&xform);
@@ -3415,6 +3414,7 @@ kat_rsa_encrypt_crt(const void *data)
SET_RSA_PARAM_QT(xform.rsa, vector, dP);
SET_RSA_PARAM_QT(xform.rsa, vector, dQ);
SET_RSA_PARAM_QT(xform.rsa, vector, qInv);
+ xform.rsa.padding.type = vector->padding;
xform.rsa.key_type = RTE_RSA_KEY_TYPE_QT;
int ret = rsa_init_session(&xform);
if (ret) {
@@ -3440,6 +3440,7 @@ kat_rsa_decrypt(const void *data)
SET_RSA_PARAM(xform.rsa, vector, n);
SET_RSA_PARAM(xform.rsa, vector, e);
SET_RSA_PARAM(xform.rsa, vector, d);
+ xform.rsa.padding.type = vector->padding;
xform.rsa.key_type = RTE_RSA_KEY_TYPE_EXP;
int ret = rsa_init_session(&xform);
@@ -3470,6 +3471,7 @@ kat_rsa_decrypt_crt(const void *data)
SET_RSA_PARAM_QT(xform.rsa, vector, dP);
SET_RSA_PARAM_QT(xform.rsa, vector, dQ);
SET_RSA_PARAM_QT(xform.rsa, vector, qInv);
+ xform.rsa.padding.type = vector->padding;
xform.rsa.key_type = RTE_RSA_KEY_TYPE_QT;
int ret = rsa_init_session(&xform);
if (ret) {
@@ -3634,6 +3636,22 @@ static struct unit_test_suite
cryptodev_octeontx_asym_testsuite = {
}
};
+static struct unit_test_suite cryptodev_virtio_asym_testsuite = {
+ .suite_name = "Crypto Device VIRTIO ASYM Unit Test Suite",
+ .setup = testsuite_setup,
+ .teardown = testsuite_teardown,
+ .unit_test_cases = {
+ TEST_CASE_ST(ut_setup_asym, ut_teardown_asym, test_capability),
+ TEST_CASE_ST(ut_setup_asym, ut_teardown_asym,
+ test_rsa_sign_verify),
+ TEST_CASE_ST(ut_setup_asym, ut_teardown_asym,
+ test_rsa_sign_verify_crt),
+ TEST_CASE_ST(ut_setup_asym, ut_teardown_asym, test_rsa_enc_dec),
+ TEST_CASE_ST(ut_setup_asym, ut_teardown_asym,
test_rsa_enc_dec_crt),
+ TEST_CASES_END() /**< NULL terminate unit test array */
+ }
+};
+
static int
test_cryptodev_openssl_asym(void)
{
@@ -3702,6 +3720,22 @@ test_cryptodev_cn10k_a
[PATCH 5/6] examples/vhost_crypto: add asymmetric support
Add symmetric support.
Signed-off-by: Gowrishankar Muthukrishnan
---
examples/vhost_crypto/main.c | 50 +---
1 file changed, 29 insertions(+), 21 deletions(-)
diff --git a/examples/vhost_crypto/main.c b/examples/vhost_crypto/main.c
index 558c09a60f..bed7fc637d 100644
--- a/examples/vhost_crypto/main.c
+++ b/examples/vhost_crypto/main.c
@@ -45,7 +45,8 @@ struct lcore_option {
struct __rte_cache_aligned vhost_crypto_info {
int vids[MAX_NB_SOCKETS];
uint32_t nb_vids;
- struct rte_mempool *sess_pool;
+ struct rte_mempool *sym_sess_pool;
+ struct rte_mempool *asym_sess_pool;
struct rte_mempool *cop_pool;
uint8_t cid;
uint32_t qid;
@@ -302,7 +303,8 @@ new_device(int vid)
return -ENOENT;
}
- ret = rte_vhost_crypto_create(vid, info->cid, info->sess_pool,
+ ret = rte_vhost_crypto_create(vid, info->cid, info->sym_sess_pool,
+ info->asym_sess_pool,
rte_lcore_to_socket_id(options.los[i].lcore_id));
if (ret) {
RTE_LOG(ERR, USER1, "Cannot create vhost crypto\n");
@@ -362,8 +364,8 @@ destroy_device(int vid)
}
static const struct rte_vhost_device_ops virtio_crypto_device_ops = {
- .new_device = new_device,
- .destroy_device = destroy_device,
+ .new_connection = new_device,
+ .destroy_connection = destroy_device,
};
static int
@@ -385,7 +387,7 @@ vhost_crypto_worker(void *arg)
for (i = 0; i < NB_VIRTIO_QUEUES; i++) {
if (rte_crypto_op_bulk_alloc(info->cop_pool,
- RTE_CRYPTO_OP_TYPE_SYMMETRIC, ops[i],
+ RTE_CRYPTO_OP_TYPE_UNDEFINED, ops[i],
burst_size) < burst_size) {
RTE_LOG(ERR, USER1, "Failed to alloc cops\n");
ret = -1;
@@ -409,20 +411,12 @@ vhost_crypto_worker(void *arg)
rte_cryptodev_enqueue_burst(
info->cid, info->qid, ops[j],
fetched);
- if (unlikely(rte_crypto_op_bulk_alloc(
- info->cop_pool,
- RTE_CRYPTO_OP_TYPE_SYMMETRIC,
- ops[j], fetched) < fetched)) {
- RTE_LOG(ERR, USER1, "Failed realloc\n");
- return -1;
- }
-
fetched = rte_cryptodev_dequeue_burst(
info->cid, info->qid,
ops_deq[j], RTE_MIN(burst_size,
info->nb_inflight_ops));
fetched = rte_vhost_crypto_finalize_requests(
- ops_deq[j], fetched, callfds,
+ info->vids[i], j, ops_deq[j],
fetched, callfds,
&nb_callfds);
info->nb_inflight_ops -= fetched;
@@ -455,7 +449,8 @@ free_resource(void)
continue;
rte_mempool_free(info->cop_pool);
- rte_mempool_free(info->sess_pool);
+ rte_mempool_free(info->sym_sess_pool);
+ rte_mempool_free(info->asym_sess_pool);
for (j = 0; j < lo->nb_sockets; j++) {
rte_vhost_driver_unregister(lo->socket_files[i]);
@@ -539,21 +534,34 @@ main(int argc, char *argv[])
goto error_exit;
}
- snprintf(name, 127, "SESS_POOL_%u", lo->lcore_id);
- info->sess_pool = rte_cryptodev_sym_session_pool_create(name,
+ snprintf(name, 127, "SYM_SESS_POOL_%u", lo->lcore_id);
+ info->sym_sess_pool =
rte_cryptodev_sym_session_pool_create(name,
SESSION_MAP_ENTRIES,
rte_cryptodev_sym_get_private_session_size(
info->cid), 0, 0,
rte_lcore_to_socket_id(lo->lcore_id));
- if (!info->sess_pool) {
- RTE_LOG(ERR, USER1, "Failed to create mempool");
+ if (!info->sym_sess_pool) {
+ RTE_LOG(ERR, USER1, "Failed to create sym session
mempool");
+ goto error_exit;
+ }
+
+ /* TODO: storing vhost_crypto_data_req (56 bytes) in user_data,
+
[PATCH 4/6] crypto/virtio: add asymmetric RSA support
Asymmetric RSA operations (SIGN, VERIFY, ENCRYPT and DECRYPT) are
supported in virtio PMD.
Signed-off-by: Gowrishankar Muthukrishnan
---
.../virtio/virtio_crypto_capabilities.h | 19 +
drivers/crypto/virtio/virtio_cryptodev.c | 388 +++---
drivers/crypto/virtio/virtio_rxtx.c | 233 ++-
3 files changed, 572 insertions(+), 68 deletions(-)
diff --git a/drivers/crypto/virtio/virtio_crypto_capabilities.h
b/drivers/crypto/virtio/virtio_crypto_capabilities.h
index 03c30deefd..1b26ff6720 100644
--- a/drivers/crypto/virtio/virtio_crypto_capabilities.h
+++ b/drivers/crypto/virtio/virtio_crypto_capabilities.h
@@ -48,4 +48,23 @@
}, }\
}
+#define VIRTIO_ASYM_CAPABILITIES \
+ { /* RSA */ \
+ .op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC,\
+ {.asym = { \
+ .xform_capa = { \
+ .xform_type = RTE_CRYPTO_ASYM_XFORM_RSA,\
+ .op_types = ((1 << RTE_CRYPTO_ASYM_OP_SIGN) | \
+ (1 << RTE_CRYPTO_ASYM_OP_VERIFY) | \
+ (1 << RTE_CRYPTO_ASYM_OP_ENCRYPT) | \
+ (1 << RTE_CRYPTO_ASYM_OP_DECRYPT)), \
+ {.modlen = {\
+ .min = 1, \
+ .max = 1024,\
+ .increment = 1 \
+ }, }\
+ } \
+}, } \
+ }
+
#endif /* _VIRTIO_CRYPTO_CAPABILITIES_H_ */
diff --git a/drivers/crypto/virtio/virtio_cryptodev.c
b/drivers/crypto/virtio/virtio_cryptodev.c
index 4854820ba6..b2a9995c13 100644
--- a/drivers/crypto/virtio/virtio_cryptodev.c
+++ b/drivers/crypto/virtio/virtio_cryptodev.c
@@ -41,6 +41,11 @@ static void virtio_crypto_sym_clear_session(struct
rte_cryptodev *dev,
static int virtio_crypto_sym_configure_session(struct rte_cryptodev *dev,
struct rte_crypto_sym_xform *xform,
struct rte_cryptodev_sym_session *session);
+static void virtio_crypto_asym_clear_session(struct rte_cryptodev *dev,
+ struct rte_cryptodev_asym_session *sess);
+static int virtio_crypto_asym_configure_session(struct rte_cryptodev *dev,
+ struct rte_crypto_asym_xform *xform,
+ struct rte_cryptodev_asym_session *session);
/*
* The set of PCI devices this driver supports
@@ -53,6 +58,7 @@ static const struct rte_pci_id pci_id_virtio_crypto_map[] = {
static const struct rte_cryptodev_capabilities virtio_capabilities[] = {
VIRTIO_SYM_CAPABILITIES,
+ VIRTIO_ASYM_CAPABILITIES,
RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
};
@@ -88,7 +94,7 @@ virtio_crypto_send_command(struct virtqueue *vq,
return -EINVAL;
}
/* cipher only is supported, it is available if auth_key is NULL */
- if (!cipher_key) {
+ if (session->ctrl.header.algo == VIRTIO_CRYPTO_SERVICE_CIPHER &&
!cipher_key) {
VIRTIO_CRYPTO_SESSION_LOG_ERR("cipher key is NULL.");
return -EINVAL;
}
@@ -104,19 +110,23 @@ virtio_crypto_send_command(struct virtqueue *vq,
/* calculate the length of cipher key */
if (cipher_key) {
- switch (ctrl->u.sym_create_session.op_type) {
- case VIRTIO_CRYPTO_SYM_OP_CIPHER:
- len_cipher_key
- = ctrl->u.sym_create_session.u.cipher
- .para.keylen;
- break;
- case VIRTIO_CRYPTO_SYM_OP_ALGORITHM_CHAINING:
- len_cipher_key
- = ctrl->u.sym_create_session.u.chain
- .para.cipher_param.keylen;
- break;
- default:
- VIRTIO_CRYPTO_SESSION_LOG_ERR("invalid op type");
+ if (session->ctrl.header.algo == VIRTIO_CRYPTO_SERVICE_CIPHER) {
+ switch (ctrl->u.sym_create_session.op_type) {
+ case VIRTIO_CRYPTO_SYM_OP_CIPHER:
+ len_cipher_key =
ctrl->u.sym_create_session.u.cipher.para.keylen;
+ break;
+ case VIRTIO_CRYPTO_
[PATCH 3/6] vhost: add asymmetric RSA support
Support asymmetric RSA crypto operations in vhost-user.
Signed-off-by: Gowrishankar Muthukrishnan
---
lib/cryptodev/cryptodev_pmd.h | 6 +
lib/vhost/rte_vhost_crypto.h | 14 +-
lib/vhost/vhost.c | 11 +-
lib/vhost/vhost.h | 1 +
lib/vhost/vhost_crypto.c | 550 +++---
lib/vhost/vhost_user.c| 4 +
lib/vhost/vhost_user.h| 34 ++-
lib/vhost/virtio_crypto.h | 87 +-
8 files changed, 654 insertions(+), 53 deletions(-)
diff --git a/lib/cryptodev/cryptodev_pmd.h b/lib/cryptodev/cryptodev_pmd.h
index 6c114f7181..ff3756723d 100644
--- a/lib/cryptodev/cryptodev_pmd.h
+++ b/lib/cryptodev/cryptodev_pmd.h
@@ -697,6 +697,12 @@ struct rte_cryptodev_asym_session {
uint8_t sess_private_data[];
};
+/**
+ * Helper macro to get session private data
+ */
+#define CRYPTODEV_GET_ASYM_SESS_PRIV(s) \
+ ((void *)(((struct rte_cryptodev_asym_session *)s)->sess_private_data))
+
#ifdef __cplusplus
}
#endif
diff --git a/lib/vhost/rte_vhost_crypto.h b/lib/vhost/rte_vhost_crypto.h
index f962a53818..274f737990 100644
--- a/lib/vhost/rte_vhost_crypto.h
+++ b/lib/vhost/rte_vhost_crypto.h
@@ -49,8 +49,10 @@ rte_vhost_crypto_driver_start(const char *path);
* @param cryptodev_id
* The identifier of DPDK Cryptodev, the same cryptodev_id can be assigned to
* multiple Vhost-crypto devices.
- * @param sess_pool
- * The pointer to the created cryptodev session pool.
+ * @param sym_sess_pool
+ * The pointer to the created cryptodev sym session pool.
+ * @param asym_sess_pool
+ * The pointer to the created cryptodev asym session pool.
* @param socket_id
* NUMA Socket ID to allocate resources on. *
* @return
@@ -59,7 +61,7 @@ rte_vhost_crypto_driver_start(const char *path);
*/
int
rte_vhost_crypto_create(int vid, uint8_t cryptodev_id,
- struct rte_mempool *sess_pool,
+ struct rte_mempool *sym_sess_pool, struct rte_mempool
*asym_sess_pool,
int socket_id);
/**
@@ -113,6 +115,10 @@ rte_vhost_crypto_fetch_requests(int vid, uint32_t qid,
* dequeued from the cryptodev, this function shall be called to write the
* processed data back to the vring descriptor (if no-copy is turned off).
*
+ * @param vid
+ * The identifier of the vhost device.
+ * @param qid
+ * Virtio queue index.
* @param ops
* The address of an array of *rte_crypto_op* structure that was dequeued
* from cryptodev.
@@ -127,7 +133,7 @@ rte_vhost_crypto_fetch_requests(int vid, uint32_t qid,
* The number of ops processed.
*/
uint16_t
-rte_vhost_crypto_finalize_requests(struct rte_crypto_op **ops,
+rte_vhost_crypto_finalize_requests(int vid, int qid, struct rte_crypto_op
**ops,
uint16_t nb_ops, int *callfds, uint16_t *nb_callfds);
#ifdef __cplusplus
diff --git a/lib/vhost/vhost.c b/lib/vhost/vhost.c
index ac71d17784..c9048e4f24 100644
--- a/lib/vhost/vhost.c
+++ b/lib/vhost/vhost.c
@@ -636,8 +636,12 @@ alloc_vring_queue(struct virtio_net *dev, uint32_t
vring_idx)
/* Also allocate holes, if any, up to requested vring index. */
for (i = 0; i <= vring_idx; i++) {
- if (dev->virtqueue[i])
+ rte_spinlock_lock(&dev->virtqueue_lock);
+ if (dev->virtqueue[i]) {
+ rte_spinlock_unlock(&dev->virtqueue_lock);
continue;
+ }
+ rte_spinlock_unlock(&dev->virtqueue_lock);
vq = rte_zmalloc(NULL, sizeof(struct vhost_virtqueue), 0);
if (vq == NULL) {
@@ -647,13 +651,15 @@ alloc_vring_queue(struct virtio_net *dev, uint32_t
vring_idx)
return -1;
}
- dev->virtqueue[i] = vq;
init_vring_queue(dev, vq, i);
rte_rwlock_init(&vq->access_lock);
rte_rwlock_init(&vq->iotlb_lock);
vq->avail_wrap_counter = 1;
vq->used_wrap_counter = 1;
vq->signalled_used_valid = false;
+ rte_spinlock_lock(&dev->virtqueue_lock);
+ dev->virtqueue[i] = vq;
+ rte_spinlock_unlock(&dev->virtqueue_lock);
}
dev->nr_vring = RTE_MAX(dev->nr_vring, vring_idx + 1);
@@ -740,6 +746,7 @@ vhost_new_device(struct vhost_backend_ops *ops)
dev->postcopy_ufd = -1;
rte_spinlock_init(&dev->backend_req_lock);
dev->backend_ops = ops;
+ rte_spinlock_init(&dev->virtqueue_lock);
return i;
}
diff --git a/lib/vhost/vhost.h b/lib/vhost/vhost.h
index cd3fa55f1b..ad33948e8b 100644
--- a/lib/vhost/vhost.h
+++ b/lib/vhost/vhost.h
@@ -494,6 +494,7 @@ struct __rte_cache_aligned virtio_net {
int extbuf;
int linearbuf;
+ rte_spinlock_t virtqueue_lock;
struct vhost_virtqueue
[PATCH 2/6] cryptodev: fix RSA xform for ASN.1 syntax
As per ASN.1 syntax (RFC 3447 Appendix A.1.2), RSA private key
would need specification of quintuple along with private exponent.
It is up to the implementation to internally handle, but not at
RTE itself to make them exclusive each other. Removing union
on them allows asymmetric implementation in VirtIO to benefit from
the xform as per ASN.1 syntax.
Signed-off-by: Gowrishankar Muthukrishnan
---
lib/cryptodev/rte_crypto_asym.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/cryptodev/rte_crypto_asym.h b/lib/cryptodev/rte_crypto_asym.h
index 64d8a42f6a..398b6514e3 100644
--- a/lib/cryptodev/rte_crypto_asym.h
+++ b/lib/cryptodev/rte_crypto_asym.h
@@ -306,7 +306,7 @@ struct rte_crypto_rsa_xform {
enum rte_crypto_rsa_priv_key_type key_type;
- union {
+ struct {
rte_crypto_uint d;
/**< the RSA private exponent */
struct rte_crypto_rsa_priv_key_qt qt;
--
2.21.0
[PATCH 1/6] cryptodev: move RSA padding information into xform
RSA padding information could be a xform entity rather than part of
crypto op, as it seems associated with hashing algorithm used for
the entire crypto session, where this algorithm is used in message
digest itself. Even in virtIO standard spec, this info is associated
in the asymmetric session creation. Hence, moving this info from
crypto op into xform structure.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 4 --
app/test/test_cryptodev_rsa_test_vectors.h | 2 +
drivers/common/cpt/cpt_ucode_asym.h | 4 +-
drivers/crypto/cnxk/cnxk_ae.h| 13 +++--
drivers/crypto/octeontx/otx_cryptodev_ops.c | 4 +-
drivers/crypto/openssl/openssl_pmd_private.h | 1 +
drivers/crypto/openssl/rte_openssl_pmd.c | 4 +-
drivers/crypto/openssl/rte_openssl_pmd_ops.c | 1 +
drivers/crypto/qat/qat_asym.c| 17 ---
examples/fips_validation/main.c | 52 +++-
lib/cryptodev/rte_crypto_asym.h | 6 +--
11 files changed, 58 insertions(+), 50 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index f0b5d38543..0928367cb0 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -80,7 +80,6 @@ queue_ops_rsa_sign_verify(void *sess)
asym_op->rsa.message.length = rsaplaintext.len;
asym_op->rsa.sign.length = RTE_DIM(rsa_n);
asym_op->rsa.sign.data = output_buf;
- asym_op->rsa.padding.type = RTE_CRYPTO_RSA_PADDING_PKCS1_5;
debug_hexdump(stdout, "message", asym_op->rsa.message.data,
asym_op->rsa.message.length);
@@ -112,7 +111,6 @@ queue_ops_rsa_sign_verify(void *sess)
/* Verify sign */
asym_op->rsa.op_type = RTE_CRYPTO_ASYM_OP_VERIFY;
- asym_op->rsa.padding.type = RTE_CRYPTO_RSA_PADDING_PKCS1_5;
/* Process crypto operation */
if (rte_cryptodev_enqueue_burst(dev_id, 0, &op, 1) != 1) {
@@ -171,7 +169,6 @@ queue_ops_rsa_enc_dec(void *sess)
asym_op->rsa.cipher.data = cipher_buf;
asym_op->rsa.cipher.length = RTE_DIM(rsa_n);
asym_op->rsa.message.length = rsaplaintext.len;
- asym_op->rsa.padding.type = RTE_CRYPTO_RSA_PADDING_PKCS1_5;
debug_hexdump(stdout, "message", asym_op->rsa.message.data,
asym_op->rsa.message.length);
@@ -203,7 +200,6 @@ queue_ops_rsa_enc_dec(void *sess)
asym_op = result_op->asym;
asym_op->rsa.message.length = RTE_DIM(rsa_n);
asym_op->rsa.op_type = RTE_CRYPTO_ASYM_OP_DECRYPT;
- asym_op->rsa.padding.type = RTE_CRYPTO_RSA_PADDING_PKCS1_5;
/* Process crypto operation */
if (rte_cryptodev_enqueue_burst(dev_id, 0, &op, 1) != 1) {
diff --git a/app/test/test_cryptodev_rsa_test_vectors.h
b/app/test/test_cryptodev_rsa_test_vectors.h
index 89981f13f0..1b7b451387 100644
--- a/app/test/test_cryptodev_rsa_test_vectors.h
+++ b/app/test/test_cryptodev_rsa_test_vectors.h
@@ -345,6 +345,7 @@ struct rte_crypto_asym_xform rsa_xform = {
.next = NULL,
.xform_type = RTE_CRYPTO_ASYM_XFORM_RSA,
.rsa = {
+ .padding.type = RTE_CRYPTO_RSA_PADDING_PKCS1_5,
.n = {
.data = rsa_n,
.length = sizeof(rsa_n)
@@ -366,6 +367,7 @@ struct rte_crypto_asym_xform rsa_xform_crt = {
.next = NULL,
.xform_type = RTE_CRYPTO_ASYM_XFORM_RSA,
.rsa = {
+ .padding.type = RTE_CRYPTO_RSA_PADDING_PKCS1_5,
.n = {
.data = rsa_n,
.length = sizeof(rsa_n)
diff --git a/drivers/common/cpt/cpt_ucode_asym.h
b/drivers/common/cpt/cpt_ucode_asym.h
index e1034bbeb4..5122378ec7 100644
--- a/drivers/common/cpt/cpt_ucode_asym.h
+++ b/drivers/common/cpt/cpt_ucode_asym.h
@@ -327,7 +327,7 @@ cpt_rsa_prep(struct asym_op_params *rsa_params,
/* Result buffer */
rlen = mod_len;
- if (rsa_op.padding.type == RTE_CRYPTO_RSA_PADDING_NONE) {
+ if (rsa->padding.type == RTE_CRYPTO_RSA_PADDING_NONE) {
/* Use mod_exp operation for no_padding type */
vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_MODEX;
vq_cmd_w0.s.param2 = exp_len;
@@ -412,7 +412,7 @@ cpt_rsa_crt_prep(struct asym_op_params *rsa_params,
/* Result buffer */
rlen = mod_len;
- if (rsa_op.padding.type == RTE_CRYPTO_RSA_PADDING_NONE) {
+ if (rsa->padding.type == RTE_CRYPTO_RSA_PADDING_NONE) {
/*Use mod_exp operation for no_padding type */
vq_cmd_w0.s.opcode.minor = CPT_MINOR_OP_MODEX_CRT;
} else {
diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h
index ef9cb5eb91..1bb5a450c5 100644
--- a/drivers/crypto/cnxk/cnxk_ae.h
+++ b/drivers/crypto/cnxk/cnxk_ae.h
@@ -177,6 +177,9 @@ cnxk_ae
[PATCH 0/6] vhost: add asymmetric crypto support
This series of patches add asymmetric crypto support in vhost library and virtio PMD, specifically for RSA. To verify functionality in QEMU, you would need: https://github.com/qemu/qemu/commit/5c33f9783ace0b5e077060b220978d94fecb3e81 There is VirtIO specification change proposed for RSA support, and this series apply it at required places. https://lists.oasis-open.org/archives/virtio-comment/202305/msg00341.html In case, qemu crashes, check disabling VHOST_USER_PROTOCOL_F_CONFIG in virtio pmd, when the device starts. This issue was seen with older qemu. Gowrishankar Muthukrishnan (6): cryptodev: move RSA padding information into xform cryptodev: fix RSA xform for ASN.1 syntax vhost: add asymmetric RSA support crypto/virtio: add asymmetric RSA support examples/vhost_crypto: add asymmetric support app/test: add asymmetric tests for virtio pmd app/test/test_cryptodev_asym.c| 46 +- app/test/test_cryptodev_rsa_test_vectors.h| 28 + drivers/common/cpt/cpt_ucode_asym.h | 4 +- drivers/crypto/cnxk/cnxk_ae.h | 13 +- drivers/crypto/octeontx/otx_cryptodev_ops.c | 4 +- drivers/crypto/openssl/openssl_pmd_private.h | 1 + drivers/crypto/openssl/rte_openssl_pmd.c | 4 +- drivers/crypto/openssl/rte_openssl_pmd_ops.c | 1 + drivers/crypto/qat/qat_asym.c | 17 +- .../virtio/virtio_crypto_capabilities.h | 19 + drivers/crypto/virtio/virtio_cryptodev.c | 388 ++-- drivers/crypto/virtio/virtio_rxtx.c | 233 +++- examples/fips_validation/main.c | 52 +- examples/vhost_crypto/main.c | 50 +- lib/cryptodev/cryptodev_pmd.h | 6 + lib/cryptodev/rte_crypto_asym.h | 8 +- lib/vhost/rte_vhost_crypto.h | 14 +- lib/vhost/vhost.c | 11 +- lib/vhost/vhost.h | 1 + lib/vhost/vhost_crypto.c | 550 -- lib/vhost/vhost_user.c| 4 + lib/vhost/vhost_user.h| 34 +- lib/vhost/virtio_crypto.h | 87 ++- 23 files changed, 1378 insertions(+), 197 deletions(-) -- 2.21.0
[PATCH v2 6/6] app/crypto-perf: support EDDSA
Added support for EDDSA 25519 curve SIGN and VERIFY operations.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_ops.c | 52
app/test-crypto-perf/cperf_options.h | 2 +
app/test-crypto-perf/cperf_options_parsing.c | 9 +++-
app/test-crypto-perf/cperf_test_common.c | 1 +
app/test-crypto-perf/cperf_test_vectors.c| 52
app/test-crypto-perf/cperf_test_vectors.h| 10
app/test-crypto-perf/main.c | 13 +
doc/guides/tools/cryptoperf.rst | 1 +
8 files changed, 138 insertions(+), 2 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index f139ec5331..220c3acac7 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -67,6 +67,36 @@ cperf_set_ops_asym_ecdsa(struct rte_crypto_op **ops,
}
}
+static void
+cperf_set_ops_asym_eddsa(struct rte_crypto_op **ops,
+ uint32_t src_buf_offset __rte_unused,
+ uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+ void *sess,
+ const struct cperf_options *options,
+ const struct cperf_test_vector *test_vector __rte_unused,
+ uint16_t iv_offset __rte_unused,
+ uint32_t *imix_idx __rte_unused,
+ uint64_t *tsc_start __rte_unused)
+{
+ uint16_t i;
+
+ for (i = 0; i < nb_ops; i++) {
+ struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+ ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+ rte_crypto_op_attach_asym_session(ops[i], sess);
+
+ asym_op->eddsa.op_type = options->asym_op_type;
+ asym_op->eddsa.message.data = options->eddsa_data->message.data;
+ asym_op->eddsa.message.length =
options->eddsa_data->message.length;
+
+ asym_op->eddsa.instance = options->eddsa_data->instance;
+
+ asym_op->eddsa.sign.data = options->eddsa_data->sign.data;
+ asym_op->eddsa.sign.length = options->eddsa_data->sign.length;
+ }
+}
+
static void
cperf_set_ops_asym_sm2(struct rte_crypto_op **ops,
uint32_t src_buf_offset __rte_unused,
@@ -1031,6 +1061,25 @@ cperf_create_session(struct rte_mempool *sess_mp,
return asym_sess;
}
+ if (options->op_type == CPERF_ASYM_ED25519) {
+ xform.next = NULL;
+ xform.xform_type = RTE_CRYPTO_ASYM_XFORM_EDDSA;
+ xform.ec.curve_id = options->eddsa_data->curve;
+ xform.ec.pkey.data = options->eddsa_data->pkey.data;
+ xform.ec.pkey.length = options->eddsa_data->pkey.length;
+ xform.ec.q.x.data = options->eddsa_data->pubkey.data;
+ xform.ec.q.x.length = options->eddsa_data->pubkey.length;
+
+ ret = rte_cryptodev_asym_session_create(dev_id, &xform,
+ sess_mp, &asym_sess);
+ if (ret < 0) {
+ RTE_LOG(ERR, USER1, "EDDSA Asym session create
failed\n");
+ return NULL;
+ }
+
+ return asym_sess;
+ }
+
if (options->op_type == CPERF_ASYM_SM2) {
xform.next = NULL;
xform.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2;
@@ -1354,6 +1403,9 @@ cperf_get_op_functions(const struct cperf_options
*options,
case CPERF_ASYM_SECP256R1:
op_fns->populate_ops = cperf_set_ops_asym_ecdsa;
break;
+ case CPERF_ASYM_ED25519:
+ op_fns->populate_ops = cperf_set_ops_asym_eddsa;
+ break;
case CPERF_ASYM_SM2:
op_fns->populate_ops = cperf_set_ops_asym_sm2;
break;
diff --git a/app/test-crypto-perf/cperf_options.h
b/app/test-crypto-perf/cperf_options.h
index 131ecfdffb..dbc9f5a97b 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -89,6 +89,7 @@ enum cperf_op_type {
CPERF_IPSEC,
CPERF_ASYM_MODEX,
CPERF_ASYM_SECP256R1,
+ CPERF_ASYM_ED25519,
CPERF_ASYM_SM2,
CPERF_TLS,
};
@@ -169,6 +170,7 @@ struct cperf_options {
struct cperf_modex_test_data *modex_data;
uint16_t modex_len;
struct cperf_ecdsa_test_data *secp256r1_data;
+ struct cperf_eddsa_test_data *eddsa_data;
struct cperf_sm2_test_data *sm2_data;
enum rte_crypto_asym_op_type asym_op_type;
enum rte_crypto_auth_algorithm asym_hash_alg;
diff --git a/app/test-crypto-perf/cperf_options_parsing.c
b/app/test-crypto-perf/cperf_options_parsing.c
index c91fcf0479..59ea66c06d 100644
--- a/app/test-crypto-perf/cperf_options_parsing.c
+++ b/app/test-crypto-perf/cperf_opti
[PATCH v2 5/6] examples/fips_validation: support EDDSA
Add EDDSA support in fips_validation app.
Signed-off-by: Gowrishankar Muthukrishnan
---
examples/fips_validation/fips_validation.c| 2 +
examples/fips_validation/fips_validation.h| 23 ++
.../fips_validation/fips_validation_eddsa.c | 307 +
examples/fips_validation/main.c | 323 --
examples/fips_validation/meson.build | 1 +
5 files changed, 623 insertions(+), 33 deletions(-)
create mode 100644 examples/fips_validation/fips_validation_eddsa.c
diff --git a/examples/fips_validation/fips_validation.c
b/examples/fips_validation/fips_validation.c
index c15178e55b..43d1e55532 100644
--- a/examples/fips_validation/fips_validation.c
+++ b/examples/fips_validation/fips_validation.c
@@ -475,6 +475,8 @@ fips_test_parse_one_json_vector_set(void)
info.algo = FIPS_TEST_ALGO_RSA;
else if (strstr(algo_str, "ECDSA"))
info.algo = FIPS_TEST_ALGO_ECDSA;
+ else if (strstr(algo_str, "EDDSA"))
+ info.algo = FIPS_TEST_ALGO_EDDSA;
else
return -EINVAL;
diff --git a/examples/fips_validation/fips_validation.h
b/examples/fips_validation/fips_validation.h
index abc1d64742..795cf834e8 100644
--- a/examples/fips_validation/fips_validation.h
+++ b/examples/fips_validation/fips_validation.h
@@ -46,6 +46,7 @@ enum fips_test_algorithms {
FIPS_TEST_ALGO_SHA,
FIPS_TEST_ALGO_RSA,
FIPS_TEST_ALGO_ECDSA,
+ FIPS_TEST_ALGO_EDDSA,
FIPS_TEST_ALGO_MAX
};
@@ -106,6 +107,12 @@ struct fips_test_vector {
struct fips_val s;
struct fips_val k;
} ecdsa;
+ struct {
+ struct fips_val pkey;
+ struct fips_val q;
+ struct fips_val ctx;
+ struct fips_val sign;
+ } eddsa;
struct fips_val pt;
struct fips_val ct;
@@ -177,6 +184,11 @@ enum fips_ecdsa_test_types {
ECDSA_AFT = 0,
};
+enum fips_eddsa_test_types {
+ EDDSA_AFT = 0,
+ EDDSA_BFT
+};
+
struct aesavs_interim_data {
enum fips_aesavs_test_types test_type;
uint32_t cipher_algo;
@@ -241,6 +253,13 @@ struct ecdsa_interim_data {
uint8_t pubkey_gen;
};
+struct eddsa_interim_data {
+ enum rte_crypto_curve_id curve_id;
+ uint8_t curve_len;
+ uint8_t pubkey_gen;
+ bool prehash;
+};
+
#ifdef USE_JANSSON
/*
* Maximum length of buffer to hold any json string.
@@ -288,6 +307,7 @@ struct fips_test_interim_info {
struct xts_interim_data xts_data;
struct rsa_interim_data rsa_data;
struct ecdsa_interim_data ecdsa_data;
+ struct eddsa_interim_data eddsa_data;
} interim_info;
enum fips_test_op op;
@@ -374,6 +394,9 @@ parse_test_rsa_json_init(void);
int
parse_test_ecdsa_json_init(void);
+int
+parse_test_eddsa_json_init(void);
+
int
fips_test_randomize_message(struct fips_val *msg, struct fips_val *rand);
#endif /* USE_JANSSON */
diff --git a/examples/fips_validation/fips_validation_eddsa.c
b/examples/fips_validation/fips_validation_eddsa.c
new file mode 100644
index 00..8ccf7501bd
--- /dev/null
+++ b/examples/fips_validation/fips_validation_eddsa.c
@@ -0,0 +1,307 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2023 Marvell.
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#ifdef USE_OPENSSL
+#include
+#include
+#endif /* USE_OPENSSL */
+
+#include
+#include
+
+#include "fips_validation.h"
+
+#define TESTTYPE_JSON_STR "testType"
+#define CURVE_JSON_STR"curve"
+#define PH_JSON_STR "preHash"
+
+#define MSG_JSON_STR "message"
+#define CTX_JSON_STR "context"
+#define Q_JSON_STR "q"
+#define SIG_JSON_STR "signature"
+
+#ifdef USE_JANSSON
+struct {
+ uint8_t type;
+ const char *desc;
+} eddsa_test_types[] = {
+ {EDDSA_AFT, "AFT"},
+ {EDDSA_BFT, "BFT"}
+};
+
+struct {
+ enum rte_crypto_curve_id curve_id;
+ const char *desc;
+} eddsa_curve_ids[] = {
+ {RTE_CRYPTO_EC_GROUP_ED25519, "ED-25519"},
+ {RTE_CRYPTO_EC_GROUP_ED448, "ED-448"},
+};
+
+struct {
+ uint8_t curve_len;
+ const char *desc;
+} eddsa_curve_len[] = {
+ {32, "ED-25519"},
+ {64, "ED-448"},
+};
+
+#ifdef USE_OPENSSL
+#define MAX_TRIES 10
+static int
+prepare_vec_eddsa(void)
+{
+ BIGNUM *pkey = NULL, *order = NULL;
+ int ret = -1, j;
+ unsigned long pid;
+
+ /* For EDDSA prime fields, order of base points (RFC 8032 Section 5.1
and 5.2).
+*/
+ static const char * const orderstr[] = {
+
"7237005577332262213973186563042994240857116359379907606001950938285454250989",
+
&q
[PATCH v2 4/6] test/crypto: add asymmetric EDDSA test cases
Add test cases to validate EDDSA sign and verify ops,
as per RFC 8032.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 357 +++-
app/test/test_cryptodev_ecdh_test_vectors.h | 94 +++-
app/test/test_cryptodev_ecdsa_test_vectors.h | 4 +
app/test/test_cryptodev_eddsa_test_vectors.h | 556 +++
4 files changed, 1005 insertions(+), 6 deletions(-)
create mode 100644 app/test/test_cryptodev_eddsa_test_vectors.h
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index f0b5d38543..23fd3537bc 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -20,6 +20,7 @@
#include "test_cryptodev_ecdh_test_vectors.h"
#include "test_cryptodev_ecdsa_test_vectors.h"
#include "test_cryptodev_ecpm_test_vectors.h"
+#include "test_cryptodev_eddsa_test_vectors.h"
#include "test_cryptodev_mod_test_vectors.h"
#include "test_cryptodev_rsa_test_vectors.h"
#include "test_cryptodev_sm2_test_vectors.h"
@@ -1631,6 +1632,9 @@ test_ecdsa_sign_verify_all_curve(void)
const char *msg;
for (curve_id = SECP192R1; curve_id < END_OF_CURVE_LIST; curve_id++) {
+ if (curve_id == ED25519 || curve_id == ED448)
+ continue;
+
status = test_ecdsa_sign_verify(curve_id);
if (status == TEST_SUCCESS) {
msg = "succeeded";
@@ -1792,7 +1796,7 @@ test_ecpm_all_curve(void)
const char *msg;
for (curve_id = SECP192R1; curve_id < END_OF_CURVE_LIST; curve_id++) {
- if (curve_id == SECP521R1_UA)
+ if (curve_id == SECP521R1_UA || curve_id == ED25519 || curve_id
== ED448)
continue;
status = test_ecpm(curve_id);
@@ -1987,6 +1991,12 @@ test_ecdh_pub_key_generate(enum curve curve_id)
case SECP521R1:
input_params = ecdh_param_secp521r1;
break;
+ case ED25519:
+ input_params = ecdh_param_ed25519;
+ break;
+ case ED448:
+ input_params = ecdh_param_ed448;
+ break;
default:
RTE_LOG(ERR, USER1,
"line %u FAILED: %s", __LINE__,
@@ -2031,6 +2041,8 @@ test_ecdh_pub_key_generate(enum curve curve_id)
/* Populate op with operational details */
asym_op->ecdh.ke_type = RTE_CRYPTO_ASYM_KE_PUB_KEY_GENERATE;
+ if (curve_id == ED25519 || curve_id == ED448)
+ asym_op->flags |= RTE_CRYPTO_ASYM_FLAG_PUB_KEY_COMPRESSED;
/* Init out buf */
asym_op->ecdh.pub_key.x.data = output_buf_x;
@@ -2073,8 +2085,13 @@ test_ecdh_pub_key_generate(enum curve curve_id)
debug_hexdump(stdout, "qy:",
asym_op->ecdh.pub_key.y.data, asym_op->ecdh.pub_key.y.length);
- ret = verify_ecdh_secret(input_params.pubkey_qA_x.data,
+ if (curve_id == ED25519 || curve_id == ED448)
+ ret = memcmp(input_params.pubkey_qA_x.data,
result_op->asym->ecdh.pub_key.x.data,
+ result_op->asym->ecdh.pub_key.x.length);
+ else
+ ret = verify_ecdh_secret(input_params.pubkey_qA_x.data,
input_params.pubkey_qA_y.data, result_op);
+
if (ret) {
status = TEST_FAILED;
RTE_LOG(ERR, USER1,
@@ -2484,7 +2501,7 @@ test_ecdh_all_curve(void)
const char *msg;
for (curve_id = SECP192R1; curve_id < END_OF_CURVE_LIST; curve_id++) {
- if (curve_id == SECP521R1_UA)
+ if (curve_id == SECP521R1_UA || curve_id == ED25519 || curve_id
== ED448)
continue;
status = test_ecdh_priv_key_generate(curve_id);
@@ -2514,7 +2531,7 @@ test_ecdh_all_curve(void)
}
for (curve_id = SECP192R1; curve_id < END_OF_CURVE_LIST; curve_id++) {
- if (curve_id == SECP521R1_UA)
+ if (curve_id == SECP521R1_UA || curve_id == ED25519 || curve_id
== ED448)
continue;
status = test_ecdh_pub_key_verify(curve_id);
@@ -2529,7 +2546,7 @@ test_ecdh_all_curve(void)
}
for (curve_id = SECP192R1; curve_id < END_OF_CURVE_LIST; curve_id++) {
- if (curve_id == SECP521R1_UA)
+ if (curve_id == SECP521R1_UA || curve_id == ED25519 || curve_id
== ED448)
continue;
status = test_ecdh_shared_secret(curve_id);
@@ -3167,6 +3184,334 @@ test_sm2_dec(void)
return status;
};
+static int
+test_eddsa_sign(struct crypto_testsuite_eddsa_params *input_params)
+{
+ struct crypto_testsuite_params_asym *ts_params = &testsuite_params;
+ enum rte_crypto_edward_instance instance = input_params-
[PATCH v2 3/6] crypto/cnxk: support EDDSA
Support EDDSA crypto algorithm in CNXK PMD.
Signed-off-by: Gowrishankar Muthukrishnan
---
doc/guides/cryptodevs/features/cn10k.ini | 1 +
drivers/common/cnxk/hw/cpt.h | 3 +-
drivers/common/cnxk/roc_ae.c | 52 +-
drivers/common/cnxk/roc_ae.h | 10 +
drivers/common/cnxk/roc_ae_fpm_tables.c | 580 +-
drivers/crypto/cnxk/cnxk_ae.h | 473 +-
drivers/crypto/cnxk/cnxk_cryptodev.h | 2 +-
.../crypto/cnxk/cnxk_cryptodev_capabilities.c | 19 +
8 files changed, 1129 insertions(+), 11 deletions(-)
diff --git a/doc/guides/cryptodevs/features/cn10k.ini
b/doc/guides/cryptodevs/features/cn10k.ini
index 39f4b56b9f..bb7d265005 100644
--- a/doc/guides/cryptodevs/features/cn10k.ini
+++ b/doc/guides/cryptodevs/features/cn10k.ini
@@ -107,6 +107,7 @@ ECDH= Y
ECDSA = Y
ECPM= Y
SM2 = Y
+EDDSA = Y
;
; Supported Operating systems of the 'cn10k' crypto driver.
diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
index 2620965606..47df3fbf9f 100644
--- a/drivers/common/cnxk/hw/cpt.h
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -81,7 +81,8 @@ union cpt_eng_caps {
uint64_t __io sm2 : 1;
uint64_t __io pdcp_chain_zuc256 : 1;
uint64_t __io tls : 1;
- uint64_t __io reserved_39_63 : 25;
+ uint64_t __io eddsa : 1;
+ uint64_t __io reserved_40_63 : 24;
};
};
diff --git a/drivers/common/cnxk/roc_ae.c b/drivers/common/cnxk/roc_ae.c
index 7ef0efe2b3..2c563c30de 100644
--- a/drivers/common/cnxk/roc_ae.c
+++ b/drivers/common/cnxk/roc_ae.c
@@ -179,7 +179,57 @@ const struct roc_ae_ec_group ae_ec_grp[ROC_AE_EC_ID_PMAX]
= {
0xAB, 0x8F, 0x92, 0xDD, 0xBC, 0xBD, 0x41,
0x4D, 0x94, 0x0E, 0x93},
.length = 32},
- }};
+ },
+ {
+ .prime = {.data = {0xed, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0x7F},
+ .length = 32},
+ .order = {.data = {0xed, 0xd3, 0xf5, 0x5c, 0x1a, 0x63, 0x12,
+ 0x58, 0xd6, 0x9c, 0xf7, 0xa2, 0xde, 0xf9,
+ 0xde, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x10},
+ .length = 32},
+ .consta = {.data = {0xa3, 0x78, 0x59, 0x13, 0xca, 0x4d, 0xeb,
+ 0x75, 0xab, 0xd8, 0x41, 0x41, 0x4d, 0x0a,
+ 0x70, 0x00, 0x98, 0xe8, 0x79, 0x77, 0x79,
+ 0x40, 0xc7, 0x8c, 0x73, 0xfe, 0x6f, 0x2b,
+ 0xee, 0x6c, 0x03, 0x52},
+ .length = 32},
+ },
+ {
+ .prime = {.data = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .length = 56},
+ .order = {.data = {0xf3, 0x44, 0x58, 0xab, 0x92, 0xc2, 0x78,
+ 0x23, 0x55, 0x8f, 0xc5, 0x8d, 0x72, 0xc2,
+ 0x6c, 0x21, 0x90, 0x36, 0xd6, 0xae, 0x49,
+ 0xdb, 0x4e, 0xc4, 0xe9, 0x23, 0xca, 0x7c,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f},
+ .length = 56},
+ .consta = {.data = {0x56, 0x67, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xfe,
[PATCH v2 2/6] crypto/openssl: support EDDSA
Support EDDSA crypto algorithm in OpenSSL PMD.
Signed-off-by: Gowrishankar Muthukrishnan
---
drivers/crypto/openssl/openssl_pmd_private.h | 13 ++
drivers/crypto/openssl/rte_openssl_pmd.c | 223 +++
drivers/crypto/openssl/rte_openssl_pmd_ops.c | 131 +++
3 files changed, 367 insertions(+)
diff --git a/drivers/crypto/openssl/openssl_pmd_private.h
b/drivers/crypto/openssl/openssl_pmd_private.h
index a50e4d4918..a613988dbe 100644
--- a/drivers/crypto/openssl/openssl_pmd_private.h
+++ b/drivers/crypto/openssl/openssl_pmd_private.h
@@ -231,10 +231,23 @@ struct __rte_cache_aligned openssl_asym_session {
#endif
} s;
struct {
+ uint8_t curve_id;
+#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+ EC_GROUP * group;
+ BIGNUM *priv_key;
+#endif
+ } ec;
+ struct {
#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
OSSL_PARAM * params;
#endif
} sm2;
+ struct {
+ uint8_t curve_id;
+#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+ OSSL_PARAM * params;
+#endif
+ } eddsa;
} u;
};
/** Set and validate OPENSSL crypto session parameters */
diff --git a/drivers/crypto/openssl/rte_openssl_pmd.c
b/drivers/crypto/openssl/rte_openssl_pmd.c
index 10e85b..cbc10b27d4 100644
--- a/drivers/crypto/openssl/rte_openssl_pmd.c
+++ b/drivers/crypto/openssl/rte_openssl_pmd.c
@@ -2849,6 +2849,45 @@ process_openssl_rsa_op_evp(struct rte_crypto_op *cop,
}
+static int
+process_openssl_ecfpm_op_evp(struct rte_crypto_op *cop,
+ struct openssl_asym_session *sess)
+{
+ const EC_GROUP *ecgrp = sess->u.ec.group;
+ EC_POINT *ecpt = NULL;
+ BN_CTX *ctx = NULL;
+ BIGNUM *n = NULL;
+ int ret = -1;
+
+ n = BN_bin2bn((const unsigned char *)
+ cop->asym->ecpm.scalar.data,
+ cop->asym->ecpm.scalar.length,
+ BN_new());
+
+ ctx = BN_CTX_new();
+ if (!ctx)
+ goto err_ecfpm;
+
+ if (!EC_POINT_mul(ecgrp, ecpt, n, NULL, NULL, ctx))
+ goto err_ecfpm;
+
+ if (cop->asym->flags & RTE_CRYPTO_ASYM_FLAG_PUB_KEY_COMPRESSED) {
+ unsigned char *buf = cop->asym->ecpm.r.x.data;
+ size_t sz;
+
+ sz = EC_POINT_point2oct(ecgrp, ecpt,
POINT_CONVERSION_COMPRESSED, buf, 0, ctx);
+ if (!sz)
+ goto err_ecfpm;
+
+ cop->asym->ecpm.r.x.length = sz;
+ }
+
+err_ecfpm:
+ BN_CTX_free(ctx);
+ BN_free(n);
+ return ret;
+}
+
static int
process_openssl_sm2_op_evp(struct rte_crypto_op *cop,
struct openssl_asym_session *sess)
@@ -3074,6 +3113,158 @@ process_openssl_sm2_op_evp(struct rte_crypto_op *cop,
return ret;
}
+static int
+process_openssl_eddsa_op_evp(struct rte_crypto_op *cop,
+ struct openssl_asym_session *sess)
+{
+ static const char * const instance[] = {"Ed25519", "Ed25519ctx",
"Ed25519ph",
+ "Ed448", "Ed448ph"};
+ EVP_PKEY_CTX *kctx = NULL, *sctx = NULL, *cctx = NULL;
+ const uint8_t curve_id = sess->u.eddsa.curve_id;
+ struct rte_crypto_asym_op *op = cop->asym;
+ OSSL_PARAM *params = sess->u.eddsa.params;
+ OSSL_PARAM_BLD *iparam_bld = NULL;
+ OSSL_PARAM *iparams = NULL;
+ uint8_t signbuf[128] = {0};
+ EVP_MD_CTX *md_ctx = NULL;
+ EVP_PKEY *pkey = NULL;
+ size_t signlen;
+ int ret = -1;
+
+ cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+
+ iparam_bld = OSSL_PARAM_BLD_new();
+ if (!iparam_bld)
+ goto err_eddsa;
+
+ if (op->eddsa.instance == RTE_CRYPTO_EDCURVE_25519CTX) {
+ OSSL_PARAM_BLD_push_octet_string(iparam_bld, "context-string",
+ op->eddsa.context.data, op->eddsa.context.length);
+
+ }
+
+ OSSL_PARAM_BLD_push_utf8_string(iparam_bld, "instance",
+ instance[op->eddsa.instance],
strlen(instance[op->eddsa.instance]));
+
+ iparams = OSSL_PARAM_BLD_to_param(iparam_bld);
+ if (!iparams)
+ goto err_eddsa;
+
+ switch (op->eddsa.op_type) {
+ case RTE_CRYPTO_ASYM_OP_SIGN:
+ {
+ if (curve_id == RTE_CRYPTO_EC_GROUP_ED25519)
+ kctx = EVP_PKEY_CTX_new_from_name(NULL,
"ED25519", NULL);
+ else
+ kctx = EVP_PKEY_CTX_new_from_name(NULL,
"ED448", NULL);
+
+ if (kctx == NULL || EVP_PKEY_fromdata_init(kctx) <= 0 ||
+
[PATCH v2 1/6] cryptodev: add EDDSA asymmetric crypto algorithm
Add support for asymmetric EDDSA in cryptodev, as referenced in RFC:
https://datatracker.ietf.org/doc/html/rfc8032
Signed-off-by: Gowrishankar Muthukrishnan
---
doc/guides/cryptodevs/features/default.ini | 1 +
doc/guides/prog_guide/cryptodev_lib.rst| 2 +-
lib/cryptodev/rte_crypto_asym.h| 47 ++
3 files changed, 49 insertions(+), 1 deletion(-)
diff --git a/doc/guides/cryptodevs/features/default.ini
b/doc/guides/cryptodevs/features/default.ini
index f411d4bab7..3073753911 100644
--- a/doc/guides/cryptodevs/features/default.ini
+++ b/doc/guides/cryptodevs/features/default.ini
@@ -130,6 +130,7 @@ ECDSA =
ECPM=
ECDH=
SM2 =
+EDDSA =
;
; Supported Operating systems of a default crypto driver.
diff --git a/doc/guides/prog_guide/cryptodev_lib.rst
b/doc/guides/prog_guide/cryptodev_lib.rst
index 2b513bbf82..dd636ba5ef 100644
--- a/doc/guides/prog_guide/cryptodev_lib.rst
+++ b/doc/guides/prog_guide/cryptodev_lib.rst
@@ -927,7 +927,7 @@ Asymmetric Cryptography
The cryptodev library currently provides support for the following asymmetric
Crypto operations; RSA, Modular exponentiation and inversion, Diffie-Hellman
and
Elliptic Curve Diffie-Hellman public and/or private key generation and shared
-secret compute, DSA Signature generation and verification.
+secret compute, DSA and EdDSA Signature generation and verification.
Session and Session Management
~~
diff --git a/lib/cryptodev/rte_crypto_asym.h b/lib/cryptodev/rte_crypto_asym.h
index 39d3da3952..11bb885d64 100644
--- a/lib/cryptodev/rte_crypto_asym.h
+++ b/lib/cryptodev/rte_crypto_asym.h
@@ -49,6 +49,10 @@ rte_crypto_asym_op_strings[];
* and if the flag is not set, shared secret will be padded to the left with
* zeros to the size of the underlying algorithm (default)
*/
+#define RTE_CRYPTO_ASYM_FLAG_PUB_KEY_COMPRESSEDRTE_BIT32(2)
+/**<
+ * Flag to denote public key will be returned in compressed form
+ */
/**
* List of elliptic curves. This enum aligns with
@@ -65,9 +69,22 @@ enum rte_crypto_curve_id {
RTE_CRYPTO_EC_GROUP_SECP256R1 = 23,
RTE_CRYPTO_EC_GROUP_SECP384R1 = 24,
RTE_CRYPTO_EC_GROUP_SECP521R1 = 25,
+ RTE_CRYPTO_EC_GROUP_ED25519 = 29,
+ RTE_CRYPTO_EC_GROUP_ED448 = 30,
RTE_CRYPTO_EC_GROUP_SM2 = 41,
};
+/**
+ * List of Edwards curve instances as per RFC 8032 (Section 5).
+ */
+enum rte_crypto_edward_instance {
+ RTE_CRYPTO_EDCURVE_25519,
+ RTE_CRYPTO_EDCURVE_25519CTX,
+ RTE_CRYPTO_EDCURVE_25519PH,
+ RTE_CRYPTO_EDCURVE_448,
+ RTE_CRYPTO_EDCURVE_448PH
+};
+
/**
* Asymmetric crypto transformation types.
* Each xform type maps to one asymmetric algorithm
@@ -119,6 +136,10 @@ enum rte_crypto_asym_xform_type {
* Performs Encrypt, Decrypt, Sign and Verify.
* Refer to rte_crypto_asym_op_type.
*/
+ RTE_CRYPTO_ASYM_XFORM_EDDSA,
+ /**< Edwards Curve Digital Signature Algorithm
+* Perform Signature Generation and Verification.
+*/
RTE_CRYPTO_ASYM_XFORM_TYPE_LIST_END
/**< End of list */
};
@@ -585,6 +606,31 @@ struct rte_crypto_ecdsa_op_param {
*/
};
+/**
+ * EDDSA operation params
+ */
+struct rte_crypto_eddsa_op_param {
+ enum rte_crypto_asym_op_type op_type;
+ /**< Signature generation or verification */
+
+ rte_crypto_param message;
+ /**< Input message digest to be signed or verified */
+
+ rte_crypto_param context;
+ /**< Context value for the sign op.
+* Must not be empty for Ed25519ctx instance.
+*/
+
+ enum rte_crypto_edward_instance instance;
+ /**< Type of Edwards curve. */
+
+ rte_crypto_uint sign;
+ /**< Edward curve signature
+* output : for signature generation
+* input : for signature verification
+*/
+};
+
/**
* Structure for EC point multiplication operation param
*/
@@ -720,6 +766,7 @@ struct rte_crypto_asym_op {
struct rte_crypto_ecdsa_op_param ecdsa;
struct rte_crypto_ecpm_op_param ecpm;
struct rte_crypto_sm2_op_param sm2;
+ struct rte_crypto_eddsa_op_param eddsa;
};
uint16_t flags;
/**<
--
2.21.0
[PATCH v2 1/6] cryptodev: add EDDSA asymmetric crypto algorithm
Add support for asymmetric EDDSA in cryptodev, as referenced in RFC:
https://datatracker.ietf.org/doc/html/rfc8032
Signed-off-by: Gowrishankar Muthukrishnan
---
doc/guides/cryptodevs/features/default.ini | 1 +
doc/guides/prog_guide/cryptodev_lib.rst| 2 +-
lib/cryptodev/rte_crypto_asym.h| 47 ++
3 files changed, 49 insertions(+), 1 deletion(-)
diff --git a/doc/guides/cryptodevs/features/default.ini
b/doc/guides/cryptodevs/features/default.ini
index f411d4bab7..3073753911 100644
--- a/doc/guides/cryptodevs/features/default.ini
+++ b/doc/guides/cryptodevs/features/default.ini
@@ -130,6 +130,7 @@ ECDSA =
ECPM=
ECDH=
SM2 =
+EDDSA =
;
; Supported Operating systems of a default crypto driver.
diff --git a/doc/guides/prog_guide/cryptodev_lib.rst
b/doc/guides/prog_guide/cryptodev_lib.rst
index 2b513bbf82..dd636ba5ef 100644
--- a/doc/guides/prog_guide/cryptodev_lib.rst
+++ b/doc/guides/prog_guide/cryptodev_lib.rst
@@ -927,7 +927,7 @@ Asymmetric Cryptography
The cryptodev library currently provides support for the following asymmetric
Crypto operations; RSA, Modular exponentiation and inversion, Diffie-Hellman
and
Elliptic Curve Diffie-Hellman public and/or private key generation and shared
-secret compute, DSA Signature generation and verification.
+secret compute, DSA and EdDSA Signature generation and verification.
Session and Session Management
~~
diff --git a/lib/cryptodev/rte_crypto_asym.h b/lib/cryptodev/rte_crypto_asym.h
index 39d3da3952..11bb885d64 100644
--- a/lib/cryptodev/rte_crypto_asym.h
+++ b/lib/cryptodev/rte_crypto_asym.h
@@ -49,6 +49,10 @@ rte_crypto_asym_op_strings[];
* and if the flag is not set, shared secret will be padded to the left with
* zeros to the size of the underlying algorithm (default)
*/
+#define RTE_CRYPTO_ASYM_FLAG_PUB_KEY_COMPRESSEDRTE_BIT32(2)
+/**<
+ * Flag to denote public key will be returned in compressed form
+ */
/**
* List of elliptic curves. This enum aligns with
@@ -65,9 +69,22 @@ enum rte_crypto_curve_id {
RTE_CRYPTO_EC_GROUP_SECP256R1 = 23,
RTE_CRYPTO_EC_GROUP_SECP384R1 = 24,
RTE_CRYPTO_EC_GROUP_SECP521R1 = 25,
+ RTE_CRYPTO_EC_GROUP_ED25519 = 29,
+ RTE_CRYPTO_EC_GROUP_ED448 = 30,
RTE_CRYPTO_EC_GROUP_SM2 = 41,
};
+/**
+ * List of Edwards curve instances as per RFC 8032 (Section 5).
+ */
+enum rte_crypto_edward_instance {
+ RTE_CRYPTO_EDCURVE_25519,
+ RTE_CRYPTO_EDCURVE_25519CTX,
+ RTE_CRYPTO_EDCURVE_25519PH,
+ RTE_CRYPTO_EDCURVE_448,
+ RTE_CRYPTO_EDCURVE_448PH
+};
+
/**
* Asymmetric crypto transformation types.
* Each xform type maps to one asymmetric algorithm
@@ -119,6 +136,10 @@ enum rte_crypto_asym_xform_type {
* Performs Encrypt, Decrypt, Sign and Verify.
* Refer to rte_crypto_asym_op_type.
*/
+ RTE_CRYPTO_ASYM_XFORM_EDDSA,
+ /**< Edwards Curve Digital Signature Algorithm
+* Perform Signature Generation and Verification.
+*/
RTE_CRYPTO_ASYM_XFORM_TYPE_LIST_END
/**< End of list */
};
@@ -585,6 +606,31 @@ struct rte_crypto_ecdsa_op_param {
*/
};
+/**
+ * EDDSA operation params
+ */
+struct rte_crypto_eddsa_op_param {
+ enum rte_crypto_asym_op_type op_type;
+ /**< Signature generation or verification */
+
+ rte_crypto_param message;
+ /**< Input message digest to be signed or verified */
+
+ rte_crypto_param context;
+ /**< Context value for the sign op.
+* Must not be empty for Ed25519ctx instance.
+*/
+
+ enum rte_crypto_edward_instance instance;
+ /**< Type of Edwards curve. */
+
+ rte_crypto_uint sign;
+ /**< Edward curve signature
+* output : for signature generation
+* input : for signature verification
+*/
+};
+
/**
* Structure for EC point multiplication operation param
*/
@@ -720,6 +766,7 @@ struct rte_crypto_asym_op {
struct rte_crypto_ecdsa_op_param ecdsa;
struct rte_crypto_ecpm_op_param ecpm;
struct rte_crypto_sm2_op_param sm2;
+ struct rte_crypto_eddsa_op_param eddsa;
};
uint16_t flags;
/**<
--
2.21.0
RE: [PATCH] doc: announce cryptodev changes to offload RSA in VirtIO
Hi Arek, > I do not have any particular security issues in mind here, and if PMD need to > copy keys internally, for alignment or padding purposes, redundancy problems > can be overcome. My concern was, that it is the more natural way of handling > the API; we have one key, multiple padding schemes, so we reflect this logic > in > the API. > > Both options are widely used; libcrypto, for example is setting padding within > session, other languages like Go, Rust are setting it as an argument to the > method of the key struct. > > If this is that problematic with VirtIO compatibility, I say this change is > okay. > Thank you for your input. I understand your concern. We ensure the impact Is nominal and make changes if needed. Thanks,
RE: [EXTERNAL] Re: [PATCH] doc: announce cryptodev change to support EDDSA
> It means we are not able to add an algo without breaking ABI. > Is it something we can improve? > Sure Thomas, we will address it in our patch, ensuring the long term solution as well. Regards, Gowrishankar
RE: [PATCH] doc: announce cryptodev changes to offload RSA in VirtIO
Hi, We need to fix padding info in DPDK as per VirtIO specification in order to support RSA in virtio devices. VirtIO-crypto specification and DPDK specification differs in the way padding is handled. With current DPDK & virtio specification, it is impossible to support RSA in virtio-crypto. If you think DPDK spec should not be modified, we will try to amend the virtIO spec to match DPDK, but since we do not know if the virtIO community would accept, can we merge the deprecation notice? Thanks, Gowrishankar ZjQcmQRYFpfptBannerEnd >>> +* cryptodev: The struct rte_crypto_rsa_padding will be moved from >>> + rte_crypto_rsa_op_param struct to rte_crypto_rsa_xform struct, >>> + breaking ABI. The new location is recommended to comply with >>> + virtio-crypto specification. Applications and drivers using >>> + this struct will be updated. >>> + >> The problem here, I see is that there is one private key but multiple >> combinations of padding. >> Therefore, for every padding variation, we need to copy the same private key >> anew, duplicating it in memory. >> The only reason for me to keep a session-like struct in asymmetric crypto >> was exactly this. > Each padding scheme in RSA has its own pros and cons (in terms of > implementations as well). > When we share the same private key for Sign (and its public key in case of > Encryption) between > multiple crypto ops (varying by padding schemes among cops), a vulnerable > attack against one scheme > could potentially open door to used private key in the session and hence take > advantage > on other crypto operations. > I think, this could be one reason for why VirtIO spec mandates padding info > as session parameter. > Hence, more than duplicating in memory, private and public keys are secured > and in catastrophe, > only that session could be destroyed. >>> +* cryptodev: The rte_crypto_rsa_xform struct member to hold private key >>> + in either exponent or quintuple format is changed from union to >>> +struct >>> + data type. This change is to support ASN.1 syntax (RFC 3447 Appendix >>> A.1.2). >>> + This change will not break existing applications. >>This one I agree. RFC 8017 obsoletes RFC 3447. > Thanks, > Gowrishankar
RE: [PATCH] doc: announce cryptodev changes to offload RSA in VirtIO
Hi ArkadiuszX, > + > +* cryptodev: The struct rte_crypto_rsa_padding will be moved from > + rte_crypto_rsa_op_param struct to rte_crypto_rsa_xform struct, > + breaking ABI. The new location is recommended to comply with > + virtio-crypto specification. Applications and drivers using > + this struct will be updated. > + The problem here, I see is that there is one private key but multiple combinations of padding. Therefore, for every padding variation, we need to copy the same private key anew, duplicating it in memory. The only reason for me to keep a session-like struct in asymmetric crypto was exactly this. Each padding scheme in RSA has its own pros and cons (in terms of implementations as well). When we share the same private key for Sign (and its public key in case of Encryption) between multiple crypto ops (varying by padding schemes among cops), a vulnerable attack against one scheme could potentially open door to used private key in the session and hence take advantage on other crypto operations. I think, this could be one reason for why VirtIO spec mandates padding info as session parameter. Hence, more than duplicating in memory, private and public keys are secured and in catastrophe, only that session could be destroyed. Please share your thoughts. > +* cryptodev: The rte_crypto_rsa_xform struct member to hold private key > + in either exponent or quintuple format is changed from union to > +struct > + data type. This change is to support ASN.1 syntax (RFC 3447 Appendix > A.1.2). > + This change will not break existing applications. This one I agree. RFC 8017 obsoletes RFC 3447. Thanks, Gowrishankar > -- > 2.21.0
RE: [PATCH] doc: announce cryptodev changes to offload RSA in VirtIO
> +* cryptodev: The struct rte_crypto_rsa_padding will be moved from > + rte_crypto_rsa_op_param struct to rte_crypto_rsa_xform struct, > + breaking ABI. The new location is recommended to comply with > + virtio-crypto specification. Applications and drivers using > + this struct will be updated. > + The problem here, I see is that there is one private key but multiple combinations of padding. Therefore, for every padding variation, we need to copy the same private key anew, duplicating it in memory. The only reason for me to keep a session-like struct in asymmetric crypto was exactly this. Each padding scheme in RSA has its own pros and cons (in terms of implementations as well). When we share the same private key for Sign (and its public key in case of Encryption) between multiple crypto ops (varying by padding schemes among cops), a vulnerable attack against one scheme could potentially open door to used private key in the session and hence take advantage on other crypto operations. I think, this could be one reason for why VirtIO spec mandates padding info as session parameter. Hence, more than duplicating in memory, private and public keys are secured and in catastrophe, only that session could be destroyed. Thanks, Gowrishankar Though padding schemes could be same > +* cryptodev: The rte_crypto_rsa_xform struct member to hold private key > + in either exponent or quintuple format is changed from union to > +struct > + data type. This change is to support ASN.1 syntax (RFC 3447 Appendix > A.1.2). > + This change will not break existing applications. This one I agree. RFC 8017 obsoletes RFC 3447. Thanks, Gowrishankar > -- > 2.21.0
RE: [EXTERNAL] Re: [PATCH] doc: announce vhost changes to support asymmetric operation
Sure Jerin. I’ll drop this proposal as ABI versioning could help. Thanks. Looks like in this case adding new arguments to function. Could you check ABI versing helps here? It seems like it can be easy manged with ABI versioning.
[PATCH] doc: announce vhost changes to support asymmetric operation
Announce vhost ABI changes to modify few functions to support asymmetric crypto operation. Signed-off-by: Gowrishankar Muthukrishnan -- RFC: https://patches.dpdk.org/project/dpdk/patch/20230928095300.1353-4-gmuthukri...@marvell.com/ --- doc/guides/rel_notes/deprecation.rst | 7 +++ 1 file changed, 7 insertions(+) diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst index 6948641ff6..2f5c2c5a34 100644 --- a/doc/guides/rel_notes/deprecation.rst +++ b/doc/guides/rel_notes/deprecation.rst @@ -147,3 +147,10 @@ Deprecation Notices will be deprecated and subsequently removed in DPDK 24.11 release. Before this, the new port library API (functions rte_swx_port_*) will gradually transition from experimental to stable status. + +* vhost: The function ``rte_vhost_crypto_create`` will accept a new parameter + to specify rte_mempool for asymmetric crypto session. The function + ``rte_vhost_crypto_finalize_requests`` will accept two new parameters, + where the first one is to specify vhost device id and other one is to specify + the virtio queue index. These two modifications are required to support + asymmetric crypto operation in vhost crypto and will break ABI. -- 2.21.0
[PATCH] doc: announce cryptodev changes to offload RSA in VirtIO
Announce cryptodev changes to offload RSA asymmetric operation in VirtIO PMD. Signed-off-by: Gowrishankar Muthukrishnan -- RFC: https://patches.dpdk.org/project/dpdk/patch/20230928095300.1353-2-gmuthukri...@marvell.com/ https://patches.dpdk.org/project/dpdk/patch/20230928095300.1353-3-gmuthukri...@marvell.com/ --- doc/guides/rel_notes/deprecation.rst | 11 +++ 1 file changed, 11 insertions(+) diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst index 6948641ff6..26fec84aba 100644 --- a/doc/guides/rel_notes/deprecation.rst +++ b/doc/guides/rel_notes/deprecation.rst @@ -147,3 +147,14 @@ Deprecation Notices will be deprecated and subsequently removed in DPDK 24.11 release. Before this, the new port library API (functions rte_swx_port_*) will gradually transition from experimental to stable status. + +* cryptodev: The struct rte_crypto_rsa_padding will be moved from + rte_crypto_rsa_op_param struct to rte_crypto_rsa_xform struct, + breaking ABI. The new location is recommended to comply with + virtio-crypto specification. Applications and drivers using + this struct will be updated. + +* cryptodev: The rte_crypto_rsa_xform struct member to hold private key + in either exponent or quintuple format is changed from union to struct + data type. This change is to support ASN.1 syntax (RFC 3447 Appendix A.1.2). + This change will not break existing applications. -- 2.21.0
[PATCH] doc: announce cryptodev change to support EDDSA
Announce the additions in cryptodev ABI to support EDDSA algorithm. Signed-off-by: Gowrishankar Muthukrishnan -- RFC: https://patches.dpdk.org/project/dpdk/patch/0ae6a1afadac64050d80b0fd7712c4a6a8599e2c.1701273963.git.gmuthukri...@marvell.com/ --- doc/guides/rel_notes/deprecation.rst | 4 1 file changed, 4 insertions(+) diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst index 6948641ff6..fcbec965b1 100644 --- a/doc/guides/rel_notes/deprecation.rst +++ b/doc/guides/rel_notes/deprecation.rst @@ -147,3 +147,7 @@ Deprecation Notices will be deprecated and subsequently removed in DPDK 24.11 release. Before this, the new port library API (functions rte_swx_port_*) will gradually transition from experimental to stable status. + +* cryptodev: The enum ``rte_crypto_asym_xform_type`` and struct ``rte_crypto_asym_op`` + will be extended to include new values to support EDDSA. This will break + ABI compatibility with existing applications that use these data types. -- 2.21.0
[PATCH v1] test/crypto: fix comparison function for modex values
Fix comparison function used by modex test to check from
first non-zero value itself.
Coverity issue: 430125
Fixes: 2162d32c1c3 ("test/crypto: validate modex from first non-zero")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 1d88832146..f0b5d38543 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -3197,21 +3197,26 @@ static int send_one(void)
}
static int
-modular_cmpeq(const uint8_t *a, const uint8_t *b, size_t len)
+modular_cmpeq(const uint8_t *a, size_t a_len, const uint8_t *b, size_t b_len)
{
- const uint8_t *new_a = a, *new_b = b;
+ const uint8_t *new_a, *new_b;
size_t i, j;
/* Strip leading NUL bytes */
- for (i = 0; i < len; i++)
+ for (i = 0; i < a_len; i++)
if (a[i] != 0)
- new_a = &a[i];
+ break;
- for (j = 0; j < len; j++)
+ for (j = 0; j < b_len; j++)
if (b[j] != 0)
- new_b = &b[i];
+ break;
+
+ if (a_len - i != b_len - j)
+ return 1;
- if (i != j || memcmp(new_a, new_b, len - i))
+ new_a = &a[i];
+ new_b = &b[j];
+ if (memcmp(new_a, new_b, a_len - i))
return 1;
return 0;
@@ -3251,7 +3256,7 @@ modular_exponentiation(const void *test_data)
TEST_ASSERT_SUCCESS(send_one(),
"Failed to process crypto op");
- TEST_ASSERT_SUCCESS(modular_cmpeq(vector->reminder.data,
+ TEST_ASSERT_SUCCESS(modular_cmpeq(vector->reminder.data,
vector->reminder.len,
self->result_op->asym->modex.result.data,
self->result_op->asym->modex.result.length),
"operation verification failed\n");
--
2.21.0
[PATCH v1] test/crypto: fix asymmetric capability test
Fix asymmetric capability test for below:
* Skip test if asymmetric crypto feature is not supported by device.
* Assert return value of RTE function to get asymmetric capability.
Coverity issue: 373365
Fixes: 2c6dab9cd93 ("test/crypto: add RSA and Mod tests")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 3802cf8022..1d88832146 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -626,7 +626,7 @@ test_capability(void)
RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO)) {
RTE_LOG(INFO, USER1,
"Device doesn't support asymmetric. Test
Skipped\n");
- return TEST_SUCCESS;
+ return TEST_SKIPPED;
}
/* print xform capability */
@@ -641,6 +641,7 @@ test_capability(void)
capa = rte_cryptodev_asym_capability_get(dev_id,
(const struct
rte_cryptodev_asym_capability_idx *) &idx);
+ TEST_ASSERT_NOT_NULL(capa, "Failed to get asymmetric
capability");
print_asym_capa(capa);
}
}
--
2.21.0
[PATCH v1] test/crypto: remove unused stats in test setup
Remove unused stats in test setup.
Coverity issue: 373869
Fixes: 2c6dab9cd93 ("test/crypto: add RSA and Mod tests")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index ef926c6229..3802cf8022 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -547,8 +547,6 @@ ut_setup_asym(void)
qp_id, ts_params->valid_devs[0]);
}
- rte_cryptodev_stats_reset(ts_params->valid_devs[0]);
-
/* Start the device */
TEST_ASSERT_SUCCESS(rte_cryptodev_start(ts_params->valid_devs[0]),
"Failed to start cryptodev %u",
@@ -561,7 +559,6 @@ static void
ut_teardown_asym(void)
{
struct crypto_testsuite_params_asym *ts_params = &testsuite_params;
- struct rte_cryptodev_stats stats;
uint8_t dev_id = ts_params->valid_devs[0];
if (self->sess != NULL)
@@ -571,8 +568,6 @@ ut_teardown_asym(void)
self->op = NULL;
self->result_op = NULL;
- rte_cryptodev_stats_get(ts_params->valid_devs[0], &stats);
-
/* Stop the device */
rte_cryptodev_stop(ts_params->valid_devs[0]);
}
--
2.21.0
[PATCH v2] examples/fips_validation: fix coverity issues
Fix NULL dereference, out-of-bound, bad bit shift issues
reported by coverity scan.
Coverity issue: 384440, 384435, 384433, 384429
Fixes: 36128a67c27 ("examples/fips_validation: add asymmetric validation")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Brian Dooley
---
v2:
- no changes
--
examples/fips_validation/fips_validation_rsa.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/examples/fips_validation/fips_validation_rsa.c
b/examples/fips_validation/fips_validation_rsa.c
index f675b51051..55f81860a0 100644
--- a/examples/fips_validation/fips_validation_rsa.c
+++ b/examples/fips_validation/fips_validation_rsa.c
@@ -328,6 +328,9 @@ parse_test_rsa_json_interim_writeback(struct fips_val *val)
if (prepare_vec_rsa() < 0)
return -1;
+ if (!vec.rsa.e.val)
+ return -1;
+
writeback_hex_str("", info.one_line_text, &vec.rsa.n);
obj = json_string(info.one_line_text);
json_object_set_new(json_info.json_write_group, "n", obj);
@@ -474,7 +477,7 @@ fips_test_randomize_message(struct fips_val *msg, struct
fips_val *rand)
uint16_t rv_len;
if (!msg->val || !rand->val || rand->len > RV_BUF_LEN
- || msg->len > FIPS_TEST_JSON_BUF_LEN)
+ || msg->len > (FIPS_TEST_JSON_BUF_LEN - 1))
return -EINVAL;
memset(rv, 0, sizeof(rv));
@@ -503,7 +506,7 @@ fips_test_randomize_message(struct fips_val *msg, struct
fips_val *rand)
m[i + j] ^= rv[j];
m[i + j] = ((uint8_t *)&rv_bitlen)[0];
- m[i + j + 1] = (((uint8_t *)&rv_bitlen)[1] >> 8) & 0xFF;
+ m[i + j + 1] = ((uint8_t *)&rv_bitlen)[1];
rte_free(msg->val);
msg->len = (rv_bitlen + m_bitlen + 16) / 8;
--
2.25.1
[PATCH v1] crypto/cnxk: minimal normalization on input
Fix modex to nomalize input only when MSW is zero.
Fixes: 5a3513caeb45 ("crypto/cnxk: add asymmetric session")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
drivers/crypto/cnxk/cnxk_ae.h | 30 +-
1 file changed, 21 insertions(+), 9 deletions(-)
diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h
index ea11e093bf..66277172c6 100644
--- a/drivers/crypto/cnxk/cnxk_ae.h
+++ b/drivers/crypto/cnxk/cnxk_ae.h
@@ -49,13 +49,22 @@ struct cnxk_ae_sess {
};
static __rte_always_inline void
-cnxk_ae_modex_param_normalize(uint8_t **data, size_t *len)
+cnxk_ae_modex_param_normalize(uint8_t **data, size_t *len, size_t max)
{
+ uint8_t msw_len = *len % 8;
+ uint64_t msw_val = 0;
size_t i;
- /* Strip leading NUL bytes */
- for (i = 0; i < *len; i++) {
- if ((*data)[i] != 0)
+ if (*len <= 8)
+ return;
+
+ memcpy(&msw_val, *data, msw_len);
+ if (msw_val != 0)
+ return;
+
+ for (i = msw_len; i < *len && (*len - i) < max; i += 8) {
+ memcpy(&msw_val, &(*data)[i], 8);
+ if (msw_val != 0)
break;
}
*data += i;
@@ -72,8 +81,8 @@ cnxk_ae_fill_modex_params(struct cnxk_ae_sess *sess,
uint8_t *exp = xform->modex.exponent.data;
uint8_t *mod = xform->modex.modulus.data;
- cnxk_ae_modex_param_normalize(&mod, &mod_len);
- cnxk_ae_modex_param_normalize(&exp, &exp_len);
+ cnxk_ae_modex_param_normalize(&mod, &mod_len, SIZE_MAX);
+ cnxk_ae_modex_param_normalize(&exp, &exp_len, mod_len);
if (unlikely(exp_len == 0 || mod_len == 0))
return -EINVAL;
@@ -282,7 +291,7 @@ cnxk_ae_modex_prep(struct rte_crypto_op *op, struct
roc_ae_buf_ptr *meta_buf,
struct rte_crypto_mod_op_param mod_op;
uint64_t total_key_len;
union cpt_inst_w4 w4;
- uint32_t base_len;
+ size_t base_len;
uint32_t dlen;
uint8_t *dptr;
@@ -290,8 +299,11 @@ cnxk_ae_modex_prep(struct rte_crypto_op *op, struct
roc_ae_buf_ptr *meta_buf,
base_len = mod_op.base.length;
if (unlikely(base_len > mod_len)) {
- op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
- return -ENOTSUP;
+ cnxk_ae_modex_param_normalize(&mod_op.base.data, &base_len,
mod_len);
+ if (base_len > mod_len) {
+ op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
+ return -ENOTSUP;
+ }
}
total_key_len = mod_len + exp_len;
--
2.25.1
[PATCH v3 3/3] test/crypto: add modex tests for zero padded operands
Add modex tests for zero padded operands, as in ASN encoding.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 16 +
app/test/test_cryptodev_mod_test_vectors.h | 75 ++
2 files changed, 91 insertions(+)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index fec53f87db..ef926c6229 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -3510,6 +3510,14 @@ static struct unit_test_suite
cryptodev_openssl_asym_testsuite = {
test_rsa_sign_verify_crt),
TEST_CASE_ST(ut_setup_asym, ut_teardown_asym, test_mod_inv),
TEST_CASE_ST(ut_setup_asym, ut_teardown_asym, test_mod_exp),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[0]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding (2)",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[1]),
TEST_CASE_NAMED_WITH_DATA(
"Modex Group 5 test",
ut_setup_asym, ut_teardown_asym,
@@ -3585,6 +3593,14 @@ static struct unit_test_suite
cryptodev_octeontx_asym_testsuite = {
TEST_CASE_ST(ut_setup_asym, ut_teardown_asym,
test_rsa_sign_verify_crt),
TEST_CASE_ST(ut_setup_asym, ut_teardown_asym, test_mod_exp),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[0]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding (2)",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[1]),
TEST_CASE_NAMED_WITH_DATA(
"Modex Group 5 test",
ut_setup_asym, ut_teardown_asym,
diff --git a/app/test/test_cryptodev_mod_test_vectors.h
b/app/test/test_cryptodev_mod_test_vectors.h
index a4e06c0291..34af2d73b7 100644
--- a/app/test/test_cryptodev_mod_test_vectors.h
+++ b/app/test/test_cryptodev_mod_test_vectors.h
@@ -265,6 +265,81 @@ struct rte_crypto_asym_xform modinv_xform = {
}
};
+static const struct
+modex_test_data modex_test_cases[] = {
+{
+ .description = "Modular Exponentiation (mod=20, base=20, exp=12,
res=18)",
+ .xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,
+ .base = {
+ .data = {
+ 0x00, 0x00, 0x45, 0xCA, 0x2C, 0x5C, 0x3A, 0x90,
+ 0x00, 0xC4, 0xD7, 0x47, 0xA8, 0x2B, 0x12, 0x07,
+ 0xBD, 0x1F, 0xD7, 0x81
+ },
+ .len = 20
+ },
+ .exponent = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x75, 0x74, 0x19, 0x19, 0x69,
+ 0xBF, 0x15, 0x2A, 0xAC
+ },
+ .len = 12
+ },
+ .reminder = {
+ .data = {
+ 0x5c, 0x94, 0x8f, 0x00, 0x79, 0xe3, 0xe1, 0x0b,
+ 0x3f, 0x3e, 0x36, 0x75, 0xed, 0x1d, 0x84, 0xc6,
+ 0x36, 0x9e
+ },
+ .len = 18
+ },
+ .modulus = {
+ .data = {
+ 0x00, 0x00, 0x99, 0x28, 0x09, 0x8A, 0xE9, 0x89,
+ 0xBB, 0x81, 0x3B, 0x07, 0x0E, 0x31, 0x00, 0x7F,
+ 0x79, 0x97, 0xED, 0x35
+ },
+ .len = 20
+ }
+},
+{
+ .description = "Modular Exponentiation (mod=32, base=20, exp=12,
res=17)",
+ .xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,
+ .base = {
+ .data = {
+ 0x01, 0x31, 0x72, 0xFB, 0x81, 0x9D, 0x81, 0x7A,
+ 0x91, 0xDC, 0xE6, 0x6C, 0x2D, 0x55, 0xD9, 0x25,
+ 0x7A, 0xB2, 0xFF, 0xFF
+ },
+ .len = 20
+ },
+ .exponent = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x02, 0x36, 0x38, 0x31, 0x47,
+ 0x3C, 0x07, 0x36, 0x21
+ },
+ .len = 12
+ },
+ .reminder = {
+ .data = {
+ 0x02, 0x99, 0x2F, 0xE3, 0x00, 0x9F, 0xF0, 0x9E,
+ 0x65, 0x3C, 0x0B, 0x4A, 0xD3, 0x1B, 0x7C, 0x7F,
+ 0x1C
+ },
+ .len = 17
+ },
+ .modulus = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x00
[PATCH v3 2/3] test/crypto: remove unused variable in modex test data
Remove unused result_len from modex test data.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_mod_test_vectors.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/app/test/test_cryptodev_mod_test_vectors.h
b/app/test/test_cryptodev_mod_test_vectors.h
index c773c37018..a4e06c0291 100644
--- a/app/test/test_cryptodev_mod_test_vectors.h
+++ b/app/test/test_cryptodev_mod_test_vectors.h
@@ -27,7 +27,6 @@ struct modex_test_data {
uint8_t data[DATA_SIZE];
uint16_t len;
} reminder;
- uint16_t result_len;
};
struct modinv_test_data {
enum rte_crypto_asym_xform_type xform_type;
@@ -44,7 +43,6 @@ struct modinv_test_data {
uint8_t data[DATA_SIZE];
uint16_t len;
} inverse;
- uint16_t result_len;
};
/* ModExp #1 */
@@ -109,7 +107,6 @@ modex_test_data modex_test_case_m128_b20_e3 = {
},
.len = 128
},
- .result_len = 128
};
/* ModInv #1 */
@@ -167,7 +164,6 @@ modinv_test_data modinv_test_case = {
},
.len = 128
},
- .result_len = 128
};
/* modular operation test data */
@@ -347,7 +343,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 192
},
- .result_len = 192
},
{
.description = "Modular Exponentiation tests for Group 14",
@@ -442,7 +437,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 256
},
- .result_len = 256
},
{
.description = "Modular Exponentiation tests for Group 15",
@@ -571,7 +565,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 384
},
- .result_len = 384
},
{
.description = "Modular Exponentiation tests for Group 16",
@@ -733,7 +726,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 512
},
- .result_len = 512
},
{
.description = "Modular Exponentiation tests for Group 17",
@@ -960,7 +952,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 768
},
- .result_len = 768
},
{
.description = "Modular Exponentiation tests for Group 18",
@@ -1252,7 +1243,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 1024
},
- .result_len = 1024
},
};
--
2.25.1
[PATCH v3 1/3] test/crypto: validate modex result from first nonzero value
At present, there is no specification of whether modex op output
can carry leading zeroes without changing the value. OpenSSL strips
leading zeroes, but other hardware need not be. Hence, when output
is compared against expected result, validation could start from
first non-zero.
Fixes: 1ffefe00f1 ("test/crypto: add modexp and modinv functions")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 2c745a7f7c..fec53f87db 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -3200,6 +3200,27 @@ static int send_one(void)
return TEST_SUCCESS;
}
+static int
+modular_cmpeq(const uint8_t *a, const uint8_t *b, size_t len)
+{
+ const uint8_t *new_a = a, *new_b = b;
+ size_t i, j;
+
+ /* Strip leading NUL bytes */
+ for (i = 0; i < len; i++)
+ if (a[i] != 0)
+ new_a = &a[i];
+
+ for (j = 0; j < len; j++)
+ if (b[j] != 0)
+ new_b = &b[i];
+
+ if (i != j || memcmp(new_a, new_b, len - i))
+ return 1;
+
+ return 0;
+}
+
static int
modular_exponentiation(const void *test_data)
{
@@ -3234,9 +3255,9 @@ modular_exponentiation(const void *test_data)
TEST_ASSERT_SUCCESS(send_one(),
"Failed to process crypto op");
- TEST_ASSERT_BUFFERS_ARE_EQUAL(vector->reminder.data,
+ TEST_ASSERT_SUCCESS(modular_cmpeq(vector->reminder.data,
self->result_op->asym->modex.result.data,
- self->result_op->asym->modex.result.length,
+ self->result_op->asym->modex.result.length),
"operation verification failed\n");
return TEST_SUCCESS;
--
2.25.1
[PATCH v3 0/3] test/crypto: add modex test for zero padding
This patch series add modex test for zero padded operands v3: - removed patch to use common test function which will be addressed seperately due to document conflict. Gowrishankar Muthukrishnan (3): test/crypto: validate modex result from first nonzero value test/crypto: remove unused variable in modex test data test/crypto: add modex tests for zero padded operands app/test/test_cryptodev_asym.c | 41 ++- app/test/test_cryptodev_mod_test_vectors.h | 85 +++--- 2 files changed, 114 insertions(+), 12 deletions(-) -- 2.25.1
[PATCH v2 6/6] app/crypto-perf: support ECDSA
Added support for ECDSA SECP256R1 curve SIGN and VERIFY operations.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_ops.c | 57 ++
app/test-crypto-perf/cperf_options.h | 2 +
app/test-crypto-perf/cperf_options_parsing.c | 10 ++-
app/test-crypto-perf/cperf_test_common.c | 1 +
app/test-crypto-perf/cperf_test_vectors.c| 83
app/test-crypto-perf/cperf_test_vectors.h| 12 +++
app/test-crypto-perf/main.c | 18 +
doc/guides/tools/cryptoperf.rst | 1 +
8 files changed, 182 insertions(+), 2 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index f0860a46c0..62b165124f 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -34,6 +34,39 @@ cperf_set_ops_asym_modex(struct rte_crypto_op **ops,
}
}
+static void
+cperf_set_ops_asym_ecdsa(struct rte_crypto_op **ops,
+ uint32_t src_buf_offset __rte_unused,
+ uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+ void *sess,
+ const struct cperf_options *options,
+ const struct cperf_test_vector *test_vector __rte_unused,
+ uint16_t iv_offset __rte_unused,
+ uint32_t *imix_idx __rte_unused,
+ uint64_t *tsc_start __rte_unused)
+{
+ uint16_t i;
+
+ for (i = 0; i < nb_ops; i++) {
+ struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+ ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+ rte_crypto_op_attach_asym_session(ops[i], sess);
+
+ asym_op->ecdsa.op_type = options->asym_op_type;
+ asym_op->ecdsa.message.data =
options->secp256r1_data->message.data;
+ asym_op->ecdsa.message.length =
options->secp256r1_data->message.length;
+
+ asym_op->ecdsa.k.data = options->secp256r1_data->k.data;
+ asym_op->ecdsa.k.length = options->secp256r1_data->k.length;
+
+ asym_op->ecdsa.r.data = options->secp256r1_data->sign_r.data;
+ asym_op->ecdsa.r.length =
options->secp256r1_data->sign_r.length;
+ asym_op->ecdsa.s.data = options->secp256r1_data->sign_s.data;
+ asym_op->ecdsa.s.length =
options->secp256r1_data->sign_s.length;
+ }
+}
+
static void
cperf_set_ops_asym_sm2(struct rte_crypto_op **ops,
uint32_t src_buf_offset __rte_unused,
@@ -974,6 +1007,27 @@ cperf_create_session(struct rte_mempool *sess_mp,
return asym_sess;
}
+ if (options->op_type == CPERF_ASYM_SECP256R1) {
+ xform.next = NULL;
+ xform.xform_type = RTE_CRYPTO_ASYM_XFORM_ECDSA;
+ xform.ec.curve_id = options->secp256r1_data->curve;
+ xform.ec.pkey.data = options->secp256r1_data->pkey.data;
+ xform.ec.pkey.length = options->secp256r1_data->pkey.length;
+ xform.ec.q.x.data = options->secp256r1_data->pubkey_qx.data;
+ xform.ec.q.x.length = options->secp256r1_data->pubkey_qx.length;
+ xform.ec.q.y.data = options->secp256r1_data->pubkey_qy.data;
+ xform.ec.q.y.length = options->secp256r1_data->pubkey_qy.length;
+
+ ret = rte_cryptodev_asym_session_create(dev_id, &xform,
+ sess_mp, &asym_sess);
+ if (ret < 0) {
+ RTE_LOG(ERR, USER1, "ECDSA Asym session create
failed\n");
+ return NULL;
+ }
+
+ return asym_sess;
+ }
+
if (options->op_type == CPERF_ASYM_SM2) {
xform.next = NULL;
xform.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2;
@@ -1294,6 +1348,9 @@ cperf_get_op_functions(const struct cperf_options
*options,
case CPERF_ASYM_MODEX:
op_fns->populate_ops = cperf_set_ops_asym_modex;
break;
+ case CPERF_ASYM_SECP256R1:
+ op_fns->populate_ops = cperf_set_ops_asym_ecdsa;
+ break;
case CPERF_ASYM_SM2:
op_fns->populate_ops = cperf_set_ops_asym_sm2;
break;
diff --git a/app/test-crypto-perf/cperf_options.h
b/app/test-crypto-perf/cperf_options.h
index d730ae18d0..9364c030c0 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -87,6 +87,7 @@ enum cperf_op_type {
CPERF_DOCSIS,
CPERF_IPSEC,
CPERF_ASYM_MODEX,
+ CPERF_ASYM_SECP256R1,
CPERF_ASYM_SM2,
CPERF_TLS,
};
@@ -165,6 +166,7 @@ struct cperf_options {
uint8_t imix_distribution_count;
struct cperf_modex_test_data *modex_data;
[PATCH v2 5/6] app/crypto-perf: support SM2
From: Akhil Goyal
Added support for SM2 asymmetric crypto performance.
A new command line option is added to specify
asymmetric operation type `--asym-op Type`.
Type can be sign/verify/encrypt/decrypt.
Example command:
./dpdk-test-crypto-perf --vdev crypto_openssl -c 0x30 -- \
--devtype crypto_openssl --ptest throughput --optype sm2 \
--total-ops 1 --asym-op sign
Signed-off-by: Akhil Goyal
---
app/test-crypto-perf/cperf_ops.c | 69 ++-
app/test-crypto-perf/cperf_options.h | 6 +
app/test-crypto-perf/cperf_options_parsing.c | 55 -
app/test-crypto-perf/cperf_test_common.c | 3 +-
app/test-crypto-perf/cperf_test_vectors.c| 120 +++
app/test-crypto-perf/cperf_test_vectors.h| 25
app/test-crypto-perf/main.c | 61 ++
doc/guides/tools/cryptoperf.rst | 6 +
8 files changed, 341 insertions(+), 4 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index a802281a71..f0860a46c0 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -10,7 +10,7 @@
#include "cperf_test_vectors.h"
static void
-cperf_set_ops_asym(struct rte_crypto_op **ops,
+cperf_set_ops_asym_modex(struct rte_crypto_op **ops,
uint32_t src_buf_offset __rte_unused,
uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
void *sess,
@@ -34,6 +34,47 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
}
}
+static void
+cperf_set_ops_asym_sm2(struct rte_crypto_op **ops,
+ uint32_t src_buf_offset __rte_unused,
+ uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+ void *sess,
+ const struct cperf_options *options,
+ const struct cperf_test_vector *test_vector __rte_unused,
+ uint16_t iv_offset __rte_unused,
+ uint32_t *imix_idx __rte_unused,
+ uint64_t *tsc_start __rte_unused)
+{
+ uint16_t i;
+
+ for (i = 0; i < nb_ops; i++) {
+ struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+ ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+ rte_crypto_op_attach_asym_session(ops[i], sess);
+
+ /* Populate op with operational details */
+ asym_op->sm2.hash = options->asym_hash_alg;
+
+ asym_op->sm2.op_type = options->asym_op_type;
+ asym_op->sm2.message.data = options->sm2_data->message.data;
+ asym_op->sm2.message.length = options->sm2_data->message.length;
+ asym_op->sm2.cipher.data = options->sm2_data->cipher.data;
+ asym_op->sm2.cipher.length = options->sm2_data->cipher.length;
+ asym_op->sm2.id.data = options->sm2_data->id.data;
+ asym_op->sm2.id.length = options->sm2_data->id.length;
+
+ asym_op->sm2.k.data = options->sm2_data->k.data;
+ asym_op->sm2.k.length = options->sm2_data->k.length;
+
+ asym_op->sm2.r.data = options->sm2_data->sign_r.data;
+ asym_op->sm2.r.length = options->sm2_data->sign_r.length;
+ asym_op->sm2.s.data = options->sm2_data->sign_s.data;
+ asym_op->sm2.s.length = options->sm2_data->sign_s.length;
+ }
+}
+
+
#ifdef RTE_LIB_SECURITY
static void
test_ipsec_vec_populate(struct rte_mbuf *m, const struct cperf_options
*options,
@@ -932,6 +973,27 @@ cperf_create_session(struct rte_mempool *sess_mp,
}
return asym_sess;
}
+
+ if (options->op_type == CPERF_ASYM_SM2) {
+ xform.next = NULL;
+ xform.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2;
+ xform.ec.curve_id = options->sm2_data->curve;
+ xform.ec.pkey.data = options->sm2_data->pkey.data;
+ xform.ec.pkey.length = options->sm2_data->pkey.length;
+ xform.ec.q.x.data = options->sm2_data->pubkey_qx.data;
+ xform.ec.q.x.length = options->sm2_data->pubkey_qx.length;
+ xform.ec.q.y.data = options->sm2_data->pubkey_qy.data;
+ xform.ec.q.y.length = options->sm2_data->pubkey_qy.length;
+
+ ret = rte_cryptodev_asym_session_create(dev_id, &xform,
+ sess_mp, &asym_sess);
+ if (ret < 0) {
+ RTE_LOG(ERR, USER1, "SM2 Asym session create failed\n");
+ return NULL;
+ }
+
+ return asym_sess;
+ }
#ifdef RTE_LIB_SECURITY
/*
* security only
@@ -1230,7 +1292,10 @@ cperf_get_op_functions(const struct cperf_options
*options,
op_fns->populate_ops = cperf_set_ops_cipher;
break;
case CPERF_ASYM_MODEX:
- op_fns->populate_ops = cperf_set_ops_asym;
+ op_fns->pop
[PATCH v2 4/6] app/crypto-perf: add function to check asymmetric operation
Replace checking input option for every asymmetric test case by
a function.
Signed-off-by: Gowrishankar Muthukrishnan
---
v2:
- cperf_is_asym_test is fixed to check only modex in this patch.
---
app/test-crypto-perf/cperf_test_common.c | 11 ++-
app/test-crypto-perf/cperf_test_common.h | 2 ++
app/test-crypto-perf/cperf_test_latency.c| 7 ---
app/test-crypto-perf/cperf_test_throughput.c | 2 +-
app/test-crypto-perf/cperf_test_verify.c | 2 +-
app/test-crypto-perf/main.c | 8
6 files changed, 22 insertions(+), 10 deletions(-)
diff --git a/app/test-crypto-perf/cperf_test_common.c
b/app/test-crypto-perf/cperf_test_common.c
index 6b8ab65731..0f1f0b72c1 100644
--- a/app/test-crypto-perf/cperf_test_common.c
+++ b/app/test-crypto-perf/cperf_test_common.c
@@ -152,7 +152,7 @@ cperf_alloc_common_memory(const struct cperf_options
*options,
uint16_t crypto_op_size = sizeof(struct rte_crypto_op);
uint16_t crypto_op_private_size;
- if (options->op_type == CPERF_ASYM_MODEX) {
+ if (cperf_is_asym_test(options)) {
crypto_op_size += sizeof(struct rte_crypto_asym_op);
snprintf(pool_name, RTE_MEMPOOL_NAMESIZE, "perf_asym_op_pool%u",
rte_socket_id());
@@ -301,3 +301,12 @@ cperf_mbuf_set(struct rte_mbuf *mbuf,
mbuf = mbuf->next;
}
}
+
+bool
+cperf_is_asym_test(const struct cperf_options *options)
+{
+ if (options->op_type == CPERF_ASYM_MODEX)
+ return true;
+
+ return false;
+}
diff --git a/app/test-crypto-perf/cperf_test_common.h
b/app/test-crypto-perf/cperf_test_common.h
index a603a607d5..2d1f69aaa2 100644
--- a/app/test-crypto-perf/cperf_test_common.h
+++ b/app/test-crypto-perf/cperf_test_common.h
@@ -26,4 +26,6 @@ cperf_mbuf_set(struct rte_mbuf *mbuf,
const struct cperf_options *options,
const struct cperf_test_vector *test_vector);
+bool
+cperf_is_asym_test(const struct cperf_options *options);
#endif /* _CPERF_TEST_COMMON_H_ */
diff --git a/app/test-crypto-perf/cperf_test_latency.c
b/app/test-crypto-perf/cperf_test_latency.c
index 376847e761..201815b469 100644
--- a/app/test-crypto-perf/cperf_test_latency.c
+++ b/app/test-crypto-perf/cperf_test_latency.c
@@ -47,7 +47,7 @@ cperf_latency_test_free(struct cperf_latency_ctx *ctx)
return;
if (ctx->sess != NULL) {
- if (ctx->options->op_type == CPERF_ASYM_MODEX)
+ if (cperf_is_asym_test(ctx->options))
rte_cryptodev_asym_session_free(ctx->dev_id, ctx->sess);
#ifdef RTE_LIB_SECURITY
else if (ctx->options->op_type == CPERF_PDCP ||
@@ -217,8 +217,9 @@ cperf_latency_test_runner(void *arg)
&imix_idx, &tsc_start);
/* Populate the mbuf with the test vector */
- for (i = 0; i < burst_size; i++)
- cperf_mbuf_set(ops[i]->sym->m_src,
+ if (!cperf_is_asym_test(ctx->options))
+ for (i = 0; i < burst_size; i++)
+ cperf_mbuf_set(ops[i]->sym->m_src,
ctx->options,
ctx->test_vector);
diff --git a/app/test-crypto-perf/cperf_test_throughput.c
b/app/test-crypto-perf/cperf_test_throughput.c
index c0891e7c99..7112b95529 100644
--- a/app/test-crypto-perf/cperf_test_throughput.c
+++ b/app/test-crypto-perf/cperf_test_throughput.c
@@ -37,7 +37,7 @@ cperf_throughput_test_free(struct cperf_throughput_ctx *ctx)
if (!ctx)
return;
if (ctx->sess) {
- if (ctx->options->op_type == CPERF_ASYM_MODEX)
+ if (cperf_is_asym_test(ctx->options))
rte_cryptodev_asym_session_free(ctx->dev_id,
(void *)ctx->sess);
#ifdef RTE_LIB_SECURITY
diff --git a/app/test-crypto-perf/cperf_test_verify.c
b/app/test-crypto-perf/cperf_test_verify.c
index 222c7a1cd8..91429841ca 100644
--- a/app/test-crypto-perf/cperf_test_verify.c
+++ b/app/test-crypto-perf/cperf_test_verify.c
@@ -42,7 +42,7 @@ cperf_verify_test_free(struct cperf_verify_ctx *ctx)
return;
if (ctx->sess != NULL) {
- if (ctx->options->op_type == CPERF_ASYM_MODEX)
+ if (cperf_is_asym_test(ctx->options))
rte_cryptodev_asym_session_free(ctx->dev_id, ctx->sess);
#ifdef RTE_LIB_SECURITY
else if (ctx->options->op_type == CPERF_PDCP ||
diff --git a/app/test-crypto-perf/main.c b/app/test-crypto-perf/main.c
index 40c0b4b54f..780f22f399 100644
--- a/app/test-crypto-perf/main.c
+++ b/app/test-crypto-perf/ma
[PATCH v2 3/6] app/crypto-perf: fix result location for asymmetric test
For asymmetric op, private test data should be stored after
rte_crypto_asym_op struct.
Fixes: a538d1d2d01e ("test/crypto-perf: extend asymmetric crypto throughput
test")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_test_common.c | 6 --
app/test-crypto-perf/cperf_test_latency.c | 14 +++---
2 files changed, 15 insertions(+), 5 deletions(-)
diff --git a/app/test-crypto-perf/cperf_test_common.c
b/app/test-crypto-perf/cperf_test_common.c
index 94d39fb177..6b8ab65731 100644
--- a/app/test-crypto-perf/cperf_test_common.c
+++ b/app/test-crypto-perf/cperf_test_common.c
@@ -149,11 +149,11 @@ cperf_alloc_common_memory(const struct cperf_options
*options,
int ret;
/* Calculate the object size */
- uint16_t crypto_op_size = sizeof(struct rte_crypto_op) +
- sizeof(struct rte_crypto_sym_op);
+ uint16_t crypto_op_size = sizeof(struct rte_crypto_op);
uint16_t crypto_op_private_size;
if (options->op_type == CPERF_ASYM_MODEX) {
+ crypto_op_size += sizeof(struct rte_crypto_asym_op);
snprintf(pool_name, RTE_MEMPOOL_NAMESIZE, "perf_asym_op_pool%u",
rte_socket_id());
*pool = rte_crypto_op_pool_create(
@@ -170,6 +170,8 @@ cperf_alloc_common_memory(const struct cperf_options
*options,
return 0;
}
+ crypto_op_size += sizeof(struct rte_crypto_sym_op);
+
/*
* If doing AES-CCM, IV field needs to be 16 bytes long,
* and AAD field needs to be long enough to have 18 bytes,
diff --git a/app/test-crypto-perf/cperf_test_latency.c
b/app/test-crypto-perf/cperf_test_latency.c
index b8ad6bf4d4..376847e761 100644
--- a/app/test-crypto-perf/cperf_test_latency.c
+++ b/app/test-crypto-perf/cperf_test_latency.c
@@ -122,7 +122,11 @@ store_timestamp(struct rte_crypto_op *op, uint64_t
timestamp)
{
struct priv_op_data *priv_data;
- priv_data = (struct priv_op_data *) (op->sym + 1);
+ if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC)
+ priv_data = (struct priv_op_data *) (op->sym + 1);
+ else
+ priv_data = (struct priv_op_data *) (op->asym + 1);
+
priv_data->result->status = op->status;
priv_data->result->tsc_end = timestamp;
}
@@ -251,9 +255,13 @@ cperf_latency_test_runner(void *arg)
ctx->res[tsc_idx].tsc_start = tsc_start;
/*
* Private data structure starts after the end
of the
-* rte_crypto_sym_op structure.
+* rte_crypto_sym_op (or rte_crypto_asym_op)
structure.
*/
- priv_data = (struct priv_op_data *)
(ops[i]->sym + 1);
+ if (ops[i]->type ==
RTE_CRYPTO_OP_TYPE_SYMMETRIC)
+ priv_data = (struct priv_op_data *)
(ops[i]->sym + 1);
+ else
+ priv_data = (struct priv_op_data *)
(ops[i]->asym + 1);
+
priv_data->result = (void *)&ctx->res[tsc_idx];
tsc_idx++;
}
--
2.25.1
[PATCH v2 2/6] app/crypto-perf: remove redundant local varriable
Remove redundant local variable used for asym session.
Fixes: a29bb248988 ("cryptodev: hide asymmetric session structure")
Fixes: 2973dbf93b4 ("security: hide session structure")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_ops.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 4ca001b721..a802281a71 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -21,7 +21,6 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
uint64_t *tsc_start __rte_unused)
{
uint16_t i;
- void *asym_sess = (void *)sess;
for (i = 0; i < nb_ops; i++) {
struct rte_crypto_asym_op *asym_op = ops[i]->asym;
@@ -31,7 +30,7 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
asym_op->modex.base.length = options->modex_data->base.len;
asym_op->modex.result.data = options->modex_data->result.data;
asym_op->modex.result.length = options->modex_data->result.len;
- rte_crypto_op_attach_asym_session(ops[i], asym_sess);
+ rte_crypto_op_attach_asym_session(ops[i], sess);
}
}
@@ -62,7 +61,6 @@ cperf_set_ops_security(struct rte_crypto_op **ops,
for (i = 0; i < nb_ops; i++) {
struct rte_crypto_sym_op *sym_op = ops[i]->sym;
- void *sec_sess = (void *)sess;
uint32_t buf_sz;
uint32_t *per_pkt_hfn = rte_crypto_op_ctod_offset(ops[i],
@@ -70,7 +68,7 @@ cperf_set_ops_security(struct rte_crypto_op **ops,
*per_pkt_hfn = options->pdcp_ses_hfn_en ? 0 : PDCP_DEFAULT_HFN;
ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
- rte_security_attach_session(ops[i], sec_sess);
+ rte_security_attach_session(ops[i], sess);
sym_op->m_src = (struct rte_mbuf *)((uint8_t *)ops[i] +
src_buf_offset);
@@ -127,7 +125,6 @@ cperf_set_ops_security_ipsec(struct rte_crypto_op **ops,
uint16_t iv_offset __rte_unused, uint32_t *imix_idx,
uint64_t *tsc_start)
{
- void *sec_sess = sess;
const uint32_t test_buffer_size = options->test_buffer_size;
uint64_t tsc_start_temp, tsc_end_temp;
uint16_t i = 0;
@@ -140,7 +137,7 @@ cperf_set_ops_security_ipsec(struct rte_crypto_op **ops,
uint32_t offset = test_buffer_size;
ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
- rte_security_attach_session(ops[i], sec_sess);
+ rte_security_attach_session(ops[i], sess);
sym_op->m_src = (struct rte_mbuf *)((uint8_t *)ops[i] +
src_buf_offset);
sym_op->m_src->pkt_len = test_buffer_size;
--
2.25.1
[PATCH v2 1/6] app/crypto-perf: add modex groups test
Add perf tests for modex groups 5, 14, 15, 16, 17 and 18
based on RFC 3526.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_test_vectors.c | 570 +-
app/test-crypto-perf/cperf_test_vectors.h | 4 +-
2 files changed, 571 insertions(+), 3 deletions(-)
diff --git a/app/test-crypto-perf/cperf_test_vectors.c
b/app/test-crypto-perf/cperf_test_vectors.c
index 3c35eea460..de43d303a5 100644
--- a/app/test-crypto-perf/cperf_test_vectors.c
+++ b/app/test-crypto-perf/cperf_test_vectors.c
@@ -8,7 +8,7 @@
#include "cperf_test_vectors.h"
struct
-cperf_modex_test_data modex_perf_data[4] = {
+cperf_modex_test_data modex_perf_data[10] = {
{
.base = {
.data = {
@@ -233,6 +233,574 @@ cperf_modex_test_data modex_perf_data[4] = {
.result = {
.len = 448
}
+ },
+ {
+ .base = {
+ .data = {
+ 0x02,
+ },
+ .len = 1
+ },
+ .exponent = {
+ .data = {
+0x6C, 0x80, 0xFF, 0x29, 0xF9, 0x27, 0x2E, 0x6D,
+0xE1, 0xB7, 0x3F, 0x13, 0x77, 0xD2, 0x3E, 0x49,
+0xCE, 0xAE, 0xBD, 0x73, 0x7A, 0x0F, 0xE7, 0xA4,
+0x20, 0x49, 0x72, 0x87, 0x4E, 0x1B
+ },
+ .len = 30
+ },
+ .modulus = {
+ .data = {
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xC9, 0x0F, 0xDA, 0xA2, 0x21, 0x68, 0xC2, 0x34,
+ 0xC4, 0xC6, 0x62, 0x8B, 0x80, 0xDC, 0x1C, 0xD1,
+ 0x29, 0x02, 0x4E, 0x08, 0x8A, 0x67, 0xCC, 0x74,
+ 0x02, 0x0B, 0xBE, 0xA6, 0x3B, 0x13, 0x9B, 0x22,
+ 0x51, 0x4A, 0x08, 0x79, 0x8E, 0x34, 0x04, 0xDD,
+ 0xEF, 0x95, 0x19, 0xB3, 0xCD, 0x3A, 0x43, 0x1B,
+ 0x30, 0x2B, 0x0A, 0x6D, 0xF2, 0x5F, 0x14, 0x37,
+ 0x4F, 0xE1, 0x35, 0x6D, 0x6D, 0x51, 0xC2, 0x45,
+ 0xE4, 0x85, 0xB5, 0x76, 0x62, 0x5E, 0x7E, 0xC6,
+ 0xF4, 0x4C, 0x42, 0xE9, 0xA6, 0x37, 0xED, 0x6B,
+ 0x0B, 0xFF, 0x5C, 0xB6, 0xF4, 0x06, 0xB7, 0xED,
+ 0xEE, 0x38, 0x6B, 0xFB, 0x5A, 0x89, 0x9F, 0xA5,
+ 0xAE, 0x9F, 0x24, 0x11, 0x7C, 0x4B, 0x1F, 0xE6,
+ 0x49, 0x28, 0x66, 0x51, 0xEC, 0xE4, 0x5B, 0x3D,
+ 0xC2, 0x00, 0x7C, 0xB8, 0xA1, 0x63, 0xBF, 0x05,
+ 0x98, 0xDA, 0x48, 0x36, 0x1C, 0x55, 0xD3, 0x9A,
+ 0x69, 0x16, 0x3F, 0xA8, 0xFD, 0x24, 0xCF, 0x5F,
+ 0x83, 0x65, 0x5D, 0x23, 0xDC, 0xA3, 0xAD, 0x96,
+ 0x1C, 0x62, 0xF3, 0x56, 0x20, 0x85, 0x52, 0xBB,
+ 0x9E, 0xD5, 0x29, 0x07, 0x70, 0x96, 0x96, 0x6D,
+ 0x67, 0x0C, 0x35, 0x4E, 0x4A, 0xBC, 0x98, 0x04,
+ 0xF1, 0x74, 0x6C, 0x08, 0xCA, 0x23, 0x73, 0x27,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
+ },
+ .len = 192
+ },
+ .result = {
+ .len = 192
+ }
+ },
+ {
+ .base = {
+ .data = {
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ },
+ .len = 64
+ },
+ .exponent = {
+ .data = {
+ 0x8E, 0x4E, 0x41, 0xA2, 0xE0, 0x59, 0xA8, 0x29,
+ 0x71, 0xF6, 0x21, 0xC9, 0xD5, 0x0E, 0x36, 0x0F,
+ 0x59, 0xD6, 0x74, 0x4C, 0x3A, 0xC7, 0x13, 0x5E,
+ 0x7D, 0x2D, 0x43, 0x63, 0x5A, 0x3D, 0xCA, 0x5F,
+ 0xF7, 0xB2, 0x3D, 0x9C, 0x3F, 0xA1,
[PATCH v2 0/6] app/crypto-perf: add asymmetric crypto tests
This patch series adds below asymmetric tests in crypto-perf tool: * MODEX group tests (RFC 3526) * SM2 tests * ECDSA P256R1 tests Akhil Goyal (1): app/crypto-perf: support SM2 Gowrishankar Muthukrishnan (5): app/crypto-perf: add modex groups test app/crypto-perf: remove redundant local varriable app/crypto-perf: fix result location for asymmetric test app/crypto-perf: add function to check asymmetric operation app/crypto-perf: support ECDSA app/test-crypto-perf/cperf_ops.c | 135 +++- app/test-crypto-perf/cperf_options.h | 8 + app/test-crypto-perf/cperf_options_parsing.c | 61 +- app/test-crypto-perf/cperf_test_common.c | 19 +- app/test-crypto-perf/cperf_test_common.h | 2 + app/test-crypto-perf/cperf_test_latency.c| 21 +- app/test-crypto-perf/cperf_test_throughput.c | 2 +- app/test-crypto-perf/cperf_test_vectors.c| 773 ++- app/test-crypto-perf/cperf_test_vectors.h| 41 +- app/test-crypto-perf/cperf_test_verify.c | 2 +- app/test-crypto-perf/main.c | 87 ++- doc/guides/tools/cryptoperf.rst | 7 + 12 files changed, 1131 insertions(+), 27 deletions(-) -- 2.25.1
[PATCH v2 4/4] test/crypto: add modex tests for zero padded operands
Add modex tests for zero padded operands, as in ASN encoding.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 16 +
app/test/test_cryptodev_mod_test_vectors.h | 71 ++
2 files changed, 87 insertions(+)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 32fb198f96..26afa082af 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -3518,6 +3518,14 @@ static struct unit_test_suite
cryptodev_openssl_asym_testsuite = {
"Modex test",
ut_setup_asym, ut_teardown_asym,
modular_exponentiation, &modex_test_cases[0]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[1]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding (2)",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[2]),
TEST_CASE_NAMED_WITH_DATA(
"Modex Group 5 test",
ut_setup_asym, ut_teardown_asym,
@@ -3596,6 +3604,14 @@ static struct unit_test_suite
cryptodev_octeontx_asym_testsuite = {
"Modex test",
ut_setup_asym, ut_teardown_asym,
modular_exponentiation, &modex_test_cases[0]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[1]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding (2)",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[2]),
TEST_CASE_NAMED_WITH_DATA(
"Modex Group 5 test",
ut_setup_asym, ut_teardown_asym,
diff --git a/app/test/test_cryptodev_mod_test_vectors.h
b/app/test/test_cryptodev_mod_test_vectors.h
index e7b930b765..9a7f3e710b 100644
--- a/app/test/test_cryptodev_mod_test_vectors.h
+++ b/app/test/test_cryptodev_mod_test_vectors.h
@@ -327,6 +327,77 @@ modex_test_data modex_test_cases[] = {
},
.len = 129
}
+},
+{
+ .description = "Modular Exponentiation (mod=20, base=20, exp=12,
res=18)",
+ .xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,
+ .base = {
+ .data = {
+ 0x00, 0x00, 0x45, 0xCA, 0x2C, 0x5C, 0x3A, 0x90,
+ 0x00, 0xC4, 0xD7, 0x47, 0xA8, 0x2B, 0x12, 0x07,
+ 0xBD, 0x1F, 0xD7, 0x81
+ },
+ .len = 20
+ },
+ .exponent = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x75, 0x74, 0x19, 0x19, 0x69,
+ 0xBF, 0x15, 0x2A, 0xAC
+ },
+ .len = 12
+ },
+ .reminder = {
+ .data = {
+ 0x5c, 0x94, 0x8f, 0x00, 0x79, 0xe3, 0xe1, 0x0b,
+ 0x3f, 0x3e, 0x36, 0x75, 0xed, 0x1d, 0x84, 0xc6,
+ 0x36, 0x9e
+ },
+ .len = 18
+ },
+ .modulus = {
+ .data = {
+ 0x00, 0x00, 0x99, 0x28, 0x09, 0x8A, 0xE9, 0x89,
+ 0xBB, 0x81, 0x3B, 0x07, 0x0E, 0x31, 0x00, 0x7F,
+ 0x79, 0x97, 0xED, 0x35
+ },
+ .len = 20
+ }
+},
+{
+ .description = "Modular Exponentiation (mod=32, base=20, exp=12,
res=17)",
+ .xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,
+ .base = {
+ .data = {
+ 0x01, 0x31, 0x72, 0xFB, 0x81, 0x9D, 0x81, 0x7A,
+ 0x91, 0xDC, 0xE6, 0x6C, 0x2D, 0x55, 0xD9, 0x25,
+ 0x7A, 0xB2, 0xFF, 0xFF
+ },
+ .len = 20
+ },
+ .exponent = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x02, 0x36, 0x38, 0x31, 0x47,
+ 0x3C, 0x07, 0x36, 0x21
+ },
+ .len = 12
+ },
+ .reminder = {
+ .data = {
+ 0x02, 0x99, 0x2F, 0xE3, 0x00, 0x9F, 0xF0, 0x9E,
+ 0x65, 0x3C, 0x0B, 0x4A, 0xD3, 0x1B, 0x7C, 0x7F,
+ 0x1C
+ },
+ .len = 17
+ },
+ .modulus = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00,
[PATCH v2 3/4] test/crypto: use common test function for mod tests
Use common test function for modex and modinv tests.
Signed-off-by: Gowrishankar Muthukrishnan
---
v2:
- Old functions not removed.
---
app/test/test_cryptodev_asym.c | 21 +++-
app/test/test_cryptodev_mod_test_vectors.h | 124 +
2 files changed, 140 insertions(+), 5 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index fec53f87db..32fb198f96 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -988,7 +988,8 @@ test_dh_gen_kp(struct rte_crypto_asym_xform *xfrm)
return status;
}
-static int
+/* Below function is in use by cryptodev doc */
+static int __rte_unused
test_mod_inv(void)
{
struct crypto_testsuite_params_asym *ts_params = &testsuite_params;
@@ -1100,7 +1101,8 @@ test_mod_inv(void)
return status;
}
-static int
+/* Below function is in use by cryptodev doc */
+static int __rte_unused
test_mod_exp(void)
{
struct crypto_testsuite_params_asym *ts_params = &testsuite_params;
@@ -3508,8 +3510,14 @@ static struct unit_test_suite
cryptodev_openssl_asym_testsuite = {
test_rsa_enc_dec_crt),
TEST_CASE_ST(ut_setup_asym, ut_teardown_asym,
test_rsa_sign_verify_crt),
- TEST_CASE_ST(ut_setup_asym, ut_teardown_asym, test_mod_inv),
- TEST_CASE_ST(ut_setup_asym, ut_teardown_asym, test_mod_exp),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modinv test",
+ ut_setup_asym, ut_teardown_asym,
+ modular_multiplicative_inverse, &modinv_test_cases[0]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[0]),
TEST_CASE_NAMED_WITH_DATA(
"Modex Group 5 test",
ut_setup_asym, ut_teardown_asym,
@@ -3584,7 +3592,10 @@ static struct unit_test_suite
cryptodev_octeontx_asym_testsuite = {
test_rsa_enc_dec_crt),
TEST_CASE_ST(ut_setup_asym, ut_teardown_asym,
test_rsa_sign_verify_crt),
- TEST_CASE_ST(ut_setup_asym, ut_teardown_asym, test_mod_exp),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[0]),
TEST_CASE_NAMED_WITH_DATA(
"Modex Group 5 test",
ut_setup_asym, ut_teardown_asym,
diff --git a/app/test/test_cryptodev_mod_test_vectors.h
b/app/test/test_cryptodev_mod_test_vectors.h
index a4e06c0291..e7b930b765 100644
--- a/app/test/test_cryptodev_mod_test_vectors.h
+++ b/app/test/test_cryptodev_mod_test_vectors.h
@@ -265,6 +265,130 @@ struct rte_crypto_asym_xform modinv_xform = {
}
};
+static const struct
+modex_test_data modex_test_cases[] = {
+{
+ .description = "Modular Exponentiation (mod=129, base=20, exp=3,
res=128)",
+ .xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,
+ .base = {
+ .data = {
+ 0xF8, 0xBA, 0x1A, 0x55, 0xD0, 0x2F, 0x85, 0xAE,
+ 0x96, 0x7B, 0xB6, 0x2F, 0xB6, 0xCD, 0xA8, 0xEB,
+ 0x7E, 0x78, 0xA0, 0x50
+ },
+ .len = 20
+ },
+ .exponent = {
+ .data = {
+ 0x01, 0x00, 0x01
+ },
+ .len = 3
+ },
+ .reminder = {
+ .data = {
+ 0x2C, 0x60, 0x75, 0x45, 0x98, 0x9D, 0xE0, 0x72,
+ 0xA0, 0x9D, 0x3A, 0x9E, 0x03, 0x38, 0x73, 0x3C,
+ 0x31, 0x83, 0x04, 0xFE, 0x75, 0x43, 0xE6, 0x17,
+ 0x5C, 0x01, 0x29, 0x51, 0x69, 0x33, 0x62, 0x2D,
+ 0x78, 0xBE, 0xAE, 0xC4, 0xBC, 0xDE, 0x7E, 0x2C,
+ 0x77, 0x84, 0xF2, 0xC5, 0x14, 0xB5, 0x2F, 0xF7,
+ 0xC5, 0x94, 0xEF, 0x86, 0x75, 0x75, 0xB5, 0x11,
+ 0xE5, 0x0E, 0x0A, 0x29, 0x76, 0xE2, 0xEA, 0x32,
+ 0x0E, 0x43, 0x77, 0x7E, 0x2C, 0x27, 0xAC, 0x3B,
+ 0x86, 0xA5, 0xDB, 0xC9, 0x48, 0x40, 0xE8, 0x99,
+ 0x9A, 0x0A, 0x3D, 0xD6, 0x74, 0xFA, 0x2E, 0x2E,
+ 0x5B, 0xAF, 0x8C, 0x99, 0x44, 0x2A, 0x67, 0x38,
+ 0x27, 0x41, 0x59, 0x9D, 0xB8, 0x51, 0xC9, 0xF7,
+ 0x43, 0x61, 0x31, 0x6E, 0xF1, 0x25, 0x38, 0x7F,
+ 0xAE, 0xC6, 0xD0, 0xBB, 0x29, 0x76, 0x3F, 0x46,
+ 0x2E, 0x1B, 0xE4, 0x67, 0x71, 0xE3, 0x87, 0x5A
+ },
[PATCH v2 2/4] test/crypto: remove unused variable in modex test data
Remove unused result_len from modex test data.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_mod_test_vectors.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/app/test/test_cryptodev_mod_test_vectors.h
b/app/test/test_cryptodev_mod_test_vectors.h
index c773c37018..a4e06c0291 100644
--- a/app/test/test_cryptodev_mod_test_vectors.h
+++ b/app/test/test_cryptodev_mod_test_vectors.h
@@ -27,7 +27,6 @@ struct modex_test_data {
uint8_t data[DATA_SIZE];
uint16_t len;
} reminder;
- uint16_t result_len;
};
struct modinv_test_data {
enum rte_crypto_asym_xform_type xform_type;
@@ -44,7 +43,6 @@ struct modinv_test_data {
uint8_t data[DATA_SIZE];
uint16_t len;
} inverse;
- uint16_t result_len;
};
/* ModExp #1 */
@@ -109,7 +107,6 @@ modex_test_data modex_test_case_m128_b20_e3 = {
},
.len = 128
},
- .result_len = 128
};
/* ModInv #1 */
@@ -167,7 +164,6 @@ modinv_test_data modinv_test_case = {
},
.len = 128
},
- .result_len = 128
};
/* modular operation test data */
@@ -347,7 +343,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 192
},
- .result_len = 192
},
{
.description = "Modular Exponentiation tests for Group 14",
@@ -442,7 +437,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 256
},
- .result_len = 256
},
{
.description = "Modular Exponentiation tests for Group 15",
@@ -571,7 +565,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 384
},
- .result_len = 384
},
{
.description = "Modular Exponentiation tests for Group 16",
@@ -733,7 +726,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 512
},
- .result_len = 512
},
{
.description = "Modular Exponentiation tests for Group 17",
@@ -960,7 +952,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 768
},
- .result_len = 768
},
{
.description = "Modular Exponentiation tests for Group 18",
@@ -1252,7 +1243,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 1024
},
- .result_len = 1024
},
};
--
2.25.1
[PATCH v2 1/4] test/crypto: validate modex result from first nonzero value
At present, there is no specification of whether modex op output
can carry leading zeroes without changing the value. OpenSSL strips
leading zeroes, but other hardware need not be. Hence, when output
is compared against expected result, validation could start from
first non-zero.
Fixes: 1ffefe00f1 ("test/crypto: add modexp and modinv functions")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 2c745a7f7c..fec53f87db 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -3200,6 +3200,27 @@ static int send_one(void)
return TEST_SUCCESS;
}
+static int
+modular_cmpeq(const uint8_t *a, const uint8_t *b, size_t len)
+{
+ const uint8_t *new_a = a, *new_b = b;
+ size_t i, j;
+
+ /* Strip leading NUL bytes */
+ for (i = 0; i < len; i++)
+ if (a[i] != 0)
+ new_a = &a[i];
+
+ for (j = 0; j < len; j++)
+ if (b[j] != 0)
+ new_b = &b[i];
+
+ if (i != j || memcmp(new_a, new_b, len - i))
+ return 1;
+
+ return 0;
+}
+
static int
modular_exponentiation(const void *test_data)
{
@@ -3234,9 +3255,9 @@ modular_exponentiation(const void *test_data)
TEST_ASSERT_SUCCESS(send_one(),
"Failed to process crypto op");
- TEST_ASSERT_BUFFERS_ARE_EQUAL(vector->reminder.data,
+ TEST_ASSERT_SUCCESS(modular_cmpeq(vector->reminder.data,
self->result_op->asym->modex.result.data,
- self->result_op->asym->modex.result.length,
+ self->result_op->asym->modex.result.length),
"operation verification failed\n");
return TEST_SUCCESS;
--
2.25.1
[PATCH v2 0/4] test/crypto: enhance modex tests
This patch series enhances modex tests to: * use common test function in existing test vectors * add test for zero padded operands v2: - Retain old modex test functions to avoid doc updates. Gowrishankar Muthukrishnan (4): test/crypto: validate modex result from first nonzero value test/crypto: remove unused variable in modex test data test/crypto: use common test function for mod tests test/crypto: add modex tests for zero padded operands app/test/test_cryptodev_asym.c | 62 ++- app/test/test_cryptodev_mod_test_vectors.h | 205 - 2 files changed, 250 insertions(+), 17 deletions(-) -- 2.25.1
[PATCH v1 4/4] test/crypto: add modex tests for zero padded operands
Add modex tests for zero padded operands, as in ASN encoding.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 16 +
app/test/test_cryptodev_mod_test_vectors.h | 71 ++
2 files changed, 87 insertions(+)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 41e150ed17..0c05a34e10 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -3293,6 +3293,14 @@ static struct unit_test_suite
cryptodev_openssl_asym_testsuite = {
"Modex test",
ut_setup_asym, ut_teardown_asym,
modular_exponentiation, &modex_test_cases[0]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[1]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding (2)",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[2]),
TEST_CASE_NAMED_WITH_DATA(
"Modex Group 5 test",
ut_setup_asym, ut_teardown_asym,
@@ -3371,6 +3379,14 @@ static struct unit_test_suite
cryptodev_octeontx_asym_testsuite = {
"Modex test",
ut_setup_asym, ut_teardown_asym,
modular_exponentiation, &modex_test_cases[0]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[1]),
+ TEST_CASE_NAMED_WITH_DATA(
+ "Modex test for zero padding (2)",
+ ut_setup_asym, ut_teardown_asym,
+ modular_exponentiation, &modex_test_cases[2]),
TEST_CASE_NAMED_WITH_DATA(
"Modex Group 5 test",
ut_setup_asym, ut_teardown_asym,
diff --git a/app/test/test_cryptodev_mod_test_vectors.h
b/app/test/test_cryptodev_mod_test_vectors.h
index b2250dc95a..8075f6eac7 100644
--- a/app/test/test_cryptodev_mod_test_vectors.h
+++ b/app/test/test_cryptodev_mod_test_vectors.h
@@ -292,6 +292,77 @@ modex_test_data modex_test_cases[] = {
},
.len = 129
}
+},
+{
+ .description = "Modular Exponentiation tests for 0 MSBs",
+ .xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,
+ .base = {
+ .data = {
+ 0x00, 0x00, 0x45, 0xCA, 0x2C, 0x5C, 0x3A, 0x90,
+ 0x00, 0xC4, 0xD7, 0x47, 0xA8, 0x2B, 0x12, 0x07,
+ 0xBD, 0x1F, 0xD7, 0x81
+ },
+ .len = 20
+ },
+ .exponent = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x75, 0x74, 0x19, 0x19, 0x69,
+ 0xBF, 0x15, 0x2A, 0xAC
+ },
+ .len = 12
+ },
+ .reminder = {
+ .data = {
+ 0x5c, 0x94, 0x8f, 0x00, 0x79, 0xe3, 0xe1, 0x0b,
+ 0x3f, 0x3e, 0x36, 0x75, 0xed, 0x1d, 0x84, 0xc6,
+ 0x36, 0x9e
+ },
+ .len = 18
+ },
+ .modulus = {
+ .data = {
+ 0x00, 0x00, 0x99, 0x28, 0x09, 0x8A, 0xE9, 0x89,
+ 0xBB, 0x81, 0x3B, 0x07, 0x0E, 0x31, 0x00, 0x7F,
+ 0x79, 0x97, 0xED, 0x35
+ },
+ .len = 20
+ }
+},
+{
+ .description = "Modular Exponentiation tests for 0 MSBs (2)",
+ .xform_type = RTE_CRYPTO_ASYM_XFORM_MODEX,
+ .base = {
+ .data = {
+ 0x01, 0x31, 0x72, 0xFB, 0x81, 0x9D, 0x81, 0x7A,
+ 0x91, 0xDC, 0xE6, 0x6C, 0x2D, 0x55, 0xD9, 0x25,
+ 0x7A, 0xB2, 0xFF, 0xFF
+ },
+ .len = 20
+ },
+ .exponent = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x02, 0x36, 0x38, 0x31, 0x47,
+ 0x3C, 0x07, 0x36, 0x21
+ },
+ .len = 12
+ },
+ .reminder = {
+ .data = {
+ 0x02, 0x99, 0x2F, 0xE3, 0x00, 0x9F, 0xF0, 0x9E,
+ 0x65, 0x3C, 0x0B, 0x4A, 0xD3, 0x1B, 0x7C, 0x7F,
+ 0x1C
+ },
+ .len = 17
+ },
+ .modulus = {
+ .data = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+
[PATCH v1 3/4] test/crypto: use common test function for mod tests
Use common test function for modex and modinv tests.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 238 ++---
app/test/test_cryptodev_asym_util.h| 18 --
app/test/test_cryptodev_mod_test_vectors.h | 206 ++
3 files changed, 131 insertions(+), 331 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index c26be9b2bf..41e150ed17 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -988,229 +988,6 @@ test_dh_gen_kp(struct rte_crypto_asym_xform *xfrm)
return status;
}
-static int
-test_mod_inv(void)
-{
- struct crypto_testsuite_params_asym *ts_params = &testsuite_params;
- struct rte_mempool *op_mpool = ts_params->op_mpool;
- struct rte_mempool *sess_mpool = ts_params->session_mpool;
- uint8_t dev_id = ts_params->valid_devs[0];
- struct rte_crypto_asym_op *asym_op = NULL;
- struct rte_crypto_op *op = NULL, *result_op = NULL;
- void *sess = NULL;
- int status = TEST_SUCCESS;
- struct rte_cryptodev_asym_capability_idx cap_idx;
- const struct rte_cryptodev_asymmetric_xform_capability *capability;
- uint8_t input[TEST_DATA_SIZE] = {0};
- int ret = 0;
- uint8_t result[sizeof(mod_p)] = { 0 };
-
- if (rte_cryptodev_asym_get_xform_enum(
- &modinv_xform.xform_type, "modinv") < 0) {
- RTE_LOG(ERR, USER1,
-"Invalid ASYM algorithm specified\n");
- return -1;
- }
-
- cap_idx.type = modinv_xform.xform_type;
- capability = rte_cryptodev_asym_capability_get(dev_id,
- &cap_idx);
-
- if (capability == NULL) {
- RTE_LOG(INFO, USER1,
- "Device doesn't support MOD INV. Test Skipped\n");
- return TEST_SKIPPED;
- }
-
- if (rte_cryptodev_asym_xform_capability_check_modlen(
- capability,
- modinv_xform.modinv.modulus.length)) {
- RTE_LOG(ERR, USER1,
-"Invalid MODULUS length specified\n");
- return TEST_SKIPPED;
- }
-
- ret = rte_cryptodev_asym_session_create(dev_id, &modinv_xform,
sess_mpool, &sess);
- if (ret < 0) {
- RTE_LOG(ERR, USER1, "line %u "
- "FAILED: %s", __LINE__,
- "Session creation failed");
- status = (ret == -ENOTSUP) ? TEST_SKIPPED : TEST_FAILED;
- goto error_exit;
- }
-
- /* generate crypto op data structure */
- op = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);
- if (!op) {
- RTE_LOG(ERR, USER1,
- "line %u FAILED: %s",
- __LINE__, "Failed to allocate asymmetric crypto "
- "operation struct");
- status = TEST_FAILED;
- goto error_exit;
- }
-
- asym_op = op->asym;
- memcpy(input, base, sizeof(base));
- asym_op->modinv.base.data = input;
- asym_op->modinv.base.length = sizeof(base);
- asym_op->modinv.result.data = result;
- asym_op->modinv.result.length = sizeof(result);
-
- /* attach asymmetric crypto session to crypto operations */
- rte_crypto_op_attach_asym_session(op, sess);
-
- RTE_LOG(DEBUG, USER1, "Process ASYM operation");
-
- /* Process crypto operation */
- if (rte_cryptodev_enqueue_burst(dev_id, 0, &op, 1) != 1) {
- RTE_LOG(ERR, USER1,
- "line %u FAILED: %s",
- __LINE__, "Error sending packet for operation");
- status = TEST_FAILED;
- goto error_exit;
- }
-
- while (rte_cryptodev_dequeue_burst(dev_id, 0, &result_op, 1) == 0)
- rte_pause();
-
- if (result_op == NULL) {
- RTE_LOG(ERR, USER1,
- "line %u FAILED: %s",
- __LINE__, "Failed to process asym crypto op");
- status = TEST_FAILED;
- goto error_exit;
- }
-
- ret = verify_modinv(mod_inv, result_op);
- if (ret) {
- RTE_LOG(ERR, USER1,
-"operation verification failed\n");
- status = TEST_FAILED;
- }
-
-error_exit:
- if (sess)
- rte_cryptodev_asym_session_free(dev_id, sess);
-
- rte_crypto_op_free(op);
-
- TEST_ASSERT_EQUAL(status, 0, "Test failed");
-
- return status;
-}
-
-static int
-test_mod_exp(void)
-{
-
[PATCH v1 2/4] test/crypto: remove unused variable in modex test data
Remove unused result_len from modex test data.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_mod_test_vectors.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/app/test/test_cryptodev_mod_test_vectors.h
b/app/test/test_cryptodev_mod_test_vectors.h
index c773c37018..a4e06c0291 100644
--- a/app/test/test_cryptodev_mod_test_vectors.h
+++ b/app/test/test_cryptodev_mod_test_vectors.h
@@ -27,7 +27,6 @@ struct modex_test_data {
uint8_t data[DATA_SIZE];
uint16_t len;
} reminder;
- uint16_t result_len;
};
struct modinv_test_data {
enum rte_crypto_asym_xform_type xform_type;
@@ -44,7 +43,6 @@ struct modinv_test_data {
uint8_t data[DATA_SIZE];
uint16_t len;
} inverse;
- uint16_t result_len;
};
/* ModExp #1 */
@@ -109,7 +107,6 @@ modex_test_data modex_test_case_m128_b20_e3 = {
},
.len = 128
},
- .result_len = 128
};
/* ModInv #1 */
@@ -167,7 +164,6 @@ modinv_test_data modinv_test_case = {
},
.len = 128
},
- .result_len = 128
};
/* modular operation test data */
@@ -347,7 +343,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 192
},
- .result_len = 192
},
{
.description = "Modular Exponentiation tests for Group 14",
@@ -442,7 +437,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 256
},
- .result_len = 256
},
{
.description = "Modular Exponentiation tests for Group 15",
@@ -571,7 +565,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 384
},
- .result_len = 384
},
{
.description = "Modular Exponentiation tests for Group 16",
@@ -733,7 +726,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 512
},
- .result_len = 512
},
{
.description = "Modular Exponentiation tests for Group 17",
@@ -960,7 +952,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 768
},
- .result_len = 768
},
{
.description = "Modular Exponentiation tests for Group 18",
@@ -1252,7 +1243,6 @@ modex_test_data modex_group_test_cases[] = {
},
.len = 1024
},
- .result_len = 1024
},
};
--
2.25.1
[PATCH v1 1/4] test/crypto: validate modex result from first nonzero value
At present, there is no specification of whether modex op output
can carry leading zeroes without changing the value. OpenSSL strips
leading zeroes, but other hardware need not be. Hence, when output
is compared against expected result, validation could start from
first non-zero.
Fixes: 1ffefe00f1 ("test/crypto: add modexp and modinv functions")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 17daf734e8..c26be9b2bf 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -3200,6 +3200,27 @@ static int send_one(void)
return TEST_SUCCESS;
}
+static int
+modular_cmpeq(const uint8_t *a, const uint8_t *b, size_t len)
+{
+ const uint8_t *new_a = a, *new_b = b;
+ size_t i, j;
+
+ /* Strip leading NUL bytes */
+ for (i = 0; i < len; i++)
+ if (a[i] != 0)
+ new_a = &a[i];
+
+ for (j = 0; j < len; j++)
+ if (b[j] != 0)
+ new_b = &b[i];
+
+ if (i != j || memcmp(new_a, new_b, len - i))
+ return 1;
+
+ return 0;
+}
+
static int
modular_exponentiation(const void *test_data)
{
@@ -3234,9 +3255,9 @@ modular_exponentiation(const void *test_data)
TEST_ASSERT_SUCCESS(send_one(),
"Failed to process crypto op");
- TEST_ASSERT_BUFFERS_ARE_EQUAL(vector->reminder.data,
+ TEST_ASSERT_SUCCESS(modular_cmpeq(vector->reminder.data,
self->result_op->asym->modex.result.data,
- self->result_op->asym->modex.result.length,
+ self->result_op->asym->modex.result.length),
"operation verification failed\n");
return TEST_SUCCESS;
--
2.25.1
[PATCH v1 0/4] test/crypto: enhance modex tests
This patch series enhances modex tests to: * use common test function in existing test vectors * add test for zero padded operands Gowrishankar Muthukrishnan (4): test/crypto: validate modex result from first nonzero value test/crypto: remove unused variable in modex test data test/crypto: use common test function for mod tests test/crypto: add modex tests for zero padded operands app/test/test_cryptodev_asym.c | 279 app/test/test_cryptodev_asym_util.h| 18 -- app/test/test_cryptodev_mod_test_vectors.h | 287 ++--- 3 files changed, 241 insertions(+), 343 deletions(-) -- 2.25.1
[PATCH v1 6/6] app/crypto-perf: support ECDSA
Added support for ECDSA SECP256R1 curve SIGN and VERIFY operations.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_ops.c | 57 ++
app/test-crypto-perf/cperf_options.h | 2 +
app/test-crypto-perf/cperf_options_parsing.c | 10 ++-
app/test-crypto-perf/cperf_test_common.c | 1 +
app/test-crypto-perf/cperf_test_vectors.c| 83
app/test-crypto-perf/cperf_test_vectors.h| 12 +++
app/test-crypto-perf/main.c | 18 +
doc/guides/tools/cryptoperf.rst | 1 +
8 files changed, 182 insertions(+), 2 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index f0860a46c0..62b165124f 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -34,6 +34,39 @@ cperf_set_ops_asym_modex(struct rte_crypto_op **ops,
}
}
+static void
+cperf_set_ops_asym_ecdsa(struct rte_crypto_op **ops,
+ uint32_t src_buf_offset __rte_unused,
+ uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+ void *sess,
+ const struct cperf_options *options,
+ const struct cperf_test_vector *test_vector __rte_unused,
+ uint16_t iv_offset __rte_unused,
+ uint32_t *imix_idx __rte_unused,
+ uint64_t *tsc_start __rte_unused)
+{
+ uint16_t i;
+
+ for (i = 0; i < nb_ops; i++) {
+ struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+ ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+ rte_crypto_op_attach_asym_session(ops[i], sess);
+
+ asym_op->ecdsa.op_type = options->asym_op_type;
+ asym_op->ecdsa.message.data =
options->secp256r1_data->message.data;
+ asym_op->ecdsa.message.length =
options->secp256r1_data->message.length;
+
+ asym_op->ecdsa.k.data = options->secp256r1_data->k.data;
+ asym_op->ecdsa.k.length = options->secp256r1_data->k.length;
+
+ asym_op->ecdsa.r.data = options->secp256r1_data->sign_r.data;
+ asym_op->ecdsa.r.length =
options->secp256r1_data->sign_r.length;
+ asym_op->ecdsa.s.data = options->secp256r1_data->sign_s.data;
+ asym_op->ecdsa.s.length =
options->secp256r1_data->sign_s.length;
+ }
+}
+
static void
cperf_set_ops_asym_sm2(struct rte_crypto_op **ops,
uint32_t src_buf_offset __rte_unused,
@@ -974,6 +1007,27 @@ cperf_create_session(struct rte_mempool *sess_mp,
return asym_sess;
}
+ if (options->op_type == CPERF_ASYM_SECP256R1) {
+ xform.next = NULL;
+ xform.xform_type = RTE_CRYPTO_ASYM_XFORM_ECDSA;
+ xform.ec.curve_id = options->secp256r1_data->curve;
+ xform.ec.pkey.data = options->secp256r1_data->pkey.data;
+ xform.ec.pkey.length = options->secp256r1_data->pkey.length;
+ xform.ec.q.x.data = options->secp256r1_data->pubkey_qx.data;
+ xform.ec.q.x.length = options->secp256r1_data->pubkey_qx.length;
+ xform.ec.q.y.data = options->secp256r1_data->pubkey_qy.data;
+ xform.ec.q.y.length = options->secp256r1_data->pubkey_qy.length;
+
+ ret = rte_cryptodev_asym_session_create(dev_id, &xform,
+ sess_mp, &asym_sess);
+ if (ret < 0) {
+ RTE_LOG(ERR, USER1, "ECDSA Asym session create
failed\n");
+ return NULL;
+ }
+
+ return asym_sess;
+ }
+
if (options->op_type == CPERF_ASYM_SM2) {
xform.next = NULL;
xform.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2;
@@ -1294,6 +1348,9 @@ cperf_get_op_functions(const struct cperf_options
*options,
case CPERF_ASYM_MODEX:
op_fns->populate_ops = cperf_set_ops_asym_modex;
break;
+ case CPERF_ASYM_SECP256R1:
+ op_fns->populate_ops = cperf_set_ops_asym_ecdsa;
+ break;
case CPERF_ASYM_SM2:
op_fns->populate_ops = cperf_set_ops_asym_sm2;
break;
diff --git a/app/test-crypto-perf/cperf_options.h
b/app/test-crypto-perf/cperf_options.h
index d730ae18d0..9364c030c0 100644
--- a/app/test-crypto-perf/cperf_options.h
+++ b/app/test-crypto-perf/cperf_options.h
@@ -87,6 +87,7 @@ enum cperf_op_type {
CPERF_DOCSIS,
CPERF_IPSEC,
CPERF_ASYM_MODEX,
+ CPERF_ASYM_SECP256R1,
CPERF_ASYM_SM2,
CPERF_TLS,
};
@@ -165,6 +166,7 @@ struct cperf_options {
uint8_t imix_distribution_count;
struct cperf_modex_test_data *modex_data;
[PATCH v1 5/6] app/crypto-perf: support SM2
From: Akhil Goyal
Added support for SM2 asymmetric crypto performance.
A new command line option is added to specify
asymmetric operation type `--asym-op Type`.
Type can be sign/verify/encrypt/decrypt.
Example command:
./dpdk-test-crypto-perf --vdev crypto_openssl -c 0x30 -- \
--devtype crypto_openssl --ptest throughput --optype sm2 \
--total-ops 1 --asym-op sign
Signed-off-by: Akhil Goyal
---
app/test-crypto-perf/cperf_ops.c | 69 ++-
app/test-crypto-perf/cperf_options.h | 6 +
app/test-crypto-perf/cperf_options_parsing.c | 55 -
app/test-crypto-perf/cperf_test_vectors.c| 120 +++
app/test-crypto-perf/cperf_test_vectors.h| 25
app/test-crypto-perf/main.c | 61 ++
doc/guides/tools/cryptoperf.rst | 6 +
7 files changed, 339 insertions(+), 3 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index a802281a71..f0860a46c0 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -10,7 +10,7 @@
#include "cperf_test_vectors.h"
static void
-cperf_set_ops_asym(struct rte_crypto_op **ops,
+cperf_set_ops_asym_modex(struct rte_crypto_op **ops,
uint32_t src_buf_offset __rte_unused,
uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
void *sess,
@@ -34,6 +34,47 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
}
}
+static void
+cperf_set_ops_asym_sm2(struct rte_crypto_op **ops,
+ uint32_t src_buf_offset __rte_unused,
+ uint32_t dst_buf_offset __rte_unused, uint16_t nb_ops,
+ void *sess,
+ const struct cperf_options *options,
+ const struct cperf_test_vector *test_vector __rte_unused,
+ uint16_t iv_offset __rte_unused,
+ uint32_t *imix_idx __rte_unused,
+ uint64_t *tsc_start __rte_unused)
+{
+ uint16_t i;
+
+ for (i = 0; i < nb_ops; i++) {
+ struct rte_crypto_asym_op *asym_op = ops[i]->asym;
+
+ ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+ rte_crypto_op_attach_asym_session(ops[i], sess);
+
+ /* Populate op with operational details */
+ asym_op->sm2.hash = options->asym_hash_alg;
+
+ asym_op->sm2.op_type = options->asym_op_type;
+ asym_op->sm2.message.data = options->sm2_data->message.data;
+ asym_op->sm2.message.length = options->sm2_data->message.length;
+ asym_op->sm2.cipher.data = options->sm2_data->cipher.data;
+ asym_op->sm2.cipher.length = options->sm2_data->cipher.length;
+ asym_op->sm2.id.data = options->sm2_data->id.data;
+ asym_op->sm2.id.length = options->sm2_data->id.length;
+
+ asym_op->sm2.k.data = options->sm2_data->k.data;
+ asym_op->sm2.k.length = options->sm2_data->k.length;
+
+ asym_op->sm2.r.data = options->sm2_data->sign_r.data;
+ asym_op->sm2.r.length = options->sm2_data->sign_r.length;
+ asym_op->sm2.s.data = options->sm2_data->sign_s.data;
+ asym_op->sm2.s.length = options->sm2_data->sign_s.length;
+ }
+}
+
+
#ifdef RTE_LIB_SECURITY
static void
test_ipsec_vec_populate(struct rte_mbuf *m, const struct cperf_options
*options,
@@ -932,6 +973,27 @@ cperf_create_session(struct rte_mempool *sess_mp,
}
return asym_sess;
}
+
+ if (options->op_type == CPERF_ASYM_SM2) {
+ xform.next = NULL;
+ xform.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2;
+ xform.ec.curve_id = options->sm2_data->curve;
+ xform.ec.pkey.data = options->sm2_data->pkey.data;
+ xform.ec.pkey.length = options->sm2_data->pkey.length;
+ xform.ec.q.x.data = options->sm2_data->pubkey_qx.data;
+ xform.ec.q.x.length = options->sm2_data->pubkey_qx.length;
+ xform.ec.q.y.data = options->sm2_data->pubkey_qy.data;
+ xform.ec.q.y.length = options->sm2_data->pubkey_qy.length;
+
+ ret = rte_cryptodev_asym_session_create(dev_id, &xform,
+ sess_mp, &asym_sess);
+ if (ret < 0) {
+ RTE_LOG(ERR, USER1, "SM2 Asym session create failed\n");
+ return NULL;
+ }
+
+ return asym_sess;
+ }
#ifdef RTE_LIB_SECURITY
/*
* security only
@@ -1230,7 +1292,10 @@ cperf_get_op_functions(const struct cperf_options
*options,
op_fns->populate_ops = cperf_set_ops_cipher;
break;
case CPERF_ASYM_MODEX:
- op_fns->populate_ops = cperf_set_ops_asym;
+ op_fns->populate_ops = cperf_set_ops_asym_modex;
+ b
[PATCH v1 4/6] app/crypto-perf: add function to check asymmetric operation
Replace checking input option for every asymmetric test case by
a function.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_test_common.c | 12 +++-
app/test-crypto-perf/cperf_test_common.h | 2 ++
app/test-crypto-perf/cperf_test_latency.c| 7 ---
app/test-crypto-perf/cperf_test_throughput.c | 2 +-
app/test-crypto-perf/cperf_test_verify.c | 2 +-
app/test-crypto-perf/main.c | 8
6 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/app/test-crypto-perf/cperf_test_common.c
b/app/test-crypto-perf/cperf_test_common.c
index 6b8ab65731..14ca9e964a 100644
--- a/app/test-crypto-perf/cperf_test_common.c
+++ b/app/test-crypto-perf/cperf_test_common.c
@@ -152,7 +152,7 @@ cperf_alloc_common_memory(const struct cperf_options
*options,
uint16_t crypto_op_size = sizeof(struct rte_crypto_op);
uint16_t crypto_op_private_size;
- if (options->op_type == CPERF_ASYM_MODEX) {
+ if (cperf_is_asym_test(options)) {
crypto_op_size += sizeof(struct rte_crypto_asym_op);
snprintf(pool_name, RTE_MEMPOOL_NAMESIZE, "perf_asym_op_pool%u",
rte_socket_id());
@@ -301,3 +301,13 @@ cperf_mbuf_set(struct rte_mbuf *mbuf,
mbuf = mbuf->next;
}
}
+
+bool
+cperf_is_asym_test(const struct cperf_options *options)
+{
+ if (options->op_type == CPERF_ASYM_MODEX ||
+ options->op_type == CPERF_ASYM_SM2)
+ return true;
+
+ return false;
+}
diff --git a/app/test-crypto-perf/cperf_test_common.h
b/app/test-crypto-perf/cperf_test_common.h
index a603a607d5..2d1f69aaa2 100644
--- a/app/test-crypto-perf/cperf_test_common.h
+++ b/app/test-crypto-perf/cperf_test_common.h
@@ -26,4 +26,6 @@ cperf_mbuf_set(struct rte_mbuf *mbuf,
const struct cperf_options *options,
const struct cperf_test_vector *test_vector);
+bool
+cperf_is_asym_test(const struct cperf_options *options);
#endif /* _CPERF_TEST_COMMON_H_ */
diff --git a/app/test-crypto-perf/cperf_test_latency.c
b/app/test-crypto-perf/cperf_test_latency.c
index 376847e761..201815b469 100644
--- a/app/test-crypto-perf/cperf_test_latency.c
+++ b/app/test-crypto-perf/cperf_test_latency.c
@@ -47,7 +47,7 @@ cperf_latency_test_free(struct cperf_latency_ctx *ctx)
return;
if (ctx->sess != NULL) {
- if (ctx->options->op_type == CPERF_ASYM_MODEX)
+ if (cperf_is_asym_test(ctx->options))
rte_cryptodev_asym_session_free(ctx->dev_id, ctx->sess);
#ifdef RTE_LIB_SECURITY
else if (ctx->options->op_type == CPERF_PDCP ||
@@ -217,8 +217,9 @@ cperf_latency_test_runner(void *arg)
&imix_idx, &tsc_start);
/* Populate the mbuf with the test vector */
- for (i = 0; i < burst_size; i++)
- cperf_mbuf_set(ops[i]->sym->m_src,
+ if (!cperf_is_asym_test(ctx->options))
+ for (i = 0; i < burst_size; i++)
+ cperf_mbuf_set(ops[i]->sym->m_src,
ctx->options,
ctx->test_vector);
diff --git a/app/test-crypto-perf/cperf_test_throughput.c
b/app/test-crypto-perf/cperf_test_throughput.c
index c0891e7c99..7112b95529 100644
--- a/app/test-crypto-perf/cperf_test_throughput.c
+++ b/app/test-crypto-perf/cperf_test_throughput.c
@@ -37,7 +37,7 @@ cperf_throughput_test_free(struct cperf_throughput_ctx *ctx)
if (!ctx)
return;
if (ctx->sess) {
- if (ctx->options->op_type == CPERF_ASYM_MODEX)
+ if (cperf_is_asym_test(ctx->options))
rte_cryptodev_asym_session_free(ctx->dev_id,
(void *)ctx->sess);
#ifdef RTE_LIB_SECURITY
diff --git a/app/test-crypto-perf/cperf_test_verify.c
b/app/test-crypto-perf/cperf_test_verify.c
index 222c7a1cd8..91429841ca 100644
--- a/app/test-crypto-perf/cperf_test_verify.c
+++ b/app/test-crypto-perf/cperf_test_verify.c
@@ -42,7 +42,7 @@ cperf_verify_test_free(struct cperf_verify_ctx *ctx)
return;
if (ctx->sess != NULL) {
- if (ctx->options->op_type == CPERF_ASYM_MODEX)
+ if (cperf_is_asym_test(ctx->options))
rte_cryptodev_asym_session_free(ctx->dev_id, ctx->sess);
#ifdef RTE_LIB_SECURITY
else if (ctx->options->op_type == CPERF_PDCP ||
diff --git a/app/test-crypto-perf/main.c b/app/test-crypto-perf/main.c
index 40c0b4b54f..780f22f399 100644
--- a/app/test-crypto-perf/main.c
+++ b/app/test-crypto-perf/main.c
@@ -18,6 +18,7 @@
#incl
[PATCH v1 3/6] app/crypto-perf: fix result location for asymmetric test
For asymmetric op, private test data should be stored after
rte_crypto_asym_op struct.
Fixes: a538d1d2d01e ("test/crypto-perf: extend asymmetric crypto throughput
test")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_test_common.c | 6 --
app/test-crypto-perf/cperf_test_latency.c | 14 +++---
2 files changed, 15 insertions(+), 5 deletions(-)
diff --git a/app/test-crypto-perf/cperf_test_common.c
b/app/test-crypto-perf/cperf_test_common.c
index 94d39fb177..6b8ab65731 100644
--- a/app/test-crypto-perf/cperf_test_common.c
+++ b/app/test-crypto-perf/cperf_test_common.c
@@ -149,11 +149,11 @@ cperf_alloc_common_memory(const struct cperf_options
*options,
int ret;
/* Calculate the object size */
- uint16_t crypto_op_size = sizeof(struct rte_crypto_op) +
- sizeof(struct rte_crypto_sym_op);
+ uint16_t crypto_op_size = sizeof(struct rte_crypto_op);
uint16_t crypto_op_private_size;
if (options->op_type == CPERF_ASYM_MODEX) {
+ crypto_op_size += sizeof(struct rte_crypto_asym_op);
snprintf(pool_name, RTE_MEMPOOL_NAMESIZE, "perf_asym_op_pool%u",
rte_socket_id());
*pool = rte_crypto_op_pool_create(
@@ -170,6 +170,8 @@ cperf_alloc_common_memory(const struct cperf_options
*options,
return 0;
}
+ crypto_op_size += sizeof(struct rte_crypto_sym_op);
+
/*
* If doing AES-CCM, IV field needs to be 16 bytes long,
* and AAD field needs to be long enough to have 18 bytes,
diff --git a/app/test-crypto-perf/cperf_test_latency.c
b/app/test-crypto-perf/cperf_test_latency.c
index b8ad6bf4d4..376847e761 100644
--- a/app/test-crypto-perf/cperf_test_latency.c
+++ b/app/test-crypto-perf/cperf_test_latency.c
@@ -122,7 +122,11 @@ store_timestamp(struct rte_crypto_op *op, uint64_t
timestamp)
{
struct priv_op_data *priv_data;
- priv_data = (struct priv_op_data *) (op->sym + 1);
+ if (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC)
+ priv_data = (struct priv_op_data *) (op->sym + 1);
+ else
+ priv_data = (struct priv_op_data *) (op->asym + 1);
+
priv_data->result->status = op->status;
priv_data->result->tsc_end = timestamp;
}
@@ -251,9 +255,13 @@ cperf_latency_test_runner(void *arg)
ctx->res[tsc_idx].tsc_start = tsc_start;
/*
* Private data structure starts after the end
of the
-* rte_crypto_sym_op structure.
+* rte_crypto_sym_op (or rte_crypto_asym_op)
structure.
*/
- priv_data = (struct priv_op_data *)
(ops[i]->sym + 1);
+ if (ops[i]->type ==
RTE_CRYPTO_OP_TYPE_SYMMETRIC)
+ priv_data = (struct priv_op_data *)
(ops[i]->sym + 1);
+ else
+ priv_data = (struct priv_op_data *)
(ops[i]->asym + 1);
+
priv_data->result = (void *)&ctx->res[tsc_idx];
tsc_idx++;
}
--
2.25.1
[PATCH v1 2/6] app/crypto-perf: remove redundant local varriable
Remove redundant local variable used for asym session.
Fixes: a29bb248988 ("cryptodev: hide asymmetric session structure")
Fixes: 2973dbf93b4 ("security: hide session structure")
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_ops.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/app/test-crypto-perf/cperf_ops.c b/app/test-crypto-perf/cperf_ops.c
index 4ca001b721..a802281a71 100644
--- a/app/test-crypto-perf/cperf_ops.c
+++ b/app/test-crypto-perf/cperf_ops.c
@@ -21,7 +21,6 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
uint64_t *tsc_start __rte_unused)
{
uint16_t i;
- void *asym_sess = (void *)sess;
for (i = 0; i < nb_ops; i++) {
struct rte_crypto_asym_op *asym_op = ops[i]->asym;
@@ -31,7 +30,7 @@ cperf_set_ops_asym(struct rte_crypto_op **ops,
asym_op->modex.base.length = options->modex_data->base.len;
asym_op->modex.result.data = options->modex_data->result.data;
asym_op->modex.result.length = options->modex_data->result.len;
- rte_crypto_op_attach_asym_session(ops[i], asym_sess);
+ rte_crypto_op_attach_asym_session(ops[i], sess);
}
}
@@ -62,7 +61,6 @@ cperf_set_ops_security(struct rte_crypto_op **ops,
for (i = 0; i < nb_ops; i++) {
struct rte_crypto_sym_op *sym_op = ops[i]->sym;
- void *sec_sess = (void *)sess;
uint32_t buf_sz;
uint32_t *per_pkt_hfn = rte_crypto_op_ctod_offset(ops[i],
@@ -70,7 +68,7 @@ cperf_set_ops_security(struct rte_crypto_op **ops,
*per_pkt_hfn = options->pdcp_ses_hfn_en ? 0 : PDCP_DEFAULT_HFN;
ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
- rte_security_attach_session(ops[i], sec_sess);
+ rte_security_attach_session(ops[i], sess);
sym_op->m_src = (struct rte_mbuf *)((uint8_t *)ops[i] +
src_buf_offset);
@@ -127,7 +125,6 @@ cperf_set_ops_security_ipsec(struct rte_crypto_op **ops,
uint16_t iv_offset __rte_unused, uint32_t *imix_idx,
uint64_t *tsc_start)
{
- void *sec_sess = sess;
const uint32_t test_buffer_size = options->test_buffer_size;
uint64_t tsc_start_temp, tsc_end_temp;
uint16_t i = 0;
@@ -140,7 +137,7 @@ cperf_set_ops_security_ipsec(struct rte_crypto_op **ops,
uint32_t offset = test_buffer_size;
ops[i]->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
- rte_security_attach_session(ops[i], sec_sess);
+ rte_security_attach_session(ops[i], sess);
sym_op->m_src = (struct rte_mbuf *)((uint8_t *)ops[i] +
src_buf_offset);
sym_op->m_src->pkt_len = test_buffer_size;
--
2.25.1
[PATCH v1 1/6] app/crypto-perf: add modex groups test
Add perf tests for modex groups 5, 14, 15, 16, 17 and 18
based on RFC 3526.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test-crypto-perf/cperf_test_vectors.c | 570 +-
app/test-crypto-perf/cperf_test_vectors.h | 4 +-
2 files changed, 571 insertions(+), 3 deletions(-)
diff --git a/app/test-crypto-perf/cperf_test_vectors.c
b/app/test-crypto-perf/cperf_test_vectors.c
index 3c35eea460..de43d303a5 100644
--- a/app/test-crypto-perf/cperf_test_vectors.c
+++ b/app/test-crypto-perf/cperf_test_vectors.c
@@ -8,7 +8,7 @@
#include "cperf_test_vectors.h"
struct
-cperf_modex_test_data modex_perf_data[4] = {
+cperf_modex_test_data modex_perf_data[10] = {
{
.base = {
.data = {
@@ -233,6 +233,574 @@ cperf_modex_test_data modex_perf_data[4] = {
.result = {
.len = 448
}
+ },
+ {
+ .base = {
+ .data = {
+ 0x02,
+ },
+ .len = 1
+ },
+ .exponent = {
+ .data = {
+0x6C, 0x80, 0xFF, 0x29, 0xF9, 0x27, 0x2E, 0x6D,
+0xE1, 0xB7, 0x3F, 0x13, 0x77, 0xD2, 0x3E, 0x49,
+0xCE, 0xAE, 0xBD, 0x73, 0x7A, 0x0F, 0xE7, 0xA4,
+0x20, 0x49, 0x72, 0x87, 0x4E, 0x1B
+ },
+ .len = 30
+ },
+ .modulus = {
+ .data = {
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xC9, 0x0F, 0xDA, 0xA2, 0x21, 0x68, 0xC2, 0x34,
+ 0xC4, 0xC6, 0x62, 0x8B, 0x80, 0xDC, 0x1C, 0xD1,
+ 0x29, 0x02, 0x4E, 0x08, 0x8A, 0x67, 0xCC, 0x74,
+ 0x02, 0x0B, 0xBE, 0xA6, 0x3B, 0x13, 0x9B, 0x22,
+ 0x51, 0x4A, 0x08, 0x79, 0x8E, 0x34, 0x04, 0xDD,
+ 0xEF, 0x95, 0x19, 0xB3, 0xCD, 0x3A, 0x43, 0x1B,
+ 0x30, 0x2B, 0x0A, 0x6D, 0xF2, 0x5F, 0x14, 0x37,
+ 0x4F, 0xE1, 0x35, 0x6D, 0x6D, 0x51, 0xC2, 0x45,
+ 0xE4, 0x85, 0xB5, 0x76, 0x62, 0x5E, 0x7E, 0xC6,
+ 0xF4, 0x4C, 0x42, 0xE9, 0xA6, 0x37, 0xED, 0x6B,
+ 0x0B, 0xFF, 0x5C, 0xB6, 0xF4, 0x06, 0xB7, 0xED,
+ 0xEE, 0x38, 0x6B, 0xFB, 0x5A, 0x89, 0x9F, 0xA5,
+ 0xAE, 0x9F, 0x24, 0x11, 0x7C, 0x4B, 0x1F, 0xE6,
+ 0x49, 0x28, 0x66, 0x51, 0xEC, 0xE4, 0x5B, 0x3D,
+ 0xC2, 0x00, 0x7C, 0xB8, 0xA1, 0x63, 0xBF, 0x05,
+ 0x98, 0xDA, 0x48, 0x36, 0x1C, 0x55, 0xD3, 0x9A,
+ 0x69, 0x16, 0x3F, 0xA8, 0xFD, 0x24, 0xCF, 0x5F,
+ 0x83, 0x65, 0x5D, 0x23, 0xDC, 0xA3, 0xAD, 0x96,
+ 0x1C, 0x62, 0xF3, 0x56, 0x20, 0x85, 0x52, 0xBB,
+ 0x9E, 0xD5, 0x29, 0x07, 0x70, 0x96, 0x96, 0x6D,
+ 0x67, 0x0C, 0x35, 0x4E, 0x4A, 0xBC, 0x98, 0x04,
+ 0xF1, 0x74, 0x6C, 0x08, 0xCA, 0x23, 0x73, 0x27,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
+ },
+ .len = 192
+ },
+ .result = {
+ .len = 192
+ }
+ },
+ {
+ .base = {
+ .data = {
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+ },
+ .len = 64
+ },
+ .exponent = {
+ .data = {
+ 0x8E, 0x4E, 0x41, 0xA2, 0xE0, 0x59, 0xA8, 0x29,
+ 0x71, 0xF6, 0x21, 0xC9, 0xD5, 0x0E, 0x36, 0x0F,
+ 0x59, 0xD6, 0x74, 0x4C, 0x3A, 0xC7, 0x13, 0x5E,
+ 0x7D, 0x2D, 0x43, 0x63, 0x5A, 0x3D, 0xCA, 0x5F,
+ 0xF7, 0xB2, 0x3D, 0x9C, 0x3F, 0xA1,
[PATCH v1 0/6] app/crypto-perf: add asymmetric crypto tests
This patch series adds below asymmetric tests in crypto-perf tool: * MODEX group tests (RFC 3526) * SM2 tests * ECDSA P256R1 tests Akhil Goyal (1): app/crypto-perf: support SM2 Gowrishankar Muthukrishnan (5): app/crypto-perf: add modex groups test app/crypto-perf: remove redundant local varriable app/crypto-perf: fix result location for asymmetric test app/crypto-perf: add function to check asymmetric operation app/crypto-perf: support ECDSA app/test-crypto-perf/cperf_ops.c | 135 +++- app/test-crypto-perf/cperf_options.h | 8 + app/test-crypto-perf/cperf_options_parsing.c | 61 +- app/test-crypto-perf/cperf_test_common.c | 19 +- app/test-crypto-perf/cperf_test_common.h | 2 + app/test-crypto-perf/cperf_test_latency.c| 21 +- app/test-crypto-perf/cperf_test_throughput.c | 2 +- app/test-crypto-perf/cperf_test_vectors.c| 773 ++- app/test-crypto-perf/cperf_test_vectors.h| 41 +- app/test-crypto-perf/cperf_test_verify.c | 2 +- app/test-crypto-perf/main.c | 87 ++- doc/guides/tools/cryptoperf.rst | 7 + 12 files changed, 1131 insertions(+), 27 deletions(-) -- 2.25.1
[PATCH] crypto/cnxk: fix ECDH pubkey verify
Fix dequeue operation for ECDH pubkey verify.
Fixes: baae0994fa96 ("crypto/cnxk: support ECDH")
Fixes: 5c9025583167 ("crypto/cnxk: fix CN9K ECDH public key verification")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 23 ++-
drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 21 +
2 files changed, 27 insertions(+), 17 deletions(-)
diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
index 720b756001..07bd13b16d 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c
@@ -1186,15 +1186,20 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
struct rte_crypto_op *cop
return;
} else if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC &&
- cop->sess_type == RTE_CRYPTO_OP_WITH_SESSION &&
- cop->asym->ecdh.ke_type ==
RTE_CRYPTO_ASYM_KE_PUB_KEY_VERIFY) {
- if (likely(compcode == CPT_COMP_GOOD)) {
- if (uc_compcode == ROC_AE_ERR_ECC_POINT_NOT_ON_CURVE) {
- cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
- return;
- } else if (uc_compcode == ROC_AE_ERR_ECC_PAI) {
- cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
- return;
+ cop->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
+ struct cnxk_ae_sess *sess;
+
+ sess = (struct cnxk_ae_sess *)cop->asym->session;
+ if (sess->xfrm_type == RTE_CRYPTO_ASYM_XFORM_ECDH &&
+ cop->asym->ecdh.ke_type ==
RTE_CRYPTO_ASYM_KE_PUB_KEY_VERIFY) {
+ if (likely(compcode == CPT_COMP_GOOD)) {
+ if (uc_compcode ==
ROC_AE_ERR_ECC_POINT_NOT_ON_CURVE) {
+ cop->status =
RTE_CRYPTO_OP_STATUS_ERROR;
+ return;
+ } else if (uc_compcode == ROC_AE_ERR_ECC_PAI) {
+ cop->status =
RTE_CRYPTO_OP_STATUS_SUCCESS;
+ return;
+ }
}
}
}
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index 96a75a7797..f443cb9563 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -523,14 +523,19 @@ cn9k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,
struct rte_crypto_op *cop,
if (res->uc_compcode == ROC_SE_ERR_GC_ICV_MISCOMPARE)
cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
else if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC &&
-cop->sess_type == RTE_CRYPTO_OP_WITH_SESSION &&
-cop->asym->ecdh.ke_type ==
RTE_CRYPTO_ASYM_KE_PUB_KEY_VERIFY) {
- if (res->uc_compcode ==
ROC_AE_ERR_ECC_POINT_NOT_ON_CURVE) {
- cop->status =
RTE_CRYPTO_OP_STATUS_ERROR;
- return;
- } else if (res->uc_compcode ==
ROC_AE_ERR_ECC_PAI) {
- cop->status =
RTE_CRYPTO_OP_STATUS_SUCCESS;
- return;
+cop->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {
+ struct cnxk_ae_sess *sess;
+
+ sess = (struct cnxk_ae_sess
*)cop->asym->session;
+ if (sess->xfrm_type ==
RTE_CRYPTO_ASYM_XFORM_ECDH &&
+ cop->asym->ecdh.ke_type ==
RTE_CRYPTO_ASYM_KE_PUB_KEY_VERIFY) {
+ if (res->uc_compcode ==
ROC_AE_ERR_ECC_POINT_NOT_ON_CURVE) {
+ cop->status =
RTE_CRYPTO_OP_STATUS_ERROR;
+ return;
+ } else if (res->uc_compcode ==
ROC_AE_ERR_ECC_PAI) {
+ cop->status =
RTE_CRYPTO_OP_STATUS_SUCCESS;
+ return;
+ }
}
} else
cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
--
2.25.1
[PATCH] crypto/cnxk: fix coverity issues
Fix out-of-bound issues reported by coverity scan.
Coverity issue: 403164, 403165, 403166, 403167, 403169, 403170, 403171,
403172, 403173, 403174, 403176, 403178, 403179, 403180
Fixes: 5686b573e4b ("crypto/cnxk: support SM2")
Fixes: badc0c6f6d6 ("cryptodev: set private and public keys in EC session")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
drivers/common/cnxk/roc_ae.h | 16 +---
drivers/crypto/cnxk/cnxk_ae.h | 24 +++-
2 files changed, 28 insertions(+), 12 deletions(-)
diff --git a/drivers/common/cnxk/roc_ae.h b/drivers/common/cnxk/roc_ae.h
index a9a08d9fb9..7886b9d107 100644
--- a/drivers/common/cnxk/roc_ae.h
+++ b/drivers/common/cnxk/roc_ae.h
@@ -53,29 +53,31 @@ typedef enum {
ROC_AE_ERR_ECC_POINT_NOT_ON_CURVE = 0x11
} roc_ae_error_code;
+#define ROC_AE_EC_DATA_MAX 66
+
/* Prime and order fields of built-in elliptic curves */
struct roc_ae_ec_group {
struct {
/* P521 maximum length */
- uint8_t data[66];
+ uint8_t data[ROC_AE_EC_DATA_MAX];
unsigned int length;
} prime;
struct {
/* P521 maximum length */
- uint8_t data[66];
+ uint8_t data[ROC_AE_EC_DATA_MAX];
unsigned int length;
} order;
struct {
/* P521 maximum length */
- uint8_t data[66];
+ uint8_t data[ROC_AE_EC_DATA_MAX];
unsigned int length;
} consta;
struct {
/* P521 maximum length */
- uint8_t data[66];
+ uint8_t data[ROC_AE_EC_DATA_MAX];
unsigned int length;
} constb;
};
@@ -86,18 +88,18 @@ struct roc_ae_ec_ctx {
/* Private key */
struct {
- uint8_t data[66];
+ uint8_t data[ROC_AE_EC_DATA_MAX];
unsigned int length;
} pkey;
/* Public key */
struct {
struct {
- uint8_t data[66];
+ uint8_t data[ROC_AE_EC_DATA_MAX];
unsigned int length;
} x;
struct {
- uint8_t data[66];
+ uint8_t data[ROC_AE_EC_DATA_MAX];
unsigned int length;
} y;
} q;
diff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h
index ea11e093bf..a843d6b5ef 100644
--- a/drivers/crypto/cnxk/cnxk_ae.h
+++ b/drivers/crypto/cnxk/cnxk_ae.h
@@ -205,16 +205,22 @@ cnxk_ae_fill_ec_params(struct cnxk_ae_sess *sess,
return 0;
ec->pkey.length = xform->ec.pkey.length;
- if (xform->ec.pkey.length)
- rte_memcpy(ec->pkey.data, xform->ec.pkey.data,
xform->ec.pkey.length);
+ if (ec->pkey.length > ROC_AE_EC_DATA_MAX)
+ ec->pkey.length = ROC_AE_EC_DATA_MAX;
+ if (ec->pkey.length)
+ rte_memcpy(ec->pkey.data, xform->ec.pkey.data, ec->pkey.length);
ec->q.x.length = xform->ec.q.x.length;
- if (xform->ec.q.x.length)
- rte_memcpy(ec->q.x.data, xform->ec.q.x.data,
xform->ec.q.x.length);
+ if (ec->q.x.length > ROC_AE_EC_DATA_MAX)
+ ec->q.x.length = ROC_AE_EC_DATA_MAX;
+ if (ec->q.x.length)
+ rte_memcpy(ec->q.x.data, xform->ec.q.x.data, ec->q.x.length);
ec->q.y.length = xform->ec.q.y.length;
+ if (ec->q.y.length > ROC_AE_EC_DATA_MAX)
+ ec->q.y.length = ROC_AE_EC_DATA_MAX;
if (xform->ec.q.y.length)
- rte_memcpy(ec->q.y.data, xform->ec.q.y.data,
xform->ec.q.y.length);
+ rte_memcpy(ec->q.y.data, xform->ec.q.y.data, ec->q.y.length);
return 0;
}
@@ -735,7 +741,11 @@ cnxk_ae_sm2_sign_prep(struct rte_crypto_sm2_op_param *sm2,
uint8_t *dptr;
prime_len = ec_grp->prime.length;
+ if (prime_len > ROC_AE_EC_DATA_MAX)
+ prime_len = ROC_AE_EC_DATA_MAX;
order_len = ec_grp->order.length;
+ if (order_len > ROC_AE_EC_DATA_MAX)
+ order_len = ROC_AE_EC_DATA_MAX;
/* Truncate input length to curve prime length */
if (message_len > prime_len)
@@ -822,7 +832,11 @@ cnxk_ae_sm2_verify_prep(struct rte_crypto_sm2_op_param
*sm2,
uint8_t *dptr;
prime_len = ec_grp->prime.length;
+ if (prime_len > ROC_AE_EC_DATA_MAX)
+ prime_len = ROC_AE_EC_DATA_MAX;
order_len = ec_grp->order.length;
+ if (order_len > ROC_AE_EC_DATA_MAX)
+ order_len = ROC_AE_EC_DATA_MAX;
/* Truncate input length to curve prime length */
if (message_len > prime_len)
--
2.25.1
[PATCH] examples/fips_validation: fix coverity issues
Fix NULL dereference, out-of-bound, bad bit shift issues
reported by coverity scan.
Coverity issue: 384440, 384435, 384433, 384429
Fixes: 36128a67c27 ("examples/fips_validation: add asymmetric validation")
Cc: sta...@dpdk.org
Signed-off-by: Gowrishankar Muthukrishnan
---
examples/fips_validation/fips_validation_rsa.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/examples/fips_validation/fips_validation_rsa.c
b/examples/fips_validation/fips_validation_rsa.c
index f675b51051..55f81860a0 100644
--- a/examples/fips_validation/fips_validation_rsa.c
+++ b/examples/fips_validation/fips_validation_rsa.c
@@ -328,6 +328,9 @@ parse_test_rsa_json_interim_writeback(struct fips_val *val)
if (prepare_vec_rsa() < 0)
return -1;
+ if (!vec.rsa.e.val)
+ return -1;
+
writeback_hex_str("", info.one_line_text, &vec.rsa.n);
obj = json_string(info.one_line_text);
json_object_set_new(json_info.json_write_group, "n", obj);
@@ -474,7 +477,7 @@ fips_test_randomize_message(struct fips_val *msg, struct
fips_val *rand)
uint16_t rv_len;
if (!msg->val || !rand->val || rand->len > RV_BUF_LEN
- || msg->len > FIPS_TEST_JSON_BUF_LEN)
+ || msg->len > (FIPS_TEST_JSON_BUF_LEN - 1))
return -EINVAL;
memset(rv, 0, sizeof(rv));
@@ -503,7 +506,7 @@ fips_test_randomize_message(struct fips_val *msg, struct
fips_val *rand)
m[i + j] ^= rv[j];
m[i + j] = ((uint8_t *)&rv_bitlen)[0];
- m[i + j + 1] = (((uint8_t *)&rv_bitlen)[1] >> 8) & 0xFF;
+ m[i + j + 1] = ((uint8_t *)&rv_bitlen)[1];
rte_free(msg->val);
msg->len = (rv_bitlen + m_bitlen + 16) / 8;
--
2.25.1
RE: [EXTERNAL] Re: [v11 0/4] PCI Dev and SG copy support
Hi Thomas and Fengchengwen, > > 13/03/2024 09:22, Gowrishankar Muthukrishnan: > > Hi Fengchengwen > > > > > Hi Gowrishankar, > > > > > > On 2024/3/12 20:24, Gowrishankar Muthukrishnan wrote: > > > > Hi Fengchengwen > > > > > > > >> > > > >> Hi Thomas, > > > >> > > > >> On 2024/3/12 17:15, Thomas Monjalon wrote: > > > >>> 07/03/2024 14:55, Gowrishankar Muthukrishnan: > > > >>>> Hi Fengchengwen, > > > >>>> > > > >>>>>> Waiting for a confirmation that this series is good to go. > > > >>>>> > > > >>>>> In the discuss of thread [1], I hope this patchset continue > > > >>>>> take a step forward (means new version) to support > > > >>>>> bi-direction test just by > > > >> modify config.ini file. > > > >>>>> > > > >>>> > > > >>>> This patch set already exposes all configuration via > > > >>>> config.ini. I didn't follow > > > >> what is missing. For bi-direction, we can better continue > > > >> discussing on that patch. > > > >>> > > > >>> Chengwen, please can you confirm whether you require a new > version? > > > >>> Which change exactly is missing? > > > >> > > > >> This patchset is OK with one sub-test only tackle one DMA direction. > > > >> > > > > Thanks for the confirmation. > > > > > > > >> But there is a later patch [1] which will support multiple DMA > > > >> directions within one sub-test. > > > >> it will add a entry "xfer_mode", but I think it complicate the > > > >> test, I prefer we do more in this patchset to support some like > > > >> bi-direction just by modify config.ini, some like this: > > > >> > > > > I think we should discuss about that in bi-directional patch > > > > series. This series > > > is self-contained and there is no need to add bi-directional as part > > > of this series. As far as this patch set is concerned, all the > > > options are exposed via config.ini. Can you comment if there is > > > anything missing, assuming that we are taking bi-directional support as a > separate feature addition. > > > > > > I have identified some improvements to the dma-perf app, and I plan > > > to do it > > > > It is unclear at this point what is the issue that you have with the app or > > this > patch set. This series was first submitted on Aug 10 2023. You had acked v8 on > Jan 25 2024. After the patches were acked, there were still review comments > on variable renames etc, which were all addressed. The patches had been > under review for more than 8 months with very slow progress. > > > > > in 24.07, so if you don't mind, I will incorporate your commits > > > (keeping your > > > signed-off-by) and modify to the one that I described above, and > > > then send to community (also with my improvements commits). > > > > I would like to have this series merged first and not pulled into another > series. We do have few other features that we would like to add on top. I > would assume that you can also add your changes on top. To make > contribution easier, isn't it better to accept at least this patch set (as > you acked > earlier) and then you can continue working on the improvements? > > OK, one feature at a time. > Let's work on top of this patchset applied. > Thank you both for reviewing this series and accepting it in RC3. Regards, Gowrishankar
RE: [EXTERNAL] Re: [v11 0/4] PCI Dev and SG copy support
Hi Thomas, > > Hi Fengchengwen > > > Hi Gowrishankar, > > > > On 2024/3/12 20:24, Gowrishankar Muthukrishnan wrote: > > > Hi Fengchengwen > > > > > >> > > >> Hi Thomas, > > >> > > >> On 2024/3/12 17:15, Thomas Monjalon wrote: > > >>> 07/03/2024 14:55, Gowrishankar Muthukrishnan: > > >>>> Hi Fengchengwen, > > >>>> > > >>>>>> Waiting for a confirmation that this series is good to go. > > >>>>> > > >>>>> In the discuss of thread [1], I hope this patchset continue take > > >>>>> a step forward (means new version) to support bi-direction test > > >>>>> just by > > >> modify config.ini file. > > >>>>> > > >>>> > > >>>> This patch set already exposes all configuration via config.ini. > > >>>> I didn't follow > > >> what is missing. For bi-direction, we can better continue > > >> discussing on that patch. > > >>> > > >>> Chengwen, please can you confirm whether you require a new version? > > >>> Which change exactly is missing? > > >> > > >> This patchset is OK with one sub-test only tackle one DMA direction. > > >> > > > Thanks for the confirmation. > > > > > >> But there is a later patch [1] which will support multiple DMA > > >> directions within one sub-test. > > >> it will add a entry "xfer_mode", but I think it complicate the > > >> test, I prefer we do more in this patchset to support some like > > >> bi-direction just by modify config.ini, some like this: > > >> > > > I think we should discuss about that in bi-directional patch series. > > > This series > > is self-contained and there is no need to add bi-directional as part > > of this series. As far as this patch set is concerned, all the options > > are exposed via config.ini. Can you comment if there is anything > > missing, assuming that we are taking bi-directional support as a separate > feature addition. > > > > I have identified some improvements to the dma-perf app, and I plan to > > do it > > It is unclear at this point what is the issue that you have with the app or > this > patch set. This series was first submitted on Aug 10 2023. You had acked v8 on > Jan 25 2024. After the patches were acked, there were still review comments > on variable renames etc, which were all addressed. The patches had been > under review for more than 8 months with very slow progress. > > > in 24.07, so if you don't mind, I will incorporate your commits > > (keeping your > > signed-off-by) and modify to the one that I described above, and then > > send to community (also with my improvements commits). > > I would like to have this series merged first and not pulled into another > series. > We do have few other features that we would like to add on top. I would > assume that you can also add your changes on top. To make contribution > easier, isn't it better to accept at least this patch set (as you acked > earlier) and > then you can continue working on the improvements? > Can this series be merged ? Thanks, Gowrishankar > Thanks, > Gowrishankar >
RE: [EXTERNAL] Re: [v11 0/4] PCI Dev and SG copy support
Hi Fengchengwen > Hi Gowrishankar, > > On 2024/3/12 20:24, Gowrishankar Muthukrishnan wrote: > > Hi Fengchengwen > > > >> > >> Hi Thomas, > >> > >> On 2024/3/12 17:15, Thomas Monjalon wrote: > >>> 07/03/2024 14:55, Gowrishankar Muthukrishnan: > >>>> Hi Fengchengwen, > >>>> > >>>>>> Waiting for a confirmation that this series is good to go. > >>>>> > >>>>> In the discuss of thread [1], I hope this patchset continue take a > >>>>> step forward (means new version) to support bi-direction test just > >>>>> by > >> modify config.ini file. > >>>>> > >>>> > >>>> This patch set already exposes all configuration via config.ini. I > >>>> didn't follow > >> what is missing. For bi-direction, we can better continue discussing > >> on that patch. > >>> > >>> Chengwen, please can you confirm whether you require a new version? > >>> Which change exactly is missing? > >> > >> This patchset is OK with one sub-test only tackle one DMA direction. > >> > > Thanks for the confirmation. > > > >> But there is a later patch [1] which will support multiple DMA > >> directions within one sub-test. > >> it will add a entry "xfer_mode", but I think it complicate the test, > >> I prefer we do more in this patchset to support some like > >> bi-direction just by modify config.ini, some like this: > >> > > I think we should discuss about that in bi-directional patch series. This > > series > is self-contained and there is no need to add bi-directional as part of this > series. As far as this patch set is concerned, all the options are exposed via > config.ini. Can you comment if there is anything missing, assuming that we are > taking bi-directional support as a separate feature addition. > > I have identified some improvements to the dma-perf app, and I plan to do it It is unclear at this point what is the issue that you have with the app or this patch set. This series was first submitted on Aug 10 2023. You had acked v8 on Jan 25 2024. After the patches were acked, there were still review comments on variable renames etc, which were all addressed. The patches had been under review for more than 8 months with very slow progress. > in 24.07, so if you don't mind, I will incorporate your commits (keeping your > signed-off-by) and modify to the one that I described above, and then send to > community (also with my improvements commits). I would like to have this series merged first and not pulled into another series. We do have few other features that we would like to add on top. I would assume that you can also add your changes on top. To make contribution easier, isn't it better to accept at least this patch set (as you acked earlier) and then you can continue working on the improvements? Thanks, Gowrishankar > > Thanks > > > > > Thanks, > > Gowrishankar > > > >> 1. extend lcore_dma: > >>current lcore_dma is: lcore10@:00:04.2 > >>extend it support: > >> lcore10@:00:04.2,dir=m2d,coreid=1,pfid=2,vfid=3,raddr=0x > >> 2. to fix one entry can't hold too many dma device, support entrys: > >> lcore_dma_1, lcore_dma_2 > >>which value is same with lcore_dma. > >> > >> So for bi-direction, we just define config.ini as: > >> > lcore_dma=lcore10@:00:04.2,dir=m2d,coreid=1,pfid=2,vfid=3,raddr=0 > >> x , > >> lcore10@:00:04.2,dir=d2m,coreid=1,pfid=2,vfid=3,raddr=0x > >> > >> [1] https://urldefense.proofpoint.com/v2/url?u=https- > >> 3A__patches.dpdk.org_project_dpdk_patch_20240229141426.4188428- > >> 2D1-2Damitprakashs- > >> 40marvell.com_&d=DwICaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=EAtr- > >> > g7yUFhtOio8r2Rtm13Aqe4WVp_S_gHpcu6KFVo&m=DUaL_AJR1zqM0T2yw3 > >> aV44EObB90uqw5weFzSm- > >> > w39citSeGozNdEe4kzicss_KG&s=UTAcoZx5DjSJHyzxyLMxXz1bPqfPXQM7feDx > >> ZdC6Jgk&e= > >> > >>>
RE: [EXTERNAL] Re: [v11 0/4] PCI Dev and SG copy support
Hi Fengchengwen > > Hi Thomas, > > On 2024/3/12 17:15, Thomas Monjalon wrote: > > 07/03/2024 14:55, Gowrishankar Muthukrishnan: > >> Hi Fengchengwen, > >> > >>>> Waiting for a confirmation that this series is good to go. > >>> > >>> In the discuss of thread [1], I hope this patchset continue take a > >>> step forward (means new version) to support bi-direction test just by > modify config.ini file. > >>> > >> > >> This patch set already exposes all configuration via config.ini. I didn't > >> follow > what is missing. For bi-direction, we can better continue discussing on that > patch. > > > > Chengwen, please can you confirm whether you require a new version? > > Which change exactly is missing? > > This patchset is OK with one sub-test only tackle one DMA direction. > Thanks for the confirmation. > But there is a later patch [1] which will support multiple DMA directions > within > one sub-test. > it will add a entry "xfer_mode", but I think it complicate the test, I prefer > we do > more in this patchset to support some like bi-direction just by modify > config.ini, some like this: > I think we should discuss about that in bi-directional patch series. This series is self-contained and there is no need to add bi-directional as part of this series. As far as this patch set is concerned, all the options are exposed via config.ini. Can you comment if there is anything missing, assuming that we are taking bi-directional support as a separate feature addition. Thanks, Gowrishankar > 1. extend lcore_dma: >current lcore_dma is: lcore10@:00:04.2 >extend it support: > lcore10@:00:04.2,dir=m2d,coreid=1,pfid=2,vfid=3,raddr=0x > 2. to fix one entry can't hold too many dma device, support entrys: > lcore_dma_1, lcore_dma_2 >which value is same with lcore_dma. > > So for bi-direction, we just define config.ini as: > lcore_dma=lcore10@:00:04.2,dir=m2d,coreid=1,pfid=2,vfid=3,raddr=0x > , lcore10@:00:04.2,dir=d2m,coreid=1,pfid=2,vfid=3,raddr=0x > > [1] https://urldefense.proofpoint.com/v2/url?u=https- > 3A__patches.dpdk.org_project_dpdk_patch_20240229141426.4188428- > 2D1-2Damitprakashs- > 40marvell.com_&d=DwICaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=EAtr- > g7yUFhtOio8r2Rtm13Aqe4WVp_S_gHpcu6KFVo&m=DUaL_AJR1zqM0T2yw3 > aV44EObB90uqw5weFzSm- > w39citSeGozNdEe4kzicss_KG&s=UTAcoZx5DjSJHyzxyLMxXz1bPqfPXQM7feDx > ZdC6Jgk&e= > > >
RE: [EXTERNAL] Re: [v11 0/4] PCI Dev and SG copy support
Hi Fengchengwen, > > Waiting for a confirmation that this series is good to go. > > In the discuss of thread [1], I hope this patchset continue take a step > forward > (means new version) to support bi-direction test just by modify config.ini > file. > This patch set already exposes all configuration via config.ini. I didn't follow what is missing. For bi-direction, we can better continue discussing on that patch. Thanks, Gowrishankar > [1] [PATCH v2] app/dma-perf: support bi-directional transfer > > Thanks > > > > > Recheck-request: iol-unit-amd64-testing > > > > > > . > >
RE: [EXTERNAL] Re: [v11 0/4] PCI Dev and SG copy support
Hi Thomas, > 29/02/2024 14:48, Gowrishankar Muthukrishnan: > > Improve dma-perf application to support PCI dev and SG copy, along > > with additional supports as below: > > - validate copied memory > > - skip tests if not opted. > > > > v11: > > - Review suggestions. > > > > Gowrishankar Muthukrishnan (4): > > app/dma-perf: add skip support > > app/dma-perf: add PCI device support > > app/dma-perf: validate copied memory > > app/dma-perf: add SG copy support > > Waiting for a confirmation that this series is good to go. > Patches are already acked by maintainer and is ready for merge. Thanks, Gowrishankar > Recheck-request: iol-unit-amd64-testing >
RE: [EXTERNAL] Re: [EXT] Re: [PATCH v10 4/4] app/dma-perf: add SG copy support
this for loop will copy all
> nr_bufs,
> let's defind this is a round copy.
> dma_copy:
> ret = rte_dma_copy(dev_id, 0,
> rte_mbuf_data_iova(srcs[i]),
> rte_mbuf_data_iova(dsts[i]), buf_size, 0);
> if (unlikely(ret < 0)) {
> if (ret == -ENOSPC) {
> do_dma_submit_and_poll(dev_id,
> &async_cnt, worker_info);
> goto dma_copy;
> } else
> error_exit(dev_id);
> }
> async_cnt++;
>
> if ((async_cnt % kick_batch) == 0)
> do_dma_submit_and_poll(dev_id,
> &async_cnt, worker_info);
> }
>
> if (unlikely(work_info->verify)) {
> ret = verify();
> if (ret != 0) {
> // error trace,
> break;
> }
> }
>
> if (worker_info->stop_flag) // if don't stop, it will do many
> round copies.
> break;
> }
>
> and make this verify as a config entry
I believe there is a difference in understanding of what this is intended to
do. Intention here is not to validate every operation done by DMA, and that is
already taken care by UT.
Is it possible that we are we misreporting numbers if the application is buggy
or PMD is misbehaving for the scenario under test and the copies are not
actually performed? Yes. Think about a scenario where PMD is buggy when trying
bursts of more than 1.
Checking last set of buffers is more like testing a sample from the perf test
to make sure perf test was indeed performing what it is claiming to do. If you
think it is unnecessary to do so, we can drop this from upstream. But adding
complete verification in performance app would be repeating what a unit test is
expected to do. I would suggest not to do that.
Thanks,
Gowrishankar
[v11 4/4] app/dma-perf: add SG copy support
Add SG copy support.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Anoob Joseph
Acked-by: Chengwen Feng
---
v11:
- using struct for SGE config.
app/test-dma-perf/benchmark.c | 283 ++
app/test-dma-perf/config.ini | 25 ++-
app/test-dma-perf/main.c | 41 -
app/test-dma-perf/main.h | 5 +-
4 files changed, 317 insertions(+), 37 deletions(-)
diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index 9c155a58cc..d821af8532 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -34,6 +34,13 @@ struct worker_info {
uint32_t test_cpl;
};
+struct sge_info {
+ struct rte_dma_sge *srcs;
+ struct rte_dma_sge *dsts;
+ uint8_t nb_srcs;
+ uint8_t nb_dsts;
+};
+
struct lcore_params {
uint8_t scenario_id;
unsigned int lcore_id;
@@ -46,6 +53,7 @@ struct lcore_params {
uint16_t test_secs;
struct rte_mbuf **srcs;
struct rte_mbuf **dsts;
+ struct sge_info sge;
volatile struct worker_info worker_info;
};
@@ -86,21 +94,31 @@ calc_result(uint32_t buf_size, uint32_t nr_buf, uint16_t
nb_workers, uint16_t te
}
static void
-output_result(uint8_t scenario_id, uint32_t lcore_id, char *dma_name, uint16_t
ring_size,
- uint16_t kick_batch, uint64_t ave_cycle, uint32_t
buf_size, uint32_t nr_buf,
- float memory, float bandwidth, float mops, bool is_dma)
+output_result(struct test_configure *cfg, struct lcore_params *para,
+ uint16_t kick_batch, uint64_t ave_cycle, uint32_t
buf_size,
+ uint32_t nr_buf, float memory, float bandwidth, float
mops)
{
- if (is_dma)
- printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size:
%u.\n",
- lcore_id, dma_name, ring_size, kick_batch);
- else
+ uint16_t ring_size = cfg->ring_size.cur;
+ uint8_t scenario_id = cfg->scenario_id;
+ uint32_t lcore_id = para->lcore_id;
+ char *dma_name = para->dma_name;
+
+ if (cfg->is_dma) {
+ printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size:
%u", lcore_id,
+ dma_name, ring_size, kick_batch);
+ if (cfg->is_sg)
+ printf(" DMA src sges: %u, dst sges: %u",
+ para->sge.nb_srcs, para->sge.nb_dsts);
+ printf(".\n");
+ } else {
printf("lcore %u\n", lcore_id);
+ }
printf("Average Cycles/op: %" PRIu64 ", Buffer Size: %u B, Buffer
Number: %u, Memory: %.2lf MB, Frequency: %.3lf Ghz.\n",
ave_cycle, buf_size, nr_buf, memory,
rte_get_timer_hz()/10.0);
printf("Average Bandwidth: %.3lf Gbps, MOps: %.3lf\n", bandwidth, mops);
- if (is_dma)
+ if (cfg->is_dma)
snprintf(output_str[lcore_id], MAX_OUTPUT_STR_LEN,
CSV_LINE_DMA_FMT,
scenario_id, lcore_id, dma_name, ring_size, kick_batch,
buf_size,
nr_buf, memory, ave_cycle, bandwidth, mops);
@@ -167,7 +185,7 @@ vchan_data_populate(uint32_t dev_id, struct
rte_dma_vchan_conf *qconf,
/* Configuration of device. */
static void
-configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg)
+configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg, uint8_t
sges_max)
{
uint16_t vchan = 0;
struct rte_dma_info info;
@@ -190,6 +208,10 @@ configure_dmadev_queue(uint32_t dev_id, struct
test_configure *cfg)
rte_exit(EXIT_FAILURE, "Error, no configured queues reported on
device id. %u\n",
dev_id);
+ if (info.max_sges < sges_max)
+ rte_exit(EXIT_FAILURE, "Error with unsupported max_sges on
device id %u.\n",
+ dev_id);
+
if (rte_dma_start(dev_id) != 0)
rte_exit(EXIT_FAILURE, "Error with dma start.\n");
}
@@ -202,8 +224,12 @@ config_dmadevs(struct test_configure *cfg)
uint32_t i;
int dev_id;
uint16_t nb_dmadevs = 0;
+ uint8_t nb_sges = 0;
char *dma_name;
+ if (cfg->is_sg)
+ nb_sges = RTE_MAX(cfg->nb_src_sges, cfg->nb_dst_sges);
+
for (i = 0; i < ldm->cnt; i++) {
dma_name = ldm->dma_names[i];
dev_id = rte_dma_get_dev_id_by_name(dma_name);
@@ -213,7 +239,7 @@ config_dmadevs(struct test_configure *cfg)
}
ldm->dma_ids[i] = dev_id;
- configure_dmadev_queue(dev_id, cfg);
+ configure_dmadev_queue(dev_id, cfg, nb_sges);
++nb_dmadevs;
}
@@ -253,7 +279,7 @@ do_dma_submit_and_poll(uint16_t dev_id, u
[v11 3/4] app/dma-perf: validate copied memory
Validate copied memory to ensure DMA copy did not fail.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Anoob Joseph
Acked-by: Chengwen Feng
---
app/test-dma-perf/benchmark.c | 23 ++-
app/test-dma-perf/main.c | 16 +++-
app/test-dma-perf/main.h | 2 +-
3 files changed, 34 insertions(+), 7 deletions(-)
diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index 3c4fddb138..9c155a58cc 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include "main.h"
@@ -407,6 +408,11 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
return -1;
}
+ for (i = 0; i < nr_buf; i++) {
+ memset(rte_pktmbuf_mtod((*srcs)[i], void *), rte_rand(),
buf_size);
+ memset(rte_pktmbuf_mtod((*dsts)[i], void *), 0, buf_size);
+ }
+
if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM ||
cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) {
ext_buf_info = rte_malloc(NULL, sizeof(struct
rte_mbuf_ext_shared_info), 0);
@@ -445,7 +451,7 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
return 0;
}
-void
+int
mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
{
uint32_t i;
@@ -463,6 +469,7 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
uint32_t avg_cycles_total;
float mops, mops_total;
float bandwidth, bandwidth_total;
+ int ret = 0;
if (setup_memory_env(cfg, &srcs, &dsts) < 0)
goto out;
@@ -536,6 +543,18 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
rte_eal_mp_wait_lcore();
+ if (cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_MEM) {
+ for (i = 0; i < (nr_buf / nb_workers) * nb_workers; i++) {
+ if (memcmp(rte_pktmbuf_mtod(srcs[i], void *),
+ rte_pktmbuf_mtod(dsts[i], void *),
+ cfg->buf_size.cur) != 0) {
+ printf("Copy validation fails for buffer number
%d\n", i);
+ ret = -1;
+ goto out;
+ }
+ }
+ }
+
mops_total = 0;
bandwidth_total = 0;
avg_cycles_total = 0;
@@ -601,4 +620,6 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
rte_dma_stop(ldm->dma_ids[i]);
}
}
+
+ return ret;
}
diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c
index 051f76a6f9..df05bcd7df 100644
--- a/app/test-dma-perf/main.c
+++ b/app/test-dma-perf/main.c
@@ -101,20 +101,24 @@ open_output_csv(const char *rst_path_ptr)
return 0;
}
-static void
+static int
run_test_case(struct test_configure *case_cfg)
{
+ int ret = 0;
+
switch (case_cfg->test_type) {
case TEST_TYPE_DMA_MEM_COPY:
- mem_copy_benchmark(case_cfg, true);
+ ret = mem_copy_benchmark(case_cfg, true);
break;
case TEST_TYPE_CPU_MEM_COPY:
- mem_copy_benchmark(case_cfg, false);
+ ret = mem_copy_benchmark(case_cfg, false);
break;
default:
printf("Unknown test type. %s\n", case_cfg->test_type_str);
break;
}
+
+ return ret;
}
static void
@@ -159,8 +163,10 @@ run_test(uint32_t case_id, struct test_configure *case_cfg)
case_cfg->scenario_id++;
printf("\nRunning scenario %d\n", case_cfg->scenario_id);
- run_test_case(case_cfg);
- output_csv(false);
+ if (run_test_case(case_cfg) < 0)
+ printf("\nTest fails! skipping this scenario.\n");
+ else
+ output_csv(false);
if (var_entry->op == OP_ADD)
var_entry->cur += var_entry->incr;
diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h
index 745c24b7fe..1123e7524a 100644
--- a/app/test-dma-perf/main.h
+++ b/app/test-dma-perf/main.h
@@ -66,6 +66,6 @@ struct test_configure {
struct test_vchan_dev_config vchan_dev;
};
-void mem_copy_benchmark(struct test_configure *cfg, bool is_dma);
+int mem_copy_benchmark(struct test_configure *cfg, bool is_dma);
#endif /* MAIN_H */
--
2.25.1
[v11 2/4] app/dma-perf: add PCI device support
Add support to test performance for "device to memory" and
"memory to device" data transfer.
Signed-off-by: Amit Prakash Shukla
Acked-by: Anoob Joseph
Acked-by: Chengwen Feng
---
v11:
- config file formatting.
app/test-dma-perf/benchmark.c | 119 ++
app/test-dma-perf/config.ini | 31 +
app/test-dma-perf/main.c | 77 ++
app/test-dma-perf/main.h | 7 ++
4 files changed, 222 insertions(+), 12 deletions(-)
diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index 9b1f58c78c..3c4fddb138 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -127,17 +127,54 @@ cache_flush_buf(__rte_unused struct rte_mbuf **array,
#endif
}
+static int
+vchan_data_populate(uint32_t dev_id, struct rte_dma_vchan_conf *qconf,
+ struct test_configure *cfg)
+{
+ struct rte_dma_info info;
+
+ qconf->direction = cfg->transfer_dir;
+
+ rte_dma_info_get(dev_id, &info);
+ if (!(RTE_BIT64(qconf->direction) & info.dev_capa))
+ return -1;
+
+ qconf->nb_desc = cfg->ring_size.cur;
+
+ switch (qconf->direction) {
+ case RTE_DMA_DIR_MEM_TO_DEV:
+ qconf->dst_port.pcie.vfen = 1;
+ qconf->dst_port.port_type = RTE_DMA_PORT_PCIE;
+ qconf->dst_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid;
+ qconf->dst_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid;
+ qconf->dst_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid;
+ break;
+ case RTE_DMA_DIR_DEV_TO_MEM:
+ qconf->src_port.pcie.vfen = 1;
+ qconf->src_port.port_type = RTE_DMA_PORT_PCIE;
+ qconf->src_port.pcie.coreid = cfg->vchan_dev.port.pcie.coreid;
+ qconf->src_port.pcie.vfid = cfg->vchan_dev.port.pcie.vfid;
+ qconf->src_port.pcie.pfid = cfg->vchan_dev.port.pcie.pfid;
+ break;
+ case RTE_DMA_DIR_MEM_TO_MEM:
+ case RTE_DMA_DIR_DEV_TO_DEV:
+ break;
+ }
+
+ return 0;
+}
+
/* Configuration of device. */
static void
-configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size)
+configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg)
{
uint16_t vchan = 0;
struct rte_dma_info info;
struct rte_dma_conf dev_config = { .nb_vchans = 1 };
- struct rte_dma_vchan_conf qconf = {
- .direction = RTE_DMA_DIR_MEM_TO_MEM,
- .nb_desc = ring_size
- };
+ struct rte_dma_vchan_conf qconf = { 0 };
+
+ if (vchan_data_populate(dev_id, &qconf, cfg) != 0)
+ rte_exit(EXIT_FAILURE, "Error with vchan data populate.\n");
if (rte_dma_configure(dev_id, &dev_config) != 0)
rte_exit(EXIT_FAILURE, "Error with dma configure.\n");
@@ -159,7 +196,6 @@ configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size)
static int
config_dmadevs(struct test_configure *cfg)
{
- uint32_t ring_size = cfg->ring_size.cur;
struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map;
uint32_t nb_workers = ldm->cnt;
uint32_t i;
@@ -176,7 +212,7 @@ config_dmadevs(struct test_configure *cfg)
}
ldm->dma_ids[i] = dev_id;
- configure_dmadev_queue(dev_id, ring_size);
+ configure_dmadev_queue(dev_id, cfg);
++nb_dmadevs;
}
@@ -302,13 +338,23 @@ do_cpu_mem_copy(void *p)
return 0;
}
+static void
+dummy_free_ext_buf(void *addr, void *opaque)
+{
+ RTE_SET_USED(addr);
+ RTE_SET_USED(opaque);
+}
+
static int
setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs,
struct rte_mbuf ***dsts)
{
- unsigned int buf_size = cfg->buf_size.cur;
+ static struct rte_mbuf_ext_shared_info *ext_buf_info;
+ unsigned int cur_buf_size = cfg->buf_size.cur;
+ unsigned int buf_size = cur_buf_size + RTE_PKTMBUF_HEADROOM;
unsigned int nr_sockets;
uint32_t nr_buf = cfg->nr_buf;
+ uint32_t i;
nr_sockets = rte_socket_count();
if (cfg->src_numa_node >= nr_sockets ||
@@ -321,7 +367,7 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
nr_buf,
0,
0,
- buf_size + RTE_PKTMBUF_HEADROOM,
+ buf_size,
cfg->src_numa_node);
if (src_pool == NULL) {
PRINT_ERR("Error with source mempool creation.\n");
@@ -332,7 +378,7 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
nr_buf,
0,
0,
- buf_size + RTE_PKTMBUF_HEADROOM,
+ buf_size,
cfg->dst_numa_node);
if (dst_pool == NULL) {
PRI
[v11 1/4] app/dma-perf: add skip support
Add support to skip running a dma-perf test-case.
Signed-off-by: Amit Prakash Shukla
Acked-by: Anoob Joseph
Acked-by: Chengwen Feng
---
v11:
- config file formatting
app/test-dma-perf/config.ini | 2 ++
app/test-dma-perf/main.c | 48 ++--
app/test-dma-perf/main.h | 1 +
3 files changed, 32 insertions(+), 19 deletions(-)
diff --git a/app/test-dma-perf/config.ini b/app/test-dma-perf/config.ini
index b550f4b23f..bb0b1aa11a 100644
--- a/app/test-dma-perf/config.ini
+++ b/app/test-dma-perf/config.ini
@@ -30,6 +30,8 @@
; If you have already set the "-l" and "-a" parameters using EAL,
; make sure that the value of "lcore" falls within their range of values.
+; "skip" To skip a test-case set skip to 1.
+
; To specify a configuration file, use the "--config" flag followed by the
path to the file.
; To specify a result file, use the "--result" flag followed by the path to
the file.
diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c
index 544784df50..e9e40e72e7 100644
--- a/app/test-dma-perf/main.c
+++ b/app/test-dma-perf/main.c
@@ -86,6 +86,19 @@ output_header(uint32_t case_id, struct test_configure
*case_cfg)
output_csv(true);
}
+static int
+open_output_csv(const char *rst_path_ptr)
+{
+ fd = fopen(rst_path_ptr, "a");
+ if (!fd) {
+ printf("Open output CSV file error.\n");
+ return 1;
+ }
+ output_csv(true);
+ fclose(fd);
+ return 0;
+}
+
static void
run_test_case(struct test_configure *case_cfg)
{
@@ -322,6 +335,7 @@ load_configs(const char *path)
const char *case_type;
const char *lcore_dma;
const char *mem_size_str, *buf_size_str, *ring_size_str,
*kick_batch_str;
+ const char *skip;
int args_nr, nb_vp;
bool is_dma;
@@ -341,6 +355,13 @@ load_configs(const char *path)
for (i = 0; i < nb_sections; i++) {
snprintf(section_name, CFG_NAME_LEN, "case%d", i + 1);
test_case = &test_cases[i];
+
+ skip = rte_cfgfile_get_entry(cfgfile, section_name, "skip");
+ if (skip && (atoi(skip) == 1)) {
+ test_case->is_skip = true;
+ continue;
+ }
+
case_type = rte_cfgfile_get_entry(cfgfile, section_name,
"type");
if (case_type == NULL) {
printf("Error: No case type in case %d, the test will
be finished here.\n",
@@ -525,31 +546,20 @@ main(int argc, char *argv[])
printf("Running cases...\n");
for (i = 0; i < case_nb; i++) {
- if (!test_cases[i].is_valid) {
- printf("Invalid test case %d.\n\n", i + 1);
- snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Invalid
case %d\n", i + 1);
-
- fd = fopen(rst_path_ptr, "a");
- if (!fd) {
- printf("Open output CSV file error.\n");
+ if (test_cases[i].is_skip) {
+ printf("Test case %d configured to be skipped.\n\n", i
+ 1);
+ snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Skip the
test-case %d\n",
+i + 1);
+ if (open_output_csv(rst_path_ptr))
return 0;
- }
- output_csv(true);
- fclose(fd);
continue;
}
- if (test_cases[i].test_type == TEST_TYPE_NONE) {
- printf("No valid test type in test case %d.\n\n", i +
1);
+ if (!test_cases[i].is_valid) {
+ printf("Invalid test case %d.\n\n", i + 1);
snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Invalid
case %d\n", i + 1);
-
- fd = fopen(rst_path_ptr, "a");
- if (!fd) {
- printf("Open output CSV file error.\n");
+ if (open_output_csv(rst_path_ptr))
return 0;
- }
- output_csv(true);
- fclose(fd);
continue;
}
diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h
index 62085e6e8f..32670151af 100644
--- a/app/test-dma-perf/main.h
+++ b/app/test-dma-perf/main.h
@@ -40,6 +40,7 @@ struct lcore_dma_map_t {
struct test_configure {
bool is_valid;
+ bool is_skip;
uint8_t test_type;
const char *test_type_str;
uint16_t src_numa_node;
--
2.25.1
[v11 0/4] PCI Dev and SG copy support
Improve dma-perf application to support PCI dev and SG copy, along with additional supports as below: - validate copied memory - skip tests if not opted. v11: - Review suggestions. Gowrishankar Muthukrishnan (4): app/dma-perf: add skip support app/dma-perf: add PCI device support app/dma-perf: validate copied memory app/dma-perf: add SG copy support app/test-dma-perf/benchmark.c | 413 ++ app/test-dma-perf/config.ini | 56 + app/test-dma-perf/main.c | 178 --- app/test-dma-perf/main.h | 13 +- 4 files changed, 595 insertions(+), 65 deletions(-) -- 2.25.1
RE: [EXT] Re: [PATCH v10 4/4] app/dma-perf: add SG copy support
Hi Fengcheng,
> -Original Message-
> From: fengchengwen
> Sent: Wednesday, February 28, 2024 3:02 PM
> To: Amit Prakash Shukla ; Cheng Jiang
>
> Cc: dev@dpdk.org; Jerin Jacob ; Anoob Joseph
> ; Kevin Laatz ; Bruce
> Richardson ; Pavan Nikhilesh Bhagavatula
> ; Gowrishankar Muthukrishnan
>
> Subject: [EXT] Re: [PATCH v10 4/4] app/dma-perf: add SG copy support
>
> External Email
>
> ------
> Hi Gowrishankar,
>
> On 2024/2/28 2:56, Amit Prakash Shukla wrote:
> > From: Gowrishankar Muthukrishnan
> >
> > Add SG copy support.
> >
> > Signed-off-by: Gowrishankar Muthukrishnan
> > Acked-by: Anoob Joseph
> > Acked-by: Chengwen Feng
> > ---
> > v10:
> > - SG config variables renamed.
> >
> > app/test-dma-perf/benchmark.c | 278
> > +-
> > app/test-dma-perf/config.ini | 25 ++-
> > app/test-dma-perf/main.c | 34 -
> > app/test-dma-perf/main.h | 5 +-
> > 4 files changed, 300 insertions(+), 42 deletions(-)
> >
> > diff --git a/app/test-dma-perf/benchmark.c
> > b/app/test-dma-perf/benchmark.c index 0047e2f4b8..25ed6fa6d0 100644
> > --- a/app/test-dma-perf/benchmark.c
> > +++ b/app/test-dma-perf/benchmark.c
> > @@ -46,6 +46,10 @@ struct lcore_params {
> > uint16_t test_secs;
> > struct rte_mbuf **srcs;
> > struct rte_mbuf **dsts;
> > + struct rte_dma_sge *src_sges;
> > + struct rte_dma_sge *dst_sges;
> > + uint8_t src_ptrs;
> > + uint8_t dst_ptrs;
>
> 1. src/dst_ptrs -> src/dst_nb_sge
Ack.
> 2. How about wrap these four fields as a struct?
Ack.
>
> > volatile struct worker_info worker_info; };
> >
> > @@ -86,21 +90,31 @@ calc_result(uint32_t buf_size, uint32_t nr_buf,
> > uint16_t nb_workers, uint16_t te }
> >
> > static void
> > -output_result(uint8_t scenario_id, uint32_t lcore_id, char *dma_name,
> uint16_t ring_size,
> > - uint16_t kick_batch, uint64_t ave_cycle, uint32_t
> buf_size, uint32_t nr_buf,
> > - float memory, float bandwidth, float mops, bool
> is_dma)
> > +output_result(struct test_configure *cfg, struct lcore_params *para,
> > + uint16_t kick_batch, uint64_t ave_cycle, uint32_t
> buf_size,
> > + uint32_t nr_buf, float memory, float bandwidth, float
> mops)
> > {
> > - if (is_dma)
> > - printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size:
> %u.\n",
> > - lcore_id, dma_name, ring_size, kick_batch);
> > - else
> > + uint16_t ring_size = cfg->ring_size.cur;
> > + uint8_t scenario_id = cfg->scenario_id;
> > + uint32_t lcore_id = para->lcore_id;
> > + char *dma_name = para->dma_name;
> > +
> > + if (cfg->is_dma) {
> > + printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size:
> %u", lcore_id,
> > + dma_name, ring_size, kick_batch);
> > + if (cfg->is_sg)
> > + printf(" DMA src ptrs: %u, dst ptrs: %u",
> > + para->src_ptrs, para->dst_ptrs);
>
> DMA src sges: %u DMA dst sges: %u
>
> I think we should add a column which title maybe misc, some like sg-src[4]-
> dst[1], and later we may add fill test, then this field could be pattern-
> 0x12345678
>
> And in "[PATCH v10 2/4] app/dma-perf: add PCI device support" commit, if
> the DMA was worked in non-mem2mem direction, we could add simple
> descriptor of direction and pcie.info in the above misc column.
>
I am sorry, I could not understand complete picture here. Do you mean we
reserve a column and use it as per test type.
For plain mem copy, nothing added.
For SG mem copy, instead of showing "DMA src sges: 1, dst sges: 4", print
"sg-src[1]-dst[4]".
In future, when we add fill test in benchmark, this line instead be
"pattern-0x12345678".
Is my understanding correct over here ?
> > + printf(".\n");
> > + } else {
> > printf("lcore %u\n", lcore_id);
> > + }
> >
> > printf("Average Cycles/op: %" PRIu64 ", Buffer Size: %u B, Buffer
> Number: %u, Memory: %.2lf MB, Frequency: %.3lf Ghz.\n",
> > ave_cycle, buf_size, nr_buf, memory,
> rte_get_timer_hz()/10.0);
> > printf("Average Bandwidth: %.3lf Gbps, MOps: %.3lf\n", bandwidth,
> > mops);
> >
>
RE: [EXT] Re: [PATCH v10 3/4] app/dma-perf: validate copied memory
Hi Fengchengwen,
> > + for (i = 0; i < (nr_buf / nb_workers) * nb_workers; i++) {
> > + if (memcmp(rte_pktmbuf_mtod(srcs[i], void *),
> > + rte_pktmbuf_mtod(dsts[i], void *),
> > + cfg->buf_size.cur) != 0) {
> > + printf("Copy validation fails for buffer number %d\n",
> i);
>
> For non-mem2mem DMA, like mem2dev or dev2mem, the device host
> address may not direct accessable by CPU (if could may need mmap).
>
This has been checked in 4/4 patch as (cfg->transfer_dir ==
RTE_DMA_DIR_MEM_TO_MEM). Would you still need it in this patch only ?.
Thanks,
Gowrishankar
> So pls restrict it only mem2mem, or drop this commit.
>
> Thanks
RE: [EXT] Re: [PATCH v8 4/4] app/dma-perf: add SG copy support
> > diff --git a/app/test-dma-perf/config.ini > > b/app/test-dma-perf/config.ini index cddcf93c6e..f460b93414 100644 > > --- a/app/test-dma-perf/config.ini > > +++ b/app/test-dma-perf/config.ini > > @@ -9,6 +9,8 @@ > > ; "buf_size" denotes the memory size of a single operation. > > ; "dma_ring_size" denotes the dma ring buffer size. It should be must > > be a power of two, and between ; 64 and 4096. > > +; "dma_ptrs_src" denotes number of source segments. > > +; "dma_ptrs_dst" denotes number of destination segments. > > The two entry is hard to understand, I prefer src_sge_num/dst_sge_num > (better names are also welcome.) and add descript about: > 1. only valid when the type is DMA_MEM_COPY 2. enable scatter-gather copy > test when both are set. > Yes Chengwen, I have named variables dma_src_sge and dma_dst_sge to fit context. Please check https://patches.dpdk.org/project/dpdk/patch/20240227160031.3931694-5-amitpraka...@marvell.com/ . Thanks, Gowrishankar
RE: [PATCH v8 0/4] PCI Dev and SG copy support
Hi, Could this series be merged as the patches are acked. Thanks, Gowrishankar
RE: [PATCH v8 0/3] test/dma: add vchan reconfig and SG tests
Hi, Could this series be merged as the patches are acked. Thanks, Gowrishankar
RE: [EXT] [RFC PATCH] cryptodev: add sm2 key exchange and encryption for HW
Hi,
> This commit adds comments for the proposal of addition of SM2 algorithm key
> exchange and encryption/decryption operation.
>
> Signed-off-by: Arkadiusz Kusztal
> ---
> lib/cryptodev/rte_crypto_asym.h | 16
> 1 file changed, 16 insertions(+)
>
> diff --git a/lib/cryptodev/rte_crypto_asym.h b/lib/cryptodev/rte_crypto_asym.h
> index 39d3da3952..6911a14dbd 100644
> --- a/lib/cryptodev/rte_crypto_asym.h
> +++ b/lib/cryptodev/rte_crypto_asym.h
> @@ -639,6 +639,10 @@ struct rte_crypto_asym_xform { struct
> rte_crypto_sm2_op_param {
> enum rte_crypto_asym_op_type op_type;
> /**< Signature generation or verification. */
> + /*
> + * For key exchange operation, new struct should be created.
> + * Doing that, the current struct could be split into signature and
> encryption.
> + */
>
> enum rte_crypto_auth_algorithm hash;
> /**< Hash algorithm used in EC op. */
> @@ -672,6 +676,18 @@ struct rte_crypto_sm2_op_param {
>* C1 (1 + N + N), C2 = M, C3 = N. The cipher.length field will
>* be overwritten by the PMD with the encrypted length.
>*/
> + /* SM2 encryption algorithm relies on certain cryptographic functions,
> + * that HW devices not necesseraly need to implement.
> + * When C1 is a elliptic curve point, C2 and C3 need additional
> + * operation like KDF and Hash. The question here is: should only
> + * elliptic curve output parameters (namely C1 and PB) be returned to
> the user,
> + * or should encryption be, in this case, computed within the PMD using
> + * software methods, or should both option be available?
> + */
I second on splitting this struct for PKE (may be _pke and _dsa).
At the same time, handling these structs should be followed by some capability
check
and that was what I have been thinking on to propose as asym OP capability in
this release.
Right now, asymmetric capability is defined only by xform (not also by op).
But we could add op capab also as below.
struct rte_cryptodev_capabilities caps_sm2[] = {
.op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC,
{
.asym = {
.xform_capa = {
.xform_type = RTE_CRYPTO_ASYM_XFORM_SM2,
.op_types = ...
},
.op_capa = [
{
.op_type = RTE_CRYPTO_ASYM_OP_ENC,
.capa = (1 <<
RTE_CRYPTO_ASYM_SM2_PKE_KDF | 1 << RTE_CRYPTO_ASYM_SM2_PKE_HASH) <<<< NEW ENUM
>>>>
}
]
}
}
}
Doing this, hash_algos member in asym xform capability today can eventually be
removed
And it sounds better for an op. Also, this op capability check could be done
once for the session.
If you are also aligned, I can send an RFC for capab check.
> + /* Similar applies to the key exchange in the HW. The second phase of
> KE, most likely,
> + * will go as far as to obtain xU,yU(xV,xV), where SW can easily
> calculate SA.
What does SA mean here ? Signature algorithm ??.
Thanks,
Gowrishankar
> + * Should then both options be available?
> + */
>
> rte_crypto_uint id;
> /**< The SM2 id used by signer and verifier. */
> --
> 2.13.6
RE: [PATCH v8 0/4] PCI Dev and SG copy support
Hi, Could this patch series be reviewed ? As of now, patches are rebased without any conflicts. Thanks, Gowrishankar > -Original Message- > From: Gowrishankar Muthukrishnan > Sent: Wednesday, November 22, 2023 4:36 PM > To: dev@dpdk.org > Cc: Anoob Joseph ; Cheng Jiang > ; Kevin Laatz ; Bruce > Richardson ; Pavan Nikhilesh Bhagavatula > ; Amit Prakash Shukla > ; Chengwen Feng > ; Gowrishankar Muthukrishnan > > Subject: [PATCH v8 0/4] PCI Dev and SG copy support > > Improve dma-perf application to support PCI dev and SG copy, along with > additional supports below: > - validate copied memory > - skip tests if not opted. > > v8: > - updated skip test patch. > > Amit Prakash Shukla (2): > app/dma-perf: add skip support > app/dma-perf: add PCI device support > > Gowrishankar Muthukrishnan (2): > app/dma-perf: validate copied memory > app/dma-perf: add SG copy support > > app/test-dma-perf/benchmark.c | 383 > +++--- > app/test-dma-perf/config.ini | 56 + > app/test-dma-perf/main.c | 161 +++--- > app/test-dma-perf/main.h | 12 +- > 4 files changed, 551 insertions(+), 61 deletions(-) > > -- > 2.25.1
RE: [PATCH v8 0/3] test/dma: add vchan reconfig and SG tests
Hi, Could this patch series be reviewed ? As of now, patches are rebased without any conflicts. Thanks, Gowrishankar > -Original Message- > From: Gowrishankar Muthukrishnan > Sent: Thursday, November 16, 2023 11:15 PM > To: dev@dpdk.org > Cc: Anoob Joseph ; Chengwen Feng > ; Vamsi Krishna Attunuru > ; Amit Prakash Shukla > ; Vidya Sagar Velumuri > ; Kevin Laatz ; Bruce > Richardson ; Gowrishankar Muthukrishnan > > Subject: [PATCH v8 0/3] test/dma: add vchan reconfig and SG tests > > This patch series reworks DMA tests to follow unit test framework followed > by new vchan reconfig and SG tests. > > v8: > - Addressed compilation issue in Windows platform. > > Gowrishankar Muthukrishnan (3): > test/dma: use unit test framework > test/dma: test multiple vchan > test/dma: add SG copy tests > > app/test/test_dmadev.c | 374 +--- > - > app/test/test_dmadev_api.c | 316 +++ > 2 files changed, 534 insertions(+), 156 deletions(-) > > -- > 2.25.1
[PATCH v1 3/3] test/crypto: add asymmetric EDDSA test cases
Add test cases to validate EDDSA sign and verify ops,
as per RFC 8032.
Signed-off-by: Gowrishankar Muthukrishnan
---
app/test/test_cryptodev_asym.c | 339 +++
app/test/test_cryptodev_eddsa_test_vectors.h | 330 ++
2 files changed, 669 insertions(+)
create mode 100644 app/test/test_cryptodev_eddsa_test_vectors.h
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 17daf734e8..93ce75b7c9 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -20,6 +20,7 @@
#include "test_cryptodev_ecdh_test_vectors.h"
#include "test_cryptodev_ecdsa_test_vectors.h"
#include "test_cryptodev_ecpm_test_vectors.h"
+#include "test_cryptodev_eddsa_test_vectors.h"
#include "test_cryptodev_mod_test_vectors.h"
#include "test_cryptodev_rsa_test_vectors.h"
#include "test_cryptodev_sm2_test_vectors.h"
@@ -3171,6 +3172,343 @@ test_sm2_dec(void)
return status;
};
+static int
+test_eddsa_sign(enum rte_crypto_edward_instance instance)
+{
+ struct crypto_testsuite_params_asym *ts_params = &testsuite_params;
+ const struct rte_cryptodev_asymmetric_xform_capability *capa;
+ struct rte_mempool *sess_mpool = ts_params->session_mpool;
+ struct rte_mempool *op_mpool = ts_params->op_mpool;
+ struct crypto_testsuite_eddsa_params input_params;
+ struct rte_cryptodev_asym_capability_idx idx;
+ uint8_t dev_id = ts_params->valid_devs[0];
+ struct rte_crypto_op *result_op = NULL;
+ uint8_t output_buf_r[TEST_DATA_SIZE];
+ struct rte_crypto_asym_xform xform;
+ struct rte_crypto_asym_op *asym_op;
+ struct rte_crypto_op *op = NULL;
+ int ret, status = TEST_FAILED;
+ void *sess = NULL;
+ bool ctx = false;
+
+ switch (instance) {
+ case RTE_CRYPTO_EDCURVE_25519:
+ input_params = eddsa_param_ed25519;
+ break;
+ case RTE_CRYPTO_EDCURVE_25519CTX:
+ input_params = eddsa_param_ed25519ctx;
+ ctx = true;
+ break;
+ case RTE_CRYPTO_EDCURVE_25519PH:
+ input_params = eddsa_param_ed25519ph;
+ break;
+ case RTE_CRYPTO_EDCURVE_448:
+ input_params = eddsa_param_ed448;
+ break;
+ case RTE_CRYPTO_EDCURVE_448PH:
+ input_params = eddsa_param_ed448ph;
+ break;
+ default:
+ RTE_LOG(ERR, USER1,
+ "line %u FAILED: %s", __LINE__,
+ "Unsupported curve id\n");
+ status = TEST_SKIPPED;
+ goto exit;
+ }
+
+ /* Check EDDSA capability */
+ idx.type = RTE_CRYPTO_ASYM_XFORM_EDDSA;
+ capa = rte_cryptodev_asym_capability_get(dev_id, &idx);
+ if (capa == NULL)
+ return -ENOTSUP;
+
+ /* Setup crypto op data structure */
+ op = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);
+ if (op == NULL) {
+ RTE_LOG(ERR, USER1,
+ "line %u FAILED: %s", __LINE__,
+ "Failed to allocate asymmetric crypto "
+ "operation struct\n");
+ status = TEST_FAILED;
+ goto exit;
+ }
+
+ asym_op = op->asym;
+
+ /* Setup asym xform */
+ xform.next = NULL;
+ xform.xform_type = RTE_CRYPTO_ASYM_XFORM_EDDSA;
+ xform.ec.curve_id = input_params.curve;
+ xform.ec.pkey.data = input_params.pkey.data;
+ xform.ec.pkey.length = input_params.pkey.length;
+ xform.ec.qcomp.data = input_params.pubkey.data;
+ xform.ec.qcomp.length = input_params.pubkey.length;
+
+ ret = rte_cryptodev_asym_session_create(dev_id, &xform, sess_mpool,
&sess);
+ if (ret < 0) {
+ RTE_LOG(ERR, USER1,
+ "line %u FAILED: %s", __LINE__,
+ "Session creation failed\n");
+ status = (ret == -ENOTSUP) ? TEST_SKIPPED : TEST_FAILED;
+ goto exit;
+ }
+
+ /* Attach asymmetric crypto session to crypto operations */
+ rte_crypto_op_attach_asym_session(op, sess);
+
+ /* Compute sign */
+
+ /* Populate op with operational details */
+ asym_op->eddsa.op_type = RTE_CRYPTO_ASYM_OP_SIGN;
+ asym_op->eddsa.instance = input_params.instance;
+ asym_op->eddsa.message.data = input_params.message.data;
+ asym_op->eddsa.message.length = input_params.message.length;
+ if (ctx) {
+ asym_op->eddsa.context.data = input_params.context.data;
+ asym_op->eddsa.context.length = input_params.context.length;
+ }
+
+ /* Init out buf */
+
[PATCH v1 2/3] crypto/openssl: add EDDSA support
Add EDDSA support in OpenSSL PMD.
Signed-off-by: Gowrishankar Muthukrishnan
---
For openssl library support, refer:
https://github.com/openssl/openssl/commit/4f8b7c2319523f8e83b8b2fa31127832fa092552
---
drivers/crypto/openssl/openssl_pmd_private.h | 6 +
drivers/crypto/openssl/rte_openssl_pmd.c | 165 +++
drivers/crypto/openssl/rte_openssl_pmd_ops.c | 80 +
3 files changed, 251 insertions(+)
diff --git a/drivers/crypto/openssl/openssl_pmd_private.h
b/drivers/crypto/openssl/openssl_pmd_private.h
index 334912d335..7061a1b85b 100644
--- a/drivers/crypto/openssl/openssl_pmd_private.h
+++ b/drivers/crypto/openssl/openssl_pmd_private.h
@@ -212,6 +212,12 @@ struct openssl_asym_session {
OSSL_PARAM * params;
#endif
} sm2;
+ struct {
+ uint8_t curve_id;
+#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+ OSSL_PARAM *params;
+#endif
+ } eddsa;
} u;
} __rte_cache_aligned;
/** Set and validate OPENSSL crypto session parameters */
diff --git a/drivers/crypto/openssl/rte_openssl_pmd.c
b/drivers/crypto/openssl/rte_openssl_pmd.c
index e8cb09defc..61c1f95202 100644
--- a/drivers/crypto/openssl/rte_openssl_pmd.c
+++ b/drivers/crypto/openssl/rte_openssl_pmd.c
@@ -2890,6 +2890,155 @@ process_openssl_sm2_op_evp(struct rte_crypto_op *cop,
return ret;
}
+static int
+process_openssl_eddsa_op_evp(struct rte_crypto_op *cop,
+ struct openssl_asym_session *sess)
+{
+ static const char * const instance[] = {"Ed25519", "Ed25519ctx",
"Ed25519ph",
+ "Ed448", "Ed448ph"};
+ EVP_PKEY_CTX *kctx = NULL, *sctx = NULL, *cctx = NULL;
+ const uint8_t curve_id = sess->u.eddsa.curve_id;
+ struct rte_crypto_asym_op *op = cop->asym;
+ OSSL_PARAM *params = sess->u.eddsa.params;
+ OSSL_PARAM_BLD *iparam_bld = NULL;
+ OSSL_PARAM *iparams = NULL;
+ uint8_t signbuf[128] = {0};
+ EVP_MD_CTX *md_ctx = NULL;
+ EVP_PKEY *pkey = NULL;
+ size_t signlen;
+ int ret = -1;
+
+ cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+
+ iparam_bld = OSSL_PARAM_BLD_new();
+ if (!iparam_bld)
+ goto err_eddsa;
+
+ OSSL_PARAM_BLD_push_octet_string(iparam_bld, "context-string",
+ op->eddsa.context.data, op->eddsa.context.length);
+
+ OSSL_PARAM_BLD_push_utf8_string(iparam_bld, "instance",
+ instance[op->eddsa.instance],
strlen(instance[op->eddsa.instance]));
+
+ iparams = OSSL_PARAM_BLD_to_param(iparam_bld);
+ if (!iparams)
+ goto err_eddsa;
+
+ switch (op->eddsa.op_type) {
+ case RTE_CRYPTO_ASYM_OP_SIGN:
+ {
+ if (curve_id == RTE_CRYPTO_EC_GROUP_ED25519)
+ kctx = EVP_PKEY_CTX_new_from_name(NULL,
"ED25519", NULL);
+ else
+ kctx = EVP_PKEY_CTX_new_from_name(NULL,
"ED448", NULL);
+
+ if (kctx == NULL || EVP_PKEY_fromdata_init(kctx) <= 0 ||
+ EVP_PKEY_fromdata(kctx, &pkey,
EVP_PKEY_KEYPAIR, params) <= 0)
+ goto err_eddsa;
+
+ md_ctx = EVP_MD_CTX_new();
+ if (!md_ctx)
+ goto err_eddsa;
+
+ sctx = EVP_PKEY_CTX_new_from_pkey(NULL, pkey, NULL);
+ if (!sctx)
+ goto err_eddsa;
+
+ EVP_MD_CTX_set_pkey_ctx(md_ctx, sctx);
+
+#if (OPENSSL_VERSION_NUMBER >= 0x3030L)
+ if (!EVP_DigestSignInit_ex(md_ctx, NULL, NULL, NULL,
NULL, pkey, iparams))
+ goto err_eddsa;
+#else
+ if (op->eddsa.instance == RTE_CRYPTO_EDCURVE_25519 ||
+ op->eddsa.instance == RTE_CRYPTO_EDCURVE_448) {
+ if (!EVP_DigestSignInit(md_ctx, NULL, NULL,
NULL, pkey))
+ goto err_eddsa;
+ } else
+ goto err_eddsa;
+#endif
+
+ if (!EVP_DigestSign(md_ctx, NULL, &signlen,
op->eddsa.message.data,
+ op->eddsa.message.length))
+ goto err_eddsa;
+
+ if (signlen > RTE_DIM(signbuf))
+ goto err_eddsa;
+
+ if (!EVP_DigestSign(md_ctx, signbuf, &signlen,
op->eddsa.message.data,
+ op->eddsa.message.length))
+ goto err_eddsa;
+
+
[PATCH v1 1/3] cryptodev: add EDDSA asymmetric crypto algorithm
Add support for asymmetric EDDSA in cryptodev, as referenced in RFC:
https://datatracker.ietf.org/doc/html/rfc8032
Signed-off-by: Gowrishankar Muthukrishnan
---
doc/guides/cryptodevs/features/default.ini | 1 +
doc/guides/prog_guide/cryptodev_lib.rst| 2 +-
lib/cryptodev/rte_crypto_asym.h| 51 +-
3 files changed, 52 insertions(+), 2 deletions(-)
diff --git a/doc/guides/cryptodevs/features/default.ini
b/doc/guides/cryptodevs/features/default.ini
index f411d4bab7..3073753911 100644
--- a/doc/guides/cryptodevs/features/default.ini
+++ b/doc/guides/cryptodevs/features/default.ini
@@ -130,6 +130,7 @@ ECDSA =
ECPM=
ECDH=
SM2 =
+EDDSA =
;
; Supported Operating systems of a default crypto driver.
diff --git a/doc/guides/prog_guide/cryptodev_lib.rst
b/doc/guides/prog_guide/cryptodev_lib.rst
index 2b513bbf82..dd636ba5ef 100644
--- a/doc/guides/prog_guide/cryptodev_lib.rst
+++ b/doc/guides/prog_guide/cryptodev_lib.rst
@@ -927,7 +927,7 @@ Asymmetric Cryptography
The cryptodev library currently provides support for the following asymmetric
Crypto operations; RSA, Modular exponentiation and inversion, Diffie-Hellman
and
Elliptic Curve Diffie-Hellman public and/or private key generation and shared
-secret compute, DSA Signature generation and verification.
+secret compute, DSA and EdDSA Signature generation and verification.
Session and Session Management
~~
diff --git a/lib/cryptodev/rte_crypto_asym.h b/lib/cryptodev/rte_crypto_asym.h
index 39d3da3952..7813d28b7a 100644
--- a/lib/cryptodev/rte_crypto_asym.h
+++ b/lib/cryptodev/rte_crypto_asym.h
@@ -65,9 +65,22 @@ enum rte_crypto_curve_id {
RTE_CRYPTO_EC_GROUP_SECP256R1 = 23,
RTE_CRYPTO_EC_GROUP_SECP384R1 = 24,
RTE_CRYPTO_EC_GROUP_SECP521R1 = 25,
+ RTE_CRYPTO_EC_GROUP_ED25519 = 29,
+ RTE_CRYPTO_EC_GROUP_ED448 = 30,
RTE_CRYPTO_EC_GROUP_SM2 = 41,
};
+/**
+ * List of Edwards curve instances as per RFC 8032 (Section 5).
+ */
+enum rte_crypto_edward_instance {
+ RTE_CRYPTO_EDCURVE_25519,
+ RTE_CRYPTO_EDCURVE_25519CTX,
+ RTE_CRYPTO_EDCURVE_25519PH,
+ RTE_CRYPTO_EDCURVE_448,
+ RTE_CRYPTO_EDCURVE_448PH
+};
+
/**
* Asymmetric crypto transformation types.
* Each xform type maps to one asymmetric algorithm
@@ -108,6 +121,10 @@ enum rte_crypto_asym_xform_type {
/**< Elliptic Curve Digital Signature Algorithm
* Perform Signature Generation and Verification.
*/
+ RTE_CRYPTO_ASYM_XFORM_EDDSA,
+ /**< Edwards Curve Digital Signature Algorithm
+* Perform Signature Generation and Verification.
+*/
RTE_CRYPTO_ASYM_XFORM_ECDH,
/**< Elliptic Curve Diffie Hellman */
RTE_CRYPTO_ASYM_XFORM_ECPM,
@@ -376,7 +393,13 @@ struct rte_crypto_ec_xform {
rte_crypto_uint pkey;
/**< Private key */
- struct rte_crypto_ec_point q;
+ union {
+ struct rte_crypto_ec_point q;
+ /**< Elliptic curve point */
+
+ rte_crypto_uint qcomp;
+ /**< Elliptic curve point compressed */
+ };
/**< Public key */
};
@@ -585,6 +608,31 @@ struct rte_crypto_ecdsa_op_param {
*/
};
+/**
+ * EDDSA operation params
+ */
+struct rte_crypto_eddsa_op_param {
+ enum rte_crypto_asym_op_type op_type;
+ /**< Signature generation or verification */
+
+ rte_crypto_param message;
+ /**< Input message digest to be signed or verified */
+
+ rte_crypto_param context;
+ /**< Context value for the sign op.
+* Must not be empty for Ed25519ctx instance.
+*/
+
+ enum rte_crypto_edward_instance instance;
+ /**< Type of Edwards curve. */
+
+ rte_crypto_uint sign;
+ /**< Edward curve signature
+* output : for signature generation
+* input : for signature verification
+*/
+};
+
/**
* Structure for EC point multiplication operation param
*/
@@ -718,6 +766,7 @@ struct rte_crypto_asym_op {
struct rte_crypto_ecdh_op_param ecdh;
struct rte_crypto_dsa_op_param dsa;
struct rte_crypto_ecdsa_op_param ecdsa;
+ struct rte_crypto_eddsa_op_param eddsa;
struct rte_crypto_ecpm_op_param ecpm;
struct rte_crypto_sm2_op_param sm2;
};
--
2.25.1
[PATCH v8 4/4] app/dma-perf: add SG copy support
Add SG copy support.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Anoob Joseph
---
app/test-dma-perf/benchmark.c | 274 +-
app/test-dma-perf/config.ini | 19 ++-
app/test-dma-perf/main.c | 34 -
app/test-dma-perf/main.h | 5 +-
4 files changed, 292 insertions(+), 40 deletions(-)
diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index 034461da4e..4530bd98ce 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -46,6 +46,10 @@ struct lcore_params {
uint16_t test_secs;
struct rte_mbuf **srcs;
struct rte_mbuf **dsts;
+ struct rte_dma_sge *src_sges;
+ struct rte_dma_sge *dst_sges;
+ uint8_t src_ptrs;
+ uint8_t dst_ptrs;
volatile struct worker_info worker_info;
};
@@ -86,21 +90,31 @@ calc_result(uint32_t buf_size, uint32_t nr_buf, uint16_t
nb_workers, uint16_t te
}
static void
-output_result(uint8_t scenario_id, uint32_t lcore_id, char *dma_name, uint16_t
ring_size,
- uint16_t kick_batch, uint64_t ave_cycle, uint32_t
buf_size, uint32_t nr_buf,
- float memory, float bandwidth, float mops, bool is_dma)
+output_result(struct test_configure *cfg, struct lcore_params *para,
+ uint16_t kick_batch, uint64_t ave_cycle, uint32_t
buf_size,
+ uint32_t nr_buf, float memory, float bandwidth, float
mops)
{
- if (is_dma)
- printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size:
%u.\n",
- lcore_id, dma_name, ring_size, kick_batch);
- else
+ uint16_t ring_size = cfg->ring_size.cur;
+ uint8_t scenario_id = cfg->scenario_id;
+ uint32_t lcore_id = para->lcore_id;
+ char *dma_name = para->dma_name;
+
+ if (cfg->is_dma) {
+ printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size:
%u", lcore_id,
+ dma_name, ring_size, kick_batch);
+ if (cfg->is_sg)
+ printf(" DMA src ptrs: %u, dst ptrs: %u",
+ para->src_ptrs, para->dst_ptrs);
+ printf(".\n");
+ } else {
printf("lcore %u\n", lcore_id);
+ }
printf("Average Cycles/op: %" PRIu64 ", Buffer Size: %u B, Buffer
Number: %u, Memory: %.2lf MB, Frequency: %.3lf Ghz.\n",
ave_cycle, buf_size, nr_buf, memory,
rte_get_timer_hz()/10.0);
printf("Average Bandwidth: %.3lf Gbps, MOps: %.3lf\n", bandwidth, mops);
- if (is_dma)
+ if (cfg->is_dma)
snprintf(output_str[lcore_id], MAX_OUTPUT_STR_LEN,
CSV_LINE_DMA_FMT,
scenario_id, lcore_id, dma_name, ring_size, kick_batch,
buf_size,
nr_buf, memory, ave_cycle, bandwidth, mops);
@@ -167,7 +181,7 @@ vchan_data_populate(uint32_t dev_id, struct
rte_dma_vchan_conf *qconf,
/* Configuration of device. */
static void
-configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg)
+configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg, uint8_t
ptrs_max)
{
uint16_t vchan = 0;
struct rte_dma_info info;
@@ -190,6 +204,10 @@ configure_dmadev_queue(uint32_t dev_id, struct
test_configure *cfg)
rte_exit(EXIT_FAILURE, "Error, no configured queues reported on
device id. %u\n",
dev_id);
+ if (info.max_sges < ptrs_max)
+ rte_exit(EXIT_FAILURE, "Error, DMA ptrs more than supported by
device id %u.\n",
+ dev_id);
+
if (rte_dma_start(dev_id) != 0)
rte_exit(EXIT_FAILURE, "Error with dma start.\n");
}
@@ -202,8 +220,12 @@ config_dmadevs(struct test_configure *cfg)
uint32_t i;
int dev_id;
uint16_t nb_dmadevs = 0;
+ uint8_t ptrs_max = 0;
char *dma_name;
+ if (cfg->is_sg)
+ ptrs_max = RTE_MAX(cfg->src_ptrs, cfg->dst_ptrs);
+
for (i = 0; i < ldm->cnt; i++) {
dma_name = ldm->dma_names[i];
dev_id = rte_dma_get_dev_id_by_name(dma_name);
@@ -213,7 +235,7 @@ config_dmadevs(struct test_configure *cfg)
}
ldm->dma_ids[i] = dev_id;
- configure_dmadev_queue(dev_id, cfg);
+ configure_dmadev_queue(dev_id, cfg, ptrs_max);
++nb_dmadevs;
}
@@ -253,7 +275,7 @@ do_dma_submit_and_poll(uint16_t dev_id, uint64_t *async_cnt,
}
static inline int
-do_dma_mem_copy(void *p)
+do_dma_plain_mem_copy(void *p)
{
struct lcore_params *para = (struct lcore_params *)p;
volatile struct worker_info *worker_info = &(para->worker_info);
@@ -306,6 +3
[PATCH v8 3/4] app/dma-perf: validate copied memory
Validate copied memory to ensure DMA copy did not fail.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Anoob Joseph
---
app/test-dma-perf/benchmark.c | 21 -
app/test-dma-perf/main.c | 16 +++-
app/test-dma-perf/main.h | 2 +-
3 files changed, 32 insertions(+), 7 deletions(-)
diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index eaed224c67..034461da4e 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include "main.h"
@@ -406,6 +407,11 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
return -1;
}
+ for (i = 0; i < nr_buf; i++) {
+ memset(rte_pktmbuf_mtod((*srcs)[i], void *), rte_rand(),
buf_size);
+ memset(rte_pktmbuf_mtod((*dsts)[i], void *), 0, buf_size);
+ }
+
if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM ||
cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) {
ext_buf_info = rte_malloc(NULL, sizeof(struct
rte_mbuf_ext_shared_info), 0);
@@ -440,7 +446,7 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
return 0;
}
-void
+int
mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
{
uint32_t i;
@@ -458,6 +464,7 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
uint32_t avg_cycles_total;
float mops, mops_total;
float bandwidth, bandwidth_total;
+ int ret = 0;
if (setup_memory_env(cfg, &srcs, &dsts) < 0)
goto out;
@@ -531,6 +538,16 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
rte_eal_mp_wait_lcore();
+ for (i = 0; i < (nr_buf / nb_workers) * nb_workers; i++) {
+ if (memcmp(rte_pktmbuf_mtod(srcs[i], void *),
+ rte_pktmbuf_mtod(dsts[i], void *),
+ cfg->buf_size.cur) != 0) {
+ printf("Copy validation fails for buffer number %d\n",
i);
+ ret = -1;
+ goto out;
+ }
+ }
+
mops_total = 0;
bandwidth_total = 0;
avg_cycles_total = 0;
@@ -596,4 +613,6 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
rte_dma_stop(ldm->dma_ids[i]);
}
}
+
+ return ret;
}
diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c
index 3eddf2e40a..1d54173a9c 100644
--- a/app/test-dma-perf/main.c
+++ b/app/test-dma-perf/main.c
@@ -100,20 +100,24 @@ open_output_csv(const char *rst_path_ptr)
return 0;
}
-static void
+static int
run_test_case(struct test_configure *case_cfg)
{
+ int ret = 0;
+
switch (case_cfg->test_type) {
case TEST_TYPE_DMA_MEM_COPY:
- mem_copy_benchmark(case_cfg, true);
+ ret = mem_copy_benchmark(case_cfg, true);
break;
case TEST_TYPE_CPU_MEM_COPY:
- mem_copy_benchmark(case_cfg, false);
+ ret = mem_copy_benchmark(case_cfg, false);
break;
default:
printf("Unknown test type. %s\n", case_cfg->test_type_str);
break;
}
+
+ return ret;
}
static void
@@ -158,8 +162,10 @@ run_test(uint32_t case_id, struct test_configure *case_cfg)
case_cfg->scenario_id++;
printf("\nRunning scenario %d\n", case_cfg->scenario_id);
- run_test_case(case_cfg);
- output_csv(false);
+ if (run_test_case(case_cfg) < 0)
+ printf("\nTest fails! skipping this scenario.\n");
+ else
+ output_csv(false);
if (var_entry->op == OP_ADD)
var_entry->cur += var_entry->incr;
diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h
index 8ac3270fba..7dcaa166f2 100644
--- a/app/test-dma-perf/main.h
+++ b/app/test-dma-perf/main.h
@@ -65,6 +65,6 @@ struct test_configure {
uintptr_t raddr;
};
-void mem_copy_benchmark(struct test_configure *cfg, bool is_dma);
+int mem_copy_benchmark(struct test_configure *cfg, bool is_dma);
#endif /* MAIN_H */
--
2.25.1
[PATCH v8 2/4] app/dma-perf: add PCI device support
From: Amit Prakash Shukla
Add support to test performance for "device to memory" and
"memory to device" data transfer.
Signed-off-by: Amit Prakash Shukla
Acked-by: Anoob Joseph
---
app/test-dma-perf/benchmark.c | 108 +++---
app/test-dma-perf/config.ini | 37
app/test-dma-perf/main.c | 67 +
app/test-dma-perf/main.h | 6 ++
4 files changed, 209 insertions(+), 9 deletions(-)
diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index 9b1f58c78c..eaed224c67 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -127,17 +127,54 @@ cache_flush_buf(__rte_unused struct rte_mbuf **array,
#endif
}
+static int
+vchan_data_populate(uint32_t dev_id, struct rte_dma_vchan_conf *qconf,
+ struct test_configure *cfg)
+{
+ struct rte_dma_info info;
+
+ qconf->direction = cfg->transfer_dir;
+
+ rte_dma_info_get(dev_id, &info);
+ if (!(RTE_BIT64(qconf->direction) & info.dev_capa))
+ return -1;
+
+ qconf->nb_desc = cfg->ring_size.cur;
+
+ switch (qconf->direction) {
+ case RTE_DMA_DIR_MEM_TO_DEV:
+ qconf->dst_port.pcie.vfen = 1;
+ qconf->dst_port.port_type = RTE_DMA_PORT_PCIE;
+ qconf->dst_port.pcie.coreid = cfg->dcoreid;
+ qconf->dst_port.pcie.vfid = cfg->vfid;
+ qconf->dst_port.pcie.pfid = cfg->pfid;
+ break;
+ case RTE_DMA_DIR_DEV_TO_MEM:
+ qconf->src_port.pcie.vfen = 1;
+ qconf->src_port.port_type = RTE_DMA_PORT_PCIE;
+ qconf->src_port.pcie.coreid = cfg->scoreid;
+ qconf->src_port.pcie.vfid = cfg->vfid;
+ qconf->src_port.pcie.pfid = cfg->pfid;
+ break;
+ case RTE_DMA_DIR_MEM_TO_MEM:
+ case RTE_DMA_DIR_DEV_TO_DEV:
+ break;
+ }
+
+ return 0;
+}
+
/* Configuration of device. */
static void
-configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size)
+configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg)
{
uint16_t vchan = 0;
struct rte_dma_info info;
struct rte_dma_conf dev_config = { .nb_vchans = 1 };
- struct rte_dma_vchan_conf qconf = {
- .direction = RTE_DMA_DIR_MEM_TO_MEM,
- .nb_desc = ring_size
- };
+ struct rte_dma_vchan_conf qconf = { 0 };
+
+ if (vchan_data_populate(dev_id, &qconf, cfg) != 0)
+ rte_exit(EXIT_FAILURE, "Error with vchan data populate.\n");
if (rte_dma_configure(dev_id, &dev_config) != 0)
rte_exit(EXIT_FAILURE, "Error with dma configure.\n");
@@ -159,7 +196,6 @@ configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size)
static int
config_dmadevs(struct test_configure *cfg)
{
- uint32_t ring_size = cfg->ring_size.cur;
struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map;
uint32_t nb_workers = ldm->cnt;
uint32_t i;
@@ -176,7 +212,7 @@ config_dmadevs(struct test_configure *cfg)
}
ldm->dma_ids[i] = dev_id;
- configure_dmadev_queue(dev_id, ring_size);
+ configure_dmadev_queue(dev_id, cfg);
++nb_dmadevs;
}
@@ -302,13 +338,22 @@ do_cpu_mem_copy(void *p)
return 0;
}
+static void
+dummy_free_ext_buf(void *addr, void *opaque)
+{
+ RTE_SET_USED(addr);
+ RTE_SET_USED(opaque);
+}
+
static int
setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs,
struct rte_mbuf ***dsts)
{
+ static struct rte_mbuf_ext_shared_info *ext_buf_info;
unsigned int buf_size = cfg->buf_size.cur;
unsigned int nr_sockets;
uint32_t nr_buf = cfg->nr_buf;
+ uint32_t i;
nr_sockets = rte_socket_count();
if (cfg->src_numa_node >= nr_sockets ||
@@ -361,16 +406,47 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
return -1;
}
+ if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM ||
+ cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) {
+ ext_buf_info = rte_malloc(NULL, sizeof(struct
rte_mbuf_ext_shared_info), 0);
+ if (ext_buf_info == NULL) {
+ printf("Error: ext_buf_info malloc failed.\n");
+ return -1;
+ }
+ }
+
+ if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) {
+ ext_buf_info->free_cb = dummy_free_ext_buf;
+ ext_buf_info->fcb_opaque = NULL;
+ for (i = 0; i < nr_buf; i++) {
+ /* Using mbuf structure to hold remote iova address. */
+ rte_pktmbuf_attach_extbuf((*srcs)[i], (void
*)cfg->raddr,
+ (rte_iova_t)cfg->raddr, 0,
ext_buf_info);
+ rte_mbuf_ext_refcnt_update(e
[PATCH v8 1/4] app/dma-perf: add skip support
From: Amit Prakash Shukla
Add support to skip running a dma-perf test-case.
Signed-off-by: Amit Prakash Shukla
Acked-by: Anoob Joseph
Acked-by: Chengwen Feng
---
v8:
- abstracted csv file write error log
---
app/test-dma-perf/config.ini | 2 ++
app/test-dma-perf/main.c | 48 ++--
app/test-dma-perf/main.h | 1 +
3 files changed, 32 insertions(+), 19 deletions(-)
diff --git a/app/test-dma-perf/config.ini b/app/test-dma-perf/config.ini
index b550f4b23f..4d59234b2a 100644
--- a/app/test-dma-perf/config.ini
+++ b/app/test-dma-perf/config.ini
@@ -36,6 +36,8 @@
; If you do not specify a result file, one will be generated with the same
name as the configuration
; file, with the addition of "_result.csv" at the end.
+; "skip" To skip a test-case set skip to 1.
+
[case1]
type=DMA_MEM_COPY
mem_size=10
diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c
index 5f8bab8f45..33c3750bb1 100644
--- a/app/test-dma-perf/main.c
+++ b/app/test-dma-perf/main.c
@@ -86,6 +86,19 @@ output_header(uint32_t case_id, struct test_configure
*case_cfg)
output_csv(true);
}
+static int
+open_output_csv(const char *rst_path_ptr)
+{
+ fd = fopen(rst_path_ptr, "a");
+ if (!fd) {
+ printf("Open output CSV file error.\n");
+ return 1;
+ }
+ output_csv(true);
+ fclose(fd);
+ return 0;
+}
+
static void
run_test_case(struct test_configure *case_cfg)
{
@@ -320,6 +333,7 @@ load_configs(const char *path)
const char *case_type;
const char *lcore_dma;
const char *mem_size_str, *buf_size_str, *ring_size_str,
*kick_batch_str;
+ const char *skip;
int args_nr, nb_vp;
bool is_dma;
@@ -339,6 +353,13 @@ load_configs(const char *path)
for (i = 0; i < nb_sections; i++) {
snprintf(section_name, CFG_NAME_LEN, "case%d", i + 1);
test_case = &test_cases[i];
+
+ skip = rte_cfgfile_get_entry(cfgfile, section_name, "skip");
+ if (skip && (atoi(skip) == 1)) {
+ test_case->is_skip = true;
+ continue;
+ }
+
case_type = rte_cfgfile_get_entry(cfgfile, section_name,
"type");
if (case_type == NULL) {
printf("Error: No case type in case %d, the test will
be finished here.\n",
@@ -523,31 +544,20 @@ main(int argc, char *argv[])
printf("Running cases...\n");
for (i = 0; i < case_nb; i++) {
- if (!test_cases[i].is_valid) {
- printf("Invalid test case %d.\n\n", i + 1);
- snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Invalid
case %d\n", i + 1);
-
- fd = fopen(rst_path_ptr, "a");
- if (!fd) {
- printf("Open output CSV file error.\n");
+ if (test_cases[i].is_skip) {
+ printf("Test case %d configured to be skipped.\n\n", i
+ 1);
+ snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Skip the
test-case %d\n",
+i + 1);
+ if (open_output_csv(rst_path_ptr))
return 0;
- }
- output_csv(true);
- fclose(fd);
continue;
}
- if (test_cases[i].test_type == TEST_TYPE_NONE) {
- printf("No valid test type in test case %d.\n\n", i +
1);
+ if (!test_cases[i].is_valid) {
+ printf("Invalid test case %d.\n\n", i + 1);
snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Invalid
case %d\n", i + 1);
-
- fd = fopen(rst_path_ptr, "a");
- if (!fd) {
- printf("Open output CSV file error.\n");
+ if (open_output_csv(rst_path_ptr))
return 0;
- }
- output_csv(true);
- fclose(fd);
continue;
}
diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h
index 62085e6e8f..32670151af 100644
--- a/app/test-dma-perf/main.h
+++ b/app/test-dma-perf/main.h
@@ -40,6 +40,7 @@ struct lcore_dma_map_t {
struct test_configure {
bool is_valid;
+ bool is_skip;
uint8_t test_type;
const char *test_type_str;
uint16_t src_numa_node;
--
2.25.1
[PATCH v8 0/4] PCI Dev and SG copy support
Improve dma-perf application to support PCI dev and SG copy, along with additional supports below: - validate copied memory - skip tests if not opted. v8: - updated skip test patch. Amit Prakash Shukla (2): app/dma-perf: add skip support app/dma-perf: add PCI device support Gowrishankar Muthukrishnan (2): app/dma-perf: validate copied memory app/dma-perf: add SG copy support app/test-dma-perf/benchmark.c | 383 +++--- app/test-dma-perf/config.ini | 56 + app/test-dma-perf/main.c | 161 +++--- app/test-dma-perf/main.h | 12 +- 4 files changed, 551 insertions(+), 61 deletions(-) -- 2.25.1
[PATCH v7 4/4] app/dma-perf: add SG copy support
Add SG copy support.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Anoob Joseph
---
app/test-dma-perf/benchmark.c | 274 +-
app/test-dma-perf/config.ini | 19 ++-
app/test-dma-perf/main.c | 34 -
app/test-dma-perf/main.h | 5 +-
4 files changed, 292 insertions(+), 40 deletions(-)
diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index 034461da4e..4530bd98ce 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -46,6 +46,10 @@ struct lcore_params {
uint16_t test_secs;
struct rte_mbuf **srcs;
struct rte_mbuf **dsts;
+ struct rte_dma_sge *src_sges;
+ struct rte_dma_sge *dst_sges;
+ uint8_t src_ptrs;
+ uint8_t dst_ptrs;
volatile struct worker_info worker_info;
};
@@ -86,21 +90,31 @@ calc_result(uint32_t buf_size, uint32_t nr_buf, uint16_t
nb_workers, uint16_t te
}
static void
-output_result(uint8_t scenario_id, uint32_t lcore_id, char *dma_name, uint16_t
ring_size,
- uint16_t kick_batch, uint64_t ave_cycle, uint32_t
buf_size, uint32_t nr_buf,
- float memory, float bandwidth, float mops, bool is_dma)
+output_result(struct test_configure *cfg, struct lcore_params *para,
+ uint16_t kick_batch, uint64_t ave_cycle, uint32_t
buf_size,
+ uint32_t nr_buf, float memory, float bandwidth, float
mops)
{
- if (is_dma)
- printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size:
%u.\n",
- lcore_id, dma_name, ring_size, kick_batch);
- else
+ uint16_t ring_size = cfg->ring_size.cur;
+ uint8_t scenario_id = cfg->scenario_id;
+ uint32_t lcore_id = para->lcore_id;
+ char *dma_name = para->dma_name;
+
+ if (cfg->is_dma) {
+ printf("lcore %u, DMA %s, DMA Ring Size: %u, Kick Batch Size:
%u", lcore_id,
+ dma_name, ring_size, kick_batch);
+ if (cfg->is_sg)
+ printf(" DMA src ptrs: %u, dst ptrs: %u",
+ para->src_ptrs, para->dst_ptrs);
+ printf(".\n");
+ } else {
printf("lcore %u\n", lcore_id);
+ }
printf("Average Cycles/op: %" PRIu64 ", Buffer Size: %u B, Buffer
Number: %u, Memory: %.2lf MB, Frequency: %.3lf Ghz.\n",
ave_cycle, buf_size, nr_buf, memory,
rte_get_timer_hz()/10.0);
printf("Average Bandwidth: %.3lf Gbps, MOps: %.3lf\n", bandwidth, mops);
- if (is_dma)
+ if (cfg->is_dma)
snprintf(output_str[lcore_id], MAX_OUTPUT_STR_LEN,
CSV_LINE_DMA_FMT,
scenario_id, lcore_id, dma_name, ring_size, kick_batch,
buf_size,
nr_buf, memory, ave_cycle, bandwidth, mops);
@@ -167,7 +181,7 @@ vchan_data_populate(uint32_t dev_id, struct
rte_dma_vchan_conf *qconf,
/* Configuration of device. */
static void
-configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg)
+configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg, uint8_t
ptrs_max)
{
uint16_t vchan = 0;
struct rte_dma_info info;
@@ -190,6 +204,10 @@ configure_dmadev_queue(uint32_t dev_id, struct
test_configure *cfg)
rte_exit(EXIT_FAILURE, "Error, no configured queues reported on
device id. %u\n",
dev_id);
+ if (info.max_sges < ptrs_max)
+ rte_exit(EXIT_FAILURE, "Error, DMA ptrs more than supported by
device id %u.\n",
+ dev_id);
+
if (rte_dma_start(dev_id) != 0)
rte_exit(EXIT_FAILURE, "Error with dma start.\n");
}
@@ -202,8 +220,12 @@ config_dmadevs(struct test_configure *cfg)
uint32_t i;
int dev_id;
uint16_t nb_dmadevs = 0;
+ uint8_t ptrs_max = 0;
char *dma_name;
+ if (cfg->is_sg)
+ ptrs_max = RTE_MAX(cfg->src_ptrs, cfg->dst_ptrs);
+
for (i = 0; i < ldm->cnt; i++) {
dma_name = ldm->dma_names[i];
dev_id = rte_dma_get_dev_id_by_name(dma_name);
@@ -213,7 +235,7 @@ config_dmadevs(struct test_configure *cfg)
}
ldm->dma_ids[i] = dev_id;
- configure_dmadev_queue(dev_id, cfg);
+ configure_dmadev_queue(dev_id, cfg, ptrs_max);
++nb_dmadevs;
}
@@ -253,7 +275,7 @@ do_dma_submit_and_poll(uint16_t dev_id, uint64_t *async_cnt,
}
static inline int
-do_dma_mem_copy(void *p)
+do_dma_plain_mem_copy(void *p)
{
struct lcore_params *para = (struct lcore_params *)p;
volatile struct worker_info *worker_info = &(para->worker_info);
@@ -306,6 +3
[PATCH v7 3/4] app/dma-perf: validate copied memory
Validate copied memory to ensure DMA copy did not fail.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Anoob Joseph
---
app/test-dma-perf/benchmark.c | 21 -
app/test-dma-perf/main.c | 16 +++-
app/test-dma-perf/main.h | 2 +-
3 files changed, 32 insertions(+), 7 deletions(-)
diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index eaed224c67..034461da4e 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include "main.h"
@@ -406,6 +407,11 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
return -1;
}
+ for (i = 0; i < nr_buf; i++) {
+ memset(rte_pktmbuf_mtod((*srcs)[i], void *), rte_rand(),
buf_size);
+ memset(rte_pktmbuf_mtod((*dsts)[i], void *), 0, buf_size);
+ }
+
if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM ||
cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) {
ext_buf_info = rte_malloc(NULL, sizeof(struct
rte_mbuf_ext_shared_info), 0);
@@ -440,7 +446,7 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
return 0;
}
-void
+int
mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
{
uint32_t i;
@@ -458,6 +464,7 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
uint32_t avg_cycles_total;
float mops, mops_total;
float bandwidth, bandwidth_total;
+ int ret = 0;
if (setup_memory_env(cfg, &srcs, &dsts) < 0)
goto out;
@@ -531,6 +538,16 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
rte_eal_mp_wait_lcore();
+ for (i = 0; i < (nr_buf / nb_workers) * nb_workers; i++) {
+ if (memcmp(rte_pktmbuf_mtod(srcs[i], void *),
+ rte_pktmbuf_mtod(dsts[i], void *),
+ cfg->buf_size.cur) != 0) {
+ printf("Copy validation fails for buffer number %d\n",
i);
+ ret = -1;
+ goto out;
+ }
+ }
+
mops_total = 0;
bandwidth_total = 0;
avg_cycles_total = 0;
@@ -596,4 +613,6 @@ mem_copy_benchmark(struct test_configure *cfg, bool is_dma)
rte_dma_stop(ldm->dma_ids[i]);
}
}
+
+ return ret;
}
diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c
index 4671ca5335..4dbba255ed 100644
--- a/app/test-dma-perf/main.c
+++ b/app/test-dma-perf/main.c
@@ -87,20 +87,24 @@ output_header(uint32_t case_id, struct test_configure
*case_cfg)
output_csv(true);
}
-static void
+static int
run_test_case(struct test_configure *case_cfg)
{
+ int ret = 0;
+
switch (case_cfg->test_type) {
case TEST_TYPE_DMA_MEM_COPY:
- mem_copy_benchmark(case_cfg, true);
+ ret = mem_copy_benchmark(case_cfg, true);
break;
case TEST_TYPE_CPU_MEM_COPY:
- mem_copy_benchmark(case_cfg, false);
+ ret = mem_copy_benchmark(case_cfg, false);
break;
default:
printf("Unknown test type. %s\n", case_cfg->test_type_str);
break;
}
+
+ return ret;
}
static void
@@ -145,8 +149,10 @@ run_test(uint32_t case_id, struct test_configure *case_cfg)
case_cfg->scenario_id++;
printf("\nRunning scenario %d\n", case_cfg->scenario_id);
- run_test_case(case_cfg);
- output_csv(false);
+ if (run_test_case(case_cfg) < 0)
+ printf("\nTest fails! skipping this scenario.\n");
+ else
+ output_csv(false);
if (var_entry->op == OP_ADD)
var_entry->cur += var_entry->incr;
diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h
index 8ac3270fba..7dcaa166f2 100644
--- a/app/test-dma-perf/main.h
+++ b/app/test-dma-perf/main.h
@@ -65,6 +65,6 @@ struct test_configure {
uintptr_t raddr;
};
-void mem_copy_benchmark(struct test_configure *cfg, bool is_dma);
+int mem_copy_benchmark(struct test_configure *cfg, bool is_dma);
#endif /* MAIN_H */
--
2.25.1
[PATCH v7 2/4] app/dma-perf: add PCI device support
From: Amit Prakash Shukla
Add support to test performance for "device to memory" and
"memory to device" data transfer.
Signed-off-by: Amit Prakash Shukla
Acked-by: Anoob Joseph
---
v7:
- changed cfg->raddr type to uintptr_t to fix 32 bit compilation.
---
app/test-dma-perf/benchmark.c | 108 +++---
app/test-dma-perf/config.ini | 37
app/test-dma-perf/main.c | 67 +
app/test-dma-perf/main.h | 6 ++
4 files changed, 209 insertions(+), 9 deletions(-)
diff --git a/app/test-dma-perf/benchmark.c b/app/test-dma-perf/benchmark.c
index 9b1f58c78c..eaed224c67 100644
--- a/app/test-dma-perf/benchmark.c
+++ b/app/test-dma-perf/benchmark.c
@@ -127,17 +127,54 @@ cache_flush_buf(__rte_unused struct rte_mbuf **array,
#endif
}
+static int
+vchan_data_populate(uint32_t dev_id, struct rte_dma_vchan_conf *qconf,
+ struct test_configure *cfg)
+{
+ struct rte_dma_info info;
+
+ qconf->direction = cfg->transfer_dir;
+
+ rte_dma_info_get(dev_id, &info);
+ if (!(RTE_BIT64(qconf->direction) & info.dev_capa))
+ return -1;
+
+ qconf->nb_desc = cfg->ring_size.cur;
+
+ switch (qconf->direction) {
+ case RTE_DMA_DIR_MEM_TO_DEV:
+ qconf->dst_port.pcie.vfen = 1;
+ qconf->dst_port.port_type = RTE_DMA_PORT_PCIE;
+ qconf->dst_port.pcie.coreid = cfg->dcoreid;
+ qconf->dst_port.pcie.vfid = cfg->vfid;
+ qconf->dst_port.pcie.pfid = cfg->pfid;
+ break;
+ case RTE_DMA_DIR_DEV_TO_MEM:
+ qconf->src_port.pcie.vfen = 1;
+ qconf->src_port.port_type = RTE_DMA_PORT_PCIE;
+ qconf->src_port.pcie.coreid = cfg->scoreid;
+ qconf->src_port.pcie.vfid = cfg->vfid;
+ qconf->src_port.pcie.pfid = cfg->pfid;
+ break;
+ case RTE_DMA_DIR_MEM_TO_MEM:
+ case RTE_DMA_DIR_DEV_TO_DEV:
+ break;
+ }
+
+ return 0;
+}
+
/* Configuration of device. */
static void
-configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size)
+configure_dmadev_queue(uint32_t dev_id, struct test_configure *cfg)
{
uint16_t vchan = 0;
struct rte_dma_info info;
struct rte_dma_conf dev_config = { .nb_vchans = 1 };
- struct rte_dma_vchan_conf qconf = {
- .direction = RTE_DMA_DIR_MEM_TO_MEM,
- .nb_desc = ring_size
- };
+ struct rte_dma_vchan_conf qconf = { 0 };
+
+ if (vchan_data_populate(dev_id, &qconf, cfg) != 0)
+ rte_exit(EXIT_FAILURE, "Error with vchan data populate.\n");
if (rte_dma_configure(dev_id, &dev_config) != 0)
rte_exit(EXIT_FAILURE, "Error with dma configure.\n");
@@ -159,7 +196,6 @@ configure_dmadev_queue(uint32_t dev_id, uint32_t ring_size)
static int
config_dmadevs(struct test_configure *cfg)
{
- uint32_t ring_size = cfg->ring_size.cur;
struct lcore_dma_map_t *ldm = &cfg->lcore_dma_map;
uint32_t nb_workers = ldm->cnt;
uint32_t i;
@@ -176,7 +212,7 @@ config_dmadevs(struct test_configure *cfg)
}
ldm->dma_ids[i] = dev_id;
- configure_dmadev_queue(dev_id, ring_size);
+ configure_dmadev_queue(dev_id, cfg);
++nb_dmadevs;
}
@@ -302,13 +338,22 @@ do_cpu_mem_copy(void *p)
return 0;
}
+static void
+dummy_free_ext_buf(void *addr, void *opaque)
+{
+ RTE_SET_USED(addr);
+ RTE_SET_USED(opaque);
+}
+
static int
setup_memory_env(struct test_configure *cfg, struct rte_mbuf ***srcs,
struct rte_mbuf ***dsts)
{
+ static struct rte_mbuf_ext_shared_info *ext_buf_info;
unsigned int buf_size = cfg->buf_size.cur;
unsigned int nr_sockets;
uint32_t nr_buf = cfg->nr_buf;
+ uint32_t i;
nr_sockets = rte_socket_count();
if (cfg->src_numa_node >= nr_sockets ||
@@ -361,16 +406,47 @@ setup_memory_env(struct test_configure *cfg, struct
rte_mbuf ***srcs,
return -1;
}
+ if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM ||
+ cfg->transfer_dir == RTE_DMA_DIR_MEM_TO_DEV) {
+ ext_buf_info = rte_malloc(NULL, sizeof(struct
rte_mbuf_ext_shared_info), 0);
+ if (ext_buf_info == NULL) {
+ printf("Error: ext_buf_info malloc failed.\n");
+ return -1;
+ }
+ }
+
+ if (cfg->transfer_dir == RTE_DMA_DIR_DEV_TO_MEM) {
+ ext_buf_info->free_cb = dummy_free_ext_buf;
+ ext_buf_info->fcb_opaque = NULL;
+ for (i = 0; i < nr_buf; i++) {
+ /* Using mbuf structure to hold remote iova address. */
+ rte_pktmbuf_attach_extbuf((*srcs)[i], (void
*)cfg->raddr,
+ (rte_iova_t)cfg->rad
[PATCH v7 0/4] PCI Dev and SG copy support
Improve dma-perf application to support PCI dev and SG copy, along with additional supports below: - validate copied memory - skip tests if not opted. v7: - PCI patch updated. Amit Prakash Shukla (2): app/dma-perf: add skip support app/dma-perf: add PCI device support Gowrishankar Muthukrishnan (2): app/dma-perf: validate copied memory app/dma-perf: add SG copy support app/test-dma-perf/benchmark.c | 383 +++--- app/test-dma-perf/config.ini | 56 + app/test-dma-perf/main.c | 136 +++- app/test-dma-perf/main.h | 12 +- 4 files changed, 545 insertions(+), 42 deletions(-) -- 2.25.1
[PATCH v7 1/4] app/dma-perf: add skip support
From: Amit Prakash Shukla
Add support to skip running a dma-perf test-case.
Signed-off-by: Amit Prakash Shukla
Acked-by: Anoob Joseph
---
app/test-dma-perf/config.ini | 2 ++
app/test-dma-perf/main.c | 23 +++
app/test-dma-perf/main.h | 1 +
3 files changed, 26 insertions(+)
diff --git a/app/test-dma-perf/config.ini b/app/test-dma-perf/config.ini
index b550f4b23f..4d59234b2a 100644
--- a/app/test-dma-perf/config.ini
+++ b/app/test-dma-perf/config.ini
@@ -36,6 +36,8 @@
; If you do not specify a result file, one will be generated with the same
name as the configuration
; file, with the addition of "_result.csv" at the end.
+; "skip" To skip a test-case set skip to 1.
+
[case1]
type=DMA_MEM_COPY
mem_size=10
diff --git a/app/test-dma-perf/main.c b/app/test-dma-perf/main.c
index 5f8bab8f45..c74f1d81bd 100644
--- a/app/test-dma-perf/main.c
+++ b/app/test-dma-perf/main.c
@@ -320,6 +320,7 @@ load_configs(const char *path)
const char *case_type;
const char *lcore_dma;
const char *mem_size_str, *buf_size_str, *ring_size_str,
*kick_batch_str;
+ const char *skip;
int args_nr, nb_vp;
bool is_dma;
@@ -339,6 +340,13 @@ load_configs(const char *path)
for (i = 0; i < nb_sections; i++) {
snprintf(section_name, CFG_NAME_LEN, "case%d", i + 1);
test_case = &test_cases[i];
+
+ skip = rte_cfgfile_get_entry(cfgfile, section_name, "skip");
+ if (skip && (atoi(skip) == 1)) {
+ test_case->is_skip = true;
+ continue;
+ }
+
case_type = rte_cfgfile_get_entry(cfgfile, section_name,
"type");
if (case_type == NULL) {
printf("Error: No case type in case %d, the test will
be finished here.\n",
@@ -523,6 +531,21 @@ main(int argc, char *argv[])
printf("Running cases...\n");
for (i = 0; i < case_nb; i++) {
+ if (test_cases[i].is_skip) {
+ printf("Test case %d configured to be skipped.\n\n", i
+ 1);
+ snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Skip the
test-case %d\n",
+i + 1);
+
+ fd = fopen(rst_path_ptr, "a");
+ if (!fd) {
+ printf("Open output CSV file error.\n");
+ return 0;
+ }
+ output_csv(true);
+ fclose(fd);
+ continue;
+ }
+
if (!test_cases[i].is_valid) {
printf("Invalid test case %d.\n\n", i + 1);
snprintf(output_str[0], MAX_OUTPUT_STR_LEN, "Invalid
case %d\n", i + 1);
diff --git a/app/test-dma-perf/main.h b/app/test-dma-perf/main.h
index 62085e6e8f..32670151af 100644
--- a/app/test-dma-perf/main.h
+++ b/app/test-dma-perf/main.h
@@ -40,6 +40,7 @@ struct lcore_dma_map_t {
struct test_configure {
bool is_valid;
+ bool is_skip;
uint8_t test_type;
const char *test_type_str;
uint16_t src_numa_node;
--
2.25.1
[PATCH v8 1/3] test/dma: use unit test framework
Use unit test framework to execute DMA tests.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Chengwen Feng
---
v8:
- Used local macro instead of NAME_MAX, due to compilation
issue in Windows.
---
app/test/test_dmadev.c | 235 +
app/test/test_dmadev_api.c | 95 +--
2 files changed, 193 insertions(+), 137 deletions(-)
diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c
index 7581fc2b4c..94673720c4 100644
--- a/app/test/test_dmadev.c
+++ b/app/test/test_dmadev.c
@@ -18,11 +18,16 @@
#define ERR_RETURN(...) do { print_err(__func__, __LINE__, __VA_ARGS__);
return -1; } while (0)
+#define TEST_NAME_MAX_LEN 80
#define TEST_RINGSIZE 512
#define COPY_LEN 1024
+static struct rte_dma_info info;
static struct rte_mempool *pool;
+static bool check_err_stats;
+static int16_t test_dev_id;
static uint16_t id_count;
+static uint16_t vchan;
enum {
TEST_PARAM_REMOTE_ADDR = 0,
@@ -61,13 +66,28 @@ print_err(const char *func, int lineno, const char *format,
...)
va_end(ap);
}
+struct runtest_param {
+ const char name[TEST_NAME_MAX_LEN];
+ int (*test_fn)(int16_t dev_id, uint16_t vchan);
+ int iterations;
+};
+
static int
-runtest(const char *printable, int (*test_fn)(int16_t dev_id, uint16_t vchan),
int iterations,
- int16_t dev_id, uint16_t vchan, bool check_err_stats)
+runtest(const void *args)
{
+ int (*test_fn)(int16_t dev_id, uint16_t vchan);
+ const struct runtest_param *param = args;
struct rte_dma_stats stats;
+ const char *printable;
+ int iterations;
+ int16_t dev_id;
int i;
+ printable = param->name;
+ iterations = param->iterations;
+ test_fn = param->test_fn;
+ dev_id = test_dev_id;
+
rte_dma_stats_reset(dev_id, vchan);
printf("DMA Dev %d: Running %s Tests %s\n", dev_id, printable,
check_err_stats ? " " : "(errors expected)");
@@ -911,26 +931,87 @@ prepare_m2d_auto_free(int16_t dev_id, uint16_t vchan)
}
static int
-test_dmadev_instance(int16_t dev_id)
+test_dmadev_burst_setup(void)
+{
+ if (rte_dma_burst_capacity(test_dev_id, vchan) < 64) {
+ RTE_LOG(ERR, USER1,
+ "DMA Dev %u: insufficient burst capacity (64 required),
skipping tests\n",
+ test_dev_id);
+ return TEST_SKIPPED;
+ }
+
+ return TEST_SUCCESS;
+}
+
+static int
+test_dmadev_err_handling_setup(void)
+{
+ int ret = TEST_SKIPPED;
+
+ /* to test error handling we can provide null pointers for source or
dest in copies. This
+* requires VA mode in DPDK, since NULL(0) is a valid physical address.
+* We also need hardware that can report errors back.
+*/
+ if (rte_eal_iova_mode() != RTE_IOVA_VA)
+ RTE_LOG(ERR, USER1,
+ "DMA Dev %u: DPDK not in VA mode, skipping error
handling tests\n",
+ test_dev_id);
+ else if ((info.dev_capa & RTE_DMA_CAPA_HANDLES_ERRORS) == 0)
+ RTE_LOG(ERR, USER1,
+ "DMA Dev %u: device does not report errors, skipping
error handling tests\n",
+ test_dev_id);
+ else
+ ret = TEST_SUCCESS;
+
+ return ret;
+}
+
+static int
+test_dmadev_fill_setup(void)
+{
+ int ret = TEST_SUCCESS;
+
+ if ((info.dev_capa & RTE_DMA_CAPA_OPS_FILL) == 0) {
+ RTE_LOG(ERR, USER1,
+ "DMA Dev %u: No device fill support, skipping fill
tests\n", test_dev_id);
+ ret = TEST_SKIPPED;
+ }
+
+ return ret;
+}
+
+static int
+test_dmadev_autofree_setup(void)
+{
+ int ret = TEST_SKIPPED;
+
+ if ((info.dev_capa & RTE_DMA_CAPA_M2D_AUTO_FREE) &&
+ dma_add_test[TEST_M2D_AUTO_FREE].enabled == true) {
+ if (prepare_m2d_auto_free(test_dev_id, vchan) != 0)
+ return ret;
+
+ ret = TEST_SUCCESS;
+ }
+
+ return ret;
+}
+
+static int
+test_dmadev_setup(void)
{
-#define CHECK_ERRStrue
+ int16_t dev_id = test_dev_id;
struct rte_dma_stats stats;
- struct rte_dma_info info;
const struct rte_dma_conf conf = { .nb_vchans = 1};
const struct rte_dma_vchan_conf qconf = {
.direction = RTE_DMA_DIR_MEM_TO_MEM,
.nb_desc = TEST_RINGSIZE,
};
- const int vchan = 0;
int ret;
ret = rte_dma_info_get(dev_id, &info);
if (ret != 0)
ERR_RETURN("Error with rte_dma_info_get()\n");
- printf("\n### Test dmadev instance %u [%s]\n",
- dev_id, info.dev_name);
-
if (info.max_vchans < 1)
ERR_RETURN("Err
[PATCH v8 2/3] test/dma: test multiple vchan
Support API with multiple vchan test.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Chengwen Feng
---
app/test/test_dmadev_api.c | 63 +-
1 file changed, 55 insertions(+), 8 deletions(-)
diff --git a/app/test/test_dmadev_api.c b/app/test/test_dmadev_api.c
index 73d4db825a..2b8a4eda62 100644
--- a/app/test/test_dmadev_api.c
+++ b/app/test/test_dmadev_api.c
@@ -260,7 +260,7 @@ test_dma_vchan_setup(void)
}
static int
-setup_one_vchan(void)
+setup_vchan(int nb_vchans)
{
struct rte_dma_vchan_conf vchan_conf = { 0 };
struct rte_dma_info dev_info = { 0 };
@@ -269,13 +269,15 @@ setup_one_vchan(void)
ret = rte_dma_info_get(test_dev_id, &dev_info);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to obtain device info, %d", ret);
- dev_conf.nb_vchans = 1;
+ dev_conf.nb_vchans = nb_vchans;
ret = rte_dma_configure(test_dev_id, &dev_conf);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to configure, %d", ret);
vchan_conf.direction = RTE_DMA_DIR_MEM_TO_MEM;
vchan_conf.nb_desc = dev_info.min_desc;
- ret = rte_dma_vchan_setup(test_dev_id, 0, &vchan_conf);
- RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup vchan, %d", ret);
+ for (int i = 0; i < nb_vchans; i++) {
+ ret = rte_dma_vchan_setup(test_dev_id, i, &vchan_conf);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup vchan %d, %d", i,
ret);
+ }
return TEST_SUCCESS;
}
@@ -294,7 +296,7 @@ test_dma_start_stop(void)
RTE_TEST_ASSERT(ret == -EINVAL, "Expected -EINVAL, %d", ret);
/* Setup one vchan for later test */
- ret = setup_one_vchan();
+ ret = setup_vchan(1);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
ret = rte_dma_start(test_dev_id);
@@ -312,6 +314,50 @@ test_dma_start_stop(void)
return TEST_SUCCESS;
}
+static int
+test_dma_reconfigure(void)
+{
+ struct rte_dma_conf dev_conf = { 0 };
+ struct rte_dma_info dev_info = { 0 };
+ uint16_t cfg_vchans;
+ int ret;
+
+ ret = rte_dma_info_get(test_dev_id, &dev_info);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to obtain device info, %d", ret);
+
+ /* At least two vchans required for the test */
+ if (dev_info.max_vchans < 2)
+ return TEST_SKIPPED;
+
+ /* Setup one vchan for later test */
+ ret = setup_vchan(1);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
+
+ ret = rte_dma_start(test_dev_id);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to start, %d", ret);
+
+ ret = rte_dma_stop(test_dev_id);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to stop, %d", ret);
+
+ /* Check reconfigure and vchan setup after device stopped */
+ cfg_vchans = dev_conf.nb_vchans = (dev_info.max_vchans - 1);
+
+ ret = setup_vchan(cfg_vchans);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
+
+ ret = rte_dma_start(test_dev_id);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to start, %d", ret);
+
+ ret = rte_dma_info_get(test_dev_id, &dev_info);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to obtain device info, %d", ret);
+ RTE_TEST_ASSERT_EQUAL(dev_info.nb_vchans, cfg_vchans, "incorrect
reconfiguration");
+
+ ret = rte_dma_stop(test_dev_id);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to stop, %d", ret);
+
+ return TEST_SUCCESS;
+}
+
static int
test_dma_stats(void)
{
@@ -328,7 +374,7 @@ test_dma_stats(void)
RTE_TEST_ASSERT(ret == -EINVAL, "Expected -EINVAL, %d", ret);
/* Setup one vchan for later test */
- ret = setup_one_vchan();
+ ret = setup_vchan(1);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
/* Check for invalid vchan */
@@ -400,7 +446,7 @@ test_dma_completed(void)
int ret;
/* Setup one vchan for later test */
- ret = setup_one_vchan();
+ ret = setup_vchan(1);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
ret = rte_dma_start(test_dev_id);
@@ -459,7 +505,7 @@ test_dma_completed_status(void)
int ret;
/* Setup one vchan for later test */
- ret = setup_one_vchan();
+ ret = setup_vchan(1);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
ret = rte_dma_start(test_dev_id);
@@ -517,6 +563,7 @@ static struct unit_test_suite dma_api_testsuite = {
TEST_CASE(test_dma_configure),
TEST_CASE(test_dma_vchan_setup),
TEST_CASE(test_dma_start_stop),
+ TEST_CASE(test_dma_reconfigure),
TEST_CASE(test_dma_stats),
TEST_CASE(test_dma_dump),
TEST_CASE(test_dma_completed),
--
2.25.1
[PATCH v8 3/3] test/dma: add SG copy tests
Add scatter-gather copy tests.
Signed-off-by: Vidya Sagar Velumuri
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Chengwen Feng
---
app/test/test_dmadev.c | 139 ++-
app/test/test_dmadev_api.c | 164 ++---
2 files changed, 289 insertions(+), 14 deletions(-)
diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c
index 94673720c4..143e1bcd68 100644
--- a/app/test/test_dmadev.c
+++ b/app/test/test_dmadev.c
@@ -20,7 +20,7 @@
#define TEST_NAME_MAX_LEN 80
#define TEST_RINGSIZE 512
-#define COPY_LEN 1024
+#define COPY_LEN 2048
static struct rte_dma_info info;
static struct rte_mempool *pool;
@@ -392,6 +392,125 @@ test_stop_start(int16_t dev_id, uint16_t vchan)
return 0;
}
+static int
+test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan)
+{
+ unsigned int src_len, dst_len, n_sge, len, i, j, k;
+ char orig_src[COPY_LEN], orig_dst[COPY_LEN];
+ struct rte_dma_info info = { 0 };
+ enum rte_dma_status_code status;
+ uint16_t id, n_src, n_dst;
+
+ if (rte_dma_info_get(dev_id, &info) < 0)
+ ERR_RETURN("Failed to get dev info");
+
+ if (info.max_sges < 2)
+ ERR_RETURN("Test needs minimum 2 SG pointers");
+
+ n_sge = info.max_sges;
+
+ for (n_src = 1; n_src <= n_sge; n_src++) {
+ for (n_dst = 1; n_dst <= n_sge; n_dst++) {
+ /* Normalize SG buffer lengths */
+ len = COPY_LEN;
+ len -= (len % (n_src * n_dst));
+ dst_len = len / n_dst;
+ src_len = len / n_src;
+
+ struct rte_dma_sge sg_src[n_sge], sg_dst[n_sge];
+ struct rte_mbuf *src[n_sge], *dst[n_sge];
+ char *src_data[n_sge], *dst_data[n_sge];
+
+ for (i = 0 ; i < len; i++)
+ orig_src[i] = rte_rand() & 0xFF;
+
+ memset(orig_dst, 0, len);
+
+ for (i = 0; i < n_src; i++) {
+ src[i] = rte_pktmbuf_alloc(pool);
+ RTE_ASSERT(src[i] != NULL);
+ sg_src[i].addr = rte_pktmbuf_iova(src[i]);
+ sg_src[i].length = src_len;
+ src_data[i] = rte_pktmbuf_mtod(src[i], char *);
+ }
+
+ for (k = 0; k < n_dst; k++) {
+ dst[k] = rte_pktmbuf_alloc(pool);
+ RTE_ASSERT(dst[k] != NULL);
+ sg_dst[k].addr = rte_pktmbuf_iova(dst[k]);
+ sg_dst[k].length = dst_len;
+ dst_data[k] = rte_pktmbuf_mtod(dst[k], char *);
+ }
+
+ for (i = 0; i < n_src; i++) {
+ for (j = 0; j < src_len; j++)
+ src_data[i][j] = orig_src[i * src_len +
j];
+ }
+
+ for (k = 0; k < n_dst; k++)
+ memset(dst_data[k], 0, dst_len);
+
+ printf("\tsrc segs: %2d [seg len: %4d] - dst segs: %2d
[seg len : %4d]\n",
+ n_src, src_len, n_dst, dst_len);
+
+ id = rte_dma_copy_sg(dev_id, vchan, sg_src, sg_dst,
n_src, n_dst,
+RTE_DMA_OP_FLAG_SUBMIT);
+
+ if (id != id_count)
+ ERR_RETURN("Error with rte_dma_copy_sg, got %u,
expected %u\n",
+ id, id_count);
+
+ /* Give time for copy to finish, then check it was done
*/
+ await_hw(dev_id, vchan);
+
+ for (k = 0; k < n_dst; k++)
+ memcpy((&orig_dst[0] + k * dst_len),
dst_data[k], dst_len);
+
+ if (memcmp(orig_src, orig_dst, COPY_LEN))
+ ERR_RETURN("Data mismatch");
+
+ /* Verify completion */
+ id = ~id;
+ if (rte_dma_completed(dev_id, vchan, 1, &id, NULL) != 1)
+ ERR_RETURN("Error with rte_dma_completed\n");
+
+ /* Verify expected index(id_count) */
+ if (id != id_count)
+ ERR_RETURN("Error:incorrect job id received, %u
[expected %u]\n",
+ id, id_count);
+
+ /* Check for completed and id when no job done */
+ id = ~id;
+ if (rte_dma_completed(dev_id,
[PATCH v8 0/3] test/dma: add vchan reconfig and SG tests
This patch series reworks DMA tests to follow unit test framework followed by new vchan reconfig and SG tests. v8: - Addressed compilation issue in Windows platform. Gowrishankar Muthukrishnan (3): test/dma: use unit test framework test/dma: test multiple vchan test/dma: add SG copy tests app/test/test_dmadev.c | 374 + app/test/test_dmadev_api.c | 316 +++ 2 files changed, 534 insertions(+), 156 deletions(-) -- 2.25.1
[PATCH v7 3/3] test/dma: add SG copy tests
Add scatter-gather copy tests.
Signed-off-by: Vidya Sagar Velumuri
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Chengwen Feng
---
app/test/test_dmadev.c | 139 ++-
app/test/test_dmadev_api.c | 164 ++---
2 files changed, 289 insertions(+), 14 deletions(-)
diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c
index 2d20e716d2..d7cbb9a861 100644
--- a/app/test/test_dmadev.c
+++ b/app/test/test_dmadev.c
@@ -19,7 +19,7 @@
#define ERR_RETURN(...) do { print_err(__func__, __LINE__, __VA_ARGS__);
return -1; } while (0)
#define TEST_RINGSIZE 512
-#define COPY_LEN 1024
+#define COPY_LEN 2048
static struct rte_dma_info info;
static struct rte_mempool *pool;
@@ -391,6 +391,125 @@ test_stop_start(int16_t dev_id, uint16_t vchan)
return 0;
}
+static int
+test_enqueue_sg_copies(int16_t dev_id, uint16_t vchan)
+{
+ unsigned int src_len, dst_len, n_sge, len, i, j, k;
+ char orig_src[COPY_LEN], orig_dst[COPY_LEN];
+ struct rte_dma_info info = { 0 };
+ enum rte_dma_status_code status;
+ uint16_t id, n_src, n_dst;
+
+ if (rte_dma_info_get(dev_id, &info) < 0)
+ ERR_RETURN("Failed to get dev info");
+
+ if (info.max_sges < 2)
+ ERR_RETURN("Test needs minimum 2 SG pointers");
+
+ n_sge = info.max_sges;
+
+ for (n_src = 1; n_src <= n_sge; n_src++) {
+ for (n_dst = 1; n_dst <= n_sge; n_dst++) {
+ /* Normalize SG buffer lengths */
+ len = COPY_LEN;
+ len -= (len % (n_src * n_dst));
+ dst_len = len / n_dst;
+ src_len = len / n_src;
+
+ struct rte_dma_sge sg_src[n_sge], sg_dst[n_sge];
+ struct rte_mbuf *src[n_sge], *dst[n_sge];
+ char *src_data[n_sge], *dst_data[n_sge];
+
+ for (i = 0 ; i < len; i++)
+ orig_src[i] = rte_rand() & 0xFF;
+
+ memset(orig_dst, 0, len);
+
+ for (i = 0; i < n_src; i++) {
+ src[i] = rte_pktmbuf_alloc(pool);
+ RTE_ASSERT(src[i] != NULL);
+ sg_src[i].addr = rte_pktmbuf_iova(src[i]);
+ sg_src[i].length = src_len;
+ src_data[i] = rte_pktmbuf_mtod(src[i], char *);
+ }
+
+ for (k = 0; k < n_dst; k++) {
+ dst[k] = rte_pktmbuf_alloc(pool);
+ RTE_ASSERT(dst[k] != NULL);
+ sg_dst[k].addr = rte_pktmbuf_iova(dst[k]);
+ sg_dst[k].length = dst_len;
+ dst_data[k] = rte_pktmbuf_mtod(dst[k], char *);
+ }
+
+ for (i = 0; i < n_src; i++) {
+ for (j = 0; j < src_len; j++)
+ src_data[i][j] = orig_src[i * src_len +
j];
+ }
+
+ for (k = 0; k < n_dst; k++)
+ memset(dst_data[k], 0, dst_len);
+
+ printf("\tsrc segs: %2d [seg len: %4d] - dst segs: %2d
[seg len : %4d]\n",
+ n_src, src_len, n_dst, dst_len);
+
+ id = rte_dma_copy_sg(dev_id, vchan, sg_src, sg_dst,
n_src, n_dst,
+RTE_DMA_OP_FLAG_SUBMIT);
+
+ if (id != id_count)
+ ERR_RETURN("Error with rte_dma_copy_sg, got %u,
expected %u\n",
+ id, id_count);
+
+ /* Give time for copy to finish, then check it was done
*/
+ await_hw(dev_id, vchan);
+
+ for (k = 0; k < n_dst; k++)
+ memcpy((&orig_dst[0] + k * dst_len),
dst_data[k], dst_len);
+
+ if (memcmp(orig_src, orig_dst, COPY_LEN))
+ ERR_RETURN("Data mismatch");
+
+ /* Verify completion */
+ id = ~id;
+ if (rte_dma_completed(dev_id, vchan, 1, &id, NULL) != 1)
+ ERR_RETURN("Error with rte_dma_completed\n");
+
+ /* Verify expected index(id_count) */
+ if (id != id_count)
+ ERR_RETURN("Error:incorrect job id received, %u
[expected %u]\n",
+ id, id_count);
+
+ /* Check for completed and id when no job done */
+ id = ~id;
+
[PATCH v7 2/3] test/dma: test multiple vchan
Support API with multiple vchan test.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Chengwen Feng
---
app/test/test_dmadev_api.c | 63 +-
1 file changed, 55 insertions(+), 8 deletions(-)
diff --git a/app/test/test_dmadev_api.c b/app/test/test_dmadev_api.c
index 73d4db825a..2b8a4eda62 100644
--- a/app/test/test_dmadev_api.c
+++ b/app/test/test_dmadev_api.c
@@ -260,7 +260,7 @@ test_dma_vchan_setup(void)
}
static int
-setup_one_vchan(void)
+setup_vchan(int nb_vchans)
{
struct rte_dma_vchan_conf vchan_conf = { 0 };
struct rte_dma_info dev_info = { 0 };
@@ -269,13 +269,15 @@ setup_one_vchan(void)
ret = rte_dma_info_get(test_dev_id, &dev_info);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to obtain device info, %d", ret);
- dev_conf.nb_vchans = 1;
+ dev_conf.nb_vchans = nb_vchans;
ret = rte_dma_configure(test_dev_id, &dev_conf);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to configure, %d", ret);
vchan_conf.direction = RTE_DMA_DIR_MEM_TO_MEM;
vchan_conf.nb_desc = dev_info.min_desc;
- ret = rte_dma_vchan_setup(test_dev_id, 0, &vchan_conf);
- RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup vchan, %d", ret);
+ for (int i = 0; i < nb_vchans; i++) {
+ ret = rte_dma_vchan_setup(test_dev_id, i, &vchan_conf);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup vchan %d, %d", i,
ret);
+ }
return TEST_SUCCESS;
}
@@ -294,7 +296,7 @@ test_dma_start_stop(void)
RTE_TEST_ASSERT(ret == -EINVAL, "Expected -EINVAL, %d", ret);
/* Setup one vchan for later test */
- ret = setup_one_vchan();
+ ret = setup_vchan(1);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
ret = rte_dma_start(test_dev_id);
@@ -312,6 +314,50 @@ test_dma_start_stop(void)
return TEST_SUCCESS;
}
+static int
+test_dma_reconfigure(void)
+{
+ struct rte_dma_conf dev_conf = { 0 };
+ struct rte_dma_info dev_info = { 0 };
+ uint16_t cfg_vchans;
+ int ret;
+
+ ret = rte_dma_info_get(test_dev_id, &dev_info);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to obtain device info, %d", ret);
+
+ /* At least two vchans required for the test */
+ if (dev_info.max_vchans < 2)
+ return TEST_SKIPPED;
+
+ /* Setup one vchan for later test */
+ ret = setup_vchan(1);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
+
+ ret = rte_dma_start(test_dev_id);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to start, %d", ret);
+
+ ret = rte_dma_stop(test_dev_id);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to stop, %d", ret);
+
+ /* Check reconfigure and vchan setup after device stopped */
+ cfg_vchans = dev_conf.nb_vchans = (dev_info.max_vchans - 1);
+
+ ret = setup_vchan(cfg_vchans);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
+
+ ret = rte_dma_start(test_dev_id);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to start, %d", ret);
+
+ ret = rte_dma_info_get(test_dev_id, &dev_info);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to obtain device info, %d", ret);
+ RTE_TEST_ASSERT_EQUAL(dev_info.nb_vchans, cfg_vchans, "incorrect
reconfiguration");
+
+ ret = rte_dma_stop(test_dev_id);
+ RTE_TEST_ASSERT_SUCCESS(ret, "Failed to stop, %d", ret);
+
+ return TEST_SUCCESS;
+}
+
static int
test_dma_stats(void)
{
@@ -328,7 +374,7 @@ test_dma_stats(void)
RTE_TEST_ASSERT(ret == -EINVAL, "Expected -EINVAL, %d", ret);
/* Setup one vchan for later test */
- ret = setup_one_vchan();
+ ret = setup_vchan(1);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
/* Check for invalid vchan */
@@ -400,7 +446,7 @@ test_dma_completed(void)
int ret;
/* Setup one vchan for later test */
- ret = setup_one_vchan();
+ ret = setup_vchan(1);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
ret = rte_dma_start(test_dev_id);
@@ -459,7 +505,7 @@ test_dma_completed_status(void)
int ret;
/* Setup one vchan for later test */
- ret = setup_one_vchan();
+ ret = setup_vchan(1);
RTE_TEST_ASSERT_SUCCESS(ret, "Failed to setup one vchan, %d", ret);
ret = rte_dma_start(test_dev_id);
@@ -517,6 +563,7 @@ static struct unit_test_suite dma_api_testsuite = {
TEST_CASE(test_dma_configure),
TEST_CASE(test_dma_vchan_setup),
TEST_CASE(test_dma_start_stop),
+ TEST_CASE(test_dma_reconfigure),
TEST_CASE(test_dma_stats),
TEST_CASE(test_dma_dump),
TEST_CASE(test_dma_completed),
--
2.25.1
[PATCH v7 1/3] test/dma: use unit test framework
Use unit test framework to execute DMA tests.
Signed-off-by: Gowrishankar Muthukrishnan
Acked-by: Chengwen Feng
---
v7:
- Used string const in unit_test_cases name member to avoid
compilation failure in Windows platform.
---
app/test/test_dmadev.c | 234 +
app/test/test_dmadev_api.c | 95 +--
2 files changed, 192 insertions(+), 137 deletions(-)
diff --git a/app/test/test_dmadev.c b/app/test/test_dmadev.c
index 7581fc2b4c..2d20e716d2 100644
--- a/app/test/test_dmadev.c
+++ b/app/test/test_dmadev.c
@@ -21,8 +21,12 @@
#define TEST_RINGSIZE 512
#define COPY_LEN 1024
+static struct rte_dma_info info;
static struct rte_mempool *pool;
+static bool check_err_stats;
+static int16_t test_dev_id;
static uint16_t id_count;
+static uint16_t vchan;
enum {
TEST_PARAM_REMOTE_ADDR = 0,
@@ -61,13 +65,28 @@ print_err(const char *func, int lineno, const char *format,
...)
va_end(ap);
}
+struct runtest_param {
+ const char name[NAME_MAX];
+ int (*test_fn)(int16_t dev_id, uint16_t vchan);
+ int iterations;
+};
+
static int
-runtest(const char *printable, int (*test_fn)(int16_t dev_id, uint16_t vchan),
int iterations,
- int16_t dev_id, uint16_t vchan, bool check_err_stats)
+runtest(const void *args)
{
+ int (*test_fn)(int16_t dev_id, uint16_t vchan);
+ const struct runtest_param *param = args;
struct rte_dma_stats stats;
+ const char *printable;
+ int iterations;
+ int16_t dev_id;
int i;
+ printable = param->name;
+ iterations = param->iterations;
+ test_fn = param->test_fn;
+ dev_id = test_dev_id;
+
rte_dma_stats_reset(dev_id, vchan);
printf("DMA Dev %d: Running %s Tests %s\n", dev_id, printable,
check_err_stats ? " " : "(errors expected)");
@@ -911,26 +930,87 @@ prepare_m2d_auto_free(int16_t dev_id, uint16_t vchan)
}
static int
-test_dmadev_instance(int16_t dev_id)
+test_dmadev_burst_setup(void)
+{
+ if (rte_dma_burst_capacity(test_dev_id, vchan) < 64) {
+ RTE_LOG(ERR, USER1,
+ "DMA Dev %u: insufficient burst capacity (64 required),
skipping tests\n",
+ test_dev_id);
+ return TEST_SKIPPED;
+ }
+
+ return TEST_SUCCESS;
+}
+
+static int
+test_dmadev_err_handling_setup(void)
+{
+ int ret = TEST_SKIPPED;
+
+ /* to test error handling we can provide null pointers for source or
dest in copies. This
+* requires VA mode in DPDK, since NULL(0) is a valid physical address.
+* We also need hardware that can report errors back.
+*/
+ if (rte_eal_iova_mode() != RTE_IOVA_VA)
+ RTE_LOG(ERR, USER1,
+ "DMA Dev %u: DPDK not in VA mode, skipping error
handling tests\n",
+ test_dev_id);
+ else if ((info.dev_capa & RTE_DMA_CAPA_HANDLES_ERRORS) == 0)
+ RTE_LOG(ERR, USER1,
+ "DMA Dev %u: device does not report errors, skipping
error handling tests\n",
+ test_dev_id);
+ else
+ ret = TEST_SUCCESS;
+
+ return ret;
+}
+
+static int
+test_dmadev_fill_setup(void)
+{
+ int ret = TEST_SUCCESS;
+
+ if ((info.dev_capa & RTE_DMA_CAPA_OPS_FILL) == 0) {
+ RTE_LOG(ERR, USER1,
+ "DMA Dev %u: No device fill support, skipping fill
tests\n", test_dev_id);
+ ret = TEST_SKIPPED;
+ }
+
+ return ret;
+}
+
+static int
+test_dmadev_autofree_setup(void)
+{
+ int ret = TEST_SKIPPED;
+
+ if ((info.dev_capa & RTE_DMA_CAPA_M2D_AUTO_FREE) &&
+ dma_add_test[TEST_M2D_AUTO_FREE].enabled == true) {
+ if (prepare_m2d_auto_free(test_dev_id, vchan) != 0)
+ return ret;
+
+ ret = TEST_SUCCESS;
+ }
+
+ return ret;
+}
+
+static int
+test_dmadev_setup(void)
{
-#define CHECK_ERRStrue
+ int16_t dev_id = test_dev_id;
struct rte_dma_stats stats;
- struct rte_dma_info info;
const struct rte_dma_conf conf = { .nb_vchans = 1};
const struct rte_dma_vchan_conf qconf = {
.direction = RTE_DMA_DIR_MEM_TO_MEM,
.nb_desc = TEST_RINGSIZE,
};
- const int vchan = 0;
int ret;
ret = rte_dma_info_get(dev_id, &info);
if (ret != 0)
ERR_RETURN("Error with rte_dma_info_get()\n");
- printf("\n### Test dmadev instance %u [%s]\n",
- dev_id, info.dev_name);
-
if (info.max_vchans < 1)
ERR_RETURN("Error, no channels available on device id %u\n",
dev_id);
@@ -969,76 +1049,82 @@ test_dmadev_instance(int16_t dev_id)
