[dpdk-dev] [PATCH v4] net/i40e: fix hash filter invalid issue in X722

2016-10-24 Thread Jeff Guo 
When verifying the Hash filtering on X722, we found a problem that
the hash value in descriptor is incorrect. The root caused is X722
uses different way of hash key word selection comparing with X710/XL710.
This patch fixes it by setting X722 specific key selection.

Signed-off-by: Jeff Guo 
---
v4:
refine commit log
---
 drivers/net/i40e/i40e_ethdev.c | 60 +-
 1 file changed, 47 insertions(+), 13 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index db5f808..ca515dd 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -211,6 +211,14 @@
 #define I40E_REG_INSET_L3_SRC_IP40x00018000ULL
 /* Destination IPv4 address */
 #define I40E_REG_INSET_L3_DST_IP40x0018ULL
+/* Source IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_SRC_IP4   0x0006ULL
+/* Destination IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_DST_IP4   0x0600ULL
+/* IPv4 Protocol for X722 */
+#define I40E_X722_REG_INSET_L3_IP4_PROTO 0x0010ULL
+/* IPv4 Time to Live for X722 */
+#define I40E_X722_REG_INSET_L3_IP4_TTL   0x0010ULL
 /* IPv4 Type of Service (TOS) */
 #define I40E_REG_INSET_L3_IP4_TOS0x0040ULL
 /* IPv4 Protocol */
@@ -7568,25 +7576,23 @@ i40e_parse_input_set(uint64_t *inset,
  * and vice versa
  */
 static uint64_t
-i40e_translate_input_set_reg(uint64_t input)
+i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
 {
uint64_t val = 0;
uint16_t i;

-   static const struct {
+   struct inset_map {
uint64_t inset;
uint64_t inset_reg;
-   } inset_map[] = {
+   };
+
+   static const struct inset_map inset_map_common[] = {
{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
{I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
{I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
{I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},
-   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
-   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
{I40E_INSET_IPV4_TOS, I40E_REG_INSET_L3_IP4_TOS},
-   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
-   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
@@ -7615,13 +7621,40 @@ i40e_translate_input_set_reg(uint64_t input)
{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
};

+/* some different registers map in x722*/
+   static const struct inset_map inset_map_diff_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
+   };
+
+   static const struct inset_map inset_map_diff_not_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
+   };
+
if (input == 0)
return val;

/* Translate input set to register aware inset */
-   for (i = 0; i < RTE_DIM(inset_map); i++) {
-   if (input & inset_map[i].inset)
-   val |= inset_map[i].inset_reg;
+   if (type == I40E_MAC_X722) {
+   for (i = 0; i < RTE_DIM(inset_map_diff_x722); i++) {
+   if (input & inset_map_diff_x722[i].inset)
+   val |= inset_map_diff_x722[i].inset_reg;
+   }
+   } else {
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+   }
+   }
+
+   for (i = 0; i < RTE_DIM(inset_map_common); i++) {
+   if (input & inset_map_common[i].inset)
+   val |= inset_map_common[i].inset_reg;
}

return val;
@@ -7712,7 +7745,8 @@ i40e_filter_input_set_init(struct i40e_pf *pf)
   I40E_INSET_MASK_NUM_REG);
if (num < 0)
return;
-   inset_reg = i40e_translate_input_set_reg(input_

[dpdk-dev] [PATCH v4] net/i40e: fix the hash filter invalid calculation in X722

2016-10-24 Thread Jeff Guo 
When verifying the Hash filtering on X722, we found a problem that
the hash value in descriptor is incorrect. The root caused is X722
uses different way of hash key word selection comparing with X710/XL710.
This patch fixes it by setting X722 specific key selection.

Signed-off-by: Jeff Guo 
---
v4:
refine commit log
---
 drivers/net/i40e/i40e_ethdev.c | 60 +-
 1 file changed, 47 insertions(+), 13 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index db5f808..ca515dd 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -211,6 +211,14 @@
 #define I40E_REG_INSET_L3_SRC_IP40x00018000ULL
 /* Destination IPv4 address */
 #define I40E_REG_INSET_L3_DST_IP40x0018ULL
+/* Source IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_SRC_IP4   0x0006ULL
+/* Destination IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_DST_IP4   0x0600ULL
+/* IPv4 Protocol for X722 */
+#define I40E_X722_REG_INSET_L3_IP4_PROTO 0x0010ULL
+/* IPv4 Time to Live for X722 */
+#define I40E_X722_REG_INSET_L3_IP4_TTL   0x0010ULL
 /* IPv4 Type of Service (TOS) */
 #define I40E_REG_INSET_L3_IP4_TOS0x0040ULL
 /* IPv4 Protocol */
@@ -7568,25 +7576,23 @@ i40e_parse_input_set(uint64_t *inset,
  * and vice versa
  */
 static uint64_t
-i40e_translate_input_set_reg(uint64_t input)
+i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
 {
uint64_t val = 0;
uint16_t i;

-   static const struct {
+   struct inset_map {
uint64_t inset;
uint64_t inset_reg;
-   } inset_map[] = {
+   };
+
+   static const struct inset_map inset_map_common[] = {
{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
{I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
{I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
{I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},
-   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
-   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
{I40E_INSET_IPV4_TOS, I40E_REG_INSET_L3_IP4_TOS},
-   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
-   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
@@ -7615,13 +7621,40 @@ i40e_translate_input_set_reg(uint64_t input)
{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
};

+/* some different registers map in x722*/
+   static const struct inset_map inset_map_diff_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
+   };
+
+   static const struct inset_map inset_map_diff_not_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
+   };
+
if (input == 0)
return val;

/* Translate input set to register aware inset */
-   for (i = 0; i < RTE_DIM(inset_map); i++) {
-   if (input & inset_map[i].inset)
-   val |= inset_map[i].inset_reg;
+   if (type == I40E_MAC_X722) {
+   for (i = 0; i < RTE_DIM(inset_map_diff_x722); i++) {
+   if (input & inset_map_diff_x722[i].inset)
+   val |= inset_map_diff_x722[i].inset_reg;
+   }
+   } else {
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+   }
+   }
+
+   for (i = 0; i < RTE_DIM(inset_map_common); i++) {
+   if (input & inset_map_common[i].inset)
+   val |= inset_map_common[i].inset_reg;
}

return val;
@@ -7712,7 +7745,8 @@ i40e_filter_input_set_init(struct i40e_pf *pf)
   I40E_INSET_MASK_NUM_REG);
if (num < 0)
return;
-   inset_reg = i40e_translate_input_set_reg(input_

[dpdk-dev] [PATCH v2] net/i40e: fix fdir configure failed issue in X710

2016-10-24 Thread Jeff Guo 
Because of some register is only supported by X722, such as 
I40E_GLQF_FD_PCTYPES,
so it need to use the mac type to distinguish the behavior of X722 from X710 
and other
NICs, or it would result X710 functional failed.

Fixes: 8c5cb3c11513 (?net/i40e: add packet type translation for X722?)
Signed-off-by: Jeff Guo 
---
v2:
refine commit log
decrease some code duplication
---
 drivers/net/i40e/i40e_ethdev.c| 103 +-
 drivers/net/i40e/i40e_ethdev.h|  32 +++-
 drivers/net/i40e/i40e_ethdev_vf.c |  16 --
 drivers/net/i40e/i40e_fdir.c  |  55 
 4 files changed, 113 insertions(+), 93 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 5af0e43..db5f808 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -6164,7 +6164,7 @@ DONE:

 /* Configure hash enable flags for RSS */
 uint64_t
-i40e_config_hena(uint64_t flags)
+i40e_config_hena(uint64_t flags, enum i40e_mac_type type)
 {
uint64_t hena = 0;

@@ -6173,42 +6173,42 @@ i40e_config_hena(uint64_t flags)

if (flags & ETH_RSS_FRAG_IPV4)
hena |= 1ULL << I40E_FILTER_PCTYPE_FRAG_IPV4;
-   if (flags & ETH_RSS_NONFRAG_IPV4_TCP)
-#ifdef X722_SUPPORT
-   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
-#else
-   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
-#endif
-   if (flags & ETH_RSS_NONFRAG_IPV4_UDP)
-#ifdef X722_SUPPORT
-   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
-#else
-   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
-#endif
+   if (flags & ETH_RSS_NONFRAG_IPV4_TCP) {
+   if (type == I40E_MAC_X722) {
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
+   } else
+   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
+   }
+   if (flags & ETH_RSS_NONFRAG_IPV4_UDP) {
+   if (type == I40E_MAC_X722) {
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
+   } else
+   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
+   }
if (flags & ETH_RSS_NONFRAG_IPV4_SCTP)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
if (flags & ETH_RSS_NONFRAG_IPV4_OTHER)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
if (flags & ETH_RSS_FRAG_IPV6)
hena |= 1ULL << I40E_FILTER_PCTYPE_FRAG_IPV6;
-   if (flags & ETH_RSS_NONFRAG_IPV6_TCP)
-#ifdef X722_SUPPORT
-   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
-#else
-   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
-#endif
-   if (flags & ETH_RSS_NONFRAG_IPV6_UDP)
-#ifdef X722_SUPPORT
-   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
-#else
-   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
-#endif
+   if (flags & ETH_RSS_NONFRAG_IPV6_TCP) {
+   if (type == I40E_MAC_X722) {
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
+   } else
+   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
+   }
+   if (flags & ETH_RSS_NONFRAG_IPV6_UDP) {
+   if (type == I40E_MAC_X722) {
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
+   } else
+   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
+   }
if (flags & ETH_RSS_NONFRAG_IPV6_SCTP)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
if (flags & ETH_RSS_NONFRAG_IPV6_OTHER)
@@ -6282,7 +6282,10 @@ i40e_pf_disable_rss(struct i40e_pf *pf)

hena = (uint64_t)i4

[dpdk-dev] [PATCH] net/i40e: fix the hash filter invalid calculation in X722

2016-10-19 Thread Jeff Guo 
As X722 extracts IPv4 header to Field Vector different with XL710/X710,
need to corresponding to modify the fields of IPv4 header in input set
to map different default Field Vector Table of different NICs.

Signed-off-by: Jeff Guo 
---
v3:
remove the x722 macro
v2:
fix compile error when x722 macro is not defined and simplify
the code to avoid duplication.
---
 drivers/net/i40e/i40e_ethdev.c | 60 +-
 1 file changed, 47 insertions(+), 13 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 5af0e43..6ef5ec6 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -211,6 +211,14 @@
 #define I40E_REG_INSET_L3_SRC_IP40x00018000ULL
 /* Destination IPv4 address */
 #define I40E_REG_INSET_L3_DST_IP40x0018ULL
+/* Source IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_SRC_IP4   0x0006ULL
+/* Destination IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_DST_IP4   0x0600ULL
+/* IPv4 Protocol for X722 */
+#define I40E_X722_REG_INSET_L3_IP4_PROTO 0x0010ULL
+/* IPv4 Time to Live for X722 */
+#define I40E_X722_REG_INSET_L3_IP4_TTL   0x0010ULL
 /* IPv4 Type of Service (TOS) */
 #define I40E_REG_INSET_L3_IP4_TOS0x0040ULL
 /* IPv4 Protocol */
@@ -7560,25 +7568,23 @@ i40e_parse_input_set(uint64_t *inset,
  * and vice versa
  */
 static uint64_t
-i40e_translate_input_set_reg(uint64_t input)
+i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
 {
uint64_t val = 0;
uint16_t i;

-   static const struct {
+   struct inset_map {
uint64_t inset;
uint64_t inset_reg;
-   } inset_map[] = {
+   };
+
+   static const struct inset_map inset_map_common[] = {
{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
{I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
{I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
{I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},
-   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
-   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
{I40E_INSET_IPV4_TOS, I40E_REG_INSET_L3_IP4_TOS},
-   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
-   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
@@ -7607,13 +7613,40 @@ i40e_translate_input_set_reg(uint64_t input)
{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
};

+/* some different registers map in x722*/
+   static const struct inset_map inset_map_diff_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
+   };
+
+   static const struct inset_map inset_map_diff_not_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
+   };
+
if (input == 0)
return val;

/* Translate input set to register aware inset */
-   for (i = 0; i < RTE_DIM(inset_map); i++) {
-   if (input & inset_map[i].inset)
-   val |= inset_map[i].inset_reg;
+   if (type == I40E_MAC_X722) {
+   for (i = 0; i < RTE_DIM(inset_map_diff_x722); i++) {
+   if (input & inset_map_diff_x722[i].inset)
+   val |= inset_map_diff_x722[i].inset_reg;
+   }
+   } else {
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+   }
+   }
+
+   for (i = 0; i < RTE_DIM(inset_map_common); i++) {
+   if (input & inset_map_common[i].inset)
+   val |= inset_map_common[i].inset_reg;
}

return val;
@@ -7698,7 +7731,8 @@ i40e_filter_input_set_init(struct i40e_pf *pf)
   I40E_INSET_MASK_NUM_REG);
if (num < 0)
return;
-   inset_reg = i40e_tr

[dpdk-dev] [PATCH] net/i40e: fix fdir configure failed issue in X710

2016-10-19 Thread Jeff Guo 
The correct way to distinguish the behavior of X722 and X710
or other NICs should be using the mac type but not X722 macro.

Fixes: 8c5cb3c11513 (?net/i40e: add packet type translation for X722?)
Signed-off-by: Jeff Guo 
---
 drivers/net/i40e/i40e_ethdev.c| 103 +-
 drivers/net/i40e/i40e_ethdev.h|  17 +++
 drivers/net/i40e/i40e_ethdev_vf.c |  16 --
 drivers/net/i40e/i40e_fdir.c  |  55 
 4 files changed, 112 insertions(+), 79 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 5af0e43..db5f808 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -6164,7 +6164,7 @@ DONE:

 /* Configure hash enable flags for RSS */
 uint64_t
-i40e_config_hena(uint64_t flags)
+i40e_config_hena(uint64_t flags, enum i40e_mac_type type)
 {
uint64_t hena = 0;

@@ -6173,42 +6173,42 @@ i40e_config_hena(uint64_t flags)

if (flags & ETH_RSS_FRAG_IPV4)
hena |= 1ULL << I40E_FILTER_PCTYPE_FRAG_IPV4;
-   if (flags & ETH_RSS_NONFRAG_IPV4_TCP)
-#ifdef X722_SUPPORT
-   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
-#else
-   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
-#endif
-   if (flags & ETH_RSS_NONFRAG_IPV4_UDP)
-#ifdef X722_SUPPORT
-   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
-#else
-   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
-#endif
+   if (flags & ETH_RSS_NONFRAG_IPV4_TCP) {
+   if (type == I40E_MAC_X722) {
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
+   } else
+   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
+   }
+   if (flags & ETH_RSS_NONFRAG_IPV4_UDP) {
+   if (type == I40E_MAC_X722) {
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
+   } else
+   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
+   }
if (flags & ETH_RSS_NONFRAG_IPV4_SCTP)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
if (flags & ETH_RSS_NONFRAG_IPV4_OTHER)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
if (flags & ETH_RSS_FRAG_IPV6)
hena |= 1ULL << I40E_FILTER_PCTYPE_FRAG_IPV6;
-   if (flags & ETH_RSS_NONFRAG_IPV6_TCP)
-#ifdef X722_SUPPORT
-   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
-#else
-   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
-#endif
-   if (flags & ETH_RSS_NONFRAG_IPV6_UDP)
-#ifdef X722_SUPPORT
-   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
-   (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
-#else
-   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
-#endif
+   if (flags & ETH_RSS_NONFRAG_IPV6_TCP) {
+   if (type == I40E_MAC_X722) {
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
+   } else
+   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
+   }
+   if (flags & ETH_RSS_NONFRAG_IPV6_UDP) {
+   if (type == I40E_MAC_X722) {
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
+(1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
+   } else
+   hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
+   }
if (flags & ETH_RSS_NONFRAG_IPV6_SCTP)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
if (flags & ETH_RSS_NONFRAG_IPV6_OTHER)
@@ -6282,7 +6282,10 @@ i40e_pf_disable_rss(struct i40e_pf *pf)

hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0));
hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1))) << 32;
-   hena &= ~I40E_RSS_HENA_ALL;
+   if (hw-

[dpdk-dev] [PATCH v2 2/2] drivers/i40e: fix the hash filter invalid calculation in X722

2016-10-15 Thread Jeff Guo 
As X722 extracts IPv4 header to Field Vector different with XL710/X710,
need to corresponding to modify the fields of IPv4 header in input set
to map different default Field Vector Table of different NICs.

Signed-off-by: Jeff Guo 

---
v2:
fix compile error when x722 macro is not defined and simplify
the code to avoid duplication.
---
 drivers/net/i40e/i40e_ethdev.c | 73 ++
 1 file changed, 60 insertions(+), 13 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 920fd6d..7895c11 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -211,6 +211,16 @@
 #define I40E_REG_INSET_L3_SRC_IP40x00018000ULL
 /* Destination IPv4 address */
 #define I40E_REG_INSET_L3_DST_IP40x0018ULL
+#ifdef X722_SUPPORT
+/* Source IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_SRC_IP4   0x0006ULL
+/* Destination IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_DST_IP4   0x0600ULL
+/* IPv4 Protocol */
+#define I40E_X722_REG_INSET_L3_IP4_PROTO 0x0010ULL
+/* IPv4 Time to Live */
+#define I40E_X722_REG_INSET_L3_IP4_TTL   0x0010ULL
+#endif
 /* IPv4 Type of Service (TOS) */
 #define I40E_REG_INSET_L3_IP4_TOS0x0040ULL
 /* IPv4 Protocol */
@@ -7581,7 +7591,7 @@ i40e_parse_input_set(uint64_t *inset,
  * and vice versa
  */
 static uint64_t
-i40e_translate_input_set_reg(uint64_t input)
+i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
 {
uint64_t val = 0;
uint16_t i;
@@ -7589,17 +7599,13 @@ i40e_translate_input_set_reg(uint64_t input)
static const struct {
uint64_t inset;
uint64_t inset_reg;
-   } inset_map[] = {
+   } inset_map_common[] = {
{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
{I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
{I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
{I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},
-   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
-   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
{I40E_INSET_IPV4_TOS, I40E_REG_INSET_L3_IP4_TOS},
-   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
-   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
@@ -7627,16 +7633,56 @@ i40e_translate_input_set_reg(uint64_t input)
{I40E_INSET_FLEX_PAYLOAD_W7, I40E_REG_INSET_FLEX_PAYLOAD_WORD7},
{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
};
+#ifdef X722_SUPPORT
+
+/* some different registers map in x722*/
+   static const struct {
+   uint64_t inset;
+   uint64_t inset_reg;
+   } inset_map_diff_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
+   };
+#endif
+
+   static const struct {
+   uint64_t inset;
+   uint64_t inset_reg;
+   } inset_map_diff_not_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
+   };

if (input == 0)
return val;

/* Translate input set to register aware inset */
-   for (i = 0; i < RTE_DIM(inset_map); i++) {
-   if (input & inset_map[i].inset)
-   val |= inset_map[i].inset_reg;
+#ifdef X722_SUPPORT
+   if (type == I40E_MAC_X722) {
+   for (i = 0; i < RTE_DIM(inset_map_diff_x722); i++) {
+   if (input & inset_map_diff_x722[i].inset)
+   val |= inset_map_diff_x722[i].inset_reg;
+   }
+   } else {
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+   }
+   }
+#else
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+

[dpdk-dev] [PATCH v2 1/2] drivers/i40e: fix X722 macro absence result in compile

2016-10-15 Thread Jeff Guo 
Since some register only be supported by X722 but may not be supported
by other NICs, so add X722 macro to distinguish that to avoid compile error
when the X722 macro is undefined.

Fixes: d0a349409bd7 (?i40e: support AQ based RSS config?)
Fixes: 001a1c0f98f4 ("ethdev: get registers width")
Fixes: a0454b5d2e08 (?i40e: update device ids?)
Fixes: 647d1eaf758b (?i40evf: support AQ based RSS config?)
Fixes: 3058891a2b02 (?net/i40e: move PCI device ids to the driver?)
Fixes: d9efd0136ac1 (?i40e: add EEPROM and registers dumping?)
Signed-off-by: Jeff Guo 

---
v2:
fix compile error when x722 macro is not define.
---
 drivers/net/i40e/i40e_ethdev.c| 36 ++-
 drivers/net/i40e/i40e_ethdev.h| 17 +++
 drivers/net/i40e/i40e_ethdev_vf.c | 27 +++
 drivers/net/i40e/i40e_regs.h  | 96 +++
 drivers/net/i40e/i40e_rxtx.c  | 18 +++-
 5 files changed, 191 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index d0640b9..920fd6d 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -468,13 +468,17 @@ static const struct rte_pci_id pci_id_i40e_map[] = {
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_B) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_SFP28) },
+#ifdef X722_SUPPORT
+#ifdef X722_A0_SUPPORT
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) },
+#endif /* X722_A0_SUPPORT */
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_I_X722) },
+#endif /* X722_SUPPORT */
{ .vendor_id = 0, /* sentinel */ },
 };

@@ -3182,6 +3186,7 @@ i40e_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
if (!lut)
return -EINVAL;

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, TRUE,
  lut, lut_size);
@@ -3190,12 +3195,15 @@ i40e_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
return ret;
}
} else {
+#endif /* X722_SUPPORT */
uint32_t *lut_dw = (uint32_t *)lut;
uint16_t i, lut_size_dw = lut_size / 4;

for (i = 0; i < lut_size_dw; i++)
lut_dw[i] = I40E_READ_REG(hw, I40E_PFQF_HLUT(i));
+#ifdef X722_SUPPORT
}
+#endif /* X722_SUPPORT */

return 0;
 }
@@ -3213,6 +3221,7 @@ i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
pf = I40E_VSI_TO_PF(vsi);
hw = I40E_VSI_TO_HW(vsi);

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, TRUE,
  lut, lut_size);
@@ -3221,13 +3230,16 @@ i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
return ret;
}
} else {
+#endif /* X722_SUPPORT */
uint32_t *lut_dw = (uint32_t *)lut;
uint16_t i, lut_size_dw = lut_size / 4;

for (i = 0; i < lut_size_dw; i++)
I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
I40E_WRITE_FLUSH(hw);
+#ifdef X722_SUPPORT
}
+#endif /* X722_SUPPORT */

return 0;
 }
@@ -3508,8 +3520,10 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)
pf->lan_nb_qps = 1;
} else {
pf->flags |= I40E_FLAG_RSS;
+#ifdef X722_SUPPORT
if (hw->mac.type == I40E_MAC_X722)
pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE;
+#endif /* X722_SUPPORT */
pf->lan_nb_qps = pf->lan_nb_qp_max;
}
qp_count += pf->lan_nb_qps;
@@ -6302,6 +6316,7 @@ i40e_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, 
uint8_t key_len)
return -EINVAL;
}

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
struct i40e_aqc_get_set_rss_key_data *key_dw =
(struct i40e_aqc_get_set_rss_key_data *)key;
@@ -6311,13 +6326,16 @@ i40e_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, 
uint8_t key_len)
PMD_INIT_LOG(ERR, "Failed to configure RSS key "
 "via AQ");
} else {
+#endif /* X722_SUPPORT */
uint32_t *ha

[dpdk-dev] [PATCH v2 2/2] drivers/i40e: fix the hash filter invalid calculation in X722

2016-10-15 Thread Jeff Guo 
As X722 extracts IPv4 header to Field Vector different with XL710/X710,
need to corresponding to modify the fields of IPv4 header in input set
to map different default Field Vector Table of different NICs.

Signed-off-by: Jeff Guo 

---
v2:
fix compile error when x722 macro is not defined and simplify
the code to avoid duplication.
---
 drivers/net/i40e/i40e_ethdev.c | 73 ++
 1 file changed, 60 insertions(+), 13 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 920fd6d..7895c11 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -211,6 +211,16 @@
 #define I40E_REG_INSET_L3_SRC_IP40x00018000ULL
 /* Destination IPv4 address */
 #define I40E_REG_INSET_L3_DST_IP40x0018ULL
+#ifdef X722_SUPPORT
+/* Source IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_SRC_IP4   0x0006ULL
+/* Destination IPv4 address for X722 */
+#define I40E_X722_REG_INSET_L3_DST_IP4   0x0600ULL
+/* IPv4 Protocol */
+#define I40E_X722_REG_INSET_L3_IP4_PROTO 0x0010ULL
+/* IPv4 Time to Live */
+#define I40E_X722_REG_INSET_L3_IP4_TTL   0x0010ULL
+#endif
 /* IPv4 Type of Service (TOS) */
 #define I40E_REG_INSET_L3_IP4_TOS0x0040ULL
 /* IPv4 Protocol */
@@ -7581,7 +7591,7 @@ i40e_parse_input_set(uint64_t *inset,
  * and vice versa
  */
 static uint64_t
-i40e_translate_input_set_reg(uint64_t input)
+i40e_translate_input_set_reg(enum i40e_mac_type type, uint64_t input)
 {
uint64_t val = 0;
uint16_t i;
@@ -7589,17 +7599,13 @@ i40e_translate_input_set_reg(uint64_t input)
static const struct {
uint64_t inset;
uint64_t inset_reg;
-   } inset_map[] = {
+   } inset_map_common[] = {
{I40E_INSET_DMAC, I40E_REG_INSET_L2_DMAC},
{I40E_INSET_SMAC, I40E_REG_INSET_L2_SMAC},
{I40E_INSET_VLAN_OUTER, I40E_REG_INSET_L2_OUTER_VLAN},
{I40E_INSET_VLAN_INNER, I40E_REG_INSET_L2_INNER_VLAN},
{I40E_INSET_LAST_ETHER_TYPE, I40E_REG_INSET_LAST_ETHER_TYPE},
-   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
-   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
{I40E_INSET_IPV4_TOS, I40E_REG_INSET_L3_IP4_TOS},
-   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
-   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
{I40E_INSET_IPV6_SRC, I40E_REG_INSET_L3_SRC_IP6},
{I40E_INSET_IPV6_DST, I40E_REG_INSET_L3_DST_IP6},
{I40E_INSET_IPV6_TC, I40E_REG_INSET_L3_IP6_TC},
@@ -7627,16 +7633,56 @@ i40e_translate_input_set_reg(uint64_t input)
{I40E_INSET_FLEX_PAYLOAD_W7, I40E_REG_INSET_FLEX_PAYLOAD_WORD7},
{I40E_INSET_FLEX_PAYLOAD_W8, I40E_REG_INSET_FLEX_PAYLOAD_WORD8},
};
+#ifdef X722_SUPPORT
+
+/* some different registers map in x722*/
+   static const struct {
+   uint64_t inset;
+   uint64_t inset_reg;
+   } inset_map_diff_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_X722_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_X722_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_X722_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_X722_REG_INSET_L3_IP4_TTL},
+   };
+#endif
+
+   static const struct {
+   uint64_t inset;
+   uint64_t inset_reg;
+   } inset_map_diff_not_x722[] = {
+   {I40E_INSET_IPV4_SRC, I40E_REG_INSET_L3_SRC_IP4},
+   {I40E_INSET_IPV4_DST, I40E_REG_INSET_L3_DST_IP4},
+   {I40E_INSET_IPV4_PROTO, I40E_REG_INSET_L3_IP4_PROTO},
+   {I40E_INSET_IPV4_TTL, I40E_REG_INSET_L3_IP4_TTL},
+   };

if (input == 0)
return val;

/* Translate input set to register aware inset */
-   for (i = 0; i < RTE_DIM(inset_map); i++) {
-   if (input & inset_map[i].inset)
-   val |= inset_map[i].inset_reg;
+#ifdef X722_SUPPORT
+   if (type == I40E_MAC_X722) {
+   for (i = 0; i < RTE_DIM(inset_map_diff_x722); i++) {
+   if (input & inset_map_diff_x722[i].inset)
+   val |= inset_map_diff_x722[i].inset_reg;
+   }
+   } else {
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+   }
+   }
+#else
+   for (i = 0; i < RTE_DIM(inset_map_diff_not_x722); i++) {
+   if (input & inset_map_diff_not_x722[i].inset)
+   val |= inset_map_diff_not_x722[i].inset_reg;
+

[dpdk-dev] [PATCH v2 1/2] drivers/i40e: fix X722 macro absence result in compile

2016-10-15 Thread Jeff Guo 
Since some register only be supported by X722 but may not be supported
by other NICs, so add X722 macro to distinguish that to avoid compile error
when the X722 macro is undefined.

Fixes: d0a349409bd7 (?i40e: support AQ based RSS config?)
Fixes: 001a1c0f98f4 ("ethdev: get registers width")
Fixes: a0454b5d2e08 (?i40e: update device ids?)
Fixes: 647d1eaf758b (?i40evf: support AQ based RSS config?)
Fixes: 3058891a2b02 (?net/i40e: move PCI device ids to the driver?)
Fixes: d9efd0136ac1 (?i40e: add EEPROM and registers dumping?)
Signed-off-by: Jeff Guo 

---
v2:
fix compile error when x722 macro is not define.
---
 drivers/net/i40e/i40e_ethdev.c| 36 ++-
 drivers/net/i40e/i40e_ethdev.h| 17 +++
 drivers/net/i40e/i40e_ethdev_vf.c | 27 +++
 drivers/net/i40e/i40e_regs.h  | 96 +++
 drivers/net/i40e/i40e_rxtx.c  | 18 +++-
 5 files changed, 191 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index d0640b9..920fd6d 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -468,13 +468,17 @@ static const struct rte_pci_id pci_id_i40e_map[] = {
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_B) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_25G_SFP28) },
+#ifdef X722_SUPPORT
+#ifdef X722_A0_SUPPORT
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0) },
+#endif /* X722_A0_SUPPORT */
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_KX_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722) },
{ RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_I_X722) },
+#endif /* X722_SUPPORT */
{ .vendor_id = 0, /* sentinel */ },
 };

@@ -3182,6 +3186,7 @@ i40e_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
if (!lut)
return -EINVAL;

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, TRUE,
  lut, lut_size);
@@ -3190,12 +3195,15 @@ i40e_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
return ret;
}
} else {
+#endif /* X722_SUPPORT */
uint32_t *lut_dw = (uint32_t *)lut;
uint16_t i, lut_size_dw = lut_size / 4;

for (i = 0; i < lut_size_dw; i++)
lut_dw[i] = I40E_READ_REG(hw, I40E_PFQF_HLUT(i));
+#ifdef X722_SUPPORT
}
+#endif /* X722_SUPPORT */

return 0;
 }
@@ -3213,6 +3221,7 @@ i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
pf = I40E_VSI_TO_PF(vsi);
hw = I40E_VSI_TO_HW(vsi);

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, TRUE,
  lut, lut_size);
@@ -3221,13 +3230,16 @@ i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, 
uint16_t lut_size)
return ret;
}
} else {
+#endif /* X722_SUPPORT */
uint32_t *lut_dw = (uint32_t *)lut;
uint16_t i, lut_size_dw = lut_size / 4;

for (i = 0; i < lut_size_dw; i++)
I40E_WRITE_REG(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
I40E_WRITE_FLUSH(hw);
+#ifdef X722_SUPPORT
}
+#endif /* X722_SUPPORT */

return 0;
 }
@@ -3508,8 +3520,10 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)
pf->lan_nb_qps = 1;
} else {
pf->flags |= I40E_FLAG_RSS;
+#ifdef X722_SUPPORT
if (hw->mac.type == I40E_MAC_X722)
pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE;
+#endif /* X722_SUPPORT */
pf->lan_nb_qps = pf->lan_nb_qp_max;
}
qp_count += pf->lan_nb_qps;
@@ -6302,6 +6316,7 @@ i40e_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, 
uint8_t key_len)
return -EINVAL;
}

+#ifdef X722_SUPPORT
if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
struct i40e_aqc_get_set_rss_key_data *key_dw =
(struct i40e_aqc_get_set_rss_key_data *)key;
@@ -6311,13 +6326,16 @@ i40e_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, 
uint8_t key_len)
PMD_INIT_LOG(ERR, "Failed to configure RSS key "
 "via AQ");
} else {
+#endif /* X722_SUPPORT */
uint32_t *ha

[dpdk-dev] [PATCH v2 2/2] drivers/i40e: Add FD PCTYPE translation for device x722

2016-09-07 Thread Jeff Guo 
In device x722, before the FD filter is programmed, the PCTYPE in
the FD programming descriptor need to use GLQF_FD_PCTYPE
table to translate into Second PCTYPE, that will let new PCTYPE
compatible with original PCTYPE in FD filter.

Signed-off-by: Jeff Guo 
---
 drivers/net/i40e/i40e_ethdev.c | 11 +++
 drivers/net/i40e/i40e_fdir.c   | 17 +
 2 files changed, 28 insertions(+)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index aee8f40..183e742 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -7736,7 +7736,16 @@ i40e_hash_filter_inset_select(struct i40e_hw *hw,
PMD_DRV_LOG(ERR, "invalid flow_type input.");
return -EINVAL;
}
+
+#ifdef X722_SUPPORT
+   /* get translated pctype value in fd pctype register */
+   pctype = (enum i40e_filter_pctype)i40e_read_rx_ctl(hw,
+   I40E_GLQF_FD_PCTYPES((int)i40e_flowtype_to_pctype(
+   conf->flow_type)));
+#else
pctype = i40e_flowtype_to_pctype(conf->flow_type);
+#endif
+
ret = i40e_parse_input_set(_set, pctype, conf->field,
   conf->inset_size);
if (ret) {
@@ -7805,7 +7814,9 @@ i40e_fdir_filter_inset_select(struct i40e_pf *pf,
PMD_DRV_LOG(ERR, "invalid flow_type input.");
return -EINVAL;
}
+
pctype = i40e_flowtype_to_pctype(conf->flow_type);
+
ret = i40e_parse_input_set(_set, pctype, conf->field,
   conf->inset_size);
if (ret) {
diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c
index f65c411..b32b7ec 100644
--- a/drivers/net/i40e/i40e_fdir.c
+++ b/drivers/net/i40e/i40e_fdir.c
@@ -664,7 +664,14 @@ i40e_fdir_configure(struct rte_eth_dev *dev)
i40e_set_flx_pld_cfg(pf, >flex_set[i]);
/* configure flex mask*/
for (i = 0; i < conf->nb_flexmasks; i++) {
+#ifdef X722_SUPPORT
+   /* get translated pctype value in fd pctype register */
+   pctype = (enum i40e_filter_pctype)i40e_read_rx_ctl(hw,
+   I40E_GLQF_FD_PCTYPES((int)i40e_flowtype_to_pctype(
+   conf->flex_mask[i].flow_type)));
+#else
pctype = i40e_flowtype_to_pctype(conf->flex_mask[i].flow_type);
+#endif
i40e_set_flex_mask_on_pctype(pf, pctype, >flex_mask[i]);
}

@@ -1012,6 +1019,7 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,
const struct rte_eth_fdir_filter *filter,
bool add)
 {
+   struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
enum i40e_filter_pctype pctype;
@@ -1044,7 +1052,16 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,
PMD_DRV_LOG(ERR, "construct packet for fdir fails.");
return ret;
}
+
+#ifdef X722_SUPPORT
+   /* get translated pctype value in fd pctype register */
+   pctype = (enum i40e_filter_pctype)i40e_read_rx_ctl(hw,
+   I40E_GLQF_FD_PCTYPES((int)i40e_flowtype_to_pctype(
+   filter->input.flow_type)));
+#else
pctype = i40e_flowtype_to_pctype(filter->input.flow_type);
+#endif
+
ret = i40e_fdir_filter_programming(pf, pctype, filter, add);
if (ret < 0) {
PMD_DRV_LOG(ERR, "fdir programming fails for PCTYPE(%u).",
-- 
2.1.4

[dpdk-dev] [PATCH v2 1/2] drivers/i40e: Add new PCTYPEs for device x722

2016-09-07 Thread Jeff Guo 
There are 6 new PCTYPEs enabled in the device x722.
The 6 new PCTYPEs As bellow:
NonF Unicast IPv4, UDP
NonF Multicast IPv4, UDP
NonF IPv4, TCP, SYN, no ACK
NonF Unicast IPv6, UDP
NonF Multicast IPv6, UDP

Signed-off-by: Jeff Guo 
---
 drivers/net/i40e/i40e_ethdev.c | 188 +
 drivers/net/i40e/i40e_ethdev.h |  45 ++
 2 files changed, 233 insertions(+)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index d0aeb70..aee8f40 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -6154,9 +6154,20 @@ i40e_config_hena(uint64_t flags)
if (flags & ETH_RSS_FRAG_IPV4)
hena |= 1ULL << I40E_FILTER_PCTYPE_FRAG_IPV4;
if (flags & ETH_RSS_NONFRAG_IPV4_TCP)
+#ifdef X722_SUPPORT
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
+#else
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
+#endif
if (flags & ETH_RSS_NONFRAG_IPV4_UDP)
+#ifdef X722_SUPPORT
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
+#else
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
+#endif
if (flags & ETH_RSS_NONFRAG_IPV4_SCTP)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
if (flags & ETH_RSS_NONFRAG_IPV4_OTHER)
@@ -6164,9 +6175,20 @@ i40e_config_hena(uint64_t flags)
if (flags & ETH_RSS_FRAG_IPV6)
hena |= 1ULL << I40E_FILTER_PCTYPE_FRAG_IPV6;
if (flags & ETH_RSS_NONFRAG_IPV6_TCP)
+#ifdef X722_SUPPORT
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
+#else
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
+#endif
if (flags & ETH_RSS_NONFRAG_IPV6_UDP)
+#ifdef X722_SUPPORT
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
+#else
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
+#endif
if (flags & ETH_RSS_NONFRAG_IPV6_SCTP)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
if (flags & ETH_RSS_NONFRAG_IPV6_OTHER)
@@ -6189,8 +6211,18 @@ i40e_parse_hena(uint64_t flags)
rss_hf |= ETH_RSS_FRAG_IPV4;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
+#ifdef X722_SUPPORT
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK))
+   rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
+#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
+#ifdef X722_SUPPORT
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP))
+   rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP))
+   rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
+#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_SCTP;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER))
@@ -6199,8 +6231,18 @@ i40e_parse_hena(uint64_t flags)
rss_hf |= ETH_RSS_FRAG_IPV6;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
+#ifdef X722_SUPPORT
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK))
+   rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
+#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
+#ifdef X722_SUPPORT
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP))
+   rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))
+   rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
+#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_SCTP;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER))
@@ -7064,6 +7106,26 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_IPV4_SRC | I40E_INSET_IPV4_DST |
I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT |

[dpdk-dev] [PATCH] drivers/i40e: Add FD PCTYPE translation for x722

2016-08-26 Thread Jeff Guo 
Before the filter is programmed, the PCTYPE in
the FD programming descriptor need to use
GLQF_FD_PCTYPE table to translate into Second PCTYPE.

Signed-off-by: Jeff Guo 
---
 drivers/net/i40e/i40e_ethdev.c | 11 +++
 drivers/net/i40e/i40e_fdir.c   | 17 +
 2 files changed, 28 insertions(+)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index aee8f40..7824704 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -7736,7 +7736,9 @@ i40e_hash_filter_inset_select(struct i40e_hw *hw,
PMD_DRV_LOG(ERR, "invalid flow_type input.");
return -EINVAL;
}
+
pctype = i40e_flowtype_to_pctype(conf->flow_type);
+
ret = i40e_parse_input_set(_set, pctype, conf->field,
   conf->inset_size);
if (ret) {
@@ -7805,7 +7807,16 @@ i40e_fdir_filter_inset_select(struct i40e_pf *pf,
PMD_DRV_LOG(ERR, "invalid flow_type input.");
return -EINVAL;
}
+
+#ifdef X722_SUPPORT
+   /* get translated pctype value in fd pctype register */
+   pctype = i40e_read_rx_ctl(hw,
+   I40E_GLQF_FD_PCTYPES(i40e_flowtype_to_pctype(
+   conf->flow_type)));
+#else
pctype = i40e_flowtype_to_pctype(conf->flow_type);
+#endif
+
ret = i40e_parse_input_set(_set, pctype, conf->field,
   conf->inset_size);
if (ret) {
diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c
index f65c411..d91df96 100644
--- a/drivers/net/i40e/i40e_fdir.c
+++ b/drivers/net/i40e/i40e_fdir.c
@@ -664,7 +664,14 @@ i40e_fdir_configure(struct rte_eth_dev *dev)
i40e_set_flx_pld_cfg(pf, >flex_set[i]);
/* configure flex mask*/
for (i = 0; i < conf->nb_flexmasks; i++) {
+#ifdef X722_SUPPORT
+   /* get translated pctype value in fd pctype register */
+   pctype = i40e_read_rx_ctl(hw,
+   I40E_GLQF_FD_PCTYPES(i40e_flowtype_to_pctype(
+   conf->flex_mask[i].flow_type)));
+#else
pctype = i40e_flowtype_to_pctype(conf->flex_mask[i].flow_type);
+#endif
i40e_set_flex_mask_on_pctype(pf, pctype, >flex_mask[i]);
}

@@ -1012,6 +1019,7 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,
const struct rte_eth_fdir_filter *filter,
bool add)
 {
+   struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
enum i40e_filter_pctype pctype;
@@ -1044,7 +1052,16 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,
PMD_DRV_LOG(ERR, "construct packet for fdir fails.");
return ret;
}
+
+#ifdef X722_SUPPORT
+   /* get translated pctype value in fd pctype register */
+   pctype = i40e_read_rx_ctl(hw,
+   I40E_GLQF_FD_PCTYPES(i40e_flowtype_to_pctype(
+   filter->input.flow_type)));
+#else
pctype = i40e_flowtype_to_pctype(filter->input.flow_type);
+#endif
+
ret = i40e_fdir_filter_programming(pf, pctype, filter, add);
if (ret < 0) {
PMD_DRV_LOG(ERR, "fdir programming fails for PCTYPE(%u).",
-- 
1.9.3

[dpdk-dev] [PATCH] drivers/i40e: Add new PCTYPE for x722 hardware driver

2016-08-26 Thread Jeff Guo 
There are 6 new PCTYPE be enabled in the i40e hardware driver
for x722, add them to let user to use it to filter the corresponding
PCTYPE packet in x722.

The new PCTYPE As bellow:
NonF Unicast IPv4, UDP
NonF Multicast IPv4, UDP
NonF IPv4, TCP, SYN, no ACK
NonF Unicast IPv6, UDP
NonF Multicast IPv6, UDP

Signed-off-by: Jeff Guo 
---
 drivers/net/i40e/i40e_ethdev.c | 188 +
 drivers/net/i40e/i40e_ethdev.h |  45 ++
 2 files changed, 233 insertions(+)

diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index d0aeb70..aee8f40 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -6154,9 +6154,20 @@ i40e_config_hena(uint64_t flags)
if (flags & ETH_RSS_FRAG_IPV4)
hena |= 1ULL << I40E_FILTER_PCTYPE_FRAG_IPV4;
if (flags & ETH_RSS_NONFRAG_IPV4_TCP)
+#ifdef X722_SUPPORT
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
+#else
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
+#endif
if (flags & ETH_RSS_NONFRAG_IPV4_UDP)
+#ifdef X722_SUPPORT
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
+#else
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
+#endif
if (flags & ETH_RSS_NONFRAG_IPV4_SCTP)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
if (flags & ETH_RSS_NONFRAG_IPV4_OTHER)
@@ -6164,9 +6175,20 @@ i40e_config_hena(uint64_t flags)
if (flags & ETH_RSS_FRAG_IPV6)
hena |= 1ULL << I40E_FILTER_PCTYPE_FRAG_IPV6;
if (flags & ETH_RSS_NONFRAG_IPV6_TCP)
+#ifdef X722_SUPPORT
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
+#else
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
+#endif
if (flags & ETH_RSS_NONFRAG_IPV6_UDP)
+#ifdef X722_SUPPORT
+   hena |= (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
+   (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
+#else
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
+#endif
if (flags & ETH_RSS_NONFRAG_IPV6_SCTP)
hena |= 1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
if (flags & ETH_RSS_NONFRAG_IPV6_OTHER)
@@ -6189,8 +6211,18 @@ i40e_parse_hena(uint64_t flags)
rss_hf |= ETH_RSS_FRAG_IPV4;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
+#ifdef X722_SUPPORT
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK))
+   rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
+#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
+#ifdef X722_SUPPORT
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP))
+   rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP))
+   rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
+#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP))
rss_hf |= ETH_RSS_NONFRAG_IPV4_SCTP;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER))
@@ -6199,8 +6231,18 @@ i40e_parse_hena(uint64_t flags)
rss_hf |= ETH_RSS_FRAG_IPV6;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
+#ifdef X722_SUPPORT
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK))
+   rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
+#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_UDP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
+#ifdef X722_SUPPORT
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP))
+   rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
+   if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP))
+   rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
+#endif
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP))
rss_hf |= ETH_RSS_NONFRAG_IPV6_SCTP;
if (flags & (1ULL << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER))
@@ -7064,6 +7106,26 @@ i40e_get_valid_input_set(enum i40e_filter_pctype pctype,
I40E_INSET_I

[dpdk-dev] [PATCH v3] doc: add known issue about promiscuous mode for I40e VF

2016-07-26 Thread Jeff Guo 
When use i40e linux kernel driver as host driver and DPDK handler the i40e
VF, the promiscuous mode doesn't work in i40e VF. It is not supported by
DPDK i40e VF driver right now.

Signed-off-by: Jeff Guo 
---
v2->v3:
- Title underline align and refine some description

 doc/guides/rel_notes/known_issues.rst | 20 
 1 file changed, 20 insertions(+)

diff --git a/doc/guides/rel_notes/known_issues.rst 
b/doc/guides/rel_notes/known_issues.rst
index 5ec1987..3cd4237 100644
--- a/doc/guides/rel_notes/known_issues.rst
+++ b/doc/guides/rel_notes/known_issues.rst
@@ -620,3 +620,23 @@ The last EAL argument is replaced by the program name in 
argv[]

 **Driver/Module**:
Environment Abstraction Layer (EAL).
+
+
+I40e VF may not receive packets in the promiscuous mode
+---
+
+**Description**:
+   Promiscuous mode is not supported by the DPDK i40e VF driver when using the
+   i40e Linux kernel driver as host driver.
+
+**Implication**:
+   The i40e VF does not receive packets when the destination MAC address is 
unknown.
+
+**Resolution/Workaround**:
+   Use a explicit destination MAC address that matches the VF.
+
+**Affected Environment/Platform**:
+   All.
+
+**Driver/Module**:
+   Poll Mode Driver (PMD).
-- 
1.9.3

[dpdk-dev] [PATCH v2] doc: add known issue about promiscuous mode for I40e VF

2016-07-25 Thread Jeff Guo 
When use i40e linux kernel driver as host driver and DPDK handler
the i40e VF, the promiscuous mode doesn't work in i40e VF. It is
not supported by DPDK i40e VF driver right now.

Signed-off-by: Jeff Guo 
---
v1->v2:
- add singned-off and modify some format

 doc/guides/rel_notes/known_issues.rst | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/doc/guides/rel_notes/known_issues.rst 
b/doc/guides/rel_notes/known_issues.rst
index 5ec1987..e907c22 100644
--- a/doc/guides/rel_notes/known_issues.rst
+++ b/doc/guides/rel_notes/known_issues.rst
@@ -620,3 +620,25 @@ The last EAL argument is replaced by the program name in 
argv[]

 **Driver/Module**:
Environment Abstraction Layer (EAL).
+
+
+I40e VF can't receive the promiscuous unicast/multicast/broadcast packet.
+-
+
+**Description**:
+   Use i40e linux kernel driver PF generate VF, and run testpmd, set 
Promiscuous mode and
+   All multicast mode to be enabled, then send packet with unknown destination 
MAC address
+   to VF, but VF can't receive the packet.
+
+**Implication**:
+   So far, the promiscuous mode is not supported by DPDK i40e VF driver if use 
i40e Linux kernel
+   driver as host driver.
+
+**Resolution/Workaround**:
+   Don't use promiscuous mode in i40e VF if use i40e Linux kernel driver as 
host driver.
+
+**Affected Environment/Platform**:
+   All.
+
+**Driver/Module**:
+   Poll Mode Driver (PMD).
-- 
1.9.3

[dpdk-dev] [PATCH] doc: add a deprecation about the modification of the return type of promiscuous configure ops in i40e eth_dev_ops

2016-07-25 Thread Jeff Guo 
Since an issue has broken out the problem that even the i40e linux kernel driver
do not support the promiscuous mode in i40e VF when use i40e linux kernel driver
as host driver, the testpmd app still show the mode configure status to be 
enabled.
In order to reflect the real status of the i40e linux kernel driver configure 
result,
some i40e eth_dev_ops about enable and disable promiscuous and all multicast 
mode need
to be modified the return type from void to int.
---
 doc/guides/rel_notes/deprecation.rst | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/doc/guides/rel_notes/deprecation.rst 
b/doc/guides/rel_notes/deprecation.rst
index f502f86..2f41f67 100644
--- a/doc/guides/rel_notes/deprecation.rst
+++ b/doc/guides/rel_notes/deprecation.rst
@@ -41,3 +41,10 @@ Deprecation Notices
 * The mempool functions for single/multi producer/consumer are deprecated and
   will be removed in 16.11.
   It is replaced by rte_mempool_generic_get/put functions.
+
+* The i40e eth_dev_ops about enable and disable promiscuous and all multicast
+  mode are planned to modify the return type from void to int, in order to 
reflect
+  the real status of the hardware driver configure result to APIs users. The 
deprecated ops include,
+  i40evf_dev_promiscuous_enable, i40evf_dev_promiscuous_disable, 
i40evf_dev_allmulticast_enable,
+  i40evf_dev_allmulticast_disable, i40e_dev_promiscuous_enable, 
i40e_dev_promiscuous_disable,
+  i40e_dev_allmulticast_enable, i40e_dev_allmulticast_disable.
-- 
1.9.3

[dpdk-dev] [PATCH] doc: add known issue about promiscuous mode for I40e VF

2016-07-25 Thread Jeff Guo 
When use i40e linux kernel driver as host driver and DPDK handler the i40e VF,
the promiscuous mode doesn't work in i40e VF. It is not supported by DPDK i40e 
VF driver right now.
---
 doc/guides/rel_notes/known_issues.rst | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/doc/guides/rel_notes/known_issues.rst 
b/doc/guides/rel_notes/known_issues.rst
index 5ec1987..e907c22 100644
--- a/doc/guides/rel_notes/known_issues.rst
+++ b/doc/guides/rel_notes/known_issues.rst
@@ -620,3 +620,25 @@ The last EAL argument is replaced by the program name in 
argv[]

 **Driver/Module**:
Environment Abstraction Layer (EAL).
+
+
+I40e VF can't receive the promiscuous unicast/multicast/broadcast packet.
+-
+
+**Description**:
+   Use i40e linux kernel driver PF generate VF, and run testpmd, set 
Promiscuous mode and
+   All multicast mode to be enabled, then send packet with unknown destination 
MAC address
+   to VF, but VF can't receive the packet.
+
+**Implication**:
+   So far, the promiscuous mode is not supported by DPDK i40e VF driver if use 
i40e Linux kernel
+   driver as host driver.
+
+**Resolution/Workaround**:
+   Don't use promiscuous mode in i40e VF if use i40e Linux kernel driver as 
host driver.
+
+**Affected Environment/Platform**:
+   All.
+
+**Driver/Module**:
+   Poll Mode Driver (PMD).
-- 
1.9.3