[dpdk-dev] [PATCH 1/1] mpipe: add missing version map for mpipe pmd driver
Without it, compiling error occurs when CONFIG_RTE_BUILD_SHARED_LIB
is enabled.
Reported-by: Guo Xin
Signed-off-by: Zhigang Lu
---
drivers/net/mpipe/rte_pmd_mpipe_version.map | 3 +++
1 file changed, 3 insertions(+)
create mode 100644 drivers/net/mpipe/rte_pmd_mpipe_version.map
diff --git a/drivers/net/mpipe/rte_pmd_mpipe_version.map
b/drivers/net/mpipe/rte_pmd_mpipe_version.map
new file mode 100644
index 000..ad607bb
--- /dev/null
+++ b/drivers/net/mpipe/rte_pmd_mpipe_version.map
@@ -0,0 +1,3 @@
+DPDK_2.2 {
+ local: *;
+};
--
2.1.2
[dpdk-dev] [PATCH 1/1] config/tile: disable KNI kmod option on tile
Commit 36080ff96b0e causes compiling error on tile, as tile
does not support KNI, so we disable the CONFIG_RTE_KNI_KMOD.
Fixes: 36080ff96b0e ("config: add KNI kmod option")
Reported-by: Guo Xin
Signed-off-by: Zhigang Lu
---
config/defconfig_tile-tilegx-linuxapp-gcc | 1 +
1 file changed, 1 insertion(+)
diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc
b/config/defconfig_tile-tilegx-linuxapp-gcc
index a5d8bd6..9df9d7f 100644
--- a/config/defconfig_tile-tilegx-linuxapp-gcc
+++ b/config/defconfig_tile-tilegx-linuxapp-gcc
@@ -51,6 +51,7 @@ CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n
CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_EAL_VFIO=n
CONFIG_RTE_LIBRTE_KNI=n
+CONFIG_RTE_KNI_KMOD=n
CONFIG_RTE_LIBRTE_XEN_DOM0=n
CONFIG_RTE_LIBRTE_IGB_PMD=n
CONFIG_RTE_LIBRTE_EM_PMD=n
--
2.1.2
[dpdk-dev] [PATCH] bnx2x: fix undeclared PAGE_SIZE build error
This patch fixes a build error caused by undeclared PAGE_SIZE when
compiling for non-X86 arches. On some arches, PAGE_SIZE is not fixed
so that header files do not define it. A better way to get it is
via sysconf(3) or getpagesize(2).
Fixes: 540a211084a7 ("bnx2x: driver core")
== Build drivers/net/bnx2x
CC bnx2x.o
/u/zlu.bjg/git/dpdk.org/drivers/net/bnx2x/bnx2x.c: In function
?bnx2x_set_fp_rx_buf_size?:
/u/zlu.bjg/git/dpdk.org/drivers/net/bnx2x/bnx2x.c:2331: error: ?PAGE_SIZE?
undeclared (first use in this function)
/u/zlu.bjg/git/dpdk.org/drivers/net/bnx2x/bnx2x.c:2331: error: (Each undeclared
identifier is reported only once
/u/zlu.bjg/git/dpdk.org/drivers/net/bnx2x/bnx2x.c:2331: error: for each
function it appears in.)
/u/zlu.bjg/git/dpdk.org/drivers/net/bnx2x/bnx2x.c: In function ?ecore_gunzip?:
/u/zlu.bjg/git/dpdk.org/drivers/net/bnx2x/bnx2x.c:11579: warning: assignment
discards qualifiers from pointer target type
Signed-off-by: Zhigang Lu
---
drivers/net/bnx2x/bnx2x.h| 2 ++
drivers/net/bnx2x/bnx2x_ethdev.h | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h
index b1e36e5..84b4a29 100644
--- a/drivers/net/bnx2x/bnx2x.h
+++ b/drivers/net/bnx2x/bnx2x.h
@@ -144,6 +144,8 @@ struct bnx2x_device_type {
#define RTE_MBUF_DATA_DMA_ADDR(mb) \
((uint64_t)((mb)->buf_physaddr + (mb)->data_off))
+#define PAGE_SIZE (sysconf(_SC_PAGESIZE))
+
#define BNX2X_PAGE_SHIFT 12
#define BNX2X_PAGE_SIZE(1 << BNX2X_PAGE_SHIFT)
#define BNX2X_PAGE_MASK(~(BNX2X_PAGE_SIZE - 1))
diff --git a/drivers/net/bnx2x/bnx2x_ethdev.h b/drivers/net/bnx2x/bnx2x_ethdev.h
index 569bfdf..4f96ef7 100644
--- a/drivers/net/bnx2x/bnx2x_ethdev.h
+++ b/drivers/net/bnx2x/bnx2x_ethdev.h
@@ -9,7 +9,6 @@
#include
#include
-#include
#include
#include
--
2.1.2
[dpdk-dev] [PATCH] tile: add const in prefetch functions
commit 7c5d0cc91579 added const in prefetch functions for
X86 and PPC. This patch does the same for Tile arch.
Fixes: 7c5d0cc91579 ("eal: add const in prefetch functions")
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/include/arch/tile/rte_prefetch.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
b/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
index f02d9fa..c94075c 100644
--- a/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
+++ b/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
@@ -39,17 +39,17 @@ extern "C" {
#include "generic/rte_prefetch.h"
-static inline void rte_prefetch0(volatile void *p)
+static inline void rte_prefetch0(const volatile void *p)
{
__builtin_prefetch((const void *)(uintptr_t)p, 0, 3);
}
-static inline void rte_prefetch1(volatile void *p)
+static inline void rte_prefetch1(const volatile void *p)
{
__builtin_prefetch((const void *)(uintptr_t)p, 0, 2);
}
-static inline void rte_prefetch2(volatile void *p)
+static inline void rte_prefetch2(const volatile void *p)
{
__builtin_prefetch((const void *)(uintptr_t)p, 0, 1);
}
--
2.1.2
[dpdk-dev] [PATCH v5 11/11] maintainers: claim responsibility for TILE-Gx platform
From: Cyril Chemparathy Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5476a73..6ffa01b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -114,6 +114,10 @@ M: Bruce Richardson M: Konstantin Ananyev F: lib/librte_eal/common/include/arch/x86/ +EZchip TILE-Gx +M: Zhigang Lu +F: lib/librte_eal/common/include/arch/tile/ + Linux EAL (with overlaps) M: David Marchand F: lib/librte_eal/linuxapp/Makefile -- 2.1.2
[dpdk-dev] [PATCH v5 10/11] tile: Add TILE-Gx mPIPE poll mode driver.
From: Cyril Chemparathy This commit adds a poll mode driver for the mPIPE hardware present on TILE-Gx SoCs. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc |1 + drivers/net/Makefile |1 + drivers/net/mpipe/Makefile| 46 + drivers/net/mpipe/mpipe_tilegx.c | 1637 + mk/rte.app.mk |1 + 5 files changed, 1686 insertions(+) create mode 100644 drivers/net/mpipe/Makefile create mode 100644 drivers/net/mpipe/mpipe_tilegx.c diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc index 4023878..e603d1b 100644 --- a/config/defconfig_tile-tilegx-linuxapp-gcc +++ b/config/defconfig_tile-tilegx-linuxapp-gcc @@ -66,4 +66,5 @@ CONFIG_RTE_LIBRTE_TABLE=n CONFIG_RTE_LIBRTE_PIPELINE=n # Enable and override things that we need +CONFIG_RTE_LIBRTE_MPIPE_PMD=y CONFIG_RTE_MEMPOOL_ALIGN=128 diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 644cacb..ee77480 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -36,6 +36,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += bonding DIRS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += cxgbe DIRS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000 DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic +DIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += mpipe DIRS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k DIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e DIRS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += ixgbe diff --git a/drivers/net/mpipe/Makefile b/drivers/net/mpipe/Makefile new file mode 100644 index 000..552b303 --- /dev/null +++ b/drivers/net/mpipe/Makefile @@ -0,0 +1,46 @@ +# +# Copyright 2015 EZchip Semiconductor Ltd. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. + +include $(RTE_SDK)/mk/rte.vars.mk + +# library name +LIB = librte_pmd_mpipe.a + +CFLAGS += $(WERROR_FLAGS) -O3 + +EXPORT_MAP := rte_pmd_mpipe_version.map + +LIBABIVER := 1 + +SRCS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += mpipe_tilegx.c + +DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_eal lib/librte_ether +DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_mempool lib/librte_mbuf +DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_net lib/librte_malloc + +include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/net/mpipe/mpipe_tilegx.c b/drivers/net/mpipe/mpipe_tilegx.c new file mode 100644 index 000..e222443 --- /dev/null +++ b/drivers/net/mpipe/mpipe_tilegx.c @@ -0,0 +1,1637 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2015 EZchip Semiconductor Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of EZchip Semiconductor nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRI
[dpdk-dev] [PATCH v5 09/11] tile: initial TILE-Gx support.
From: Cyril Chemparathy This commit adds support for the TILE-Gx platform, as well as the TILE CPU architecture. This architecture port is fairly simple due to its reliance on generics for most arch stuff. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc | 69 .../common/include/arch/tile/rte_atomic.h | 86 .../common/include/arch/tile/rte_byteorder.h | 91 + .../common/include/arch/tile/rte_cpuflags.h| 85 .../common/include/arch/tile/rte_cycles.h | 70 .../common/include/arch/tile/rte_memcpy.h | 93 ++ .../common/include/arch/tile/rte_prefetch.h| 61 ++ .../common/include/arch/tile/rte_rwlock.h | 70 .../common/include/arch/tile/rte_spinlock.h| 92 + mk/arch/tile/rte.vars.mk | 39 + mk/machine/tilegx/rte.vars.mk | 57 + 11 files changed, 813 insertions(+) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc new file mode 100644 index 000..4023878 --- /dev/null +++ b/config/defconfig_tile-tilegx-linuxapp-gcc @@ -0,0 +1,69 @@ +# BSD LICENSE +# +# Copyright (C) EZchip Semiconductor 2015. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of EZchip Semiconductor nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "common_linuxapp" + +CONFIG_RTE_MACHINE="tilegx" + +CONFIG_RTE_ARCH="tile" +CONFIG_RTE_ARCH_TILE=y +CONFIG_RTE_ARCH_64=y +CONFIG_RTE_ARCH_STRICT_ALIGN=y +CONFIG_RTE_FORCE_INTRINSICS=y + +CONFIG_RTE_TOOLCHAIN="gcc" +CONFIG_RTE_TOOLCHAIN_GCC=y + +# Disable things that we don't support or need +CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n +CONFIG_RTE_EAL_IGB_UIO=n +CONFIG_RTE_EAL_VFIO=n +CONFIG_RTE_LIBRTE_KNI=n +CONFIG_RTE_LIBRTE_XEN_DOM0=n +CONFIG_RTE_LIBRTE_IGB_PMD=n +CONFIG_RTE_LIBRTE_EM_PMD=n +CONFIG_RTE_LIBRTE_IXGBE_PMD=n +CONFIG_RTE_LIBRTE_I40E_PMD=n +CONFIG_RTE_LIBRTE_FM10K_PMD=n +CONFIG_RTE_LIBRTE_VIRTIO_PMD=n +CONFIG_RTE_LIBRTE_VMXNET3_PMD=n +CONFIG_RTE_LIBRTE_ENIC_PMD=n + +# This following libraries are not available on the tile architecture. So +# they're turned off. +CONFIG_RTE_LIBRTE_LPM=n +CONFIG_RTE_LIBRTE_ACL=n +CONFIG_RTE_LIBRTE_SCHED=n +CONFIG_RTE_LIBRTE_PORT=n +CONFIG_RTE_LIBRTE_TABLE=n +CONFIG_RTE_LIBRTE_PIPELINE=n + +# Enable and override things that we need +CONFIG_RTE_MEMPOOL_ALIGN=128 diff --git a/lib/librte_eal/common/include/arch/tile/rte_atomic.h b/lib/librte_eal/common/include/arch/tile/rte_atomic.h new file mode 100644 inde
[dpdk-dev] [PATCH v5 08/11] tile: add page sizes for TILE-Gx/Mx platforms
From: Cyril Chemparathy
This patch adds a few new page sizes that are supported on the TILE-Gx
and TILE-Mx platforms.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_memzone.c | 8 +
lib/librte_eal/common/include/rte_memory.h | 16 +
lib/librte_eal/common/include/rte_memzone.h | 50 +++--
3 files changed, 51 insertions(+), 23 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_memzone.c
b/lib/librte_eal/common/eal_common_memzone.c
index 76bae72..dc39a79 100644
--- a/lib/librte_eal/common/eal_common_memzone.c
+++ b/lib/librte_eal/common/eal_common_memzone.c
@@ -284,12 +284,20 @@ rte_memzone_reserve_thread_safe(const char *name, size_t
len,
const struct rte_memzone *mz = NULL;
uint64_t size_mask = 0;
+ if (flags & RTE_MEMZONE_256KB)
+ size_mask |= RTE_PGSIZE_256K;
if (flags & RTE_MEMZONE_2MB)
size_mask |= RTE_PGSIZE_2M;
if (flags & RTE_MEMZONE_16MB)
size_mask |= RTE_PGSIZE_16M;
+ if (flags & RTE_MEMZONE_256MB)
+ size_mask |= RTE_PGSIZE_256M;
+ if (flags & RTE_MEMZONE_512MB)
+ size_mask |= RTE_PGSIZE_512M;
if (flags & RTE_MEMZONE_1GB)
size_mask |= RTE_PGSIZE_1G;
+ if (flags & RTE_MEMZONE_4GB)
+ size_mask |= RTE_PGSIZE_4G;
if (flags & RTE_MEMZONE_16GB)
size_mask |= RTE_PGSIZE_16G;
if (!size_mask)
diff --git a/lib/librte_eal/common/include/rte_memory.h
b/lib/librte_eal/common/include/rte_memory.h
index d948c0b..1bed415 100644
--- a/lib/librte_eal/common/include/rte_memory.h
+++ b/lib/librte_eal/common/include/rte_memory.h
@@ -53,12 +53,16 @@ extern "C" {
#endif
enum rte_page_sizes {
- RTE_PGSIZE_4K = 1ULL << 12,
- RTE_PGSIZE_2M = 1ULL << 21,
- RTE_PGSIZE_1G = 1ULL << 30,
- RTE_PGSIZE_64K = 1ULL << 16,
- RTE_PGSIZE_16M = 1ULL << 24,
- RTE_PGSIZE_16G = 1ULL << 34
+ RTE_PGSIZE_4K= 1ULL << 12,
+ RTE_PGSIZE_64K = 1ULL << 16,
+ RTE_PGSIZE_256K = 1ULL << 18,
+ RTE_PGSIZE_2M= 1ULL << 21,
+ RTE_PGSIZE_16M = 1ULL << 24,
+ RTE_PGSIZE_256M = 1ULL << 28,
+ RTE_PGSIZE_512M = 1ULL << 29,
+ RTE_PGSIZE_1G= 1ULL << 30,
+ RTE_PGSIZE_4G= 1ULL << 32,
+ RTE_PGSIZE_16G = 1ULL << 34,
};
#define SOCKET_ID_ANY -1/**< Any NUMA socket. */
diff --git a/lib/librte_eal/common/include/rte_memzone.h
b/lib/librte_eal/common/include/rte_memzone.h
index ee62680..de5ae55 100644
--- a/lib/librte_eal/common/include/rte_memzone.h
+++ b/lib/librte_eal/common/include/rte_memzone.h
@@ -60,8 +60,12 @@ extern "C" {
#define RTE_MEMZONE_2MB0x0001 /**< Use 2MB pages. */
#define RTE_MEMZONE_1GB0x0002 /**< Use 1GB pages. */
-#define RTE_MEMZONE_16MB0x0100 /**< Use 16MB pages. */
-#define RTE_MEMZONE_16GB0x0200 /**< Use 16GB pages. */
+#define RTE_MEMZONE_16MB 0x0100 /**< Use 16MB pages. */
+#define RTE_MEMZONE_16GB 0x0200 /**< Use 16GB pages. */
+#define RTE_MEMZONE_256KB 0x0001 /**< Use 256KB pages. */
+#define RTE_MEMZONE_256MB 0x0002 /**< Use 256MB pages. */
+#define RTE_MEMZONE_512MB 0x0004 /**< Use 512MB pages. */
+#define RTE_MEMZONE_4GB0x0008 /**< Use 4GB pages. */
#define RTE_MEMZONE_SIZE_HINT_ONLY 0x0004 /**< Use available page size */
/**
@@ -110,11 +114,15 @@ struct rte_memzone {
* constraint for the reserved zone.
* @param flags
* The flags parameter is used to request memzones to be
- * taken from 1GB or 2MB hugepages.
- * - RTE_MEMZONE_2MB - Reserve from 2MB pages
- * - RTE_MEMZONE_1GB - Reserve from 1GB pages
- * - RTE_MEMZONE_16MB - Reserve from 16MB pages
- * - RTE_MEMZONE_16GB - Reserve from 16GB pages
+ * taken from specifically sized hugepages.
+ * - RTE_MEMZONE_2MB - Reserved from 2MB pages
+ * - RTE_MEMZONE_1GB - Reserved from 1GB pages
+ * - RTE_MEMZONE_16MB - Reserved from 16MB pages
+ * - RTE_MEMZONE_16GB - Reserved from 16GB pages
+ * - RTE_MEMZONE_256KB - Reserved from 256KB pages
+ * - RTE_MEMZONE_256MB - Reserved from 256MB pages
+ * - RTE_MEMZONE_512MB - Reserved from 512MB pages
+ * - RTE_MEMZONE_4GB - Reserved from 4GB pages
* - RTE_MEMZONE_SIZE_HINT_ONLY - Allow alternative page size to be used if
* the requested page size is unavailable.
* If this flag is not set, the function
@@ -157,11 +165,15 @@ const struct rte_memzone *rte_memzone_reserve(const char
*name,
* constraint for the reserved zone.
* @param fla
[dpdk-dev] [PATCH v5 07/11] mempool: allow config override on element alignment
From: Cyril Chemparathy
On TILE-Gx and TILE-Mx platforms, the buffers fed into the hardware
buffer manager require a 128-byte alignment. With this change, we
allow configuration based override of the element alignment, and
default to RTE_CACHE_LINE_SIZE if left unspecified.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Zhigang Lu
Acked-by: Bruce Richardson
---
lib/librte_mempool/rte_mempool.c | 16 +---
lib/librte_mempool/rte_mempool.h | 6 ++
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index 02699a1..8e185c5 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -120,10 +120,10 @@ static unsigned optimize_object_size(unsigned obj_size)
nrank = 1;
/* process new object size */
- new_obj_size = (obj_size + RTE_CACHE_LINE_MASK) / RTE_CACHE_LINE_SIZE;
+ new_obj_size = (obj_size + RTE_MEMPOOL_ALIGN_MASK) / RTE_MEMPOOL_ALIGN;
while (get_gcd(new_obj_size, nrank * nchan) != 1)
new_obj_size++;
- return new_obj_size * RTE_CACHE_LINE_SIZE;
+ return new_obj_size * RTE_MEMPOOL_ALIGN;
}
static void
@@ -267,7 +267,7 @@ rte_mempool_calc_obj_size(uint32_t elt_size, uint32_t flags,
#endif
if ((flags & MEMPOOL_F_NO_CACHE_ALIGN) == 0)
sz->header_size = RTE_ALIGN_CEIL(sz->header_size,
- RTE_CACHE_LINE_SIZE);
+ RTE_MEMPOOL_ALIGN);
/* trailer contains the cookie in debug mode */
sz->trailer_size = 0;
@@ -281,9 +281,9 @@ rte_mempool_calc_obj_size(uint32_t elt_size, uint32_t flags,
if ((flags & MEMPOOL_F_NO_CACHE_ALIGN) == 0) {
sz->total_size = sz->header_size + sz->elt_size +
sz->trailer_size;
- sz->trailer_size += ((RTE_CACHE_LINE_SIZE -
- (sz->total_size & RTE_CACHE_LINE_MASK)) &
-RTE_CACHE_LINE_MASK);
+ sz->trailer_size += ((RTE_MEMPOOL_ALIGN -
+ (sz->total_size & RTE_MEMPOOL_ALIGN_MASK)) &
+RTE_MEMPOOL_ALIGN_MASK);
}
/*
@@ -498,7 +498,7 @@ rte_mempool_xmem_create(const char *name, unsigned n,
unsigned elt_size,
* cache-aligned
*/
private_data_size = (private_data_size +
-RTE_CACHE_LINE_MASK) & (~RTE_CACHE_LINE_MASK);
+RTE_MEMPOOL_ALIGN_MASK) &
(~RTE_MEMPOOL_ALIGN_MASK);
if (! rte_eal_has_hugepages()) {
/*
@@ -525,6 +525,7 @@ rte_mempool_xmem_create(const char *name, unsigned n,
unsigned elt_size,
* enough to hold mempool header and metadata plus mempool objects.
*/
mempool_size = MEMPOOL_HEADER_SIZE(mp, pg_num) + private_data_size;
+ mempool_size = RTE_ALIGN_CEIL(mempool_size, RTE_MEMPOOL_ALIGN);
if (vaddr == NULL)
mempool_size += (size_t)objsz.total_size * n;
@@ -580,6 +581,7 @@ rte_mempool_xmem_create(const char *name, unsigned n,
unsigned elt_size,
/* calculate address of the first element for continuous mempool. */
obj = (char *)mp + MEMPOOL_HEADER_SIZE(mp, pg_num) +
private_data_size;
+ obj = RTE_PTR_ALIGN_CEIL(obj, RTE_MEMPOOL_ALIGN);
/* populate address translation fields. */
mp->pg_num = pg_num;
diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
index 6d4ce9a..ee67ce7 100644
--- a/lib/librte_mempool/rte_mempool.h
+++ b/lib/librte_mempool/rte_mempool.h
@@ -142,6 +142,12 @@ struct rte_mempool_objsz {
/** Mempool over one chunk of physically continuous memory */
#defineMEMPOOL_PG_NUM_DEFAULT 1
+#ifndef RTE_MEMPOOL_ALIGN
+#define RTE_MEMPOOL_ALIGN RTE_CACHE_LINE_SIZE
+#endif
+
+#define RTE_MEMPOOL_ALIGN_MASK (RTE_MEMPOOL_ALIGN - 1)
+
/**
* Mempool object header structure
*
--
2.1.2
[dpdk-dev] [PATCH v5 06/11] memzone: allow multiple pagesizes to be requested
From: Cyril Chemparathy
This patch extends the memzone allocator to remove the restriction
that prevented callers from specifying multiple page sizes in the
flags argument.
In doing so, we also sanitize the free segment matching logic to get
rid of architecture specific disjunctions (2MB vs 1GB on x86, and 16MB
vs 16GB on PPC), thereby allowing for a broader range of hugepages on
architectures that support it.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_memzone.c | 58 ++
1 file changed, 27 insertions(+), 31 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_memzone.c
b/lib/librte_eal/common/eal_common_memzone.c
index 1ea502b..76bae72 100644
--- a/lib/librte_eal/common/eal_common_memzone.c
+++ b/lib/librte_eal/common/eal_common_memzone.c
@@ -113,7 +113,8 @@ align_phys_boundary(const struct rte_memseg *ms, size_t
len, size_t align,
static const struct rte_memzone *
memzone_reserve_aligned_thread_unsafe(const char *name, size_t len,
- int socket_id, unsigned flags, unsigned align, unsigned bound)
+ int socket_id, uint64_t size_mask, unsigned align,
+ unsigned bound)
{
struct rte_mem_config *mcfg;
unsigned i = 0;
@@ -201,18 +202,7 @@ memzone_reserve_aligned_thread_unsafe(const char *name,
size_t len,
if ((requested_len + addr_offset) > free_memseg[i].len)
continue;
- /* check flags for hugepage sizes */
- if ((flags & RTE_MEMZONE_2MB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_1G)
- continue;
- if ((flags & RTE_MEMZONE_1GB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_2M)
- continue;
- if ((flags & RTE_MEMZONE_16MB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_16G)
- continue;
- if ((flags & RTE_MEMZONE_16GB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_16M)
+ if ((size_mask & free_memseg[i].hugepage_sz) == 0)
continue;
/* this segment is the best until now */
@@ -244,16 +234,6 @@ memzone_reserve_aligned_thread_unsafe(const char *name,
size_t len,
/* no segment found */
if (memseg_idx == -1) {
- /*
-* If RTE_MEMZONE_SIZE_HINT_ONLY flag is specified,
-* try allocating again without the size parameter otherwise
-fail.
-*/
- if ((flags & RTE_MEMZONE_SIZE_HINT_ONLY) &&
- ((flags & RTE_MEMZONE_1GB) || (flags & RTE_MEMZONE_2MB)
- || (flags & RTE_MEMZONE_16MB) || (flags & RTE_MEMZONE_16GB)))
- return memzone_reserve_aligned_thread_unsafe(name,
- len, socket_id, 0, align, bound);
-
rte_errno = ENOMEM;
return NULL;
}
@@ -302,13 +282,18 @@ rte_memzone_reserve_thread_safe(const char *name, size_t
len,
{
struct rte_mem_config *mcfg;
const struct rte_memzone *mz = NULL;
-
- /* both sizes cannot be explicitly called for */
- if (((flags & RTE_MEMZONE_1GB) && (flags & RTE_MEMZONE_2MB))
- || ((flags & RTE_MEMZONE_16MB) && (flags & RTE_MEMZONE_16GB))) {
- rte_errno = EINVAL;
- return NULL;
- }
+ uint64_t size_mask = 0;
+
+ if (flags & RTE_MEMZONE_2MB)
+ size_mask |= RTE_PGSIZE_2M;
+ if (flags & RTE_MEMZONE_16MB)
+ size_mask |= RTE_PGSIZE_16M;
+ if (flags & RTE_MEMZONE_1GB)
+ size_mask |= RTE_PGSIZE_1G;
+ if (flags & RTE_MEMZONE_16GB)
+ size_mask |= RTE_PGSIZE_16G;
+ if (!size_mask)
+ size_mask = UINT64_MAX;
/* get pointer to global configuration */
mcfg = rte_eal_get_configuration()->mem_config;
@@ -316,7 +301,18 @@ rte_memzone_reserve_thread_safe(const char *name, size_t
len,
rte_rwlock_write_lock(&mcfg->mlock);
mz = memzone_reserve_aligned_thread_unsafe(
- name, len, socket_id, flags, align, bound);
+ name, len, socket_id, size_mask, align, bound);
+
+ /*
+* If we failed to allocate the requested page size, and the
+* RTE_MEMZONE_SIZE_HINT_ONLY flag is specified, try allocating
+* again.
+*/
+ if (!mz && rte_errno == ENOMEM && size_mask != UINT64_MAX &&
+ flags & RTE_MEMZONE_SIZE_HINT_ONLY) {
+ mz = memzone_reserve_aligned_thread_unsafe(
+ name, len, socket_id, UINT64_MAX, align, bound);
+ }
rte_rwlock_write_unlock(&mcfg->mlock);
--
2.1.2
[dpdk-dev] [PATCH v5 05/11] memzone: refactor rte_memzone_reserve() variants
From: Cyril Chemparathy
The definitions of rte_memzone_reserve_aligned() and
rte_memzone_reserve_bounded() were identical with the exception of the
bound argument passed into rte_memzone_reserve_thread_safe().
This patch removes this replication of code by unifying it into
rte_memzone_reserve_thread_safe(), which is then called by all three
variants of rte_memzone_reserve().
Signed-off-by: Cyril Chemparathy
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_memzone.c | 77 +-
1 file changed, 33 insertions(+), 44 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_memzone.c
b/lib/librte_eal/common/eal_common_memzone.c
index aee184a..1ea502b 100644
--- a/lib/librte_eal/common/eal_common_memzone.c
+++ b/lib/librte_eal/common/eal_common_memzone.c
@@ -77,18 +77,6 @@ memzone_lookup_thread_unsafe(const char *name)
}
/*
- * Return a pointer to a correctly filled memzone descriptor. If the
- * allocation cannot be done, return NULL.
- */
-const struct rte_memzone *
-rte_memzone_reserve(const char *name, size_t len, int socket_id,
- unsigned flags)
-{
- return rte_memzone_reserve_aligned(name,
- len, socket_id, flags, RTE_CACHE_LINE_SIZE);
-}
-
-/*
* Helper function for memzone_reserve_aligned_thread_unsafe().
* Calculate address offset from the start of the segment.
* Align offset in that way that it satisfy istart alignmnet and
@@ -307,13 +295,10 @@ memzone_reserve_aligned_thread_unsafe(const char *name,
size_t len,
return mz;
}
-/*
- * Return a pointer to a correctly filled memzone descriptor (with a
- * specified alignment). If the allocation cannot be done, return NULL.
- */
-const struct rte_memzone *
-rte_memzone_reserve_aligned(const char *name, size_t len,
- int socket_id, unsigned flags, unsigned align)
+static const struct rte_memzone *
+rte_memzone_reserve_thread_safe(const char *name, size_t len,
+ int socket_id, unsigned flags, unsigned align,
+ unsigned bound)
{
struct rte_mem_config *mcfg;
const struct rte_memzone *mz = NULL;
@@ -331,7 +316,7 @@ rte_memzone_reserve_aligned(const char *name, size_t len,
rte_rwlock_write_lock(&mcfg->mlock);
mz = memzone_reserve_aligned_thread_unsafe(
- name, len, socket_id, flags, align, 0);
+ name, len, socket_id, flags, align, bound);
rte_rwlock_write_unlock(&mcfg->mlock);
@@ -340,36 +325,40 @@ rte_memzone_reserve_aligned(const char *name, size_t len,
/*
* Return a pointer to a correctly filled memzone descriptor (with a
- * specified alignment and boundary).
- * If the allocation cannot be done, return NULL.
+ * specified alignment and boundary). If the allocation cannot be done,
+ * return NULL.
*/
const struct rte_memzone *
-rte_memzone_reserve_bounded(const char *name, size_t len,
- int socket_id, unsigned flags, unsigned align, unsigned bound)
+rte_memzone_reserve_bounded(const char *name, size_t len, int socket_id,
+ unsigned flags, unsigned align, unsigned bound)
{
- struct rte_mem_config *mcfg;
- const struct rte_memzone *mz = NULL;
-
- /* both sizes cannot be explicitly called for */
- if (((flags & RTE_MEMZONE_1GB) && (flags & RTE_MEMZONE_2MB))
- || ((flags & RTE_MEMZONE_16MB) && (flags & RTE_MEMZONE_16GB))) {
- rte_errno = EINVAL;
- return NULL;
- }
-
- /* get pointer to global configuration */
- mcfg = rte_eal_get_configuration()->mem_config;
-
- rte_rwlock_write_lock(&mcfg->mlock);
-
- mz = memzone_reserve_aligned_thread_unsafe(
- name, len, socket_id, flags, align, bound);
-
- rte_rwlock_write_unlock(&mcfg->mlock);
+ return rte_memzone_reserve_thread_safe(name, len, socket_id, flags,
+ align, bound);
+}
- return mz;
+/*
+ * Return a pointer to a correctly filled memzone descriptor (with a
+ * specified alignment). If the allocation cannot be done, return NULL.
+ */
+const struct rte_memzone *
+rte_memzone_reserve_aligned(const char *name, size_t len, int socket_id,
+ unsigned flags, unsigned align)
+{
+ return rte_memzone_reserve_thread_safe(name, len, socket_id, flags,
+ align, 0);
}
+/*
+ * Return a pointer to a correctly filled memzone descriptor. If the
+ * allocation cannot be done, return NULL.
+ */
+const struct rte_memzone *
+rte_memzone_reserve(const char *name, size_t len, int socket_id,
+ unsigned flags)
+{
+ return rte_memzone_reserve_thread_safe(name, len, socket_id,
+ flags, RTE_CACHE_LINE_SIZE, 0);
+}
/*
* Lookup for the memzone identified by the given name
--
2.1.2
[dpdk-dev] [PATCH v5 04/11] config: remove RTE_LIBNAME definition.
From: Cyril Chemparathy The library name is now being pinned to "dpdk" instead of intel_dpdk, powerpc_dpdk, etc. As a result, we no longer need this config item. This patch removes it. Signed-off-by: Cyril Chemparathy Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --- config/common_bsdapp| 1 - config/common_linuxapp | 1 - config/defconfig_ppc_64-power8-linuxapp-gcc | 2 -- mk/rte.vars.mk | 5 + 4 files changed, 1 insertion(+), 8 deletions(-) diff --git a/config/common_bsdapp b/config/common_bsdapp index dfa61a3..7112f1c 100644 --- a/config/common_bsdapp +++ b/config/common_bsdapp @@ -87,7 +87,6 @@ CONFIG_RTE_BUILD_SHARED_LIB=n # Combine to one single library # CONFIG_RTE_BUILD_COMBINE_LIBS=n -CONFIG_RTE_LIBNAME=intel_dpdk # # Use newest code breaking previous ABI diff --git a/config/common_linuxapp b/config/common_linuxapp index 1732b70..46297cd 100644 --- a/config/common_linuxapp +++ b/config/common_linuxapp @@ -87,7 +87,6 @@ CONFIG_RTE_BUILD_SHARED_LIB=n # Combine to one single library # CONFIG_RTE_BUILD_COMBINE_LIBS=n -CONFIG_RTE_LIBNAME="intel_dpdk" # # Use newest code breaking previous ABI diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc index d97a885..f1af518 100644 --- a/config/defconfig_ppc_64-power8-linuxapp-gcc +++ b/config/defconfig_ppc_64-power8-linuxapp-gcc @@ -39,8 +39,6 @@ CONFIG_RTE_ARCH_64=y CONFIG_RTE_TOOLCHAIN="gcc" CONFIG_RTE_TOOLCHAIN_GCC=y -CONFIG_RTE_LIBNAME="powerpc_dpdk" - # Note: Power doesn't have this support CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n diff --git a/mk/rte.vars.mk b/mk/rte.vars.mk index 0469064..f87cf4b 100644 --- a/mk/rte.vars.mk +++ b/mk/rte.vars.mk @@ -65,10 +65,7 @@ ifneq ($(BUILDING_RTE_SDK),) RTE_SDK_BIN := $(RTE_OUTPUT) endif -RTE_LIBNAME := $(CONFIG_RTE_LIBNAME:"%"=%) -ifeq ($(RTE_LIBNAME),) -RTE_LIBNAME := intel_dpdk -endif +RTE_LIBNAME := dpdk # RTE_TARGET is deducted from config when we are building the SDK. # Else, when building an external app, RTE_TARGET must be specified -- 2.1.2
[dpdk-dev] [PATCH v5 03/11] eal: allow empty compile time flags RTE_COMPILE_TIME_CPUFLAGS
When RTE_COMPILE_TIME_CPUFLAGS is empty, the rte_cpu_check_supported()
code breaks with a "comparison is always false due to limited range of
data type". This is because the compile_time_flags[] array is empty.
Assigning the array dimension to a local variable apparently solves this.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Zhigang Lu
Acked-by: Bruce Richardson
---
lib/librte_eal/common/eal_common_cpuflags.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_cpuflags.c
b/lib/librte_eal/common/eal_common_cpuflags.c
index 6fd360c..8ba7b30 100644
--- a/lib/librte_eal/common/eal_common_cpuflags.c
+++ b/lib/librte_eal/common/eal_common_cpuflags.c
@@ -30,6 +30,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include
#include
/*
@@ -62,10 +63,10 @@ rte_cpu_check_supported(void)
static const enum rte_cpu_flag_t compile_time_flags[] = {
RTE_COMPILE_TIME_CPUFLAGS
};
- unsigned i;
+ unsigned count = RTE_DIM(compile_time_flags), i;
int ret;
- for (i = 0; i <
sizeof(compile_time_flags)/sizeof(compile_time_flags[0]); i++) {
+ for (i = 0; i < count; i++) {
ret = rte_cpu_get_flag_enabled(compile_time_flags[i]);
if (ret < 0) {
--
2.1.2
[dpdk-dev] [PATCH v5 02/11] hash: check SSE flags only on x86 builds
From: Cyril Chemparathy
This is necessary because the required CPU flags may not be defined on
other architectures.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Zhigang Lu
Acked-by: Bruce Richardson
---
lib/librte_hash/rte_hash_crc.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
index abdbd9a..1f6f5bf 100644
--- a/lib/librte_hash/rte_hash_crc.h
+++ b/lib/librte_hash/rte_hash_crc.h
@@ -425,12 +425,14 @@ static inline void
rte_hash_crc_set_alg(uint8_t alg)
{
switch (alg) {
+#if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64)
case CRC32_SSE42_x64:
if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
alg = CRC32_SSE42;
case CRC32_SSE42:
if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2))
alg = CRC32_SW;
+#endif
case CRC32_SW:
crc32_alg = alg;
default:
--
2.1.2
[dpdk-dev] [PATCH v5 01/11] test: limit x86 cpuflags checks to x86 builds
From: Cyril Chemparathy
The original code mistakenly defaulted to X86 when RTE_ARCH_PPC_64 was
left undefined. This did not accomodate other non-PPC/non-X86
architectures. This patch fixes this issue.
Signed-off-by: Cyril Chemparathy
Signed-off-by: Zhigang Lu
Acked-by: Bruce Richardson
---
app/test/test_cpuflags.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c
index 5aeba5d..5b92061 100644
--- a/app/test/test_cpuflags.c
+++ b/app/test/test_cpuflags.c
@@ -113,7 +113,9 @@ test_cpuflags(void)
printf("Check for ICACHE_SNOOP:\t\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);
-#else
+#endif
+
+#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
printf("Check for SSE:\t\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_SSE);
@@ -149,8 +151,6 @@ test_cpuflags(void)
printf("Check for INVTSC:\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_INVTSC);
-
-
#endif
/*
--
2.1.2
[dpdk-dev] [PATCH v5 00/11] Introducing the TILE-Gx platform
This series adds support for the EZchip TILE-Gx family of SoCs. The architecture port in itself is fairly straight forward due to its reliance on generics for the most part. In addition to adding TILE-Gx architecture specific code, this series includes a few cross-platform fixes for DPDK (cpuflags, SSE related, etc.), as well as minor extensions to to accomodate a wider range of hugepage sizes and configurable mempool element alignment boundaries. Changes in this series: v5: Added the Signed-off-by line for Cyril. v4: Added the Acked-by line, removed an already checked-in patch. Also amended commit log for "eal: allow empty compile time flags". v3: Renewed the Signed-off-by line. v2: Removed RTE_LIBNAME per Thomas' feedback. Cyril Chemparathy (10): test: limit x86 cpuflags checks to x86 builds hash: check SSE flags only on x86 builds config: remove RTE_LIBNAME definition. memzone: refactor rte_memzone_reserve() variants memzone: allow multiple pagesizes to be requested mempool: allow config override on element alignment tile: add page sizes for TILE-Gx/Mx platforms tile: initial TILE-Gx support. tile: Add TILE-Gx mPIPE poll mode driver. maintainers: claim responsibility for TILE-Gx platform Zhigang Lu (1): eal: allow empty compile time flags RTE_COMPILE_TIME_CPUFLAGS MAINTAINERS|4 + app/test/test_cpuflags.c |6 +- config/common_bsdapp |1 - config/common_linuxapp |1 - config/defconfig_ppc_64-power8-linuxapp-gcc|2 - config/defconfig_tile-tilegx-linuxapp-gcc | 70 + drivers/net/Makefile |1 + drivers/net/mpipe/Makefile | 46 + drivers/net/mpipe/mpipe_tilegx.c | 1637 lib/librte_eal/common/eal_common_cpuflags.c|5 +- lib/librte_eal/common/eal_common_memzone.c | 141 +- .../common/include/arch/tile/rte_atomic.h | 86 + .../common/include/arch/tile/rte_byteorder.h | 91 ++ .../common/include/arch/tile/rte_cpuflags.h| 85 + .../common/include/arch/tile/rte_cycles.h | 70 + .../common/include/arch/tile/rte_memcpy.h | 93 ++ .../common/include/arch/tile/rte_prefetch.h| 61 + .../common/include/arch/tile/rte_rwlock.h | 70 + .../common/include/arch/tile/rte_spinlock.h| 92 ++ lib/librte_eal/common/include/rte_memory.h | 16 +- lib/librte_eal/common/include/rte_memzone.h| 50 +- lib/librte_hash/rte_hash_crc.h |2 + lib/librte_mempool/rte_mempool.c | 16 +- lib/librte_mempool/rte_mempool.h |6 + mk/arch/tile/rte.vars.mk | 39 + mk/machine/tilegx/rte.vars.mk | 57 + mk/rte.app.mk |1 + mk/rte.vars.mk |5 +- 28 files changed, 2637 insertions(+), 117 deletions(-) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 drivers/net/mpipe/Makefile create mode 100644 drivers/net/mpipe/mpipe_tilegx.c create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk -- 2.1.2
[dpdk-dev] [PATCH v4 11/11] maintainers: claim responsibility for TILE-Gx platform
From: Cyril Chemparathy Signed-off-by: Zhigang Lu --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5476a73..6ffa01b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -114,6 +114,10 @@ M: Bruce Richardson M: Konstantin Ananyev F: lib/librte_eal/common/include/arch/x86/ +EZchip TILE-Gx +M: Zhigang Lu +F: lib/librte_eal/common/include/arch/tile/ + Linux EAL (with overlaps) M: David Marchand F: lib/librte_eal/linuxapp/Makefile -- 2.1.2
[dpdk-dev] [PATCH v4 10/11] tile: Add TILE-Gx mPIPE poll mode driver.
From: Cyril Chemparathy This commit adds a poll mode driver for the mPIPE hardware present on TILE-Gx SoCs. Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc |1 + drivers/net/Makefile |1 + drivers/net/mpipe/Makefile| 46 + drivers/net/mpipe/mpipe_tilegx.c | 1637 + mk/rte.app.mk |1 + 5 files changed, 1686 insertions(+) create mode 100644 drivers/net/mpipe/Makefile create mode 100644 drivers/net/mpipe/mpipe_tilegx.c diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc index 4023878..e603d1b 100644 --- a/config/defconfig_tile-tilegx-linuxapp-gcc +++ b/config/defconfig_tile-tilegx-linuxapp-gcc @@ -66,4 +66,5 @@ CONFIG_RTE_LIBRTE_TABLE=n CONFIG_RTE_LIBRTE_PIPELINE=n # Enable and override things that we need +CONFIG_RTE_LIBRTE_MPIPE_PMD=y CONFIG_RTE_MEMPOOL_ALIGN=128 diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 644cacb..ee77480 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -36,6 +36,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += bonding DIRS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += cxgbe DIRS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000 DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic +DIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += mpipe DIRS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k DIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e DIRS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += ixgbe diff --git a/drivers/net/mpipe/Makefile b/drivers/net/mpipe/Makefile new file mode 100644 index 000..552b303 --- /dev/null +++ b/drivers/net/mpipe/Makefile @@ -0,0 +1,46 @@ +# +# Copyright 2015 EZchip Semiconductor Ltd. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. + +include $(RTE_SDK)/mk/rte.vars.mk + +# library name +LIB = librte_pmd_mpipe.a + +CFLAGS += $(WERROR_FLAGS) -O3 + +EXPORT_MAP := rte_pmd_mpipe_version.map + +LIBABIVER := 1 + +SRCS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += mpipe_tilegx.c + +DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_eal lib/librte_ether +DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_mempool lib/librte_mbuf +DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_net lib/librte_malloc + +include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/net/mpipe/mpipe_tilegx.c b/drivers/net/mpipe/mpipe_tilegx.c new file mode 100644 index 000..e222443 --- /dev/null +++ b/drivers/net/mpipe/mpipe_tilegx.c @@ -0,0 +1,1637 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2015 EZchip Semiconductor Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of EZchip Semiconductor nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
[dpdk-dev] [PATCH v4 09/11] tile: initial TILE-Gx support.
From: Cyril Chemparathy This commit adds support for the TILE-Gx platform, as well as the TILE CPU architecture. This architecture port is fairly simple due to its reliance on generics for most arch stuff. Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc | 69 .../common/include/arch/tile/rte_atomic.h | 86 .../common/include/arch/tile/rte_byteorder.h | 91 + .../common/include/arch/tile/rte_cpuflags.h| 85 .../common/include/arch/tile/rte_cycles.h | 70 .../common/include/arch/tile/rte_memcpy.h | 93 ++ .../common/include/arch/tile/rte_prefetch.h| 61 ++ .../common/include/arch/tile/rte_rwlock.h | 70 .../common/include/arch/tile/rte_spinlock.h| 92 + mk/arch/tile/rte.vars.mk | 39 + mk/machine/tilegx/rte.vars.mk | 57 + 11 files changed, 813 insertions(+) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc new file mode 100644 index 000..4023878 --- /dev/null +++ b/config/defconfig_tile-tilegx-linuxapp-gcc @@ -0,0 +1,69 @@ +# BSD LICENSE +# +# Copyright (C) EZchip Semiconductor 2015. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of EZchip Semiconductor nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "common_linuxapp" + +CONFIG_RTE_MACHINE="tilegx" + +CONFIG_RTE_ARCH="tile" +CONFIG_RTE_ARCH_TILE=y +CONFIG_RTE_ARCH_64=y +CONFIG_RTE_ARCH_STRICT_ALIGN=y +CONFIG_RTE_FORCE_INTRINSICS=y + +CONFIG_RTE_TOOLCHAIN="gcc" +CONFIG_RTE_TOOLCHAIN_GCC=y + +# Disable things that we don't support or need +CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n +CONFIG_RTE_EAL_IGB_UIO=n +CONFIG_RTE_EAL_VFIO=n +CONFIG_RTE_LIBRTE_KNI=n +CONFIG_RTE_LIBRTE_XEN_DOM0=n +CONFIG_RTE_LIBRTE_IGB_PMD=n +CONFIG_RTE_LIBRTE_EM_PMD=n +CONFIG_RTE_LIBRTE_IXGBE_PMD=n +CONFIG_RTE_LIBRTE_I40E_PMD=n +CONFIG_RTE_LIBRTE_FM10K_PMD=n +CONFIG_RTE_LIBRTE_VIRTIO_PMD=n +CONFIG_RTE_LIBRTE_VMXNET3_PMD=n +CONFIG_RTE_LIBRTE_ENIC_PMD=n + +# This following libraries are not available on the tile architecture. So +# they're turned off. +CONFIG_RTE_LIBRTE_LPM=n +CONFIG_RTE_LIBRTE_ACL=n +CONFIG_RTE_LIBRTE_SCHED=n +CONFIG_RTE_LIBRTE_PORT=n +CONFIG_RTE_LIBRTE_TABLE=n +CONFIG_RTE_LIBRTE_PIPELINE=n + +# Enable and override things that we need +CONFIG_RTE_MEMPOOL_ALIGN=128 diff --git a/lib/librte_eal/common/include/arch/tile/rte_atomic.h b/lib/librte_eal/common/include/arch/tile/rte_atomic.h new file mode 100644 index 000..3dc8eb8 --- /dev/nul
[dpdk-dev] [PATCH v4 08/11] tile: add page sizes for TILE-Gx/Mx platforms
From: Cyril Chemparathy
This patch adds a few new page sizes that are supported on the TILE-Gx
and TILE-Mx platforms.
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_memzone.c | 8 +
lib/librte_eal/common/include/rte_memory.h | 16 +
lib/librte_eal/common/include/rte_memzone.h | 50 +++--
3 files changed, 51 insertions(+), 23 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_memzone.c
b/lib/librte_eal/common/eal_common_memzone.c
index 76bae72..dc39a79 100644
--- a/lib/librte_eal/common/eal_common_memzone.c
+++ b/lib/librte_eal/common/eal_common_memzone.c
@@ -284,12 +284,20 @@ rte_memzone_reserve_thread_safe(const char *name, size_t
len,
const struct rte_memzone *mz = NULL;
uint64_t size_mask = 0;
+ if (flags & RTE_MEMZONE_256KB)
+ size_mask |= RTE_PGSIZE_256K;
if (flags & RTE_MEMZONE_2MB)
size_mask |= RTE_PGSIZE_2M;
if (flags & RTE_MEMZONE_16MB)
size_mask |= RTE_PGSIZE_16M;
+ if (flags & RTE_MEMZONE_256MB)
+ size_mask |= RTE_PGSIZE_256M;
+ if (flags & RTE_MEMZONE_512MB)
+ size_mask |= RTE_PGSIZE_512M;
if (flags & RTE_MEMZONE_1GB)
size_mask |= RTE_PGSIZE_1G;
+ if (flags & RTE_MEMZONE_4GB)
+ size_mask |= RTE_PGSIZE_4G;
if (flags & RTE_MEMZONE_16GB)
size_mask |= RTE_PGSIZE_16G;
if (!size_mask)
diff --git a/lib/librte_eal/common/include/rte_memory.h
b/lib/librte_eal/common/include/rte_memory.h
index d948c0b..1bed415 100644
--- a/lib/librte_eal/common/include/rte_memory.h
+++ b/lib/librte_eal/common/include/rte_memory.h
@@ -53,12 +53,16 @@ extern "C" {
#endif
enum rte_page_sizes {
- RTE_PGSIZE_4K = 1ULL << 12,
- RTE_PGSIZE_2M = 1ULL << 21,
- RTE_PGSIZE_1G = 1ULL << 30,
- RTE_PGSIZE_64K = 1ULL << 16,
- RTE_PGSIZE_16M = 1ULL << 24,
- RTE_PGSIZE_16G = 1ULL << 34
+ RTE_PGSIZE_4K= 1ULL << 12,
+ RTE_PGSIZE_64K = 1ULL << 16,
+ RTE_PGSIZE_256K = 1ULL << 18,
+ RTE_PGSIZE_2M= 1ULL << 21,
+ RTE_PGSIZE_16M = 1ULL << 24,
+ RTE_PGSIZE_256M = 1ULL << 28,
+ RTE_PGSIZE_512M = 1ULL << 29,
+ RTE_PGSIZE_1G= 1ULL << 30,
+ RTE_PGSIZE_4G= 1ULL << 32,
+ RTE_PGSIZE_16G = 1ULL << 34,
};
#define SOCKET_ID_ANY -1/**< Any NUMA socket. */
diff --git a/lib/librte_eal/common/include/rte_memzone.h
b/lib/librte_eal/common/include/rte_memzone.h
index ee62680..de5ae55 100644
--- a/lib/librte_eal/common/include/rte_memzone.h
+++ b/lib/librte_eal/common/include/rte_memzone.h
@@ -60,8 +60,12 @@ extern "C" {
#define RTE_MEMZONE_2MB0x0001 /**< Use 2MB pages. */
#define RTE_MEMZONE_1GB0x0002 /**< Use 1GB pages. */
-#define RTE_MEMZONE_16MB0x0100 /**< Use 16MB pages. */
-#define RTE_MEMZONE_16GB0x0200 /**< Use 16GB pages. */
+#define RTE_MEMZONE_16MB 0x0100 /**< Use 16MB pages. */
+#define RTE_MEMZONE_16GB 0x0200 /**< Use 16GB pages. */
+#define RTE_MEMZONE_256KB 0x0001 /**< Use 256KB pages. */
+#define RTE_MEMZONE_256MB 0x0002 /**< Use 256MB pages. */
+#define RTE_MEMZONE_512MB 0x0004 /**< Use 512MB pages. */
+#define RTE_MEMZONE_4GB0x0008 /**< Use 4GB pages. */
#define RTE_MEMZONE_SIZE_HINT_ONLY 0x0004 /**< Use available page size */
/**
@@ -110,11 +114,15 @@ struct rte_memzone {
* constraint for the reserved zone.
* @param flags
* The flags parameter is used to request memzones to be
- * taken from 1GB or 2MB hugepages.
- * - RTE_MEMZONE_2MB - Reserve from 2MB pages
- * - RTE_MEMZONE_1GB - Reserve from 1GB pages
- * - RTE_MEMZONE_16MB - Reserve from 16MB pages
- * - RTE_MEMZONE_16GB - Reserve from 16GB pages
+ * taken from specifically sized hugepages.
+ * - RTE_MEMZONE_2MB - Reserved from 2MB pages
+ * - RTE_MEMZONE_1GB - Reserved from 1GB pages
+ * - RTE_MEMZONE_16MB - Reserved from 16MB pages
+ * - RTE_MEMZONE_16GB - Reserved from 16GB pages
+ * - RTE_MEMZONE_256KB - Reserved from 256KB pages
+ * - RTE_MEMZONE_256MB - Reserved from 256MB pages
+ * - RTE_MEMZONE_512MB - Reserved from 512MB pages
+ * - RTE_MEMZONE_4GB - Reserved from 4GB pages
* - RTE_MEMZONE_SIZE_HINT_ONLY - Allow alternative page size to be used if
* the requested page size is unavailable.
* If this flag is not set, the function
@@ -157,11 +165,15 @@ const struct rte_memzone *rte_memzone_reserve(const char
*name,
* constraint for the reserved zone.
* @param flags
* The fl
[dpdk-dev] [PATCH v4 07/11] mempool: allow config override on element alignment
From: Cyril Chemparathy
On TILE-Gx and TILE-Mx platforms, the buffers fed into the hardware
buffer manager require a 128-byte alignment. With this change, we
allow configuration based override of the element alignment, and
default to RTE_CACHE_LINE_SIZE if left unspecified.
Signed-off-by: Zhigang Lu
Acked-by: Bruce Richardson
---
lib/librte_mempool/rte_mempool.c | 16 +---
lib/librte_mempool/rte_mempool.h | 6 ++
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index 02699a1..8e185c5 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -120,10 +120,10 @@ static unsigned optimize_object_size(unsigned obj_size)
nrank = 1;
/* process new object size */
- new_obj_size = (obj_size + RTE_CACHE_LINE_MASK) / RTE_CACHE_LINE_SIZE;
+ new_obj_size = (obj_size + RTE_MEMPOOL_ALIGN_MASK) / RTE_MEMPOOL_ALIGN;
while (get_gcd(new_obj_size, nrank * nchan) != 1)
new_obj_size++;
- return new_obj_size * RTE_CACHE_LINE_SIZE;
+ return new_obj_size * RTE_MEMPOOL_ALIGN;
}
static void
@@ -267,7 +267,7 @@ rte_mempool_calc_obj_size(uint32_t elt_size, uint32_t flags,
#endif
if ((flags & MEMPOOL_F_NO_CACHE_ALIGN) == 0)
sz->header_size = RTE_ALIGN_CEIL(sz->header_size,
- RTE_CACHE_LINE_SIZE);
+ RTE_MEMPOOL_ALIGN);
/* trailer contains the cookie in debug mode */
sz->trailer_size = 0;
@@ -281,9 +281,9 @@ rte_mempool_calc_obj_size(uint32_t elt_size, uint32_t flags,
if ((flags & MEMPOOL_F_NO_CACHE_ALIGN) == 0) {
sz->total_size = sz->header_size + sz->elt_size +
sz->trailer_size;
- sz->trailer_size += ((RTE_CACHE_LINE_SIZE -
- (sz->total_size & RTE_CACHE_LINE_MASK)) &
-RTE_CACHE_LINE_MASK);
+ sz->trailer_size += ((RTE_MEMPOOL_ALIGN -
+ (sz->total_size & RTE_MEMPOOL_ALIGN_MASK)) &
+RTE_MEMPOOL_ALIGN_MASK);
}
/*
@@ -498,7 +498,7 @@ rte_mempool_xmem_create(const char *name, unsigned n,
unsigned elt_size,
* cache-aligned
*/
private_data_size = (private_data_size +
-RTE_CACHE_LINE_MASK) & (~RTE_CACHE_LINE_MASK);
+RTE_MEMPOOL_ALIGN_MASK) &
(~RTE_MEMPOOL_ALIGN_MASK);
if (! rte_eal_has_hugepages()) {
/*
@@ -525,6 +525,7 @@ rte_mempool_xmem_create(const char *name, unsigned n,
unsigned elt_size,
* enough to hold mempool header and metadata plus mempool objects.
*/
mempool_size = MEMPOOL_HEADER_SIZE(mp, pg_num) + private_data_size;
+ mempool_size = RTE_ALIGN_CEIL(mempool_size, RTE_MEMPOOL_ALIGN);
if (vaddr == NULL)
mempool_size += (size_t)objsz.total_size * n;
@@ -580,6 +581,7 @@ rte_mempool_xmem_create(const char *name, unsigned n,
unsigned elt_size,
/* calculate address of the first element for continuous mempool. */
obj = (char *)mp + MEMPOOL_HEADER_SIZE(mp, pg_num) +
private_data_size;
+ obj = RTE_PTR_ALIGN_CEIL(obj, RTE_MEMPOOL_ALIGN);
/* populate address translation fields. */
mp->pg_num = pg_num;
diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
index 6d4ce9a..ee67ce7 100644
--- a/lib/librte_mempool/rte_mempool.h
+++ b/lib/librte_mempool/rte_mempool.h
@@ -142,6 +142,12 @@ struct rte_mempool_objsz {
/** Mempool over one chunk of physically continuous memory */
#defineMEMPOOL_PG_NUM_DEFAULT 1
+#ifndef RTE_MEMPOOL_ALIGN
+#define RTE_MEMPOOL_ALIGN RTE_CACHE_LINE_SIZE
+#endif
+
+#define RTE_MEMPOOL_ALIGN_MASK (RTE_MEMPOOL_ALIGN - 1)
+
/**
* Mempool object header structure
*
--
2.1.2
[dpdk-dev] [PATCH v4 06/11] memzone: allow multiple pagesizes to be requested
From: Cyril Chemparathy
This patch extends the memzone allocator to remove the restriction
that prevented callers from specifying multiple page sizes in the
flags argument.
In doing so, we also sanitize the free segment matching logic to get
rid of architecture specific disjunctions (2MB vs 1GB on x86, and 16MB
vs 16GB on PPC), thereby allowing for a broader range of hugepages on
architectures that support it.
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_memzone.c | 58 ++
1 file changed, 27 insertions(+), 31 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_memzone.c
b/lib/librte_eal/common/eal_common_memzone.c
index 1ea502b..76bae72 100644
--- a/lib/librte_eal/common/eal_common_memzone.c
+++ b/lib/librte_eal/common/eal_common_memzone.c
@@ -113,7 +113,8 @@ align_phys_boundary(const struct rte_memseg *ms, size_t
len, size_t align,
static const struct rte_memzone *
memzone_reserve_aligned_thread_unsafe(const char *name, size_t len,
- int socket_id, unsigned flags, unsigned align, unsigned bound)
+ int socket_id, uint64_t size_mask, unsigned align,
+ unsigned bound)
{
struct rte_mem_config *mcfg;
unsigned i = 0;
@@ -201,18 +202,7 @@ memzone_reserve_aligned_thread_unsafe(const char *name,
size_t len,
if ((requested_len + addr_offset) > free_memseg[i].len)
continue;
- /* check flags for hugepage sizes */
- if ((flags & RTE_MEMZONE_2MB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_1G)
- continue;
- if ((flags & RTE_MEMZONE_1GB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_2M)
- continue;
- if ((flags & RTE_MEMZONE_16MB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_16G)
- continue;
- if ((flags & RTE_MEMZONE_16GB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_16M)
+ if ((size_mask & free_memseg[i].hugepage_sz) == 0)
continue;
/* this segment is the best until now */
@@ -244,16 +234,6 @@ memzone_reserve_aligned_thread_unsafe(const char *name,
size_t len,
/* no segment found */
if (memseg_idx == -1) {
- /*
-* If RTE_MEMZONE_SIZE_HINT_ONLY flag is specified,
-* try allocating again without the size parameter otherwise
-fail.
-*/
- if ((flags & RTE_MEMZONE_SIZE_HINT_ONLY) &&
- ((flags & RTE_MEMZONE_1GB) || (flags & RTE_MEMZONE_2MB)
- || (flags & RTE_MEMZONE_16MB) || (flags & RTE_MEMZONE_16GB)))
- return memzone_reserve_aligned_thread_unsafe(name,
- len, socket_id, 0, align, bound);
-
rte_errno = ENOMEM;
return NULL;
}
@@ -302,13 +282,18 @@ rte_memzone_reserve_thread_safe(const char *name, size_t
len,
{
struct rte_mem_config *mcfg;
const struct rte_memzone *mz = NULL;
-
- /* both sizes cannot be explicitly called for */
- if (((flags & RTE_MEMZONE_1GB) && (flags & RTE_MEMZONE_2MB))
- || ((flags & RTE_MEMZONE_16MB) && (flags & RTE_MEMZONE_16GB))) {
- rte_errno = EINVAL;
- return NULL;
- }
+ uint64_t size_mask = 0;
+
+ if (flags & RTE_MEMZONE_2MB)
+ size_mask |= RTE_PGSIZE_2M;
+ if (flags & RTE_MEMZONE_16MB)
+ size_mask |= RTE_PGSIZE_16M;
+ if (flags & RTE_MEMZONE_1GB)
+ size_mask |= RTE_PGSIZE_1G;
+ if (flags & RTE_MEMZONE_16GB)
+ size_mask |= RTE_PGSIZE_16G;
+ if (!size_mask)
+ size_mask = UINT64_MAX;
/* get pointer to global configuration */
mcfg = rte_eal_get_configuration()->mem_config;
@@ -316,7 +301,18 @@ rte_memzone_reserve_thread_safe(const char *name, size_t
len,
rte_rwlock_write_lock(&mcfg->mlock);
mz = memzone_reserve_aligned_thread_unsafe(
- name, len, socket_id, flags, align, bound);
+ name, len, socket_id, size_mask, align, bound);
+
+ /*
+* If we failed to allocate the requested page size, and the
+* RTE_MEMZONE_SIZE_HINT_ONLY flag is specified, try allocating
+* again.
+*/
+ if (!mz && rte_errno == ENOMEM && size_mask != UINT64_MAX &&
+ flags & RTE_MEMZONE_SIZE_HINT_ONLY) {
+ mz = memzone_reserve_aligned_thread_unsafe(
+ name, len, socket_id, UINT64_MAX, align, bound);
+ }
rte_rwlock_write_unlock(&mcfg->mlock);
--
2.1.2
[dpdk-dev] [PATCH v4 05/11] memzone: refactor rte_memzone_reserve() variants
From: Cyril Chemparathy
The definitions of rte_memzone_reserve_aligned() and
rte_memzone_reserve_bounded() were identical with the exception of the
bound argument passed into rte_memzone_reserve_thread_safe().
This patch removes this replication of code by unifying it into
rte_memzone_reserve_thread_safe(), which is then called by all three
variants of rte_memzone_reserve().
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_memzone.c | 77 +-
1 file changed, 33 insertions(+), 44 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_memzone.c
b/lib/librte_eal/common/eal_common_memzone.c
index aee184a..1ea502b 100644
--- a/lib/librte_eal/common/eal_common_memzone.c
+++ b/lib/librte_eal/common/eal_common_memzone.c
@@ -77,18 +77,6 @@ memzone_lookup_thread_unsafe(const char *name)
}
/*
- * Return a pointer to a correctly filled memzone descriptor. If the
- * allocation cannot be done, return NULL.
- */
-const struct rte_memzone *
-rte_memzone_reserve(const char *name, size_t len, int socket_id,
- unsigned flags)
-{
- return rte_memzone_reserve_aligned(name,
- len, socket_id, flags, RTE_CACHE_LINE_SIZE);
-}
-
-/*
* Helper function for memzone_reserve_aligned_thread_unsafe().
* Calculate address offset from the start of the segment.
* Align offset in that way that it satisfy istart alignmnet and
@@ -307,13 +295,10 @@ memzone_reserve_aligned_thread_unsafe(const char *name,
size_t len,
return mz;
}
-/*
- * Return a pointer to a correctly filled memzone descriptor (with a
- * specified alignment). If the allocation cannot be done, return NULL.
- */
-const struct rte_memzone *
-rte_memzone_reserve_aligned(const char *name, size_t len,
- int socket_id, unsigned flags, unsigned align)
+static const struct rte_memzone *
+rte_memzone_reserve_thread_safe(const char *name, size_t len,
+ int socket_id, unsigned flags, unsigned align,
+ unsigned bound)
{
struct rte_mem_config *mcfg;
const struct rte_memzone *mz = NULL;
@@ -331,7 +316,7 @@ rte_memzone_reserve_aligned(const char *name, size_t len,
rte_rwlock_write_lock(&mcfg->mlock);
mz = memzone_reserve_aligned_thread_unsafe(
- name, len, socket_id, flags, align, 0);
+ name, len, socket_id, flags, align, bound);
rte_rwlock_write_unlock(&mcfg->mlock);
@@ -340,36 +325,40 @@ rte_memzone_reserve_aligned(const char *name, size_t len,
/*
* Return a pointer to a correctly filled memzone descriptor (with a
- * specified alignment and boundary).
- * If the allocation cannot be done, return NULL.
+ * specified alignment and boundary). If the allocation cannot be done,
+ * return NULL.
*/
const struct rte_memzone *
-rte_memzone_reserve_bounded(const char *name, size_t len,
- int socket_id, unsigned flags, unsigned align, unsigned bound)
+rte_memzone_reserve_bounded(const char *name, size_t len, int socket_id,
+ unsigned flags, unsigned align, unsigned bound)
{
- struct rte_mem_config *mcfg;
- const struct rte_memzone *mz = NULL;
-
- /* both sizes cannot be explicitly called for */
- if (((flags & RTE_MEMZONE_1GB) && (flags & RTE_MEMZONE_2MB))
- || ((flags & RTE_MEMZONE_16MB) && (flags & RTE_MEMZONE_16GB))) {
- rte_errno = EINVAL;
- return NULL;
- }
-
- /* get pointer to global configuration */
- mcfg = rte_eal_get_configuration()->mem_config;
-
- rte_rwlock_write_lock(&mcfg->mlock);
-
- mz = memzone_reserve_aligned_thread_unsafe(
- name, len, socket_id, flags, align, bound);
-
- rte_rwlock_write_unlock(&mcfg->mlock);
+ return rte_memzone_reserve_thread_safe(name, len, socket_id, flags,
+ align, bound);
+}
- return mz;
+/*
+ * Return a pointer to a correctly filled memzone descriptor (with a
+ * specified alignment). If the allocation cannot be done, return NULL.
+ */
+const struct rte_memzone *
+rte_memzone_reserve_aligned(const char *name, size_t len, int socket_id,
+ unsigned flags, unsigned align)
+{
+ return rte_memzone_reserve_thread_safe(name, len, socket_id, flags,
+ align, 0);
}
+/*
+ * Return a pointer to a correctly filled memzone descriptor. If the
+ * allocation cannot be done, return NULL.
+ */
+const struct rte_memzone *
+rte_memzone_reserve(const char *name, size_t len, int socket_id,
+ unsigned flags)
+{
+ return rte_memzone_reserve_thread_safe(name, len, socket_id,
+ flags, RTE_CACHE_LINE_SIZE, 0);
+}
/*
* Lookup for the memzone identified by the given name
--
2.1.2
[dpdk-dev] [PATCH v4 04/11] config: remove RTE_LIBNAME definition.
From: Cyril Chemparathy The library name is now being pinned to "dpdk" instead of intel_dpdk, powerpc_dpdk, etc. As a result, we no longer need this config item. This patch removes it. Signed-off-by: Zhigang Lu Acked-by: Bruce Richardson --- config/common_bsdapp| 1 - config/common_linuxapp | 1 - config/defconfig_ppc_64-power8-linuxapp-gcc | 2 -- mk/rte.vars.mk | 5 + 4 files changed, 1 insertion(+), 8 deletions(-) diff --git a/config/common_bsdapp b/config/common_bsdapp index dfa61a3..7112f1c 100644 --- a/config/common_bsdapp +++ b/config/common_bsdapp @@ -87,7 +87,6 @@ CONFIG_RTE_BUILD_SHARED_LIB=n # Combine to one single library # CONFIG_RTE_BUILD_COMBINE_LIBS=n -CONFIG_RTE_LIBNAME=intel_dpdk # # Use newest code breaking previous ABI diff --git a/config/common_linuxapp b/config/common_linuxapp index 1732b70..46297cd 100644 --- a/config/common_linuxapp +++ b/config/common_linuxapp @@ -87,7 +87,6 @@ CONFIG_RTE_BUILD_SHARED_LIB=n # Combine to one single library # CONFIG_RTE_BUILD_COMBINE_LIBS=n -CONFIG_RTE_LIBNAME="intel_dpdk" # # Use newest code breaking previous ABI diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc index d97a885..f1af518 100644 --- a/config/defconfig_ppc_64-power8-linuxapp-gcc +++ b/config/defconfig_ppc_64-power8-linuxapp-gcc @@ -39,8 +39,6 @@ CONFIG_RTE_ARCH_64=y CONFIG_RTE_TOOLCHAIN="gcc" CONFIG_RTE_TOOLCHAIN_GCC=y -CONFIG_RTE_LIBNAME="powerpc_dpdk" - # Note: Power doesn't have this support CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n diff --git a/mk/rte.vars.mk b/mk/rte.vars.mk index 0469064..f87cf4b 100644 --- a/mk/rte.vars.mk +++ b/mk/rte.vars.mk @@ -65,10 +65,7 @@ ifneq ($(BUILDING_RTE_SDK),) RTE_SDK_BIN := $(RTE_OUTPUT) endif -RTE_LIBNAME := $(CONFIG_RTE_LIBNAME:"%"=%) -ifeq ($(RTE_LIBNAME),) -RTE_LIBNAME := intel_dpdk -endif +RTE_LIBNAME := dpdk # RTE_TARGET is deducted from config when we are building the SDK. # Else, when building an external app, RTE_TARGET must be specified -- 2.1.2
[dpdk-dev] [PATCH v4 03/11] eal: allow empty compile time flags RTE_COMPILE_TIME_CPUFLAGS
When RTE_COMPILE_TIME_CPUFLAGS is empty, the rte_cpu_check_supported()
code breaks with a "comparison is always false due to limited range of
data type". This is because the compile_time_flags[] array is empty.
Assigning the array dimension to a local variable apparently solves this.
Signed-off-by: Zhigang Lu
Acked-by: Bruce Richardson
---
lib/librte_eal/common/eal_common_cpuflags.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_cpuflags.c
b/lib/librte_eal/common/eal_common_cpuflags.c
index 6fd360c..8ba7b30 100644
--- a/lib/librte_eal/common/eal_common_cpuflags.c
+++ b/lib/librte_eal/common/eal_common_cpuflags.c
@@ -30,6 +30,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include
#include
/*
@@ -62,10 +63,10 @@ rte_cpu_check_supported(void)
static const enum rte_cpu_flag_t compile_time_flags[] = {
RTE_COMPILE_TIME_CPUFLAGS
};
- unsigned i;
+ unsigned count = RTE_DIM(compile_time_flags), i;
int ret;
- for (i = 0; i <
sizeof(compile_time_flags)/sizeof(compile_time_flags[0]); i++) {
+ for (i = 0; i < count; i++) {
ret = rte_cpu_get_flag_enabled(compile_time_flags[i]);
if (ret < 0) {
--
2.1.2
[dpdk-dev] [PATCH v4 02/11] hash: check SSE flags only on x86 builds
From: Cyril Chemparathy
This is necessary because the required CPU flags may not be defined on
other architectures.
Signed-off-by: Zhigang Lu
Acked-by: Bruce Richardson
---
lib/librte_hash/rte_hash_crc.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
index abdbd9a..1f6f5bf 100644
--- a/lib/librte_hash/rte_hash_crc.h
+++ b/lib/librte_hash/rte_hash_crc.h
@@ -425,12 +425,14 @@ static inline void
rte_hash_crc_set_alg(uint8_t alg)
{
switch (alg) {
+#if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64)
case CRC32_SSE42_x64:
if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
alg = CRC32_SSE42;
case CRC32_SSE42:
if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2))
alg = CRC32_SW;
+#endif
case CRC32_SW:
crc32_alg = alg;
default:
--
2.1.2
[dpdk-dev] [PATCH v4 01/11] test: limit x86 cpuflags checks to x86 builds
From: Cyril Chemparathy
The original code mistakenly defaulted to X86 when RTE_ARCH_PPC_64 was
left undefined. This did not accomodate other non-PPC/non-X86
architectures. This patch fixes this issue.
Signed-off-by: Zhigang Lu
Acked-by: Bruce Richardson
---
app/test/test_cpuflags.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c
index 5aeba5d..5b92061 100644
--- a/app/test/test_cpuflags.c
+++ b/app/test/test_cpuflags.c
@@ -113,7 +113,9 @@ test_cpuflags(void)
printf("Check for ICACHE_SNOOP:\t\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);
-#else
+#endif
+
+#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
printf("Check for SSE:\t\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_SSE);
@@ -149,8 +151,6 @@ test_cpuflags(void)
printf("Check for INVTSC:\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_INVTSC);
-
-
#endif
/*
--
2.1.2
[dpdk-dev] [PATCH v4 00/11] Introducing the TILE-Gx platform
This series adds support for the EZchip TILE-Gx family of SoCs. The architecture port in itself is fairly straight forward due to its reliance on generics for the most part. In addition to adding TILE-Gx architecture specific code, this series includes a few cross-platform fixes for DPDK (cpuflags, SSE related, etc.), as well as minor extensions to to accomodate a wider range of hugepage sizes and configurable mempool element alignment boundaries. Changes in this series: v4: Added the Acked-by line, removed an already checked-in patch. Also amended commit log for "eal: allow empty compile time flags". v3: Renewed the Signed-off-by line. v2: Removed RTE_LIBNAME per Thomas' feedback. Cyril Chemparathy (10): test: limit x86 cpuflags checks to x86 builds hash: check SSE flags only on x86 builds config: remove RTE_LIBNAME definition. memzone: refactor rte_memzone_reserve() variants memzone: allow multiple pagesizes to be requested mempool: allow config override on element alignment tile: add page sizes for TILE-Gx/Mx platforms tile: initial TILE-Gx support. tile: Add TILE-Gx mPIPE poll mode driver. maintainers: claim responsibility for TILE-Gx platform Zhigang Lu (1): eal: allow empty compile time flags RTE_COMPILE_TIME_CPUFLAGS MAINTAINERS|4 + app/test/test_cpuflags.c |6 +- config/common_bsdapp |1 - config/common_linuxapp |1 - config/defconfig_ppc_64-power8-linuxapp-gcc|2 - config/defconfig_tile-tilegx-linuxapp-gcc | 70 + drivers/net/Makefile |1 + drivers/net/mpipe/Makefile | 46 + drivers/net/mpipe/mpipe_tilegx.c | 1637 lib/librte_eal/common/eal_common_cpuflags.c|5 +- lib/librte_eal/common/eal_common_memzone.c | 141 +- .../common/include/arch/tile/rte_atomic.h | 86 + .../common/include/arch/tile/rte_byteorder.h | 91 ++ .../common/include/arch/tile/rte_cpuflags.h| 85 + .../common/include/arch/tile/rte_cycles.h | 70 + .../common/include/arch/tile/rte_memcpy.h | 93 ++ .../common/include/arch/tile/rte_prefetch.h| 61 + .../common/include/arch/tile/rte_rwlock.h | 70 + .../common/include/arch/tile/rte_spinlock.h| 92 ++ lib/librte_eal/common/include/rte_memory.h | 16 +- lib/librte_eal/common/include/rte_memzone.h| 50 +- lib/librte_hash/rte_hash_crc.h |2 + lib/librte_mempool/rte_mempool.c | 16 +- lib/librte_mempool/rte_mempool.h |6 + mk/arch/tile/rte.vars.mk | 39 + mk/machine/tilegx/rte.vars.mk | 57 + mk/rte.app.mk |1 + mk/rte.vars.mk |5 +- 28 files changed, 2637 insertions(+), 117 deletions(-) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 drivers/net/mpipe/Makefile create mode 100644 drivers/net/mpipe/mpipe_tilegx.c create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk -- 2.1.2
[dpdk-dev] [PATCH v3 12/12] maintainers: claim responsibility for TILE-Gx platform
Change-Id: I6491108ff86c1249bf4ffa4d4624c01b4594805e Signed-off-by: Zhigang Lu --- MAINTAINERS | 4 1 file changed, 4 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 5476a73..6ffa01b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -114,6 +114,10 @@ M: Bruce Richardson M: Konstantin Ananyev F: lib/librte_eal/common/include/arch/x86/ +EZchip TILE-Gx +M: Zhigang Lu +F: lib/librte_eal/common/include/arch/tile/ + Linux EAL (with overlaps) M: David Marchand F: lib/librte_eal/linuxapp/Makefile -- 2.1.2
[dpdk-dev] [PATCH v3 11/12] tile: Add TILE-Gx mPIPE poll mode driver.
This commit adds a poll mode driver for the mPIPE hardware present on TILE-Gx SoCs. Change-Id: I1b9a9ef2c9f1c96810ec58b4d2ae77b870a6ec94 Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc |1 + drivers/net/Makefile |1 + drivers/net/mpipe/Makefile| 46 + drivers/net/mpipe/mpipe_tilegx.c | 1637 + mk/rte.app.mk |1 + 5 files changed, 1686 insertions(+) create mode 100644 drivers/net/mpipe/Makefile create mode 100644 drivers/net/mpipe/mpipe_tilegx.c diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc index 4023878..e603d1b 100644 --- a/config/defconfig_tile-tilegx-linuxapp-gcc +++ b/config/defconfig_tile-tilegx-linuxapp-gcc @@ -66,4 +66,5 @@ CONFIG_RTE_LIBRTE_TABLE=n CONFIG_RTE_LIBRTE_PIPELINE=n # Enable and override things that we need +CONFIG_RTE_LIBRTE_MPIPE_PMD=y CONFIG_RTE_MEMPOOL_ALIGN=128 diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 644cacb..ee77480 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -36,6 +36,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += bonding DIRS-$(CONFIG_RTE_LIBRTE_CXGBE_PMD) += cxgbe DIRS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000 DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic +DIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += mpipe DIRS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += fm10k DIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e DIRS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += ixgbe diff --git a/drivers/net/mpipe/Makefile b/drivers/net/mpipe/Makefile new file mode 100644 index 000..552b303 --- /dev/null +++ b/drivers/net/mpipe/Makefile @@ -0,0 +1,46 @@ +# +# Copyright 2015 EZchip Semiconductor Ltd. All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. + +include $(RTE_SDK)/mk/rte.vars.mk + +# library name +LIB = librte_pmd_mpipe.a + +CFLAGS += $(WERROR_FLAGS) -O3 + +EXPORT_MAP := rte_pmd_mpipe_version.map + +LIBABIVER := 1 + +SRCS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += mpipe_tilegx.c + +DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_eal lib/librte_ether +DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_mempool lib/librte_mbuf +DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_net lib/librte_malloc + +include $(RTE_SDK)/mk/rte.lib.mk diff --git a/drivers/net/mpipe/mpipe_tilegx.c b/drivers/net/mpipe/mpipe_tilegx.c new file mode 100644 index 000..e222443 --- /dev/null +++ b/drivers/net/mpipe/mpipe_tilegx.c @@ -0,0 +1,1637 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2015 EZchip Semiconductor Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of EZchip Semiconductor nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTO
[dpdk-dev] [PATCH v3 10/12] tile: initial TILE-Gx support.
This commit adds support for the TILE-Gx platform, as well as the TILE CPU architecture. This architecture port is fairly simple due to its reliance on generics for most arch stuff. Change-Id: I809fcf740e25ba5976a6b7736c1673515338cf80 Signed-off-by: Zhigang Lu --- config/defconfig_tile-tilegx-linuxapp-gcc | 69 .../common/include/arch/tile/rte_atomic.h | 86 .../common/include/arch/tile/rte_byteorder.h | 91 + .../common/include/arch/tile/rte_cpuflags.h| 85 .../common/include/arch/tile/rte_cycles.h | 70 .../common/include/arch/tile/rte_memcpy.h | 93 ++ .../common/include/arch/tile/rte_prefetch.h| 61 ++ .../common/include/arch/tile/rte_rwlock.h | 70 .../common/include/arch/tile/rte_spinlock.h| 92 + mk/arch/tile/rte.vars.mk | 39 + mk/machine/tilegx/rte.vars.mk | 57 + 11 files changed, 813 insertions(+) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc new file mode 100644 index 000..4023878 --- /dev/null +++ b/config/defconfig_tile-tilegx-linuxapp-gcc @@ -0,0 +1,69 @@ +# BSD LICENSE +# +# Copyright (C) EZchip Semiconductor 2015. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of EZchip Semiconductor nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +#include "common_linuxapp" + +CONFIG_RTE_MACHINE="tilegx" + +CONFIG_RTE_ARCH="tile" +CONFIG_RTE_ARCH_TILE=y +CONFIG_RTE_ARCH_64=y +CONFIG_RTE_ARCH_STRICT_ALIGN=y +CONFIG_RTE_FORCE_INTRINSICS=y + +CONFIG_RTE_TOOLCHAIN="gcc" +CONFIG_RTE_TOOLCHAIN_GCC=y + +# Disable things that we don't support or need +CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n +CONFIG_RTE_EAL_IGB_UIO=n +CONFIG_RTE_EAL_VFIO=n +CONFIG_RTE_LIBRTE_KNI=n +CONFIG_RTE_LIBRTE_XEN_DOM0=n +CONFIG_RTE_LIBRTE_IGB_PMD=n +CONFIG_RTE_LIBRTE_EM_PMD=n +CONFIG_RTE_LIBRTE_IXGBE_PMD=n +CONFIG_RTE_LIBRTE_I40E_PMD=n +CONFIG_RTE_LIBRTE_FM10K_PMD=n +CONFIG_RTE_LIBRTE_VIRTIO_PMD=n +CONFIG_RTE_LIBRTE_VMXNET3_PMD=n +CONFIG_RTE_LIBRTE_ENIC_PMD=n + +# This following libraries are not available on the tile architecture. So +# they're turned off. +CONFIG_RTE_LIBRTE_LPM=n +CONFIG_RTE_LIBRTE_ACL=n +CONFIG_RTE_LIBRTE_SCHED=n +CONFIG_RTE_LIBRTE_PORT=n +CONFIG_RTE_LIBRTE_TABLE=n +CONFIG_RTE_LIBRTE_PIPELINE=n + +# Enable and override things that we need +CONFIG_RTE_MEMPOOL_ALIGN=128 diff --git a/lib/librte_eal/common/include/arch/tile/rte_atomic.h b/lib/librte_eal/common/include/arch/tile/rte_atomic.h new file mode 100644 index 00
[dpdk-dev] [PATCH v3 09/12] tile: add page sizes for TILE-Gx/Mx platforms
This patch adds a few new page sizes that are supported on the TILE-Gx
and TILE-Mx platforms.
Change-Id: I7da783703149c4f96b84d0017fa4f1191fc029c6
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_memzone.c | 8 +
lib/librte_eal/common/include/rte_memory.h | 16 +
lib/librte_eal/common/include/rte_memzone.h | 50 +++--
3 files changed, 51 insertions(+), 23 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_memzone.c
b/lib/librte_eal/common/eal_common_memzone.c
index 76bae72..dc39a79 100644
--- a/lib/librte_eal/common/eal_common_memzone.c
+++ b/lib/librte_eal/common/eal_common_memzone.c
@@ -284,12 +284,20 @@ rte_memzone_reserve_thread_safe(const char *name, size_t
len,
const struct rte_memzone *mz = NULL;
uint64_t size_mask = 0;
+ if (flags & RTE_MEMZONE_256KB)
+ size_mask |= RTE_PGSIZE_256K;
if (flags & RTE_MEMZONE_2MB)
size_mask |= RTE_PGSIZE_2M;
if (flags & RTE_MEMZONE_16MB)
size_mask |= RTE_PGSIZE_16M;
+ if (flags & RTE_MEMZONE_256MB)
+ size_mask |= RTE_PGSIZE_256M;
+ if (flags & RTE_MEMZONE_512MB)
+ size_mask |= RTE_PGSIZE_512M;
if (flags & RTE_MEMZONE_1GB)
size_mask |= RTE_PGSIZE_1G;
+ if (flags & RTE_MEMZONE_4GB)
+ size_mask |= RTE_PGSIZE_4G;
if (flags & RTE_MEMZONE_16GB)
size_mask |= RTE_PGSIZE_16G;
if (!size_mask)
diff --git a/lib/librte_eal/common/include/rte_memory.h
b/lib/librte_eal/common/include/rte_memory.h
index d948c0b..1bed415 100644
--- a/lib/librte_eal/common/include/rte_memory.h
+++ b/lib/librte_eal/common/include/rte_memory.h
@@ -53,12 +53,16 @@ extern "C" {
#endif
enum rte_page_sizes {
- RTE_PGSIZE_4K = 1ULL << 12,
- RTE_PGSIZE_2M = 1ULL << 21,
- RTE_PGSIZE_1G = 1ULL << 30,
- RTE_PGSIZE_64K = 1ULL << 16,
- RTE_PGSIZE_16M = 1ULL << 24,
- RTE_PGSIZE_16G = 1ULL << 34
+ RTE_PGSIZE_4K= 1ULL << 12,
+ RTE_PGSIZE_64K = 1ULL << 16,
+ RTE_PGSIZE_256K = 1ULL << 18,
+ RTE_PGSIZE_2M= 1ULL << 21,
+ RTE_PGSIZE_16M = 1ULL << 24,
+ RTE_PGSIZE_256M = 1ULL << 28,
+ RTE_PGSIZE_512M = 1ULL << 29,
+ RTE_PGSIZE_1G= 1ULL << 30,
+ RTE_PGSIZE_4G= 1ULL << 32,
+ RTE_PGSIZE_16G = 1ULL << 34,
};
#define SOCKET_ID_ANY -1/**< Any NUMA socket. */
diff --git a/lib/librte_eal/common/include/rte_memzone.h
b/lib/librte_eal/common/include/rte_memzone.h
index ee62680..de5ae55 100644
--- a/lib/librte_eal/common/include/rte_memzone.h
+++ b/lib/librte_eal/common/include/rte_memzone.h
@@ -60,8 +60,12 @@ extern "C" {
#define RTE_MEMZONE_2MB0x0001 /**< Use 2MB pages. */
#define RTE_MEMZONE_1GB0x0002 /**< Use 1GB pages. */
-#define RTE_MEMZONE_16MB0x0100 /**< Use 16MB pages. */
-#define RTE_MEMZONE_16GB0x0200 /**< Use 16GB pages. */
+#define RTE_MEMZONE_16MB 0x0100 /**< Use 16MB pages. */
+#define RTE_MEMZONE_16GB 0x0200 /**< Use 16GB pages. */
+#define RTE_MEMZONE_256KB 0x0001 /**< Use 256KB pages. */
+#define RTE_MEMZONE_256MB 0x0002 /**< Use 256MB pages. */
+#define RTE_MEMZONE_512MB 0x0004 /**< Use 512MB pages. */
+#define RTE_MEMZONE_4GB0x0008 /**< Use 4GB pages. */
#define RTE_MEMZONE_SIZE_HINT_ONLY 0x0004 /**< Use available page size */
/**
@@ -110,11 +114,15 @@ struct rte_memzone {
* constraint for the reserved zone.
* @param flags
* The flags parameter is used to request memzones to be
- * taken from 1GB or 2MB hugepages.
- * - RTE_MEMZONE_2MB - Reserve from 2MB pages
- * - RTE_MEMZONE_1GB - Reserve from 1GB pages
- * - RTE_MEMZONE_16MB - Reserve from 16MB pages
- * - RTE_MEMZONE_16GB - Reserve from 16GB pages
+ * taken from specifically sized hugepages.
+ * - RTE_MEMZONE_2MB - Reserved from 2MB pages
+ * - RTE_MEMZONE_1GB - Reserved from 1GB pages
+ * - RTE_MEMZONE_16MB - Reserved from 16MB pages
+ * - RTE_MEMZONE_16GB - Reserved from 16GB pages
+ * - RTE_MEMZONE_256KB - Reserved from 256KB pages
+ * - RTE_MEMZONE_256MB - Reserved from 256MB pages
+ * - RTE_MEMZONE_512MB - Reserved from 512MB pages
+ * - RTE_MEMZONE_4GB - Reserved from 4GB pages
* - RTE_MEMZONE_SIZE_HINT_ONLY - Allow alternative page size to be used if
* the requested page size is unavailable.
* If this flag is not set, the function
@@ -157,11 +165,15 @@ const struct rte_memzone *rte_memzone_reserve(const char
*name,
* constraint for the reserved zone.
* @param flags
[dpdk-dev] [PATCH v3 08/12] mempool: allow config override on element alignment
On TILE-Gx and TILE-Mx platforms, the buffers fed into the hardware
buffer manager require a 128-byte alignment. With this change, we
allow configuration based override of the element alignment, and
default to RTE_CACHE_LINE_SIZE if left unspecified.
Change-Id: I9cd789d92b0bc9c8f44a633de59bb04d45d927a7
Signed-off-by: Zhigang Lu
---
lib/librte_mempool/rte_mempool.c | 16 +---
lib/librte_mempool/rte_mempool.h | 6 ++
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c
index 02699a1..8e185c5 100644
--- a/lib/librte_mempool/rte_mempool.c
+++ b/lib/librte_mempool/rte_mempool.c
@@ -120,10 +120,10 @@ static unsigned optimize_object_size(unsigned obj_size)
nrank = 1;
/* process new object size */
- new_obj_size = (obj_size + RTE_CACHE_LINE_MASK) / RTE_CACHE_LINE_SIZE;
+ new_obj_size = (obj_size + RTE_MEMPOOL_ALIGN_MASK) / RTE_MEMPOOL_ALIGN;
while (get_gcd(new_obj_size, nrank * nchan) != 1)
new_obj_size++;
- return new_obj_size * RTE_CACHE_LINE_SIZE;
+ return new_obj_size * RTE_MEMPOOL_ALIGN;
}
static void
@@ -267,7 +267,7 @@ rte_mempool_calc_obj_size(uint32_t elt_size, uint32_t flags,
#endif
if ((flags & MEMPOOL_F_NO_CACHE_ALIGN) == 0)
sz->header_size = RTE_ALIGN_CEIL(sz->header_size,
- RTE_CACHE_LINE_SIZE);
+ RTE_MEMPOOL_ALIGN);
/* trailer contains the cookie in debug mode */
sz->trailer_size = 0;
@@ -281,9 +281,9 @@ rte_mempool_calc_obj_size(uint32_t elt_size, uint32_t flags,
if ((flags & MEMPOOL_F_NO_CACHE_ALIGN) == 0) {
sz->total_size = sz->header_size + sz->elt_size +
sz->trailer_size;
- sz->trailer_size += ((RTE_CACHE_LINE_SIZE -
- (sz->total_size & RTE_CACHE_LINE_MASK)) &
-RTE_CACHE_LINE_MASK);
+ sz->trailer_size += ((RTE_MEMPOOL_ALIGN -
+ (sz->total_size & RTE_MEMPOOL_ALIGN_MASK)) &
+RTE_MEMPOOL_ALIGN_MASK);
}
/*
@@ -498,7 +498,7 @@ rte_mempool_xmem_create(const char *name, unsigned n,
unsigned elt_size,
* cache-aligned
*/
private_data_size = (private_data_size +
-RTE_CACHE_LINE_MASK) & (~RTE_CACHE_LINE_MASK);
+RTE_MEMPOOL_ALIGN_MASK) &
(~RTE_MEMPOOL_ALIGN_MASK);
if (! rte_eal_has_hugepages()) {
/*
@@ -525,6 +525,7 @@ rte_mempool_xmem_create(const char *name, unsigned n,
unsigned elt_size,
* enough to hold mempool header and metadata plus mempool objects.
*/
mempool_size = MEMPOOL_HEADER_SIZE(mp, pg_num) + private_data_size;
+ mempool_size = RTE_ALIGN_CEIL(mempool_size, RTE_MEMPOOL_ALIGN);
if (vaddr == NULL)
mempool_size += (size_t)objsz.total_size * n;
@@ -580,6 +581,7 @@ rte_mempool_xmem_create(const char *name, unsigned n,
unsigned elt_size,
/* calculate address of the first element for continuous mempool. */
obj = (char *)mp + MEMPOOL_HEADER_SIZE(mp, pg_num) +
private_data_size;
+ obj = RTE_PTR_ALIGN_CEIL(obj, RTE_MEMPOOL_ALIGN);
/* populate address translation fields. */
mp->pg_num = pg_num;
diff --git a/lib/librte_mempool/rte_mempool.h b/lib/librte_mempool/rte_mempool.h
index 6d4ce9a..ee67ce7 100644
--- a/lib/librte_mempool/rte_mempool.h
+++ b/lib/librte_mempool/rte_mempool.h
@@ -142,6 +142,12 @@ struct rte_mempool_objsz {
/** Mempool over one chunk of physically continuous memory */
#defineMEMPOOL_PG_NUM_DEFAULT 1
+#ifndef RTE_MEMPOOL_ALIGN
+#define RTE_MEMPOOL_ALIGN RTE_CACHE_LINE_SIZE
+#endif
+
+#define RTE_MEMPOOL_ALIGN_MASK (RTE_MEMPOOL_ALIGN - 1)
+
/**
* Mempool object header structure
*
--
2.1.2
[dpdk-dev] [PATCH v3 07/12] memzone: allow multiple pagesizes to be requested
This patch extends the memzone allocator to remove the restriction
that prevented callers from specifying multiple page sizes in the
flags argument.
In doing so, we also sanitize the free segment matching logic to get
rid of architecture specific disjunctions (2MB vs 1GB on x86, and 16MB
vs 16GB on PPC), thereby allowing for a broader range of hugepages on
architectures that support it.
Change-Id: Ic3713f61da49629a570fe4de34a8aaf5e2e0a19b
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_memzone.c | 58 ++
1 file changed, 27 insertions(+), 31 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_memzone.c
b/lib/librte_eal/common/eal_common_memzone.c
index 1ea502b..76bae72 100644
--- a/lib/librte_eal/common/eal_common_memzone.c
+++ b/lib/librte_eal/common/eal_common_memzone.c
@@ -113,7 +113,8 @@ align_phys_boundary(const struct rte_memseg *ms, size_t
len, size_t align,
static const struct rte_memzone *
memzone_reserve_aligned_thread_unsafe(const char *name, size_t len,
- int socket_id, unsigned flags, unsigned align, unsigned bound)
+ int socket_id, uint64_t size_mask, unsigned align,
+ unsigned bound)
{
struct rte_mem_config *mcfg;
unsigned i = 0;
@@ -201,18 +202,7 @@ memzone_reserve_aligned_thread_unsafe(const char *name,
size_t len,
if ((requested_len + addr_offset) > free_memseg[i].len)
continue;
- /* check flags for hugepage sizes */
- if ((flags & RTE_MEMZONE_2MB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_1G)
- continue;
- if ((flags & RTE_MEMZONE_1GB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_2M)
- continue;
- if ((flags & RTE_MEMZONE_16MB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_16G)
- continue;
- if ((flags & RTE_MEMZONE_16GB) &&
- free_memseg[i].hugepage_sz == RTE_PGSIZE_16M)
+ if ((size_mask & free_memseg[i].hugepage_sz) == 0)
continue;
/* this segment is the best until now */
@@ -244,16 +234,6 @@ memzone_reserve_aligned_thread_unsafe(const char *name,
size_t len,
/* no segment found */
if (memseg_idx == -1) {
- /*
-* If RTE_MEMZONE_SIZE_HINT_ONLY flag is specified,
-* try allocating again without the size parameter otherwise
-fail.
-*/
- if ((flags & RTE_MEMZONE_SIZE_HINT_ONLY) &&
- ((flags & RTE_MEMZONE_1GB) || (flags & RTE_MEMZONE_2MB)
- || (flags & RTE_MEMZONE_16MB) || (flags & RTE_MEMZONE_16GB)))
- return memzone_reserve_aligned_thread_unsafe(name,
- len, socket_id, 0, align, bound);
-
rte_errno = ENOMEM;
return NULL;
}
@@ -302,13 +282,18 @@ rte_memzone_reserve_thread_safe(const char *name, size_t
len,
{
struct rte_mem_config *mcfg;
const struct rte_memzone *mz = NULL;
-
- /* both sizes cannot be explicitly called for */
- if (((flags & RTE_MEMZONE_1GB) && (flags & RTE_MEMZONE_2MB))
- || ((flags & RTE_MEMZONE_16MB) && (flags & RTE_MEMZONE_16GB))) {
- rte_errno = EINVAL;
- return NULL;
- }
+ uint64_t size_mask = 0;
+
+ if (flags & RTE_MEMZONE_2MB)
+ size_mask |= RTE_PGSIZE_2M;
+ if (flags & RTE_MEMZONE_16MB)
+ size_mask |= RTE_PGSIZE_16M;
+ if (flags & RTE_MEMZONE_1GB)
+ size_mask |= RTE_PGSIZE_1G;
+ if (flags & RTE_MEMZONE_16GB)
+ size_mask |= RTE_PGSIZE_16G;
+ if (!size_mask)
+ size_mask = UINT64_MAX;
/* get pointer to global configuration */
mcfg = rte_eal_get_configuration()->mem_config;
@@ -316,7 +301,18 @@ rte_memzone_reserve_thread_safe(const char *name, size_t
len,
rte_rwlock_write_lock(&mcfg->mlock);
mz = memzone_reserve_aligned_thread_unsafe(
- name, len, socket_id, flags, align, bound);
+ name, len, socket_id, size_mask, align, bound);
+
+ /*
+* If we failed to allocate the requested page size, and the
+* RTE_MEMZONE_SIZE_HINT_ONLY flag is specified, try allocating
+* again.
+*/
+ if (!mz && rte_errno == ENOMEM && size_mask != UINT64_MAX &&
+ flags & RTE_MEMZONE_SIZE_HINT_ONLY) {
+ mz = memzone_reserve_aligned_thread_unsafe(
+ name, len, socket_id, UINT64_MAX, align, bound);
+ }
rte_rwlock_write_unlock(&mcfg->mlock);
--
2.1.2
[dpdk-dev] [PATCH v3 06/12] memzone: refactor rte_memzone_reserve() variants
The definitions of rte_memzone_reserve_aligned() and
rte_memzone_reserve_bounded() were identical with the exception of the
bound argument passed into rte_memzone_reserve_thread_safe().
This patch removes this replication of code by unifying it into
rte_memzone_reserve_thread_safe(), which is then called by all three
variants of rte_memzone_reserve().
Change-Id: Id26c25b4dd3d07861eaf35e72aaa2de555916fa3
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_memzone.c | 77 +-
1 file changed, 33 insertions(+), 44 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_memzone.c
b/lib/librte_eal/common/eal_common_memzone.c
index aee184a..1ea502b 100644
--- a/lib/librte_eal/common/eal_common_memzone.c
+++ b/lib/librte_eal/common/eal_common_memzone.c
@@ -77,18 +77,6 @@ memzone_lookup_thread_unsafe(const char *name)
}
/*
- * Return a pointer to a correctly filled memzone descriptor. If the
- * allocation cannot be done, return NULL.
- */
-const struct rte_memzone *
-rte_memzone_reserve(const char *name, size_t len, int socket_id,
- unsigned flags)
-{
- return rte_memzone_reserve_aligned(name,
- len, socket_id, flags, RTE_CACHE_LINE_SIZE);
-}
-
-/*
* Helper function for memzone_reserve_aligned_thread_unsafe().
* Calculate address offset from the start of the segment.
* Align offset in that way that it satisfy istart alignmnet and
@@ -307,13 +295,10 @@ memzone_reserve_aligned_thread_unsafe(const char *name,
size_t len,
return mz;
}
-/*
- * Return a pointer to a correctly filled memzone descriptor (with a
- * specified alignment). If the allocation cannot be done, return NULL.
- */
-const struct rte_memzone *
-rte_memzone_reserve_aligned(const char *name, size_t len,
- int socket_id, unsigned flags, unsigned align)
+static const struct rte_memzone *
+rte_memzone_reserve_thread_safe(const char *name, size_t len,
+ int socket_id, unsigned flags, unsigned align,
+ unsigned bound)
{
struct rte_mem_config *mcfg;
const struct rte_memzone *mz = NULL;
@@ -331,7 +316,7 @@ rte_memzone_reserve_aligned(const char *name, size_t len,
rte_rwlock_write_lock(&mcfg->mlock);
mz = memzone_reserve_aligned_thread_unsafe(
- name, len, socket_id, flags, align, 0);
+ name, len, socket_id, flags, align, bound);
rte_rwlock_write_unlock(&mcfg->mlock);
@@ -340,36 +325,40 @@ rte_memzone_reserve_aligned(const char *name, size_t len,
/*
* Return a pointer to a correctly filled memzone descriptor (with a
- * specified alignment and boundary).
- * If the allocation cannot be done, return NULL.
+ * specified alignment and boundary). If the allocation cannot be done,
+ * return NULL.
*/
const struct rte_memzone *
-rte_memzone_reserve_bounded(const char *name, size_t len,
- int socket_id, unsigned flags, unsigned align, unsigned bound)
+rte_memzone_reserve_bounded(const char *name, size_t len, int socket_id,
+ unsigned flags, unsigned align, unsigned bound)
{
- struct rte_mem_config *mcfg;
- const struct rte_memzone *mz = NULL;
-
- /* both sizes cannot be explicitly called for */
- if (((flags & RTE_MEMZONE_1GB) && (flags & RTE_MEMZONE_2MB))
- || ((flags & RTE_MEMZONE_16MB) && (flags & RTE_MEMZONE_16GB))) {
- rte_errno = EINVAL;
- return NULL;
- }
-
- /* get pointer to global configuration */
- mcfg = rte_eal_get_configuration()->mem_config;
-
- rte_rwlock_write_lock(&mcfg->mlock);
-
- mz = memzone_reserve_aligned_thread_unsafe(
- name, len, socket_id, flags, align, bound);
-
- rte_rwlock_write_unlock(&mcfg->mlock);
+ return rte_memzone_reserve_thread_safe(name, len, socket_id, flags,
+ align, bound);
+}
- return mz;
+/*
+ * Return a pointer to a correctly filled memzone descriptor (with a
+ * specified alignment). If the allocation cannot be done, return NULL.
+ */
+const struct rte_memzone *
+rte_memzone_reserve_aligned(const char *name, size_t len, int socket_id,
+ unsigned flags, unsigned align)
+{
+ return rte_memzone_reserve_thread_safe(name, len, socket_id, flags,
+ align, 0);
}
+/*
+ * Return a pointer to a correctly filled memzone descriptor. If the
+ * allocation cannot be done, return NULL.
+ */
+const struct rte_memzone *
+rte_memzone_reserve(const char *name, size_t len, int socket_id,
+ unsigned flags)
+{
+ return rte_memzone_reserve_thread_safe(name, len, socket_id,
+ flags, RTE_CACHE_LINE_SIZE, 0);
+}
/*
* Lookup for the memzone identified by the given name
--
2.1.2
[dpdk-dev] [PATCH v3 05/12] config: remove RTE_LIBNAME definition.
The library name is now being pinned to "dpdk" instead of intel_dpdk, powerpc_dpdk, etc. As a result, we no longer need this config item. This patch removes it. Change-Id: I36f7cf6c18c3563c6f5ccdf01bb70579c7ccaa16 Signed-off-by: Zhigang Lu --- config/common_bsdapp| 1 - config/common_linuxapp | 1 - config/defconfig_ppc_64-power8-linuxapp-gcc | 2 -- mk/rte.vars.mk | 5 + 4 files changed, 1 insertion(+), 8 deletions(-) diff --git a/config/common_bsdapp b/config/common_bsdapp index 78754b2..ad1448f 100644 --- a/config/common_bsdapp +++ b/config/common_bsdapp @@ -87,7 +87,6 @@ CONFIG_RTE_BUILD_SHARED_LIB=n # Combine to one single library # CONFIG_RTE_BUILD_COMBINE_LIBS=n -CONFIG_RTE_LIBNAME=intel_dpdk # # Compile Environment Abstraction Layer diff --git a/config/common_linuxapp b/config/common_linuxapp index f5646e0..4cad71c 100644 --- a/config/common_linuxapp +++ b/config/common_linuxapp @@ -87,7 +87,6 @@ CONFIG_RTE_BUILD_SHARED_LIB=n # Combine to one single library # CONFIG_RTE_BUILD_COMBINE_LIBS=n -CONFIG_RTE_LIBNAME="intel_dpdk" # # Compile Environment Abstraction Layer diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc index d97a885..f1af518 100644 --- a/config/defconfig_ppc_64-power8-linuxapp-gcc +++ b/config/defconfig_ppc_64-power8-linuxapp-gcc @@ -39,8 +39,6 @@ CONFIG_RTE_ARCH_64=y CONFIG_RTE_TOOLCHAIN="gcc" CONFIG_RTE_TOOLCHAIN_GCC=y -CONFIG_RTE_LIBNAME="powerpc_dpdk" - # Note: Power doesn't have this support CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n diff --git a/mk/rte.vars.mk b/mk/rte.vars.mk index d2f01b6..bb82395 100644 --- a/mk/rte.vars.mk +++ b/mk/rte.vars.mk @@ -73,10 +73,7 @@ ifneq ($(BUILDING_RTE_SDK),) endif endif -RTE_LIBNAME := $(CONFIG_RTE_LIBNAME:"%"=%) -ifeq ($(RTE_LIBNAME),) -RTE_LIBNAME := intel_dpdk -endif +RTE_LIBNAME := dpdk # RTE_TARGET is deducted from config when we are building the SDK. # Else, when building an external app, RTE_TARGET must be specified -- 2.1.2
[dpdk-dev] [PATCH v3 04/12] eal: allow empty compile time flags
The rte_cpu_check_supported() code breaks with a "comparison is always
false due to limited range of data type" when the compile_time_flags[]
array is empty. Assigning the array dimension to a local variable
apparently solves this.
Change-Id: I0ae21f529cf7b6dd9cf0f4532dce9198f4bf4230
Signed-off-by: Zhigang Lu
---
lib/librte_eal/common/eal_common_cpuflags.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/librte_eal/common/eal_common_cpuflags.c
b/lib/librte_eal/common/eal_common_cpuflags.c
index 6fd360c..8ba7b30 100644
--- a/lib/librte_eal/common/eal_common_cpuflags.c
+++ b/lib/librte_eal/common/eal_common_cpuflags.c
@@ -30,6 +30,7 @@
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
+#include
#include
/*
@@ -62,10 +63,10 @@ rte_cpu_check_supported(void)
static const enum rte_cpu_flag_t compile_time_flags[] = {
RTE_COMPILE_TIME_CPUFLAGS
};
- unsigned i;
+ unsigned count = RTE_DIM(compile_time_flags), i;
int ret;
- for (i = 0; i <
sizeof(compile_time_flags)/sizeof(compile_time_flags[0]); i++) {
+ for (i = 0; i < count; i++) {
ret = rte_cpu_get_flag_enabled(compile_time_flags[i]);
if (ret < 0) {
--
2.1.2
[dpdk-dev] [PATCH v3 03/12] hash: check SSE flags only on x86 builds
This is necessary because the required CPU flags may not be defined on
other architectures.
Change-Id: I14d3f9f625b2e7567123f1c97095f8d06abd674b
Signed-off-by: Zhigang Lu
---
lib/librte_hash/rte_hash_crc.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h
index abdbd9a..1f6f5bf 100644
--- a/lib/librte_hash/rte_hash_crc.h
+++ b/lib/librte_hash/rte_hash_crc.h
@@ -425,12 +425,14 @@ static inline void
rte_hash_crc_set_alg(uint8_t alg)
{
switch (alg) {
+#if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64)
case CRC32_SSE42_x64:
if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T))
alg = CRC32_SSE42;
case CRC32_SSE42:
if (! rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2))
alg = CRC32_SW;
+#endif
case CRC32_SW:
crc32_alg = alg;
default:
--
2.1.2
[dpdk-dev] [PATCH v3 02/12] hash: fix compilation on non-X86 platforms
The "hash: remove duplicated code" change unfortunately broke the
build for non-X86 platforms. This patch fixes this breakage.
Change-Id: Ie109d67e681b75b45320fab1bf9de4eb9c9701bf
Signed-off-by: Zhigang Lu
---
lib/librte_hash/rte_jhash.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/lib/librte_hash/rte_jhash.h b/lib/librte_hash/rte_jhash.h
index e230449..d1b6cf3 100644
--- a/lib/librte_hash/rte_jhash.h
+++ b/lib/librte_hash/rte_jhash.h
@@ -44,6 +44,7 @@
extern "C" {
#endif
+#include
#include
#include
@@ -122,7 +123,7 @@ __rte_jhash_2hashes(const void *key, uint32_t length,
uint32_t *pc,
const uint32_t *k = key;
const uint32_t s = 0;
#else
- const uint32_t *k = (uint32_t *)(uintptr_t)key & (uintptr_t)~3);
+ const uint32_t *k = (uint32_t *)((uintptr_t)key & (uintptr_t)~3);
const uint32_t s = ((uintptr_t)key & 3) * CHAR_BIT;
#endif
if (!check_align || s == 0) {
--
2.1.2
[dpdk-dev] [PATCH v3 01/12] test: limit x86 cpuflags checks to x86 builds
The original code mistakenly defaulted to X86 when RTE_ARCH_PPC_64 was
left undefined. This did not accomodate other non-PPC/non-X86
architectures. This patch fixes this issue.
Change-Id: I5e8cf33c2eb917f7f6583dc95ed0f336066a285e
Signed-off-by: Zhigang Lu
---
app/test/test_cpuflags.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c
index 5aeba5d..5b92061 100644
--- a/app/test/test_cpuflags.c
+++ b/app/test/test_cpuflags.c
@@ -113,7 +113,9 @@ test_cpuflags(void)
printf("Check for ICACHE_SNOOP:\t\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);
-#else
+#endif
+
+#if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
printf("Check for SSE:\t\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_SSE);
@@ -149,8 +151,6 @@ test_cpuflags(void)
printf("Check for INVTSC:\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_INVTSC);
-
-
#endif
/*
--
2.1.2
[dpdk-dev] [PATCH v3 00/12] Introducing the TILE-Gx platform
This series adds support for the EZchip TILE-Gx family of SoCs. The architecture port in itself is fairly straight forward due to its reliance on generics for the most part. In addition to adding TILE-Gx architecture specific code, this series includes a few cross-platform fixes for DPDK (cpuflags, SSE related, etc.), as well as minor extensions to to accomodate a wider range of hugepage sizes and configurable mempool element alignment boundaries. Changes in this series: v3: Renewed the Signed-off-by line. v2: Removed RTE_LIBNAME per Thomas' feedback. Cyril Chemparathy (12): test: limit x86 cpuflags checks to x86 builds hash: fix compilation on non-X86 platforms hash: check SSE flags only on x86 builds eal: allow empty compile time flags config: remove RTE_LIBNAME definition. memzone: refactor rte_memzone_reserve() variants memzone: allow multiple pagesizes to be requested mempool: allow config override on element alignment tile: add page sizes for TILE-Gx/Mx platforms tile: initial TILE-Gx support. tile: Add TILE-Gx mPIPE poll mode driver. maintainers: claim responsibility for TILE-Gx platform MAINTAINERS|4 + app/test/test_cpuflags.c |6 +- config/common_bsdapp |1 - config/common_linuxapp |1 - config/defconfig_ppc_64-power8-linuxapp-gcc|2 - config/defconfig_tile-tilegx-linuxapp-gcc | 70 + drivers/net/Makefile |1 + drivers/net/mpipe/Makefile | 46 + drivers/net/mpipe/mpipe_tilegx.c | 1637 lib/librte_eal/common/eal_common_cpuflags.c|5 +- lib/librte_eal/common/eal_common_memzone.c | 141 +- .../common/include/arch/tile/rte_atomic.h | 86 + .../common/include/arch/tile/rte_byteorder.h | 91 ++ .../common/include/arch/tile/rte_cpuflags.h| 85 + .../common/include/arch/tile/rte_cycles.h | 70 + .../common/include/arch/tile/rte_memcpy.h | 93 ++ .../common/include/arch/tile/rte_prefetch.h| 61 + .../common/include/arch/tile/rte_rwlock.h | 70 + .../common/include/arch/tile/rte_spinlock.h| 92 ++ lib/librte_eal/common/include/rte_memory.h | 16 +- lib/librte_eal/common/include/rte_memzone.h| 50 +- lib/librte_hash/rte_hash_crc.h |2 + lib/librte_hash/rte_jhash.h|3 +- lib/librte_mempool/rte_mempool.c | 16 +- lib/librte_mempool/rte_mempool.h |6 + mk/arch/tile/rte.vars.mk | 39 + mk/machine/tilegx/rte.vars.mk | 57 + mk/rte.app.mk |1 + mk/rte.vars.mk |5 +- 29 files changed, 2639 insertions(+), 118 deletions(-) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 drivers/net/mpipe/Makefile create mode 100644 drivers/net/mpipe/mpipe_tilegx.c create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_rwlock.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk -- 2.1.2
[dpdk-dev] [PATCH v2 12/12] mk: introduce Tilera Tile architecture
Add defconfig and rte.vars.mk files for Tile architecture. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- config/defconfig_tile-tilegx-linuxapp-gcc | 78 +++ mk/arch/tile/rte.vars.mk | 59 +++ mk/machine/tilegx/rte.vars.mk | 58 +++ 3 files changed, 195 insertions(+) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc new file mode 100644 index 000..5a944d5 --- /dev/null +++ b/config/defconfig_tile-tilegx-linuxapp-gcc @@ -0,0 +1,78 @@ +# BSD LICENSE +# +# Copyright(c) 2014 Tilera Corporation. All rights reserved. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of Tilera Corporation nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +#include "common_linuxapp" + +CONFIG_RTE_MACHINE="tilegx" + +CONFIG_RTE_ARCH="tile" +CONFIG_RTE_ARCH_TILE=y +CONFIG_RTE_ARCH_64=y + +CONFIG_RTE_TOOLCHAIN="gcc" +CONFIG_RTE_TOOLCHAIN_GCC=y +CONFIG_RTE_TOOLCHAIN_DEBUG=y + +CONFIG_RTE_FORCE_INTRINSICS=y +CONFIG_RTE_LIBNAME="tile_dpdk" +CONFIG_RTE_MAX_LCORE=128 +CONFIG_RTE_PKTMBUF_HEADROOM=66 + +# +# Compile burst-oriented MPIPE PMD driver +# +CONFIG_RTE_LIBRTE_MPIPE_PMD=y +CONFIG_RTE_LIBRTE_MPIPE_DEBUG_INIT=y +CONFIG_RTE_LIBRTE_MPIPE_DEBUG_RX=n +CONFIG_RTE_LIBRTE_MPIPE_DEBUG_TX=n + +# Note: TileGx doesn't have this support +CONFIG_RTE_EAL_IGB_UIO=n +CONFIG_RTE_EAL_VFIO=n +CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n +CONFIG_RTE_LIBRTE_EM_PMD=n +CONFIG_RTE_LIBRTE_IGB_PMD=n +CONFIG_RTE_LIBRTE_IXGBE_PMD=n +CONFIG_RTE_LIBRTE_I40E_PMD=n +CONFIG_RTE_LIBRTE_VIRTIO_PMD=n +CONFIG_RTE_LIBRTE_VMXNET3_PMD=n +CONFIG_RTE_LIBRTE_PMD_BOND=n +CONFIG_RTE_LIBRTE_ENIC_PMD=n + +# The following libraries are not available on TileGx. +CONFIG_RTE_LIBRTE_LPM=n +CONFIG_RTE_LIBRTE_ACL=n +CONFIG_RTE_LIBRTE_SCHED=n +CONFIG_RTE_LIBRTE_PORT=n +CONFIG_RTE_LIBRTE_TABLE=n +CONFIG_RTE_LIBRTE_PIPELINE=n +CONFIG_RTE_LIBRTE_KNI=n diff --git a/mk/arch/tile/rte.vars.mk b/mk/arch/tile/rte.vars.mk new file mode 100644 index 000..238bbe2 --- /dev/null +++ b/mk/arch/tile/rte.vars.mk @@ -0,0 +1,59 @@ +# BSD LICENSE +# +# Copyright(c) 2014 Tilera Corporation. All rights reserved. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of Tilera Corporation nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. I
[dpdk-dev] [PATCH v2 11/12] eal: allow empty set of compile time cpuflags
On architectures that do not rely on RTE_COMPILE_TIME_CPUFLAGS, the
compile_time_flags[] array can end up being zero sized. This results in a
compiler complaint in the subsequent loop. Pulling out the array size
computation silences this complaint.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
lib/librte_eal/common/eal_common_cpuflags.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/lib/librte_eal/common/eal_common_cpuflags.c
b/lib/librte_eal/common/eal_common_cpuflags.c
index 6fd360c..7a1ca26 100644
--- a/lib/librte_eal/common/eal_common_cpuflags.c
+++ b/lib/librte_eal/common/eal_common_cpuflags.c
@@ -62,10 +62,12 @@ rte_cpu_check_supported(void)
static const enum rte_cpu_flag_t compile_time_flags[] = {
RTE_COMPILE_TIME_CPUFLAGS
};
+ unsigned count =
+ sizeof(compile_time_flags)/sizeof(compile_time_flags[0]);
unsigned i;
int ret;
- for (i = 0; i <
sizeof(compile_time_flags)/sizeof(compile_time_flags[0]); i++) {
+ for (i = 0; i < count; i++) {
ret = rte_cpu_get_flag_enabled(compile_time_flags[i]);
if (ret < 0) {
--
2.1.2
[dpdk-dev] [PATCH v2 10/12] app/test: remove architecture specific code from cpuflags test
Test all defined CPU flags for supported architectures so that we
do not have to include conditional compilation for each architecture
in app test case.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
app/test/test_cpuflags.c | 78
1 file changed, 5 insertions(+), 73 deletions(-)
diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c
index 5aeba5d..1a58c03 100644
--- a/app/test/test_cpuflags.c
+++ b/app/test/test_cpuflags.c
@@ -77,81 +77,13 @@ cpu_flag_result(int result)
static int
test_cpuflags(void)
{
- int result;
+ int i, result;
printf("\nChecking for flags from different registers...\n");
-#ifdef RTE_ARCH_PPC_64
- printf("Check for PPC64:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_PPC64);
-
- printf("Check for PPC32:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_PPC32);
-
- printf("Check for VSX:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_VSX);
-
- printf("Check for DFP:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_DFP);
-
- printf("Check for FPU:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_FPU);
-
- printf("Check for SMT:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_SMT);
-
- printf("Check for MMU:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_MMU);
-
- printf("Check for ALTIVEC:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_ALTIVEC);
-
- printf("Check for ARCH_2_06:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_ARCH_2_06);
-
- printf("Check for ARCH_2_07:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_ARCH_2_07);
-
- printf("Check for ICACHE_SNOOP:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);
-#else
- printf("Check for SSE:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_SSE);
-
- printf("Check for SSE2:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_SSE2);
-
- printf("Check for SSE3:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_SSE3);
-
- printf("Check for SSE4.1:\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_SSE4_1);
-
- printf("Check for SSE4.2:\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_SSE4_2);
-
- printf("Check for AVX:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_AVX);
-
- printf("Check for AVX2:\t\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_AVX2);
-
- printf("Check for TRBOBST:\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_TRBOBST);
-
- printf("Check for ENERGY_EFF:\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_ENERGY_EFF);
-
- printf("Check for LAHF_SAHF:\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_LAHF_SAHF);
-
- printf("Check for 1GB_PG:\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_1GB_PG);
-
- printf("Check for INVTSC:\t");
- CHECK_FOR_FLAG(RTE_CPUFLAG_INVTSC);
-
-
-#endif
+ for (i = 0; i < RTE_CPUFLAG_NUMFLAGS; i++) {
+ printf("Check for %s:\t\t", cpu_feature_table[i].name);
+ CHECK_FOR_FLAG(i);
+ }
/*
* Check if invalid data is handled properly
--
2.1.2
[dpdk-dev] [PATCH v2 09/12] eal/tile: add CPU flags operations for TileGx
This patch adds empty functions for CPU flags operations to support DPDK,
since tile processor doesn't have CPU flag hardware registers.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_cpuflags.h| 78 ++
1 file changed, 78 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
new file mode 100644
index 000..872e38c
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
@@ -0,0 +1,78 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_CPUFLAGS_TILE_H_
+#define _RTE_CPUFLAGS_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include
+
+#include
+
+#include "generic/rte_cpuflags.h"
+
+enum rte_cpu_flag_t {
+ RTE_CPUFLAG_SSE4_1 = 0, /**< SSE4_1 */
+ /* The last item */
+ RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */
+};
+
+static const struct feature_entry cpu_feature_table[] = {
+ FEAT_DEF(SSE4_1, 0x, 0, 0, 0)
+};
+
+static inline void
+rte_cpu_get_features(__rte_unused uint32_t leaf,
+__rte_unused uint32_t subleaf,
+__rte_unused cpuid_registers_t out)
+{
+}
+
+static inline int
+rte_cpu_get_flag_enabled(__rte_unused enum rte_cpu_flag_t feature)
+{
+ if (feature >= RTE_CPUFLAG_NUMFLAGS)
+ /* Flag does not match anything in the feature tables */
+ return -ENOENT;
+
+ return 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_CPUFLAGS_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH v2 08/12] eal/tile: add vector operations for TileGx
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_common_vect.h | 49 ++
1 file changed, 49 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_common_vect.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_common_vect.h
b/lib/librte_eal/common/include/arch/tile/rte_common_vect.h
new file mode 100644
index 000..f759a20
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_common_vect.h
@@ -0,0 +1,49 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_COMMON_VECT_TILE_H_
+#define _RTE_COMMON_VECT_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_common_vect.h"
+
+typedef long __m128i __attribute__ ((__vector_size__ (16)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_COMMON__VECT_X86_H_ */
--
2.1.2
[dpdk-dev] [PATCH v2 07/12] eal: split vector operations to architecture specific
This patch splits vector operations from DPDK and push them
to architecture specific arch directories, so that other processor
architecture can implement its own vector functions to support DPDK.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
lib/librte_eal/common/Makefile | 3 +-
.../common/include/arch/ppc_64/rte_common_vect.h | 73 +
.../common/include/arch/x86/rte_common_vect.h | 81 +++
.../common/include/generic/rte_common_vect.h | 51
lib/librte_eal/common/include/rte_common_vect.h| 93 --
5 files changed, 206 insertions(+), 95 deletions(-)
create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
create mode 100644 lib/librte_eal/common/include/arch/x86/rte_common_vect.h
create mode 100644 lib/librte_eal/common/include/generic/rte_common_vect.h
delete mode 100644 lib/librte_eal/common/include/rte_common_vect.h
diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile
index 52c1a5f..02cac22 100644
--- a/lib/librte_eal/common/Makefile
+++ b/lib/librte_eal/common/Makefile
@@ -39,7 +39,6 @@ INC += rte_rwlock.h rte_tailq.h rte_interrupts.h rte_alarm.h
INC += rte_string_fns.h rte_version.h rte_tailq_elem.h
INC += rte_eal_memconfig.h rte_malloc_heap.h
INC += rte_hexdump.h rte_devargs.h rte_dev.h
-INC += rte_common_vect.h
INC += rte_pci_dev_feature_defs.h rte_pci_dev_features.h
ifeq ($(CONFIG_RTE_INSECURE_FUNCTION_WARNING),y)
@@ -47,7 +46,7 @@ INC += rte_warnings.h
endif
GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h
-GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h
+GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_common_vect.h
# defined in mk/arch/$(RTE_ARCH)/rte.vars.mk
ARCH_DIR ?= $(RTE_ARCH)
ARCH_INC := $(notdir $(wildcard
$(RTE_SDK)/lib/librte_eal/common/include/arch/$(ARCH_DIR)/*.h))
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
b/lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
new file mode 100644
index 000..485b7eb
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
@@ -0,0 +1,73 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_COMMON_VECT_PPC_64_H_
+#define _RTE_COMMON_VECT_PPC_64_H_
+
+/**
+ * @file
+ *
+ * RTE SSE/AVX related header.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_common_vect.h"
+
+#if (defined(__ICC) || (__GNUC__ == 4 && __GNUC_MINOR__ < 4))
+
+#ifdef __SSE__
+#include
+#endif
+
+#ifdef __SSE2__
+#include
+#endif
+
+#if defined(__SSE4_2__) || defined(__SSE4_1__)
+#include
+#endif
+
+#else
+
+#include
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_COMMON__VECT_PPC_64_H_ */
diff --git a/lib/librte_eal/common/include/arch/x86/rte_common_vect.h
b/lib/librte_eal/common/include/arch/x86/rte_common_vect.h
new file mode 100644
index 000..5ffe3fb
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/x86/rte_common_vect.h
@@ -0,0 +1,81 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+
[dpdk-dev] [PATCH v2 06/12] eal/tile: add cycle operations for TileGx
This patch adds CPU TSC read operations for TileGx.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_cycles.h | 64 ++
1 file changed, 64 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_cycles.h
b/lib/librte_eal/common/include/arch/tile/rte_cycles.h
new file mode 100644
index 000..74e11cf
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_cycles.h
@@ -0,0 +1,64 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_CYCLES_TILE_H_
+#define _RTE_CYCLES_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_cycles.h"
+
+#include
+
+static inline uint64_t
+rte_rdtsc(void)
+{
+ return get_cycle_count();
+}
+
+static inline uint64_t
+rte_rdtsc_precise(void)
+{
+ return rte_rdtsc();
+}
+
+static inline uint64_t
+rte_get_tsc_cycles(void) { return rte_rdtsc(); }
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_CYCLES_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH v2 05/12] eal/tile: add memcpy operations for TileGx
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_memcpy.h | 97 ++
1 file changed, 97 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_memcpy.h
b/lib/librte_eal/common/include/arch/tile/rte_memcpy.h
new file mode 100644
index 000..ef68787
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_memcpy.h
@@ -0,0 +1,97 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_MEMCPY_TILE_H_
+#define _RTE_MEMCPY_TILE_H_
+
+#include
+#include
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_memcpy.h"
+
+static inline void
+rte_mov16(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 16);
+}
+
+static inline void
+rte_mov32(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 32);
+}
+
+static inline void
+rte_mov48(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 48);
+}
+
+static inline void
+rte_mov64(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 64);
+}
+
+static inline void
+rte_mov128(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 128);
+}
+
+static inline void
+rte_mov256(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 256);
+}
+
+#define rte_memcpy(dst, src, n) \
+ ((__builtin_constant_p(n)) ? \
+ memcpy((dst), (src), (n)) : \
+ rte_memcpy_func((dst), (src), (n)))
+
+static inline void *
+rte_memcpy_func(void *dst, const void *src, size_t n)
+{
+ return memcpy(dst, src, n);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_MEMCPY_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH v2 04/12] eal/tile: add prefetch operations for TileGx
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_prefetch.h| 62 ++
1 file changed, 62 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
b/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
new file mode 100644
index 000..01a5d21
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
@@ -0,0 +1,62 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_PREFETCH_TILE_H_
+#define _RTE_PREFETCH_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_prefetch.h"
+
+static inline void rte_prefetch0(volatile void *p)
+{
+ __builtin_prefetch((const void *)(uintptr_t)p, 0, 3);
+}
+
+static inline void rte_prefetch1(volatile void *p)
+{
+ __builtin_prefetch((const void *)(uintptr_t)p, 0, 2);
+}
+
+static inline void rte_prefetch2(volatile void *p)
+{
+ __builtin_prefetch((const void *)(uintptr_t)p, 0, 1);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_PREFETCH_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH v2 03/12] eal/tile: add spinlock operations for TileGx
TileGx uses generic spinlock operations.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_spinlock.h| 47 ++
1 file changed, 47 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_spinlock.h
b/lib/librte_eal/common/include/arch/tile/rte_spinlock.h
new file mode 100644
index 000..1dc224e
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_spinlock.h
@@ -0,0 +1,47 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_SPINLOCK_TILE_H_
+#define _RTE_SPINLOCK_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_spinlock.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_SPINLOCK_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH v2 02/12] eal/tile: add byte order operations for TileGx
This patch adds architecture specific byte swap and endianness
operations for TileGx.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_byteorder.h | 70 ++
1 file changed, 70 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_byteorder.h
b/lib/librte_eal/common/include/arch/tile/rte_byteorder.h
new file mode 100644
index 000..38f3a23
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_byteorder.h
@@ -0,0 +1,70 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_BYTEORDER_TILE_H_
+#define _RTE_BYTEORDER_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_byteorder.h"
+
+/*
+ * __builtin_bswap16 is only available gcc 4.8 and upwards
+ */
+#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8)
+#define rte_bswap16(x) ((uint16_t)rte_constant_bswap16(x))
+#endif
+
+#define rte_cpu_to_le_16(x) (x)
+#define rte_cpu_to_le_32(x) (x)
+#define rte_cpu_to_le_64(x) (x)
+
+#define rte_cpu_to_be_16(x) rte_bswap16(x)
+#define rte_cpu_to_be_32(x) rte_bswap32(x)
+#define rte_cpu_to_be_64(x) rte_bswap64(x)
+
+#define rte_le_to_cpu_16(x) (x)
+#define rte_le_to_cpu_32(x) (x)
+#define rte_le_to_cpu_64(x) (x)
+
+#define rte_be_to_cpu_16(x) rte_bswap16(x)
+#define rte_be_to_cpu_32(x) rte_bswap32(x)
+#define rte_be_to_cpu_64(x) rte_bswap64(x)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_BYTEORDER_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH v2 01/12] eal/tile: add atomic operations for TileGx
This patch adds architecture specific memory barrier operations for
TileGx.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_atomic.h | 62 ++
1 file changed, 62 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_atomic.h
b/lib/librte_eal/common/include/arch/tile/rte_atomic.h
new file mode 100644
index 000..24c9b0a
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_atomic.h
@@ -0,0 +1,62 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_ATOMIC_TILE_H_
+#define _RTE_ATOMIC_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_atomic.h"
+
+static inline void rte_mb(void)
+{
+ __sync_synchronize();
+}
+
+static inline void rte_wmb(void)
+{
+ __sync_synchronize();
+}
+
+static inline void rte_rmb(void)
+{
+ __sync_synchronize();
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_ATOMIC_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH 15/15] eal: allow empty set of compile time cpuflags
On architectures that do not rely on RTE_COMPILE_TIME_CPUFLAGS, the
compile_time_flags[] array can end up being zero sized. This results in a
compiler complaint in the subsequent loop. Pulling out the array size
computation silences this complaint.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
lib/librte_eal/common/eal_common_cpuflags.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/lib/librte_eal/common/eal_common_cpuflags.c
b/lib/librte_eal/common/eal_common_cpuflags.c
index 6fd360c..7a1ca26 100644
--- a/lib/librte_eal/common/eal_common_cpuflags.c
+++ b/lib/librte_eal/common/eal_common_cpuflags.c
@@ -62,10 +62,12 @@ rte_cpu_check_supported(void)
static const enum rte_cpu_flag_t compile_time_flags[] = {
RTE_COMPILE_TIME_CPUFLAGS
};
+ unsigned count =
+ sizeof(compile_time_flags)/sizeof(compile_time_flags[0]);
unsigned i;
int ret;
- for (i = 0; i <
sizeof(compile_time_flags)/sizeof(compile_time_flags[0]); i++) {
+ for (i = 0; i < count; i++) {
ret = rte_cpu_get_flag_enabled(compile_time_flags[i]);
if (ret < 0) {
--
2.1.2
[dpdk-dev] [PATCH 14/15] app/test: turn off cpu flag checks for tile architecture
Tile processor doesn't have CPU flag hardware registers, so this patch
turns off cpu flag checks for tile.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
app/test/test_cpuflags.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c
index 5aeba5d..da93af5 100644
--- a/app/test/test_cpuflags.c
+++ b/app/test/test_cpuflags.c
@@ -113,7 +113,7 @@ test_cpuflags(void)
printf("Check for ICACHE_SNOOP:\t\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);
-#else
+#elif !defined(RTE_ARCH_TILE)
printf("Check for SSE:\t\t");
CHECK_FOR_FLAG(RTE_CPUFLAG_SSE);
--
2.1.2
[dpdk-dev] [PATCH 13/15] pmd/tile: add mPIPE poll mode driver for TileGx
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
lib/Makefile |1 +
lib/librte_pmd_mpipe/Makefile| 24 +
lib/librte_pmd_mpipe/pmd_mpipe.c | 1343 ++
mk/rte.app.mk|4 +
4 files changed, 1372 insertions(+)
create mode 100644 lib/librte_pmd_mpipe/Makefile
create mode 100644 lib/librte_pmd_mpipe/pmd_mpipe.c
diff --git a/lib/Makefile b/lib/Makefile
index 60aa0ff..c5e44bb 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -49,6 +49,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += librte_pmd_e1000
DIRS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += librte_pmd_ixgbe
DIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += librte_pmd_i40e
DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += librte_pmd_enic
+DIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += librte_pmd_mpipe
DIRS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += librte_pmd_bond
DIRS-$(CONFIG_RTE_LIBRTE_PMD_RING) += librte_pmd_ring
DIRS-$(CONFIG_RTE_LIBRTE_PMD_PCAP) += librte_pmd_pcap
diff --git a/lib/librte_pmd_mpipe/Makefile b/lib/librte_pmd_mpipe/Makefile
new file mode 100644
index 000..db75cf3
--- /dev/null
+++ b/lib/librte_pmd_mpipe/Makefile
@@ -0,0 +1,24 @@
+# FIXME: License
+# referred librte_pmd_mpipe/Makefile
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+#
+# library name
+#
+LIB = librte_pmd_mpipe.a
+
+CFLAGS += -O3
+CFLAGS += $(WERROR_FLAGS)
+
+#
+# all source are stored in SRCS-y
+#
+SRCS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += pmd_mpipe.c
+
+# this lib depends upon:
+DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_eal lib/librte_ether
+DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_mempool lib/librte_mbuf
+DEPDIRS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += lib/librte_net lib/librte_malloc
+
+include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/lib/librte_pmd_mpipe/pmd_mpipe.c b/lib/librte_pmd_mpipe/pmd_mpipe.c
new file mode 100644
index 000..bac880c
--- /dev/null
+++ b/lib/librte_pmd_mpipe/pmd_mpipe.c
@@ -0,0 +1,1343 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include
+
+#ifdef RTE_LIBRTE_MPIPE_DEBUG_INIT
+#define MPIPE_DEBUG_INIT
+#endif
+#ifdef RTE_LIBRTE_MPIPE_DEBUG_RX
+#define MPIPE_DEBUG_RX
+#endif
+#ifdef RTE_LIBRTE_MPIPE_DEBUG_TX
+#define MPIPE_DEBUG_TX
+#endif
+
+#ifdef MPIPE_DEBUG_INIT
+#define PMD_INIT_LOG(level, fmt, args...) \
+ RTE_LOG(level, PMD, "%s(): " fmt, __func__, ## args)
+#define PMD_INIT_FUNC_TRACE() PMD_INIT_LOG(DEBUG, " >>")
+#else
+#define PMD_INIT_LOG(level, fmt, args...) do { } while (0)
+#define PMD_INIT_FUNC_TRACE() do { } while (0)
+#endif
+
+#ifdef MPIPE_DEBUG_RX
+#define PMD_RX_LOG(level, fmt, args...) \
+ RTE_LOG(level, PMD, "%s() rx: " fmt, __func__, ## args)
+#else
+#define PMD_RX_LOG(level, fmt, args...) do { } while (0)
+#endif
+
+#ifdef MPIPE_DEBUG_TX
+#define PMD_TX_LOG(level, fmt, args...) \
+ RTE_LOG(level, PMD, "%s() tx: " fmt, __func__, ## args)
+#else
+#define PMD_TX_LOG(level, fmt, args...) do { } while (0)
+#endif
+
+#define MPIPE_TX_MAX_QUEUES128
+#define MPIPE_TX_DESCS 512
+#define MPIPE_RX_MAX_QUEUES16
+#define MPIPE_RX_BUCKETS 256
+
+#define MPIPE_LINK_UPDATE_TIMEOUT 10
[dpdk-dev] [PATCH 12/15] eal/tile: add mPIPE buffer stack mempool provider
TileGX: Modified mempool to allow for variable metadata.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
app/test-pmd/mempool_anon.c | 2 +-
app/test/Makefile | 6 +-
app/test/test_mempool_tile.c | 217
lib/Makefile | 5 +
lib/librte_eal/linuxapp/eal/Makefile | 4 +
lib/librte_mempool_tile/Makefile | 48 +++
lib/librte_mempool_tile/rte_mempool.c | 381
lib/librte_mempool_tile/rte_mempool.h | 634 ++
8 files changed, 1295 insertions(+), 2 deletions(-)
create mode 100644 app/test/test_mempool_tile.c
create mode 100644 lib/librte_mempool_tile/Makefile
create mode 100644 lib/librte_mempool_tile/rte_mempool.c
create mode 100644 lib/librte_mempool_tile/rte_mempool.h
diff --git a/app/test-pmd/mempool_anon.c b/app/test-pmd/mempool_anon.c
index 559a625..05b4c77 100644
--- a/app/test-pmd/mempool_anon.c
+++ b/app/test-pmd/mempool_anon.c
@@ -36,7 +36,7 @@
#include "mempool_osdep.h"
#include
-#ifdef RTE_EXEC_ENV_LINUXAPP
+#if defined(RTE_EXEC_ENV_LINUXAPP) && !defined(RTE_ARCH_TILE)
#include
#include
diff --git a/app/test/Makefile b/app/test/Makefile
index 4311f96..40ad971 100644
--- a/app/test/Makefile
+++ b/app/test/Makefile
@@ -72,10 +72,14 @@ SRCS-y += test_rwlock.c
SRCS-$(CONFIG_RTE_LIBRTE_TIMER) += test_timer.c
SRCS-$(CONFIG_RTE_LIBRTE_TIMER) += test_timer_perf.c
+ifeq ($(CONFIG_RTE_ARCH),"tile")
+SRCS-y += test_mempool_tile.c
+else
SRCS-y += test_mempool.c
SRCS-y += test_mempool_perf.c
-
SRCS-y += test_mbuf.c
+endif
+
SRCS-y += test_logs.c
SRCS-y += test_memcpy.c
diff --git a/app/test/test_mempool_tile.c b/app/test/test_mempool_tile.c
new file mode 100644
index 000..41a375d
--- /dev/null
+++ b/app/test/test_mempool_tile.c
@@ -0,0 +1,217 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "test.h"
+
+/*
+ * Mempool
+ * ===
+ *
+ * Basic tests: done on one core with and without cache:
+ *
+ *- Get one object, put one object
+ *- Get two objects, put two objects
+ *- Get all objects, test that their content is not modified and
+ * put them back in the pool.
+ */
+
+#define MEMPOOL_ELT_SIZE 2048
+#define MEMPOOL_SIZE (8 * 1024)
+
+static struct rte_mempool *mp;
+
+
+/*
+ * save the object number in the first 4 bytes of object data. All
+ * other bytes are set to 0.
+ */
+static void
+my_obj_init(struct rte_mempool *mp, __attribute__((unused)) void *arg,
+ void *obj, unsigned i)
+{
+ uint32_t *objnum = obj;
+
+ memset(obj, 0, mp->elt_size);
+ *objnum = i;
+}
+
+/* basic tests (done on one core) */
+static int
+test_mempool_basic(void)
+{
+ uint32_t *objnum;
+ void **objtable;
+ void *obj, *obj2;
+ char *obj_data;
+ int ret = 0;
+ unsigned i, j;
+
+ /* dump the mempool status */
+ rte_mempool_dump(stdout, mp);
+
+ printf("get
[dpdk-dev] [PATCH 11/15] eal/tile: add EAL support for global mPIPE initialization
The TileGx mPIPE hardware provides Ethernet connectivity,
packet classification, and packet load balancing services.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_mpipe.h | 67 ++
lib/librte_eal/linuxapp/eal/Makefile | 3 +
lib/librte_eal/linuxapp/eal/eal.c | 9 ++
lib/librte_eal/linuxapp/eal/eal_mpipe_tile.c | 147 +
mk/rte.app.mk | 4 +
5 files changed, 230 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_mpipe.h
create mode 100644 lib/librte_eal/linuxapp/eal/eal_mpipe_tile.c
diff --git a/lib/librte_eal/common/include/arch/tile/rte_mpipe.h
b/lib/librte_eal/common/include/arch/tile/rte_mpipe.h
new file mode 100644
index 000..11b6485
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_mpipe.h
@@ -0,0 +1,67 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_TILE_MPIPE_H_
+#define _RTE_TILE_MPIPE_H_
+
+#define ARCH_ATOMIC_NO_NICKNAMES
+
+#include
+#include
+#include
+
+#define BSM_ALIGN_SIZE 128
+
+struct rte_eal_mpipe_channel_config {
+ int enable;
+ int first_bucket;
+ int num_buckets;
+ int headroom;
+ gxio_mpipe_rules_stacks_t stacks;
+};
+
+#define __bsm_aligned __attribute__((__aligned__(BSM_ALIGN_SIZE)))
+
+extern int rte_eal_mpipe_instances;
+
+extern int
+rte_eal_mpipe_init(void);
+
+extern gxio_mpipe_context_t *
+rte_eal_mpipe_context(int instance);
+
+extern int
+rte_eal_mpipe_channel_config(int instance, int channel,
+struct rte_eal_mpipe_channel_config *config);
+
+#endif /* _RTE_TILE_MPIPE_H_ */
diff --git a/lib/librte_eal/linuxapp/eal/Makefile
b/lib/librte_eal/linuxapp/eal/Makefile
index 72ecf3a..99536b6 100644
--- a/lib/librte_eal/linuxapp/eal/Makefile
+++ b/lib/librte_eal/linuxapp/eal/Makefile
@@ -70,6 +70,9 @@ SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += eal_alarm.c
ifeq ($(CONFIG_RTE_LIBRTE_IVSHMEM),y)
SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += eal_ivshmem.c
endif
+ifeq ($(CONFIG_RTE_ARCH),"tile")
+SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += eal_mpipe_tile.c
+endif
# from common dir
SRCS-$(CONFIG_RTE_LIBRTE_EAL_LINUXAPP) += eal_common_memzone.c
diff --git a/lib/librte_eal/linuxapp/eal/eal.c
b/lib/librte_eal/linuxapp/eal/eal.c
index 89f3b5e..c97a090 100644
--- a/lib/librte_eal/linuxapp/eal/eal.c
+++ b/lib/librte_eal/linuxapp/eal/eal.c
@@ -78,6 +78,10 @@
#include
#include
+#ifdef RTE_ARCH_TILE
+#include
+#endif
+
#include "eal_private.h"
#include "eal_thread.h"
#include "eal_internal_cfg.h"
@@ -755,6 +759,11 @@ rte_eal_init(int argc, char **argv)
if (rte_eal_pci_init() < 0)
rte_panic("Cannot init PCI\n");
+#ifdef RTE_ARCH_TILE
+ if (rte_eal_mpipe_init() < 0)
+ rte_panic("Cannot init mPIPE\n");
+#endif
+
#ifdef RTE_LIBRTE_IVSHMEM
if (rte_eal_ivshmem_init() < 0)
rte_panic("Cannot init IVSHMEM\n");
diff --git a/lib/librte_eal/linuxapp/eal/eal_mpipe_tile.c
b/lib/librte_eal/linuxapp/eal/eal_mpipe_tile.c
new file mode 100644
index 000..7b0f94b
--- /dev/null
+++ b/lib/librte_eal/linuxapp/
[dpdk-dev] [PATCH 10/15] eal/tile: add vector operations for TileGx
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_common_vect.h | 49 ++
1 file changed, 49 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_common_vect.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_common_vect.h
b/lib/librte_eal/common/include/arch/tile/rte_common_vect.h
new file mode 100644
index 000..f759a20
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_common_vect.h
@@ -0,0 +1,49 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_COMMON_VECT_TILE_H_
+#define _RTE_COMMON_VECT_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_common_vect.h"
+
+typedef long __m128i __attribute__ ((__vector_size__ (16)));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_COMMON__VECT_X86_H_ */
--
2.1.2
[dpdk-dev] [PATCH 09/15] eal: split vector operations to architecture specific
This patch splits vector operations from DPDK and push them
to architecture specific arch directories, so that other processor
architecture can implement its own vector functions to support DPDK.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
lib/librte_eal/common/Makefile | 3 +-
.../common/include/arch/ppc_64/rte_common_vect.h | 73 +
.../common/include/arch/x86/rte_common_vect.h | 81 +++
.../common/include/generic/rte_common_vect.h | 51
lib/librte_eal/common/include/rte_common_vect.h| 93 --
5 files changed, 206 insertions(+), 95 deletions(-)
create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
create mode 100644 lib/librte_eal/common/include/arch/x86/rte_common_vect.h
create mode 100644 lib/librte_eal/common/include/generic/rte_common_vect.h
delete mode 100644 lib/librte_eal/common/include/rte_common_vect.h
diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile
index 52c1a5f..02cac22 100644
--- a/lib/librte_eal/common/Makefile
+++ b/lib/librte_eal/common/Makefile
@@ -39,7 +39,6 @@ INC += rte_rwlock.h rte_tailq.h rte_interrupts.h rte_alarm.h
INC += rte_string_fns.h rte_version.h rte_tailq_elem.h
INC += rte_eal_memconfig.h rte_malloc_heap.h
INC += rte_hexdump.h rte_devargs.h rte_dev.h
-INC += rte_common_vect.h
INC += rte_pci_dev_feature_defs.h rte_pci_dev_features.h
ifeq ($(CONFIG_RTE_INSECURE_FUNCTION_WARNING),y)
@@ -47,7 +46,7 @@ INC += rte_warnings.h
endif
GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h
-GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h
+GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_common_vect.h
# defined in mk/arch/$(RTE_ARCH)/rte.vars.mk
ARCH_DIR ?= $(RTE_ARCH)
ARCH_INC := $(notdir $(wildcard
$(RTE_SDK)/lib/librte_eal/common/include/arch/$(ARCH_DIR)/*.h))
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
b/lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
new file mode 100644
index 000..485b7eb
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h
@@ -0,0 +1,73 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_COMMON_VECT_PPC_64_H_
+#define _RTE_COMMON_VECT_PPC_64_H_
+
+/**
+ * @file
+ *
+ * RTE SSE/AVX related header.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_common_vect.h"
+
+#if (defined(__ICC) || (__GNUC__ == 4 && __GNUC_MINOR__ < 4))
+
+#ifdef __SSE__
+#include
+#endif
+
+#ifdef __SSE2__
+#include
+#endif
+
+#if defined(__SSE4_2__) || defined(__SSE4_1__)
+#include
+#endif
+
+#else
+
+#include
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_COMMON__VECT_PPC_64_H_ */
diff --git a/lib/librte_eal/common/include/arch/x86/rte_common_vect.h
b/lib/librte_eal/common/include/arch/x86/rte_common_vect.h
new file mode 100644
index 000..5ffe3fb
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/x86/rte_common_vect.h
@@ -0,0 +1,81 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+
[dpdk-dev] [PATCH 08/15] eal/tile: add cycle operations for TileGx
This patch adds CPU TSC read operations for TileGx.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_cycles.h | 64 ++
1 file changed, 64 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_cycles.h
b/lib/librte_eal/common/include/arch/tile/rte_cycles.h
new file mode 100644
index 000..74e11cf
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_cycles.h
@@ -0,0 +1,64 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_CYCLES_TILE_H_
+#define _RTE_CYCLES_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_cycles.h"
+
+#include
+
+static inline uint64_t
+rte_rdtsc(void)
+{
+ return get_cycle_count();
+}
+
+static inline uint64_t
+rte_rdtsc_precise(void)
+{
+ return rte_rdtsc();
+}
+
+static inline uint64_t
+rte_get_tsc_cycles(void) { return rte_rdtsc(); }
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_CYCLES_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH 07/15] eal/tile: add CPU flags operations for TileGx
This patch adds empty functions for CPU flags operations to support DPDK,
since tile processor doesn't have CPU flag hardware registers.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_cpuflags.h| 69 ++
1 file changed, 69 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
new file mode 100644
index 000..6b4c894
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_cpuflags.h
@@ -0,0 +1,69 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_CPUFLAGS_TILE_H_
+#define _RTE_CPUFLAGS_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include
+
+#include
+
+#include "generic/rte_cpuflags.h"
+
+enum rte_cpu_flag_t {
+ /* The last item */
+ RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */
+};
+
+static inline void
+rte_cpu_get_features(__rte_unused uint32_t leaf,
+__rte_unused uint32_t subleaf,
+__rte_unused cpuid_registers_t out)
+{
+}
+
+static inline int
+rte_cpu_get_flag_enabled(__rte_unused enum rte_cpu_flag_t feature)
+{
+ return 0;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_CPUFLAGS_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH 06/15] eal/tile: add memcpy operations for TileGx
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_memcpy.h | 97 ++
1 file changed, 97 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_memcpy.h
b/lib/librte_eal/common/include/arch/tile/rte_memcpy.h
new file mode 100644
index 000..ef68787
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_memcpy.h
@@ -0,0 +1,97 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_MEMCPY_TILE_H_
+#define _RTE_MEMCPY_TILE_H_
+
+#include
+#include
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_memcpy.h"
+
+static inline void
+rte_mov16(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 16);
+}
+
+static inline void
+rte_mov32(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 32);
+}
+
+static inline void
+rte_mov48(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 48);
+}
+
+static inline void
+rte_mov64(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 64);
+}
+
+static inline void
+rte_mov128(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 128);
+}
+
+static inline void
+rte_mov256(uint8_t *dst, const uint8_t *src)
+{
+ memcpy(dst, src, 256);
+}
+
+#define rte_memcpy(dst, src, n) \
+ ((__builtin_constant_p(n)) ? \
+ memcpy((dst), (src), (n)) : \
+ rte_memcpy_func((dst), (src), (n)))
+
+static inline void *
+rte_memcpy_func(void *dst, const void *src, size_t n)
+{
+ return memcpy(dst, src, n);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_MEMCPY_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH 05/15] eal/tile: add prefetch operations for TileGx
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_prefetch.h| 62 ++
1 file changed, 62 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
b/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
new file mode 100644
index 000..01a5d21
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_prefetch.h
@@ -0,0 +1,62 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_PREFETCH_TILE_H_
+#define _RTE_PREFETCH_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_prefetch.h"
+
+static inline void rte_prefetch0(volatile void *p)
+{
+ __builtin_prefetch((const void *)(uintptr_t)p, 0, 3);
+}
+
+static inline void rte_prefetch1(volatile void *p)
+{
+ __builtin_prefetch((const void *)(uintptr_t)p, 0, 2);
+}
+
+static inline void rte_prefetch2(volatile void *p)
+{
+ __builtin_prefetch((const void *)(uintptr_t)p, 0, 1);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_PREFETCH_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH 04/15] eal/tile: add spinlock operations for TileGx
TileGx uses generic spinlock operations.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_spinlock.h| 47 ++
1 file changed, 47 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_spinlock.h
b/lib/librte_eal/common/include/arch/tile/rte_spinlock.h
new file mode 100644
index 000..1dc224e
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_spinlock.h
@@ -0,0 +1,47 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_SPINLOCK_TILE_H_
+#define _RTE_SPINLOCK_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_spinlock.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_SPINLOCK_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH 03/15] eal/tile: add byte order operations for TileGx
This patch adds architecture specific byte swap and endianness
operations for TileGx.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_byteorder.h | 70 ++
1 file changed, 70 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_byteorder.h
b/lib/librte_eal/common/include/arch/tile/rte_byteorder.h
new file mode 100644
index 000..38f3a23
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_byteorder.h
@@ -0,0 +1,70 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_BYTEORDER_TILE_H_
+#define _RTE_BYTEORDER_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_byteorder.h"
+
+/*
+ * __builtin_bswap16 is only available gcc 4.8 and upwards
+ */
+#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 8)
+#define rte_bswap16(x) ((uint16_t)rte_constant_bswap16(x))
+#endif
+
+#define rte_cpu_to_le_16(x) (x)
+#define rte_cpu_to_le_32(x) (x)
+#define rte_cpu_to_le_64(x) (x)
+
+#define rte_cpu_to_be_16(x) rte_bswap16(x)
+#define rte_cpu_to_be_32(x) rte_bswap32(x)
+#define rte_cpu_to_be_64(x) rte_bswap64(x)
+
+#define rte_le_to_cpu_16(x) (x)
+#define rte_le_to_cpu_32(x) (x)
+#define rte_le_to_cpu_64(x) (x)
+
+#define rte_be_to_cpu_16(x) rte_bswap16(x)
+#define rte_be_to_cpu_32(x) rte_bswap32(x)
+#define rte_be_to_cpu_64(x) rte_bswap64(x)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_BYTEORDER_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH 02/15] eal/tile: add atomic operations for TileGx
This patch adds architecture specific memory barrier operations for
TileGx.
Signed-off-by: Zhigang Lu
Signed-off-by: Cyril Chemparathy
---
.../common/include/arch/tile/rte_atomic.h | 62 ++
1 file changed, 62 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h
diff --git a/lib/librte_eal/common/include/arch/tile/rte_atomic.h
b/lib/librte_eal/common/include/arch/tile/rte_atomic.h
new file mode 100644
index 000..24c9b0a
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/tile/rte_atomic.h
@@ -0,0 +1,62 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2014 Tilera Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Tilera Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_ATOMIC_TILE_H_
+#define _RTE_ATOMIC_TILE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_atomic.h"
+
+static inline void rte_mb(void)
+{
+ __sync_synchronize();
+}
+
+static inline void rte_wmb(void)
+{
+ __sync_synchronize();
+}
+
+static inline void rte_rmb(void)
+{
+ __sync_synchronize();
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_ATOMIC_TILE_H_ */
--
2.1.2
[dpdk-dev] [PATCH 01/15] mk: introduce Tilera Tile architecture
Add defconfig and rte.vars.mk files for Tile architecture. Signed-off-by: Zhigang Lu Signed-off-by: Cyril Chemparathy --- config/defconfig_tile-tilegx-linuxapp-gcc | 78 +++ mk/arch/tile/rte.vars.mk | 59 +++ mk/machine/tilegx/rte.vars.mk | 58 +++ 3 files changed, 195 insertions(+) create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc new file mode 100644 index 000..5a944d5 --- /dev/null +++ b/config/defconfig_tile-tilegx-linuxapp-gcc @@ -0,0 +1,78 @@ +# BSD LICENSE +# +# Copyright(c) 2014 Tilera Corporation. All rights reserved. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of Tilera Corporation nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +#include "common_linuxapp" + +CONFIG_RTE_MACHINE="tilegx" + +CONFIG_RTE_ARCH="tile" +CONFIG_RTE_ARCH_TILE=y +CONFIG_RTE_ARCH_64=y + +CONFIG_RTE_TOOLCHAIN="gcc" +CONFIG_RTE_TOOLCHAIN_GCC=y +CONFIG_RTE_TOOLCHAIN_DEBUG=y + +CONFIG_RTE_FORCE_INTRINSICS=y +CONFIG_RTE_LIBNAME="tile_dpdk" +CONFIG_RTE_MAX_LCORE=128 +CONFIG_RTE_PKTMBUF_HEADROOM=66 + +# +# Compile burst-oriented MPIPE PMD driver +# +CONFIG_RTE_LIBRTE_MPIPE_PMD=y +CONFIG_RTE_LIBRTE_MPIPE_DEBUG_INIT=y +CONFIG_RTE_LIBRTE_MPIPE_DEBUG_RX=n +CONFIG_RTE_LIBRTE_MPIPE_DEBUG_TX=n + +# Note: TileGx doesn't have this support +CONFIG_RTE_EAL_IGB_UIO=n +CONFIG_RTE_EAL_VFIO=n +CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n +CONFIG_RTE_LIBRTE_EM_PMD=n +CONFIG_RTE_LIBRTE_IGB_PMD=n +CONFIG_RTE_LIBRTE_IXGBE_PMD=n +CONFIG_RTE_LIBRTE_I40E_PMD=n +CONFIG_RTE_LIBRTE_VIRTIO_PMD=n +CONFIG_RTE_LIBRTE_VMXNET3_PMD=n +CONFIG_RTE_LIBRTE_PMD_BOND=n +CONFIG_RTE_LIBRTE_ENIC_PMD=n + +# The following libraries are not available on TileGx. +CONFIG_RTE_LIBRTE_LPM=n +CONFIG_RTE_LIBRTE_ACL=n +CONFIG_RTE_LIBRTE_SCHED=n +CONFIG_RTE_LIBRTE_PORT=n +CONFIG_RTE_LIBRTE_TABLE=n +CONFIG_RTE_LIBRTE_PIPELINE=n +CONFIG_RTE_LIBRTE_KNI=n diff --git a/mk/arch/tile/rte.vars.mk b/mk/arch/tile/rte.vars.mk new file mode 100644 index 000..238bbe2 --- /dev/null +++ b/mk/arch/tile/rte.vars.mk @@ -0,0 +1,59 @@ +# BSD LICENSE +# +# Copyright(c) 2014 Tilera Corporation. All rights reserved. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# * Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# * Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# * Neither the name of Tilera Corporation nor the names of its +# contributors may be used to endorse or promote products derived +# from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. I
[dpdk-dev] [PATCH 00/15] Patches for DPDK to support tile architecture
This patch set adds default configuration, compiling related rte.vars.mk files for tile, and architecture-specific operations for EAL. TileGx processor, as a SOC, contains a on-chip networking engine named mPIPE( multicore Programmable Intelligent Packet Engine). This patch set also adds poll mode driver for the mPIPE device. And to improve the performance of memory allocation, mPIPE's buffer stack is used as the mempool provider. Zhigang Lu (15): mk: introduce Tilera Tile architecture eal/tile: add atomic operations for TileGx eal/tile: add byte order operations for TileGx eal/tile: add spinlock operations for TileGx eal/tile: add prefetch operations for TileGx eal/tile: add memcpy operations for TileGx eal/tile: add CPU flags operations for TileGx eal/tile: add cycle operations for TileGx eal: split vector operations to architecture specific eal/tile: add vector operations for TileGx eal/tile: add EAL support for global mPIPE initialization eal/tile: add mPIPE buffer stack mempool provider pmd/tile: add mPIPE poll mode driver for TileGx app/test: turn off cpu flag checks for tile architecture eal: allow empty set of compile time cpuflags app/test-pmd/mempool_anon.c|2 +- app/test/Makefile |6 +- app/test/test_cpuflags.c |2 +- app/test/test_mempool_tile.c | 217 config/defconfig_tile-tilegx-linuxapp-gcc | 78 ++ lib/Makefile |6 + lib/librte_eal/common/Makefile |3 +- lib/librte_eal/common/eal_common_cpuflags.c|4 +- .../common/include/arch/ppc_64/rte_common_vect.h | 73 ++ .../common/include/arch/tile/rte_atomic.h | 62 + .../common/include/arch/tile/rte_byteorder.h | 70 + .../common/include/arch/tile/rte_common_vect.h | 49 + .../common/include/arch/tile/rte_cpuflags.h| 69 + .../common/include/arch/tile/rte_cycles.h | 64 + .../common/include/arch/tile/rte_memcpy.h | 97 ++ .../common/include/arch/tile/rte_mpipe.h | 67 + .../common/include/arch/tile/rte_prefetch.h| 62 + .../common/include/arch/tile/rte_spinlock.h| 47 + .../common/include/arch/x86/rte_common_vect.h | 81 ++ .../common/include/generic/rte_common_vect.h | 51 + lib/librte_eal/common/include/rte_common_vect.h| 93 -- lib/librte_eal/linuxapp/eal/Makefile |7 + lib/librte_eal/linuxapp/eal/eal.c |9 + lib/librte_eal/linuxapp/eal/eal_mpipe_tile.c | 147 +++ lib/librte_mempool_tile/Makefile | 48 + lib/librte_mempool_tile/rte_mempool.c | 381 ++ lib/librte_mempool_tile/rte_mempool.h | 634 + lib/librte_pmd_mpipe/Makefile | 24 + lib/librte_pmd_mpipe/pmd_mpipe.c | 1343 mk/arch/tile/rte.vars.mk | 59 + mk/machine/tilegx/rte.vars.mk | 58 + mk/rte.app.mk |8 + 32 files changed, 3822 insertions(+), 99 deletions(-) create mode 100644 app/test/test_mempool_tile.c create mode 100644 config/defconfig_tile-tilegx-linuxapp-gcc create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_common_vect.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_atomic.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_byteorder.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_common_vect.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cpuflags.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_cycles.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memcpy.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_mpipe.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_prefetch.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_spinlock.h create mode 100644 lib/librte_eal/common/include/arch/x86/rte_common_vect.h create mode 100644 lib/librte_eal/common/include/generic/rte_common_vect.h delete mode 100644 lib/librte_eal/common/include/rte_common_vect.h create mode 100644 lib/librte_eal/linuxapp/eal/eal_mpipe_tile.c create mode 100644 lib/librte_mempool_tile/Makefile create mode 100644 lib/librte_mempool_tile/rte_mempool.c create mode 100644 lib/librte_mempool_tile/rte_mempool.h create mode 100644 lib/librte_pmd_mpipe/Makefile create mode 100644 lib/librte_pmd_mpipe/pmd_mpipe.c create mode 100644 mk/arch/tile/rte.vars.mk create mode 100644 mk/machine/tilegx/rte.vars.mk -- 2.1.2
