[dpdk-dev] [PATCH v3 2/2] crypto/qat: adding support for 3DES cipher algorithm

2016-09-16 Thread Fiona Trahe
3DES support added to QuickAssist PMD
With CTR and CBC mode.
Both cipher-only and chained with HMAC_SHAx

This patch depends on following patch :
  crypto/qat: enable support of Kasumi F8 in QAT cryptodev
  http://dpdk.org/dev/patchwork/patch/15813/

Signed-off-by: Fiona Trahe 
---
 doc/guides/cryptodevs/qat.rst|  4 +-
 doc/guides/rel_notes/release_16_11.rst   |  1 +
 drivers/crypto/qat/qat_adf/qat_algs.h|  5 ++
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 25 +-
 drivers/crypto/qat/qat_crypto.c  | 59 +++-
 5 files changed, 89 insertions(+), 5 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 3528499..16e5937 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -42,6 +42,8 @@ The QAT PMD has support for:

 Cipher algorithms:

+* ``RTE_CRYPTO_CIPHER_3DES_CBC``
+* ``RTE_CRYPTO_CIPHER_3DES_CTR``
 * ``RTE_CRYPTO_CIPHER_AES128_CBC``
 * ``RTE_CRYPTO_CIPHER_AES192_CBC``
 * ``RTE_CRYPTO_CIPHER_AES256_CBC``
@@ -72,7 +74,7 @@ Limitations

 * Chained mbufs are not supported.
 * Hash only is not supported except Snow3G UIA2 and Kasumi F9.
-* Cipher only is not supported except Snow3G UEA2 and Kasumi F8.
+* Cipher only is not supported except Snow3G UEA2, Kasumi F8 and 3DES.
 * Only supports the session-oriented API implementation (session-less APIs are 
not supported).
 * Not performance tuned.
 * Snow3g(UEA2) and Kasumi(F8) supported only if cipher length, cipher offset 
fields are byte-aligned.
diff --git a/doc/guides/rel_notes/release_16_11.rst 
b/doc/guides/rel_notes/release_16_11.rst
index 1dd0e6a..4eedc0e 100644
--- a/doc/guides/rel_notes/release_16_11.rst
+++ b/doc/guides/rel_notes/release_16_11.rst
@@ -51,6 +51,7 @@ New Features
   * Added support for SHA384-HMAC algorithm.
   * Added support for NULL algorithm.
   * Added support for KASUMI (F8 and F9) algorithm.
+  * Added support for 3DES block cipher algorithm.

 Resolved Issues
 ---
diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h 
b/drivers/crypto/qat/qat_adf/qat_algs.h
index 429f44f..530b9cc 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -59,6 +59,10 @@

 #define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x

+/* 3DES key sizes */
+#define QAT_3DES_KEY_SZ_OPT1 24 /* Keys are independent */
+#define QAT_3DES_KEY_SZ_OPT2 16 /* K3=K1 */
+
 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
ICP_QAT_HW_CIPHER_NO_CONVERT, \
@@ -138,4 +142,5 @@ void qat_alg_ablkcipher_init_dec(struct 
qat_alg_ablkcipher_cd *cd,
 int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
+int qat_alg_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 #endif
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c 
b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index 8ca422f..b46702f 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -512,6 +512,10 @@ int qat_alg_aead_session_create_content_desc_cipher(struct 
qat_session *cdesc,
cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_KASUMI_BLK_SZ >> 3;
cipher_cd_ctrl->cipher_padding_sz =
(2 * ICP_QAT_HW_KASUMI_BLK_SZ) >> 3;
+   } else if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_3DES) {
+   total_key_size = ICP_QAT_HW_3DES_KEY_SZ;
+   cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_3DES_BLK_SZ >> 3;
+   proto = ICP_QAT_FW_LA_PROTO_GET(header->serv_specif_flags);
} else {
total_key_size = cipherkeylen;
cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_AES_BLK_SZ >> 3;
@@ -553,8 +557,12 @@ int qat_alg_aead_session_create_content_desc_cipher(struct 
qat_session *cdesc,

if (total_key_size > cipherkeylen) {
uint32_t padding_size =  total_key_size-cipherkeylen;
-
-   memset(cdesc->cd_cur_ptr, 0, padding_size);
+   if ((cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_3DES)
+   && (cipherkeylen == QAT_3DES_KEY_SZ_OPT2))
+   /* K3 not provided so use K1 = K3*/
+   memcpy(cdesc->cd_cur_ptr, cipherkey, padding_size);
+   else
+   memset(cdesc->cd_cur_ptr, 0, padding_size);
cdesc->cd_cur_ptr += padding_size;
}
cd_size = cdesc->cd_cur_ptr-(uint8_t *)>cd;
@@ -845,3 +853,16 @@ int qat_alg_validate_kasumi_key(int key_len, enum 
icp_qat_hw_cipher_algo *alg)
}
return 0;
 }
+
+int qat_alg_validate_3des_key(int key_len, enum 

[dpdk-dev] [PATCH v3 2/2] crypto/qat: adding support for 3DES cipher algorithm

2016-09-15 Thread Fiona Trahe (fiona.tr...@intel.com)
From: Fiona Trahe 

3DES support added to QuickAssist PMD
With CTR and CBC mode.
Both cipher-only and chained with HMAC_SHAx

This patch depends on following patch :
  crypto/qat: enable support of Kasumi F8 in QAT cryptodev
  http://dpdk.org/dev/patchwork/patch/15813/

Signed-off-by: Fiona Trahe 
---
 doc/guides/cryptodevs/qat.rst|  4 +-
 doc/guides/rel_notes/release_16_11.rst   |  1 +
 drivers/crypto/qat/qat_adf/qat_algs.h|  5 ++
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 25 +-
 drivers/crypto/qat/qat_crypto.c  | 59 +++-
 5 files changed, 89 insertions(+), 5 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 3528499..16e5937 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -42,6 +42,8 @@ The QAT PMD has support for:

 Cipher algorithms:

+* ``RTE_CRYPTO_CIPHER_3DES_CBC``
+* ``RTE_CRYPTO_CIPHER_3DES_CTR``
 * ``RTE_CRYPTO_CIPHER_AES128_CBC``
 * ``RTE_CRYPTO_CIPHER_AES192_CBC``
 * ``RTE_CRYPTO_CIPHER_AES256_CBC``
@@ -72,7 +74,7 @@ Limitations

 * Chained mbufs are not supported.
 * Hash only is not supported except Snow3G UIA2 and Kasumi F9.
-* Cipher only is not supported except Snow3G UEA2 and Kasumi F8.
+* Cipher only is not supported except Snow3G UEA2, Kasumi F8 and 3DES.
 * Only supports the session-oriented API implementation (session-less APIs are 
not supported).
 * Not performance tuned.
 * Snow3g(UEA2) and Kasumi(F8) supported only if cipher length, cipher offset 
fields are byte-aligned.
diff --git a/doc/guides/rel_notes/release_16_11.rst 
b/doc/guides/rel_notes/release_16_11.rst
index 1dd0e6a..4eedc0e 100644
--- a/doc/guides/rel_notes/release_16_11.rst
+++ b/doc/guides/rel_notes/release_16_11.rst
@@ -51,6 +51,7 @@ New Features
   * Added support for SHA384-HMAC algorithm.
   * Added support for NULL algorithm.
   * Added support for KASUMI (F8 and F9) algorithm.
+  * Added support for 3DES block cipher algorithm.

 Resolved Issues
 ---
diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h 
b/drivers/crypto/qat/qat_adf/qat_algs.h
index 429f44f..530b9cc 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs.h
+++ b/drivers/crypto/qat/qat_adf/qat_algs.h
@@ -59,6 +59,10 @@

 #define KASUMI_F8_KEY_MODIFIER_4_BYTES   0x

+/* 3DES key sizes */
+#define QAT_3DES_KEY_SZ_OPT1 24 /* Keys are independent */
+#define QAT_3DES_KEY_SZ_OPT2 16 /* K3=K1 */
+
 #define QAT_AES_HW_CONFIG_CBC_ENC(alg) \
ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_CBC_MODE, alg, \
ICP_QAT_HW_CIPHER_NO_CONVERT, \
@@ -138,4 +142,5 @@ void qat_alg_ablkcipher_init_dec(struct 
qat_alg_ablkcipher_cd *cd,
 int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 int qat_alg_validate_snow3g_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 int qat_alg_validate_kasumi_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
+int qat_alg_validate_3des_key(int key_len, enum icp_qat_hw_cipher_algo *alg);
 #endif
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c 
b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index 8ca422f..b46702f 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -512,6 +512,10 @@ int qat_alg_aead_session_create_content_desc_cipher(struct 
qat_session *cdesc,
cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_KASUMI_BLK_SZ >> 3;
cipher_cd_ctrl->cipher_padding_sz =
(2 * ICP_QAT_HW_KASUMI_BLK_SZ) >> 3;
+   } else if (cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_3DES) {
+   total_key_size = ICP_QAT_HW_3DES_KEY_SZ;
+   cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_3DES_BLK_SZ >> 3;
+   proto = ICP_QAT_FW_LA_PROTO_GET(header->serv_specif_flags);
} else {
total_key_size = cipherkeylen;
cipher_cd_ctrl->cipher_state_sz = ICP_QAT_HW_AES_BLK_SZ >> 3;
@@ -553,8 +557,12 @@ int qat_alg_aead_session_create_content_desc_cipher(struct 
qat_session *cdesc,

if (total_key_size > cipherkeylen) {
uint32_t padding_size =  total_key_size-cipherkeylen;
-
-   memset(cdesc->cd_cur_ptr, 0, padding_size);
+   if ((cdesc->qat_cipher_alg == ICP_QAT_HW_CIPHER_ALGO_3DES)
+   && (cipherkeylen == QAT_3DES_KEY_SZ_OPT2))
+   /* K3 not provided so use K1 = K3*/
+   memcpy(cdesc->cd_cur_ptr, cipherkey, padding_size);
+   else
+   memset(cdesc->cd_cur_ptr, 0, padding_size);
cdesc->cd_cur_ptr += padding_size;
}
cd_size = cdesc->cd_cur_ptr-(uint8_t *)>cd;
@@ -845,3 +853,16 @@ int qat_alg_validate_kasumi_key(int key_len, enum 
icp_qat_hw_cipher_algo *alg)
}
return 0;
 }
+
+int