Mini (compressed) CQEs are returned by the NIC when PCI back pressure is
detected, in which case the first CQE64 contains common packet information
followed by a number of CQE8 providing the rest, followed by a matching
number of empty CQE64 entries to be used by software for decompression.
Before decompression:
0 1 2 6 7 8
+---+ +-+ +---+ +---+ +---+ +---+
| CQE64 | | CQE64 | | CQE64 | | CQE64 | | CQE64 | | CQE64 |
|---| |-| |---| |---| |---| |---|
| . | | cqe8[0] | | | . | | | | | . |
| . | | cqe8[1] | | | . | | | | | . |
| . | | ... | | | . | | | | | . |
| . | | cqe8[7] | | | | | | | | . |
+---+ +-+ +---+ +---+ +---+ +---+
After decompression:
0 1 ... 8
+---+ +---+ +---+
| CQE64 | | CQE64 | | CQE64 |
|---| |---| |---|
| . | | . | . | . |
| . | | . | . | . |
| . | | . | . | . |
| . | | . | | . |
+---+ +---+ +---+
This patch does not perform the entire decompression step as it would be
really expensive, instead the first CQE64 is consumed and an internal
context is maintained to interpret the following CQE8 entries directly.
Intermediate empty CQE64 entries are handed back to HW without further
processing.
Signed-off-by: Nelio Laranjeiro
Signed-off-by: Adrien Mazarguil
Signed-off-by: Olga Shern
Signed-off-by: Vasily Philipov
---
doc/guides/nics/mlx5.rst | 6 +
drivers/net/mlx5/mlx5.c | 24 +++-
drivers/net/mlx5/mlx5.h | 1 +
drivers/net/mlx5/mlx5_rxq.c | 9 +-
drivers/net/mlx5/mlx5_rxtx.c | 265 +--
drivers/net/mlx5/mlx5_rxtx.h | 11 ++
drivers/net/mlx5/mlx5_txq.c | 5 +
7 files changed, 253 insertions(+), 68 deletions(-)
diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 3a07928..756153b 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -148,6 +148,12 @@ Run-time configuration
- **ethtool** operations on related kernel interfaces also affect the PMD.
+- ``rxq_cqe_comp_en`` parameter [int]
+
+ A nonzero value enables the compression of CQE on RX side. This feature
+ allows to save PCI bandwidth and improve performance at the cost of a
+ slightly higher CPU usage. Enabled by default.
+
Prerequisites
-
diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index d08d4ac..630e5e4 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -69,6 +69,9 @@
#include "mlx5_autoconf.h"
#include "mlx5_defs.h"
+/* Device parameter to enable RX completion queue compression. */
+#define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
+
/**
* Retrieve integer value from environment variable.
*
@@ -256,12 +259,21 @@ static int
mlx5_args_check(const char *key, const char *val, void *opaque)
{
struct priv *priv = opaque;
+ unsigned long tmp;
- /* No parameters are expected at the moment. */
- (void)priv;
- (void)val;
- WARN("%s: unknown parameter", key);
- return -EINVAL;
+ errno = 0;
+ tmp = strtoul(val, NULL, 0);
+ if (errno) {
+ WARN("%s: \"%s\" is not a valid integer", key, val);
+ return errno;
+ }
+ if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
+ priv->cqe_comp = !!tmp;
+ } else {
+ WARN("%s: unknown parameter", key);
+ return -EINVAL;
+ }
+ return 0;
}
/**
@@ -279,6 +291,7 @@ static int
mlx5_args(struct priv *priv, struct rte_devargs *devargs)
{
const char **params = (const char *[]){
+ MLX5_RXQ_CQE_COMP_EN,
NULL,
};
struct rte_kvargs *kvlist;
@@ -475,6 +488,7 @@ mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct
rte_pci_device *pci_dev)
priv->port = port;
priv->pd = pd;
priv->mtu = ETHER_MTU;
+ priv->cqe_comp = 1; /* Enable compression by default. */
err = mlx5_args(priv, pci_dev->devargs);
if (err) {
ERROR("failed to process device arguments: %s",
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 3dca03d..8f5a6df 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -111,6 +111,7 @@ struct priv {
unsigned int hw_padding:1; /* End alignment padding is supported. */
unsigned int sriov:1; /* This is a VF or PF with VF devices. */
unsigned int mps:1; /* Whether multi-packet send is supported. */
+ unsigned int cqe_comp:1; /* Whether CQE compression is enabled. */
unsigned int pending_alarm:1; /* An alarm is pending. */
