Re: [dpdk-dev] [PATCH v2 1/6] net/mlx5: check for a field size in modify field action
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, March 24, 2021 17:05
> To: dev@dpdk.org
> Cc: Raslan Darawsheh ; Slava Ovsiienko
> ; Matan Azrad ; Ori Kam
> ; sta...@dpdk.org
> Subject: [PATCH v2 1/6] net/mlx5: check for a field size in modify field
> action
>
> Add a validation check to make sure that the specified width for
> MODIFY_FIELD RTE action is not bigger than a field size.
>
> Fixes: 641dbe4fb0 ("net/mlx5: support modify field flow action")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Alexander Kozyrev
Acked-by: Viacheslav Ovsiienko
Re: [dpdk-dev] [PATCH v2 2/6] net/mlx5: adjust modify field action endianess
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, March 24, 2021 17:05
> To: dev@dpdk.org
> Cc: Raslan Darawsheh ; Slava Ovsiienko
> ; Matan Azrad ; Ori Kam
> ; sta...@dpdk.org
> Subject: [PATCH v2 2/6] net/mlx5: adjust modify field action endianess
>
> Masks that used to modify a packet field must be in a big endian format.
> Convert then to BE to ensure proper modification.
>
> Fixes: 641dbe4fb0 ("net/mlx5: support modify field flow action")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Alexander Kozyrev
Acked-by: Viacheslav Ovsiienko
Re: [dpdk-dev] [PATCH v2 3/6] net/mlx5: check extended metadata for mark modififcation
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, March 24, 2021 17:05
> To: dev@dpdk.org
> Cc: Raslan Darawsheh ; Slava Ovsiienko
> ; Matan Azrad ; Ori Kam
> ; sta...@dpdk.org
> Subject: [PATCH v2 3/6] net/mlx5: check extended metadata for mark
> modififcation
>
> The MODIFY_FIELD RTE action requires the extended metadata support in
> order to manipulate on MARK register. Check if it is supported and reject the
> MODIFY_FIELD action if it is not.
>
> Fixes: 641dbe4fb0 ("net/mlx5: support modify field flow action")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Alexander Kozyrev
Acked-by: Viacheslav Ovsiienko
Re: [dpdk-dev] [PATCH v2 4/6] net/mlx5: allow group 0 modify field action
> -Original Message- > From: Alexander Kozyrev > Sent: Wednesday, March 24, 2021 17:05 > To: dev@dpdk.org > Cc: Raslan Darawsheh ; Slava Ovsiienko > ; Matan Azrad ; Ori Kam > > Subject: [PATCH v2 4/6] net/mlx5: allow group 0 modify field action > > There is a limitation about copying one header field to another for the Flow > group 0. Such copy action is not allowed there. But setting a header field > with > an immediate value is perfrectly fine. > Allow the MODIFY_FIELD RTE action on group 0 in case the source field is an > immediate value or a pointer to it. > > Signed-off-by: Alexander Kozyrev Acked-by: Viacheslav Ovsiienko
Re: [dpdk-dev] [PATCH v2 5/6] doc: add list of supported Field IDs to modify
> -Original Message- > From: Alexander Kozyrev > Sent: Wednesday, March 24, 2021 17:05 > To: dev@dpdk.org > Cc: Raslan Darawsheh ; Slava Ovsiienko > ; Matan Azrad ; Ori Kam > > Subject: [PATCH v2 5/6] doc: add list of supported Field IDs to modify > > Include the rte_flow_field_id enumeration into the documentation to > provide the full list of all supported Field IDs available for the > MODIFY_FIELD > RTE action. > > Signed-off-by: Alexander Kozyrev Acked-by: Viacheslav Ovsiienko
Re: [dpdk-dev] [PATCH v2 6/6] net/mlx5: reject VXLAN ID's modifications
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, March 24, 2021 17:05
> To: dev@dpdk.org
> Cc: Raslan Darawsheh ; Slava Ovsiienko
> ; Matan Azrad ; Ori Kam
> ; sta...@dpdk.org
> Subject: [PATCH v2 6/6] net/mlx5: reject VXLAN ID's modifications
>
> Modification of the 802.1Q Tag Identificator, VXLAN Network Identificator or
> GENEVE Network Identificator is not supported.
> Reject attempt to modify these fields via the MODIFY_FIELD action and
> document this mlx5 driver limitation.
>
> Fixes: 641dbe4fb0 ("net/mlx5: support modify field flow action")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Alexander Kozyrev
Acked-by: Viacheslav Ovsiienko
Re: [dpdk-dev] [PATCH v8] app/testpmd: support multi-process
On Mon, Mar 29, 2021 at 6:48 PM Min Hu (Connor) wrote: > > From: Lijun Ou > > This patch adds multi-process support for testpmd. > The test cmd example as follows: > the primary cmd: > ./dpdk-testpmd -a xxx --proc-type=auto -l 0-1 -- -i \ > --rxq=4 --txq=4 --num-procs=2 --proc-id=0 > > the secondary cmd: > ./dpdk-testpmd -a xxx --proc-type=auto -l 2-3 -- -i \ > --rxq=4 --txq=4 --num-procs=2 --proc-id=1 > > Signed-off-by: Min Hu (Connor) > Signed-off-by: Lijun Ou Some minor nits below. Otherwise looks fine to me. Acked-by: Ajit Khaparde > --- > v8: > * Added warning info about queue numbers and process numbers. > :::snip > +* ``--rxq=N`` > + > +Set the number of Rx queues per port to N. N is the sum of queues used > by primary > +and secondary process. Primary process and secondary process should have > separate > +queues, and each should occupy at least one queue. Where N should be the > multiple > +of number of processes. of the number of processes. > + > +* ``--txq=N`` > + > +Set the number of Tx queues per port to N. N is the sum of queues used > by primary > +and secondary process. Primary process and secondary process should have > separate > +queues, and each should occupy at least one queue. Where N should be the > multiple > +of number of processes. of the number of processes. > + > +* ``--num-procs=N`` > + > +The number of processes which will be used. > + snip > +The number of rings should be a multiple of the number of processes. If not, > +redundant queues will exist after queues are allocated to processes. After > RSS is > +enabled, packet loss occurs when traffic is sent to all processes at the > same time. > +Some traffic enters redundant queues and cannot be forwarded. > + > +Most dev ops is supported in primary and secondary process. While secondary > process Most dev ops are supported in the primary and secondary process. While > +is not permitted to allocate or release shared memory, so some ops are not > supported > +as follows: > +``dev_configure`` > +``dev_start`` > +``dev_stop`` > +``rx_queue_setup`` > +``tx_queue_setup`` > +``rx_queue_release`` > +``tx_queue_release`` snip:::
Re: [dpdk-dev] [PATCH 1/2] common/mlx5: align driver name logs across pmds
> -Original Message- > From: Michael Baum > Sent: Monday, March 15, 2021 23:06 > To: dev@dpdk.org > Cc: NBU-Contact-Thomas Monjalon ; Slava > Ovsiienko ; Matan Azrad ; > Raslan Darawsheh ; Asaf Penso > Subject: [PATCH 1/2] common/mlx5: align driver name logs across pmds > > From: Asaf Penso > > Some mlx5 pmds define the log prefix as "mlx5_pmd" while others as > "pmd_mlx5". > The patch aligns all pmds to use the "mlx5_pmd" format. > > Signed-off-by: Asaf Penso Acked-by: Viacheslav Ovsiienko
Re: [dpdk-dev] [PATCH 2/2] common/mlx5: rename driver name to include PCI notation
> -Original Message- > From: Michael Baum > Sent: Monday, March 15, 2021 23:06 > To: dev@dpdk.org > Cc: NBU-Contact-Thomas Monjalon ; Slava > Ovsiienko ; Matan Azrad ; > Raslan Darawsheh ; Asaf Penso > Subject: [PATCH 2/2] common/mlx5: rename driver name to include PCI > notation > > From: Asaf Penso > > The current define for MLX5_DRIVER_NAME refers specially for the PCI > driver. > > The define itself does not mention PCI and this is confusing. > > Rename from MLX5_DRIVER_NAME to MLX5_PCI_DRIVER_NAME. > > Signed-off-by: Asaf Penso Acked-by: Viacheslav Ovsiienko
Re: [dpdk-dev] [PATCH v5 9/9] net/mlx5: probe host PF representor with SubFunction
> -Original Message- > From: Xueming Li > Sent: Sunday, March 28, 2021 16:48 > To: Slava Ovsiienko > Cc: dev@dpdk.org; Xueming(Steven) Li ; Asaf Penso > ; Matan Azrad ; Shahaf Shuler > > Subject: [PATCH v5 9/9] net/mlx5: probe host PF representor with > SubFunction > > To simplify BlueField HPF representor(vf[-1]) probe, this patch allows probe > it > with "sf" syntax: "sf[-1]". > > Signed-off-by: Xueming Li Acked-by: Viacheslav Ovsiienko
[dpdk-dev] [PATCH v2 0/2] fix gtp psc qfi support
This is fixing the gtp psc support to match the RFC 38415-g30 v2: introduce new header definition for gtp psc update commit msg for rte flow item change. Raslan Darawsheh (2): ethdev: add new ext hdr for gtp psc ethdev: update qfi definition doc/guides/testpmd_app_ug/testpmd_funcs.rst | 3 +- lib/librte_ethdev/rte_flow.h| 18 +-- lib/librte_net/rte_gtp.h| 34 + 3 files changed, 51 insertions(+), 4 deletions(-) -- 2.29.0
[dpdk-dev] [PATCH v2 1/2] ethdev: add new ext hdr for gtp psc
Define new rte header for gtp PDU session container
based on RFC 38415-g30
Signed-off-by: Raslan Darawsheh
---
lib/librte_net/rte_gtp.h | 34 ++
1 file changed, 34 insertions(+)
diff --git a/lib/librte_net/rte_gtp.h b/lib/librte_net/rte_gtp.h
index 6a6f9b238d..8af48ea1ec 100644
--- a/lib/librte_net/rte_gtp.h
+++ b/lib/librte_net/rte_gtp.h
@@ -61,6 +61,40 @@ struct rte_gtp_hdr_ext_word {
uint8_t next_ext; /**< Next Extension Header Type. */
} __rte_packed;
+/**
+ * Optional extention for GTP with next_ext set to 0x85
+ * defined based on RFC 38415-g30.
+ */
+__extension__
+struct rte_gtp_psc {
+ uint8_t ext_hdr_len; /**< PDU ext hdr len in multiples of 4 bytes */
+ uint8_t type:4; /**< PDU type */
+ uint8_t qmp:1; /**< Qos Monitoring Packet */
+ union {
+ struct {
+ uint8_t snp:1; /**< Sequence number presence */
+ uint8_t spare_dl1:2; /**< spare down link bits */
+ };
+ struct {
+ uint8_t dl_delay_ind:1; /**< dl delay result presence */
+ uint8_t ul_delay_ind:1; /**< ul delay result presence */
+ uint8_t snp_ul1:1; /**< Sequence number presence ul */
+ };
+ };
+ union {
+ struct {
+ uint8_t ppp:1; /**< Paging policy presence */
+ uint8_t rqi:1; /**< Reflective Qos Indicator */
+ };
+ struct {
+ uint8_t n_delay_ind:1; /**< N3/N9 delay result presence
*/
+ uint8_t spare_ul2:1; /**< spare up link bits */
+ };
+ };
+ uint8_t qfi:6; /**< Qos Flow Identifier */
+ uint8_t data[0]; /**< data feilds */
+} __rte_packed;
+
/** GTP header length */
#define RTE_ETHER_GTP_HLEN \
(sizeof(struct rte_udp_hdr) + sizeof(struct rte_gtp_hdr))
--
2.29.0
[dpdk-dev] [PATCH v2 2/2] ethdev: update qfi definition
qfi field is 8 bits which represent single bit for
PPP (paging Policy Presence) single bit for RQI
(Reflective QoS Indicator) and 6 bits for qfi
(QoS Flow Identifier) based on RFC 38415-g30
This update the doxygen format and the mask for qfi
to properly identify the full 8 bits of the field.
note: changing the default mask would cause different
patterns generated by testpmd.
Fixes: 346553db5bd1 ("ethdev: add GTP extension header to flow API")
Cc: ying.a.w...@intel.com
Cc: sta...@dpdk.org
Signed-off-by: Raslan Darawsheh
---
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 3 ++-
lib/librte_ethdev/rte_flow.h| 18 +++---
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index f59eb8a27d..dd39c4c3c2 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -3742,7 +3742,8 @@ This section lists supported pattern items and their
attributes, if any.
- ``gtp_psc``: match GTP PDU extension header with type 0x85.
- ``pdu_type {unsigned}``: PDU type.
- - ``qfi {unsigned}``: QoS flow identifier.
+
+ - ``qfi {unsigned}``: PPP, RQI and QoS flow identifier.
- ``pppoes``, ``pppoed``: match PPPoE header.
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index 6cc57136ac..1eb9711707 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -1421,16 +1422,27 @@ static const struct rte_flow_item_meta
rte_flow_item_meta_mask = {
*
* Matches a GTP PDU extension header with type 0x85.
*/
+RTE_STD_C11
struct rte_flow_item_gtp_psc {
- uint8_t pdu_type; /**< PDU type. */
- uint8_t qfi; /**< QoS flow identifier. */
+ union {
+ struct {
+ /*
+* These fields are retained for compatibility.
+* Please switch to the new header field below.
+*/
+ uint8_t pdu_type; /**< PDU type. */
+ uint8_t qfi; /**< PPP, RQI, QoS flow identifier. */
+
+ };
+ struct rte_gtp_psc gtp_psc;
+ };
};
/** Default mask for RTE_FLOW_ITEM_TYPE_GTP_PSC. */
#ifndef __cplusplus
static const struct rte_flow_item_gtp_psc
rte_flow_item_gtp_psc_mask = {
- .qfi = 0x3f,
+ .qfi = 0xff,
};
#endif
--
2.29.0
[dpdk-dev] [PATCH v3 0/2] fix gtp psc qfi support
This is fixing the gtp psc support to match the RFC 38415-g30 v2: introduce new header definition for gtp psc update commit msg for rte flow item change. v3: fixed typo in comment Cc relevant people. Raslan Darawsheh (2): ethdev: add new ext hdr for gtp psc ethdev: update qfi definition doc/guides/testpmd_app_ug/testpmd_funcs.rst | 3 +- lib/librte_ethdev/rte_flow.h| 18 +-- lib/librte_net/rte_gtp.h| 34 + 3 files changed, 51 insertions(+), 4 deletions(-) -- 2.29.0
[dpdk-dev] [PATCH v3 2/2] ethdev: update qfi definition
qfi field is 8 bits which represent single bit for
PPP (paging Policy Presence) single bit for RQI
(Reflective QoS Indicator) and 6 bits for qfi
(QoS Flow Identifier) based on RFC 38415-g30
This update the doxygen format and the mask for qfi
to properly identify the full 8 bits of the field.
note: changing the default mask would cause different
patterns generated by testpmd.
Fixes: 346553db5bd1 ("ethdev: add GTP extension header to flow API")
Cc: ying.a.w...@intel.com
Cc: sta...@dpdk.org
Signed-off-by: Raslan Darawsheh
---
doc/guides/testpmd_app_ug/testpmd_funcs.rst | 3 ++-
lib/librte_ethdev/rte_flow.h| 18 +++---
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
index f59eb8a27d..dd39c4c3c2 100644
--- a/doc/guides/testpmd_app_ug/testpmd_funcs.rst
+++ b/doc/guides/testpmd_app_ug/testpmd_funcs.rst
@@ -3742,7 +3742,8 @@ This section lists supported pattern items and their
attributes, if any.
- ``gtp_psc``: match GTP PDU extension header with type 0x85.
- ``pdu_type {unsigned}``: PDU type.
- - ``qfi {unsigned}``: QoS flow identifier.
+
+ - ``qfi {unsigned}``: PPP, RQI and QoS flow identifier.
- ``pppoes``, ``pppoed``: match PPPoE header.
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index 6cc57136ac..1eb9711707 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -1421,16 +1422,27 @@ static const struct rte_flow_item_meta
rte_flow_item_meta_mask = {
*
* Matches a GTP PDU extension header with type 0x85.
*/
+RTE_STD_C11
struct rte_flow_item_gtp_psc {
- uint8_t pdu_type; /**< PDU type. */
- uint8_t qfi; /**< QoS flow identifier. */
+ union {
+ struct {
+ /*
+* These fields are retained for compatibility.
+* Please switch to the new header field below.
+*/
+ uint8_t pdu_type; /**< PDU type. */
+ uint8_t qfi; /**< PPP, RQI, QoS flow identifier. */
+
+ };
+ struct rte_gtp_psc gtp_psc;
+ };
};
/** Default mask for RTE_FLOW_ITEM_TYPE_GTP_PSC. */
#ifndef __cplusplus
static const struct rte_flow_item_gtp_psc
rte_flow_item_gtp_psc_mask = {
- .qfi = 0x3f,
+ .qfi = 0xff,
};
#endif
--
2.29.0
[dpdk-dev] [PATCH v3 1/2] ethdev: add new ext hdr for gtp psc
Define new rte header for gtp PDU session container
based on RFC 38415-g30
Signed-off-by: Raslan Darawsheh
---
lib/librte_net/rte_gtp.h | 34 ++
1 file changed, 34 insertions(+)
diff --git a/lib/librte_net/rte_gtp.h b/lib/librte_net/rte_gtp.h
index 6a6f9b238d..bfaae26535 100644
--- a/lib/librte_net/rte_gtp.h
+++ b/lib/librte_net/rte_gtp.h
@@ -61,6 +61,40 @@ struct rte_gtp_hdr_ext_word {
uint8_t next_ext; /**< Next Extension Header Type. */
} __rte_packed;
+/**
+ * Optional extension for GTP with next_ext set to 0x85
+ * defined based on RFC 38415-g30.
+ */
+__extension__
+struct rte_gtp_psc {
+ uint8_t ext_hdr_len; /**< PDU ext hdr len in multiples of 4 bytes */
+ uint8_t type:4; /**< PDU type */
+ uint8_t qmp:1; /**< Qos Monitoring Packet */
+ union {
+ struct {
+ uint8_t snp:1; /**< Sequence number presence */
+ uint8_t spare_dl1:2; /**< spare down link bits */
+ };
+ struct {
+ uint8_t dl_delay_ind:1; /**< dl delay result presence */
+ uint8_t ul_delay_ind:1; /**< ul delay result presence */
+ uint8_t snp_ul1:1; /**< Sequence number presence ul */
+ };
+ };
+ union {
+ struct {
+ uint8_t ppp:1; /**< Paging policy presence */
+ uint8_t rqi:1; /**< Reflective Qos Indicator */
+ };
+ struct {
+ uint8_t n_delay_ind:1; /**< N3/N9 delay result presence
*/
+ uint8_t spare_ul2:1; /**< spare up link bits */
+ };
+ };
+ uint8_t qfi:6; /**< Qos Flow Identifier */
+ uint8_t data[0]; /**< data feilds */
+} __rte_packed;
+
/** GTP header length */
#define RTE_ETHER_GTP_HLEN \
(sizeof(struct rte_udp_hdr) + sizeof(struct rte_gtp_hdr))
--
2.29.0
[dpdk-dev] [PATCH v2] mbuf: Fix illegal pointer access to mempool members
From: wenwu ma
Before accessing the private data of mempool in
function rte_pktmbuf_priv_size() and rte_pktmbuf_data_room_size(),
it is necessary to determine whether the private data exists,
otherwise it will cause null pointer access.
Signed-off-by: wenwu ma
---
V2:
- Change the unequal sign in the judgment statement to less than sign
lib/librte_mbuf/rte_mbuf.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h
index c4c9ebfaa..6c2559550 100644
--- a/lib/librte_mbuf/rte_mbuf.h
+++ b/lib/librte_mbuf/rte_mbuf.h
@@ -811,6 +811,9 @@ rte_pktmbuf_data_room_size(struct rte_mempool *mp)
{
struct rte_pktmbuf_pool_private *mbp_priv;
+ if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private))
+ return 0;
+
mbp_priv = (struct rte_pktmbuf_pool_private *)rte_mempool_get_priv(mp);
return mbp_priv->mbuf_data_room_size;
}
@@ -832,6 +835,9 @@ rte_pktmbuf_priv_size(struct rte_mempool *mp)
{
struct rte_pktmbuf_pool_private *mbp_priv;
+ if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private))
+ return 0;
+
mbp_priv = (struct rte_pktmbuf_pool_private *)rte_mempool_get_priv(mp);
return mbp_priv->mbuf_priv_size;
}
--
2.25.1
Re: [dpdk-dev] [PATCH v3 2/4] regex/mlx5: add data path scattered mbuf process
> -Original Message- > From: Suanming Mou > Sent: Tuesday, March 30, 2021 4:39 > To: Ori Kam > Cc: dev@dpdk.org; Slava Ovsiienko ; Matan Azrad > ; Raslan Darawsheh > Subject: [PATCH v3 2/4] regex/mlx5: add data path scattered mbuf process > Nice feature, but I would fix the typos and reword a bit: > UMR WQE can convert multiple mkey's memory sapce to contiguous space. Typo: "sapce?" And rather not "convert mkey" but "present data buffers scattered within multiple mbufs with single indirect mkey". > Take advantage of the UMR WQE, scattered mbuf in one operation can be > converted to an indirect mkey. The RegEx which only accepts one mkey can > now process the whole scattered mbuf. I would add "in one operation." > > The maximum scattered mbuf can be supported in one UMR WQE is now > defined as 64. Multiple operations scattered mbufs can be add to one UMR Typos: "THE multiple", "added" I would reword - "The mbufs from multiple operations can be combined into one UMR. Also, I would add few words what UMR is. > WQE if there is enough space in the KLM array, since the operations can > address their own mbuf's content by the mkey's address and length. > However, one operation's scattered mbuf's can't be placed in two different > UMR WQE's KLM array, if the UMR WQE's KLM does not has enough free > space for one operation, a new UMR WQE will be required. I would say "the extra UMR WQE will be engaged" > > In case the UMR WQE's indirect mkey will be over wrapped by the SQ's WQE > move, the meky's index used by the UMR WQE should be the index of last typo: "meky" > the RegEX WQE in the operations. As one operation consumes one WQE set, > build the RegEx WQE by reverse helps address the mkey more efficiently. typo: TO address With best regards, Slava > Once the operations in one burst consumes multiple mkeys, when the mkey > KLM array is full, the reverse WQE set index will always be the last of the > new > mkey's for the new UMR WQE. > > In GGA mode, the SQ WQE's memory layout becomes UMR/NOP and RegEx > WQE by interleave. The UMR and RegEx WQE can be called as WQE set. The > SQ's pi and ci will also be increased as WQE set not as WQE. > > For operations don't have scattered mbuf, uses the mbuf's mkey directly, > the WQE set combination is NOP + RegEx. > For operations have scattered mubf but share the UMR WQE with others, > the WQE set combination is NOP + RegEx. > For operations complete the UMR WQE, the WQE set combination is UMR + > RegEx. > > Signed-off-by: Suanming Mou > Acked-by: Ori Kam > --- > doc/guides/regexdevs/mlx5.rst| 5 + > doc/guides/rel_notes/release_21_05.rst | 4 + > drivers/regex/mlx5/mlx5_regex.c | 9 + > drivers/regex/mlx5/mlx5_regex.h | 26 +- > drivers/regex/mlx5/mlx5_regex_control.c | 43 ++- > drivers/regex/mlx5/mlx5_regex_fastpath.c | 378 > +-- > 6 files changed, 407 insertions(+), 58 deletions(-) > > diff --git a/doc/guides/regexdevs/mlx5.rst b/doc/guides/regexdevs/mlx5.rst > index faaa6ac11d..45a0b96980 100644 > --- a/doc/guides/regexdevs/mlx5.rst > +++ b/doc/guides/regexdevs/mlx5.rst > @@ -35,6 +35,11 @@ be specified as device parameter. The RegEx device > can be probed and used with other Mellanox devices, by adding more > options in the class. > For example: ``class=net:regex`` will probe both the net PMD and the RegEx > PMD. > > +Features > + > + > +- Multi segments mbuf support. > + > Supported NICs > -- > > diff --git a/doc/guides/rel_notes/release_21_05.rst > b/doc/guides/rel_notes/release_21_05.rst > index 3c76148b11..c3d6b8e8ae 100644 > --- a/doc/guides/rel_notes/release_21_05.rst > +++ b/doc/guides/rel_notes/release_21_05.rst > @@ -119,6 +119,10 @@ New Features >* Added command to display Rx queue used descriptor count. > ``show port (port_id) rxq (queue_id) desc used count`` > > +* **Updated Mellanox RegEx PMD.** > + > + * Added support for multi segments mbuf. > + > > Removed Items > - > diff --git a/drivers/regex/mlx5/mlx5_regex.c > b/drivers/regex/mlx5/mlx5_regex.c index ac5b205fa9..82c485e50c 100644 > --- a/drivers/regex/mlx5/mlx5_regex.c > +++ b/drivers/regex/mlx5/mlx5_regex.c > @@ -199,6 +199,13 @@ mlx5_regex_pci_probe(struct rte_pci_driver > *pci_drv __rte_unused, > } > priv->regexdev->dev_ops = &mlx5_regexdev_ops; > priv->regexdev->enqueue = mlx5_regexdev_enqueue; > +#ifdef HAVE_MLX5_UMR_IMKEY > + if (!attr.umr_indirect_mkey_disabled && > + !attr.umr_modify_entity_size_disabled) > + priv->has_umr = 1; > + if (priv->has_umr) > + priv->regexdev->enqueue = mlx5_regexdev_enqueue_gga; > #endif > priv->regexdev->dequeue = mlx5_regexdev_dequeue; > priv->regexdev->device = (struct rte_device *)pci_dev; > priv->regexdev->data->dev_private = priv; @@ -213,6 +220,8 @@ > mlx5_regex_pci_probe(struct rte_pci_driver *pci_drv __rte_unused, > rte_errno = E
Re: [dpdk-dev] cryptodev: change raw data path dequeue API
> diff --git a/doc/guides/rel_notes/release_21_05.rst > b/doc/guides/rel_notes/release_21_05.rst > index 21dc6d234..b9ca0cc30 100644 > --- a/doc/guides/rel_notes/release_21_05.rst > +++ b/doc/guides/rel_notes/release_21_05.rst > @@ -130,6 +130,8 @@ ABI Changes > > * No ABI change that would break compatibility with 20.11. > > +* cryptodev: the function ``rte_cryptodev_raw_dequeue_burst`` is added a > + parameter ``max_nb_to_dequeue`` to give user a more flexible dequeue > control. > ABI changes are not allowed until 20.11, however, this change is an API change (not ABI) for an experimental API which can be allowed. Could you please move this to relevant section. @Hemant: any comments on this patch? Regards, Akhil
[dpdk-dev] [PATCH v9 0/8] Introduce event vectorization
From: Pavan Nikhilesh
In traditional event programming model, events are identified by a
flow-id and a uintptr_t. The flow-id uniquely identifies a given event
and determines the order of scheduling based on schedule type, the
uintptr_t holds a single object.
Event devices also support burst mode with configurable dequeue depth,
i.e. each dequeue call would return multiple events and each event
might be at a different stage of the pipeline.
Having a burst of events belonging to different stages in a dequeue
burst is not only difficult to vectorize but also increases the scheduler
overhead and application overhead of pipelining events further.
Using event vectors we see a performance gain of ~742.3% as shown in [1].
By introducing event vectorization, each event will be capable of holding
multiple uintptr_t of the same flow thereby allowing applications
to vectorize their pipeline and reduce the complexity of pipelining
events across multiple stages. This also reduces the complexity of handling
enqueue and dequeue on an event device.
Since event devices are transparent to the events they are scheduling
so the event producers such as eth_rx_adapter, crypto_adapter , etc..
are responsible for vectorizing the buffers of the same flow into a single
event.
The series also breaks ABI in the patch [8/8] which is targetted to the
v21.11 release.
The dpdk-test-eventdev application has been updated with options to test
multiple vector sizes and timeouts.
[1]
As for performance improvement, with a ARM Cortex-A72 equivalent processer,
software event device (--vdev=event_sw0), single worker core, single stage
and using one service core for Rx adapter, Tx adapter, Scheduling.
Without this patchset applied:
./build/app/dpdk-test-eventdev -l 7-23 -s 0x700 --vdev="event_sw0" --
--prod_type_ethdev --nb_pkts=0 --verbose 2 --test=pipeline_queue
--stlist=a --wlcores=20
Port[0] using Rx adapter[0] configured
Port[0] using Tx adapter[0] Configured
5.071 mpps
With the patchset applied and Without event vectorization:
./build/app/dpdk-test-eventdev -l 7-23 -s 0x700 --vdev="event_sw0" --
--prod_type_ethdev --nb_pkts=0 --verbose 2 --test=pipeline_queue
--stlist=a --wlcores=20
Port[0] using Rx adapter[0] configured
Port[0] using Tx adapter[0] Configured
5.123 mpps
With event vectorization:
./build/app/dpdk-test-eventdev -l 7-23 -s 0x700 --vdev="event_sw0" --
--prod_type_ethdev --nb_pkts=0 --verbose 2 --test=pipeline_queue
--stlist=a --wlcores=20 --enable_vector --nb_eth_queues 1
--vector_size 256
Port[0] using Rx adapter[0] configured
Port[0] using Tx adapter[0] Configured
42.715 mpps
Having dedicated service cores for each Rx queues and tweaking the vector,
dequeue burst size would further improve performance.
API usage is shown below:
Configuration:
struct rte_event_eth_rx_adapter_event_vector_config vec_conf;
vector_pool = rte_event_vector_pool_create("vector_pool",
nb_elem, 0, vector_size, socket_id);
rte_event_eth_rx_adapter_create(id, event_id, &adptr_conf);
rte_event_eth_rx_adapter_queue_add(id, eth_id, -1, &queue_conf);
if (cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR) {
vec_conf.vector_sz = vector_size;
vec_conf.vector_timeout_ns = vector_tmo_nsec;
vec_conf.vector_mp = vector_pool;
rte_event_eth_rx_adapter_queue_event_vector_config(id,
eth_id, -1, &vec_conf);
}
Fastpath:
num = rte_event_dequeue_burst(event_id, port_id, &ev, 1, 0);
if (!num)
continue;
if (ev.event_type & RTE_EVENT_TYPE_VECTOR) {
switch (ev.event_type) {
case RTE_EVENT_TYPE_ETHDEV_VECTOR:
case RTE_EVENT_TYPE_ETH_RX_ADAPTER_VECTOR:
struct rte_mbuf **mbufs;
mbufs = ev.vector_ev->mbufs;
for (i = 0; i < ev.vector_ev->nb_elem; i++)
//Process mbufs.
break;
case ...
}
}
...
v9 Changes:
- Update Rx adapter documentation w.r.t SW event vectorizations. (Jay)
- Push partial vectors to event device on queue delete. (Jay)
v8 Changes:
- Fix incorrect shift for vector timeout interval.(Jay)
- Code reallocation.(Jay)
v7 Changes:
- More doxygen fixes.(Jay)
- Reduce code duplication in 4/8.(Jay)
v6 Changes:
- Make rte_errno sign consistant.(Jay)
- Gramatical and doxygen fixes. (Jay)
v5 Changes:
- Make `rte_event_vector_pool_create non-inline` to ease ABI stability.(Ray)
- Move `rte_event_eth_rx_adapter_queue_event_vector_config` and
`rte_event_eth_rx_adapter_vector_limits_get` implementation to the patch
where they are initially defined.(Ray)
- Multiple gramatical and style fixes.(Jerin)
- Add missing release notes.(
[dpdk-dev] [PATCH v9 1/8] eventdev: introduce event vector capability
From: Pavan Nikhilesh
Introduce rte_event_vector datastructure which is capable of holding
multiple uintptr_t of the same flow thereby allowing applications
to vectorize their pipeline and reducing the complexity of pipelining
the events across multiple stages.
This approach also reduces the scheduling overhead on a event device.
Add a event vector mempool create handler to create mempools based on
the best mempool ops available on a given platform.
Signed-off-by: Pavan Nikhilesh
Acked-by: Jerin Jacob
Acked-by: Ray Kinsella
Acked-by: Jay Jayatheerthan
---
doc/guides/prog_guide/eventdev.rst | 36 ++-
doc/guides/rel_notes/release_21_05.rst | 8 +++
lib/librte_eventdev/rte_eventdev.c | 42 +
lib/librte_eventdev/rte_eventdev.h | 82 +-
lib/librte_eventdev/version.map| 3 +
5 files changed, 168 insertions(+), 3 deletions(-)
diff --git a/doc/guides/prog_guide/eventdev.rst
b/doc/guides/prog_guide/eventdev.rst
index ccde086f6..fda9c3743 100644
--- a/doc/guides/prog_guide/eventdev.rst
+++ b/doc/guides/prog_guide/eventdev.rst
@@ -63,13 +63,45 @@ the actual event being scheduled is. The payload is a union
of the following:
* ``uint64_t u64``
* ``void *event_ptr``
* ``struct rte_mbuf *mbuf``
+* ``struct rte_event_vector *vec``
-These three items in a union occupy the same 64 bits at the end of the
rte_event
+These four items in a union occupy the same 64 bits at the end of the rte_event
structure. The application can utilize the 64 bits directly by accessing the
-u64 variable, while the event_ptr and mbuf are provided as convenience
+u64 variable, while the event_ptr, mbuf, vec are provided as a convenience
variables. For example the mbuf pointer in the union can used to schedule a
DPDK packet.
+Event Vector
+
+
+The rte_event_vector struct contains a vector of elements defined by the event
+type specified in the ``rte_event``. The event_vector structure contains the
+following data:
+
+* ``nb_elem`` - The number of elements held within the vector.
+
+Similar to ``rte_event`` the payload of event vector is also a union, allowing
+flexibility in what the actual vector is.
+
+* ``struct rte_mbuf *mbufs[0]`` - An array of mbufs.
+* ``void *ptrs[0]`` - An array of pointers.
+* ``uint64_t *u64s[0]`` - An array of uint64_t elements.
+
+The size of the event vector is related to the total number of elements it is
+configured to hold, this is achieved by making `rte_event_vector` a variable
+length structure.
+A helper function is provided to create a mempool that holds event vector,
which
+takes name of the pool, total number of required ``rte_event_vector``,
+cache size, number of elements in each ``rte_event_vector`` and socket id.
+
+.. code-block:: c
+
+rte_event_vector_pool_create("vector_pool", nb_event_vectors, cache_sz,
+ nb_elements_per_vector, socket_id);
+
+The function ``rte_event_vector_pool_create`` creates mempool with the best
+platform mempool ops.
+
Queues
~~
diff --git a/doc/guides/rel_notes/release_21_05.rst
b/doc/guides/rel_notes/release_21_05.rst
index e2b0886a9..4cbf2769f 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -106,6 +106,14 @@ New Features
* Added support for periodic timer mode in eventdev timer adapter.
* Added support for periodic timer mode in octeontx2 event device driver.
+* **Add Event device vector capability.**
+
+ * Added ``rte_event_vector`` data structure which is capable of holding
+multiple ``uintptr_t`` of the same flow thereby allowing applications
+to vectorize their pipelines and also reduce the complexity of pipelining
+the events across multiple stages.
+ * This also reduces the scheduling overhead on a event device.
+
Removed Items
-
diff --git a/lib/librte_eventdev/rte_eventdev.c
b/lib/librte_eventdev/rte_eventdev.c
index b57363f80..be0499c52 100644
--- a/lib/librte_eventdev/rte_eventdev.c
+++ b/lib/librte_eventdev/rte_eventdev.c
@@ -1266,6 +1266,48 @@ int rte_event_dev_selftest(uint8_t dev_id)
return -ENOTSUP;
}
+struct rte_mempool *
+rte_event_vector_pool_create(const char *name, unsigned int n,
+unsigned int cache_size, uint16_t nb_elem,
+int socket_id)
+{
+ const char *mp_ops_name;
+ struct rte_mempool *mp;
+ unsigned int elt_sz;
+ int ret;
+
+ if (!nb_elem) {
+ RTE_LOG(ERR, EVENTDEV,
+ "Invalid number of elements=%d requested\n", nb_elem);
+ rte_errno = EINVAL;
+ return NULL;
+ }
+
+ elt_sz =
+ sizeof(struct rte_event_vector) + (nb_elem * sizeof(uintptr_t));
+ mp = rte_mempool_create_empty(name, n, elt_sz, cache_size, 0, socket_id,
+ 0);
+ if (mp == NULL)
+ return NULL;
+
+
[dpdk-dev] [PATCH v9 2/8] eventdev: introduce event vector Rx capability
From: Pavan Nikhilesh
Introduce event ethernet Rx adapter event vector capability.
If an event eth Rx adapter has the capability of
RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR then a given Rx queue
can be configured to enable event vectorization by passing the
flag RTE_EVENT_ETH_RX_ADAPTER_QUEUE_EVENT_VECTOR to
rte_event_eth_rx_adapter_queue_conf::rx_queue_flags while configuring
Rx adapter through rte_event_eth_rx_adapter_queue_add().
The max vector size, vector timeout define the vector size and
mempool used for allocating vector event are configured through
rte_event_eth_rx_adapter_queue_add. The element size of the element
in the vector pool should be equal to
sizeof(struct rte_event_vector) + (vector_sz * sizeof(uintptr_t))
Application can use `rte_event_vector_pool_create` to create the
vector mempool used for
rte_event_eth_rx_adapter_queue_conf::vector_mp.
The Rx adapter would be responsible for vectorizing the mbufs
based on the flow, the vector limits configured by the application
and add the vector event of mbufs to the event queue set via
rte_event_eth_rx_adapter_queue_conf::ev::queue_id.
It should also mark rte_event_vector::union_valid and fill
rte_event_vector::port, rte_event_vector::queue.
Signed-off-by: Pavan Nikhilesh
Acked-by: Jerin Jacob
Acked-by: Ray Kinsella
Acked-by: Jay Jayatheerthan
---
.../prog_guide/event_ethernet_rx_adapter.rst | 38 ++
lib/librte_eventdev/eventdev_pmd.h| 53
.../rte_event_eth_rx_adapter.c| 114 ++
.../rte_event_eth_rx_adapter.h| 105
lib/librte_eventdev/rte_eventdev.h| 30 -
lib/librte_eventdev/version.map | 2 +
6 files changed, 340 insertions(+), 2 deletions(-)
diff --git a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
index cb44ce0e4..5eefef355 100644
--- a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
+++ b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
@@ -186,3 +186,41 @@ the event buffer fill level is low. The
``rte_event_eth_rx_adapter_cb_register()`` function allow the application
to register a callback that selects which packets to enqueue to the event
device.
+
+Rx event vectorization
+~~
+
+The event devices, ethernet device pairs which support the capability
+``RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR`` can aggregate packets based on
+flow characteristics and generate a ``rte_event`` containing
``rte_event_vector``
+whose event type is either ``RTE_EVENT_TYPE_ETHDEV_VECTOR`` or
+``RTE_EVENT_TYPE_ETH_RX_ADAPTER_VECTOR``.
+The aggregation size and timeout are configurable at a queue level and the
+maximum, minimum vector sizes and timeouts vary based on the device capability
+and can be queried using ``rte_event_eth_rx_adapter_vector_limits_get``.
+The Rx adapter additionally might include useful data such as ethernet device
+port and queue identifier in the ``rte_event_vector::port`` and
+``rte_event_vector::queue`` and mark ``rte_event_vector::attr_valid`` as true.
+
+A loop processing ``rte_event_vector`` containing mbufs is shown below.
+
+.. code-block:: c
+
+event = rte_event_dequeue_burst(event_dev, event_port, &event,
+1, 0);
+if (!event)
+continue;
+
+switch (ev.event_type) {
+case RTE_EVENT_TYPE_ETH_RX_ADAPTER_VECTOR:
+case RTE_EVENT_TYPE_ETHDEV_VECTOR:
+struct rte_mbufs **mbufs;
+
+mbufs = (struct rte_mbufs **)ev[i].vec->mbufs;
+for (i = 0; i < ev.vec->nb_elem; i++) {
+/* Process each mbuf. */
+}
+break;
+case ...
+...
+}
diff --git a/lib/librte_eventdev/eventdev_pmd.h
b/lib/librte_eventdev/eventdev_pmd.h
index 7eb9a7739..9297f1433 100644
--- a/lib/librte_eventdev/eventdev_pmd.h
+++ b/lib/librte_eventdev/eventdev_pmd.h
@@ -645,6 +645,53 @@ typedef int (*eventdev_eth_rx_adapter_stats_reset)
*/
typedef int (*eventdev_selftest)(void);
+struct rte_event_eth_rx_adapter_vector_limits;
+/**
+ * Get event vector limits for a given event, ethernet device pair.
+ *
+ * @param dev
+ * Event device pointer
+ *
+ * @param eth_dev
+ * Ethernet device pointer
+ *
+ * @param[out] limits
+ * Pointer to the limits structure to be filled.
+ *
+ * @return
+ * - 0: Success.
+ * - <0: Error code returned by the driver function.
+ */
+typedef int (*eventdev_eth_rx_adapter_vector_limits_get_t)(
+ const struct rte_eventdev *dev, const struct rte_eth_dev *eth_dev,
+ struct rte_event_eth_rx_adapter_vector_limits *limits);
+
+struct rte_event_eth_rx_adapter_event_vector_config;
+/**
+ * Enable event vector on an given Rx queue of a ethernet devices belonging to
+ * the Rx adapter.
+ *
+ * @param dev
+ * Event device pointer
+ *
+ * @param eth_dev
+ * Ethernet device pointer
+ *
+ * @param r
[dpdk-dev] [PATCH v9 3/8] eventdev: introduce event vector Tx capability
From: Pavan Nikhilesh
Introduce event vector transmit capability for event eth
tx adapter.
The capability indicates that the Tx adapter is capable of
transmitting event vectors.
When rte_event_vector::union_valid is set, the Tx adapter should
transmit all the packets to the rte_event_vector::port using the
rte_event_vector::queue.
If rte_event_vector::union_valid is not set then the Tx adapter
should peek into each mbuf to get the destination port and queue
pair.
Signed-off-by: Pavan Nikhilesh
Acked-by: Jerin Jacob
Acked-by: Jay Jayatheerthan
---
doc/guides/prog_guide/event_ethernet_tx_adapter.rst | 12
lib/librte_eventdev/rte_eventdev.h | 8 +++-
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/doc/guides/prog_guide/event_ethernet_tx_adapter.rst
b/doc/guides/prog_guide/event_ethernet_tx_adapter.rst
index a8c13e136..f80d22621 100644
--- a/doc/guides/prog_guide/event_ethernet_tx_adapter.rst
+++ b/doc/guides/prog_guide/event_ethernet_tx_adapter.rst
@@ -164,3 +164,15 @@ The ``rte_event_eth_tx_adapter_stats_get()`` function
reports counters defined
in struct ``rte_event_eth_tx_adapter_stats``. The counter values are the sum of
the counts from the eventdev PMD callback if the callback is supported, and
the counts maintained by the service function, if one exists.
+
+Tx event vectorization
+~~
+
+The event device, ethernet device pairs which support the capability
+``RTE_EVENT_ETH_TX_ADAPTER_CAP_EVENT_VECTOR`` can process event vector of
mbufs.
+Additionally, application can provide a hint to the Tx adapter that all the
+mbufs are destined to the same ethernet port and queue by setting the bit
+``rte_event_vector::attr_valid`` and filling `rte_event_vector::port`` and
+``rte_event_vector::queue``.
+If ``rte_event_vector::attr_valid`` is not set then the Tx adapter should peek
+into each mbuf and transmit them to the requested ethernet port and queue pair.
diff --git a/lib/librte_eventdev/rte_eventdev.h
b/lib/librte_eventdev/rte_eventdev.h
index 936c97cc2..5f1f544cc 100644
--- a/lib/librte_eventdev/rte_eventdev.h
+++ b/lib/librte_eventdev/rte_eventdev.h
@@ -927,11 +927,13 @@ struct rte_event_vector {
/**< Indicates that the below union attributes have valid information.
*/
union {
- /* Used by Rx adapter.
+ /* Used by Rx/Tx adapter.
* Indicates that all the elements in this vector belong to the
* same port and queue pair when originating from Rx adapter,
* valid only when event type is ETHDEV_VECTOR or
* ETH_RX_ADAPTER_VECTOR.
+* Can also be used to indicate the Tx adapter the destination
+* port and queue of the mbufs in the vector
*/
struct {
uint16_t port;
@@ -1296,6 +1298,10 @@ rte_event_crypto_adapter_caps_get(uint8_t dev_id,
uint8_t cdev_id,
#define RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT 0x1
/**< This flag is sent when the PMD supports a packet transmit callback
*/
+#define RTE_EVENT_ETH_TX_ADAPTER_CAP_EVENT_VECTOR 0x2
+/**< Indicates that the Tx adapter is capable of handling event vector of
+ * mbufs.
+ */
/**
* Retrieve the event device's eth Tx adapter capabilities
--
2.17.1
[dpdk-dev] [PATCH v9 4/8] eventdev: add Rx adapter event vector support
From: Pavan Nikhilesh
Add event vector support for event eth Rx adapter, the implementation
creates vector flows based on port and queue identifier of the received
mbufs.
The flow id for SW Rx event vectorization will use 12-bits of queue
identifier and 8-bits port identifier when custom flow id is not set
for simplicity.
Signed-off-by: Pavan Nikhilesh
---
.../prog_guide/event_ethernet_rx_adapter.rst | 11 +
lib/librte_eventdev/eventdev_pmd.h| 7 +-
.../rte_event_eth_rx_adapter.c| 278 --
lib/librte_eventdev/rte_eventdev.c| 6 +-
4 files changed, 278 insertions(+), 24 deletions(-)
diff --git a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
index 5eefef355..06fa864fa 100644
--- a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
+++ b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
@@ -224,3 +224,14 @@ A loop processing ``rte_event_vector`` containing mbufs is
shown below.
case ...
...
}
+
+Rx event vectorization for SW Rx adapter
+
+
+For SW based event vectorization, i.e., when the
+``RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT`` is not set in the adapter's
+capabilities flags for a particular ethernet device, the service function
+creates a single event vector flow for all the mbufs arriving on the given
+Rx queue.
+The 20-bit event flow identifier is set to 12-bits of Rx queue identifier
+and 8-bits of ethernet device identifier.
diff --git a/lib/librte_eventdev/eventdev_pmd.h
b/lib/librte_eventdev/eventdev_pmd.h
index 9297f1433..0f724ac85 100644
--- a/lib/librte_eventdev/eventdev_pmd.h
+++ b/lib/librte_eventdev/eventdev_pmd.h
@@ -69,9 +69,10 @@ extern "C" {
} \
} while (0)
-#define RTE_EVENT_ETH_RX_ADAPTER_SW_CAP \
- ((RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID) | \
- (RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ))
+#define RTE_EVENT_ETH_RX_ADAPTER_SW_CAP
\
+ ((RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID) | \
+(RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ) | \
+(RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR))
#define RTE_EVENT_CRYPTO_ADAPTER_SW_CAP \
RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA
diff --git a/lib/librte_eventdev/rte_event_eth_rx_adapter.c
b/lib/librte_eventdev/rte_event_eth_rx_adapter.c
index ac8ba5bf0..e273b3acf 100644
--- a/lib/librte_eventdev/rte_event_eth_rx_adapter.c
+++ b/lib/librte_eventdev/rte_event_eth_rx_adapter.c
@@ -26,6 +26,10 @@
#define BATCH_SIZE 32
#define BLOCK_CNT_THRESHOLD10
#define ETH_EVENT_BUFFER_SIZE (4*BATCH_SIZE)
+#define MAX_VECTOR_SIZE1024
+#define MIN_VECTOR_SIZE4
+#define MAX_VECTOR_NS 1E9
+#define MIN_VECTOR_NS 1E5
#define ETH_RX_ADAPTER_SERVICE_NAME_LEN32
#define ETH_RX_ADAPTER_MEM_NAME_LEN32
@@ -59,6 +63,20 @@ struct eth_rx_poll_entry {
uint16_t eth_rx_qid;
};
+struct eth_rx_vector_data {
+ TAILQ_ENTRY(eth_rx_vector_data) next;
+ uint16_t port;
+ uint16_t queue;
+ uint16_t max_vector_count;
+ uint64_t event;
+ uint64_t ts;
+ uint64_t vector_timeout_ticks;
+ struct rte_mempool *vector_pool;
+ struct rte_event_vector *vector_ev;
+} __rte_cache_aligned;
+
+TAILQ_HEAD(eth_rx_vector_data_list, eth_rx_vector_data);
+
/* Instance per adapter */
struct rte_eth_event_enqueue_buffer {
/* Count of events in this buffer */
@@ -92,6 +110,14 @@ struct rte_event_eth_rx_adapter {
uint32_t wrr_pos;
/* Event burst buffer */
struct rte_eth_event_enqueue_buffer event_enqueue_buffer;
+ /* Vector enable flag */
+ uint8_t ena_vector;
+ /* Timestamp of previous vector expiry list traversal */
+ uint64_t prev_expiry_ts;
+ /* Minimum ticks to wait before traversing expiry list */
+ uint64_t vector_tmo_ticks;
+ /* vector list */
+ struct eth_rx_vector_data_list vector_list;
/* Per adapter stats */
struct rte_event_eth_rx_adapter_stats stats;
/* Block count, counts up to BLOCK_CNT_THRESHOLD */
@@ -198,9 +224,11 @@ struct eth_device_info {
struct eth_rx_queue_info {
int queue_enabled; /* True if added */
int intr_enabled;
+ uint8_t ena_vector;
uint16_t wt;/* Polling weight */
uint32_t flow_id_mask; /* Set to ~0 if app provides flow id else 0 */
uint64_t event;
+ struct eth_rx_vector_data vector_data;
};
static struct rte_event_eth_rx_adapter **event_eth_rx_adapter;
@@ -722,6 +750,9 @@ rxa_flush_event_buffer(struct rte_event_eth_rx_adapter
*rx_adapter)
&rx_adapter->event_enqueue_buffer;
struct rte_event_eth_rx_adapter_stats *stats = &rx_adapter->stats;
+ if (!buf-
[dpdk-dev] [PATCH v9 5/8] eventdev: add Tx adapter event vector support
From: Pavan Nikhilesh
Add event vector support for event eth Tx adapter, the implementation
receives events from the single linked queue and based on
rte_event_vector::attr_valid transmits the vector of mbufs to a given
port, queue pair.
Signed-off-by: Pavan Nikhilesh
Acked-by: Jay Jayatheerthan
---
.../rte_event_eth_tx_adapter.c| 66 ---
lib/librte_eventdev/rte_eventdev.c| 5 +-
2 files changed, 60 insertions(+), 11 deletions(-)
diff --git a/lib/librte_eventdev/rte_event_eth_tx_adapter.c
b/lib/librte_eventdev/rte_event_eth_tx_adapter.c
index 5b4c42dcf..db260bfb6 100644
--- a/lib/librte_eventdev/rte_event_eth_tx_adapter.c
+++ b/lib/librte_eventdev/rte_event_eth_tx_adapter.c
@@ -510,6 +510,47 @@ txa_service_buffer_retry(struct rte_mbuf **pkts, uint16_t
unsent,
stats->tx_dropped += unsent - sent;
}
+static uint16_t
+txa_process_event_vector(struct txa_service_data *txa,
+struct rte_event_vector *vec)
+{
+ struct txa_service_queue_info *tqi;
+ uint16_t port, queue, nb_tx = 0;
+ struct rte_mbuf **mbufs;
+ int i;
+
+ mbufs = (struct rte_mbuf **)vec->mbufs;
+ if (vec->attr_valid) {
+ port = vec->port;
+ queue = vec->queue;
+ tqi = txa_service_queue(txa, port, queue);
+ if (unlikely(tqi == NULL || !tqi->added)) {
+ rte_pktmbuf_free_bulk(mbufs, vec->nb_elem);
+ rte_mempool_put(rte_mempool_from_obj(vec), vec);
+ return 0;
+ }
+ for (i = 0; i < vec->nb_elem; i++) {
+ nb_tx += rte_eth_tx_buffer(port, queue, tqi->tx_buf,
+ mbufs[i]);
+ }
+ } else {
+ for (i = 0; i < vec->nb_elem; i++) {
+ port = mbufs[i]->port;
+ queue = rte_event_eth_tx_adapter_txq_get(mbufs[i]);
+ tqi = txa_service_queue(txa, port, queue);
+ if (unlikely(tqi == NULL || !tqi->added)) {
+ rte_pktmbuf_free(mbufs[i]);
+ continue;
+ }
+ nb_tx += rte_eth_tx_buffer(port, queue, tqi->tx_buf,
+ mbufs[i]);
+ }
+ }
+ rte_mempool_put(rte_mempool_from_obj(vec), vec);
+
+ return nb_tx;
+}
+
static void
txa_service_tx(struct txa_service_data *txa, struct rte_event *ev,
uint32_t n)
@@ -522,22 +563,27 @@ txa_service_tx(struct txa_service_data *txa, struct
rte_event *ev,
nb_tx = 0;
for (i = 0; i < n; i++) {
- struct rte_mbuf *m;
uint16_t port;
uint16_t queue;
struct txa_service_queue_info *tqi;
- m = ev[i].mbuf;
- port = m->port;
- queue = rte_event_eth_tx_adapter_txq_get(m);
+ if (!(ev[i].event_type & RTE_EVENT_TYPE_VECTOR)) {
+ struct rte_mbuf *m;
- tqi = txa_service_queue(txa, port, queue);
- if (unlikely(tqi == NULL || !tqi->added)) {
- rte_pktmbuf_free(m);
- continue;
- }
+ m = ev[i].mbuf;
+ port = m->port;
+ queue = rte_event_eth_tx_adapter_txq_get(m);
- nb_tx += rte_eth_tx_buffer(port, queue, tqi->tx_buf, m);
+ tqi = txa_service_queue(txa, port, queue);
+ if (unlikely(tqi == NULL || !tqi->added)) {
+ rte_pktmbuf_free(m);
+ continue;
+ }
+
+ nb_tx += rte_eth_tx_buffer(port, queue, tqi->tx_buf, m);
+ } else {
+ nb_tx += txa_process_event_vector(txa, ev[i].vec);
+ }
}
stats->tx_packets += nb_tx;
diff --git a/lib/librte_eventdev/rte_eventdev.c
b/lib/librte_eventdev/rte_eventdev.c
index 62824654b..c9bb5d227 100644
--- a/lib/librte_eventdev/rte_eventdev.c
+++ b/lib/librte_eventdev/rte_eventdev.c
@@ -196,7 +196,10 @@ rte_event_eth_tx_adapter_caps_get(uint8_t dev_id, uint16_t
eth_port_id,
if (caps == NULL)
return -EINVAL;
- *caps = 0;
+ if (dev->dev_ops->eth_tx_adapter_caps_get == NULL)
+ *caps = RTE_EVENT_ETH_TX_ADAPTER_CAP_EVENT_VECTOR;
+ else
+ *caps = 0;
return dev->dev_ops->eth_tx_adapter_caps_get ?
(*dev->dev_ops->eth_tx_adapter_caps_get)(dev,
--
2.17.1
[dpdk-dev] [PATCH v9 6/8] app/eventdev: add event vector mode in pipeline test
From: Pavan Nikhilesh
Add event vector support in pipeline tests. By default this mode
is disabled, it can be enabled by using the option --enable_vector.
example:
dpdk-test-eventdev -l 7-23 -s 0xff00 -- --prod_type_ethdev
--nb_pkts=0 --verbose 2 --test=pipeline_atq --stlist=a
--wlcores=20-23 --enable_vector
Additional options to configure vector size and vector timeout are
also implemented and can be used by specifying --vector_size and
--vector_tmo_ns
This patch also adds a new option to set the number of Rx queues
configured per event eth rx adapter.
example:
dpdk-test-eventdev -l 7-23 -s 0xff00 -- --prod_type_ethdev
--nb_pkts=0 --verbose 2 --test=pipeline_atq --stlist=a
--wlcores=20-23 --nb_eth_queues 4
Signed-off-by: Pavan Nikhilesh
Acked-by: Jerin Jacob
---
app/test-eventdev/evt_common.h | 4 +
app/test-eventdev/evt_options.c | 52
app/test-eventdev/evt_options.h | 4 +
app/test-eventdev/test_pipeline_atq.c| 310 --
app/test-eventdev/test_pipeline_common.c | 113 +++-
app/test-eventdev/test_pipeline_common.h | 18 ++
app/test-eventdev/test_pipeline_queue.c | 320 +--
doc/guides/tools/testeventdev.rst| 45 +++-
8 files changed, 811 insertions(+), 55 deletions(-)
diff --git a/app/test-eventdev/evt_common.h b/app/test-eventdev/evt_common.h
index a1da1cf11..0e228258e 100644
--- a/app/test-eventdev/evt_common.h
+++ b/app/test-eventdev/evt_common.h
@@ -58,16 +58,20 @@ struct evt_options {
uint8_t sched_type_list[EVT_MAX_STAGES];
uint16_t mbuf_sz;
uint16_t wkr_deq_dep;
+ uint16_t vector_size;
+ uint16_t eth_queues;
uint32_t nb_flows;
uint32_t tx_first;
uint32_t max_pkt_sz;
uint32_t deq_tmo_nsec;
uint32_t q_priority:1;
uint32_t fwd_latency:1;
+ uint32_t ena_vector : 1;
uint64_t nb_pkts;
uint64_t nb_timers;
uint64_t expiry_nsec;
uint64_t max_tmo_nsec;
+ uint64_t vector_tmo_nsec;
uint64_t timer_tick_nsec;
uint64_t optm_timer_tick_nsec;
enum evt_prod_type prod_type;
diff --git a/app/test-eventdev/evt_options.c b/app/test-eventdev/evt_options.c
index 0d04ea9f8..0d5540574 100644
--- a/app/test-eventdev/evt_options.c
+++ b/app/test-eventdev/evt_options.c
@@ -34,6 +34,9 @@ evt_options_default(struct evt_options *opt)
opt->max_tmo_nsec = 1E5; /* 10ns ~100us */
opt->expiry_nsec = 1E4; /* 1ns ~10us */
opt->prod_type = EVT_PROD_TYPE_SYNT;
+ opt->eth_queues = 1;
+ opt->vector_size = 64;
+ opt->vector_tmo_nsec = 100E3;
}
typedef int (*option_parser_t)(struct evt_options *opt,
@@ -257,6 +260,43 @@ evt_parse_max_pkt_sz(struct evt_options *opt, const char
*arg)
return ret;
}
+static int
+evt_parse_ena_vector(struct evt_options *opt, const char *arg __rte_unused)
+{
+ opt->ena_vector = 1;
+ return 0;
+}
+
+static int
+evt_parse_vector_size(struct evt_options *opt, const char *arg)
+{
+ int ret;
+
+ ret = parser_read_uint16(&(opt->vector_size), arg);
+
+ return ret;
+}
+
+static int
+evt_parse_vector_tmo_ns(struct evt_options *opt, const char *arg)
+{
+ int ret;
+
+ ret = parser_read_uint64(&(opt->vector_tmo_nsec), arg);
+
+ return ret;
+}
+
+static int
+evt_parse_eth_queues(struct evt_options *opt, const char *arg)
+{
+ int ret;
+
+ ret = parser_read_uint16(&(opt->eth_queues), arg);
+
+ return ret;
+}
+
static void
usage(char *program)
{
@@ -289,6 +329,10 @@ usage(char *program)
"\t--expiry_nsec : event timer expiry ns.\n"
"\t--mbuf_sz : packet mbuf size.\n"
"\t--max_pkt_sz : max packet size.\n"
+ "\t--nb_eth_queues: number of ethernet Rx queues.\n"
+ "\t--enable_vector: enable event vectorization.\n"
+ "\t--vector_size : Max vector size.\n"
+ "\t--vector_tmo_ns: Max vector timeout in nanoseconds\n"
);
printf("available tests:\n");
evt_test_dump_names();
@@ -360,6 +404,10 @@ static struct option lgopts[] = {
{ EVT_EXPIRY_NSEC, 1, 0, 0 },
{ EVT_MBUF_SZ, 1, 0, 0 },
{ EVT_MAX_PKT_SZ, 1, 0, 0 },
+ { EVT_NB_ETH_QUEUES, 1, 0, 0 },
+ { EVT_ENA_VECTOR, 0, 0, 0 },
+ { EVT_VECTOR_SZ, 1, 0, 0 },
+ { EVT_VECTOR_TMO, 1, 0, 0 },
{ EVT_HELP,0, 0, 0 },
{ NULL,0, 0, 0 }
};
@@ -394,6 +442,10 @@ evt_opts_parse_long(int opt_idx, struct evt_options *opt)
{ EVT_EXPIRY_NSEC, evt_parse_expiry_nsec},
{ EVT_MBUF_SZ, evt_parse_mbuf_sz},
{ EVT_MAX_PKT_SZ, evt_parse_max_pkt_sz},
+ { EVT_NB_ETH_QUEUES, evt_parse_eth_queues},
[dpdk-dev] [PATCH v9 7/8] doc: announce event Rx adapter config changes
From: Pavan Nikhilesh The Rx adapter event vector configuration will be merged into Rx adapter queue configuration to simplify enabling event vectorization. Signed-off-by: Pavan Nikhilesh Acked-by: Ray Kinsella Acked-by: Jerin Jacob Acked-by: Jay Jayatheerthan --- doc/guides/rel_notes/deprecation.rst | 9 + 1 file changed, 9 insertions(+) diff --git a/doc/guides/rel_notes/deprecation.rst b/doc/guides/rel_notes/deprecation.rst index 64629e064..ef6d1bb18 100644 --- a/doc/guides/rel_notes/deprecation.rst +++ b/doc/guides/rel_notes/deprecation.rst @@ -130,3 +130,12 @@ Deprecation Notices * cmdline: ``cmdline`` structure will be made opaque to hide platform-specific content. On Linux and FreeBSD, supported prior to DPDK 20.11, original structure will be kept until DPDK 21.11. + +* eventdev: The structure ``rte_event_eth_rx_adapter_queue_conf`` will be + extended to include ``rte_event_eth_rx_adapter_event_vector_config`` elements + and the function ``rte_event_eth_rx_adapter_queue_event_vector_config`` will + be removed in DPDK 21.11. + + An application can enable event vectorization by passing the desired vector + values to the function ``rte_event_eth_rx_adapter_queue_add`` using + the structure ``rte_event_eth_rx_adapter_queue_add``. -- 2.17.1
[dpdk-dev] [dpdk-dev v21.11] [PATCH v9 8/8] eventdev: simplify Rx adapter event vector config
From: Pavan Nikhilesh
Include vector configuration into the structure
``rte_event_eth_rx_adapter_queue_conf`` used when configuring rest
of the Rx adapter ethernet device Rx queue parameters.
This simplifies event vector configuration as it avoids splitting
configuration per Rx queue.
Signed-off-by: Pavan Nikhilesh
---
app/test-eventdev/test_pipeline_common.c | 16 +-
lib/librte_eventdev/eventdev_pmd.h| 29 ---
.../rte_event_eth_rx_adapter.c| 179 ++
.../rte_event_eth_rx_adapter.h| 27 ---
lib/librte_eventdev/version.map | 1 -
5 files changed, 63 insertions(+), 189 deletions(-)
diff --git a/app/test-eventdev/test_pipeline_common.c
b/app/test-eventdev/test_pipeline_common.c
index d5ef90500..76aee254b 100644
--- a/app/test-eventdev/test_pipeline_common.c
+++ b/app/test-eventdev/test_pipeline_common.c
@@ -331,7 +331,6 @@ pipeline_event_rx_adapter_setup(struct evt_options *opt,
uint8_t stride,
uint16_t prod;
struct rte_mempool *vector_pool = NULL;
struct rte_event_eth_rx_adapter_queue_conf queue_conf;
- struct rte_event_eth_rx_adapter_event_vector_config vec_conf;
memset(&queue_conf, 0,
sizeof(struct rte_event_eth_rx_adapter_queue_conf));
@@ -397,8 +396,12 @@ pipeline_event_rx_adapter_setup(struct evt_options *opt,
uint8_t stride,
}
if (cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_EVENT_VECTOR) {
+ queue_conf.vector_sz = opt->vector_size;
+ queue_conf.vector_timeout_ns =
+ opt->vector_tmo_nsec;
queue_conf.rx_queue_flags |=
RTE_EVENT_ETH_RX_ADAPTER_QUEUE_EVENT_VECTOR;
+ queue_conf.vector_mp = vector_pool;
} else {
evt_err("Rx adapter doesn't support event
vector");
return -EINVAL;
@@ -418,17 +421,6 @@ pipeline_event_rx_adapter_setup(struct evt_options *opt,
uint8_t stride,
return ret;
}
- if (opt->ena_vector) {
- vec_conf.vector_sz = opt->vector_size;
- vec_conf.vector_timeout_ns = opt->vector_tmo_nsec;
- vec_conf.vector_mp = vector_pool;
- if (rte_event_eth_rx_adapter_queue_event_vector_config(
- prod, prod, -1, &vec_conf) < 0) {
- evt_err("Failed to configure event
vectorization for Rx adapter");
- return -EINVAL;
- }
- }
-
if (!(cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT)) {
uint32_t service_id = -1U;
diff --git a/lib/librte_eventdev/eventdev_pmd.h
b/lib/librte_eventdev/eventdev_pmd.h
index 0f724ac85..63b3bc4b5 100644
--- a/lib/librte_eventdev/eventdev_pmd.h
+++ b/lib/librte_eventdev/eventdev_pmd.h
@@ -667,32 +667,6 @@ typedef int (*eventdev_eth_rx_adapter_vector_limits_get_t)(
const struct rte_eventdev *dev, const struct rte_eth_dev *eth_dev,
struct rte_event_eth_rx_adapter_vector_limits *limits);
-struct rte_event_eth_rx_adapter_event_vector_config;
-/**
- * Enable event vector on an given Rx queue of a ethernet devices belonging to
- * the Rx adapter.
- *
- * @param dev
- * Event device pointer
- *
- * @param eth_dev
- * Ethernet device pointer
- *
- * @param rx_queue_id
- * The Rx queue identifier
- *
- * @param config
- * Pointer to the event vector configuration structure.
- *
- * @return
- * - 0: Success.
- * - <0: Error code returned by the driver function.
- */
-typedef int (*eventdev_eth_rx_adapter_event_vector_config_t)(
- const struct rte_eventdev *dev, const struct rte_eth_dev *eth_dev,
- int32_t rx_queue_id,
- const struct rte_event_eth_rx_adapter_event_vector_config *config);
-
typedef uint32_t rte_event_pmd_selftest_seqn_t;
extern int rte_event_pmd_selftest_seqn_dynfield_offset;
@@ -1118,9 +1092,6 @@ struct rte_eventdev_ops {
eventdev_eth_rx_adapter_vector_limits_get_t
eth_rx_adapter_vector_limits_get;
/**< Get event vector limits for the Rx adapter */
- eventdev_eth_rx_adapter_event_vector_config_t
- eth_rx_adapter_event_vector_config;
- /**< Configure Rx adapter with event vector */
eventdev_timer_adapter_caps_get_t timer_adapter_caps_get;
/**< Get timer adapter capabilities */
diff --git a/lib/librte_eventdev/rte_event_eth_rx_adapter.c
b/lib/librte_eventdev/rte_event_eth_rx_adapter.c
index e273b3acf..5cdb3c3cb 100644
--- a/lib/librte_eventdev/rte_event_eth_rx_adapter.c
+++ b/lib/librte_eventdev/rte_event_eth_rx_adapter.c
@@ -1896,6 +1896,24 @@ rxa_add_queue(struct rte_event_eth_rx_
[dpdk-dev] [PATCH v2] net/iavf: deprecate i40evf pmd
Avf PMD was introduced from DPDK 18.02 to promote Intel Adaptive Virtual
Function with device ID is 0x1889 aligned with AVF public spec. At the
meanwhile, i40evf PMD was co-existed to support other existing device IDs
of i40e devices. So on i40e devices, iavf PMD can only run in the VM whose
hypervisor has emulated the VF’s device to 0x1889. At that time, linux
i40evf kernel driver covers device ID of i40e VF and 0x1889. Start from
ice, all the VFs will be AVF, that is to say their device ID is 0x1889.
Currently in i40e VF driver, when one new feature is added, DPDK SW need
to maintain two drivers even for one device. Validation team also need to
keep the behavior of those two drivers are the same.
Meanwhile, container deploy becomes more popular, and device ID cannot be
changed as there is no device emulate. So the user in container can only
use i40evf PMD on i40e devices, when upgrade to ice devices, driver should
be switched to iavf. That will break iavf continuity on i40e devices.
Also, one driver would force the developing the interface to be consistent
for customers using both i40e, ice and later products.
So, i40evf PMD is no need to maintain, as iavf will be used instead of
i40evf. Starting from DPDK 21.05, the default VF driver will be iavf.
Impact:
If the customers are using i40evf PMD on Intel 700 series NICs, when they
upgrade to latest DPDK SW, they do not need to modify device ID anymore.
Meanwhile, before i40evf is deleted officially, i40evf can still be used
if users specify the devarg "driver=i40evf".
Signed-off-by: Robin Zhang
---
v2:
-change default VF driver to iavf, add devarg "driver=i40evf" so that
i40evf can still be used.
---
doc/guides/rel_notes/deprecation.rst | 8 +
drivers/common/iavf/iavf_devids.h| 4 +++
drivers/net/i40e/i40e_ethdev_vf.c| 45
drivers/net/iavf/iavf_ethdev.c | 6
4 files changed, 63 insertions(+)
diff --git a/doc/guides/rel_notes/deprecation.rst
b/doc/guides/rel_notes/deprecation.rst
index 64629e0641..63b59bd2fd 100644
--- a/doc/guides/rel_notes/deprecation.rst
+++ b/doc/guides/rel_notes/deprecation.rst
@@ -130,3 +130,11 @@ Deprecation Notices
* cmdline: ``cmdline`` structure will be made opaque to hide platform-specific
content. On Linux and FreeBSD, supported prior to DPDK 20.11,
original structure will be kept until DPDK 21.11.
+
+* i40e: As there are both i40evf and iavf pmd, the functions of them are
+ duplicated. And now more and more advanced features are developed on iavf.
+ To keep consistent with kernel driver's name
+ (https://patchwork.ozlabs.org/patch/970154/), i40evf is no need to maintain.
+ Starting from 21.05, the default VF driver of i40e will be iavf, but i40evf
+ can still be used if users specify the devarg "driver=i40evf". I40evf will
+ be deleted in DPDK 21.11.
diff --git a/drivers/common/iavf/iavf_devids.h
b/drivers/common/iavf/iavf_devids.h
index 722c2e4f49..74d84a82e8 100644
--- a/drivers/common/iavf/iavf_devids.h
+++ b/drivers/common/iavf/iavf_devids.h
@@ -13,5 +13,9 @@
#define IAVF_DEV_ID_VF_HV 0x1571
#define IAVF_DEV_ID_ADAPTIVE_VF0x1889
#define IAVF_DEV_ID_X722_VF0x37CD
+#ifdef X722_A0_SUPPORT
+#define I40E_DEV_ID_X722_A0_VF 0x374D
+#endif
+
#endif /* _IAVF_DEVIDS_H_ */
diff --git a/drivers/net/i40e/i40e_ethdev_vf.c
b/drivers/net/i40e/i40e_ethdev_vf.c
index 0c9bd8d2c6..509c8f4e37 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -1656,9 +1656,53 @@ i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
return 0;
}
+static int
+i40evf_check_driver_handler(__rte_unused const char *key,
+ const char *value, __rte_unused void *opaque)
+{
+ if (strcmp(value, "i40evf"))
+ return -1;
+
+ return 0;
+}
+
+static int
+i40evf_driver_selected(struct rte_devargs *devargs)
+{
+ struct rte_kvargs *kvlist;
+ const char *key = "driver";
+ int ret = 0;
+
+ if (devargs == NULL)
+ return 0;
+
+ kvlist = rte_kvargs_parse(devargs->args, NULL);
+ if (kvlist == NULL)
+ return 0;
+
+ if (!rte_kvargs_count(kvlist, key))
+ goto exit;
+
+ /* i40evf driver selected when there's a key-value pair:
+* driver=i40evf
+*/
+ if (rte_kvargs_process(kvlist, key,
+ i40evf_check_driver_handler, NULL) < 0)
+ goto exit;
+
+ ret = 1;
+
+exit:
+ rte_kvargs_free(kvlist);
+ return ret;
+}
+
static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev)
{
+ if (!i40evf_driver_selected(pci_dev->device.devargs))
+ return 1;
+
return rte_eth_dev_pci_generic_probe(pci_dev,
sizeof(struct i40e_adapter), i40evf_dev_init);
}
@@ -1681,6 +1725,7 @@ static struct rte_pci_driver rte_i40evf_pmd =
[dpdk-dev] [PATCH] doc: update recommended matching list for i40e
As kernel driver 2.13.10 is removed by EPG, so update recommended matching list for i40e. Signed-off-by: Robin Zhang --- doc/guides/nics/i40e.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst index d86212db1a..07841dca24 100644 --- a/doc/guides/nics/i40e.rst +++ b/doc/guides/nics/i40e.rst @@ -102,7 +102,7 @@ For X710/XL710/XXV710, +==+===+==+ |21.02 | 2.14.13 | 8.00 | +--+---+--+ - |20.11 | 2.13.10 | 8.00 | + |20.11 | 2.14.13 | 8.00 | +--+---+--+ |20.08 | 2.12.6| 7.30 | +--+---+--+ -- 2.25.1
Re: [dpdk-dev] [PATCH v3 2/4] regex/mlx5: add data path scattered mbuf process
Hi Slava, > -Original Message- > From: Slava Ovsiienko > Sent: Tuesday, March 30, 2021 4:05 PM > To: Suanming Mou ; Ori Kam > Cc: dev@dpdk.org; Matan Azrad ; Raslan Darawsheh > > Subject: RE: [PATCH v3 2/4] regex/mlx5: add data path scattered mbuf process > > > -Original Message- > > From: Suanming Mou > > Sent: Tuesday, March 30, 2021 4:39 > > To: Ori Kam > > Cc: dev@dpdk.org; Slava Ovsiienko ; Matan > > Azrad ; Raslan Darawsheh > > Subject: [PATCH v3 2/4] regex/mlx5: add data path scattered mbuf > > process > > > Nice feature, but I would fix the typos and reword a bit: > > > UMR WQE can convert multiple mkey's memory sapce to contiguous space. > Typo: "sapce?" > > And rather not "convert mkey" but "present data buffers scattered within > multiple mbufs with single indirect mkey". > > > > Take advantage of the UMR WQE, scattered mbuf in one operation can be > > converted to an indirect mkey. The RegEx which only accepts one mkey > > can now process the whole scattered mbuf. > I would add "in one operation." > > > > > The maximum scattered mbuf can be supported in one UMR WQE is now > > defined as 64. Multiple operations scattered mbufs can be add to one > > UMR > Typos: "THE multiple", "added" > > I would reword - "The mbufs from multiple operations can be combined into one > UMR. Also, I would add few words what UMR is. > > > WQE if there is enough space in the KLM array, since the operations > > can address their own mbuf's content by the mkey's address and length. > > However, one operation's scattered mbuf's can't be placed in two > > different UMR WQE's KLM array, if the UMR WQE's KLM does not has > > enough free space for one operation, a new UMR WQE will be required. > I would say "the extra UMR WQE will be engaged" > > > > > In case the UMR WQE's indirect mkey will be over wrapped by the SQ's > > WQE move, the meky's index used by the UMR WQE should be the index of > > last > typo: "meky" > > > the RegEX WQE in the operations. As one operation consumes one WQE > > set, build the RegEx WQE by reverse helps address the mkey more efficiently. > typo: TO address > > With best regards, > Slava > Thanks very much for helping with the log improvement, I will wait for one or two days to see if there are other new comments and update it with the new version. BR, Suanming
[dpdk-dev] [PATCH v2] net/ice: support GTPU TEID pattern for switch filter
Enable GTPU pattern for CVL switch filter. Support teid and
qfi field of GTPU pattern. Patterns without inner l3/l4 field
support outer dst/src ip. Patterns with inner l3/l4 field only
support inner dst/src ip and inner dst/src port.
+---+-+
| Pattern | Input Set |
+---+-+
| pattern_eth_ipv4_gtpu | teid, dst/src ip|
| pattern_eth_ipv6_gtpu | teid, dst/src ip|
| pattern_eth_ipv4_gtpu_ipv4| teid, dst/src ip|
| pattern_eth_ipv4_gtpu_ipv4_tcp| teid, dst/src ip, dst/src port |
| pattern_eth_ipv4_gtpu_ipv4_udp| teid, dst/src ip, dst/src port |
| pattern_eth_ipv4_gtpu_ipv6| teid, dst/src ip|
| pattern_eth_ipv4_gtpu_ipv6_tcp| teid, dst/src ip, dst/src port |
| pattern_eth_ipv4_gtpu_ipv6_udp| teid, dst/src ip, dst/src port |
| pattern_eth_ipv6_gtpu_ipv4| teid, dst/src ip|
| pattern_eth_ipv6_gtpu_ipv4_tcp| teid, dst/src ip, dst/src port |
| pattern_eth_ipv6_gtpu_ipv4_udp| teid, dst/src ip, dst/src port |
| pattern_eth_ipv6_gtpu_ipv6| teid, dst/src ip|
| pattern_eth_ipv6_gtpu_ipv6_tcp| teid, dst/src ip, dst/src port |
| pattern_eth_ipv6_gtpu_ipv6_udp| teid, dst/src ip, dst/src port |
| pattern_eth_ipv4_gtpu_eh_ipv4 | teid, qfi, dst/src ip |
| pattern_eth_ipv4_gtpu_eh_ipv4_tcp | teid, qfi, dst/src ip, dst/src port |
| pattern_eth_ipv4_gtpu_eh_ipv4_udp | teid, qfi, dst/src ip, dst/src port |
| pattern_eth_ipv4_gtpu_eh_ipv6 | teid, qfi, dst/src ip |
| pattern_eth_ipv4_gtpu_eh_ipv6_tcp | teid, qfi, dst/src ip, dst/src port |
| pattern_eth_ipv4_gtpu_eh_ipv6_udp | teid, qfi, dst/src ip, dst/src port |
| pattern_eth_ipv6_gtpu_eh_ipv4 | teid, qfi, dst/src ip |
| pattern_eth_ipv6_gtpu_eh_ipv4_tcp | teid, qfi, dst/src ip, dst/src port |
| pattern_eth_ipv6_gtpu_eh_ipv4_udp | teid, qfi, dst/src ip, dst/src port |
| pattern_eth_ipv6_gtpu_eh_ipv6 | teid, qfi, dst/src ip |
| pattern_eth_ipv6_gtpu_eh_ipv6_tcp | teid, qfi, dst/src ip, dst/src port |
| pattern_eth_ipv6_gtpu_eh_ipv6_udp | teid, qfi, dst/src ip, dst/src port |
+---+-+
Signed-off-by: Yuying Zhang
---
doc/guides/rel_notes/release_21_05.rst | 4 +
drivers/net/ice/base/ice_protocol_type.h | 28 ++-
drivers/net/ice/base/ice_switch.c| 184 +-
drivers/net/ice/ice_switch_filter.c | 298 ++-
4 files changed, 492 insertions(+), 22 deletions(-)
diff --git a/doc/guides/rel_notes/release_21_05.rst
b/doc/guides/rel_notes/release_21_05.rst
index d1785c706f..e4ed0acb85 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -136,6 +136,10 @@ New Features
* Added flow filter to support GTPU inner L3/L4 fields matching.
+* **Updated Intel ice driver.**
+
+ * Added GTP TEID support for DCF switch filter.
+
Removed Items
-
diff --git a/drivers/net/ice/base/ice_protocol_type.h
b/drivers/net/ice/base/ice_protocol_type.h
index ee1f29d41f..077f411ebe 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -75,6 +75,30 @@ enum ice_sw_tunnel_type {
ICE_SW_TUN_GTP,
ICE_SW_TUN_IPV4_GTPU_NO_PAY,
ICE_SW_TUN_IPV6_GTPU_NO_PAY,
+ ICE_SW_TUN_IPV4_GTPU_IPV4,
+ ICE_SW_TUN_IPV4_GTPU_EH_IPV4,
+ ICE_SW_TUN_IPV4_GTPU_IPV4_UDP,
+ ICE_SW_TUN_IPV4_GTPU_EH_IPV4_UDP,
+ ICE_SW_TUN_IPV4_GTPU_IPV4_TCP,
+ ICE_SW_TUN_IPV4_GTPU_EH_IPV4_TCP,
+ ICE_SW_TUN_IPV4_GTPU_IPV6,
+ ICE_SW_TUN_IPV4_GTPU_EH_IPV6,
+ ICE_SW_TUN_IPV4_GTPU_IPV6_UDP,
+ ICE_SW_TUN_IPV4_GTPU_EH_IPV6_UDP,
+ ICE_SW_TUN_IPV4_GTPU_IPV6_TCP,
+ ICE_SW_TUN_IPV4_GTPU_EH_IPV6_TCP,
+ ICE_SW_TUN_IPV6_GTPU_IPV4,
+ ICE_SW_TUN_IPV6_GTPU_EH_IPV4,
+ ICE_SW_TUN_IPV6_GTPU_IPV4_UDP,
+ ICE_SW_TUN_IPV6_GTPU_EH_IPV4_UDP,
+ ICE_SW_TUN_IPV6_GTPU_IPV4_TCP,
+ ICE_SW_TUN_IPV6_GTPU_EH_IPV4_TCP,
+ ICE_SW_TUN_IPV6_GTPU_IPV6,
+ ICE_SW_TUN_IPV6_GTPU_EH_IPV6,
+ ICE_SW_TUN_IPV6_GTPU_IPV6_UDP,
+ ICE_SW_TUN_IPV6_GTPU_EH_IPV6_UDP,
+ ICE_SW_TUN_IPV6_GTPU_IPV6_TCP,
+ ICE_SW_TUN_IPV6_GTPU_EH_IPV6_TCP,
ICE_SW_TUN_PPPOE,
ICE_SW_TUN_PPPOE_PAY,
ICE_SW_TUN_PPPOE_IPV4,
@@ -105,10 +129,6 @@ enum ice_sw_tunnel_type {
ICE_SW_TUN_PPPOE_PAY_QINQ,
ICE_SW_TUN_PPPOE_IPV4_QINQ,
ICE_SW_TUN_PPPOE_IPV6_QINQ,
- ICE_SW_TUN_IPV4_GTPU_IPV4,
- ICE_SW_TUN_IPV4_GTPU_IPV6,
- ICE_SW_TUN_IPV6_GTPU_IPV4,
- ICE_SW_TUN_IPV6_GTPU_IPV6,
ICE_ALL_TUNNE
[dpdk-dev] [PATCH] pipeline: adjust error code for internal function
Adjusting the error code for the internal function instruction_config
to match the rest of the code which is returning a negative value on
error. Cosmetic change.
Signed-off-by: Cristian Dumitrescu
---
lib/librte_pipeline/rte_swx_pipeline.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/librte_pipeline/rte_swx_pipeline.c
b/lib/librte_pipeline/rte_swx_pipeline.c
index 48ac250c1..f46f90c34 100644
--- a/lib/librte_pipeline/rte_swx_pipeline.c
+++ b/lib/librte_pipeline/rte_swx_pipeline.c
@@ -8049,20 +8049,20 @@ instruction_config(struct rte_swx_pipeline *p,
/* Memory allocation. */
instr = calloc(n_instructions, sizeof(struct instruction));
if (!instr) {
- err = ENOMEM;
+ err = -ENOMEM;
goto error;
}
data = calloc(n_instructions, sizeof(struct instruction_data));
if (!data) {
- err = ENOMEM;
+ err = -ENOMEM;
goto error;
}
for (i = 0; i < n_instructions; i++) {
char *string = strdup(instructions[i]);
if (!string) {
- err = ENOMEM;
+ err = -ENOMEM;
goto error;
}
--
2.17.1
Re: [dpdk-dev] [PATCH v8] app/testpmd: support multi-process
On 3/30/2021 7:41 AM, Min Hu (Connor) wrote: 在 2021/3/30 11:11, Ajit Khaparde 写道: On Mon, Mar 29, 2021 at 6:48 PM Min Hu (Connor) wrote: From: Lijun Ou This patch adds multi-process support for testpmd. The test cmd example as follows: the primary cmd: ./dpdk-testpmd -a xxx --proc-type=auto -l 0-1 -- -i \ --rxq=4 --txq=4 --num-procs=2 --proc-id=0 the secondary cmd: ./dpdk-testpmd -a xxx --proc-type=auto -l 2-3 -- -i \ --rxq=4 --txq=4 --num-procs=2 --proc-id=1 Signed-off-by: Min Hu (Connor) Signed-off-by: Lijun Ou Some minor nits below. Otherwise looks fine to me. Acked-by: Ajit Khaparde Thanks Ajit. Hi, Ferruh, Should I send v9 to fix the grammar bugs in doc which Ajit point out or fix it in future? Hi Connor, if they are only outstanding issues, I can fix them while merging. --- v8: * Added warning info about queue numbers and process numbers. :::snip +* ``--rxq=N`` + + Set the number of Rx queues per port to N. N is the sum of queues used by primary + and secondary process. Primary process and secondary process should have separate + queues, and each should occupy at least one queue. Where N should be the multiple + of number of processes. of the number of processes. + +* ``--txq=N`` + + Set the number of Tx queues per port to N. N is the sum of queues used by primary + and secondary process. Primary process and secondary process should have separate + queues, and each should occupy at least one queue. Where N should be the multiple + of number of processes. of the number of processes. + +* ``--num-procs=N`` + + The number of processes which will be used. + snip +The number of rings should be a multiple of the number of processes. If not, +redundant queues will exist after queues are allocated to processes. After RSS is +enabled, packet loss occurs when traffic is sent to all processes at the same time. +Some traffic enters redundant queues and cannot be forwarded. + +Most dev ops is supported in primary and secondary process. While secondary process Most dev ops are supported in the primary and secondary process. While +is not permitted to allocate or release shared memory, so some ops are not supported +as follows: +``dev_configure`` +``dev_start`` +``dev_stop`` +``rx_queue_setup`` +``tx_queue_setup`` +``rx_queue_release`` +``tx_queue_release`` snip:::
[dpdk-dev] [Bug 600] Windows DPDK real-time priority threads causing thread starvation
https://bugs.dpdk.org/show_bug.cgi?id=600 o...@nvidia.com (o...@nvidia.com) changed: What|Removed |Added Ever confirmed|0 |1 Status|RESOLVED|CONFIRMED Resolution|FIXED |--- --- Comment #2 from o...@nvidia.com (o...@nvidia.com) --- Fix tested and approved -- You are receiving this mail because: You are the assignee for the bug.
Re: [dpdk-dev] [PATCH 0/6] bugfixes for hns3
On 3/23/2021 1:45 PM, Min Hu (Connor) wrote: This series added six bugfix patches. Chengchang Tang (3): net/hns3: fix TCP SEG and TCP CKSUM flag set net/hns3: fix Tx checksum for UDP packets with special port net/hns3: fix the long taskqueue pairs reset time Huisong Li (3): net/hns3: fix the reporting of undefined speed net/hns3: fix compiling error for using SVE algorithm net/hns3: fix link update when failed to get link info Series applied to dpdk-next-net/main, thanks.
Re: [dpdk-dev] [PATCH v8] app/testpmd: support multi-process
在 2021/3/30 18:19, Ferruh Yigit 写道: On 3/30/2021 7:41 AM, Min Hu (Connor) wrote: 在 2021/3/30 11:11, Ajit Khaparde 写道: On Mon, Mar 29, 2021 at 6:48 PM Min Hu (Connor) wrote: From: Lijun Ou This patch adds multi-process support for testpmd. The test cmd example as follows: the primary cmd: ./dpdk-testpmd -a xxx --proc-type=auto -l 0-1 -- -i \ --rxq=4 --txq=4 --num-procs=2 --proc-id=0 the secondary cmd: ./dpdk-testpmd -a xxx --proc-type=auto -l 2-3 -- -i \ --rxq=4 --txq=4 --num-procs=2 --proc-id=1 Signed-off-by: Min Hu (Connor) Signed-off-by: Lijun Ou Some minor nits below. Otherwise looks fine to me. Acked-by: Ajit Khaparde Thanks Ajit. Hi, Ferruh, Should I send v9 to fix the grammar bugs in doc which Ajit point out or fix it in future? Hi Connor, if they are only outstanding issues, I can fix them while merging. Thanks Ferruh. --- v8: * Added warning info about queue numbers and process numbers. :::snip +* ``--rxq=N`` + + Set the number of Rx queues per port to N. N is the sum of queues used by primary + and secondary process. Primary process and secondary process should have separate + queues, and each should occupy at least one queue. Where N should be the multiple + of number of processes. of the number of processes. + +* ``--txq=N`` + + Set the number of Tx queues per port to N. N is the sum of queues used by primary + and secondary process. Primary process and secondary process should have separate + queues, and each should occupy at least one queue. Where N should be the multiple + of number of processes. of the number of processes. + +* ``--num-procs=N`` + + The number of processes which will be used. + snip +The number of rings should be a multiple of the number of processes. If not, +redundant queues will exist after queues are allocated to processes. After RSS is +enabled, packet loss occurs when traffic is sent to all processes at the same time. +Some traffic enters redundant queues and cannot be forwarded. + +Most dev ops is supported in primary and secondary process. While secondary process Most dev ops are supported in the primary and secondary process. While +is not permitted to allocate or release shared memory, so some ops are not supported +as follows: +``dev_configure`` +``dev_start`` +``dev_stop`` +``rx_queue_setup`` +``tx_queue_setup`` +``rx_queue_release`` +``tx_queue_release`` snip::: .
[dpdk-dev] [PATCH v3 0/5] eal: enable global device syntax by default
The new Global Device Syntax [1] is used to identify a device with full bus, class and driver description, example: -a bus=pci,addr=82:00.0/class=eth/driver=mlx5,... This patchset fixes bugs and enable global device syntax with backward compatibility by: - unify devargs memory buffer cleanup - parse name from bus callback - try new global syntax parsing firstly and fallback to legacy parsing. History: V1: - Inital version V2: - add devargs.src as complete source dev string - change devargs.data to scratch buffer - add rte_devargs_free() to release scratch memory - change name policy to align with rte_eth_iterator_init() - remove PCI bus fix as name already resolved in rte_devargs_parse(). V3: - remove devargs.src - rename rte_devargs_free() to rte_devargs_reset() - add bus callback api to resolve devargs. [1] Global Device Syntax: https://www.dpdk.org/wp-content/uploads/sites/35/2018/10/am-07-DPDK-hotplug-20180905.pdf [2] RFC: http://patchwork.dpdk.org/project/dpdk/list/?series=14378 [3] V1: http://patchwork.dpdk.org/project/dpdk/list/?series=14610 [4] V2: http://patchwork.dpdk.org/project/dpdk/list/?series=14816 Xueming Li (5): devargs: unify scratch buffer storage devargs: fix memory leak on parsing error kvargs: add get by key function bus: add device arguments name parsing API devargs: parse global device syntax app/test-pmd/config.c| 3 +- app/test-pmd/testpmd.c | 5 +- drivers/bus/pci/pci_common.c | 1 + drivers/bus/pci/pci_params.c | 48 + drivers/bus/pci/private.h| 14 + drivers/bus/vdev/vdev.c | 10 ++-- drivers/bus/vdev/vdev_params.c | 43 +++ drivers/bus/vdev/vdev_private.h | 15 ++ drivers/net/failsafe/failsafe_args.c | 3 +- drivers/net/failsafe/failsafe_eal.c | 2 +- examples/multi_process/hotplug_mp/commands.c | 6 +-- lib/librte_eal/common/eal_common_dev.c | 9 ++-- lib/librte_eal/common/eal_common_devargs.c | 57 ++-- lib/librte_eal/common/hotplug_mp.c | 6 +-- lib/librte_eal/include/rte_bus.h | 19 +++ lib/librte_eal/include/rte_devargs.h | 18 +-- lib/librte_eal/rte_eal_exports.def | 1 + lib/librte_eal/version.map | 1 + lib/librte_ethdev/rte_ethdev.c | 8 +-- lib/librte_kvargs/rte_kvargs.c | 20 +++ lib/librte_kvargs/rte_kvargs.h | 21 lib/librte_kvargs/version.map| 1 + 22 files changed, 263 insertions(+), 48 deletions(-) -- 2.25.1
[dpdk-dev] [PATCH v3 1/5] devargs: unify scratch buffer storage
In current design, legacy parser rte_devargs_parse() saved scratch
buffer to devargs.args while new parser rte_devargs_layers_parse() saved
to devargs.data. Code using devargs had to know the difference and
cleaned up memory accordingly - error prone.
This patch unifies scratch buffer to data field, introduces
rte_devargs_reset() function to wrap the memory clean up logic.
Signed-off-by: Xueming Li
---
app/test-pmd/config.c| 3 +-
app/test-pmd/testpmd.c | 5 +--
drivers/bus/vdev/vdev.c | 9 +++---
drivers/net/failsafe/failsafe_args.c | 3 +-
drivers/net/failsafe/failsafe_eal.c | 2 +-
examples/multi_process/hotplug_mp/commands.c | 6 ++--
lib/librte_eal/common/eal_common_dev.c | 9 +++---
lib/librte_eal/common/eal_common_devargs.c | 34 +++-
lib/librte_eal/common/hotplug_mp.c | 6 ++--
lib/librte_eal/include/rte_devargs.h | 18 ---
lib/librte_eal/rte_eal_exports.def | 1 +
lib/librte_eal/version.map | 1 +
lib/librte_ethdev/rte_ethdev.c | 8 ++---
13 files changed, 59 insertions(+), 46 deletions(-)
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index ef0b9784d0..d774610419 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -509,8 +509,6 @@ device_infos_display(const char *identifier)
if (rte_devargs_parsef(&da, "%s", identifier)) {
printf("cannot parse identifier\n");
- if (da.args)
- free(da.args);
return;
}
@@ -558,6 +556,7 @@ device_infos_display(const char *identifier)
}
}
};
+ rte_devargs_reset(&da);
}
void
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 96d2e0fcec..d4be23f8f8 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -3015,8 +3015,6 @@ detach_devargs(char *identifier)
memset(&da, 0, sizeof(da));
if (rte_devargs_parsef(&da, "%s", identifier)) {
printf("cannot parse identifier\n");
- if (da.args)
- free(da.args);
return;
}
@@ -3025,6 +3023,7 @@ detach_devargs(char *identifier)
if (ports[port_id].port_status != RTE_PORT_STOPPED) {
printf("Port %u not stopped\n", port_id);
rte_eth_iterator_cleanup(&iterator);
+ rte_devargs_reset(&da);
return;
}
port_flow_flush(port_id);
@@ -3034,6 +3033,7 @@ detach_devargs(char *identifier)
if (rte_eal_hotplug_remove(da.bus->name, da.name) != 0) {
TESTPMD_LOG(ERR, "Failed to detach device %s(%s)\n",
da.name, da.bus->name);
+ rte_devargs_reset(&da);
return;
}
@@ -3042,6 +3042,7 @@ detach_devargs(char *identifier)
printf("Device %s is detached\n", identifier);
printf("Now total ports is %d\n", nb_ports);
printf("Done\n");
+ rte_devargs_reset(&da);
}
void
diff --git a/drivers/bus/vdev/vdev.c b/drivers/bus/vdev/vdev.c
index 9a673347ae..d075409942 100644
--- a/drivers/bus/vdev/vdev.c
+++ b/drivers/bus/vdev/vdev.c
@@ -245,13 +245,14 @@ alloc_devargs(const char *name, const char *args)
devargs->bus = &rte_vdev_bus;
if (args)
- devargs->args = strdup(args);
+ devargs->data = strdup(args);
else
- devargs->args = strdup("");
+ devargs->data = strdup("");
+ devargs->args = devargs->data;
ret = strlcpy(devargs->name, name, sizeof(devargs->name));
if (ret < 0 || ret >= (int)sizeof(devargs->name)) {
- free(devargs->args);
+ rte_devargs_reset(devargs);
free(devargs);
return NULL;
}
@@ -305,7 +306,7 @@ insert_vdev(const char *name, const char *args,
return 0;
fail:
- free(devargs->args);
+ rte_devargs_reset(devargs);
free(devargs);
free(dev);
return ret;
diff --git a/drivers/net/failsafe/failsafe_args.c
b/drivers/net/failsafe/failsafe_args.c
index 707490b94c..b203e02d9a 100644
--- a/drivers/net/failsafe/failsafe_args.c
+++ b/drivers/net/failsafe/failsafe_args.c
@@ -451,8 +451,7 @@ failsafe_args_free(struct rte_eth_dev *dev)
sdev->cmdline = NULL;
free(sdev->fd_str);
sdev->fd_str = NULL;
- free(sdev->devargs.args);
- sdev->devargs.args = NULL;
+ rte_devargs_reset(&sdev->devargs);
}
}
diff --git a/drivers/net/failsafe/failsafe_eal.c
b/drivers/net/failsafe/failsafe_eal.c
index b9fc508673..cb4a2abc02 100644
--- a/drivers/net/failsafe/failsafe_eal.c
+++ b/drivers
[dpdk-dev] [PATCH v3 2/5] devargs: fix memory leak on parsing error
This patch fixes memory leak in parsing error handling.
Fixes: 338327d731e6 ("devargs: add function to parse device layers")
Cc: gaetan.ri...@6wind.com
Cc: sta...@dpdk.org
Signed-off-by: Xueming Li
---
lib/librte_eal/common/eal_common_devargs.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/lib/librte_eal/common/eal_common_devargs.c
b/lib/librte_eal/common/eal_common_devargs.c
index 48f85ee9c0..e40b91ea66 100644
--- a/lib/librte_eal/common/eal_common_devargs.c
+++ b/lib/librte_eal/common/eal_common_devargs.c
@@ -60,6 +60,7 @@ rte_devargs_layers_parse(struct rte_devargs *devargs,
size_t nblayer;
size_t i = 0;
int ret = 0;
+ bool allocated_data = false;
/* Split each sub-lists. */
nblayer = devargs_layer_count(devstr);
@@ -81,6 +82,7 @@ rte_devargs_layers_parse(struct rte_devargs *devargs,
ret = -ENOMEM;
goto get_out;
}
+ allocated_data = true;
s = devargs->data;
}
@@ -163,8 +165,14 @@ rte_devargs_layers_parse(struct rte_devargs *devargs,
if (layers[i].kvlist)
rte_kvargs_free(layers[i].kvlist);
}
- if (ret != 0)
+ if (ret != 0) {
+ if (allocated_data) {
+ /* Free duplicated data. */
+ free(devargs->data);
+ devargs->data = NULL;
+ }
rte_errno = -ret;
+ }
return ret;
}
--
2.25.1
[dpdk-dev] [PATCH v3 3/5] kvargs: add get by key function
Adds a new function to get value of a specific key from kvargs list.
Signed-off-by: Xueming Li
---
lib/librte_kvargs/rte_kvargs.c | 20
lib/librte_kvargs/rte_kvargs.h | 21 +
lib/librte_kvargs/version.map | 1 +
3 files changed, 42 insertions(+)
diff --git a/lib/librte_kvargs/rte_kvargs.c b/lib/librte_kvargs/rte_kvargs.c
index ffae8914cf..40e7670ab3 100644
--- a/lib/librte_kvargs/rte_kvargs.c
+++ b/lib/librte_kvargs/rte_kvargs.c
@@ -203,6 +203,26 @@ rte_kvargs_free(struct rte_kvargs *kvlist)
free(kvlist);
}
+/* Lookup a value in an rte_kvargs list by its key. */
+const char *
+rte_kvargs_get(const struct rte_kvargs *kvlist, const char *key)
+{
+ unsigned int i;
+
+ if (!kvlist)
+ return NULL;
+ for (i = 0; i < kvlist->count; ++i) {
+ /* Allows key to be NULL. */
+ if (!key && !kvlist->pairs[i].key)
+ return kvlist->pairs[i].value;
+ if (!key || !kvlist->pairs[i].key)
+ continue;
+ if (!strcmp(kvlist->pairs[i].key, key))
+ return kvlist->pairs[i].value;
+ }
+ return NULL;
+}
+
/*
* Parse the arguments "key=value,key=value,..." string and return
* an allocated structure that contains a key/value list. Also
diff --git a/lib/librte_kvargs/rte_kvargs.h b/lib/librte_kvargs/rte_kvargs.h
index eff598e08b..cb3ea99850 100644
--- a/lib/librte_kvargs/rte_kvargs.h
+++ b/lib/librte_kvargs/rte_kvargs.h
@@ -114,6 +114,27 @@ struct rte_kvargs *rte_kvargs_parse_delim(const char *args,
*/
void rte_kvargs_free(struct rte_kvargs *kvlist);
+/**
+ * Get the value associated with a given key.
+ *
+ * If the key is NULL, the first value from the list is returned.
+ * If multiple key matches, the value of the first one is returned.
+ *
+ * The memory returned is allocated as part of the rte_kvargs structure,
+ * it must never be modified.
+ *
+ * @param kvlist
+ * A list of rte_kvargs pair of 'key=value'.
+ * @param key
+ * The matching key.
+
+ * @return
+ * NULL if no key matches the input, a value associated with a matching
+ * key otherwise.
+ */
+__rte_experimental
+const char *rte_kvargs_get(const struct rte_kvargs *kvlist, const char *key);
+
/**
* Call a handler function for each key/value matching the key
*
diff --git a/lib/librte_kvargs/version.map b/lib/librte_kvargs/version.map
index ed375bf4a3..e2bf792c60 100644
--- a/lib/librte_kvargs/version.map
+++ b/lib/librte_kvargs/version.map
@@ -12,6 +12,7 @@ DPDK_21 {
EXPERIMENTAL {
global:
+ rte_kvargs_get;
rte_kvargs_parse_delim;
rte_kvargs_strcmp;
--
2.25.1
[dpdk-dev] [PATCH v3 4/5] bus: add device arguments name parsing API
To use Global Device Syntax as devargs, name is required for device
management.
In legacy parsing API, devargs name was extracted after bus name:
bus:name,kv_params,,,
To parse new Global Device Syntax, this patch introduces new bus API to
parse devargs and update name, different bus driver might choose
different keys from parameters with unified formating, example:
-a bus=pci,addr=83:00.0/class=eth/driver=mlx5,...
name: :03:00.0
-a bus=vdev,name=pcap0/class=eth/driver=pcap,...
name:pcap0
Signed-off-by: Xueming Li
---
drivers/bus/pci/pci_common.c | 1 +
drivers/bus/pci/pci_params.c | 48 ++
drivers/bus/pci/private.h | 14 +++
drivers/bus/vdev/vdev.c| 1 +
drivers/bus/vdev/vdev_params.c | 43 +++
drivers/bus/vdev/vdev_private.h| 15 +++
lib/librte_eal/common/eal_common_devargs.c | 6 +++
lib/librte_eal/include/rte_bus.h | 19 +
8 files changed, 147 insertions(+)
diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c
index 9b8d769287..61d3f51452 100644
--- a/drivers/bus/pci/pci_common.c
+++ b/drivers/bus/pci/pci_common.c
@@ -760,6 +760,7 @@ struct rte_pci_bus rte_pci_bus = {
.dev_iterate = rte_pci_dev_iterate,
.hot_unplug_handler = pci_hot_unplug_handler,
.sigbus_handler = pci_sigbus_handler,
+ .devargs_parse = rte_pci_devargs_parse,
},
.device_list = TAILQ_HEAD_INITIALIZER(rte_pci_bus.device_list),
.driver_list = TAILQ_HEAD_INITIALIZER(rte_pci_bus.driver_list),
diff --git a/drivers/bus/pci/pci_params.c b/drivers/bus/pci/pci_params.c
index 3192e9c967..7ba9e2650f 100644
--- a/drivers/bus/pci/pci_params.c
+++ b/drivers/bus/pci/pci_params.c
@@ -8,6 +8,8 @@
#include
#include
#include
+#include
+#include
#include "private.h"
@@ -76,3 +78,49 @@ rte_pci_dev_iterate(const void *start,
rte_kvargs_free(kvargs);
return dev;
}
+
+int
+rte_pci_devargs_parse(struct rte_devargs *da)
+{
+ struct rte_kvargs *kvargs;
+ const char *addr_str;
+ struct rte_pci_addr addr;
+ int ret;
+
+ if (da == NULL)
+ return 0;
+ RTE_ASSERT(da->bus_str != NULL);
+
+ kvargs = rte_kvargs_parse(da->bus_str, NULL);
+ if (kvargs == NULL) {
+ RTE_LOG(ERR, EAL, "cannot parse argument list: %s\n",
+ da->bus_str);
+ ret = -ENODEV;
+ goto out;
+ }
+
+ addr_str = rte_kvargs_get(kvargs, pci_params_keys[RTE_PCI_PARAM_ADDR]);
+ if (addr_str == NULL) {
+ RTE_LOG(ERR, EAL, "No PCI address specified using '%s=' in:
%s\n",
+ pci_params_keys[RTE_PCI_PARAM_ADDR], da->bus_str);
+ ret = -ENODEV;
+ goto out;
+ }
+
+ ret = rte_pci_addr_parse(addr_str, &addr);
+ if (ret != 0) {
+ RTE_LOG(ERR, EAL, "PCI address invalid: %s\n", da->bus_str);
+ ret = -EINVAL;
+ goto out;
+ }
+
+ rte_pci_device_name(&addr, da->name, sizeof(da->name));
+
+ /* TODO: class parse -> driver parse */
+out:
+ if (kvargs != NULL)
+ rte_kvargs_free(kvargs);
+ if (ret != 0)
+ rte_errno = -ret;
+ return ret;
+}
diff --git a/drivers/bus/pci/private.h b/drivers/bus/pci/private.h
index f566943f5e..8bc5140e97 100644
--- a/drivers/bus/pci/private.h
+++ b/drivers/bus/pci/private.h
@@ -267,4 +267,18 @@ rte_pci_dev_iterate(const void *start,
const char *str,
const struct rte_dev_iterator *it);
+/*
+ * Parse device arguments and update name.
+ *
+ * @param da
+ * device arguments to parse.
+ *
+ * @return
+ * 0 on success.
+ * -EINVAL: kvargs string is invalid and cannot be parsed.
+ * -ENODEV: no key matching a device ID is found in the kv list.
+ */
+int
+rte_pci_devargs_parse(struct rte_devargs *da);
+
#endif /* _PCI_PRIVATE_H_ */
diff --git a/drivers/bus/vdev/vdev.c b/drivers/bus/vdev/vdev.c
index d075409942..d6f651bff2 100644
--- a/drivers/bus/vdev/vdev.c
+++ b/drivers/bus/vdev/vdev.c
@@ -634,6 +634,7 @@ static struct rte_bus rte_vdev_bus = {
.dma_unmap = vdev_dma_unmap,
.get_iommu_class = vdev_get_iommu_class,
.dev_iterate = rte_vdev_dev_iterate,
+ .devargs_parse = rte_vdev_devargs_parse,
};
RTE_REGISTER_BUS(vdev, rte_vdev_bus);
diff --git a/drivers/bus/vdev/vdev_params.c b/drivers/bus/vdev/vdev_params.c
index 6f74704d1c..3e644ade95 100644
--- a/drivers/bus/vdev/vdev_params.c
+++ b/drivers/bus/vdev/vdev_params.c
@@ -8,6 +8,9 @@
#include
#include
#include
+#include
+#include
+#include
#include "vdev_logs.h"
#include "vdev_private.h"
@@ -64,3 +67,43 @@ rte_vdev_dev_iterate(const void *start,
rte_kvargs_free(kvargs);
return dev;
}
+
+int
+rte_vdev_devargs_parse(
[dpdk-dev] [PATCH v3 5/5] devargs: parse global device syntax
When parsing a devargs, try to parse using the global device syntax
first. Fallback on legacy syntax on error.
Example of new global device syntax:
-a bus=pci,addr=82:00.0/class=eth/driver=mlx5,dv_flow_en=1
Signed-off-by: Xueming Li
---
lib/librte_eal/common/eal_common_devargs.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/lib/librte_eal/common/eal_common_devargs.c
b/lib/librte_eal/common/eal_common_devargs.c
index b4dcb0099c..236e14824e 100644
--- a/lib/librte_eal/common/eal_common_devargs.c
+++ b/lib/librte_eal/common/eal_common_devargs.c
@@ -102,7 +102,6 @@ rte_devargs_layers_parse(struct rte_devargs *devargs,
layers[i].str = s;
layers[i].kvlist = rte_kvargs_parse_delim(s, NULL, "/");
if (layers[i].kvlist == NULL) {
- RTE_LOG(ERR, EAL, "Could not parse %s\n", s);
ret = -EINVAL;
goto get_out;
}
@@ -199,6 +198,12 @@ rte_devargs_parse(struct rte_devargs *da, const char *dev)
if (da == NULL)
return -EINVAL;
+ /* First parse according global device syntax. */
+ if (rte_devargs_layers_parse(da, dev) == 0 && da->bus && da->cls)
+ return 0;
+
+ /* Otherwise fallback to legacy syntax: */
+
/* Retrieve eventual bus info */
do {
devname = dev;
--
2.25.1
Re: [dpdk-dev] [PATCH v2] ethdev: introduce enable_driver_sdk to install driver headers
On 3/24/2021 11:27 AM, Ferruh Yigit wrote:
On 3/24/2021 4:32 AM, Tyler Retzlaff wrote:
On Tue, Mar 23, 2021 at 05:04:08PM +, Ferruh Yigit wrote:
diff --git a/lib/librte_ethdev/meson.build b/lib/librte_ethdev/meson.build
index c37b2e377..4353fa6b7 100644
--- a/lib/librte_ethdev/meson.build
+++ b/lib/librte_ethdev/meson.build
@@ -20,8 +20,14 @@ headers = files('rte_ethdev.h',
'rte_mtr_driver.h',
'rte_tm.h',
'rte_tm_driver.h')
+
indirect_headers += files(
'rte_ethdev_core.h',
'rte_eth_ctrl.h')
+driver_sdk_headers += files(
+ 'ethdev_driver.h',
+ 'ethdev_pci.h',
+ 'ethdev_vdev.h')
+
deps += ['net', 'kvargs', 'meter', 'telemetry']
i feel like i missed a reply here. but just to clarify only ethdev will
be covered by this patch. inclusion of other driver headers was
discussed off list (sorry) and it emerged that it would result in
withdraw a number of driver api/abi that had not been marked as
__rte_internal.
for driver api that were being exported as 'stable' a deprecation notice
will need to be issued in order to make them part of the
driver_sdk_headers. for that reason only ethdev is being made available
under this option for now.
please ack/nack the patch as-is
I am OK the patch for the ethdev part, hence
Acked-by: Ferruh Yigit
Applied to dpdk-next-net/main, thanks.
[dpdk-dev] [PATCH] net/hns3: support wait to complete in link update API
From: Huisong Li
There are two APIs in ethdev layer to get link status of device, namely,
"rte_eth_link_get" and "rte_eth_link_get_nowait". When the device link
is unstable or auto-negotiation is in progress, the first API supports
the function of waiting for the NIC to link up, and the maximum waiting
time is 9 seconds based on DPDK Documentation. For the hns3 PMD driver,
the link can be established within 2 seconds.
Signed-off-by: Huisong Li
Signed-off-by: Min Hu (Connor)
---
drivers/net/hns3/hns3_ethdev.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
index 9c71808..4883cb7 100644
--- a/drivers/net/hns3/hns3_ethdev.c
+++ b/drivers/net/hns3/hns3_ethdev.c
@@ -2741,19 +2741,31 @@ hns3_setup_linkstatus(struct rte_eth_dev *eth_dev,
}
static int
-hns3_dev_link_update(struct rte_eth_dev *eth_dev,
-__rte_unused int wait_to_complete)
+hns3_dev_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete)
{
+#define HNS3_LINK_CHECK_INTERVAL 100 /* 100ms */
+#define HNS3_MAX_LINK_CHECK_TIMES 20 /* 2s (100 * 20ms) in total */
+
struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
+ uint32_t retry_cnt = HNS3_MAX_LINK_CHECK_TIMES;
struct hns3_mac *mac = &hw->mac;
struct rte_eth_link new_link;
int ret;
- ret = hns3_update_port_link_info(eth_dev);
- if (ret) {
- mac->link_status = ETH_LINK_DOWN;
- hns3_err(hw, "failed to get port link info, ret = %d.", ret);
- }
+ do {
+ ret = hns3_update_port_link_info(eth_dev);
+ if (ret) {
+ mac->link_status = ETH_LINK_DOWN;
+ hns3_err(hw, "failed to get port link info, ret = %d.",
+ret);
+ break;
+ }
+
+ if (!wait_to_complete || mac->link_status == ETH_LINK_UP)
+ break;
+
+ rte_delay_ms(HNS3_LINK_CHECK_INTERVAL);
+ } while (retry_cnt--);
memset(&new_link, 0, sizeof(new_link));
hns3_setup_linkstatus(eth_dev, &new_link);
--
2.7.4
Re: [dpdk-dev] [dpdk-stable] [PATCH v2 1/1] net/hinic: fix coredump when in secondary process
On 3/23/2021 1:17 PM, Guoyang Zhou wrote:
Some apps, such as fstack, will use secondary process to access the
memory of eth_dev_ops, and they want to get the info of dev, but hinic
driver does not initialized it when in secondary process.
Fixes: 66f64dd6dc86 ("net/hinic: fix secondary process")
Cc: sta...@dpdk.org
Signed-off-by: Guoyang Zhou
Applied to dpdk-next-net/main, thanks.
[dpdk-dev] [PATCH] net/mlx5: fix redundant flow after RSS expansion
When RSS expand, if there is no expansion happened but completion happened
because user only input next protocol field instead of item
i.e, ether type == 0x8100 instead of VLAN, an extra flow is created with
missing item in order to filter traffic strictly.
However, after [1] and [2] the rte_flow_item_eth itself is enough to
filter out VLAN traffic, the VLAN item is not needed.
This redundant flow will cause faiure in some scenarios on group 0 due
to they are the same FTE.
Fixes: fc2dd8dd492f ("ethdev: fix expand RSS flows")
Cc: sta...@dpdk.org
[1]:
commit 09315fc83861 ("ethdev: add VLAN attributes to ethernet and
VLAN items")
[2]:
commit 86b59a1af671 ("net/mlx5: support VLAN matching fields")
Signed-off-by: Xiaoyu Min
---
drivers/net/mlx5/mlx5_flow.c | 16
1 file changed, 16 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index c347f8130e..668c32cf51 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -385,22 +385,6 @@ mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf,
size_t size,
}
node = *next_node ? &graph[*next_node] : NULL;
};
- /* no expanded flows but we have missed item, create one rule for it */
- if (buf->entries == 1 && missed != 0) {
- elt = 2;
- lsize += elt * sizeof(*item) + user_pattern_size;
- if (lsize <= size) {
- buf->entry[buf->entries].priority = 1;
- buf->entry[buf->entries].pattern = addr;
- buf->entries++;
- flow_items[0].type = missed_item.type;
- flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
- rte_memcpy(addr, buf->entry[0].pattern,
- user_pattern_size);
- addr = (void *)(((uintptr_t)addr) + user_pattern_size);
- rte_memcpy(addr, flow_items, elt * sizeof(*item));
- }
- }
return lsize;
}
--
2.31.0
Re: [dpdk-dev] [PATCH] net/af_xdp: fix unchecked return of recvfrom()
On 3/25/2021 8:22 AM, Ciara Loftus wrote:
Coverity complains that the return value of recvfrom() in the AF_XDP
datapath is not checked. We don't care about the return value because in
the case of an error we still return 0 from the receive function to
indicate no packets were received. So to make Coverity happy we cast the
return to 'void'.
Coverity issue: 369671
Fixes: 63e8989fe5a4 ("net/af_xdp: use recvfrom instead of poll syscall")
Signed-off-by: Ciara Loftus
Applied to dpdk-next-net/main, thanks.
Re: [dpdk-dev] [PATCH 2/2] net/hns3: support IEEE 1588 PTP
On 3/26/2021 8:56 AM, Min Hu (Connor) wrote:
Add hns3 support for new ethdev APIs to enable and read IEEE1588/
802.1AS PTP timestamps.
Signed-off-by: Min Hu (Connor)
---
doc/guides/nics/features/hns3.ini | 2 +
doc/guides/nics/hns3.rst | 1 +
drivers/net/hns3/hns3_cmd.h | 33 +
drivers/net/hns3/hns3_ethdev.c| 59 +++-
drivers/net/hns3/hns3_ethdev.h| 25
drivers/net/hns3/hns3_ptp.c | 294 ++
drivers/net/hns3/hns3_regs.h | 25
drivers/net/hns3/hns3_rxtx.c | 56 +++-
drivers/net/hns3/hns3_rxtx.h | 12 ++
drivers/net/hns3/hns3_rxtx_vec.c | 19 ++-
drivers/net/hns3/meson.build | 3 +-
11 files changed, 516 insertions(+), 13 deletions(-)
create mode 100644 drivers/net/hns3/hns3_ptp.c
diff --git a/doc/guides/nics/features/hns3.ini
b/doc/guides/nics/features/hns3.ini
index 3988be4..502bfe7 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -43,6 +43,8 @@ Stats per queue = Y
FW version = Y
Registers dump = Y
Module EEPROM dump = Y
+Timesync = Y
+Timestamp offload= Y
Multiprocess aware = Y
Linux= Y
ARMv8= Y
diff --git a/doc/guides/nics/hns3.rst b/doc/guides/nics/hns3.rst
index ccd2f6f..3366562 100644
--- a/doc/guides/nics/hns3.rst
+++ b/doc/guides/nics/hns3.rst
@@ -37,6 +37,7 @@ Features of the HNS3 PMD are:
- MTU update
- NUMA support
- Generic flow API
+- IEEE1588/802.1AS timestamping
Prerequisites
-
diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h
index e704d0c..abc853b 100644
--- a/drivers/net/hns3/hns3_cmd.h
+++ b/drivers/net/hns3/hns3_cmd.h
@@ -123,6 +123,12 @@ enum hns3_opcode_type {
HNS3_OPC_CLEAR_MAC_TNL_INT = 0x0312,
HNS3_OPC_CONFIG_FEC_MODE= 0x031A,
+#ifdef RTE_LIBRTE_IEEE1588
+ /* PTP command */
+ HNS3_OPC_PTP_INT_EN = 0x0501,
+ HNS3_OPC_CFG_PTP_MODE = 0x0507,
+#endif
+
Hi Connor,
Does it needs to be a compile time configuration? What happens if it is always
enabled, or controlled by device argument?
Re: [dpdk-dev] [PATCH] net/i40e: fix inappropriate config during flow validate
> -Original Message-
> From: Yang, MurphyX
> Sent: Friday, March 19, 2021 10:44 AM
> To: dev@dpdk.org
> Cc: Yang, Qiming ; Guo, Jia ;
> Xing, Beilei ; Yang, SteveX ;
> Zhang, RobinX ; Yang, MurphyX
>
> Subject: [PATCH] net/i40e: fix inappropriate config during flow validate
>
> The configuration of FDIR input set should not be set during flow validate. It
> should be set when flow create.
>
> Fixes: fe5d0e85b713 ("net/i40e: fix flow director flex configuration")
> Fixes: 15018d79f0be ("net/i40e: add FDIR support for GTP-C and GTP-U")
>
> Signed-off-by: Murphy Yang
Acked-by: Beilei Xing
Re: [dpdk-dev] [PATCH v5 8/8] net/igc: refine debug build option
On 3/25/2021 3:43 PM, Ferruh Yigit wrote:
On 3/24/2021 8:31 PM, David Marchand wrote:
On Wed, Mar 24, 2021 at 8:27 PM Ferruh Yigit wrote:
On 3/23/2021 11:07 AM, Qi Zhang wrote:
1. replace RTE_LIBRTE_IGC_DEBUG_RX with RTE_ETHDEV_DEBUG_RX.
2. replace RTE_LIBRTE_IGC_DEBUG_TX whth RTE_ETHDEV_DEBUG_TX.
3. merge RTE_LIBRTE_ETHDEV_DEBUG into RTE_ETHDEV_DEBUG_TX
Signed-off-by: Qi Zhang
CI is reporting a build error [1], I don't reproduce the error and I assume it
is false positive but can you please check it?
Also cc'ed Zhaoyan & Aaron for the possible CI issue.
[1]
http://mails.dpdk.org/archives/test-report/2021-March/184153.html
Not sure what gcc+debug target is, but I guess it passes the old config item.
The compat stuff should be placed in rte_config.h (or something
similar to config/rte_compatibility_defines.h) and not in
lib/librte_ethdev/rte_ethdev.h.
To reproduce:
$ meson configure $HOME/builds/build-gcc-static/
-Dc_args="-DRTE_LIBRTE_ETHDEV_DEBUG=1"
$ ./devtools/test-meson-builds.sh
Thanks for the steps, I can reproduce it. The alias is not working because
'rte_ethdev.h' where the alias is defined is not included in this path.
Following update should fix it, what do you think?
diff --git a/drivers/net/e1000/base/meson.build
b/drivers/net/e1000/base/meson.build
index d13f693d3eb8..a9f92cbc4770 100644
--- a/drivers/net/e1000/base/meson.build
+++ b/drivers/net/e1000/base/meson.build
@@ -33,6 +33,6 @@ foreach flag: error_cflags
endforeach
base_lib = static_library('e1000_base', sources,
- dependencies: static_rte_eal,
+ dependencies: [static_rte_eal,static_rte_ethdev],
c_args: c_args)
base_objs = base_lib.extract_all_objects()
diff --git a/drivers/net/e1000/e1000_logs.h b/drivers/net/e1000/e1000_logs.h
index 86f546b0f9ed..210c3447c66c 100644
--- a/drivers/net/e1000/e1000_logs.h
+++ b/drivers/net/e1000/e1000_logs.h
@@ -7,6 +7,9 @@
#include
+/* included because of RTE_LIBRTE_ETHDEV_DEBUG alias */
+#include
+
extern int e1000_logtype_init;
#define PMD_INIT_LOG(level, fmt, args...) \
Hi Qi,
Can you make a new version with above fix if it makes sense?
Re: [dpdk-dev] [PATCH 2/2] net/hns3: support IEEE 1588 PTP
On 3/26/2021 8:56 AM, Min Hu (Connor) wrote: Add hns3 support for new ethdev APIs to enable and read IEEE1588/ 802.1AS PTP timestamps. Signed-off-by: Min Hu (Connor) --- doc/guides/nics/features/hns3.ini | 2 + doc/guides/nics/hns3.rst | 1 + drivers/net/hns3/hns3_cmd.h | 33 + drivers/net/hns3/hns3_ethdev.c| 59 +++- drivers/net/hns3/hns3_ethdev.h| 25 drivers/net/hns3/hns3_ptp.c | 294 ++ drivers/net/hns3/hns3_regs.h | 25 drivers/net/hns3/hns3_rxtx.c | 56 +++- drivers/net/hns3/hns3_rxtx.h | 12 ++ drivers/net/hns3/hns3_rxtx_vec.c | 19 ++- drivers/net/hns3/meson.build | 3 +- Can you please update release notes too?
Re: [dpdk-dev] [dpdk-stable] [PATCH] net/sfc: fix error path inconsistency
On 3/26/2021 9:39 AM, Ivan Malov wrote:
At the fail label, there's a statement to set general errno and
error message. However, before the label is reached, a custom
error message can be set by the code which parses actions.
This custom (action-specific) message, when present,
must not be replaced by the general one.
Fixes: 662286ae61d2 ("net/sfc: add actions parsing stub to MAE backend")
Cc: sta...@dpdk.org
Signed-off-by: Ivan Malov
Signed-off-by: Andrew Rybchenko
Reviewed-by: Andy Moreton
Applied to dpdk-next-net/main, thanks.
[dpdk-dev] [PATCH 1/3] power: refactor base frequency detection
Currently, base frequency detection code is a bit of an unmaintainable
mess that has a couple of Coverity issues (dead code, and a resource
leak). Rather than just fixing the issues and leaving the rest in place,
refactor the code in a way that makes it more maintainable and less
prone to such Coverity issues in the first place.
Coverity issue: 369693
Coverity issue: 369694
Fixes: 4db9587bbf72 ("power: check sysfs base frequency")
Cc: david.h...@intel.com
Signed-off-by: Anatoly Burakov
---
lib/librte_power/meson.build| 7 +
lib/librte_power/power_pstate_cpufreq.c | 178 ++--
2 files changed, 113 insertions(+), 72 deletions(-)
diff --git a/lib/librte_power/meson.build b/lib/librte_power/meson.build
index 9a2dcbfc7a..fd408ffd4c 100644
--- a/lib/librte_power/meson.build
+++ b/lib/librte_power/meson.build
@@ -5,6 +5,13 @@ if not is_linux
build = false
reason = 'only supported on Linux'
endif
+
+# we do some snprintf magic so silence format-nonliteral
+flag_nonliteral = '-Wno-format-nonliteral'
+if cc.has_argument(flag_nonliteral)
+ cflags += flag_nonliteral
+endif
+
sources = files('rte_power.c', 'power_acpi_cpufreq.c',
'power_kvm_vm.c', 'guest_channel.c',
'rte_power_empty_poll.c',
diff --git a/lib/librte_power/power_pstate_cpufreq.c
b/lib/librte_power/power_pstate_cpufreq.c
index 8a1fffaed5..add06720db 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -37,6 +37,13 @@
} \
} while (0)
+#define FOPEN_OR_ERR_GOTO(f, label) do { \
+ if ((f) == NULL) { \
+ RTE_LOG(ERR, POWER, "File not opened\n"); \
+ goto label; \
+ } \
+} while (0)
+
#define FOPS_OR_NULL_GOTO(ret, label) do { \
if ((ret) == NULL) { \
RTE_LOG(ERR, POWER, "fgets returns nothing\n"); \
@@ -148,93 +155,107 @@ out: close(fd);
return ret;
}
+static int
+open_core_sysfs_file(const char *template, unsigned int core, const char *mode,
+ FILE **f)
+{
+ char fullpath[PATH_MAX];
+ FILE *tmpf;
+
+ /* silenced -Wformat-nonliteral here */
+ snprintf(fullpath, sizeof(fullpath), template, core);
+ tmpf = fopen(fullpath, mode);
+ if (tmpf == NULL)
+ return -1;
+ *f = tmpf;
+
+ return 0;
+}
+
+static int
+read_core_sysfs_u32(FILE *f, uint32_t *val)
+{
+ char buf[BUFSIZ];
+ uint32_t fval;
+ char *s;
+
+ s = fgets(buf, sizeof(buf), f);
+ if (s == NULL)
+ return -1;
+
+ /* fgets puts null terminator in, but do this just in case */
+ buf[BUFSIZ - 1] = '\0';
+
+ /* strip off any terminating newlines */
+ if (strlen(buf))
+ strtok(buf, "\n");
+
+ fval = strtoul(buf, NULL, POWER_CONVERT_TO_DECIMAL);
+
+ /* write the value */
+ *val = fval;
+
+ return 0;
+}
+
/**
* It is to fopen the sys file for the future setting the lcore frequency.
*/
static int
power_init_for_setting_freq(struct pstate_power_info *pi)
{
- FILE *f_min, *f_max, *f_base = NULL, *f_base_max;
- char fullpath_min[PATH_MAX];
- char fullpath_max[PATH_MAX];
- char fullpath_base[PATH_MAX];
- char fullpath_base_max[PATH_MAX];
- char buf_base[BUFSIZ];
- char *s_base;
- char *s_base_max;
- uint32_t base_ratio = 0;
- uint32_t base_max_ratio = 0;
- uint64_t max_non_turbo = 0;
- int ret_val = 0;
-
- snprintf(fullpath_base_max,
- sizeof(fullpath_base_max),
- POWER_SYSFILE_BASE_MAX_FREQ,
- pi->lcore_id);
- f_base_max = fopen(fullpath_base_max, "r");
- FOPEN_OR_ERR_RET(f_base_max, -1);
- if (f_base_max != NULL) {
- s_base_max = fgets(buf_base, sizeof(buf_base), f_base_max);
- FOPS_OR_NULL_GOTO(s_base_max, out);
-
- buf_base[BUFSIZ-1] = '\0';
- if (strlen(buf_base))
- /* Strip off terminating '\n' */
- strtok(buf_base, "\n");
-
- base_max_ratio =
- strtoul(buf_base, NULL, POWER_CONVERT_TO_DECIMAL)
- / BUS_FREQ;
- }
-
- snprintf(fullpath_min, sizeof(fullpath_min), POWER_SYSFILE_MIN_FREQ,
- pi->lcore_id);
- f_min = fopen(fullpath_min, "rw+");
- FOPEN_OR_ERR_RET(f_min, -1);
-
- snprintf(fullpath_max, sizeof(fullpath_max), POWER_SYSFILE_MAX_FREQ,
- pi->lcore_id);
- f_max = fopen(fullpath_max, "rw+");
- if (f_max == NULL)
- fclose(f_min);
- FOPEN_OR_ERR_RET(f_max, -1);
-
- pi->f_cur_min = f_min;
- pi->f_cur_max = f_max;
-
- snprintf(fullpath_base, sizeof(fullpath_base), POWER_SYSFILE_BASE_FREQ,
-
[dpdk-dev] [PATCH 2/3] power: refactor pstate sysfs handling
Make use of new sysfs handling functions in other pstate code.
Signed-off-by: Anatoly Burakov
---
lib/librte_power/power_pstate_cpufreq.c | 177 +++-
1 file changed, 80 insertions(+), 97 deletions(-)
diff --git a/lib/librte_power/power_pstate_cpufreq.c
b/lib/librte_power/power_pstate_cpufreq.c
index add06720db..7ea1bf677a 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -198,6 +198,46 @@ read_core_sysfs_u32(FILE *f, uint32_t *val)
return 0;
}
+static int
+read_core_sysfs_s(FILE *f, char *buf, unsigned int len)
+{
+ char *s;
+
+ s = fgets(buf, len, f);
+ if (s == NULL)
+ return -1;
+
+ /* fgets puts null terminator in, but do this just in case */
+ buf[len - 1] = '\0';
+
+ /* strip off any terminating newlines */
+ if (strlen(buf))
+ strtok(buf, "\n");
+
+ return 0;
+}
+
+static int
+write_core_sysfs_s(FILE *f, const char *str)
+{
+ int ret;
+
+ ret = fseek(f, 0, SEEK_SET);
+ if (ret != 0)
+ return -1;
+
+ ret = fputs(str, f);
+ if (ret != 0)
+ return -1;
+
+ /* flush the output */
+ ret = fflush(f);
+ if (ret != 0)
+ return -1;
+
+ return 0;
+}
+
/**
* It is to fopen the sys file for the future setting the lcore frequency.
*/
@@ -399,22 +439,16 @@ set_freq_internal(struct pstate_power_info *pi, uint32_t
idx)
static int
power_set_governor_performance(struct pstate_power_info *pi)
{
- FILE *f;
+ FILE *f_governor = NULL;
int ret = -1;
char buf[BUFSIZ];
- char fullpath[PATH_MAX];
- char *s;
- int val;
- snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
- pi->lcore_id);
- f = fopen(fullpath, "rw+");
- FOPEN_OR_ERR_RET(f, ret);
+ open_core_sysfs_file(POWER_SYSFILE_GOVERNOR, pi->lcore_id, "rw+",
+ &f_governor);
+ FOPEN_OR_ERR_GOTO(f_governor, out);
- s = fgets(buf, sizeof(buf), f);
- FOPS_OR_NULL_GOTO(s, out);
- /* Strip off terminating '\n' */
- strtok(buf, "\n");
+ ret = read_core_sysfs_s(f_governor, buf, sizeof(buf));
+ FOPS_OR_ERR_GOTO(ret, out);
/* Check if current governor is performance */
if (strncmp(buf, POWER_GOVERNOR_PERF,
@@ -428,21 +462,15 @@ power_set_governor_performance(struct pstate_power_info
*pi)
strlcpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
/* Write 'performance' to the governor */
- val = fseek(f, 0, SEEK_SET);
- FOPS_OR_ERR_GOTO(val, out);
-
- val = fputs(POWER_GOVERNOR_PERF, f);
- FOPS_OR_ERR_GOTO(val, out);
-
- /* We need to flush to see if the fputs succeeds */
- val = fflush(f);
- FOPS_OR_ERR_GOTO(val, out);
+ ret = write_core_sysfs_s(f_governor, POWER_GOVERNOR_PERF);
+ FOPS_OR_ERR_GOTO(ret, out);
ret = 0;
RTE_LOG(INFO, POWER, "Power management governor of lcore %u has been "
"set to performance successfully\n", pi->lcore_id);
out:
- fclose(f);
+ if (f_governor != NULL)
+ fclose(f_governor);
return ret;
}
@@ -454,20 +482,16 @@ power_set_governor_performance(struct pstate_power_info
*pi)
static int
power_set_governor_original(struct pstate_power_info *pi)
{
- FILE *f;
+ FILE *f_governor = NULL;
int ret = -1;
char buf[BUFSIZ];
- char fullpath[PATH_MAX];
- char *s;
- int val;
- snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
- pi->lcore_id);
- f = fopen(fullpath, "rw+");
- FOPEN_OR_ERR_RET(f, ret);
+ open_core_sysfs_file(POWER_SYSFILE_GOVERNOR, pi->lcore_id, "rw+",
+ &f_governor);
+ FOPEN_OR_ERR_GOTO(f_governor, out);
- s = fgets(buf, sizeof(buf), f);
- FOPS_OR_NULL_GOTO(s, out);
+ ret = read_core_sysfs_s(f_governor, buf, sizeof(buf));
+ FOPS_OR_ERR_GOTO(ret, out);
/* Check if the governor to be set is the same as current */
if (strncmp(buf, pi->governor_ori, sizeof(pi->governor_ori)) == 0) {
@@ -479,19 +503,16 @@ power_set_governor_original(struct pstate_power_info *pi)
}
/* Write back the original governor */
- val = fseek(f, 0, SEEK_SET);
- FOPS_OR_ERR_GOTO(val, out);
-
- val = fputs(pi->governor_ori, f);
- FOPS_OR_ERR_GOTO(val, out);
+ ret = write_core_sysfs_s(f_governor, pi->governor_ori);
+ FOPS_OR_ERR_GOTO(ret, out);
ret = 0;
RTE_LOG(INFO, POWER, "Power management governor of lcore %u "
"has been set back to %s successfully\n",
pi->lcore_id, pi->governor_ori);
out:
- fclose(f);
-
+ if (f_governor != NULL)
+ fclose(f_governor);
return ret;
[dpdk-dev] [PATCH 3/3] power: do not skip saving original pstate governor
Currently, when we set the pstate governor to "performance", we check if
it is already set to this value, and if it is, we skip setting it.
However, we never save this value anywhere, so that next time we come
back and request the governor to be set to its original value, the
original value is empty.
Fix it by saving the original pstate governor first. While we're at it,
replace `strlcpy` with `strscpy`.
Signed-off-by: Anatoly Burakov
---
lib/librte_power/power_pstate_cpufreq.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/librte_power/power_pstate_cpufreq.c
b/lib/librte_power/power_pstate_cpufreq.c
index 7ea1bf677a..a7a44df23f 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -450,6 +450,9 @@ power_set_governor_performance(struct pstate_power_info *pi)
ret = read_core_sysfs_s(f_governor, buf, sizeof(buf));
FOPS_OR_ERR_GOTO(ret, out);
+ /* Save the original governor */
+ strscpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
+
/* Check if current governor is performance */
if (strncmp(buf, POWER_GOVERNOR_PERF,
sizeof(POWER_GOVERNOR_PERF)) == 0) {
@@ -458,8 +461,6 @@ power_set_governor_performance(struct pstate_power_info *pi)
"already performance\n", pi->lcore_id);
goto out;
}
- /* Save the original governor */
- strlcpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
/* Write 'performance' to the governor */
ret = write_core_sysfs_s(f_governor, POWER_GOVERNOR_PERF);
--
2.25.1
[dpdk-dev] [PATCH v2 1/3] power: refactor base frequency detection
Currently, base frequency detection code is a bit of an unmaintainable
mess that has a couple of Coverity issues (dead code, and a resource
leak). Rather than just fixing the issues and leaving the rest in place,
refactor the code in a way that makes it more maintainable and less
prone to such Coverity issues in the first place.
Coverity issue: 369693
Coverity issue: 369694
Fixes: 4db9587bbf72 ("power: check sysfs base frequency")
Cc: david.h...@intel.com
Signed-off-by: Anatoly Burakov
---
lib/librte_power/meson.build| 7 +
lib/librte_power/power_pstate_cpufreq.c | 178 ++--
2 files changed, 113 insertions(+), 72 deletions(-)
diff --git a/lib/librte_power/meson.build b/lib/librte_power/meson.build
index 9a2dcbfc7a..fd408ffd4c 100644
--- a/lib/librte_power/meson.build
+++ b/lib/librte_power/meson.build
@@ -5,6 +5,13 @@ if not is_linux
build = false
reason = 'only supported on Linux'
endif
+
+# we do some snprintf magic so silence format-nonliteral
+flag_nonliteral = '-Wno-format-nonliteral'
+if cc.has_argument(flag_nonliteral)
+ cflags += flag_nonliteral
+endif
+
sources = files('rte_power.c', 'power_acpi_cpufreq.c',
'power_kvm_vm.c', 'guest_channel.c',
'rte_power_empty_poll.c',
diff --git a/lib/librte_power/power_pstate_cpufreq.c
b/lib/librte_power/power_pstate_cpufreq.c
index 8a1fffaed5..add06720db 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -37,6 +37,13 @@
} \
} while (0)
+#define FOPEN_OR_ERR_GOTO(f, label) do { \
+ if ((f) == NULL) { \
+ RTE_LOG(ERR, POWER, "File not opened\n"); \
+ goto label; \
+ } \
+} while (0)
+
#define FOPS_OR_NULL_GOTO(ret, label) do { \
if ((ret) == NULL) { \
RTE_LOG(ERR, POWER, "fgets returns nothing\n"); \
@@ -148,93 +155,107 @@ out: close(fd);
return ret;
}
+static int
+open_core_sysfs_file(const char *template, unsigned int core, const char *mode,
+ FILE **f)
+{
+ char fullpath[PATH_MAX];
+ FILE *tmpf;
+
+ /* silenced -Wformat-nonliteral here */
+ snprintf(fullpath, sizeof(fullpath), template, core);
+ tmpf = fopen(fullpath, mode);
+ if (tmpf == NULL)
+ return -1;
+ *f = tmpf;
+
+ return 0;
+}
+
+static int
+read_core_sysfs_u32(FILE *f, uint32_t *val)
+{
+ char buf[BUFSIZ];
+ uint32_t fval;
+ char *s;
+
+ s = fgets(buf, sizeof(buf), f);
+ if (s == NULL)
+ return -1;
+
+ /* fgets puts null terminator in, but do this just in case */
+ buf[BUFSIZ - 1] = '\0';
+
+ /* strip off any terminating newlines */
+ if (strlen(buf))
+ strtok(buf, "\n");
+
+ fval = strtoul(buf, NULL, POWER_CONVERT_TO_DECIMAL);
+
+ /* write the value */
+ *val = fval;
+
+ return 0;
+}
+
/**
* It is to fopen the sys file for the future setting the lcore frequency.
*/
static int
power_init_for_setting_freq(struct pstate_power_info *pi)
{
- FILE *f_min, *f_max, *f_base = NULL, *f_base_max;
- char fullpath_min[PATH_MAX];
- char fullpath_max[PATH_MAX];
- char fullpath_base[PATH_MAX];
- char fullpath_base_max[PATH_MAX];
- char buf_base[BUFSIZ];
- char *s_base;
- char *s_base_max;
- uint32_t base_ratio = 0;
- uint32_t base_max_ratio = 0;
- uint64_t max_non_turbo = 0;
- int ret_val = 0;
-
- snprintf(fullpath_base_max,
- sizeof(fullpath_base_max),
- POWER_SYSFILE_BASE_MAX_FREQ,
- pi->lcore_id);
- f_base_max = fopen(fullpath_base_max, "r");
- FOPEN_OR_ERR_RET(f_base_max, -1);
- if (f_base_max != NULL) {
- s_base_max = fgets(buf_base, sizeof(buf_base), f_base_max);
- FOPS_OR_NULL_GOTO(s_base_max, out);
-
- buf_base[BUFSIZ-1] = '\0';
- if (strlen(buf_base))
- /* Strip off terminating '\n' */
- strtok(buf_base, "\n");
-
- base_max_ratio =
- strtoul(buf_base, NULL, POWER_CONVERT_TO_DECIMAL)
- / BUS_FREQ;
- }
-
- snprintf(fullpath_min, sizeof(fullpath_min), POWER_SYSFILE_MIN_FREQ,
- pi->lcore_id);
- f_min = fopen(fullpath_min, "rw+");
- FOPEN_OR_ERR_RET(f_min, -1);
-
- snprintf(fullpath_max, sizeof(fullpath_max), POWER_SYSFILE_MAX_FREQ,
- pi->lcore_id);
- f_max = fopen(fullpath_max, "rw+");
- if (f_max == NULL)
- fclose(f_min);
- FOPEN_OR_ERR_RET(f_max, -1);
-
- pi->f_cur_min = f_min;
- pi->f_cur_max = f_max;
-
- snprintf(fullpath_base, sizeof(fullpath_base), POWER_SYSFILE_BASE_FREQ,
-
[dpdk-dev] [PATCH v2 2/3] power: refactor pstate sysfs handling
Make use of new sysfs handling functions in other pstate code.
Signed-off-by: Anatoly Burakov
---
lib/librte_power/power_pstate_cpufreq.c | 177 +++-
1 file changed, 80 insertions(+), 97 deletions(-)
diff --git a/lib/librte_power/power_pstate_cpufreq.c
b/lib/librte_power/power_pstate_cpufreq.c
index add06720db..7ea1bf677a 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -198,6 +198,46 @@ read_core_sysfs_u32(FILE *f, uint32_t *val)
return 0;
}
+static int
+read_core_sysfs_s(FILE *f, char *buf, unsigned int len)
+{
+ char *s;
+
+ s = fgets(buf, len, f);
+ if (s == NULL)
+ return -1;
+
+ /* fgets puts null terminator in, but do this just in case */
+ buf[len - 1] = '\0';
+
+ /* strip off any terminating newlines */
+ if (strlen(buf))
+ strtok(buf, "\n");
+
+ return 0;
+}
+
+static int
+write_core_sysfs_s(FILE *f, const char *str)
+{
+ int ret;
+
+ ret = fseek(f, 0, SEEK_SET);
+ if (ret != 0)
+ return -1;
+
+ ret = fputs(str, f);
+ if (ret != 0)
+ return -1;
+
+ /* flush the output */
+ ret = fflush(f);
+ if (ret != 0)
+ return -1;
+
+ return 0;
+}
+
/**
* It is to fopen the sys file for the future setting the lcore frequency.
*/
@@ -399,22 +439,16 @@ set_freq_internal(struct pstate_power_info *pi, uint32_t
idx)
static int
power_set_governor_performance(struct pstate_power_info *pi)
{
- FILE *f;
+ FILE *f_governor = NULL;
int ret = -1;
char buf[BUFSIZ];
- char fullpath[PATH_MAX];
- char *s;
- int val;
- snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
- pi->lcore_id);
- f = fopen(fullpath, "rw+");
- FOPEN_OR_ERR_RET(f, ret);
+ open_core_sysfs_file(POWER_SYSFILE_GOVERNOR, pi->lcore_id, "rw+",
+ &f_governor);
+ FOPEN_OR_ERR_GOTO(f_governor, out);
- s = fgets(buf, sizeof(buf), f);
- FOPS_OR_NULL_GOTO(s, out);
- /* Strip off terminating '\n' */
- strtok(buf, "\n");
+ ret = read_core_sysfs_s(f_governor, buf, sizeof(buf));
+ FOPS_OR_ERR_GOTO(ret, out);
/* Check if current governor is performance */
if (strncmp(buf, POWER_GOVERNOR_PERF,
@@ -428,21 +462,15 @@ power_set_governor_performance(struct pstate_power_info
*pi)
strlcpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
/* Write 'performance' to the governor */
- val = fseek(f, 0, SEEK_SET);
- FOPS_OR_ERR_GOTO(val, out);
-
- val = fputs(POWER_GOVERNOR_PERF, f);
- FOPS_OR_ERR_GOTO(val, out);
-
- /* We need to flush to see if the fputs succeeds */
- val = fflush(f);
- FOPS_OR_ERR_GOTO(val, out);
+ ret = write_core_sysfs_s(f_governor, POWER_GOVERNOR_PERF);
+ FOPS_OR_ERR_GOTO(ret, out);
ret = 0;
RTE_LOG(INFO, POWER, "Power management governor of lcore %u has been "
"set to performance successfully\n", pi->lcore_id);
out:
- fclose(f);
+ if (f_governor != NULL)
+ fclose(f_governor);
return ret;
}
@@ -454,20 +482,16 @@ power_set_governor_performance(struct pstate_power_info
*pi)
static int
power_set_governor_original(struct pstate_power_info *pi)
{
- FILE *f;
+ FILE *f_governor = NULL;
int ret = -1;
char buf[BUFSIZ];
- char fullpath[PATH_MAX];
- char *s;
- int val;
- snprintf(fullpath, sizeof(fullpath), POWER_SYSFILE_GOVERNOR,
- pi->lcore_id);
- f = fopen(fullpath, "rw+");
- FOPEN_OR_ERR_RET(f, ret);
+ open_core_sysfs_file(POWER_SYSFILE_GOVERNOR, pi->lcore_id, "rw+",
+ &f_governor);
+ FOPEN_OR_ERR_GOTO(f_governor, out);
- s = fgets(buf, sizeof(buf), f);
- FOPS_OR_NULL_GOTO(s, out);
+ ret = read_core_sysfs_s(f_governor, buf, sizeof(buf));
+ FOPS_OR_ERR_GOTO(ret, out);
/* Check if the governor to be set is the same as current */
if (strncmp(buf, pi->governor_ori, sizeof(pi->governor_ori)) == 0) {
@@ -479,19 +503,16 @@ power_set_governor_original(struct pstate_power_info *pi)
}
/* Write back the original governor */
- val = fseek(f, 0, SEEK_SET);
- FOPS_OR_ERR_GOTO(val, out);
-
- val = fputs(pi->governor_ori, f);
- FOPS_OR_ERR_GOTO(val, out);
+ ret = write_core_sysfs_s(f_governor, pi->governor_ori);
+ FOPS_OR_ERR_GOTO(ret, out);
ret = 0;
RTE_LOG(INFO, POWER, "Power management governor of lcore %u "
"has been set back to %s successfully\n",
pi->lcore_id, pi->governor_ori);
out:
- fclose(f);
-
+ if (f_governor != NULL)
+ fclose(f_governor);
return ret;
[dpdk-dev] [PATCH v2 3/3] power: do not skip saving original pstate governor
Currently, when we set the pstate governor to "performance", we check if
it is already set to this value, and if it is, we skip setting it.
However, we never save this value anywhere, so that next time we come
back and request the governor to be set to its original value, the
original value is empty.
Fix it by saving the original pstate governor first. While we're at it,
replace `strlcpy` with `rte_strscpy`.
Signed-off-by: Anatoly Burakov
---
lib/librte_power/power_pstate_cpufreq.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/librte_power/power_pstate_cpufreq.c
b/lib/librte_power/power_pstate_cpufreq.c
index 7ea1bf677a..db7856dadc 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -450,6 +450,9 @@ power_set_governor_performance(struct pstate_power_info *pi)
ret = read_core_sysfs_s(f_governor, buf, sizeof(buf));
FOPS_OR_ERR_GOTO(ret, out);
+ /* Save the original governor */
+ rte_strscpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
+
/* Check if current governor is performance */
if (strncmp(buf, POWER_GOVERNOR_PERF,
sizeof(POWER_GOVERNOR_PERF)) == 0) {
@@ -458,8 +461,6 @@ power_set_governor_performance(struct pstate_power_info *pi)
"already performance\n", pi->lcore_id);
goto out;
}
- /* Save the original governor */
- strlcpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
/* Write 'performance' to the governor */
ret = write_core_sysfs_s(f_governor, POWER_GOVERNOR_PERF);
--
2.25.1
Re: [dpdk-dev] [PATCH v2] app/testpmd: fix Tx/Rx descriptor query error log
On 3/29/2021 7:46 AM, Min Hu (Connor) wrote:
From: Hongbo Zheng
This patch adds more err info for Tx/Rx descriptor query command.
Fixes: fae9aa717d6c ("app/testpmd: support checking descriptor status")
Cc: sta...@dpdk.org
Signed-off-by: Hongbo Zheng
Signed-off-by: Min Hu (Connor)
Off the topic.
This is the patch 9 in patchwork!
Thanks to everyone who contributed!
https://patches.dpdk.org/api/1.2/patches/9/
The historical numbers from DPDK patchwork:
9 - March 29, 2021 (172 days) [ 5 months and 21 days / 24 weeks and 4 days ]
8 - Oct. 8, 2020 (153 days)
7 - May8, 2020 (224 days)
6 - Sept. 27, 2019 (248 days)
5 - Jan. 22, 2019 (253 days)
4 - May 14, 2018 (217 days)
3 - Oct. 9, 2017 (258 days)
2 - Jan. 25, 2017 (372 days)
1 - Jan. 20, 2016 (645 days)
1 - April 16, 2014
Another 10K of patches faster than rough average ~250 days, assuming v20.11 LTS
workload contributed to this stat but not investigated deeply.
Thanks again to all contributors.
Re: [dpdk-dev] [PATCH v2] app/testpmd: fix Tx/Rx descriptor query error log
On 3/29/2021 8:07 AM, Li, Xiaoyun wrote:
Hi
-Original Message-
From: Min Hu (Connor)
Sent: Monday, March 29, 2021 14:47
To: dev@dpdk.org
Cc: Yigit, Ferruh ; Li, Xiaoyun
Subject: [PATCH v2] app/testpmd: fix Tx/Rx descriptor query error log
From: Hongbo Zheng
This patch adds more err info for Tx/Rx descriptor query command.
Fixes: fae9aa717d6c ("app/testpmd: support checking descriptor status")
Cc: sta...@dpdk.org
Signed-off-by: Hongbo Zheng
Signed-off-by: Min Hu (Connor) >
Acked-by: Xiaoyun Li
Applied to dpdk-next-net/main, thanks.
Re: [dpdk-dev] [RFC 0/4] SocketPair Broker support for vhost and virtio-user.
On Thu, Mar 25, 2021 at 06:58:56PM +0100, Ilya Maximets wrote: > On 3/25/21 5:43 PM, Stefan Hajnoczi wrote: > > On Thu, Mar 25, 2021 at 12:00:11PM +0100, Ilya Maximets wrote: > >> On 3/25/21 10:35 AM, Stefan Hajnoczi wrote: > >>> On Wed, Mar 24, 2021 at 02:11:31PM +0100, Ilya Maximets wrote: > On 3/24/21 1:05 PM, Stefan Hajnoczi wrote: > > On Tue, Mar 23, 2021 at 04:54:57PM -0400, Billy McFall wrote: > >> On Tue, Mar 23, 2021 at 3:52 PM Ilya Maximets > >> wrote: > >>> On 3/23/21 6:57 PM, Adrian Moreno wrote: > On 3/19/21 6:21 PM, Stefan Hajnoczi wrote: > > On Fri, Mar 19, 2021 at 04:29:21PM +0100, Ilya Maximets wrote: > >> On 3/19/21 3:05 PM, Stefan Hajnoczi wrote: > >>> On Thu, Mar 18, 2021 at 08:47:12PM +0100, Ilya Maximets wrote: > On 3/18/21 6:52 PM, Stefan Hajnoczi wrote: > > On Wed, Mar 17, 2021 at 09:25:26PM +0100, Ilya Maximets wrote: > - How to get this fd again after the OVS restart? CNI will not be > invoked > at this point to pass a new fd. > > - If application will close the connection for any reason (restart, some > reconfiguration internal to the application) and OVS will be re-started > at the same time, abstract socket will be gone. Need a persistent > daemon > to hold it. > >>> > >>> I remembered that these two points can be solved by sd_notify(3) > >>> FDSTORE=1. This requires that OVS runs as a systemd service. Not sure if > >>> this is the case (at least in the CNI use case)? > >>> > >>> https://www.freedesktop.org/software/systemd/man/sd_notify.html > >> > >> IIUC, these file descriptors only passed on the restart of the service, > >> so port-del + port-add scenario is not covered (and this is a very > >> common usecase, users are implementing some configuration changes this > >> way and also this is internally possible scenario, e.g. this sequence > >> will be triggered internally to change the OpenFlow port number). > >> port-del will release all the resources including the listening socket. > >> Keeping the fd for later use is not an option, because OVS will not know > >> if this port will be added back or not and fds is a limited resource. > > > > If users of the CNI plugin are reasonably expected to do this then it > > sounds like a blocker for the sd_notify(3) approach. Maybe it could be > > fixed by introducing an atomic port-rename (?) operation, but this is > > starting to sound too invasive. > > It's hard to implement, actually. Things like 'port-rename' will > be internally implemented as del+add in most cases. Otherwise, it > will require a significant rework of OVS internals. > There are things that could be adjusted on the fly, but some > fundamental parts like OF port number that every other part depends > on are not easy to change. I see. In that case the sd_notify(3) approach won't work. > >> OVS could run as a system pod or as a systemd service. It differs from > >> one setup to another. So it might not be controlled by systemd. > > > > Does the CNI plugin allow both configurations? > > CNI runs as a DaemonSet (pod on each node) by itself, and it doesn't > matter if OVS is running on the host or in a different pod. Okay. > > > > It's impossible to come up with one approach that works for everyone in > > the general case (beyond the CNI plugin, beyond Kubernetes). > > If we're looking for a solution to store abstract sockets somehow > for OVS then it's hard to came up with something generic. It will > have dependency on specific init system anyway. > > OTOH, Broker solution will work for all cases. :) One may think > of a broker as a service that supplies abstract sockets for processes > from different namespaces. These sockets are already connected, for > convenience. I'm not sure what we're trying to come up with :). I haven't figured out how much of what has been discussed is cosmetic and nice-to-have stuff versus what is a real problem that needs a solution. >From the vhost-user point of view I would prefer to stick to the existing UNIX domain socket approach. Any additional mechanism adds extra complexity, won't be supported by all software, requires educating users and developers, requires building new vhost-user application container images, etc. IMO it's only worth doing if there is a real problem with UNIX domain sockets that cannot be solved without introducing a new connection mechanism. Stefan
Re: [dpdk-dev] [PATCH 0/6] test: refactor crypto unit test framework
Hey Aaron, based on the work you've been doing on the unit test documentation we would appreciate if you could take a look over this patchset and get your thoughts. The primary drive here is to make it easier to get a clear picture of what is being executed in the cryptodev testsuite, as at the moment there are test suites masquerading as unit tests and the output doesn't reflect the actual number of unit tests being executed. Thanks Declan On 16/03/2021 2:32 PM, Ciara Power wrote: The current crypto unit test framework is not granular enough to accurately track unit test results. This is caused by one testcase in a suite actually running multiple testcases, but only returning one result. The approach taken in this patchset allows a test suite have either a list of sub-testsuites, or a list of testcases as previously used. The unit test suite runner can then recursively iterate and run the sub-testsuites, until it reaches a suite with testcases, and it then runs each testcase as it had done previously. By allowing this further breakdown into sub-testsuites, a refactor of the crypto unit tests solves the issue of inaccurate reporting, as sub-testsuites can be used in place of the testcases that had multiple testcases hidden on a sub level. The blockcipher tests previously had these hidden testcases, but are now sub-testsuites that are dynamically created and added to a parent test suite, allowing for each testcase status to be reported directly to the runner. The cryptodev test suite is broken down into smaller suites that are used as sub-testsuites, which allows for more flexibility choosing which sub-testsuites should run for the current device autotest. The introduction of sub-testsuites also allows for more precise setup/teardown functions, rather than general ones loaded with conditions as was seen with the initial setup function used for all crypto testsuites. For example, when running the cryptodev_aesni_mb_autotest, the AESNI MB parent test suite has its own setup function to initialise the AESNI MB device. Various sub-testsuites are added to the parent test suite, such as some of the static suites that were once in the cryptodev_testsuite, and blockcipher suites. The unit test runner can then run the AESNI MB parent test suite, which in turn will run the sub-testsuites. Documentation will be added in a later version of the patchset, adding to the test document that isn't yet merged. [1] --- [1] https://patchwork.dpdk.org/project/dpdk/patch/20210309155757.615536-1-acon...@redhat.com/ Ciara Power (6): app/test: refactor of unit test suite runner test: introduce parent testsuite format test/crypto: refactor to use sub-testsuites test/crypto: move testsuite params to header file test/crypto: dynamically build blockcipher suite doc: add unit test suite change to release notes app/test/test.c| 168 +- app/test/test.h| 22 +- app/test/test_bitratestats.c |4 +- app/test/test_compressdev.c|4 +- app/test/test_cryptodev.c | 2020 ++-- app/test/test_cryptodev.h | 20 + app/test/test_cryptodev_asym.c | 105 +- app/test/test_cryptodev_blockcipher.c | 121 +- app/test/test_cryptodev_blockcipher.h | 12 +- app/test/test_ethdev_link.c|4 +- app/test/test_event_crypto_adapter.c |4 +- app/test/test_event_eth_rx_adapter.c |8 +- app/test/test_event_eth_tx_adapter.c |4 +- app/test/test_event_timer_adapter.c|4 +- app/test/test_eventdev.c |4 +- app/test/test_fbarray.c|4 +- app/test/test_fib.c|8 +- app/test/test_fib6.c |8 +- app/test/test_graph.c |4 +- app/test/test_graph_perf.c |4 +- app/test/test_ipfrag.c |4 +- app/test/test_ipsec.c | 36 +- app/test/test_ipsec_sad.c |4 +- app/test/test_latencystats.c |4 +- app/test/test_link_bonding.c |4 +- app/test/test_link_bonding_mode4.c |4 +- app/test/test_link_bonding_rssconf.c |4 +- app/test/test_metrics.c|4 +- app/test/test_pmd_ring.c |4 +- app/test/test_reorder.c|4 +- app/test/test_rib.c|8 +- app/test/test_rib6.c |8 +- app/test/test_security.c |4 +- app/test/test_service_cores.c |4 +- app/test/test_trace.c |4 +- doc/guides/rel_notes/release_21_05.rst |5 + 36 files changed, 1898 insertions(+), 739 deletions(-)
Re: [dpdk-dev] [PATCH v2 3/3] power: do not skip saving original pstate governor
On 30-Mar-21 3:25 PM, Anatoly Burakov wrote:
Currently, when we set the pstate governor to "performance", we check if
it is already set to this value, and if it is, we skip setting it.
However, we never save this value anywhere, so that next time we come
back and request the governor to be set to its original value, the
original value is empty.
Fix it by saving the original pstate governor first. While we're at it,
replace `strlcpy` with `rte_strscpy`.
Signed-off-by: Anatoly Burakov
---
lib/librte_power/power_pstate_cpufreq.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/librte_power/power_pstate_cpufreq.c
b/lib/librte_power/power_pstate_cpufreq.c
index 7ea1bf677a..db7856dadc 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -450,6 +450,9 @@ power_set_governor_performance(struct pstate_power_info *pi)
ret = read_core_sysfs_s(f_governor, buf, sizeof(buf));
FOPS_OR_ERR_GOTO(ret, out);
+ /* Save the original governor */
+ rte_strscpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
+
/* Check if current governor is performance */
if (strncmp(buf, POWER_GOVERNOR_PERF,
sizeof(POWER_GOVERNOR_PERF)) == 0) {
@@ -458,8 +461,6 @@ power_set_governor_performance(struct pstate_power_info *pi)
"already performance\n", pi->lcore_id);
goto out;
}
- /* Save the original governor */
- strlcpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
/* Write 'performance' to the governor */
ret = write_core_sysfs_s(f_governor, POWER_GOVERNOR_PERF);
Fixes: e6c6dc0f96c8 ("power: add p-state driver compatibility")
--
Thanks,
Anatoly
Re: [dpdk-dev] [PATCH 3/3] power: do not skip saving original pstate governor
On 30-Mar-21 3:15 PM, Anatoly Burakov wrote:
Currently, when we set the pstate governor to "performance", we check if
it is already set to this value, and if it is, we skip setting it.
However, we never save this value anywhere, so that next time we come
back and request the governor to be set to its original value, the
original value is empty.
Fix it by saving the original pstate governor first. While we're at it,
replace `strlcpy` with `strscpy`.
Signed-off-by: Anatoly Burakov
---
lib/librte_power/power_pstate_cpufreq.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/lib/librte_power/power_pstate_cpufreq.c
b/lib/librte_power/power_pstate_cpufreq.c
index 7ea1bf677a..a7a44df23f 100644
--- a/lib/librte_power/power_pstate_cpufreq.c
+++ b/lib/librte_power/power_pstate_cpufreq.c
@@ -450,6 +450,9 @@ power_set_governor_performance(struct pstate_power_info *pi)
ret = read_core_sysfs_s(f_governor, buf, sizeof(buf));
FOPS_OR_ERR_GOTO(ret, out);
+ /* Save the original governor */
+ strscpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
+
/* Check if current governor is performance */
if (strncmp(buf, POWER_GOVERNOR_PERF,
sizeof(POWER_GOVERNOR_PERF)) == 0) {
@@ -458,8 +461,6 @@ power_set_governor_performance(struct pstate_power_info *pi)
"already performance\n", pi->lcore_id);
goto out;
}
- /* Save the original governor */
- strlcpy(pi->governor_ori, buf, sizeof(pi->governor_ori));
/* Write 'performance' to the governor */
ret = write_core_sysfs_s(f_governor, POWER_GOVERNOR_PERF);
Forgot rte_ with strscpy...
--
Thanks,
Anatoly
[dpdk-dev] [PATCH 1/1] app/test: fix TCP header initialization
Initialize TCP data offset field with TCP header length, this
field is used to derive L4 header length and by hardware to
validate a TCP header.
Fixes: 41f72ec94074 ("test: add packet burst generator functions")
Cc: sta...@dpdk.org
Signed-off-by: Lance Richardson
---
app/test/packet_burst_generator.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/app/test/packet_burst_generator.c
b/app/test/packet_burst_generator.c
index 8b390853a2..0fd7290b0e 100644
--- a/app/test/packet_burst_generator.c
+++ b/app/test/packet_burst_generator.c
@@ -117,6 +117,7 @@ initialize_tcp_header(struct rte_tcp_hdr *tcp_hdr, uint16_t
src_port,
memset(tcp_hdr, 0, sizeof(struct rte_tcp_hdr));
tcp_hdr->src_port = rte_cpu_to_be_16(src_port);
tcp_hdr->dst_port = rte_cpu_to_be_16(dst_port);
+ tcp_hdr->data_off = (sizeof(struct rte_tcp_hdr) << 2) & 0xF0;
return pkt_len;
}
--
2.25.1
[dpdk-dev] [PATCH v2 01/27] event/dlb2: add v2.5 probe
This commit adds dlb v2.5 probe support, and updates
parameter parsing.
The dlb v2.5 device differs from dlb v2, in that the
number of resources (ports, queues, ...) is different,
so macros have been added to take the device version
into account.
This commit also cleans up a few issues in the original
dlb2 source:
- eliminate duplicate constant definitions
- removed unused constant definitions
- remove #ifdef FPGA
- remove unused include file, dlb2_mbox.h
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/dlb2.c | 99 +++-
drivers/event/dlb2/dlb2_priv.h | 151 --
drivers/event/dlb2/dlb2_xstats.c | 37 +-
drivers/event/dlb2/pf/base/dlb2_hw_types.h | 68 +--
drivers/event/dlb2/pf/base/dlb2_mbox.h | 596 -
drivers/event/dlb2/pf/base/dlb2_resource.c | 48 +-
drivers/event/dlb2/pf/dlb2_pf.c| 62 ++-
7 files changed, 318 insertions(+), 743 deletions(-)
delete mode 100644 drivers/event/dlb2/pf/base/dlb2_mbox.h
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index fb5ff012a..7f5b9141b 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -59,7 +59,8 @@ static struct rte_event_dev_info evdev_dlb2_default_info = {
.max_event_port_enqueue_depth = DLB2_MAX_ENQUEUE_DEPTH,
.max_event_port_links = DLB2_MAX_NUM_QIDS_PER_LDB_CQ,
.max_num_events = DLB2_MAX_NUM_LDB_CREDITS,
- .max_single_link_event_port_queue_pairs = DLB2_MAX_NUM_DIR_PORTS,
+ .max_single_link_event_port_queue_pairs =
+ DLB2_MAX_NUM_DIR_PORTS(DLB2_HW_V2),
.event_dev_cap = (RTE_EVENT_DEV_CAP_QUEUE_QOS |
RTE_EVENT_DEV_CAP_EVENT_QOS |
RTE_EVENT_DEV_CAP_BURST_MODE |
@@ -69,7 +70,7 @@ static struct rte_event_dev_info evdev_dlb2_default_info = {
};
struct process_local_port_data
-dlb2_port[DLB2_MAX_NUM_PORTS][DLB2_NUM_PORT_TYPES];
+dlb2_port[DLB2_MAX_NUM_PORTS_ALL][DLB2_NUM_PORT_TYPES];
static void
dlb2_free_qe_mem(struct dlb2_port *qm_port)
@@ -97,7 +98,7 @@ dlb2_init_queue_depth_thresholds(struct dlb2_eventdev *dlb2,
{
int q;
- for (q = 0; q < DLB2_MAX_NUM_QUEUES; q++) {
+ for (q = 0; q < DLB2_MAX_NUM_QUEUES(dlb2->version); q++) {
if (qid_depth_thresholds[q] != 0)
dlb2->ev_queues[q].depth_threshold =
qid_depth_thresholds[q];
@@ -247,9 +248,9 @@ set_num_dir_credits(const char *key __rte_unused,
return ret;
if (*num_dir_credits < 0 ||
- *num_dir_credits > DLB2_MAX_NUM_DIR_CREDITS) {
+ *num_dir_credits > DLB2_MAX_NUM_DIR_CREDITS(DLB2_HW_V2)) {
DLB2_LOG_ERR("dlb2: num_dir_credits must be between 0 and %d\n",
-DLB2_MAX_NUM_DIR_CREDITS);
+DLB2_MAX_NUM_DIR_CREDITS(DLB2_HW_V2));
return -EINVAL;
}
@@ -306,7 +307,6 @@ set_cos(const char *key __rte_unused,
return 0;
}
-
static int
set_qid_depth_thresh(const char *key __rte_unused,
const char *value,
@@ -327,7 +327,7 @@ set_qid_depth_thresh(const char *key __rte_unused,
*/
if (sscanf(value, "all:%d", &thresh) == 1) {
first = 0;
- last = DLB2_MAX_NUM_QUEUES - 1;
+ last = DLB2_MAX_NUM_QUEUES(DLB2_HW_V2) - 1;
} else if (sscanf(value, "%d-%d:%d", &first, &last, &thresh) == 3) {
/* we have everything we need */
} else if (sscanf(value, "%d:%d", &first, &thresh) == 2) {
@@ -337,7 +337,56 @@ set_qid_depth_thresh(const char *key __rte_unused,
return -EINVAL;
}
- if (first > last || first < 0 || last >= DLB2_MAX_NUM_QUEUES) {
+ if (first > last || first < 0 ||
+ last >= DLB2_MAX_NUM_QUEUES(DLB2_HW_V2)) {
+ DLB2_LOG_ERR("Error parsing qid depth devarg, invalid qid
value\n");
+ return -EINVAL;
+ }
+
+ if (thresh < 0 || thresh > DLB2_MAX_QUEUE_DEPTH_THRESHOLD) {
+ DLB2_LOG_ERR("Error parsing qid depth devarg, threshold > %d\n",
+DLB2_MAX_QUEUE_DEPTH_THRESHOLD);
+ return -EINVAL;
+ }
+
+ for (i = first; i <= last; i++)
+ qid_thresh->val[i] = thresh; /* indexed by qid */
+
+ return 0;
+}
+
+static int
+set_qid_depth_thresh_v2_5(const char *key __rte_unused,
+ const char *value,
+ void *opaque)
+{
+ struct dlb2_qid_depth_thresholds *qid_thresh = opaque;
+ int first, last, thresh, i;
+
+ if (value == NULL || opaque == NULL) {
+ DLB2_LOG_ERR("NULL pointer\n");
+ return -EINVAL;
+ }
+
+ /* command line override may take one of the following 3 forms:
+* qid_depth_thresh=all: ... all queues
+* qid_depth_thresh=qidA-qidB: ... a range of queue
[dpdk-dev] [PATCH v2 00/27] Add DLB V2.5
This patch series adds support for DLB v2.5 to
the current DLB V2.0 PMD. The resulting PMD supports
both hardware versions.
The main differences between the DLB v2.5 and v2.0 hardware
are:
- Number of queues/ports
- DLB v2.5 uses a combined credit pool, whereas DLB v2.0
splits credits into 2 pools, a directed credit pool and a
load balanced credit pool.
- Different register maps, with different bit names and offsets
In order to support both hardware versions with the same PMD,
and avoid code duplication, the file dlb2_resource.c required a
complete rewrite. This required some creative staging of the changes
in order to keep the individual patches relatively small, while
also meeting the requirement that all individual patches in the set
compile cleanly.
To accomplish this, a few temporary files are used:
dlb2_hw_types_new.h
dlb2_resources_new.h
dlb2_resources_new.c
As dlb2_resources_new.c is populated with the new combined v2.0/v2.5
low level logic, the corresponding old code is removed from
dlb2_resource.c, thus allowing both the original and new code to
continue to compile and link cleanly. Once all of the code has been
migrated to the new model, the old versions of the files are removed,
and the new versions are renamed, effectively replacing the old original
files.
As you review the code, you can ignore the code deletions from
dlb2_resource.c, as that file continues to shrink as the new
corresponding logic is added to dlb2_resource_new.c.
Changes since V1
1) Simplified subject text for all patches
2) correct typos/spelling
3) remove FPGA references
4) remove stale sysconf() references
5) fixed patches that had compilation issues
6) updated release notes
7) renamed dlb device from dlb2_event to dlb_event
8) moved dlb2 directory to dlb,to match name change
9) fixed other cases where "dlb2" was being used externally
Timothy McDaniel (27):
event/dlb2: add v2.5 probe
event/dlb2: add v2.5 HW init
event/dlb2: add v2.5 get_resources
event/dlb2: add v2.5 create sched domain
event/dlb2: add v2.5 domain reset
event/dlb2: add V2.5 create ldb queue
event/dlb2: add v2.5 create ldb port
event/dlb2: add v2.5 create dir port
event/dlb2: add v2.5 create dir queue
event/dlb2: add v2.5 map qid
event/dlb2: add v2.5 unmap queue
event/dlb2: add v2.5 start domain
event/dlb2: add v2.5 credit scheme
event/dlb2: add v2.5 queue depth functions
event/dlb2: add v2.5 finish map/unmap
event/dlb2: add v2.5 sparse cq mode
event/dlb2: add v2.5 sequence number management
event/dlb2: consolidate resource header files into one file
event/dlb2: delete old dlb2_resource.c file
event/dlb2: move dlb_resource_new.c to dlb_resource.c
event/dlb2: remove temporary file, dlb_hw_types.h
event/dlb2: move dlb2_hw_type_new.h to dlb2_hw_types.h
event/dlb2: delete old register map file, dlb2_regs.h
event/dlb2: rename dlb2_regs_new.h to dlb2_regs.h
event/dlb2: update xstats for v2.5
doc/dlb2: update documentation for v2.5
event/dlb2: Change device name to dlb_event
MAINTAINERS |6 +-
app/test/test_eventdev.c |6 +-
config/rte_config.h | 11 +-
doc/api/doxy-api-index.md |2 +-
doc/api/doxy-api.conf.in |2 +-
doc/guides/eventdevs/dlb.rst | 390 ++
doc/guides/eventdevs/dlb2.rst | 75 +-
doc/guides/eventdevs/index.rst|2 +-
doc/guides/rel_notes/release_21_05.rst|5 +
drivers/event/{dlb2 => dlb}/dlb2.c| 455 +-
drivers/event/{dlb2 => dlb}/dlb2_iface.c |0
drivers/event/{dlb2 => dlb}/dlb2_iface.h |0
drivers/event/{dlb2 => dlb}/dlb2_inline_fns.h |0
drivers/event/{dlb2 => dlb}/dlb2_log.h|0
drivers/event/{dlb2 => dlb}/dlb2_priv.h | 163 +-
drivers/event/{dlb2 => dlb}/dlb2_selftest.c |8 +-
drivers/event/{dlb2 => dlb}/dlb2_user.h | 27 +-
drivers/event/{dlb2 => dlb}/dlb2_xstats.c | 70 +-
drivers/event/{dlb2 => dlb}/meson.build |4 +-
.../{dlb2 => dlb}/pf/base/dlb2_hw_types.h | 102 +-
.../event/{dlb2 => dlb}/pf/base/dlb2_osdep.h |3 +
.../{dlb2 => dlb}/pf/base/dlb2_osdep_bitmap.h |0
.../{dlb2 => dlb}/pf/base/dlb2_osdep_list.h |0
.../{dlb2 => dlb}/pf/base/dlb2_osdep_types.h |0
drivers/event/dlb/pf/base/dlb2_regs.h | 4412 +
.../{dlb2 => dlb}/pf/base/dlb2_resource.c | 3278 ++--
.../{dlb2 => dlb}/pf/base/dlb2_resource.h | 28 +-
drivers/event/{dlb2 => dlb}/pf/dlb2_main.c| 37 +-
drivers/event/{dlb2 => dlb}/pf/dlb2_main.h|0
drivers/event/{dlb2 => dlb}/pf/dlb2_pf.c | 62 +-
.../rte_pmd_dlb2.c => dlb/rte_pmd_dlb.c} |6 +-
.../rte_pmd_dlb2.h => dlb/rte_pmd_dlb.h} | 12 +-
drivers/event/{dlb2 => dlb}/version.map |2 +-
drivers/event/dlb2/pf/base/dlb2_mbox.h| 596 ---
drivers/event/dlb2/pf/b
[dpdk-dev] [PATCH v2 03/27] event/dlb2: add v2.5 get_resources
DLB v2.5 uses a new credit scheme, where directed and load balanced
credits are unified, instead of having separate directed and load
balanced credit pools.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/dlb2.c | 20 --
drivers/event/dlb2/dlb2_user.h| 14 +++-
drivers/event/dlb2/pf/base/dlb2_resource.c| 48 --
.../event/dlb2/pf/base/dlb2_resource_new.c| 66 +++
4 files changed, 92 insertions(+), 56 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 7f5b9141b..0048f6a1b 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -132,17 +132,25 @@ dlb2_hw_query_resources(struct dlb2_eventdev *dlb2)
evdev_dlb2_default_info.max_event_ports =
dlb2->hw_rsrc_query_results.num_ldb_ports;
- evdev_dlb2_default_info.max_num_events =
- dlb2->hw_rsrc_query_results.num_ldb_credits;
-
+ if (dlb2->version == DLB2_HW_V2_5) {
+ evdev_dlb2_default_info.max_num_events =
+ dlb2->hw_rsrc_query_results.num_credits;
+ } else {
+ evdev_dlb2_default_info.max_num_events =
+ dlb2->hw_rsrc_query_results.num_ldb_credits;
+ }
/* Save off values used when creating the scheduling domain. */
handle->info.num_sched_domains =
dlb2->hw_rsrc_query_results.num_sched_domains;
- handle->info.hw_rsrc_max.nb_events_limit =
- dlb2->hw_rsrc_query_results.num_ldb_credits;
-
+ if (dlb2->version == DLB2_HW_V2_5) {
+ handle->info.hw_rsrc_max.nb_events_limit =
+ dlb2->hw_rsrc_query_results.num_credits;
+ } else {
+ handle->info.hw_rsrc_max.nb_events_limit =
+ dlb2->hw_rsrc_query_results.num_ldb_credits;
+ }
handle->info.hw_rsrc_max.num_queues =
dlb2->hw_rsrc_query_results.num_ldb_queues +
dlb2->hw_rsrc_query_results.num_dir_ports;
diff --git a/drivers/event/dlb2/dlb2_user.h b/drivers/event/dlb2/dlb2_user.h
index f4bda7822..b7d125dec 100644
--- a/drivers/event/dlb2/dlb2_user.h
+++ b/drivers/event/dlb2/dlb2_user.h
@@ -195,9 +195,12 @@ struct dlb2_create_sched_domain_args {
* contiguous range of history list entries.
* - num_ldb_credits: Amount of available load-balanced QE storage.
* - num_dir_credits: Amount of available directed QE storage.
+ * - response.status: Detailed error code. In certain cases, such as if the
+ * ioctl request arg is invalid, the driver won't set status.
*/
struct dlb2_get_num_resources_args {
/* Output parameters */
+ struct dlb2_cmd_response response;
__u32 num_sched_domains;
__u32 num_ldb_queues;
__u32 num_ldb_ports;
@@ -206,8 +209,15 @@ struct dlb2_get_num_resources_args {
__u32 num_atomic_inflights;
__u32 num_hist_list_entries;
__u32 max_contiguous_hist_list_entries;
- __u32 num_ldb_credits;
- __u32 num_dir_credits;
+ union {
+ struct {
+ __u32 num_ldb_credits;
+ __u32 num_dir_credits;
+ };
+ struct {
+ __u32 num_credits;
+ };
+ };
};
/*
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 7ba6521ef..eda983d85 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -58,54 +58,6 @@ void dlb2_hw_enable_sparse_dir_cq_mode(struct dlb2_hw *hw)
DLB2_CSR_WR(hw, DLB2_CHP_CFG_CHP_CSR_CTRL, r0.val);
}
-int dlb2_hw_get_num_resources(struct dlb2_hw *hw,
- struct dlb2_get_num_resources_args *arg,
- bool vdev_req,
- unsigned int vdev_id)
-{
- struct dlb2_function_resources *rsrcs;
- struct dlb2_bitmap *map;
- int i;
-
- if (vdev_req && vdev_id >= DLB2_MAX_NUM_VDEVS)
- return -EINVAL;
-
- if (vdev_req)
- rsrcs = &hw->vdev[vdev_id];
- else
- rsrcs = &hw->pf;
-
- arg->num_sched_domains = rsrcs->num_avail_domains;
-
- arg->num_ldb_queues = rsrcs->num_avail_ldb_queues;
-
- arg->num_ldb_ports = 0;
- for (i = 0; i < DLB2_NUM_COS_DOMAINS; i++)
- arg->num_ldb_ports += rsrcs->num_avail_ldb_ports[i];
-
- arg->num_cos_ldb_ports[0] = rsrcs->num_avail_ldb_ports[0];
- arg->num_cos_ldb_ports[1] = rsrcs->num_avail_ldb_ports[1];
- arg->num_cos_ldb_ports[2] = rsrcs->num_avail_ldb_ports[2];
- arg->num_cos_ldb_ports[3] = rsrcs->num_avail_ldb_ports[3];
-
- arg->num_dir_ports = rsrcs->num_avail_dir_pq_pairs;
-
- arg->num_atomic_inflights = rsrcs->num_avail_aqed_entries;
-
- map = rsrcs->avail_hist_list_entries;
-
- arg->num_hist
[dpdk-dev] [PATCH v2 06/27] event/dlb2: add V2.5 create ldb queue
Updated low level hardware functions to add DLB 2.5 support
for creating load balanced queues.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 397 --
.../event/dlb2/pf/base/dlb2_resource_new.c| 391 +
2 files changed, 391 insertions(+), 397 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 041aeaeee..f8b85bc57 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -1149,403 +1149,6 @@ unsigned int dlb2_finish_map_qid_procedures(struct
dlb2_hw *hw)
return num;
}
-
-static void dlb2_configure_ldb_queue(struct dlb2_hw *hw,
-struct dlb2_hw_domain *domain,
-struct dlb2_ldb_queue *queue,
-struct dlb2_create_ldb_queue_args *args,
-bool vdev_req,
-unsigned int vdev_id)
-{
- union dlb2_sys_vf_ldb_vqid_v r0 = { {0} };
- union dlb2_sys_vf_ldb_vqid2qid r1 = { {0} };
- union dlb2_sys_ldb_qid2vqid r2 = { {0} };
- union dlb2_sys_ldb_vasqid_v r3 = { {0} };
- union dlb2_lsp_qid_ldb_infl_lim r4 = { {0} };
- union dlb2_lsp_qid_aqed_active_lim r5 = { {0} };
- union dlb2_aqed_pipe_qid_hid_width r6 = { {0} };
- union dlb2_sys_ldb_qid_its r7 = { {0} };
- union dlb2_lsp_qid_atm_depth_thrsh r8 = { {0} };
- union dlb2_lsp_qid_naldb_depth_thrsh r9 = { {0} };
- union dlb2_aqed_pipe_qid_fid_lim r10 = { {0} };
- union dlb2_chp_ord_qid_sn_map r11 = { {0} };
- union dlb2_sys_ldb_qid_cfg_v r12 = { {0} };
- union dlb2_sys_ldb_qid_v r13 = { {0} };
-
- struct dlb2_sn_group *sn_group;
- unsigned int offs;
-
- /* QID write permissions are turned on when the domain is started */
- r3.field.vasqid_v = 0;
-
- offs = domain->id.phys_id * DLB2_MAX_NUM_LDB_QUEUES +
- queue->id.phys_id;
-
- DLB2_CSR_WR(hw, DLB2_SYS_LDB_VASQID_V(offs), r3.val);
-
- /*
-* Unordered QIDs get 4K inflights, ordered get as many as the number
-* of sequence numbers.
-*/
- r4.field.limit = args->num_qid_inflights;
-
- DLB2_CSR_WR(hw, DLB2_LSP_QID_LDB_INFL_LIM(queue->id.phys_id), r4.val);
-
- r5.field.limit = queue->aqed_limit;
-
- if (r5.field.limit > DLB2_MAX_NUM_AQED_ENTRIES)
- r5.field.limit = DLB2_MAX_NUM_AQED_ENTRIES;
-
- DLB2_CSR_WR(hw,
- DLB2_LSP_QID_AQED_ACTIVE_LIM(queue->id.phys_id),
- r5.val);
-
- switch (args->lock_id_comp_level) {
- case 64:
- r6.field.compress_code = 1;
- break;
- case 128:
- r6.field.compress_code = 2;
- break;
- case 256:
- r6.field.compress_code = 3;
- break;
- case 512:
- r6.field.compress_code = 4;
- break;
- case 1024:
- r6.field.compress_code = 5;
- break;
- case 2048:
- r6.field.compress_code = 6;
- break;
- case 4096:
- r6.field.compress_code = 7;
- break;
- case 0:
- case 65536:
- r6.field.compress_code = 0;
- }
-
- DLB2_CSR_WR(hw,
- DLB2_AQED_PIPE_QID_HID_WIDTH(queue->id.phys_id),
- r6.val);
-
- /* Don't timestamp QEs that pass through this queue */
- r7.field.qid_its = 0;
-
- DLB2_CSR_WR(hw,
- DLB2_SYS_LDB_QID_ITS(queue->id.phys_id),
- r7.val);
-
- r8.field.thresh = args->depth_threshold;
-
- DLB2_CSR_WR(hw,
- DLB2_LSP_QID_ATM_DEPTH_THRSH(queue->id.phys_id),
- r8.val);
-
- r9.field.thresh = args->depth_threshold;
-
- DLB2_CSR_WR(hw,
- DLB2_LSP_QID_NALDB_DEPTH_THRSH(queue->id.phys_id),
- r9.val);
-
- /*
-* This register limits the number of inflight flows a queue can have
-* at one time. It has an upper bound of 2048, but can be
-* over-subscribed. 512 is chosen so that a single queue doesn't use
-* the entire atomic storage, but can use a substantial portion if
-* needed.
-*/
- r10.field.qid_fid_limit = 512;
-
- DLB2_CSR_WR(hw,
- DLB2_AQED_PIPE_QID_FID_LIM(queue->id.phys_id),
- r10.val);
-
- /* Configure SNs */
- sn_group = &hw->rsrcs.sn_groups[queue->sn_group];
- r11.field.mode = sn_group->mode;
- r11.field.slot = queue->sn_slot;
- r11.field.grp = sn_group->id;
-
- DLB2_CSR_WR(hw, DLB2_CHP_ORD_QID_SN_MAP(queue->id.phys_id), r11.val);
-
- r12.field.sn_cfg_v = (args->num_sequence_numbers != 0);
- r12.f
[dpdk-dev] [PATCH v2 04/27] event/dlb2: add v2.5 create sched domain
Update domain creation logic to account for DLB v2.5
credit scheme, new register map, and new register access
macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/dlb2_user.h| 13 +-
drivers/event/dlb2/pf/base/dlb2_resource.c| 645
.../event/dlb2/pf/base/dlb2_resource_new.c| 696 ++
3 files changed, 707 insertions(+), 647 deletions(-)
diff --git a/drivers/event/dlb2/dlb2_user.h b/drivers/event/dlb2/dlb2_user.h
index b7d125dec..9760e9bda 100644
--- a/drivers/event/dlb2/dlb2_user.h
+++ b/drivers/event/dlb2/dlb2_user.h
@@ -18,6 +18,7 @@ enum dlb2_error {
DLB2_ST_LDB_QUEUES_UNAVAILABLE,
DLB2_ST_LDB_CREDITS_UNAVAILABLE,
DLB2_ST_DIR_CREDITS_UNAVAILABLE,
+ DLB2_ST_CREDITS_UNAVAILABLE,
DLB2_ST_SEQUENCE_NUMBERS_UNAVAILABLE,
DLB2_ST_INVALID_DOMAIN_ID,
DLB2_ST_INVALID_QID_INFLIGHT_ALLOCATION,
@@ -57,6 +58,7 @@ static const char dlb2_error_strings[][128] = {
"DLB2_ST_LDB_QUEUES_UNAVAILABLE",
"DLB2_ST_LDB_CREDITS_UNAVAILABLE",
"DLB2_ST_DIR_CREDITS_UNAVAILABLE",
+ "DLB2_ST_CREDITS_UNAVAILABLE",
"DLB2_ST_SEQUENCE_NUMBERS_UNAVAILABLE",
"DLB2_ST_INVALID_DOMAIN_ID",
"DLB2_ST_INVALID_QID_INFLIGHT_ALLOCATION",
@@ -170,8 +172,15 @@ struct dlb2_create_sched_domain_args {
__u32 num_dir_ports;
__u32 num_atomic_inflights;
__u32 num_hist_list_entries;
- __u32 num_ldb_credits;
- __u32 num_dir_credits;
+ union {
+ struct {
+ __u32 num_ldb_credits;
+ __u32 num_dir_credits;
+ };
+ struct {
+ __u32 num_credits;
+ };
+ };
__u8 cos_strict;
__u8 padding1[3];
};
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index eda983d85..99c3d031d 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -32,21 +32,6 @@
#define DLB2_FUNC_LIST_FOR_SAFE(head, ptr, ptr_tmp, it, it_tmp) \
DLB2_LIST_FOR_EACH_SAFE((head), ptr, ptr_tmp, func_list, it, it_tmp)
-static void dlb2_init_domain_rsrc_lists(struct dlb2_hw_domain *domain)
-{
- int i;
-
- dlb2_list_init_head(&domain->used_ldb_queues);
- dlb2_list_init_head(&domain->used_dir_pq_pairs);
- dlb2_list_init_head(&domain->avail_ldb_queues);
- dlb2_list_init_head(&domain->avail_dir_pq_pairs);
-
- for (i = 0; i < DLB2_NUM_COS_DOMAINS; i++)
- dlb2_list_init_head(&domain->used_ldb_ports[i]);
- for (i = 0; i < DLB2_NUM_COS_DOMAINS; i++)
- dlb2_list_init_head(&domain->avail_ldb_ports[i]);
-}
-
void dlb2_hw_enable_sparse_dir_cq_mode(struct dlb2_hw *hw)
{
union dlb2_chp_cfg_chp_csr_ctrl r0;
@@ -69,636 +54,6 @@ void dlb2_hw_enable_sparse_ldb_cq_mode(struct dlb2_hw *hw)
DLB2_CSR_WR(hw, DLB2_CHP_CFG_CHP_CSR_CTRL, r0.val);
}
-static void dlb2_configure_domain_credits(struct dlb2_hw *hw,
- struct dlb2_hw_domain *domain)
-{
- union dlb2_chp_cfg_ldb_vas_crd r0 = { {0} };
- union dlb2_chp_cfg_dir_vas_crd r1 = { {0} };
-
- r0.field.count = domain->num_ldb_credits;
-
- DLB2_CSR_WR(hw, DLB2_CHP_CFG_LDB_VAS_CRD(domain->id.phys_id), r0.val);
-
- r1.field.count = domain->num_dir_credits;
-
- DLB2_CSR_WR(hw, DLB2_CHP_CFG_DIR_VAS_CRD(domain->id.phys_id), r1.val);
-}
-
-static struct dlb2_ldb_port *
-dlb2_get_next_ldb_port(struct dlb2_hw *hw,
- struct dlb2_function_resources *rsrcs,
- u32 domain_id,
- u32 cos_id)
-{
- struct dlb2_list_entry *iter;
- struct dlb2_ldb_port *port;
- RTE_SET_USED(iter);
- /*
-* To reduce the odds of consecutive load-balanced ports mapping to the
-* same queue(s), the driver attempts to allocate ports whose neighbors
-* are owned by a different domain.
-*/
- DLB2_FUNC_LIST_FOR(rsrcs->avail_ldb_ports[cos_id], port, iter) {
- u32 next, prev;
- u32 phys_id;
-
- phys_id = port->id.phys_id;
- next = phys_id + 1;
- prev = phys_id - 1;
-
- if (phys_id == DLB2_MAX_NUM_LDB_PORTS - 1)
- next = 0;
- if (phys_id == 0)
- prev = DLB2_MAX_NUM_LDB_PORTS - 1;
-
- if (!hw->rsrcs.ldb_ports[next].owned ||
- hw->rsrcs.ldb_ports[next].domain_id.phys_id == domain_id)
- continue;
-
- if (!hw->rsrcs.ldb_ports[prev].owned ||
- hw->rsrcs.ldb_ports[prev].domain_id.phys_id == domain_id)
- continue;
-
- return port;
- }
-
- /*
-* Failing that, the driver looks for a port with one neighbor owned by
[dpdk-dev] [PATCH v2 08/27] event/dlb2: add v2.5 create dir port
Updated low level hardware functions to account for new
register map and access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 426 --
.../event/dlb2/pf/base/dlb2_resource_new.c| 414 +
2 files changed, 414 insertions(+), 426 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 45d096eec..70c52e908 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -65,18 +65,6 @@ static inline void dlb2_flush_csr(struct dlb2_hw *hw)
DLB2_CSR_RD(hw, DLB2_SYS_TOTAL_VAS);
}
-static void dlb2_dir_port_cq_enable(struct dlb2_hw *hw,
- struct dlb2_dir_pq_pair *port)
-{
- union dlb2_lsp_cq_dir_dsbl reg;
-
- reg.field.disabled = 0;
-
- DLB2_CSR_WR(hw, DLB2_LSP_CQ_DIR_DSBL(port->id.phys_id), reg.val);
-
- dlb2_flush_csr(hw);
-}
-
static u32 dlb2_dir_queue_depth(struct dlb2_hw *hw,
struct dlb2_dir_pq_pair *queue)
{
@@ -1216,25 +1204,6 @@ int dlb2_set_group_sequence_numbers(struct dlb2_hw *hw,
return 0;
}
-static void
-dlb2_log_create_dir_port_args(struct dlb2_hw *hw,
- u32 domain_id,
- uintptr_t cq_dma_base,
- struct dlb2_create_dir_port_args *args,
- bool vdev_req,
- unsigned int vdev_id)
-{
- DLB2_HW_DBG(hw, "DLB2 create directed port arguments:\n");
- if (vdev_req)
- DLB2_HW_DBG(hw, "(Request from vdev %d)\n", vdev_id);
- DLB2_HW_DBG(hw, "\tDomain ID: %d\n",
- domain_id);
- DLB2_HW_DBG(hw, "\tCQ depth: %d\n",
- args->cq_depth);
- DLB2_HW_DBG(hw, "\tCQ base address: 0x%lx\n",
- cq_dma_base);
-}
-
static struct dlb2_dir_pq_pair *
dlb2_get_domain_used_dir_pq(struct dlb2_hw *hw,
u32 id,
@@ -1256,401 +1225,6 @@ dlb2_get_domain_used_dir_pq(struct dlb2_hw *hw,
return NULL;
}
-static int
-dlb2_verify_create_dir_port_args(struct dlb2_hw *hw,
-u32 domain_id,
-uintptr_t cq_dma_base,
-struct dlb2_create_dir_port_args *args,
-struct dlb2_cmd_response *resp,
-bool vdev_req,
-unsigned int vdev_id)
-{
- struct dlb2_hw_domain *domain;
-
- domain = dlb2_get_domain_from_id(hw, domain_id, vdev_req, vdev_id);
-
- if (domain == NULL) {
- resp->status = DLB2_ST_INVALID_DOMAIN_ID;
- return -EINVAL;
- }
-
- if (!domain->configured) {
- resp->status = DLB2_ST_DOMAIN_NOT_CONFIGURED;
- return -EINVAL;
- }
-
- if (domain->started) {
- resp->status = DLB2_ST_DOMAIN_STARTED;
- return -EINVAL;
- }
-
- /*
-* If the user claims the queue is already configured, validate
-* the queue ID, its domain, and whether the queue is configured.
-*/
- if (args->queue_id != -1) {
- struct dlb2_dir_pq_pair *queue;
-
- queue = dlb2_get_domain_used_dir_pq(hw,
- args->queue_id,
- vdev_req,
- domain);
-
- if (queue == NULL || queue->domain_id.phys_id !=
- domain->id.phys_id ||
- !queue->queue_configured) {
- resp->status = DLB2_ST_INVALID_DIR_QUEUE_ID;
- return -EINVAL;
- }
- }
-
- /*
-* If the port's queue is not configured, validate that a free
-* port-queue pair is available.
-*/
- if (args->queue_id == -1 &&
- dlb2_list_empty(&domain->avail_dir_pq_pairs)) {
- resp->status = DLB2_ST_DIR_PORTS_UNAVAILABLE;
- return -EINVAL;
- }
-
- /* Check cache-line alignment */
- if ((cq_dma_base & 0x3F) != 0) {
- resp->status = DLB2_ST_INVALID_CQ_VIRT_ADDR;
- return -EINVAL;
- }
-
- if (args->cq_depth != 1 &&
- args->cq_depth != 2 &&
- args->cq_depth != 4 &&
- args->cq_depth != 8 &&
- args->cq_depth != 16 &&
- args->cq_depth != 32 &&
- args->cq_depth != 64 &&
- args->cq_depth != 128 &&
- args->cq_depth != 256 &&
- args->cq_depth != 512 &&
- args->cq_depth != 1024) {
- resp->status = DLB2_ST_INVALID_CQ_DEPTH;
- return -EINVAL;
- }
-
-
[dpdk-dev] [PATCH v2 05/27] event/dlb2: add v2.5 domain reset
Convert to new register map and new register access
macros.
Signed-off-by: Timothy McDaniel
---
.../event/dlb2/pf/base/dlb2_hw_types_new.h|1 +
drivers/event/dlb2/pf/base/dlb2_resource.c| 1494 --
.../event/dlb2/pf/base/dlb2_resource_new.c| 2562 +
3 files changed, 2563 insertions(+), 1494 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
b/drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
index d58aa94ad..0f418ef5d 100644
--- a/drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
+++ b/drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
@@ -187,6 +187,7 @@ struct dlb2_ldb_port {
u32 hist_list_entry_base;
u32 hist_list_entry_limit;
u32 ref_cnt;
+ u8 cq_depth;
u8 init_tkn_cnt;
u8 num_pending_removals;
u8 num_mappings;
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 99c3d031d..041aeaeee 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -65,69 +65,6 @@ static inline void dlb2_flush_csr(struct dlb2_hw *hw)
DLB2_CSR_RD(hw, DLB2_SYS_TOTAL_VAS);
}
-static void dlb2_dir_port_cq_disable(struct dlb2_hw *hw,
-struct dlb2_dir_pq_pair *port)
-{
- union dlb2_lsp_cq_dir_dsbl reg;
-
- reg.field.disabled = 1;
-
- DLB2_CSR_WR(hw, DLB2_LSP_CQ_DIR_DSBL(port->id.phys_id), reg.val);
-
- dlb2_flush_csr(hw);
-}
-
-static u32 dlb2_dir_cq_token_count(struct dlb2_hw *hw,
- struct dlb2_dir_pq_pair *port)
-{
- union dlb2_lsp_cq_dir_tkn_cnt r0;
-
- r0.val = DLB2_CSR_RD(hw, DLB2_LSP_CQ_DIR_TKN_CNT(port->id.phys_id));
-
- /*
-* Account for the initial token count, which is used in order to
-* provide a CQ with depth less than 8.
-*/
-
- return r0.field.count - port->init_tkn_cnt;
-}
-
-static int dlb2_drain_dir_cq(struct dlb2_hw *hw,
-struct dlb2_dir_pq_pair *port)
-{
- unsigned int port_id = port->id.phys_id;
- u32 cnt;
-
- /* Return any outstanding tokens */
- cnt = dlb2_dir_cq_token_count(hw, port);
-
- if (cnt != 0) {
- struct dlb2_hcw hcw_mem[8], *hcw;
- void *pp_addr;
-
- pp_addr = os_map_producer_port(hw, port_id, false);
-
- /* Point hcw to a 64B-aligned location */
- hcw = (struct dlb2_hcw *)((uintptr_t)&hcw_mem[4] & ~0x3F);
-
- /*
-* Program the first HCW for a batch token return and
-* the rest as NOOPS
-*/
- memset(hcw, 0, 4 * sizeof(*hcw));
- hcw->cq_token = 1;
- hcw->lock_id = cnt - 1;
-
- dlb2_movdir64b(pp_addr, hcw);
-
- os_fence_hcw(hw, pp_addr);
-
- os_unmap_producer_port(hw, pp_addr);
- }
-
- return 0;
-}
-
static void dlb2_dir_port_cq_enable(struct dlb2_hw *hw,
struct dlb2_dir_pq_pair *port)
{
@@ -140,37 +77,6 @@ static void dlb2_dir_port_cq_enable(struct dlb2_hw *hw,
dlb2_flush_csr(hw);
}
-static int dlb2_domain_drain_dir_cqs(struct dlb2_hw *hw,
-struct dlb2_hw_domain *domain,
-bool toggle_port)
-{
- struct dlb2_list_entry *iter;
- struct dlb2_dir_pq_pair *port;
- int ret;
- RTE_SET_USED(iter);
-
- DLB2_DOM_LIST_FOR(domain->used_dir_pq_pairs, port, iter) {
- /*
-* Can't drain a port if it's not configured, and there's
-* nothing to drain if its queue is unconfigured.
-*/
- if (!port->port_configured || !port->queue_configured)
- continue;
-
- if (toggle_port)
- dlb2_dir_port_cq_disable(hw, port);
-
- ret = dlb2_drain_dir_cq(hw, port);
- if (ret < 0)
- return ret;
-
- if (toggle_port)
- dlb2_dir_port_cq_enable(hw, port);
- }
-
- return 0;
-}
-
static u32 dlb2_dir_queue_depth(struct dlb2_hw *hw,
struct dlb2_dir_pq_pair *queue)
{
@@ -182,63 +88,6 @@ static u32 dlb2_dir_queue_depth(struct dlb2_hw *hw,
return r0.field.count;
}
-static bool dlb2_dir_queue_is_empty(struct dlb2_hw *hw,
- struct dlb2_dir_pq_pair *queue)
-{
- return dlb2_dir_queue_depth(hw, queue) == 0;
-}
-
-static bool dlb2_domain_dir_queues_empty(struct dlb2_hw *hw,
-struct dlb2_hw_domain *domain)
-{
- struct dlb2_list_entry *iter;
- struct dlb2_dir_pq_pair *queue;
- RTE_SET_USED(iter);
-
- DLB2_DOM_LIST_FOR(domain->used_dir_pq_pairs, queue, iter) {
- if (!dlb2_dir_queu
[dpdk-dev] [PATCH v2 09/27] event/dlb2: add v2.5 create dir queue
Updated low level hardware functions to account for new
register map and hardware access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 213 --
.../event/dlb2/pf/base/dlb2_resource_new.c| 201 +
2 files changed, 201 insertions(+), 213 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 70c52e908..362deadfe 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -1225,219 +1225,6 @@ dlb2_get_domain_used_dir_pq(struct dlb2_hw *hw,
return NULL;
}
-static void dlb2_configure_dir_queue(struct dlb2_hw *hw,
-struct dlb2_hw_domain *domain,
-struct dlb2_dir_pq_pair *queue,
-struct dlb2_create_dir_queue_args *args,
-bool vdev_req,
-unsigned int vdev_id)
-{
- union dlb2_sys_dir_vasqid_v r0 = { {0} };
- union dlb2_sys_dir_qid_its r1 = { {0} };
- union dlb2_lsp_qid_dir_depth_thrsh r2 = { {0} };
- union dlb2_sys_dir_qid_v r5 = { {0} };
-
- unsigned int offs;
-
- /* QID write permissions are turned on when the domain is started */
- r0.field.vasqid_v = 0;
-
- offs = domain->id.phys_id * DLB2_MAX_NUM_DIR_QUEUES(hw->ver) +
- queue->id.phys_id;
-
- DLB2_CSR_WR(hw, DLB2_SYS_DIR_VASQID_V(offs), r0.val);
-
- /* Don't timestamp QEs that pass through this queue */
- r1.field.qid_its = 0;
-
- DLB2_CSR_WR(hw,
- DLB2_SYS_DIR_QID_ITS(queue->id.phys_id),
- r1.val);
-
- r2.field.thresh = args->depth_threshold;
-
- DLB2_CSR_WR(hw,
- DLB2_LSP_QID_DIR_DEPTH_THRSH(queue->id.phys_id),
- r2.val);
-
- if (vdev_req) {
- union dlb2_sys_vf_dir_vqid_v r3 = { {0} };
- union dlb2_sys_vf_dir_vqid2qid r4 = { {0} };
-
- offs = vdev_id * DLB2_MAX_NUM_DIR_QUEUES(hw->ver)
- + queue->id.virt_id;
-
- r3.field.vqid_v = 1;
-
- DLB2_CSR_WR(hw, DLB2_SYS_VF_DIR_VQID_V(offs), r3.val);
-
- r4.field.qid = queue->id.phys_id;
-
- DLB2_CSR_WR(hw, DLB2_SYS_VF_DIR_VQID2QID(offs), r4.val);
- }
-
- r5.field.qid_v = 1;
-
- DLB2_CSR_WR(hw, DLB2_SYS_DIR_QID_V(queue->id.phys_id), r5.val);
-
- queue->queue_configured = true;
-}
-
-static void
-dlb2_log_create_dir_queue_args(struct dlb2_hw *hw,
- u32 domain_id,
- struct dlb2_create_dir_queue_args *args,
- bool vdev_req,
- unsigned int vdev_id)
-{
- DLB2_HW_DBG(hw, "DLB2 create directed queue arguments:\n");
- if (vdev_req)
- DLB2_HW_DBG(hw, "(Request from vdev %d)\n", vdev_id);
- DLB2_HW_DBG(hw, "\tDomain ID: %d\n", domain_id);
- DLB2_HW_DBG(hw, "\tPort ID: %d\n", args->port_id);
-}
-
-static int
-dlb2_verify_create_dir_queue_args(struct dlb2_hw *hw,
- u32 domain_id,
- struct dlb2_create_dir_queue_args *args,
- struct dlb2_cmd_response *resp,
- bool vdev_req,
- unsigned int vdev_id)
-{
- struct dlb2_hw_domain *domain;
-
- domain = dlb2_get_domain_from_id(hw, domain_id, vdev_req, vdev_id);
-
- if (domain == NULL) {
- resp->status = DLB2_ST_INVALID_DOMAIN_ID;
- return -EINVAL;
- }
-
- if (!domain->configured) {
- resp->status = DLB2_ST_DOMAIN_NOT_CONFIGURED;
- return -EINVAL;
- }
-
- if (domain->started) {
- resp->status = DLB2_ST_DOMAIN_STARTED;
- return -EINVAL;
- }
-
- /*
-* If the user claims the port is already configured, validate the port
-* ID, its domain, and whether the port is configured.
-*/
- if (args->port_id != -1) {
- struct dlb2_dir_pq_pair *port;
-
- port = dlb2_get_domain_used_dir_pq(hw,
- args->port_id,
- vdev_req,
- domain);
-
- if (port == NULL || port->domain_id.phys_id !=
- domain->id.phys_id || !port->port_configured) {
- resp->status = DLB2_ST_INVALID_PORT_ID;
- return -EINVAL;
- }
- }
-
- /*
-* If the queue's port is not configured, validate that a free
-* port-queue pair is available.
-*/
- if (args->port_id =
[dpdk-dev] [PATCH v2 07/27] event/dlb2: add v2.5 create ldb port
Update create ldb port low level code to account for new
register map and hardware access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 490 --
.../event/dlb2/pf/base/dlb2_resource_new.c| 471 +
2 files changed, 471 insertions(+), 490 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index f8b85bc57..45d096eec 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -1216,496 +1216,6 @@ int dlb2_set_group_sequence_numbers(struct dlb2_hw *hw,
return 0;
}
-static void dlb2_ldb_port_configure_pp(struct dlb2_hw *hw,
- struct dlb2_hw_domain *domain,
- struct dlb2_ldb_port *port,
- bool vdev_req,
- unsigned int vdev_id)
-{
- union dlb2_sys_ldb_pp2vas r0 = { {0} };
- union dlb2_sys_ldb_pp_v r4 = { {0} };
-
- r0.field.vas = domain->id.phys_id;
-
- DLB2_CSR_WR(hw, DLB2_SYS_LDB_PP2VAS(port->id.phys_id), r0.val);
-
- if (vdev_req) {
- union dlb2_sys_vf_ldb_vpp2pp r1 = { {0} };
- union dlb2_sys_ldb_pp2vdev r2 = { {0} };
- union dlb2_sys_vf_ldb_vpp_v r3 = { {0} };
- unsigned int offs;
- u32 virt_id;
-
- /*
-* DLB uses producer port address bits 17:12 to determine the
-* producer port ID. In Scalable IOV mode, PP accesses come
-* through the PF MMIO window for the physical producer port,
-* so for translation purposes the virtual and physical port
-* IDs are equal.
-*/
- if (hw->virt_mode == DLB2_VIRT_SRIOV)
- virt_id = port->id.virt_id;
- else
- virt_id = port->id.phys_id;
-
- r1.field.pp = port->id.phys_id;
-
- offs = vdev_id * DLB2_MAX_NUM_LDB_PORTS + virt_id;
-
- DLB2_CSR_WR(hw, DLB2_SYS_VF_LDB_VPP2PP(offs), r1.val);
-
- r2.field.vdev = vdev_id;
-
- DLB2_CSR_WR(hw,
- DLB2_SYS_LDB_PP2VDEV(port->id.phys_id),
- r2.val);
-
- r3.field.vpp_v = 1;
-
- DLB2_CSR_WR(hw, DLB2_SYS_VF_LDB_VPP_V(offs), r3.val);
- }
-
- r4.field.pp_v = 1;
-
- DLB2_CSR_WR(hw,
- DLB2_SYS_LDB_PP_V(port->id.phys_id),
- r4.val);
-}
-
-static int dlb2_ldb_port_configure_cq(struct dlb2_hw *hw,
- struct dlb2_hw_domain *domain,
- struct dlb2_ldb_port *port,
- uintptr_t cq_dma_base,
- struct dlb2_create_ldb_port_args *args,
- bool vdev_req,
- unsigned int vdev_id)
-{
- union dlb2_sys_ldb_cq_addr_l r0 = { {0} };
- union dlb2_sys_ldb_cq_addr_u r1 = { {0} };
- union dlb2_sys_ldb_cq2vf_pf_ro r2 = { {0} };
- union dlb2_chp_ldb_cq_tkn_depth_sel r3 = { {0} };
- union dlb2_lsp_cq_ldb_tkn_depth_sel r4 = { {0} };
- union dlb2_chp_hist_list_lim r5 = { {0} };
- union dlb2_chp_hist_list_base r6 = { {0} };
- union dlb2_lsp_cq_ldb_infl_lim r7 = { {0} };
- union dlb2_chp_hist_list_push_ptr r8 = { {0} };
- union dlb2_chp_hist_list_pop_ptr r9 = { {0} };
- union dlb2_sys_ldb_cq_at r10 = { {0} };
- union dlb2_sys_ldb_cq_pasid r11 = { {0} };
- union dlb2_chp_ldb_cq2vas r12 = { {0} };
- union dlb2_lsp_cq2priov r13 = { {0} };
-
- /* The CQ address is 64B-aligned, and the DLB only wants bits [63:6] */
- r0.field.addr_l = cq_dma_base >> 6;
-
- DLB2_CSR_WR(hw, DLB2_SYS_LDB_CQ_ADDR_L(port->id.phys_id), r0.val);
-
- r1.field.addr_u = cq_dma_base >> 32;
-
- DLB2_CSR_WR(hw, DLB2_SYS_LDB_CQ_ADDR_U(port->id.phys_id), r1.val);
-
- /*
-* 'ro' == relaxed ordering. This setting allows DLB2 to write
-* cache lines out-of-order (but QEs within a cache line are always
-* updated in-order).
-*/
- r2.field.vf = vdev_id;
- r2.field.is_pf = !vdev_req && (hw->virt_mode != DLB2_VIRT_SIOV);
- r2.field.ro = 1;
-
- DLB2_CSR_WR(hw, DLB2_SYS_LDB_CQ2VF_PF_RO(port->id.phys_id), r2.val);
-
- if (args->cq_depth <= 8) {
- r3.field.token_depth_select = 1;
- } else if (args->cq_depth == 16) {
- r3.field.token_depth_select = 2;
- } else if (args->cq_depth == 32) {
- r3.field.token_depth_select = 3;
- } else if (args->cq_depth == 64) {
- r3.field.token_depth_select = 4;
- } else if (args->cq_depth == 128) {
-
[dpdk-dev] [PATCH v2 12/27] event/dlb2: add v2.5 start domain
Update low level functions to account for new register map
and hardware access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 123 -
.../event/dlb2/pf/base/dlb2_resource_new.c| 130 ++
2 files changed, 130 insertions(+), 123 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index ab5b080c1..1e66ebf50 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -1245,129 +1245,6 @@ dlb2_get_domain_ldb_queue(u32 id,
return NULL;
}
-static int dlb2_verify_start_domain_args(struct dlb2_hw *hw,
-u32 domain_id,
-struct dlb2_cmd_response *resp,
-bool vdev_req,
-unsigned int vdev_id)
-{
- struct dlb2_hw_domain *domain;
-
- domain = dlb2_get_domain_from_id(hw, domain_id, vdev_req, vdev_id);
-
- if (domain == NULL) {
- resp->status = DLB2_ST_INVALID_DOMAIN_ID;
- return -EINVAL;
- }
-
- if (!domain->configured) {
- resp->status = DLB2_ST_DOMAIN_NOT_CONFIGURED;
- return -EINVAL;
- }
-
- if (domain->started) {
- resp->status = DLB2_ST_DOMAIN_STARTED;
- return -EINVAL;
- }
-
- return 0;
-}
-
-static void dlb2_log_start_domain(struct dlb2_hw *hw,
- u32 domain_id,
- bool vdev_req,
- unsigned int vdev_id)
-{
- DLB2_HW_DBG(hw, "DLB2 start domain arguments:\n");
- if (vdev_req)
- DLB2_HW_DBG(hw, "(Request from vdev %d)\n", vdev_id);
- DLB2_HW_DBG(hw, "\tDomain ID: %d\n", domain_id);
-}
-
-/**
- * dlb2_hw_start_domain() - Lock the domain configuration
- * @hw:Contains the current state of the DLB2 hardware.
- * @domain_id: Domain ID
- * @arg: User-provided arguments (unused, here for ioctl callback template).
- * @resp: Response to user.
- * @vdev_req: Request came from a virtual device.
- * @vdev_id: If vdev_req is true, this contains the virtual device's ID.
- *
- * Return: returns < 0 on error, 0 otherwise. If the driver is unable to
- * satisfy a request, resp->status will be set accordingly.
- */
-int
-dlb2_hw_start_domain(struct dlb2_hw *hw,
-u32 domain_id,
-struct dlb2_start_domain_args *arg,
-struct dlb2_cmd_response *resp,
-bool vdev_req,
-unsigned int vdev_id)
-{
- struct dlb2_list_entry *iter;
- struct dlb2_dir_pq_pair *dir_queue;
- struct dlb2_ldb_queue *ldb_queue;
- struct dlb2_hw_domain *domain;
- int ret;
- RTE_SET_USED(arg);
- RTE_SET_USED(iter);
-
- dlb2_log_start_domain(hw, domain_id, vdev_req, vdev_id);
-
- ret = dlb2_verify_start_domain_args(hw,
- domain_id,
- resp,
- vdev_req,
- vdev_id);
- if (ret)
- return ret;
-
- domain = dlb2_get_domain_from_id(hw, domain_id, vdev_req, vdev_id);
- if (domain == NULL) {
- DLB2_HW_ERR(hw,
- "[%s():%d] Internal error: domain not found\n",
- __func__, __LINE__);
- return -EFAULT;
- }
-
- /*
-* Enable load-balanced and directed queue write permissions for the
-* queues this domain owns. Without this, the DLB2 will drop all
-* incoming traffic to those queues.
-*/
- DLB2_DOM_LIST_FOR(domain->used_ldb_queues, ldb_queue, iter) {
- union dlb2_sys_ldb_vasqid_v r0 = { {0} };
- unsigned int offs;
-
- r0.field.vasqid_v = 1;
-
- offs = domain->id.phys_id * DLB2_MAX_NUM_LDB_QUEUES +
- ldb_queue->id.phys_id;
-
- DLB2_CSR_WR(hw, DLB2_SYS_LDB_VASQID_V(offs), r0.val);
- }
-
- DLB2_DOM_LIST_FOR(domain->used_dir_pq_pairs, dir_queue, iter) {
- union dlb2_sys_dir_vasqid_v r0 = { {0} };
- unsigned int offs;
-
- r0.field.vasqid_v = 1;
-
- offs = domain->id.phys_id * DLB2_MAX_NUM_DIR_PORTS(hw->ver) +
- dir_queue->id.phys_id;
-
- DLB2_CSR_WR(hw, DLB2_SYS_DIR_VASQID_V(offs), r0.val);
- }
-
- dlb2_flush_csr(hw);
-
- domain->started = true;
-
- resp->status = 0;
-
- return 0;
-}
-
static void dlb2_log_get_dir_queue_depth(struct dlb2_hw *hw,
u32 domain_id,
u32 queue_id,
diff --git a/drivers
[dpdk-dev] [PATCH v2 14/27] event/dlb2: add v2.5 queue depth functions
Update get queue depth functions for DLB v2.5, accounting for
combined register map and new hardware access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 160 --
.../event/dlb2/pf/base/dlb2_resource_new.c| 135 +++
2 files changed, 135 insertions(+), 160 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 1e66ebf50..8c1d8c782 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -65,17 +65,6 @@ static inline void dlb2_flush_csr(struct dlb2_hw *hw)
DLB2_CSR_RD(hw, DLB2_SYS_TOTAL_VAS);
}
-static u32 dlb2_dir_queue_depth(struct dlb2_hw *hw,
- struct dlb2_dir_pq_pair *queue)
-{
- union dlb2_lsp_qid_dir_enqueue_cnt r0;
-
- r0.val = DLB2_CSR_RD(hw,
-DLB2_LSP_QID_DIR_ENQUEUE_CNT(queue->id.phys_id));
-
- return r0.field.count;
-}
-
static void dlb2_ldb_port_cq_enable(struct dlb2_hw *hw,
struct dlb2_ldb_port *port)
{
@@ -108,24 +97,6 @@ static void dlb2_ldb_port_cq_disable(struct dlb2_hw *hw,
dlb2_flush_csr(hw);
}
-static u32 dlb2_ldb_queue_depth(struct dlb2_hw *hw,
- struct dlb2_ldb_queue *queue)
-{
- union dlb2_lsp_qid_aqed_active_cnt r0;
- union dlb2_lsp_qid_atm_active r1;
- union dlb2_lsp_qid_ldb_enqueue_cnt r2;
-
- r0.val = DLB2_CSR_RD(hw,
-DLB2_LSP_QID_AQED_ACTIVE_CNT(queue->id.phys_id));
- r1.val = DLB2_CSR_RD(hw,
-DLB2_LSP_QID_ATM_ACTIVE(queue->id.phys_id));
-
- r2.val = DLB2_CSR_RD(hw,
-DLB2_LSP_QID_LDB_ENQUEUE_CNT(queue->id.phys_id));
-
- return r0.field.count + r1.field.count + r2.field.count;
-}
-
static struct dlb2_ldb_queue *
dlb2_get_ldb_queue_from_id(struct dlb2_hw *hw,
u32 id,
@@ -1204,134 +1175,3 @@ int dlb2_set_group_sequence_numbers(struct dlb2_hw *hw,
return 0;
}
-static struct dlb2_dir_pq_pair *
-dlb2_get_domain_used_dir_pq(struct dlb2_hw *hw,
- u32 id,
- bool vdev_req,
- struct dlb2_hw_domain *domain)
-{
- struct dlb2_list_entry *iter;
- struct dlb2_dir_pq_pair *port;
- RTE_SET_USED(iter);
-
- if (id >= DLB2_MAX_NUM_DIR_PORTS(hw->ver))
- return NULL;
-
- DLB2_DOM_LIST_FOR(domain->used_dir_pq_pairs, port, iter)
- if ((!vdev_req && port->id.phys_id == id) ||
- (vdev_req && port->id.virt_id == id))
- return port;
-
- return NULL;
-}
-
-static struct dlb2_ldb_queue *
-dlb2_get_domain_ldb_queue(u32 id,
- bool vdev_req,
- struct dlb2_hw_domain *domain)
-{
- struct dlb2_list_entry *iter;
- struct dlb2_ldb_queue *queue;
- RTE_SET_USED(iter);
-
- if (id >= DLB2_MAX_NUM_LDB_QUEUES)
- return NULL;
-
- DLB2_DOM_LIST_FOR(domain->used_ldb_queues, queue, iter)
- if ((!vdev_req && queue->id.phys_id == id) ||
- (vdev_req && queue->id.virt_id == id))
- return queue;
-
- return NULL;
-}
-
-static void dlb2_log_get_dir_queue_depth(struct dlb2_hw *hw,
-u32 domain_id,
-u32 queue_id,
-bool vdev_req,
-unsigned int vf_id)
-{
- DLB2_HW_DBG(hw, "DLB get directed queue depth:\n");
- if (vdev_req)
- DLB2_HW_DBG(hw, "(Request from VF %d)\n", vf_id);
- DLB2_HW_DBG(hw, "\tDomain ID: %d\n", domain_id);
- DLB2_HW_DBG(hw, "\tQueue ID: %d\n", queue_id);
-}
-
-int dlb2_hw_get_dir_queue_depth(struct dlb2_hw *hw,
- u32 domain_id,
- struct dlb2_get_dir_queue_depth_args *args,
- struct dlb2_cmd_response *resp,
- bool vdev_req,
- unsigned int vdev_id)
-{
- struct dlb2_dir_pq_pair *queue;
- struct dlb2_hw_domain *domain;
- int id;
-
- id = domain_id;
-
- dlb2_log_get_dir_queue_depth(hw, domain_id, args->queue_id,
-vdev_req, vdev_id);
-
- domain = dlb2_get_domain_from_id(hw, id, vdev_req, vdev_id);
- if (domain == NULL) {
- resp->status = DLB2_ST_INVALID_DOMAIN_ID;
- return -EINVAL;
- }
-
- id = args->queue_id;
-
- queue = dlb2_get_domain_used_dir_pq(hw, id, vdev_req, domain);
- if (queue == NULL) {
- resp->status = DLB2_ST_INVALID_QID;
- return -EINVAL;
- }
-
- resp->id =
[dpdk-dev] [PATCH v2 10/27] event/dlb2: add v2.5 map qid
Update low level hardware functions to account for
new register map and hardware access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 355 ---
.../event/dlb2/pf/base/dlb2_resource_new.c| 418 ++
2 files changed, 418 insertions(+), 355 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 362deadfe..d59df5e39 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -1245,68 +1245,6 @@ dlb2_port_find_slot_with_pending_map_queue(struct
dlb2_ldb_port *port,
return (i < DLB2_MAX_NUM_QIDS_PER_LDB_CQ);
}
-static void dlb2_ldb_port_change_qid_priority(struct dlb2_hw *hw,
- struct dlb2_ldb_port *port,
- int slot,
- struct dlb2_map_qid_args *args)
-{
- union dlb2_lsp_cq2priov r0;
-
- /* Read-modify-write the priority and valid bit register */
- r0.val = DLB2_CSR_RD(hw, DLB2_LSP_CQ2PRIOV(port->id.phys_id));
-
- r0.field.v |= 1 << slot;
- r0.field.prio |= (args->priority & 0x7) << slot * 3;
-
- DLB2_CSR_WR(hw, DLB2_LSP_CQ2PRIOV(port->id.phys_id), r0.val);
-
- dlb2_flush_csr(hw);
-
- port->qid_map[slot].priority = args->priority;
-}
-
-static int dlb2_verify_map_qid_slot_available(struct dlb2_ldb_port *port,
- struct dlb2_ldb_queue *queue,
- struct dlb2_cmd_response *resp)
-{
- enum dlb2_qid_map_state state;
- int i;
-
- /* Unused slot available? */
- if (port->num_mappings < DLB2_MAX_NUM_QIDS_PER_LDB_CQ)
- return 0;
-
- /*
-* If the queue is already mapped (from the application's perspective),
-* this is simply a priority update.
-*/
- state = DLB2_QUEUE_MAPPED;
- if (dlb2_port_find_slot_queue(port, state, queue, &i))
- return 0;
-
- state = DLB2_QUEUE_MAP_IN_PROG;
- if (dlb2_port_find_slot_queue(port, state, queue, &i))
- return 0;
-
- if (dlb2_port_find_slot_with_pending_map_queue(port, queue, &i))
- return 0;
-
- /*
-* If the slot contains an unmap in progress, it's considered
-* available.
-*/
- state = DLB2_QUEUE_UNMAP_IN_PROG;
- if (dlb2_port_find_slot(port, state, &i))
- return 0;
-
- state = DLB2_QUEUE_UNMAPPED;
- if (dlb2_port_find_slot(port, state, &i))
- return 0;
-
- resp->status = DLB2_ST_NO_QID_SLOTS_AVAILABLE;
- return -EINVAL;
-}
-
static struct dlb2_ldb_queue *
dlb2_get_domain_ldb_queue(u32 id,
bool vdev_req,
@@ -1355,299 +1293,6 @@ dlb2_get_domain_used_ldb_port(u32 id,
return NULL;
}
-static int dlb2_verify_map_qid_args(struct dlb2_hw *hw,
- u32 domain_id,
- struct dlb2_map_qid_args *args,
- struct dlb2_cmd_response *resp,
- bool vdev_req,
- unsigned int vdev_id)
-{
- struct dlb2_hw_domain *domain;
- struct dlb2_ldb_port *port;
- struct dlb2_ldb_queue *queue;
- int id;
-
- domain = dlb2_get_domain_from_id(hw, domain_id, vdev_req, vdev_id);
-
- if (domain == NULL) {
- resp->status = DLB2_ST_INVALID_DOMAIN_ID;
- return -EINVAL;
- }
-
- if (!domain->configured) {
- resp->status = DLB2_ST_DOMAIN_NOT_CONFIGURED;
- return -EINVAL;
- }
-
- id = args->port_id;
-
- port = dlb2_get_domain_used_ldb_port(id, vdev_req, domain);
-
- if (port == NULL || !port->configured) {
- resp->status = DLB2_ST_INVALID_PORT_ID;
- return -EINVAL;
- }
-
- if (args->priority >= DLB2_QID_PRIORITIES) {
- resp->status = DLB2_ST_INVALID_PRIORITY;
- return -EINVAL;
- }
-
- queue = dlb2_get_domain_ldb_queue(args->qid, vdev_req, domain);
-
- if (queue == NULL || !queue->configured) {
- resp->status = DLB2_ST_INVALID_QID;
- return -EINVAL;
- }
-
- if (queue->domain_id.phys_id != domain->id.phys_id) {
- resp->status = DLB2_ST_INVALID_QID;
- return -EINVAL;
- }
-
- if (port->domain_id.phys_id != domain->id.phys_id) {
- resp->status = DLB2_ST_INVALID_PORT_ID;
- return -EINVAL;
- }
-
- return 0;
-}
-
-static void dlb2_log_map_qid(struct dlb2_hw *hw,
-u32 domain_id,
-struct dlb2_map_qid_args *args,
-bool vdev_req,
-
[dpdk-dev] [PATCH v2 11/27] event/dlb2: add v2.5 unmap queue
Update low level functions to account for new register map
and hardware access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 331 --
.../event/dlb2/pf/base/dlb2_resource_new.c| 298
2 files changed, 298 insertions(+), 331 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index d59df5e39..ab5b080c1 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -1225,26 +1225,6 @@ dlb2_get_domain_used_dir_pq(struct dlb2_hw *hw,
return NULL;
}
-static bool
-dlb2_port_find_slot_with_pending_map_queue(struct dlb2_ldb_port *port,
- struct dlb2_ldb_queue *queue,
- int *slot)
-{
- int i;
-
- for (i = 0; i < DLB2_MAX_NUM_QIDS_PER_LDB_CQ; i++) {
- struct dlb2_ldb_port_qid_map *map = &port->qid_map[i];
-
- if (map->state == DLB2_QUEUE_UNMAP_IN_PROG_PENDING_MAP &&
- map->pending_qid == queue->id.phys_id)
- break;
- }
-
- *slot = i;
-
- return (i < DLB2_MAX_NUM_QIDS_PER_LDB_CQ);
-}
-
static struct dlb2_ldb_queue *
dlb2_get_domain_ldb_queue(u32 id,
bool vdev_req,
@@ -1265,317 +1245,6 @@ dlb2_get_domain_ldb_queue(u32 id,
return NULL;
}
-static struct dlb2_ldb_port *
-dlb2_get_domain_used_ldb_port(u32 id,
- bool vdev_req,
- struct dlb2_hw_domain *domain)
-{
- struct dlb2_list_entry *iter;
- struct dlb2_ldb_port *port;
- int i;
- RTE_SET_USED(iter);
-
- if (id >= DLB2_MAX_NUM_LDB_PORTS)
- return NULL;
-
- for (i = 0; i < DLB2_NUM_COS_DOMAINS; i++) {
- DLB2_DOM_LIST_FOR(domain->used_ldb_ports[i], port, iter)
- if ((!vdev_req && port->id.phys_id == id) ||
- (vdev_req && port->id.virt_id == id))
- return port;
-
- DLB2_DOM_LIST_FOR(domain->avail_ldb_ports[i], port, iter)
- if ((!vdev_req && port->id.phys_id == id) ||
- (vdev_req && port->id.virt_id == id))
- return port;
- }
-
- return NULL;
-}
-
-static void dlb2_log_unmap_qid(struct dlb2_hw *hw,
- u32 domain_id,
- struct dlb2_unmap_qid_args *args,
- bool vdev_req,
- unsigned int vdev_id)
-{
- DLB2_HW_DBG(hw, "DLB2 unmap QID arguments:\n");
- if (vdev_req)
- DLB2_HW_DBG(hw, "(Request from vdev %d)\n", vdev_id);
- DLB2_HW_DBG(hw, "\tDomain ID: %d\n",
- domain_id);
- DLB2_HW_DBG(hw, "\tPort ID: %d\n",
- args->port_id);
- DLB2_HW_DBG(hw, "\tQueue ID: %d\n",
- args->qid);
- if (args->qid < DLB2_MAX_NUM_LDB_QUEUES)
- DLB2_HW_DBG(hw, "\tQueue's num mappings: %d\n",
- hw->rsrcs.ldb_queues[args->qid].num_mappings);
-}
-
-static int dlb2_verify_unmap_qid_args(struct dlb2_hw *hw,
- u32 domain_id,
- struct dlb2_unmap_qid_args *args,
- struct dlb2_cmd_response *resp,
- bool vdev_req,
- unsigned int vdev_id)
-{
- enum dlb2_qid_map_state state;
- struct dlb2_hw_domain *domain;
- struct dlb2_ldb_queue *queue;
- struct dlb2_ldb_port *port;
- int slot;
- int id;
-
- domain = dlb2_get_domain_from_id(hw, domain_id, vdev_req, vdev_id);
-
- if (domain == NULL) {
- resp->status = DLB2_ST_INVALID_DOMAIN_ID;
- return -EINVAL;
- }
-
- if (!domain->configured) {
- resp->status = DLB2_ST_DOMAIN_NOT_CONFIGURED;
- return -EINVAL;
- }
-
- id = args->port_id;
-
- port = dlb2_get_domain_used_ldb_port(id, vdev_req, domain);
-
- if (port == NULL || !port->configured) {
- resp->status = DLB2_ST_INVALID_PORT_ID;
- return -EINVAL;
- }
-
- if (port->domain_id.phys_id != domain->id.phys_id) {
- resp->status = DLB2_ST_INVALID_PORT_ID;
- return -EINVAL;
- }
-
- queue = dlb2_get_domain_ldb_queue(args->qid, vdev_req, domain);
-
- if (queue == NULL || !queue->configured) {
- DLB2_HW_ERR(hw, "[%s()] Can't unmap unconfigured queue %d\n",
- __func__, args->qid);
- resp->status = DLB2_ST_INVALID_QID;
- return -EINVAL;
- }
-
- /*
-* Verify that the port has the que
[dpdk-dev] [PATCH v2 17/27] event/dlb2: add v2.5 sequence number management
Update sequence number management functions for DLB v2.5,
accounting for new combined register map and hardware access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 67 ---
drivers/event/dlb2/pf/base/dlb2_resource.h| 4 +-
.../event/dlb2/pf/base/dlb2_resource_new.c| 105 ++
3 files changed, 107 insertions(+), 69 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index d53cce643..e8a9d52f6 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -32,70 +32,3 @@
#define DLB2_FUNC_LIST_FOR_SAFE(head, ptr, ptr_tmp, it, it_tmp) \
DLB2_LIST_FOR_EACH_SAFE((head), ptr, ptr_tmp, func_list, it, it_tmp)
-int dlb2_get_group_sequence_numbers(struct dlb2_hw *hw, unsigned int group_id)
-{
- if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS)
- return -EINVAL;
-
- return hw->rsrcs.sn_groups[group_id].sequence_numbers_per_queue;
-}
-
-int dlb2_get_group_sequence_number_occupancy(struct dlb2_hw *hw,
-unsigned int group_id)
-{
- if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS)
- return -EINVAL;
-
- return dlb2_sn_group_used_slots(&hw->rsrcs.sn_groups[group_id]);
-}
-
-static void dlb2_log_set_group_sequence_numbers(struct dlb2_hw *hw,
- unsigned int group_id,
- unsigned long val)
-{
- DLB2_HW_DBG(hw, "DLB2 set group sequence numbers:\n");
- DLB2_HW_DBG(hw, "\tGroup ID: %u\n", group_id);
- DLB2_HW_DBG(hw, "\tValue:%lu\n", val);
-}
-
-int dlb2_set_group_sequence_numbers(struct dlb2_hw *hw,
- unsigned int group_id,
- unsigned long val)
-{
- u32 valid_allocations[] = {64, 128, 256, 512, 1024};
- union dlb2_ro_pipe_grp_sn_mode r0 = { {0} };
- struct dlb2_sn_group *group;
- int mode;
-
- if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS)
- return -EINVAL;
-
- group = &hw->rsrcs.sn_groups[group_id];
-
- /*
-* Once the first load-balanced queue using an SN group is configured,
-* the group cannot be changed.
-*/
- if (group->slot_use_bitmap != 0)
- return -EPERM;
-
- for (mode = 0; mode < DLB2_MAX_NUM_SEQUENCE_NUMBER_MODES; mode++)
- if (val == valid_allocations[mode])
- break;
-
- if (mode == DLB2_MAX_NUM_SEQUENCE_NUMBER_MODES)
- return -EINVAL;
-
- group->mode = mode;
- group->sequence_numbers_per_queue = val;
-
- r0.field.sn_mode_0 = hw->rsrcs.sn_groups[0].mode;
- r0.field.sn_mode_1 = hw->rsrcs.sn_groups[1].mode;
-
- DLB2_CSR_WR(hw, DLB2_RO_PIPE_GRP_SN_MODE, r0.val);
-
- dlb2_log_set_group_sequence_numbers(hw, group_id, val);
-
- return 0;
-}
-
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.h
b/drivers/event/dlb2/pf/base/dlb2_resource.h
index 2e13193bb..00a0b6b57 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.h
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.h
@@ -792,8 +792,8 @@ int dlb2_get_group_sequence_number_occupancy(struct dlb2_hw
*hw,
* ordered queue is configured.
*/
int dlb2_set_group_sequence_numbers(struct dlb2_hw *hw,
- unsigned int group_id,
- unsigned long val);
+ u32 group_id,
+ u32 val);
/**
* dlb2_reset_domain() - reset a scheduling domain
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource_new.c
b/drivers/event/dlb2/pf/base/dlb2_resource_new.c
index 0f18bfeff..927b65568 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource_new.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource_new.c
@@ -6128,3 +6128,108 @@ void dlb2_hw_enable_sparse_ldb_cq_mode(struct dlb2_hw
*hw)
DLB2_CSR_WR(hw, DLB2_CHP_CFG_CHP_CSR_CTRL, ctrl);
}
+/**
+ * dlb2_get_group_sequence_numbers() - return a group's number of SNs per queue
+ * @hw: dlb2_hw handle for a particular device.
+ * @group_id: sequence number group ID.
+ *
+ * This function returns the configured number of sequence numbers per queue
+ * for the specified group.
+ *
+ * Return:
+ * Returns -EINVAL if group_id is invalid, else the group's SNs per queue.
+ */
+int dlb2_get_group_sequence_numbers(struct dlb2_hw *hw, u32 group_id)
+{
+ if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS)
+ return -EINVAL;
+
+ return hw->rsrcs.sn_groups[group_id].sequence_numbers_per_queue;
+}
+
+/**
+ * dlb2_get_group_sequence_number_occupancy() - return a group's in-use slots
+ * @hw: dlb2_hw handle for a particular device.
+ * @group_id: sequence number group ID.
+ *
+ * This function returns the group's number
[dpdk-dev] [PATCH v2 13/27] event/dlb2: add v2.5 credit scheme
DLB v2.5 uses a different credit scheme than was used in DLB v2.0 .
Specifically, there is a single credit pool for both load balanced
and directed traffic, instead of a separate pool for each as is
found with DLB v2.0.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/dlb2.c | 311 ++
1 file changed, 212 insertions(+), 99 deletions(-)
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 0048f6a1b..cc6495b76 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -436,8 +436,13 @@ dlb2_eventdev_info_get(struct rte_eventdev *dev,
*/
evdev_dlb2_default_info.max_event_ports += dlb2->num_ldb_ports;
evdev_dlb2_default_info.max_event_queues += dlb2->num_ldb_queues;
- evdev_dlb2_default_info.max_num_events += dlb2->max_ldb_credits;
-
+ if (dlb2->version == DLB2_HW_V2_5) {
+ evdev_dlb2_default_info.max_num_events +=
+ dlb2->max_credits;
+ } else {
+ evdev_dlb2_default_info.max_num_events +=
+ dlb2->max_ldb_credits;
+ }
evdev_dlb2_default_info.max_event_queues =
RTE_MIN(evdev_dlb2_default_info.max_event_queues,
RTE_EVENT_MAX_QUEUES_PER_DEV);
@@ -451,7 +456,8 @@ dlb2_eventdev_info_get(struct rte_eventdev *dev,
static int
dlb2_hw_create_sched_domain(struct dlb2_hw_dev *handle,
- const struct dlb2_hw_rsrcs *resources_asked)
+ const struct dlb2_hw_rsrcs *resources_asked,
+ uint8_t device_version)
{
int ret = 0;
struct dlb2_create_sched_domain_args *cfg;
@@ -468,8 +474,10 @@ dlb2_hw_create_sched_domain(struct dlb2_hw_dev *handle,
/* DIR ports and queues */
cfg->num_dir_ports = resources_asked->num_dir_ports;
-
- cfg->num_dir_credits = resources_asked->num_dir_credits;
+ if (device_version == DLB2_HW_V2_5)
+ cfg->num_credits = resources_asked->num_credits;
+ else
+ cfg->num_dir_credits = resources_asked->num_dir_credits;
/* LDB queues */
@@ -509,8 +517,8 @@ dlb2_hw_create_sched_domain(struct dlb2_hw_dev *handle,
break;
}
- cfg->num_ldb_credits =
- resources_asked->num_ldb_credits;
+ if (device_version == DLB2_HW_V2)
+ cfg->num_ldb_credits = resources_asked->num_ldb_credits;
cfg->num_atomic_inflights =
DLB2_NUM_ATOMIC_INFLIGHTS_PER_QUEUE *
@@ -519,14 +527,24 @@ dlb2_hw_create_sched_domain(struct dlb2_hw_dev *handle,
cfg->num_hist_list_entries = resources_asked->num_ldb_ports *
DLB2_NUM_HIST_LIST_ENTRIES_PER_LDB_PORT;
- DLB2_LOG_DBG("sched domain create - ldb_qs=%d, ldb_ports=%d,
dir_ports=%d, atomic_inflights=%d, hist_list_entries=%d, ldb_credits=%d,
dir_credits=%d\n",
-cfg->num_ldb_queues,
-resources_asked->num_ldb_ports,
-cfg->num_dir_ports,
-cfg->num_atomic_inflights,
-cfg->num_hist_list_entries,
-cfg->num_ldb_credits,
-cfg->num_dir_credits);
+ if (device_version == DLB2_HW_V2_5) {
+ DLB2_LOG_DBG("sched domain create - ldb_qs=%d, ldb_ports=%d,
dir_ports=%d, atomic_inflights=%d, hist_list_entries=%d, credits=%d\n",
+cfg->num_ldb_queues,
+resources_asked->num_ldb_ports,
+cfg->num_dir_ports,
+cfg->num_atomic_inflights,
+cfg->num_hist_list_entries,
+cfg->num_credits);
+ } else {
+ DLB2_LOG_DBG("sched domain create - ldb_qs=%d, ldb_ports=%d,
dir_ports=%d, atomic_inflights=%d, hist_list_entries=%d, ldb_credits=%d,
dir_credits=%d\n",
+cfg->num_ldb_queues,
+resources_asked->num_ldb_ports,
+cfg->num_dir_ports,
+cfg->num_atomic_inflights,
+cfg->num_hist_list_entries,
+cfg->num_ldb_credits,
+cfg->num_dir_credits);
+ }
/* Configure the QM */
@@ -606,7 +624,6 @@ dlb2_eventdev_configure(const struct rte_eventdev *dev)
*/
if (dlb2->configured) {
dlb2_hw_reset_sched_domain(dev, true);
-
ret = dlb2_hw_query_resources(dlb2);
if (ret) {
DLB2_LOG_ERR("get resources err=%d, devid=%d\n",
@@ -665,20 +682,26 @@ dlb2_eventdev_configure(const struct rte_eventdev *dev)
/* 1 dir queue per dir port */
rsrcs->num_ldb_queues = config->nb_event_queues - rsrcs->num_dir_ports;
- /* Scale down nb_events_limit by 4 for directed credits, since ther
[dpdk-dev] [PATCH v2 19/27] event/dlb2: delete old dlb2_resource.c file
The file dlb_resource_new.c now contains all of the low level
functions required to support both DLB v2.0 and DLB v2.5, so
delete the temporary "old" file, and stop building it. The new
file (dlb_resource_new.c) will be renamed to dlb_resource.c in
the next commit.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/meson.build | 1 -
drivers/event/dlb2/pf/base/dlb2_resource.c | 34 --
2 files changed, 35 deletions(-)
delete mode 100644 drivers/event/dlb2/pf/base/dlb2_resource.c
diff --git a/drivers/event/dlb2/meson.build b/drivers/event/dlb2/meson.build
index bded07e06..d8cfd377f 100644
--- a/drivers/event/dlb2/meson.build
+++ b/drivers/event/dlb2/meson.build
@@ -13,7 +13,6 @@ sources = files('dlb2.c',
'dlb2_xstats.c',
'pf/dlb2_main.c',
'pf/dlb2_pf.c',
- 'pf/base/dlb2_resource.c',
'pf/base/dlb2_resource_new.c',
'rte_pmd_dlb2.c',
'dlb2_selftest.c'
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
deleted file mode 100644
index e8a9d52f6..0
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ /dev/null
@@ -1,34 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2016-2020 Intel Corporation
- */
-
-#include "dlb2_user.h"
-
-#include "dlb2_hw_types.h"
-#include "dlb2_osdep.h"
-#include "dlb2_osdep_bitmap.h"
-#include "dlb2_osdep_types.h"
-#include "dlb2_regs.h"
-#include "dlb2_resource.h"
-
-#include "../../dlb2_priv.h"
-#include "../../dlb2_inline_fns.h"
-
-#define DLB2_DOM_LIST_HEAD(head, type) \
- DLB2_LIST_HEAD((head), type, domain_list)
-
-#define DLB2_FUNC_LIST_HEAD(head, type) \
- DLB2_LIST_HEAD((head), type, func_list)
-
-#define DLB2_DOM_LIST_FOR(head, ptr, iter) \
- DLB2_LIST_FOR_EACH(head, ptr, domain_list, iter)
-
-#define DLB2_FUNC_LIST_FOR(head, ptr, iter) \
- DLB2_LIST_FOR_EACH(head, ptr, func_list, iter)
-
-#define DLB2_DOM_LIST_FOR_SAFE(head, ptr, ptr_tmp, it, it_tmp) \
- DLB2_LIST_FOR_EACH_SAFE((head), ptr, ptr_tmp, domain_list, it, it_tmp)
-
-#define DLB2_FUNC_LIST_FOR_SAFE(head, ptr, ptr_tmp, it, it_tmp) \
- DLB2_LIST_FOR_EACH_SAFE((head), ptr, ptr_tmp, func_list, it, it_tmp)
-
--
2.23.0
[dpdk-dev] [PATCH v2 15/27] event/dlb2: add v2.5 finish map/unmap
Update low level hardware funcs with map/unmap interfaces,
accounting for new combined register file and hardware access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 1054 -
.../event/dlb2/pf/base/dlb2_resource_new.c| 50 +
2 files changed, 50 insertions(+), 1054 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 8c1d8c782..f05f750f5 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -54,1060 +54,6 @@ void dlb2_hw_enable_sparse_ldb_cq_mode(struct dlb2_hw *hw)
DLB2_CSR_WR(hw, DLB2_CHP_CFG_CHP_CSR_CTRL, r0.val);
}
-/*
- * The PF driver cannot assume that a register write will affect subsequent HCW
- * writes. To ensure a write completes, the driver must read back a CSR. This
- * function only need be called for configuration that can occur after the
- * domain has started; prior to starting, applications can't send HCWs.
- */
-static inline void dlb2_flush_csr(struct dlb2_hw *hw)
-{
- DLB2_CSR_RD(hw, DLB2_SYS_TOTAL_VAS);
-}
-
-static void dlb2_ldb_port_cq_enable(struct dlb2_hw *hw,
- struct dlb2_ldb_port *port)
-{
- union dlb2_lsp_cq_ldb_dsbl reg;
-
- /*
-* Don't re-enable the port if a removal is pending. The caller should
-* mark this port as enabled (if it isn't already), and when the
-* removal completes the port will be enabled.
-*/
- if (port->num_pending_removals)
- return;
-
- reg.field.disabled = 0;
-
- DLB2_CSR_WR(hw, DLB2_LSP_CQ_LDB_DSBL(port->id.phys_id), reg.val);
-
- dlb2_flush_csr(hw);
-}
-
-static void dlb2_ldb_port_cq_disable(struct dlb2_hw *hw,
-struct dlb2_ldb_port *port)
-{
- union dlb2_lsp_cq_ldb_dsbl reg;
-
- reg.field.disabled = 1;
-
- DLB2_CSR_WR(hw, DLB2_LSP_CQ_LDB_DSBL(port->id.phys_id), reg.val);
-
- dlb2_flush_csr(hw);
-}
-
-static struct dlb2_ldb_queue *
-dlb2_get_ldb_queue_from_id(struct dlb2_hw *hw,
- u32 id,
- bool vdev_req,
- unsigned int vdev_id)
-{
- struct dlb2_list_entry *iter1;
- struct dlb2_list_entry *iter2;
- struct dlb2_function_resources *rsrcs;
- struct dlb2_hw_domain *domain;
- struct dlb2_ldb_queue *queue;
- RTE_SET_USED(iter1);
- RTE_SET_USED(iter2);
-
- if (id >= DLB2_MAX_NUM_LDB_QUEUES)
- return NULL;
-
- rsrcs = (vdev_req) ? &hw->vdev[vdev_id] : &hw->pf;
-
- if (!vdev_req)
- return &hw->rsrcs.ldb_queues[id];
-
- DLB2_FUNC_LIST_FOR(rsrcs->used_domains, domain, iter1) {
- DLB2_DOM_LIST_FOR(domain->used_ldb_queues, queue, iter2)
- if (queue->id.virt_id == id)
- return queue;
- }
-
- DLB2_FUNC_LIST_FOR(rsrcs->avail_ldb_queues, queue, iter1)
- if (queue->id.virt_id == id)
- return queue;
-
- return NULL;
-}
-
-static struct dlb2_hw_domain *dlb2_get_domain_from_id(struct dlb2_hw *hw,
- u32 id,
- bool vdev_req,
- unsigned int vdev_id)
-{
- struct dlb2_list_entry *iteration;
- struct dlb2_function_resources *rsrcs;
- struct dlb2_hw_domain *domain;
- RTE_SET_USED(iteration);
-
- if (id >= DLB2_MAX_NUM_DOMAINS)
- return NULL;
-
- if (!vdev_req)
- return &hw->domains[id];
-
- rsrcs = &hw->vdev[vdev_id];
-
- DLB2_FUNC_LIST_FOR(rsrcs->used_domains, domain, iteration)
- if (domain->id.virt_id == id)
- return domain;
-
- return NULL;
-}
-
-static int dlb2_port_slot_state_transition(struct dlb2_hw *hw,
- struct dlb2_ldb_port *port,
- struct dlb2_ldb_queue *queue,
- int slot,
- enum dlb2_qid_map_state new_state)
-{
- enum dlb2_qid_map_state curr_state = port->qid_map[slot].state;
- struct dlb2_hw_domain *domain;
- int domain_id;
-
- domain_id = port->domain_id.phys_id;
-
- domain = dlb2_get_domain_from_id(hw, domain_id, false, 0);
- if (domain == NULL) {
- DLB2_HW_ERR(hw,
- "[%s()] Internal error: unable to find domain %d\n",
- __func__, domain_id);
- return -EINVAL;
- }
-
- switch (curr_state) {
- case DLB2_QUEUE_UNMAPPED:
- switch (new_state) {
- case DLB2_QUEUE_MAPPED:
- queue->num_mappings++;
[dpdk-dev] [PATCH v2 16/27] event/dlb2: add v2.5 sparse cq mode
Update sparse cq mode mode functions for DLB v2.5, accounting for new
combined register map and hardware access macros.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_resource.c| 22 ---
.../event/dlb2/pf/base/dlb2_resource_new.c| 39 +++
2 files changed, 39 insertions(+), 22 deletions(-)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index f05f750f5..d53cce643 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -32,28 +32,6 @@
#define DLB2_FUNC_LIST_FOR_SAFE(head, ptr, ptr_tmp, it, it_tmp) \
DLB2_LIST_FOR_EACH_SAFE((head), ptr, ptr_tmp, func_list, it, it_tmp)
-void dlb2_hw_enable_sparse_dir_cq_mode(struct dlb2_hw *hw)
-{
- union dlb2_chp_cfg_chp_csr_ctrl r0;
-
- r0.val = DLB2_CSR_RD(hw, DLB2_CHP_CFG_CHP_CSR_CTRL);
-
- r0.field.cfg_64bytes_qe_dir_cq_mode = 1;
-
- DLB2_CSR_WR(hw, DLB2_CHP_CFG_CHP_CSR_CTRL, r0.val);
-}
-
-void dlb2_hw_enable_sparse_ldb_cq_mode(struct dlb2_hw *hw)
-{
- union dlb2_chp_cfg_chp_csr_ctrl r0;
-
- r0.val = DLB2_CSR_RD(hw, DLB2_CHP_CFG_CHP_CSR_CTRL);
-
- r0.field.cfg_64bytes_qe_ldb_cq_mode = 1;
-
- DLB2_CSR_WR(hw, DLB2_CHP_CFG_CHP_CSR_CTRL, r0.val);
-}
-
int dlb2_get_group_sequence_numbers(struct dlb2_hw *hw, unsigned int group_id)
{
if (group_id >= DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource_new.c
b/drivers/event/dlb2/pf/base/dlb2_resource_new.c
index 8cd1762cf..0f18bfeff 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource_new.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource_new.c
@@ -6089,3 +6089,42 @@ unsigned int dlb2_finish_map_qid_procedures(struct
dlb2_hw *hw)
return num;
}
+
+/**
+ * dlb2_hw_enable_sparse_dir_cq_mode() - enable sparse mode for directed ports.
+ * @hw: dlb2_hw handle for a particular device.
+ *
+ * This function must be called prior to configuring scheduling domains.
+ */
+
+void dlb2_hw_enable_sparse_dir_cq_mode(struct dlb2_hw *hw)
+{
+ u32 ctrl;
+
+ ctrl = DLB2_CSR_RD(hw, DLB2_CHP_CFG_CHP_CSR_CTRL);
+
+ DLB2_BIT_SET(ctrl,
+DLB2_CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_DIR_CQ_MODE);
+
+ DLB2_CSR_WR(hw, DLB2_CHP_CFG_CHP_CSR_CTRL, ctrl);
+}
+
+/**
+ * dlb2_hw_enable_sparse_ldb_cq_mode() - enable sparse mode for load-balanced
+ * ports.
+ * @hw: dlb2_hw handle for a particular device.
+ *
+ * This function must be called prior to configuring scheduling domains.
+ */
+void dlb2_hw_enable_sparse_ldb_cq_mode(struct dlb2_hw *hw)
+{
+ u32 ctrl;
+
+ ctrl = DLB2_CSR_RD(hw, DLB2_CHP_CFG_CHP_CSR_CTRL);
+
+ DLB2_BIT_SET(ctrl,
+DLB2_CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_LDB_CQ_MODE);
+
+ DLB2_CSR_WR(hw, DLB2_CHP_CFG_CHP_CSR_CTRL, ctrl);
+}
+
--
2.23.0
[dpdk-dev] [PATCH v2 22/27] event/dlb2: move dlb2_hw_type_new.h to dlb2_hw_types.h
The original and a "new" file were maintained during the
early portions of the patch series in order to ensure that
all individual patches compiled cleanly. It is now safe to
rename the new file, and use it unconditionally in all DLB
source files.
Signed-off-by: Timothy McDaniel
---
.../event/dlb2/pf/base/{dlb2_hw_types_new.h => dlb2_hw_types.h} | 0
drivers/event/dlb2/pf/base/dlb2_resource.c | 2 +-
drivers/event/dlb2/pf/dlb2_main.c | 2 +-
drivers/event/dlb2/pf/dlb2_main.h | 2 +-
drivers/event/dlb2/pf/dlb2_pf.c | 2 +-
5 files changed, 4 insertions(+), 4 deletions(-)
rename drivers/event/dlb2/pf/base/{dlb2_hw_types_new.h => dlb2_hw_types.h}
(100%)
diff --git a/drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
b/drivers/event/dlb2/pf/base/dlb2_hw_types.h
similarity index 100%
rename from drivers/event/dlb2/pf/base/dlb2_hw_types_new.h
rename to drivers/event/dlb2/pf/base/dlb2_hw_types.h
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 76b8b71db..54b0207db 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -4,7 +4,7 @@
#include "dlb2_user.h"
-#include "dlb2_hw_types_new.h"
+#include "dlb2_hw_types.h"
#include "dlb2_osdep.h"
#include "dlb2_osdep_bitmap.h"
#include "dlb2_osdep_types.h"
diff --git a/drivers/event/dlb2/pf/dlb2_main.c
b/drivers/event/dlb2/pf/dlb2_main.c
index 3ab0c3ef5..1f6ccf8e4 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -14,7 +14,7 @@
#include
#include "base/dlb2_regs_new.h"
-#include "base/dlb2_hw_types_new.h"
+#include "base/dlb2_hw_types.h"
#include "base/dlb2_resource.h"
#include "base/dlb2_osdep.h"
#include "dlb2_main.h"
diff --git a/drivers/event/dlb2/pf/dlb2_main.h
b/drivers/event/dlb2/pf/dlb2_main.h
index a1fab7c43..9eeda482a 100644
--- a/drivers/event/dlb2/pf/dlb2_main.h
+++ b/drivers/event/dlb2/pf/dlb2_main.h
@@ -12,7 +12,7 @@
#include
#include
-#include "base/dlb2_hw_types_new.h"
+#include "base/dlb2_hw_types.h"
#include "../dlb2_user.h"
#define DLB2_DEFAULT_UNREGISTER_TIMEOUT_S 5
diff --git a/drivers/event/dlb2/pf/dlb2_pf.c b/drivers/event/dlb2/pf/dlb2_pf.c
index b475ff0b1..f57dc1584 100644
--- a/drivers/event/dlb2/pf/dlb2_pf.c
+++ b/drivers/event/dlb2/pf/dlb2_pf.c
@@ -36,7 +36,7 @@
#include "../dlb2_iface.h"
#include "../dlb2_inline_fns.h"
#include "dlb2_main.h"
-#include "base/dlb2_hw_types_new.h"
+#include "base/dlb2_hw_types.h"
#include "base/dlb2_osdep.h"
#include "base/dlb2_resource.h"
--
2.23.0
[dpdk-dev] [PATCH v2 21/27] event/dlb2: remove temporary file, dlb_hw_types.h
As support for DLB v2.5 was added, modifications were made to
dlb_hw_types_new.h, but the old file needed to be preserved during
the port in order to meet the requirement that individual patches in
a series each compile successfully. Since the DLB v2.5 support is
completely integrated, it is now safe to remove the old (original)
file, as well as the DLB2_USE_NEW_HEADERS define that was used to
control which version of the file was to be included in certain
source files. The next commit will rename dlb2_hw_type_new.h
to dlb_hw_types.h.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_hw_types.h | 335 -
drivers/event/dlb2/pf/base/dlb2_resource.c | 2 -
drivers/event/dlb2/pf/dlb2_main.c | 2 -
drivers/event/dlb2/pf/dlb2_main.h | 4 -
drivers/event/dlb2/pf/dlb2_pf.c| 2 -
5 files changed, 345 deletions(-)
delete mode 100644 drivers/event/dlb2/pf/base/dlb2_hw_types.h
diff --git a/drivers/event/dlb2/pf/base/dlb2_hw_types.h
b/drivers/event/dlb2/pf/base/dlb2_hw_types.h
deleted file mode 100644
index b007e1674..0
--- a/drivers/event/dlb2/pf/base/dlb2_hw_types.h
+++ /dev/null
@@ -1,335 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2016-2020 Intel Corporation
- */
-
-#ifndef __DLB2_HW_TYPES_H
-#define __DLB2_HW_TYPES_H
-
-#include "../../dlb2_priv.h"
-#include "dlb2_user.h"
-
-#include "dlb2_osdep_list.h"
-#include "dlb2_osdep_types.h"
-
-#define DLB2_MAX_NUM_VDEVS 16
-#define DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS2
-#define DLB2_NUM_ARB_WEIGHTS 8
-#define DLB2_MAX_NUM_AQED_ENTRIES 2048
-#define DLB2_MAX_WEIGHT255
-#define DLB2_NUM_COS_DOMAINS 4
-#define DLB2_MAX_NUM_SEQUENCE_NUMBER_GROUPS2
-#define DLB2_MAX_NUM_SEQUENCE_NUMBER_MODES 5
-#define DLB2_MAX_CQ_COMP_CHECK_LOOPS 409600
-#define DLB2_MAX_QID_EMPTY_CHECK_LOOPS (32 * 64 * 1024 * (800 / 30))
-
-#define DLB2_FUNC_BAR 0
-#define DLB2_CSR_BAR 2
-
-#define PCI_DEVICE_ID_INTEL_DLB2_PF 0x2710
-#define PCI_DEVICE_ID_INTEL_DLB2_VF 0x2711
-
-#define PCI_DEVICE_ID_INTEL_DLB2_5_PF 0x2714
-#define PCI_DEVICE_ID_INTEL_DLB2_5_VF 0x2715
-
-#define DLB2_ALARM_HW_SOURCE_SYS 0
-#define DLB2_ALARM_HW_SOURCE_DLB 1
-
-#define DLB2_ALARM_HW_UNIT_CHP 4
-
-#define DLB2_ALARM_SYS_AID_ILLEGAL_QID 3
-#define DLB2_ALARM_SYS_AID_DISABLED_QID4
-#define DLB2_ALARM_SYS_AID_ILLEGAL_HCW 5
-#define DLB2_ALARM_HW_CHP_AID_ILLEGAL_ENQ 1
-#define DLB2_ALARM_HW_CHP_AID_EXCESS_TOKEN_POPS 2
-
-/*
- * Hardware-defined base addresses. Those prefixed 'DLB2_DRV' are only used by
- * the PF driver.
- */
-#define DLB2_DRV_LDB_PP_BASE 0x230
-#define DLB2_DRV_LDB_PP_STRIDE 0x1000
-#define DLB2_DRV_LDB_PP_BOUND (DLB2_DRV_LDB_PP_BASE + \
- DLB2_DRV_LDB_PP_STRIDE * DLB2_MAX_NUM_LDB_PORTS)
-#define DLB2_DRV_DIR_PP_BASE 0x220
-#define DLB2_DRV_DIR_PP_STRIDE 0x1000
-#define DLB2_DRV_DIR_PP_BOUND (DLB2_DRV_DIR_PP_BASE + \
- DLB2_DRV_DIR_PP_STRIDE * DLB2_MAX_NUM_DIR_PORTS)
-#define DLB2_LDB_PP_BASE 0x210
-#define DLB2_LDB_PP_STRIDE 0x1000
-#define DLB2_LDB_PP_BOUND (DLB2_LDB_PP_BASE + \
- DLB2_LDB_PP_STRIDE * DLB2_MAX_NUM_LDB_PORTS)
-#define DLB2_LDB_PP_OFFS(id) (DLB2_LDB_PP_BASE + (id) * DLB2_PP_SIZE)
-#define DLB2_DIR_PP_BASE 0x200
-#define DLB2_DIR_PP_STRIDE 0x1000
-#define DLB2_DIR_PP_BOUND (DLB2_DIR_PP_BASE + \
- DLB2_DIR_PP_STRIDE * \
- DLB2_MAX_NUM_DIR_PORTS_V2_5)
-#define DLB2_DIR_PP_OFFS(id) (DLB2_DIR_PP_BASE + (id) * DLB2_PP_SIZE)
-
-struct dlb2_resource_id {
- u32 phys_id;
- u32 virt_id;
- u8 vdev_owned;
- u8 vdev_id;
-};
-
-struct dlb2_freelist {
- u32 base;
- u32 bound;
- u32 offset;
-};
-
-static inline u32 dlb2_freelist_count(struct dlb2_freelist *list)
-{
- return list->bound - list->base - list->offset;
-}
-
-struct dlb2_hcw {
- u64 data;
- /* Word 3 */
- u16 opaque;
- u8 qid;
- u8 sched_type:2;
- u8 priority:3;
- u8 msg_type:3;
- /* Word 4 */
- u16 lock_id;
- u8 ts_flag:1;
- u8 rsvd1:2;
- u8 no_dec:1;
- u8 cmp_id:4;
- u8 cq_token:1;
- u8 qe_comp:1;
- u8 qe_frag:1;
- u8 qe_valid:1;
- u8 int_arm:1;
- u8 error:1;
- u8 rsvd:2;
-};
-
-struct dlb2_ldb_queue {
- struct dlb2_list_entry domain_list;
- struct dlb2_list_entry func_list;
- struct dlb2_resource_id id;
- struct dlb2_resource_id domain_id;
- u32 num_qid_inflights;
- u32 aqed_limit;
- u32 sn_group; /* sn == sequence number */
- u32 sn_slot;
- u32 num_mappings;
- u8 sn_cfg_valid;
- u8 num_pendin
[dpdk-dev] [PATCH v2 18/27] event/dlb2: consolidate resource header files into one file
A temporary version of dlb_resource.h (dlb_resource_new.h) was used by the previous commits in this patch series. Merge the two files now that DLB v2.5 support has been fully added to dlb_resource.c. Signed-off-by: Timothy McDaniel --- drivers/event/dlb2/pf/base/dlb2_osdep.h | 1 - drivers/event/dlb2/pf/base/dlb2_resource.h| 36 + .../event/dlb2/pf/base/dlb2_resource_new.c| 2 +- .../event/dlb2/pf/base/dlb2_resource_new.h| 73 --- drivers/event/dlb2/pf/dlb2_main.c | 2 +- drivers/event/dlb2/pf/dlb2_pf.c | 2 +- 6 files changed, 39 insertions(+), 77 deletions(-) delete mode 100644 drivers/event/dlb2/pf/base/dlb2_resource_new.h diff --git a/drivers/event/dlb2/pf/base/dlb2_osdep.h b/drivers/event/dlb2/pf/base/dlb2_osdep.h index 3b0ca84ba..d2ad85a89 100644 --- a/drivers/event/dlb2/pf/base/dlb2_osdep.h +++ b/drivers/event/dlb2/pf/base/dlb2_osdep.h @@ -18,7 +18,6 @@ #include "../dlb2_main.h" /* TEMPORARY inclusion of both headers for merge */ -#include "dlb2_resource_new.h" #include "dlb2_resource.h" #include "../../dlb2_log.h" diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.h b/drivers/event/dlb2/pf/base/dlb2_resource.h index 00a0b6b57..684049cd6 100644 --- a/drivers/event/dlb2/pf/base/dlb2_resource.h +++ b/drivers/event/dlb2/pf/base/dlb2_resource.h @@ -8,6 +8,42 @@ #include "dlb2_user.h" #include "dlb2_osdep_types.h" +/** + * dlb2_resource_init() - initialize the device + * @hw: pointer to struct dlb2_hw. + * @ver: device version. + * + * This function initializes the device's software state (pointed to by the hw + * argument) and programs global scheduling QoS registers. This function should + * be called during driver initialization. + * + * The dlb2_hw struct must be unique per DLB 2.0 device and persist until the + * device is reset. + * + * Return: + * Returns 0 upon success, <0 otherwise. + */ +int dlb2_resource_init(struct dlb2_hw *hw, enum dlb2_hw_ver ver); + +/** + * dlb2_clr_pmcsr_disable() - power on bulk of DLB 2.0 logic + * @hw: dlb2_hw handle for a particular device. + * @ver: device version. + * + * Clearing the PMCSR must be done at initialization to make the device fully + * operational. + */ +void dlb2_clr_pmcsr_disable(struct dlb2_hw *hw, enum dlb2_hw_ver ver); + +/** + * dlb2_resource_free() - free device state memory + * @hw: dlb2_hw handle for a particular device. + * + * This function frees software state pointed to by dlb2_hw. This function + * should be called when resetting the device or unloading the driver. + */ +void dlb2_resource_free(struct dlb2_hw *hw); + /** * dlb2_resource_reset() - reset in-use resources to their initial state * @hw: dlb2_hw handle for a particular device. diff --git a/drivers/event/dlb2/pf/base/dlb2_resource_new.c b/drivers/event/dlb2/pf/base/dlb2_resource_new.c index 927b65568..2f66b2c71 100644 --- a/drivers/event/dlb2/pf/base/dlb2_resource_new.c +++ b/drivers/event/dlb2/pf/base/dlb2_resource_new.c @@ -11,7 +11,7 @@ #include "dlb2_osdep_bitmap.h" #include "dlb2_osdep_types.h" #include "dlb2_regs_new.h" -#include "dlb2_resource_new.h" /* TEMP FOR UPSTREAMPATCHES */ +#include "dlb2_resource.h" #include "../../dlb2_priv.h" #include "../../dlb2_inline_fns.h" diff --git a/drivers/event/dlb2/pf/base/dlb2_resource_new.h b/drivers/event/dlb2/pf/base/dlb2_resource_new.h deleted file mode 100644 index 51f31543c..0 --- a/drivers/event/dlb2/pf/base/dlb2_resource_new.h +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2016-2020 Intel Corporation - */ - -#ifndef __DLB2_RESOURCE_NEW_H -#define __DLB2_RESOURCE_NEW_H - -#include "dlb2_user.h" -#include "dlb2_osdep_types.h" - -/** - * dlb2_resource_init() - initialize the device - * @hw: pointer to struct dlb2_hw. - * @ver: device version. - * - * This function initializes the device's software state (pointed to by the hw - * argument) and programs global scheduling QoS registers. This function should - * be called during driver initialization. - * - * The dlb2_hw struct must be unique per DLB 2.0 device and persist until the - * device is reset. - * - * Return: - * Returns 0 upon success, <0 otherwise. - */ -int dlb2_resource_init(struct dlb2_hw *hw, enum dlb2_hw_ver ver); - -/** - * dlb2_clr_pmcsr_disable() - power on bulk of DLB 2.0 logic - * @hw: dlb2_hw handle for a particular device. - * @ver: device version. - * - * Clearing the PMCSR must be done at initialization to make the device fully - * operational. - */ -void dlb2_clr_pmcsr_disable(struct dlb2_hw *hw, enum dlb2_hw_ver ver); - -/** - * dlb2_finish_unmap_qid_procedures() - finish any pending unmap procedures - * @hw: dlb2_hw handle for a particular device. - * - * This function attempts to finish any outstanding unmap procedures. - * This function should be called by the kernel thread responsible for - * finishing map/unmap procedures. - * - * Return: - * Returns the number of procedures that weren't compl
[dpdk-dev] [PATCH v2 23/27] event/dlb2: delete old register map file, dlb2_regs.h
All dependencies on the old register map have been removed, so
it can now be deleted. The next commit will rename dlb2_regs_new.h
to dlb2_regs.h.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_regs.h | 2527
1 file changed, 2527 deletions(-)
delete mode 100644 drivers/event/dlb2/pf/base/dlb2_regs.h
diff --git a/drivers/event/dlb2/pf/base/dlb2_regs.h
b/drivers/event/dlb2/pf/base/dlb2_regs.h
deleted file mode 100644
index 43ecad4f8..0
--- a/drivers/event/dlb2/pf/base/dlb2_regs.h
+++ /dev/null
@@ -1,2527 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2016-2020 Intel Corporation
- */
-
-#ifndef __DLB2_REGS_H
-#define __DLB2_REGS_H
-
-#include "dlb2_osdep_types.h"
-
-#define DLB2_FUNC_PF_VF2PF_MAILBOX_BYTES 256
-#define DLB2_FUNC_PF_VF2PF_MAILBOX(vf_id, x) \
- (0x1000 + 0x4 * (x) + (vf_id) * 0x1)
-#define DLB2_FUNC_PF_VF2PF_MAILBOX_RST 0x0
-union dlb2_func_pf_vf2pf_mailbox {
- struct {
- u32 msg : 32;
- } field;
- u32 val;
-};
-
-#define DLB2_FUNC_PF_VF2PF_MAILBOX_ISR(vf_id) \
- (0x1f00 + (vf_id) * 0x1)
-#define DLB2_FUNC_PF_VF2PF_MAILBOX_ISR_RST 0x0
-union dlb2_func_pf_vf2pf_mailbox_isr {
- struct {
- u32 vf0_isr : 1;
- u32 vf1_isr : 1;
- u32 vf2_isr : 1;
- u32 vf3_isr : 1;
- u32 vf4_isr : 1;
- u32 vf5_isr : 1;
- u32 vf6_isr : 1;
- u32 vf7_isr : 1;
- u32 vf8_isr : 1;
- u32 vf9_isr : 1;
- u32 vf10_isr : 1;
- u32 vf11_isr : 1;
- u32 vf12_isr : 1;
- u32 vf13_isr : 1;
- u32 vf14_isr : 1;
- u32 vf15_isr : 1;
- u32 rsvd0 : 16;
- } field;
- u32 val;
-};
-
-#define DLB2_FUNC_PF_VF2PF_FLR_ISR(vf_id) \
- (0x1f04 + (vf_id) * 0x1)
-#define DLB2_FUNC_PF_VF2PF_FLR_ISR_RST 0x0
-union dlb2_func_pf_vf2pf_flr_isr {
- struct {
- u32 vf0_isr : 1;
- u32 vf1_isr : 1;
- u32 vf2_isr : 1;
- u32 vf3_isr : 1;
- u32 vf4_isr : 1;
- u32 vf5_isr : 1;
- u32 vf6_isr : 1;
- u32 vf7_isr : 1;
- u32 vf8_isr : 1;
- u32 vf9_isr : 1;
- u32 vf10_isr : 1;
- u32 vf11_isr : 1;
- u32 vf12_isr : 1;
- u32 vf13_isr : 1;
- u32 vf14_isr : 1;
- u32 vf15_isr : 1;
- u32 rsvd0 : 16;
- } field;
- u32 val;
-};
-
-#define DLB2_FUNC_PF_VF2PF_ISR_PEND(vf_id) \
- (0x1f10 + (vf_id) * 0x1)
-#define DLB2_FUNC_PF_VF2PF_ISR_PEND_RST 0x0
-union dlb2_func_pf_vf2pf_isr_pend {
- struct {
- u32 isr_pend : 1;
- u32 rsvd0 : 31;
- } field;
- u32 val;
-};
-
-#define DLB2_FUNC_PF_PF2VF_MAILBOX_BYTES 64
-#define DLB2_FUNC_PF_PF2VF_MAILBOX(vf_id, x) \
- (0x2000 + 0x4 * (x) + (vf_id) * 0x1)
-#define DLB2_FUNC_PF_PF2VF_MAILBOX_RST 0x0
-union dlb2_func_pf_pf2vf_mailbox {
- struct {
- u32 msg : 32;
- } field;
- u32 val;
-};
-
-#define DLB2_FUNC_PF_PF2VF_MAILBOX_ISR(vf_id) \
- (0x2f00 + (vf_id) * 0x1)
-#define DLB2_FUNC_PF_PF2VF_MAILBOX_ISR_RST 0x0
-union dlb2_func_pf_pf2vf_mailbox_isr {
- struct {
- u32 vf0_isr : 1;
- u32 vf1_isr : 1;
- u32 vf2_isr : 1;
- u32 vf3_isr : 1;
- u32 vf4_isr : 1;
- u32 vf5_isr : 1;
- u32 vf6_isr : 1;
- u32 vf7_isr : 1;
- u32 vf8_isr : 1;
- u32 vf9_isr : 1;
- u32 vf10_isr : 1;
- u32 vf11_isr : 1;
- u32 vf12_isr : 1;
- u32 vf13_isr : 1;
- u32 vf14_isr : 1;
- u32 vf15_isr : 1;
- u32 rsvd0 : 16;
- } field;
- u32 val;
-};
-
-#define DLB2_FUNC_PF_VF_RESET_IN_PROGRESS(vf_id) \
- (0x3000 + (vf_id) * 0x1)
-#define DLB2_FUNC_PF_VF_RESET_IN_PROGRESS_RST 0x
-union dlb2_func_pf_vf_reset_in_progress {
- struct {
- u32 vf0_reset_in_progress : 1;
- u32 vf1_reset_in_progress : 1;
- u32 vf2_reset_in_progress : 1;
- u32 vf3_reset_in_progress : 1;
- u32 vf4_reset_in_progress : 1;
- u32 vf5_reset_in_progress : 1;
- u32 vf6_reset_in_progress : 1;
- u32 vf7_reset_in_progress : 1;
- u32 vf8_reset_in_progress : 1;
- u32 vf9_reset_in_progress : 1;
- u32 vf10_reset_in_progress : 1;
- u32 vf11_reset_in_progress : 1;
- u32 vf12_reset_in_progress : 1;
- u32 vf13_reset_in_progress : 1;
- u32 vf14_reset_in_progress : 1;
- u32 vf15_reset_in_progress : 1;
-
[dpdk-dev] [PATCH v2 20/27] event/dlb2: move dlb_resource_new.c to dlb_resource.c
The file dlb_resource_new.c now contains all of the low level
functions required to support both DLB v2.0 and DLB v2.5, and
the original file (dlb_resource.c) was removed in the previous
commit, so rename dlb_resource_new.c to dlb_resource.c, and
update the meson build file so that the new file is built.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/meson.build | 2 +-
.../event/dlb2/pf/base/{dlb2_resource_new.c => dlb2_resource.c} | 0
2 files changed, 1 insertion(+), 1 deletion(-)
rename drivers/event/dlb2/pf/base/{dlb2_resource_new.c => dlb2_resource.c}
(100%)
diff --git a/drivers/event/dlb2/meson.build b/drivers/event/dlb2/meson.build
index d8cfd377f..f22638b8e 100644
--- a/drivers/event/dlb2/meson.build
+++ b/drivers/event/dlb2/meson.build
@@ -13,7 +13,7 @@ sources = files('dlb2.c',
'dlb2_xstats.c',
'pf/dlb2_main.c',
'pf/dlb2_pf.c',
- 'pf/base/dlb2_resource_new.c',
+ 'pf/base/dlb2_resource.c',
'rte_pmd_dlb2.c',
'dlb2_selftest.c'
)
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource_new.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
similarity index 100%
rename from drivers/event/dlb2/pf/base/dlb2_resource_new.c
rename to drivers/event/dlb2/pf/base/dlb2_resource.c
--
2.23.0
[dpdk-dev] [PATCH v2 27/27] event/dlb2: Change device name to dlb_event
Updated eventdev device name to be dlb_event instead of
dlb2_event. The new name will be used for all versions
of the DLB hardware. This change required corresponding changes
to the the directory name that contains the PMD, as well
as the documentation files, build infrastructure, and PMD
specific APIs.
Signed-off-by: Timothy McDaniel
---
MAINTAINERS | 6 +-
app/test/test_eventdev.c | 6 +-
config/rte_config.h | 11 +-
doc/api/doxy-api-index.md | 2 +-
doc/api/doxy-api.conf.in | 2 +-
doc/guides/eventdevs/dlb.rst | 390 ++
doc/guides/eventdevs/index.rst| 2 +-
doc/guides/rel_notes/release_21_05.rst| 5 +
drivers/event/{dlb2 => dlb}/dlb2.c| 25 +-
drivers/event/{dlb2 => dlb}/dlb2_iface.c | 0
drivers/event/{dlb2 => dlb}/dlb2_iface.h | 0
drivers/event/{dlb2 => dlb}/dlb2_inline_fns.h | 0
drivers/event/{dlb2 => dlb}/dlb2_log.h| 0
drivers/event/{dlb2 => dlb}/dlb2_priv.h | 7 +-
drivers/event/{dlb2 => dlb}/dlb2_selftest.c | 8 +-
drivers/event/{dlb2 => dlb}/dlb2_user.h | 0
drivers/event/{dlb2 => dlb}/dlb2_xstats.c | 0
drivers/event/{dlb2 => dlb}/meson.build | 4 +-
.../{dlb2 => dlb}/pf/base/dlb2_hw_types.h | 0
.../event/{dlb2 => dlb}/pf/base/dlb2_osdep.h | 0
.../{dlb2 => dlb}/pf/base/dlb2_osdep_bitmap.h | 0
.../{dlb2 => dlb}/pf/base/dlb2_osdep_list.h | 0
.../{dlb2 => dlb}/pf/base/dlb2_osdep_types.h | 0
.../event/{dlb2 => dlb}/pf/base/dlb2_regs.h | 0
.../{dlb2 => dlb}/pf/base/dlb2_resource.c | 0
.../{dlb2 => dlb}/pf/base/dlb2_resource.h | 0
drivers/event/{dlb2 => dlb}/pf/dlb2_main.c| 0
drivers/event/{dlb2 => dlb}/pf/dlb2_main.h| 0
drivers/event/{dlb2 => dlb}/pf/dlb2_pf.c | 0
.../rte_pmd_dlb2.c => dlb/rte_pmd_dlb.c} | 6 +-
.../rte_pmd_dlb2.h => dlb/rte_pmd_dlb.h} | 12 +-
drivers/event/{dlb2 => dlb}/version.map | 2 +-
drivers/event/meson.build | 2 +-
33 files changed, 440 insertions(+), 50 deletions(-)
create mode 100644 doc/guides/eventdevs/dlb.rst
rename drivers/event/{dlb2 => dlb}/dlb2.c (99%)
rename drivers/event/{dlb2 => dlb}/dlb2_iface.c (100%)
rename drivers/event/{dlb2 => dlb}/dlb2_iface.h (100%)
rename drivers/event/{dlb2 => dlb}/dlb2_inline_fns.h (100%)
rename drivers/event/{dlb2 => dlb}/dlb2_log.h (100%)
rename drivers/event/{dlb2 => dlb}/dlb2_priv.h (99%)
rename drivers/event/{dlb2 => dlb}/dlb2_selftest.c (99%)
rename drivers/event/{dlb2 => dlb}/dlb2_user.h (100%)
rename drivers/event/{dlb2 => dlb}/dlb2_xstats.c (100%)
rename drivers/event/{dlb2 => dlb}/meson.build (89%)
rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_hw_types.h (100%)
rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep.h (100%)
rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep_bitmap.h (100%)
rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep_list.h (100%)
rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_osdep_types.h (100%)
rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_regs.h (100%)
rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_resource.c (100%)
rename drivers/event/{dlb2 => dlb}/pf/base/dlb2_resource.h (100%)
rename drivers/event/{dlb2 => dlb}/pf/dlb2_main.c (100%)
rename drivers/event/{dlb2 => dlb}/pf/dlb2_main.h (100%)
rename drivers/event/{dlb2 => dlb}/pf/dlb2_pf.c (100%)
rename drivers/event/{dlb2/rte_pmd_dlb2.c => dlb/rte_pmd_dlb.c} (88%)
rename drivers/event/{dlb2/rte_pmd_dlb2.h => dlb/rte_pmd_dlb.h} (88%)
rename drivers/event/{dlb2 => dlb}/version.map (60%)
diff --git a/MAINTAINERS b/MAINTAINERS
index fa143160d..40610e169 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1196,10 +1196,10 @@ Cavium OCTEON TX timvf
M: Pavan Nikhilesh
F: drivers/event/octeontx/timvf_*
-Intel DLB2
+Intel DLB
M: Timothy McDaniel
-F: drivers/event/dlb2/
-F: doc/guides/eventdevs/dlb2.rst
+F: drivers/event/dlb/
+F: doc/guides/eventdevs/dlb.rst
Marvell OCTEON TX2
M: Pavan Nikhilesh
diff --git a/app/test/test_eventdev.c b/app/test/test_eventdev.c
index bcfaa53cb..ba27bed02 100644
--- a/app/test/test_eventdev.c
+++ b/app/test/test_eventdev.c
@@ -1031,9 +1031,9 @@ test_eventdev_selftest_dpaa2(void)
}
static int
-test_eventdev_selftest_dlb2(void)
+test_eventdev_selftest_dlb(void)
{
- return test_eventdev_selftest_impl("dlb2_event", "");
+ return test_eventdev_selftest_impl("dlb_event", "");
}
REGISTER_TEST_COMMAND(eventdev_common_autotest, test_eventdev_common);
@@ -1043,4 +1043,4 @@ REGISTER_TEST_COMMAND(eventdev_selftest_octeontx,
REGISTER_TEST_COMMAND(eventdev_selftest_octeontx2,
test_eventdev_selftest_octeontx2);
REGISTER_TEST_COMMAND(eventdev_selftest_dpaa2, test_eventdev_selftest_dpaa2);
-REGISTER_TEST_COMMAND(eventdev_selftest_dlb2, test_eventdev_selftest_dlb2);
+REGISTER_TEST_COMMAND(ev
[dpdk-dev] [PATCH v2 24/27] event/dlb2: rename dlb2_regs_new.h to dlb2_regs.h
All references to the old register map have been removed,
so it is safe to rename the new combined file that supports
both DLB v2.0 and DLB v2.5. Also fixed all places where this
file is included.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/pf/base/dlb2_hw_types.h | 2 +-
drivers/event/dlb2/pf/base/{dlb2_regs_new.h => dlb2_regs.h} | 6 +++---
drivers/event/dlb2/pf/base/dlb2_resource.c | 2 +-
drivers/event/dlb2/pf/dlb2_main.c | 2 +-
4 files changed, 6 insertions(+), 6 deletions(-)
rename drivers/event/dlb2/pf/base/{dlb2_regs_new.h => dlb2_regs.h} (99%)
diff --git a/drivers/event/dlb2/pf/base/dlb2_hw_types.h
b/drivers/event/dlb2/pf/base/dlb2_hw_types.h
index 0f418ef5d..db9dfd240 100644
--- a/drivers/event/dlb2/pf/base/dlb2_hw_types.h
+++ b/drivers/event/dlb2/pf/base/dlb2_hw_types.h
@@ -10,7 +10,7 @@
#include "dlb2_osdep_list.h"
#include "dlb2_osdep_types.h"
-#include "dlb2_regs_new.h"
+#include "dlb2_regs.h"
#define DLB2_BITS_SET(x, val, mask)(x = ((x) & ~(mask)) \
| (((val) << (mask##_LOC)) & (mask)))
diff --git a/drivers/event/dlb2/pf/base/dlb2_regs_new.h
b/drivers/event/dlb2/pf/base/dlb2_regs.h
similarity index 99%
rename from drivers/event/dlb2/pf/base/dlb2_regs_new.h
rename to drivers/event/dlb2/pf/base/dlb2_regs.h
index 593243d63..cdff5cb1f 100644
--- a/drivers/event/dlb2/pf/base/dlb2_regs_new.h
+++ b/drivers/event/dlb2/pf/base/dlb2_regs.h
@@ -2,8 +2,8 @@
* Copyright(c) 2016-2020 Intel Corporation
*/
-#ifndef __DLB2_REGS_NEW_H
-#define __DLB2_REGS_NEW_H
+#ifndef __DLB2_REGS_H
+#define __DLB2_REGS_H
#include "dlb2_osdep_types.h"
@@ -4409,4 +4409,4 @@
#define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_V_LOC 15
#define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_RSVD0_LOC 16
-#endif /* __DLB2_REGS_NEW_H */
+#endif /* __DLB2_REGS_H */
diff --git a/drivers/event/dlb2/pf/base/dlb2_resource.c
b/drivers/event/dlb2/pf/base/dlb2_resource.c
index 54b0207db..3661b940c 100644
--- a/drivers/event/dlb2/pf/base/dlb2_resource.c
+++ b/drivers/event/dlb2/pf/base/dlb2_resource.c
@@ -8,7 +8,7 @@
#include "dlb2_osdep.h"
#include "dlb2_osdep_bitmap.h"
#include "dlb2_osdep_types.h"
-#include "dlb2_regs_new.h"
+#include "dlb2_regs.h"
#include "dlb2_resource.h"
#include "../../dlb2_priv.h"
diff --git a/drivers/event/dlb2/pf/dlb2_main.c
b/drivers/event/dlb2/pf/dlb2_main.c
index 1f6ccf8e4..b6ec85b47 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -13,7 +13,7 @@
#include
#include
-#include "base/dlb2_regs_new.h"
+#include "base/dlb2_regs.h"
#include "base/dlb2_hw_types.h"
#include "base/dlb2_resource.h"
#include "base/dlb2_osdep.h"
--
2.23.0
[dpdk-dev] [PATCH v2 25/27] event/dlb2: update xstats for v2.5
Add DLB v2.5 specific information to xstats, such as metrics for the new
credit scheme.
Signed-off-by: Timothy McDaniel
---
drivers/event/dlb2/dlb2_xstats.c | 41
1 file changed, 37 insertions(+), 4 deletions(-)
diff --git a/drivers/event/dlb2/dlb2_xstats.c b/drivers/event/dlb2/dlb2_xstats.c
index b62e62060..d4c8d9903 100644
--- a/drivers/event/dlb2/dlb2_xstats.c
+++ b/drivers/event/dlb2/dlb2_xstats.c
@@ -9,6 +9,7 @@
#include "dlb2_priv.h"
#include "dlb2_inline_fns.h"
+#include "pf/base/dlb2_regs.h"
enum dlb2_xstats_type {
/* common to device and port */
@@ -21,6 +22,7 @@ enum dlb2_xstats_type {
zero_polls, /**< Call dequeue burst and return 0 */
tx_nospc_ldb_hw_credits,/**< Insufficient LDB h/w credits */
tx_nospc_dir_hw_credits,/**< Insufficient DIR h/w credits */
+ tx_nospc_hw_credits,/**< Insufficient h/w credits */
tx_nospc_inflight_max, /**< Reach the new_event_threshold */
tx_nospc_new_event_limit, /**< Insufficient s/w credits */
tx_nospc_inflight_credits, /**< Port has too few s/w credits */
@@ -29,6 +31,7 @@ enum dlb2_xstats_type {
inflight_events,
ldb_pool_size,
dir_pool_size,
+ pool_size,
/* port specific */
tx_new, /**< Send an OP_NEW event */
tx_fwd, /**< Send an OP_FORWARD event */
@@ -129,6 +132,9 @@ dlb2_device_traffic_stat_get(struct dlb2_eventdev *dlb2,
case tx_nospc_dir_hw_credits:
val += port->stats.traffic.tx_nospc_dir_hw_credits;
break;
+ case tx_nospc_hw_credits:
+ val += port->stats.traffic.tx_nospc_hw_credits;
+ break;
case tx_nospc_inflight_max:
val += port->stats.traffic.tx_nospc_inflight_max;
break;
@@ -159,6 +165,7 @@ get_dev_stat(struct dlb2_eventdev *dlb2, uint16_t obj_idx
__rte_unused,
case zero_polls:
case tx_nospc_ldb_hw_credits:
case tx_nospc_dir_hw_credits:
+ case tx_nospc_hw_credits:
case tx_nospc_inflight_max:
case tx_nospc_new_event_limit:
case tx_nospc_inflight_credits:
@@ -171,6 +178,8 @@ get_dev_stat(struct dlb2_eventdev *dlb2, uint16_t obj_idx
__rte_unused,
return dlb2->num_ldb_credits;
case dir_pool_size:
return dlb2->num_dir_credits;
+ case pool_size:
+ return dlb2->num_credits;
default: return -1;
}
}
@@ -203,6 +212,9 @@ get_port_stat(struct dlb2_eventdev *dlb2, uint16_t obj_idx,
case tx_nospc_dir_hw_credits:
return ev_port->stats.traffic.tx_nospc_dir_hw_credits;
+ case tx_nospc_hw_credits:
+ return ev_port->stats.traffic.tx_nospc_hw_credits;
+
case tx_nospc_inflight_max:
return ev_port->stats.traffic.tx_nospc_inflight_max;
@@ -357,6 +369,7 @@ dlb2_xstats_init(struct dlb2_eventdev *dlb2)
"zero_polls",
"tx_nospc_ldb_hw_credits",
"tx_nospc_dir_hw_credits",
+ "tx_nospc_hw_credits",
"tx_nospc_inflight_max",
"tx_nospc_new_event_limit",
"tx_nospc_inflight_credits",
@@ -364,6 +377,7 @@ dlb2_xstats_init(struct dlb2_eventdev *dlb2)
"inflight_events",
"ldb_pool_size",
"dir_pool_size",
+ "pool_size",
};
static const enum dlb2_xstats_type dev_types[] = {
rx_ok,
@@ -375,6 +389,7 @@ dlb2_xstats_init(struct dlb2_eventdev *dlb2)
zero_polls,
tx_nospc_ldb_hw_credits,
tx_nospc_dir_hw_credits,
+ tx_nospc_hw_credits,
tx_nospc_inflight_max,
tx_nospc_new_event_limit,
tx_nospc_inflight_credits,
@@ -382,6 +397,7 @@ dlb2_xstats_init(struct dlb2_eventdev *dlb2)
inflight_events,
ldb_pool_size,
dir_pool_size,
+ pool_size,
};
/* Note: generated device stats are not allowed to be reset. */
static const uint8_t dev_reset_allowed[] = {
@@ -394,6 +410,7 @@ dlb2_xstats_init(struct dlb2_eventdev *dlb2)
0, /* zero_polls */
0, /* tx_nospc_ldb_hw_credits */
0, /* tx_nospc_dir_hw_credits */
+ 0, /* tx_nospc_hw_credits */
0, /* tx_nospc_inflight_max */
0, /* tx_nospc_new_event_limit */
0, /* tx_nospc_inflight_credits */
@@ -401,6 +418,7 @@ dlb2_xstats_init(struct dlb2_eventdev *dlb2)
0, /* inflight_events */
0, /* ldb_pool_size */
0, /* dir_pool_size */
+ 0, /* pool_size */
};
[dpdk-dev] [PATCH v2 26/27] doc/dlb2: update documentation for v2.5
Update the dlb documentation for v2.5. Notable differences include the new cobined credit scheme. Also cleaned up a couple of sections, and removed a duplicate section. Signed-off-by: Timothy McDaniel --- doc/guides/eventdevs/dlb2.rst | 75 +-- 1 file changed, 27 insertions(+), 48 deletions(-) diff --git a/doc/guides/eventdevs/dlb2.rst b/doc/guides/eventdevs/dlb2.rst index 94d2c77ff..94e46ea7d 100644 --- a/doc/guides/eventdevs/dlb2.rst +++ b/doc/guides/eventdevs/dlb2.rst @@ -4,7 +4,8 @@ Driver for the Intel® Dynamic Load Balancer (DLB2) == -The DPDK dlb poll mode driver supports the Intel® Dynamic Load Balancer. +The DPDK dlb poll mode driver supports the Intel® Dynamic Load Balancer, +hardware versions 2.0 and 2.5. Prerequisites - @@ -35,7 +36,7 @@ eventdev API and DLB2 misalign. Scheduling Domain Configuration ~~~ -There are 32 scheduling domainis the DLB2. +DLB2 supports 32 scheduling domains. When one is configured, it allocates load-balanced and directed queues, ports, credits, and other hardware resources. Some resource allocations are user-controlled -- the number of queues, for example @@ -67,42 +68,7 @@ If the ``RTE_EVENT_QUEUE_CFG_ALL_TYPES`` flag is not set, schedule_type dictates the queue's scheduling type. The ``nb_atomic_order_sequences`` queue configuration field sets the ordered -queue's reorder buffer size. DLB2 has 4 groups of ordered queues, where each -group is configured to contain either 1 queue with 1024 reorder entries, 2 -queues with 512 reorder entries, and so on down to 32 queues with 32 entries. - -When a load-balanced queue is created, the PMD will configure a new sequence -number group on-demand if num_sequence_numbers does not match a pre-existing -group with available reorder buffer entries. If all sequence number groups are -in use, no new group will be created and queue configuration will fail. (Note -that when the PMD is used with a virtual DLB2 device, it cannot change the -sequence number configuration.) - -The queue's ``nb_atomic_flows`` parameter is ignored by the DLB2 PMD, because -the DLB2 does not limit the number of flows a queue can track. In the DLB2, all -load-balanced queues can use the full 16-bit flow ID range. - -Load-Balanced Queues - - -A load-balanced queue can support atomic and ordered scheduling, or atomic and -unordered scheduling, but not atomic and unordered and ordered scheduling. A -queue's scheduling types are controlled by the event queue configuration. - -If the user sets the ``RTE_EVENT_QUEUE_CFG_ALL_TYPES`` flag, the -``nb_atomic_order_sequences`` determines the supported scheduling types. -With non-zero ``nb_atomic_order_sequences``, the queue is configured for atomic -and ordered scheduling. In this case, ``RTE_SCHED_TYPE_PARALLEL`` scheduling is -supported by scheduling those events as ordered events. Note that when the -event is dequeued, its sched_type will be ``RTE_SCHED_TYPE_ORDERED``. Else if -``nb_atomic_order_sequences`` is zero, the queue is configured for atomic and -unordered scheduling. In this case, ``RTE_SCHED_TYPE_ORDERED`` is unsupported. - -If the ``RTE_EVENT_QUEUE_CFG_ALL_TYPES`` flag is not set, schedule_type -dictates the queue's scheduling type. - -The ``nb_atomic_order_sequences`` queue configuration field sets the ordered -queue's reorder buffer size. DLB2 has 4 groups of ordered queues, where each +queue's reorder buffer size. DLB2 has 2 groups of ordered queues, where each group is configured to contain either 1 queue with 1024 reorder entries, 2 queues with 512 reorder entries, and so on down to 32 queues with 32 entries. @@ -157,6 +123,11 @@ type (atomic, ordered, or parallel) is not preserved, and an event's sched_type will be set to ``RTE_SCHED_TYPE_ATOMIC`` when it is dequeued from a directed port. +Finally, even though all 3 event types are supported on the same QID by +converting unordered events to ordered, such use should be discouraged as much +as possible, since mixing types on the same queue uses valuable reorder +resources, and orders events which do not require ordering. + Flow ID ~~~ @@ -169,13 +140,15 @@ Hardware Credits DLB2 uses a hardware credit scheme to prevent software from overflowing hardware event storage, with each unit of storage represented by a credit. A port spends a credit to enqueue an event, and hardware refills the ports with credits as the -events are scheduled to ports. Refills come from credit pools, and each port is -a member of a load-balanced credit pool and a directed credit pool. The -load-balanced credits are used to enqueue to load-balanced queues, and directed -credits are used for directed queues. +events are scheduled to ports. Refills come from credit pools. -A DLB2 eventdev contains one load-balanced and one directed credit pool. These -pools' sizes are controlled by the nb_eve
Re: [dpdk-dev] rte_flow ageing
Thanks a lot Asaf, for your answer, so fast. depending on the feature we want, the table you mentioned in the doc may give different combinations. Mine, DPDK-20.08/OFED 5.1-2, is part of the list. Anyway, my question is more about the API design. Please, find my comments below. On 3/29/21 8:02 PM, Asaf Penso wrote: Hello David, Thanks for reaching out, I'll try to answer as best as I know and I added Matan who will be able to provide further info during next week. First, according to our pmd documentation (http://doc.dpdk.org/guides/nics/mlx5.html#supported-hardware-offloads) we recommend using DPDK20.11 and OFED5.2, and not the combo you are referring to. Second, we can always improve our documentation and I appreciate your queries. Please see my comments inline. Regards, Asaf Penso -Original Message- From: dev On Behalf Of David Bouyeure Sent: Monday, March 29, 2021 11:35 AM To: dev@dpdk.org Subject: [dpdk-dev] rte_flow ageing Hi, I've found out the pretty useful experimental brand new flow ageing API implemented in the mlx5 PMD. It is useful and I hope you'll fully understand at the end why 😊 I'm trying it (rte_eth_dev_callback_register(RTE_ETH_EVENT_FLOW_AGED), RTE_FLOW_ACTION_TYPE_AGE) to recover any flow that I previously offloaded. The DPDK version is 20.08 and Mellanox(Connect-X6) OFED drivers are 5.1- 2.5.8.0. See above the suggested versions for this feature I eventually don't see the usefulness of the callback since it's actually triggered indirectly by us(the DPDK application) when calling rte_flow_get_aged_flows(). The main intention is to offload the aging logic from the application level to the pmd level. There is so saving of cpu cycles, and the gain here is with simplicity. The application doesn't need to have complex logic of comparison between counters or other HW info that can be retrieve. Now, the pmd hides all of that and leaves the application only to decide what to do with the flows that are aged out. Please note, the pmd does not delete any flow, just provide the list of all the flows that are aged. I fully understand that and this is a very very useful feature to us. If we don't call it, the callback is called only once. And, calling rte_flow_get_aged_flows() from the callback won't trigger it next time(MLX5_AGE_TRIGGER is reset after the callback call) Once you call the function the pmd will not trigger more events. Now it's up to the application to decide what to do. Doing it differently, will cause an interrupt storm and the pmd avoids that.If new flows are aged then the pmd will trigger a new event. Sorry, I wasn't realizing that the callback isn't called for each flow but rather for each port, though it's clear in the PMD code. But, the fact that we can register several RTE_ETH_EVENT_FLOW_AGED event handlers is surprising. So, you suggest to use the callback as an indicator to later retrieve the aged-out flows, that's it? Wouldn't calling rte_flow_get_aged_flows with NULL param just to get the number of aged_flows do the same, without the need to un/register a callback, and DPDK to call it? Another thing, the explanation here http://doc.dpdk.org/api/rte__flow_8h.html#a43763e0794d2696b18b6272619aafc2a *"...to get the aged flows usynchronously from the event callback..."* seems wrong to me because age_info->flags is set to 0 just after the callback, thus ML5_AGE_TRIGGER is canceled and no event will be triggered before we'll call rte_flow_get_aged_flows() outside of the callback. Furthermore, I don't see the point of computing ageing flows in mlx5_fow.c::mlx5_flow_aging_check() if the client callback isn't called. Can you elaborate? I'm not sure I understand your intention. Please forgot :-) So far, I can handle the flow ageing from the same thread as the one which is handling the flow direction(rte_flow), it even avoid threads synchronization. But, in the future, I may need to be noticed as soon as possible of a single flow ageing, and thus handle this flow logic from the ageing callback. I may misunderstand the whole ageing API... Thanks a lot for any clarification.
Re: [dpdk-dev] [PATCH v5 09/10] eal: add EAL argument for setting thread priority
On Mon, 29 Mar 2021 15:40:39 -0700 Narcisa Ana Maria Vasile wrote: > From: Narcisa Vasile > > Allow the user to choose the thread priority through an EAL > command line argument. > > The user can select the thread priority to be either 'normal' > or 'critical': > --thread-prio normal > --thread-prio realtime > > Signed-off-by: Narcisa Vasile The discussion internally was that this was intended to resolve issues on Windows. So it makes sense for Windows, but it is not something that we want to have on Linux. Could you make this Windows only, and add update the documentation please. I just don't want Linux users discovering it, trying it, then reporting more bugs.
Re: [dpdk-dev] [PATCH v5 02/10] eal: add thread attributes
On Mon, 29 Mar 2021 15:40:32 -0700
Narcisa Ana Maria Vasile wrote:
> +
> +int
> +rte_thread_attr_set_priority(rte_thread_attr_t *thread_attr,
> + enum rte_thread_priority priority)
> +{
> + if (thread_attr == NULL) {
> + RTE_LOG(DEBUG, EAL,
> + "Unable to set priority attribute, invalid
> parameter\n");
> + return EINVAL;
> + }
> +
> + thread_attr->priority = priority;
> + return 0;
> +}
For Linux, shouldn't this be ENOTSUPP since not supported.
[dpdk-dev] Minutes of Technical Board Meeting, 2021-03-10
Minutes of Technical Board Meeting, 2021-03-10 Members Attending: - Aaron Conole - Bruce Richardson - Ferruh Yigit - Hemant Agrawal - Honnappa Nagarahalli (Chair) - Jerin Jacob - Kevin Traynor - Konstantin Ananyev - Maxime Coquelin - Olivier Matz - Stephen Hemminger - Thomas Monjalon NOTE: The Technical Board meetings take place every second Wednesday on https://meet.jit.si/DPDK at 3 pm UTC. Meetings are public, and DPDK community members are welcome to attend. Agenda and minutes can be found at http://core.dpdk.org/techboard/minutes NOTE: Next meeting will be on Wednesday 2021-03-24 @3pm UTC, and will be chaired by Jerin. #1 Build config improvement proposal * Discussion centered around the following issues - Ability to enable/disable compilation of libraries and PMDs. There was no objection from the techboard members on the requirement. - Ability to enable/disable #defines - Ability to tune the values of #defines * Few prominent points discussed - This will result in #ifdefs in the code (for ex: in testpmd) - One option is for all the PMDs to document their configurable #defines in PMD specific header files. Having these distributed is much easier to search. - Can some of the existing #defines be converted to runtime configurations? For ex: RTE_MAX_LCORE? This might impact ABI. * Bruce to think about converting the doc to a blog or an email on the mailing list. But soliciting feedback is most important. #2 DMARC on mailing list * Ali Alnubani is working on the issue and will have a mailing list to test #3 Documenting criteria on adding/removing members to technical board * Thomas has sent patches to the Techboard. Board members to review and provide feedback. #4 Criteria for adding new members to security team? * Being known to members of the Techboard would be one criteria. * AI: Ferruh to put out a document or email to propose the criteria #5 Testing leader's role definition * AI: Aaron Conole has it completed and will send it to the Techboard. #6 Approval for blog on C11 adoption * Konstantin has provided the comments * Awaiting comments from PPC maintainers #7 Update on DTS usability * Intel engineers working on DTS are involved in providing the feedback * If the test cases can be added to the unit tests, it should be allowed as well. i.e. DTS should not be made mandatory. This will provide flexibility for developers.
Re: [dpdk-dev] [PATCH 2/6] net/hns3: fix compiling error for using SVE algorithm
在 2021/3/30 0:10, Ferruh Yigit 写道:
On 3/23/2021 1:45 PM, Min Hu (Connor) wrote:
From: Huisong Li
The 'queue_full_cnt' stats have been encapsulated in 'dfx_stats'.
However, the modification in the SVE algorithm is omitted.
As a result, the driver fails to be compiled when the SVE
algorithm is used.
Fixes: 9b77f1fe303f ("net/hns3: encapsulate DFX stats in datapath")
Signed-off-by: Huisong Li
Signed-off-by: Min Hu (Connor)
---
drivers/net/hns3/hns3_rxtx_vec_sve.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/hns3/hns3_rxtx_vec_sve.c
b/drivers/net/hns3/hns3_rxtx_vec_sve.c
index f8655fa..e1a1731 100644
--- a/drivers/net/hns3/hns3_rxtx_vec_sve.c
+++ b/drivers/net/hns3/hns3_rxtx_vec_sve.c
@@ -439,7 +439,7 @@ hns3_xmit_fixed_burst_vec_sve(void *__restrict
tx_queue,
nb_pkts = RTE_MIN(txq->tx_bd_ready, nb_pkts);
if (unlikely(nb_pkts == 0)) {
- txq->queue_full_cnt++;
+ txq->dfx_stats.queue_full_cnt++;
return 0;
}
Hi Connor,
This is a very obvious build error, I am concerned how this is released.
Do you have any internal testing?
Hi Ferruh,
Well, we admit it is our mistake for this issue. Let me
describe the reason:
Firstly, we must declare that we have our inner CI system for
building and testing. While when we upstream the ""support SVE" patch,
our CI does not support SVE building. Instead we build and test SVE on
our local platform.
Then when we upstream the "encapsulate DFX stats in datapath"
patch, we only build it in CI(at that time, SVE building is still not
supported), regardless of SVE building on local platform.
Now, SVE building is supported in our CI， So the building error
occurs.
We'll pay more attention to the issue in the future. Thanks.
+ Aaron & Honnappa,
If we can have a build test in our public CI with SVE?
.
[dpdk-dev] [PATCH] mbuf: Fix illegal pointer access to mempool members
Before accessing the private data of mempool in
function rte_pktmbuf_priv_size() and rte_pktmbuf_data_room_size(),
it is necessary to determine whether the private data exists,
otherwise it will cause null pointer access.
Signed-off-by: Wenwu Ma
---
lib/librte_mbuf/rte_mbuf.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h
index c4c9ebfaa..6c2559550 100644
--- a/lib/librte_mbuf/rte_mbuf.h
+++ b/lib/librte_mbuf/rte_mbuf.h
@@ -811,6 +811,9 @@ rte_pktmbuf_data_room_size(struct rte_mempool *mp)
{
struct rte_pktmbuf_pool_private *mbp_priv;
+ if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private))
+ return 0;
+
mbp_priv = (struct rte_pktmbuf_pool_private *)rte_mempool_get_priv(mp);
return mbp_priv->mbuf_data_room_size;
}
@@ -832,6 +835,9 @@ rte_pktmbuf_priv_size(struct rte_mempool *mp)
{
struct rte_pktmbuf_pool_private *mbp_priv;
+ if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private))
+ return 0;
+
mbp_priv = (struct rte_pktmbuf_pool_private *)rte_mempool_get_priv(mp);
return mbp_priv->mbuf_priv_size;
}
--
2.25.1
Re: [dpdk-dev] [PATCH 2/2] net/hns3: support IEEE 1588 PTP
在 2021/3/30 21:59, Ferruh Yigit 写道:
On 3/26/2021 8:56 AM, Min Hu (Connor) wrote:
Add hns3 support for new ethdev APIs to enable and read IEEE1588/
802.1AS PTP timestamps.
Signed-off-by: Min Hu (Connor)
---
doc/guides/nics/features/hns3.ini | 2 +
doc/guides/nics/hns3.rst | 1 +
drivers/net/hns3/hns3_cmd.h | 33 +
drivers/net/hns3/hns3_ethdev.c | 59 +++-
drivers/net/hns3/hns3_ethdev.h | 25
drivers/net/hns3/hns3_ptp.c | 294
++
drivers/net/hns3/hns3_regs.h | 25
drivers/net/hns3/hns3_rxtx.c | 56 +++-
drivers/net/hns3/hns3_rxtx.h | 12 ++
drivers/net/hns3/hns3_rxtx_vec.c | 19 ++-
drivers/net/hns3/meson.build | 3 +-
11 files changed, 516 insertions(+), 13 deletions(-)
create mode 100644 drivers/net/hns3/hns3_ptp.c
diff --git a/doc/guides/nics/features/hns3.ini
b/doc/guides/nics/features/hns3.ini
index 3988be4..502bfe7 100644
--- a/doc/guides/nics/features/hns3.ini
+++ b/doc/guides/nics/features/hns3.ini
@@ -43,6 +43,8 @@ Stats per queue = Y
FW version = Y
Registers dump = Y
Module EEPROM dump = Y
+Timesync = Y
+Timestamp offload = Y
Multiprocess aware = Y
Linux = Y
ARMv8 = Y
diff --git a/doc/guides/nics/hns3.rst b/doc/guides/nics/hns3.rst
index ccd2f6f..3366562 100644
--- a/doc/guides/nics/hns3.rst
+++ b/doc/guides/nics/hns3.rst
@@ -37,6 +37,7 @@ Features of the HNS3 PMD are:
- MTU update
- NUMA support
- Generic flow API
+- IEEE1588/802.1AS timestamping
Prerequisites
-
diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h
index e704d0c..abc853b 100644
--- a/drivers/net/hns3/hns3_cmd.h
+++ b/drivers/net/hns3/hns3_cmd.h
@@ -123,6 +123,12 @@ enum hns3_opcode_type {
HNS3_OPC_CLEAR_MAC_TNL_INT = 0x0312,
HNS3_OPC_CONFIG_FEC_MODE = 0x031A,
+#ifdef RTE_LIBRTE_IEEE1588
+ /* PTP command */
+ HNS3_OPC_PTP_INT_EN = 0x0501,
+ HNS3_OPC_CFG_PTP_MODE = 0x0507,
+#endif
+
Hi Connor,
Does it needs to be a compile time configuration? What happens if it is
always enabled, or controlled by device argument?
.
Hi Ferruh,
Firstly the "RTE_LIBRTE_IEEE1588" origins from the config file in DPDK.
Almost every nic driver use this macro in compile time.
For me, I think using this macro give one option for users to
decide if his APPs contains this module. For example, in loT field,
some microprocessor has small memory or small disk, So the APPs should
be as small as possible. So, if user does not need "PTP", the APPs no
need to contain it.
Well, another top, if is always enabled, for HNS3 PMD, it will
work well for our nic. If user want to use "PTP", just call API. If user
does not use it, it also doesn't matter. But we advise that if user
don't need this function, just turn it off.
Thanks.
