Re: LPC1769 Progmem

2021-07-09 Thread Sebastien Lorquet

hello,

cool if you have a proper storage system :)

The STM32F4 also has these variable sector sizes, and IIRC it is not 
accessible as MTD.


Yes, usually, the write size is much smaller than the erase size.

Sebastien

Le 08/07/2021 à 16:47, Fotis Panagiotopoulos a écrit :

The pagesize should be the same as the erase block size.. 4k.

If it is so (which makes sense, regardless of what the comments say), then
what is the purpose of  up_progmem_erasesize ?
It should return the same thing I guess?

The function up_progmem_erasesize was what made me think that pagesize is a
different thing.

---

Regarding the MTD comments.
Thank you very much for your advice.
Fortunately my driver handles all of these cases quite well.
It accesses the Flash memory directly, and ensures all needed wear-leveling
and error checking
(at least to the extent that it is necessary in this specific application).

I just need a working progmem interface, to provide it with.
STM32 works correctly for me till now; LPC is the one that needs fixing.


Στις Πέμ, 8 Ιουλ 2021 στις 5:28 μ.μ., ο/η Gregory Nutt 
έγραψε:


The pagesize should be the same as the erase block size.. 4k.

You will probably want 512b sectors (pages, or whatever we call them
now) at the file system interface. You can also read-modify-write
operations to "simulate" smaller erase blocks.  Most MTD drivers do
that.  In that case they report the simulated erase block size.  The
overhead is an internal, large 4Kb buffer.

You can also use drivers/mtd/sector512.c to get a "generic"
read-modify-write implementation and 512 b "simulated" erase blocks like:

 FAR struct mtd_dev_s *raw_mtd = progmem_initialize();
 FAR struct mtd_dev_s *s512_mtd = s512_initialize(raw_mtd);


On 7/8/2021 7:30 AM, Fotis Panagiotopoulos wrote:

Still looking at this driver, and how to improve it.

The LPC1769 needs data to be written in 256 bytes chunks, but Flash

sectors

are erased in 4k or 32k sizes.

So, a couple of questions:

1. What should up_progmem_pagesize return , 256 or 4k/32k?
By the description I suppose it should be 256.
This is not true however for the STM32 arch.

2. What should up_progmem_getpage return?
I guess 256 again...?

But how up_progmem_eraseblock is expected to work?
There is no up_progmem_getblock, so there is no way that the application
knows which block to pass.
In STM32 I used up_progmem_getpage, but by checking the functions
descriptions now, I guess this shouldn't be correct?

Or should "page" here refer to the 4k/32k sectors?



Στις Παρ, 2 Ιουλ 2021 στις 2:08 μ.μ., ο/η Fotis Panagiotopoulos <
f.j.pa...@gmail.com> έγραψε:


Oh, that's great. That should definitely make the interface better.

But nevertheless, I tried to "ignore" the terms, and still I can't make
any sense of it.

This is what I try to do (which works fine on an STM32F4):

int write_data(intptr_t addr, BootData_t * data){
  if (memcmp((BootData_t*)addr, data, sizeof(BootData_t)) == 0)
  return 0;

  if (up_progmem_eraseblock(up_progmem_getpage(addr)) < 0)
  return -EIO;

  return up_progmem_write(addr, data, sizeof(BootData_t));}


I see that up_progmem_getpage() makes an unreasonable calculation.
It calculates the "page" as if it is 256 bytes, while in fact LPC1769

has

4k and 32k sectors...



Στις Παρ, 2 Ιουλ 2021 στις 1:39 μ.μ., ο/η Xiang Xiao <
xiaoxiang781...@gmail.com> έγραψε:


Here has some discussion about the naming:
https://github.com/apache/incubator-nuttx/pull/3834

On Fri, Jul 2, 2021 at 6:28 PM Fotis Panagiotopoulos <

f.j.pa...@gmail.com

wrote:


Hello,

I am porting an old application to NuttX.
This is running on a hardware board that uses the NXP LPC1769 MCU.
I am in need of the up_progmem interface.

Unfortunately, I see that this driver is broken. It is not working,

always

returning an error.
I checked its internals, but it is quite a mess. It makes wrong
calculations on the sector sizes, it confuses the terms "page" and

"sector"

etc.
I see that it makes some calculations on the addresses, that to my
knowledge do not reflect the hardware in any way.

Is it actually that broken, or am I using it so incorrectly?
Has anyone used it before successfully?

I would appreciate a MWE of this driver. Or someone to confirm that it

is

not working before I start to rewrite it.





sama5d27 UPLL

2021-07-09 Thread Tim
Hi,

Making slow progress getting MCAN sorted properly on my custom sama5d27
board and when clocking it from the "UPLL" clokc (an internal PLL used to
generate a 480MHz clock for the USB interfaces, and a useful clock for
higher speed CAN setups) I found that the CAN baud rate was out.

This is because there is a special function register (SFR) that has to be
set to reflect the crystal frequency used. This is correctly set by the AT91
bootloader and/or Uboot (I can read it at the start of the bringup code OK)
but somewhere it is being changed to the wrong value again and I can't find
where - a grep for the relevant SFR register in all of the nuttx code
doesn't reveal anything (it only exists in my code or the sam_sfr header
file as far as I can see)

I have done a quick fix by re-writing the correct value in my bringup code
but that isn't the right way to sort this.

Any suggestions of how to find where/why/how this is being changed?

Thanks,

Tim.





Re: sama5d27 UPLL

2021-07-09 Thread Alan Carvalho de Assis
Hi Tim,

I don't know about the internal clock of SAMA5D27, but maybe some
other configuration is changing the SFR.

Do you have GDB working on your system? Maybe you can try to use
watchpoint at this register position, see here:
https://acassis.wordpress.com/2015/07/07/using-watchpoints-in-the-gdb-to-verify-register-access/

I hope it help you to discovery what is going on.

BR,

Alan

On 7/9/21, Tim  wrote:
> Hi,
>
> Making slow progress getting MCAN sorted properly on my custom sama5d27
> board and when clocking it from the "UPLL" clokc (an internal PLL used to
> generate a 480MHz clock for the USB interfaces, and a useful clock for
> higher speed CAN setups) I found that the CAN baud rate was out.
>
> This is because there is a special function register (SFR) that has to be
> set to reflect the crystal frequency used. This is correctly set by the
> AT91
> bootloader and/or Uboot (I can read it at the start of the bringup code OK)
> but somewhere it is being changed to the wrong value again and I can't find
> where - a grep for the relevant SFR register in all of the nuttx code
> doesn't reveal anything (it only exists in my code or the sam_sfr header
> file as far as I can see)
>
> I have done a quick fix by re-writing the correct value in my bringup code
> but that isn't the right way to sort this.
>
> Any suggestions of how to find where/why/how this is being changed?
>
> Thanks,
>
> Tim.
>
>
>
>