Thanks YF! That's a very cool concept for RISC-V code: 64-bit architecture with 32-bit pointers. In case we need to use RV64ILP32 for NuttX, do you happen to have the patched source code to support RV64ILP32?
Your recent PRs are very interesting, perhaps other folks here might like to comment: Clean up SigAction Objects after OSTest: (Memory leakage might have security implications?) https://github.com/apache/nuttx/pull/12406 Configure PID Hash Table length: (For known number of threads) https://github.com/apache/nuttx/pull/12427 Lup On Fri, Jun 7, 2024 at 10:07 AM yfliu2008 <yfliu2...@qq.com.invalid> wrote: > Dear experts, > > > Sorry for bothering again, as Lup said the hyperlink was missed in my last > email. Please throw away my last emails with this same subject. > > > > > I have some initial results on NuttX with rv64ilp32 ( > https://yf13.github.io/nuttx/nuttx-rv64ilp32), that means running 32-bit > software on RV64 with full use of the 64-bit CPU. Please give it a check > when free and let me know if you have comments. > > > > > Regards, > > yf
