[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH V2 00/12] New PCI features - MPS, MRRS, RO, NS, CTO

[Javeed, Ashraf]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2194
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2313
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1954

The EDK2 Kernel PciBusDxe driver is enhanced to enable the configuration
of PCI features like
(1) Max_Payload_Size
(2) Max_Read_Req_Size
(3) Relax Ordering
(4) No-Snoop
(5) Completion Timeout

Max_Payload_Size:- The PCI Device Control register provides this feature
register field which controls the maximum data packet (TLP) size that a
PCI device should maintain as a requester. The PCI Bus driver is required
to maintain a highest common value supported by all the PCI devices in a
PCIe hierarchy, especially in case of isochronous applications.

Max_Read_Req_Size:- The PCI Device Control register provides this feature
register field which controls the maximum memory read request size that a
PCI device should maintain as a requester. The PCI Bus driver is required
to maintain a common value, same as Max_Payload_Size, in case of
isochronous applications only; or else, it should maintain the user
requested value uniformly in a PCIe hierarchy (PCI root port and its
downstream devices).

Relax Ordering:- The PCI Device Control register has the enabling of
Relax Ordering functionality register field (bit 4). If this bit is Set,
the PCI Function is permitted to set the Relaxed Ordering bit in the
Attributes field of transactions it initiates that do not require strong
write ordering (see PCI Base Specification 4, Section 2.2.6.4 and Sect-
ion 2.4). Any supporting PCI function is expected have this bit enabled
as per its hardware default; the code enhancement is to enable / disable
as per the PCI device policy provided by the platform firmware. If
no device policy override is provided than it shall be ignored by the PCI
Bus driver for that PCI function.

No-Snoop:- The PCI Device Control register has the enabling of No-Snoop
functionality register field (bit 11). If this bit is Set, the PCI
Function is permitted to Set the No Snoop bit in the Requester Attributes
of transactions it initiates that do not require hardware enforced cache
coherency (see PCI Base Specification 4, Section 2.2.6.5). Any supporting
PCI function is expected have this bit enabled as per its hardware
default; the code enhancement is to enable / disable as per the PCI
device policy provided by the platform firmware. If no device policy
override is provided than it shall be ignored by the PCI Bus driver for
that PCI function.

Completion Timeout:- The PCI Device Control 2 register provides two
register fields based on its Device Capability 2 register; the CTO Ranges
(bits [3:0]) and the disabling of CTO detection mechanism (bit 4). The
software is permitted to change the CTO ranges and enable/disable the CTO
detection mechanism any time. The code enhancement here is to override
these register fields as per the platform device policy. If no device
policy override is provided than it shall be ignored by the PCI Bus
driver for that PCI function.

The PCI Base Specification 4 Revision 1 contains detailed information
about these features. The EDK2 PCI Bus driver needs to enable the
configuration of these features as per the PCI Base specification.

The EDK2 PCI Bus driver also needs to take the PCI device-specific
platform policy into the consideration while programming these features;
thus the code changes to support these, is explicitly dependent on the
new PCI Platform Protocol interface definition defined in the below
record:-
https://bugzilla.tianocore.org/show_bug.cgi?id=1954


Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---

V2: Fixed message format and added feature change reference links
---

Ashraf Javeed (12):
  MdeModulePkg/PciBusDxe:New PCI features separation with PCD
  PciBusDxe: Reorganize the PCI Platform Protocol usage code
  PciBusDxe: Separation of the PCI device registration and start
  PciBusDxe: Inclusion of new PCI Platform Protocol 2
  PciBusDxe: Setup sub-phases for PCI feature enumeration
  PciBusDxe: Integration of setup for PCI feature enumeration
  PciBusDxe: Record the PCI-Express Capability Structure
  PciBusDxe: New PCI feature Max_Payload_Size
  PciBusDxe: New PCI feature Max_Read_Req_Size
  PciBusDxe: New PCI feature Relax Ordering
  PciBusDxe: New PCI feature No-Snoop
  PciBusDxe: New PCI feature Completion Timeout

 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c   |   23 +--
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h   |   20 --
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf  |9 -
 MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c |  233 
++--
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c|  139 
-
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c |   34 ++--
 MdeModulePkg/Bus/

Re: [edk2-devel] [PATCH V7 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache support

[Wang, Jian J]

I've given R-b for other patches in this series. I just give R-b this one which 
is only changed
in v7.

Reviewed-by: Jian J Wang 

Regards,
Jian

> -Original Message-
> From: Kubacki, Michael A 
> Sent: Saturday, November 02, 2019 1:35 AM
> To: devel@edk2.groups.io
> Cc: Bi, Dandan ; Ard Biesheuvel
> ; Dong, Eric ; Laszlo Ersek
> ; Gao, Liming ; Kinney, Michael D
> ; Ni, Ray ; Wang, Jian J
> ; Wu, Hao A ; Yao, Jiewen
> 
> Subject: [PATCH V7 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache
> support
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2220
> 
> This change reduces SMIs for GetVariable () by maintaining a
> UEFI variable cache in Runtime DXE in addition to the pre-
> existing cache in SMRAM. When the Runtime Service GetVariable()
> is invoked, a Runtime DXE cache is used instead of triggering an
> SMI to VariableSmm. This can improve overall system performance
> by servicing variable read requests without rendezvousing all
> cores into SMM.
> 
> The runtime cache  can be disabled with by setting the FeaturePCD
> gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache
> to FALSE. If the PCD is set to FALSE, the runtime cache will not be
> used and an SMI will be triggered for Runtime Service
> GetVariable () and GetNextVariableName () invocations.
> 
> The following are important points regarding the behavior of the
> variable drivers when the variable runtime cache is enabled.
> 
> 1. All of the non-volatile storage contents are loaded into the
>cache upon driver load. This one time load operation from storage
>is preferred as opposed to building the cache on demand. An on-
>demand cache would require a fallback SMI to load data into the
>cache as variables are requested.
> 
> 2. SetVariable () requests will continue to always trigger an SMI.
>This occurs regardless of whether the variable is volatile or
>non-volatile.
> 
> 3. Both volatile and non-volatile variables are cached in a runtime
>buffer. As is the case in the current EDK II variable driver, they
>continue to be cached in separate buffers.
> 
> 4. The cache in Runtime DXE and SMM are intended to be exact copies
>of one another. All SMM variable accesses only return data from the
>SMM cache. The runtime caches are only updated after the variable I/O
>operation is successful in SMM. The runtime caches are only updated
>from SMM.
> 
> 5. Synchronization mechanisms are in place to ensure the runtime cache
>content integrity with the SMM cache. These may result in updates to
>runtime cache that are the same in content but different in offset and
>size from updates to the SMM cache.
> 
> When using SMM variables with runtime cache enabled, two caches will now
> be present.
> 1. "Runtime Cache" - Maintained in VariableSmmRuntimeDxe. Used to service
>Runtime Services GetVariable () and GetNextVariableName () callers.
> 2. "SMM Cache" - Maintained in VariableSmm to service SMM GetVariable ()
>and GetNextVariableName () callers.
>a. This cache is retained so SMM modules do not operate on data outside
>   SMRAM.
> 
> Because a race condition can occur if an SMI occurs during the execution
> of runtime code reading from the runtime cache, a runtime cache read lock
> is introduced that explicitly moves pending updates from SMM to the runtime
> cache if an SMM update occurs while the runtime cache is locked. Note that
> it is not expected a Runtime services call will interrupt SMM processing
> since all CPU cores rendezvous in SMM.
> 
> It is possible to view UEFI variable read and write statistics by setting
> the gEfiMdeModulePkgTokenSpaceGuid.PcdVariableCollectStatistics FeaturePcd
> to TRUE and using the VariableInfo UEFI application in MdeModulePkg to dump
> variable statistics to the console. By doing so, a user can view the number
> of GetVariable () hits from the Runtime DXE variable driver (Runtime Cache
> hits) and the SMM variable driver (SMM Cache hits). SMM Cache hits for
> GetVariable () will occur when SMM modules invoke GetVariable ().
> 
> Cc: Dandan Bi 
> Cc: Ard Biesheuvel 
> Cc: Eric Dong 
> Cc: Laszlo Ersek 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Cc: Ray Ni 
> Cc: Jian J Wang 
> Cc: Hao A Wu 
> Cc: Jiewen Yao 
> Signed-off-by: Michael Kubacki 
> ---
>  MdeModulePkg/MdeModulePkg.dec|  12 +
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf|   2
> +
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf   |   2 +
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf |
> 18 +-
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf  |
> 2 +
>  MdeModulePkg/Include/Guid/SmmVariableCommon.h|  29 +-
>  MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.h|  32 +-
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeCache.h|
> 51 ++
>  MdeModulePkg/Universal/Variable/

Re: [edk2-devel] [Patch v3 00/22] Enable Phase 1 of EDK II CI

[Michael D Kinney]

Hi Laszlo,

Everything is back online now.  Will be doing more extensive
CI unit tests next.

If there is a merge conflict at the time the PR is submitted
you should be notified by email.  I think you ran into what
should be an impossible case when the service is running
correctly.  The fact it was not auto merging push requests
at the time you sent your PR allowed other pushes to make
it in.

You should have since received an email that says:

  "PR can not be merged due to conflict. Please rebase and resubmit"

This came from the Mergify CI service when it was re-activated
And noticed the conflict.

Mike

> -Original Message-
> From: Laszlo Ersek 
> Sent: Friday, November 1, 2019 3:40 PM
> To: Kinney, Michael D ;
> devel@edk2.groups.io
> Cc: Sean Brogan ; Bret
> Barkelew ; Gao, Liming
> ; Feng, Bob C
> ; Andrew Fish ;
> Leif Lindholm ; Wang, Jian J
> ; Lu, XiaoyuX
> ; Ni, Ray ; Wu,
> Hao A ; Wu, Jiaxin
> ; Fu, Siyuan ;
> Yao, Jiewen ; Zhang, Chao B
> ; Gao, Zhichao
> ; Dong, Eric
> 
> Subject: Re: [edk2-devel] [Patch v3 00/22] Enable Phase
> 1 of EDK II CI
> 
> Hi Mike,
> 
> On 11/01/19 06:03, Kinney, Michael D wrote:
> > Hi Laszlo,
> >
> > ===
> > Note for all reviewers:
> > ---
> > Pull requests against edk2-staging/edk2-ci are not
> being processed
> > right now.  We are working on some configuration
> changes after
> > noticing that all the checks were not being shown on
> the Web UI.  We
> > will let you know when it is back up.
> > ===
> >
> > Yes.  You need to create a fork of the tianocore/edk2-
> staging repo.
> >
> > You can do this with the WebUI or the hub command line
> utility.
> >
> > * https://github.com/github/hub
> > * https://github.com/github/hub/releases
> > * https://hub.github.com/hub.1.html
> >
> > The hub command also supports creating a pull request.
> > I have used it extensively to write some unit tests
> for edk2-ci this
> > week.
> >
> > Once you create a branch with changes to submit in
> your own fork of
> > tianocore/edk2-staging the WebUI will show that this
> pull request is
> > possible and guide you through it.
> >
> > The use of edk2-staging/edk2-ci is only for the review
> and unit
> > testing.  Once the review is approved, it will be
> enabled on
> > edk2/master and you will be able to use your own fork
> of edk2 to make
> > branches and submit pull requests.
> 
> * For now, I submitted a pull request using the WebUi.
> 
> https://github.com/tianocore/edk2-staging/pull/87
> 
> I can see the processing is paused at the moment, as you
> state above.
> 
> 
> * When I submitted PR#87, there had been no conflicts;
> the PR was simply blocked on the CI tasks. Now, there
> are conflicts (I assume due to intervening pushes, while
> my PR#87 was blocked). It's useful that the WebUI points
> out this change in the status of the PR (i.e., "now
> conflicting" vs. "no conflicts just waiting for CI").
> However, this status change has not been emailed to me.
> 
> When this occurs to a PR (for example due to an
> intervening PR that is merged), what happens to the pre-
> empted PR? Does it remain suspended forever? How does
> the submitter learn about it?
> 
> 
> * Regarding my question (b) below, the answer is "I
> can't". I cannot submit a PR against tianocore/edk2-
> staging.git with reference to lersek/edk2.git, given
> that the latter is a not a "github-level fork" of the
> former.
> 
> This is quite regrettable, but once the CI system is in
> production, it will be OK in practice (I will only
> submit PRs against tianocore/edk2.git).
> 
> 
> * I've explored the "hub" command a bit. (This relates
> to my question (a); thanks for your suggestion.)
> 
> On the positive side, it is packaged in EPEL7, therefore
> I could readily install it on my RHEL7 laptop, from a
> distribution-level package.
> 
> On the negative side, I quickly noticed two issues with
> "hub". I went looking in the "hub" issue tracker, and to
> my relief, others had reported the same problems before
> me (so I only commented on, and subscribed to, the
> reports):
> 
> https://github.com/github/hub/issues/2338#issuecomment-
> 548952413
> https://github.com/github/hub/issues/#issuecomment-
> 548967446
> 
> Issue#2338 is more technically challenging, but in
> practice (once CI is enabled for edk2 itself), it's not
> really going to affect me.
> 
> Issue# should be easy to solve, technically
> speaking, but until it's solved, I find it quite
> disappointing.
> 
> Thanks!
> Laszlo
> 
> >> -Original Message-
> >> From: Laszlo Ersek 
> >> Sent: Thursday, October 31, 2019 2:55 AM
> >> To: devel@edk2.groups.io; Kinney, Michael D
> >> 
> >> Cc: Sean Brogan ; Bret
> Barkelew
> >> ; Gao, Liming
> ;
> >> Feng, Bob C ; Andrew Fish
> ;
> >> Leif Lindholm ; Wang, Jian
> J
> >> ; Lu, XiaoyuX
> ; Ni, Ray
> >> ; Wu, Hao A ;
> Wu, Jiaxin
> >> ; Fu, Siyuan
> ; Yao

[edk2-devel] [edk2-rfc] [edk2-platforms] Add Features directory

[Kubacki, Michael A]

Hello,

This RFC proposes adding a new directory to edk2-platforms called
"Features". The purpose of this directory is to add support code
for platform features. Intel would like to maintain features in the
form of feature packages in which a feature may be composed of
multiple libraries, modules, and/or other resources in the package.
The features Intel would like to support are generally intended to
be generic and compatible across a large number (if not all) of
Intel's open source platform code. Collaboration to expand support
of feature code is also welcome.

Reason for the new directory:
Currently some feature packages have started being maintained in
Platform/Intel such as DebugFeaturePkg. However, it would be
preferable to separate basic platform support packages such as
that in KabylakeOpenBoardPkg from generic feature packages.
This is especially true as the number of board support packages
and feature packages increase in Platform/Intel. The creation of
the Features directory would align with the logical separation of
package paths for other pieces needed to build an Intel firmware
in edk2-platforms:
  1. Basic platform support code: Platform/Intel
  2. Silicon initialization support code: Silicon/Intel
  3. Advanced feature support code: Features/Intel

The advanced feature is a concept introduced in EDK II Minimum
Platform. This concept is briefly described in the Platform/Intel
Readme.md:
https://github.com/tianocore/edk2-platforms/blob/master/Platform/Intel/Readme.md

On a related note, a preview of how the Features/Intel directory
might be used is available in the following fork:
https://github.com/makubacki/edk2-platforms/tree/advanced_feature_reorg

For this RFC, the request is simply for the creation of
edk2-platforms/Features to hold feature content.

Thanks,
Michael

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49880): https://edk2.groups.io/g/devel/message/49880
Mute This Topic: https://groups.io/mt/40545577/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [edk2-platforms] [PATCH v2] SimicsOpenBoardPkg: Add CmosAccessLib to BoardX58Ich10

[Agyeman, Prince]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2164

Replaced Cmos.c and Cmos.h with BoardModulePkg's
Cmos library CmosAccessLib

Cc: Ankit Sinha 
Cc: Nate DeSimone 
Cc: Kubacki Michael A 

Signed-off-by: Prince Agyeman 
---
 .../BoardInitLib/PeiX58Ich10InitPreMemLib.c   | 46 ---
 .../BoardX58Ich10/OpenBoardPkg.dsc|  2 +
 .../Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c | 57 ---
 .../Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h | 50 
 .../SimicsOpenBoardPkg/SimicsPei/MemDetect.c  | 19 +--
 .../SimicsOpenBoardPkg/SimicsPei/Platform.c   |  4 +-
 .../SimicsPei/SimicsPei.inf   |  3 +-
 .../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 38 +
 .../SmbiosPlatformDxe/SmbiosPlatformDxe.h |  1 +
 .../SmbiosPlatformDxe/SmbiosPlatformDxe.inf   |  2 +
 10 files changed, 14 insertions(+), 208 deletions(-)
 delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
 delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h

diff --git 
a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/Library/BoardInitLib/PeiX58Ich10InitPreMemLib.c
 
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/Library/BoardInitLib/PeiX58Ich10InitPreMemLib.c
index c3a31ed426..325a341cdf 100644
--- 
a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/Library/BoardInitLib/PeiX58Ich10InitPreMemLib.c
+++ 
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/Library/BoardInitLib/PeiX58Ich10InitPreMemLib.c
@@ -20,52 +20,6 @@
 
 #include "PeiX58Ich10InitLib.h"
 #include 
-/**
-  Reads 8-bits of CMOS data.
-
-  Reads the 8-bits of CMOS data at the location specified by Index.
-  The 8-bit read value is returned.
-
-  @param  Index  The CMOS location to read.
-
-  @return The value read.
-
-**/
-UINT8
-EFIAPI
-CmosRead8(
-  IN  UINTN Index
-  )
-{
-  IoWrite8 (0x70, (UINT8)Index);
-  return IoRead8(0x71);
-}
-
-
-/**
-  Writes 8-bits of CMOS data.
-
-  Writes 8-bits of CMOS data to the location specified by Index
-  with the value specified by Value and returns Value.
-
-  @param  Index  The CMOS location to write.
-  @param  Value  The value to write to CMOS.
-
-  @return The value written to CMOS.
-
-**/
-UINT8
-EFIAPI
-CmosWrite8(
-  IN  UINTN Index,
-  IN  UINT8 Value
-  )
-{
-  IoWrite8 (0x70, (UINT8)Index);
-  IoWrite8 (0x71, Value);
-  return Value;
-}
-
 
 EFI_STATUS
 EFIAPI
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc 
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 78f1e80990..9b9e088cbe 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -116,6 +116,8 @@
   
SerializeVariablesLib|$(BOARD_PKG)/Library/SerializeVariablesLib/SerializeVariablesLib.inf
   
SiliconPolicyInitLib|$(BOARD_PKG)/Policy/Library/SiliconPolicyInitLib/SiliconPolicyInitLib.inf
   
SiliconPolicyUpdateLib|$(BOARD_PKG)/Policy/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.inf
+  
PlatformCmosAccessLib|BoardModulePkg/Library/PlatformCmosAccessLibNull/PlatformCmosAccessLibNull.inf
+  CmosAccessLib|BoardModulePkg/Library/CmosAccessLib/CmosAccessLib.inf
 
 [LibraryClasses.common.SEC]
   ###
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c 
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
deleted file mode 100644
index b34ba9283b..00
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/** @file
-  PC/AT CMOS access routines
-
-  Copyright (c) 2006 - 2019 Intel Corporation. All rights reserved. 
-
-  SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "Cmos.h"
-#include "Library/IoLib.h"
-
-/**
-  Reads 8-bits of CMOS data.
-
-  Reads the 8-bits of CMOS data at the location specified by Index.
-  The 8-bit read value is returned.
-
-  @param  Index  The CMOS location to read.
-
-  @return The value read.
-
-**/
-UINT8
-EFIAPI
-CmosRead8 (
-  IN  UINTN Index
-  )
-{
-  IoWrite8 (0x70, (UINT8) Index);
-  return IoRead8 (0x71);
-}
-
-
-/**
-  Writes 8-bits of CMOS data.
-
-  Writes 8-bits of CMOS data to the location specified by Index
-  with the value specified by Value and returns Value.
-
-  @param  Index  The CMOS location to write.
-  @param  Value  The value to write to CMOS.
-
-  @return The value written to CMOS.
-
-**/
-UINT8
-EFIAPI
-CmosWrite8 (
-  IN  UINTN Index,
-  IN  UINT8 Value
-  )
-{
-  IoWrite8 (0x70, (UINT8) Index);
-  IoWrite8 (0x71, Value);
-  return Value;
-}
-
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h 
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
deleted file mode 100644
index 07fa2e2d11..00
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/** @file
-  PC/AT CMOS access routines
-
-  Co

Re: [edk2-devel] [PATCH v4] CryptoPkg: Upgrade OpenSSL to 1.1.1d

[Wang, Jian J]

Laszlo,

You're right. I'll do more tests for secure boot. I'll leave https boot to you.

Regards,
Jian

> -Original Message-
> From: Laszlo Ersek 
> Sent: Saturday, November 02, 2019 6:03 AM
> To: Wang, Jian J ; Zhang, Shenglei
> ; devel@edk2.groups.io
> Cc: Lu, XiaoyuX ; Gao, Liming 
> Subject: Re: [PATCH v4] CryptoPkg: Upgrade OpenSSL to 1.1.1d
> 
> On 11/01/19 08:31, Wang, Jian J wrote:
> > Hi Laszlo,
> >
> > I did simple ovmf boot tests (shell, linux, windows) and all passed. Let me 
> > know
> if you have
> > any comments or want to do more tests against v4 before check in.
> >
> > Based on my review and tests,
> >Reviewed-by: Jian J Wang 
> 
> I can get to this patch on next Monday (2019-Nov-04) the earliest. (Even
> today is a public holiday in my country, and I've only logged in now to
> quickly respond to Mike's email in another thread.) I had the v3 posting
> tagged earlier, and am learning of v4 only now.
> 
> I think the OpenSSL update should be tested with at least the following
> use cases:
> 
> - HTTPS boot
> - Secure Boot
> 
> Given that the HTTPS Boot CVE fix is also pending on the list, and that
> it was posted before the OpenSSL upgrade, and they both affect HTTPS
> Boot, I request that the OpenSSL upgrade be delayed until after the CVE
> fix is pushed. (I'll try to push the CVE fix this weekend, or next Monday.)
> 
> Thanks
> Laszlo
> 
> >> -Original Message-
> >> From: Zhang, Shenglei 
> >> Sent: Friday, November 01, 2019 2:56 PM
> >> To: devel@edk2.groups.io
> >> Cc: Wang, Jian J ; Lu, XiaoyuX
> ;
> >> Gao, Liming 
> >> Subject: [PATCH v4] CryptoPkg: Upgrade OpenSSL to 1.1.1d
> >>
> >> Update openssl from 1.1.1b to 1.1.1d.
> >> Something needs to be noticed is that, there is a bug existing in the
> >> released 1_1_1d version(894da2fb7ed5d314ee5c2fc9fd2d9b8b74111596),
> >> which causes build failure. So we switch the code base to a usable
> >> version, which is 2 commits later than the stable tag.
> >> Now we use the version c3656cc594daac8167721dde7220f0e59ae146fc.
> >> This log is to fix the build failure.
> >> https://bugzilla.tianocore.org/show_bug.cgi?id=2226
> >>
> >> Besides, the absense of "DSO_NONE" in dso_conf.h causes build failure
> >> in OvmfPkg. So update process_files.pl to generate information from
> >> "crypto/include/internal/dso_conf.h.in".
> >>
> >> shm.h and utsname.h are added to avoid GCC build failure.
> >>
> >> Cc: Jian J Wang 
> >> Cc: Xiaoyu Lu 
> >> Cc: Liming Gao 
> >> Signed-off-by: Shenglei Zhang 
> >> ---
> >> v2: Revert the changes in OpensslLib.inf and OpensslLibCrypto.inf.
> >> The removed header files could be auto-generated by process_files.pl 
> >> now.
> >>
> >> v3: Add display information for dso_conf.h.
> >>
> >> v4: Add shm.h and utsname.h to avoid GCC build failure.
> >>
> >>  CryptoPkg/Library/Include/internal/dso_conf.h | 16 
> >>  CryptoPkg/Library/Include/sys/shm.h   |  9 +
> >>  CryptoPkg/Library/Include/sys/utsname.h   | 10 ++
> >>  CryptoPkg/Library/OpensslLib/openssl  |  2 +-
> >>  CryptoPkg/Library/OpensslLib/process_files.pl | 15 ++-
> >>  5 files changed, 50 insertions(+), 2 deletions(-)
> >>  create mode 100644 CryptoPkg/Library/Include/sys/shm.h
> >>  create mode 100644 CryptoPkg/Library/Include/sys/utsname.h
> >>
> >> diff --git a/CryptoPkg/Library/Include/internal/dso_conf.h
> >> b/CryptoPkg/Library/Include/internal/dso_conf.h
> >> index e69de29bb2d1..43c891588bc2 100644
> >> --- a/CryptoPkg/Library/Include/internal/dso_conf.h
> >> +++ b/CryptoPkg/Library/Include/internal/dso_conf.h
> >> @@ -0,0 +1,16 @@
> >> +/* WARNING: do not edit! */
> >> +/* Generated from crypto/include/internal/dso_conf.h.in */
> >> +/*
> >> + * Copyright 2016-2019 The OpenSSL Project Authors. All Rights Reserved.
> >> + *
> >> + * Licensed under the OpenSSL license (the "License").  You may not use
> >> + * this file except in compliance with the License.  You can obtain a copy
> >> + * in the file LICENSE in the source distribution or at
> >> + * https://www.openssl.org/source/license.html
> >> + */
> >> +
> >> +#ifndef HEADER_DSO_CONF_H
> >> +# define HEADER_DSO_CONF_H
> >> +# define DSO_NONE
> >> +# define DSO_EXTENSION ".so"
> >> +#endif
> >> diff --git a/CryptoPkg/Library/Include/sys/shm.h
> >> b/CryptoPkg/Library/Include/sys/shm.h
> >> new file mode 100644
> >> index ..dc0b8e81c8b0
> >> --- /dev/null
> >> +++ b/CryptoPkg/Library/Include/sys/shm.h
> >> @@ -0,0 +1,9 @@
> >> +/** @file
> >> +  Include file to support building the third-party cryptographic library.
> >> +
> >> +Copyright (c) 2019, Intel Corporation. All rights reserved.
> >> +SPDX-License-Identifier: BSD-2-Clause-Patent
> >> +
> >> +**/
> >> +
> >> +#include 
> >> diff --git a/CryptoPkg/Library/Include/sys/utsname.h
> >> b/CryptoPkg/Library/Include/sys/utsname.h
> >> new file mode 100644
> >> index ..75955b0a4eb6
> >> --- /dev/null
> >> +++ b/CryptoPkg/Library/Include/sys/ut

Re: [edk2-devel] [Patch v3 00/22] Enable Phase 1 of EDK II CI

[Laszlo Ersek]

On 11/01/19 23:39, Laszlo Ersek wrote:

> * When I submitted PR#87, there had been no conflicts; the PR was simply
> blocked on the CI tasks. Now, there are conflicts (I assume due to
> intervening pushes, while my PR#87 was blocked). It's useful that the
> WebUI points out this change in the status of the PR (i.e., "now
> conflicting" vs. "no conflicts just waiting for CI"). However, this
> status change has not been emailed to me.
> 
> When this occurs to a PR (for example due to an intervening PR that is
> merged), what happens to the pre-empted PR? Does it remain suspended
> forever? How does the submitter learn about it?

Correction: I did get an email stating "PR can not be merged due to
conflict.  Please rebase and resubmit".

I missed it temporarily because it was apparently only sent to:

  tianocore/edk2-staging 

and so it got filed into one of my list folders, not in my inbox.

I think this is OK after all.

Thanks!
Laszlo


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49877): https://edk2.groups.io/g/devel/message/49877
Mute This Topic: https://groups.io/mt/39614149/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [PATCH V7 00/10] UEFI Variable SMI Reduction

[Kubacki, Michael A]

Hi Laszlo,

I did not make any changes to the OvmfPkg patch and I forgot to carry forward 
the R-b.
I'll keep that in mind in the future.

For V7, I request the MdeModulePkg maintainers please add the R-b for the 
patches
not changed. If this is not acceptable, I will be happy to send out a patch 
series
with all of the R-b present.

Thanks,
Michael

> -Original Message-
> From: Laszlo Ersek 
> Sent: Friday, November 1, 2019 3:19 PM
> To: Kubacki, Michael A ;
> devel@edk2.groups.io
> Cc: Bi, Dandan ; Ard Biesheuvel
> ; Dong, Eric ; Gao, Liming
> ; Kinney, Michael D ;
> Ni, Ray ; Wang, Jian J ; Wu, Hao
> A ; Yao, Jiewen 
> Subject: Re: [PATCH V7 00/10] UEFI Variable SMI Reduction
> 
> Hello Michael,
> 
> On 11/01/19 18:34, Michael Kubacki wrote:
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2220
> >
> > V7 Changes:
> >  [PATCH V6 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache
> > support
> >  * Remove VariableRuntimeCache.c and VariableRuntimeCache.h from
> >VariableSmmRuntimeDxe.inf since they are not needed to build the
> module.
> >
> > V6 Changes:
> >  [PATCH V5 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache
> > support  The most significant change is:
> >  * Free mVariableRuntimeHobCacheBuffer in CheckForRuntimeCacheSync
> () in
> >VariableSmmRuntimeDxe.c with FreePages () instead of FreePool ().
> >  This issue was not found in earlier testing because on the initial
> > set of  platforms tested, the variable HOB flush was finished prior to
> > the variable  HOB runtime cache buffer being allocated so the
> > FreePages () call was not  executed.
> >
> >  The remaining changes did not affect testing but are included for
> robustness:
> >  * Pass EFI_OPTIONAL_PTR for the DebugDisposition type in the
> EfiConvertPointer ()
> >calls for mVariableRuntimeHobCacheBuffer,
> mVariableRuntimeNvCacheBuffer, and
> >mVariableRuntimeVolatileCacheBuffer in VariableAddressChangeEvent ()
> in
> >VariableSmmRuntimeDxe.c as these buffers will not be allocated if the
> runtime
> >cache is disabled.
> >  * In the
> SMM_VARIABLE_FUNCTION_INIT_RUNTIME_VARIABLE_CACHE_CONTEXT
> case in
> >SmmVariableHandler () in VariableSmm.c, explicitly verify that
> >VariableRuntimeHobCache.Store is not NULL in addition to checking that
> >VariableGlobal.HobVariableBase is not set to zero (variable HOB is
> flushed)
> >before writing to VariableRuntimeHobCache.Store.
> >
> > V5 Changes:
> >  [PATCH V4 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache
> > support
> >  * Increased validation of the runtime buffers passed in the SMM comm
> buffer
> >
> SMM_VARIABLE_COMMUNICATE_RUNTIME_VARIABLE_CACHE_CONTEXT
> structure to the
> >
> SMM_VARIABLE_FUNCTION_INIT_RUNTIME_VARIABLE_CACHE_CONTEXT
> function in
> >SmmVariableHandler () in VariableSmm.c.
> >  * Most notably, each runtime buffer given is checked to ensure its
> memory
> >range does not overlap with SMRAM ranges via
> VariableSmmIsBufferOutsideSmmValid ().
> >
> > V4 Changes:
> >  [PATCH V3 7/9] MdeModulePkg/Variable: Add RT GetVariable() cache
> > support
> >  * Set
> gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache to
> FALSE
> >by default in MdeModulePkg.dec.
> >
> >  * Added a new patch to set
> gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache
> >to TRUE at the end of the patch series. This allows someone to bisect an
> issue at
> >patch #7 or patch #8 in the series with no change in variable caching
> behavior. The
> >runtime cache variable logic would be applied explicitly in V4 patch #10.
> 
> I gave my R-b for the OvmfPkg patch in the v4 posting:
> 
> https://edk2.groups.io/g/devel/message/48979
> 
> (alternative link:
> 
> http://mid.mail-archive.com/b89583ed-06ef-ccd2-2e29-
> d054f581e...@redhat.com
> )
> 
> In the v5 posting -- assuming you had not changed that specific OvmfPkg
> patch, relative to v4 -- you should have picked up my R-b, and carried it
> forward ever since (to the present v7). Basically, do a git-rebase, select the
> "reword" action for the patch, then cut&paste my R-b from my
> v4 review email to the bottom of the commit message. Then every further
> posting will contain it.
> 
> If there *have* been changes to the patch, relative to v4, then it's indeed
> right to drop (or simply not pick up) my R-b. FWIW, the changelog above
> does not suggest the particular patch has seen any changes since v4.
> 
> Thanks!
> Laszlo
> 
> >
> > V3 Changes:
> >  [PATCH V2 1/9] MdeModulePkg/Variable: Consolidate common parsing
> > functions
> >  * Removed GUIDs added to VariableStandaloneMm.inf that are not
> required.
> >  * Added more details to the commit message describing the criteria of
> >moving the chosen functions to VariableParsing.c.
> >
> >  [PATCH V2 2/9] MdeModulePkg/Variable: Parameterize
> > GetNextVariableEx() store list
> >  * RenamedGetNextVariableEx () to
> > VariableServiceGetNextVariableInternal ()
> >  * Updated comments 

Re: [edk2-devel] [PATCH] Support skipping automatic BM enumeration

[Laszlo Ersek]

On 11/01/19 23:05, Ashish Singhal wrote:
> Please refer to https://edk2.groups.io/g/devel/message/49627 for the patch.

Thanks! The subject line is:

[PATCH] MdeModulePkg/UefiBootManagerLib: Support skipping BM enumeration

This looks like a  glitch to me -- a failure to reflect your
message to *some* subscribers. It's not just me that hasn't received the
patch, but at least a mailing list daemon too (which is subscribed to
the list in order to create a "secondary archive"):

https://www.redhat.com/archives/edk2-devel-archive/2019-October/author.html

The patch is not listed under your name.


On the other hand, the patch is there in the (also subscribed)
 collection, with apparently correct threading even:

8a8ecae581eeffd193157096f09da53a3ab3a7ab.1572406843.git.ashishsingha@nvidia.com">http://mid.mail-archive.com/8a8ecae581eeffd193157096f09da53a3ab3a7ab.1572406843.git.ashishsingha@nvidia.com

So... I'm not sure.

Ray, Zhichao, did you get a copy of the patch? If not, then I think we
should ask Ashish to please repost.

Thanks
Laszlo

> -Original Message-
> From: Laszlo Ersek  
> Sent: Friday, November 1, 2019 3:42 PM
> To: Ashish Singhal ; devel@edk2.groups.io; 
> jian.j.w...@intel.com; hao.a...@intel.com; Ray Ni ; Zhichao 
> Gao 
> Subject: Re: [edk2-devel] [PATCH] Support skipping automatic BM enumeration
> 
> On 10/31/19 13:42, Ashish Singhal wrote:
>> Hello Laszlo,
>>
>> This is the cover letter. The patch was also submitted.
> 
> Can you please state the groups.io permalink for the posted patch, and/or the 
> Message-Id header for the posted patch?
> 
>> Please let me know if you are unable to find it and I'll resubmit it.
> 
> I can't see the patch email in my list folder.
> 
> Thanks
> Laszlo
> 
> ---
> This email message is for the sole use of the intended recipient(s) and may 
> contain
> confidential information.  Any unauthorized review, use, disclosure or 
> distribution
> is prohibited.  If you are not the intended recipient, please contact the 
> sender by
> reply email and destroy all copies of the original message.
> ---
> 


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49875): https://edk2.groups.io/g/devel/message/49875
Mute This Topic: https://groups.io/mt/39747302/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [Patch v3 00/22] Enable Phase 1 of EDK II CI

[Laszlo Ersek]

Hi Mike,

On 11/01/19 06:03, Kinney, Michael D wrote:
> Hi Laszlo,
> 
> ===
> Note for all reviewers:
> ---
> Pull requests against edk2-staging/edk2-ci are not
> being processed right now.  We are working on some
> configuration changes after noticing that all the
> checks were not being shown on the Web UI.  We will
> let you know when it is back up.
> ===
> 
> Yes.  You need to create a fork of the tianocore/edk2-staging repo.
> 
> You can do this with the WebUI or the hub command line utility.
> 
> * https://github.com/github/hub
> * https://github.com/github/hub/releases
> * https://hub.github.com/hub.1.html
> 
> The hub command also supports creating a pull request.
> I have used it extensively to write some unit tests
> for edk2-ci this week.
> 
> Once you create a branch with changes to submit in your
> own fork of tianocore/edk2-staging the WebUI will show
> that this pull request is possible and guide you through
> it.
> 
> The use of edk2-staging/edk2-ci is only for the review
> and unit testing.  Once the review is approved, it will
> be enabled on edk2/master and you will be able to use
> your own fork of edk2 to make branches and submit pull
> requests.

* For now, I submitted a pull request using the WebUi.

https://github.com/tianocore/edk2-staging/pull/87

I can see the processing is paused at the moment, as you state above.


* When I submitted PR#87, there had been no conflicts; the PR was simply
blocked on the CI tasks. Now, there are conflicts (I assume due to
intervening pushes, while my PR#87 was blocked). It's useful that the
WebUI points out this change in the status of the PR (i.e., "now
conflicting" vs. "no conflicts just waiting for CI"). However, this
status change has not been emailed to me.

When this occurs to a PR (for example due to an intervening PR that is
merged), what happens to the pre-empted PR? Does it remain suspended
forever? How does the submitter learn about it?


* Regarding my question (b) below, the answer is "I can't". I cannot
submit a PR against tianocore/edk2-staging.git with reference to
lersek/edk2.git, given that the latter is a not a "github-level fork" of
the former.

This is quite regrettable, but once the CI system is in production, it
will be OK in practice (I will only submit PRs against tianocore/edk2.git).


* I've explored the "hub" command a bit. (This relates to my question
(a); thanks for your suggestion.)

On the positive side, it is packaged in EPEL7, therefore I could readily
install it on my RHEL7 laptop, from a distribution-level package.

On the negative side, I quickly noticed two issues with "hub". I went
looking in the "hub" issue tracker, and to my relief, others had
reported the same problems before me (so I only commented on, and
subscribed to, the reports):

https://github.com/github/hub/issues/2338#issuecomment-548952413
https://github.com/github/hub/issues/#issuecomment-548967446

Issue#2338 is more technically challenging, but in practice (once CI is
enabled for edk2 itself), it's not really going to affect me.

Issue# should be easy to solve, technically speaking, but until it's
solved, I find it quite disappointing.

Thanks!
Laszlo

>> -Original Message-
>> From: Laszlo Ersek 
>> Sent: Thursday, October 31, 2019 2:55 AM
>> To: devel@edk2.groups.io; Kinney, Michael D
>> 
>> Cc: Sean Brogan ; Bret
>> Barkelew ; Gao, Liming
>> ; Feng, Bob C
>> ; Andrew Fish ;
>> Leif Lindholm ; Wang, Jian J
>> ; Lu, XiaoyuX
>> ; Ni, Ray ; Wu,
>> Hao A ; Wu, Jiaxin
>> ; Fu, Siyuan ;
>> Yao, Jiewen ; Zhang, Chao B
>> ; Gao, Zhichao
>> ; Dong, Eric
>> 
>> Subject: Re: [edk2-devel] [Patch v3 00/22] Enable Phase
>> 1 of EDK II CI
>>
>> On 10/29/19 20:54, Michael D Kinney wrote:
>>
>>> Active branch for testing/evaluation:
>>> * https://github.com/tianocore/edk2-staging/tree/edk2-
>> ci
>>> * To test, fork edk2-staging repo, create a branch
>> with a change, and submit
>>>   a pull request targeting edk2-staging/edk2-ci.
>> NOTE: the default branch for
>>>   the edk2-staging is 'about'.  You must select the
>> 'edk2-ci' branch when
>>>   a pull request is opened.  Set the 'push' label to
>> require commit if all
>>>   checks pass.
>>
>> The edk2-staging repository has been added as a "git
>> remote" to my local
>> edk2 clone for a long while now. Using the local
>> identifier "staging".
>> (This makes perfect sense as edk2-staging is itself a
>> fork of edk2, with branches that are supposed to be
>> rebased to edk2/master periodically.)
>>
>> Furthermore, the identifier by which I refer to the
>> remote at  is
>> "lersek".
>>
>> I've now run the following commands:
>>
>> $ git fetch staging
>> $ git checkout -b ci-test-1 staging/edk2-ci
>>
>> [modify "SampleFile.txt"]
>>
>> $ git add -p
>> $ git commit
>> $ git push lersek ci-test-1
>>
>> Questions:
>>
>> 

Re: [edk2-devel] [PATCH V7 00/10] UEFI Variable SMI Reduction

[Laszlo Ersek]

Hello Michael,

On 11/01/19 18:34, Michael Kubacki wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2220
> 
> V7 Changes:
>  [PATCH V6 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache support
>  * Remove VariableRuntimeCache.c and VariableRuntimeCache.h from
>VariableSmmRuntimeDxe.inf since they are not needed to build the module.
> 
> V6 Changes:
>  [PATCH V5 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache support
>  The most significant change is:
>  * Free mVariableRuntimeHobCacheBuffer in CheckForRuntimeCacheSync () in
>VariableSmmRuntimeDxe.c with FreePages () instead of FreePool ().
>  This issue was not found in earlier testing because on the initial set of
>  platforms tested, the variable HOB flush was finished prior to the variable
>  HOB runtime cache buffer being allocated so the FreePages () call was not
>  executed.
> 
>  The remaining changes did not affect testing but are included for robustness:
>  * Pass EFI_OPTIONAL_PTR for the DebugDisposition type in the 
> EfiConvertPointer ()
>calls for mVariableRuntimeHobCacheBuffer, mVariableRuntimeNvCacheBuffer, 
> and
>mVariableRuntimeVolatileCacheBuffer in VariableAddressChangeEvent () in
>VariableSmmRuntimeDxe.c as these buffers will not be allocated if the 
> runtime
>cache is disabled.
>  * In the SMM_VARIABLE_FUNCTION_INIT_RUNTIME_VARIABLE_CACHE_CONTEXT case in
>SmmVariableHandler () in VariableSmm.c, explicitly verify that
>VariableRuntimeHobCache.Store is not NULL in addition to checking that
>VariableGlobal.HobVariableBase is not set to zero (variable HOB is flushed)
>before writing to VariableRuntimeHobCache.Store.
> 
> V5 Changes:
>  [PATCH V4 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache support
>  * Increased validation of the runtime buffers passed in the SMM comm buffer
>SMM_VARIABLE_COMMUNICATE_RUNTIME_VARIABLE_CACHE_CONTEXT structure to the
>SMM_VARIABLE_FUNCTION_INIT_RUNTIME_VARIABLE_CACHE_CONTEXT function in
>SmmVariableHandler () in VariableSmm.c.
>  * Most notably, each runtime buffer given is checked to ensure its memory
>range does not overlap with SMRAM ranges via 
> VariableSmmIsBufferOutsideSmmValid ().
> 
> V4 Changes:
>  [PATCH V3 7/9] MdeModulePkg/Variable: Add RT GetVariable() cache support
>  * Set gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache to FALSE
>by default in MdeModulePkg.dec.
> 
>  * Added a new patch to set 
> gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache
>to TRUE at the end of the patch series. This allows someone to bisect an 
> issue at
>patch #7 or patch #8 in the series with no change in variable caching 
> behavior. The
>runtime cache variable logic would be applied explicitly in V4 patch #10.

I gave my R-b for the OvmfPkg patch in the v4 posting:

https://edk2.groups.io/g/devel/message/48979

(alternative link:

b89583ed-06ef-ccd2-2e29-d054f581ea6a@redhat.com">http://mid.mail-archive.com/b89583ed-06ef-ccd2-2e29-d054f581ea6a@redhat.com
)

In the v5 posting -- assuming you had not changed that specific OvmfPkg
patch, relative to v4 -- you should have picked up my R-b, and carried
it forward ever since (to the present v7). Basically, do a git-rebase,
select the "reword" action for the patch, then cut&paste my R-b from my
v4 review email to the bottom of the commit message. Then every further
posting will contain it.

If there *have* been changes to the patch, relative to v4, then it's
indeed right to drop (or simply not pick up) my R-b. FWIW, the changelog
above does not suggest the particular patch has seen any changes since v4.

Thanks!
Laszlo

> 
> V3 Changes:
>  [PATCH V2 1/9] MdeModulePkg/Variable: Consolidate common parsing functions
>  * Removed GUIDs added to VariableStandaloneMm.inf that are not required.
>  * Added more details to the commit message describing the criteria of
>moving the chosen functions to VariableParsing.c.
> 
>  [PATCH V2 2/9] MdeModulePkg/Variable: Parameterize GetNextVariableEx() store 
> list
>  * RenamedGetNextVariableEx () to VariableServiceGetNextVariableInternal ()
>  * Updated comments in VariableServiceGetNextVariableInternal () to refer to
>"FindVariablEx ()" instead of "FindVariable ()" since FindVariableEx ()
>is not used in the function.
> 
>  [PATCH V2 3/9] MdeModulePkg/Variable: Parameterize VARIABLE_INFO_ENTRY buffer
>  * Updated the commit message to clarify the message "structure can be updated
>outside the fixed global variable".
> 
>  [edk2-devel] [PATCH V2 4/9] MdeModulePkg/Variable: Add local auth status in 
> VariableParsing
>  * Remove the function InitVariableParsing ()
>  * Remove the mAuthFormat global variable and instead add a BOOLEAN parameter
>to all functions that require variable authentication information  to
>indicate if authenticated variables are used.
>* This allows the authenticated variable status to be tracked in one place 
> in
>  each variable driver in the SMM

Re: [edk2-devel] [PATCH] Support skipping automatic BM enumeration

[Ashish Singhal]

Please refer to https://edk2.groups.io/g/devel/message/49627 for the patch.

Thanks
Ashish

-Original Message-
From: Laszlo Ersek  
Sent: Friday, November 1, 2019 3:42 PM
To: Ashish Singhal ; devel@edk2.groups.io; 
jian.j.w...@intel.com; hao.a...@intel.com; Ray Ni ; Zhichao 
Gao 
Subject: Re: [edk2-devel] [PATCH] Support skipping automatic BM enumeration

On 10/31/19 13:42, Ashish Singhal wrote:
> Hello Laszlo,
> 
> This is the cover letter. The patch was also submitted.

Can you please state the groups.io permalink for the posted patch, and/or the 
Message-Id header for the posted patch?

> Please let me know if you are unable to find it and I'll resubmit it.

I can't see the patch email in my list folder.

Thanks
Laszlo

---
This email message is for the sole use of the intended recipient(s) and may 
contain
confidential information.  Any unauthorized review, use, disclosure or 
distribution
is prohibited.  If you are not the intended recipient, please contact the 
sender by
reply email and destroy all copies of the original message.
---

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49872): https://edk2.groups.io/g/devel/message/49872
Mute This Topic: https://groups.io/mt/39747302/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [PATCH v4] CryptoPkg: Upgrade OpenSSL to 1.1.1d

[Laszlo Ersek]

On 11/01/19 08:31, Wang, Jian J wrote:
> Hi Laszlo,
> 
> I did simple ovmf boot tests (shell, linux, windows) and all passed. Let me 
> know if you have
> any comments or want to do more tests against v4 before check in.
> 
> Based on my review and tests,
>Reviewed-by: Jian J Wang 

I can get to this patch on next Monday (2019-Nov-04) the earliest. (Even
today is a public holiday in my country, and I've only logged in now to
quickly respond to Mike's email in another thread.) I had the v3 posting
tagged earlier, and am learning of v4 only now.

I think the OpenSSL update should be tested with at least the following
use cases:

- HTTPS boot
- Secure Boot

Given that the HTTPS Boot CVE fix is also pending on the list, and that
it was posted before the OpenSSL upgrade, and they both affect HTTPS
Boot, I request that the OpenSSL upgrade be delayed until after the CVE
fix is pushed. (I'll try to push the CVE fix this weekend, or next Monday.)

Thanks
Laszlo

>> -Original Message-
>> From: Zhang, Shenglei 
>> Sent: Friday, November 01, 2019 2:56 PM
>> To: devel@edk2.groups.io
>> Cc: Wang, Jian J ; Lu, XiaoyuX ;
>> Gao, Liming 
>> Subject: [PATCH v4] CryptoPkg: Upgrade OpenSSL to 1.1.1d
>>
>> Update openssl from 1.1.1b to 1.1.1d.
>> Something needs to be noticed is that, there is a bug existing in the
>> released 1_1_1d version(894da2fb7ed5d314ee5c2fc9fd2d9b8b74111596),
>> which causes build failure. So we switch the code base to a usable
>> version, which is 2 commits later than the stable tag.
>> Now we use the version c3656cc594daac8167721dde7220f0e59ae146fc.
>> This log is to fix the build failure.
>> https://bugzilla.tianocore.org/show_bug.cgi?id=2226
>>
>> Besides, the absense of "DSO_NONE" in dso_conf.h causes build failure
>> in OvmfPkg. So update process_files.pl to generate information from
>> "crypto/include/internal/dso_conf.h.in".
>>
>> shm.h and utsname.h are added to avoid GCC build failure.
>>
>> Cc: Jian J Wang 
>> Cc: Xiaoyu Lu 
>> Cc: Liming Gao 
>> Signed-off-by: Shenglei Zhang 
>> ---
>> v2: Revert the changes in OpensslLib.inf and OpensslLibCrypto.inf.
>> The removed header files could be auto-generated by process_files.pl now.
>>
>> v3: Add display information for dso_conf.h.
>>
>> v4: Add shm.h and utsname.h to avoid GCC build failure.
>>
>>  CryptoPkg/Library/Include/internal/dso_conf.h | 16 
>>  CryptoPkg/Library/Include/sys/shm.h   |  9 +
>>  CryptoPkg/Library/Include/sys/utsname.h   | 10 ++
>>  CryptoPkg/Library/OpensslLib/openssl  |  2 +-
>>  CryptoPkg/Library/OpensslLib/process_files.pl | 15 ++-
>>  5 files changed, 50 insertions(+), 2 deletions(-)
>>  create mode 100644 CryptoPkg/Library/Include/sys/shm.h
>>  create mode 100644 CryptoPkg/Library/Include/sys/utsname.h
>>
>> diff --git a/CryptoPkg/Library/Include/internal/dso_conf.h
>> b/CryptoPkg/Library/Include/internal/dso_conf.h
>> index e69de29bb2d1..43c891588bc2 100644
>> --- a/CryptoPkg/Library/Include/internal/dso_conf.h
>> +++ b/CryptoPkg/Library/Include/internal/dso_conf.h
>> @@ -0,0 +1,16 @@
>> +/* WARNING: do not edit! */
>> +/* Generated from crypto/include/internal/dso_conf.h.in */
>> +/*
>> + * Copyright 2016-2019 The OpenSSL Project Authors. All Rights Reserved.
>> + *
>> + * Licensed under the OpenSSL license (the "License").  You may not use
>> + * this file except in compliance with the License.  You can obtain a copy
>> + * in the file LICENSE in the source distribution or at
>> + * https://www.openssl.org/source/license.html
>> + */
>> +
>> +#ifndef HEADER_DSO_CONF_H
>> +# define HEADER_DSO_CONF_H
>> +# define DSO_NONE
>> +# define DSO_EXTENSION ".so"
>> +#endif
>> diff --git a/CryptoPkg/Library/Include/sys/shm.h
>> b/CryptoPkg/Library/Include/sys/shm.h
>> new file mode 100644
>> index ..dc0b8e81c8b0
>> --- /dev/null
>> +++ b/CryptoPkg/Library/Include/sys/shm.h
>> @@ -0,0 +1,9 @@
>> +/** @file
>> +  Include file to support building the third-party cryptographic library.
>> +
>> +Copyright (c) 2019, Intel Corporation. All rights reserved.
>> +SPDX-License-Identifier: BSD-2-Clause-Patent
>> +
>> +**/
>> +
>> +#include 
>> diff --git a/CryptoPkg/Library/Include/sys/utsname.h
>> b/CryptoPkg/Library/Include/sys/utsname.h
>> new file mode 100644
>> index ..75955b0a4eb6
>> --- /dev/null
>> +++ b/CryptoPkg/Library/Include/sys/utsname.h
>> @@ -0,0 +1,10 @@
>> +/** @file
>> +  Include file to support building the third-party cryptographic library.
>> +
>> +Copyright (c) 2019, Intel Corporation. All rights reserved.
>> +SPDX-License-Identifier: BSD-2-Clause-Patent
>> +
>> +**/
>> +
>> +#include 
>> +
>> diff --git a/CryptoPkg/Library/OpensslLib/openssl
>> b/CryptoPkg/Library/OpensslLib/openssl
>> index 50eaac9f3337..c3656cc594da 16
>> --- a/CryptoPkg/Library/OpensslLib/openssl
>> +++ b/CryptoPkg/Library/OpensslLib/openssl
>> @@ -1 +1 @@
>> -Subproject commit 50eaac9f3337667259de725451f201e784599687
>> +Subproject commi

Re: [edk2-devel] [edk2-platforms][PATCH V1 00/19] Remove Intel server packages

[Nate DeSimone]

For the patch series...

Reviewed-by: Nate DeSimone 

-Original Message-
From: Kubacki, Michael A  
Sent: Friday, November 1, 2019 2:03 PM
To: devel@edk2.groups.io
Cc: Bu, Daocheng ; Desimone, Nathaniel L 
; Gillispie, Thad ; 
Kinney, Michael D ; Lu, Shifei A 
; Oram, Isaac W ; Piwko, Maciej 
; Richardson, Brian ; Zhou, 
Bowen 
Subject: [edk2-platforms][PATCH V1 00/19] Remove Intel server packages

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2322
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2323
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2324
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2325

RFC:https://edk2.groups.io/g/devel/message/49360

This change implements a proposal sent in the RFC referenced above.

The current set of maintainers for these packages do not plan to
maintain the packages moving forward. Simply leaving the code as
unmaintained is undesirable for several reasons including presence
of build issues, functional issues, and lack of consistency with
other Intel platform/silicon code in design and usage. Some of
these issues already exist in these packages and will worsen over
time.

It is suggested that these be removed for the next stable tag due
to lack of recent testing.

Note: Some patches in this series were created to reduce overall
patch size during package removal.

Cc: Daocheng Bu 
Cc: Nate DeSimone 
Cc: Thad Gillispie 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Maciej Piwko 
Cc: Brian Richardson 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 

Michael Kubacki (19):
  Readme.md: Remove PurleyOpenBoardPkg
  Platform/Intel/build.cfg: Remove BoardMtOlympus
  PurleyOpenBoardPkg: Remove StructureConfig.dsc
  PurleyOpenBoardPkg: Remove package build files
  PurleyOpenBoardPkg/BoardMtOlympus: Remove all files
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove PlatformPciTree_WFP.asi
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove PCxx .asi files
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove .asi files
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove all files
  PurleyOpenBoardPkg: Remove all modules
  PurleyOpenBoardPkg: Remove all includes and libraries
  PurleyRcPkg: Remove the package
  PurleySktPkg: Remove the package
  LewisburgPkg: Remove DEC and DSC files
  LewisburgPkg/AcpiTables: Remove all files
  LewisburgPkg/Include/Register: Remove all files
  LewisburgPkg/Include: Remove all files
  LewisburgPkg: Remove all libraries
  Maintainers.txt: Update Intel package maintainers

 Platform/Intel/PurleyOpenBoardPkg/PlatPkg.dec  
  |  146 -
 Silicon/Intel/LewisburgPkg/PchRcPkg.dec
  |  226 -
 Silicon/Intel/PurleyRcPkg/RcPkg.dec
  |   90 -
 Silicon/Intel/PurleySktPkg/Override/IA32FamilyCpuPkg/IA32FamilyCpuPkg.dec  
  |  601 --
 Silicon/Intel/PurleySktPkg/SocketPkg.dec   
  |  110 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc   
  |  257 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgBuildOption.dsc
  |   81 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgConfig.dsc 
  |   62 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgPcd.dsc
  |  334 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/StructureConfig.dsc   
  | 6141 
---
 Silicon/Intel/LewisburgPkg/PchCommonLib.dsc
  |   19 -
 Silicon/Intel/LewisburgPkg/PchDxeLib.dsc   
  |   13 -
 Silicon/Intel/LewisburgPkg/PchPeiLib.dsc   
  |8 -
 Silicon/Intel/PurleyRcPkg/RcCommonLib.dsc  
  |   14 -
 Silicon/Intel/PurleyRcPkg/RcDxeLib.dsc 
  |   21 -
 Silicon/Intel/PurleyRcPkg/RcPeiLib.dsc 
  |8 -
 Silicon/Intel/PurleySktPkg/SktCommonLib.dsc 

Re: [edk2-devel] [edk2-platforms] [PATCH 3/5] BoardModulePkg: Added Pcds Sio Driver

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Agyeman, Prince
Sent: Friday, November 1, 2019 12:51 PM
To: devel@edk2.groups.io
Cc: Kubacki, Michael A ; Chiu, Chasel 
; Desimone, Nathaniel L 
Subject: [edk2-devel] [edk2-platforms] [PATCH 3/5] BoardModulePkg: Added Pcds 
Sio Driver

Included PCDs to the Sio dxe driver,
to allow the enable/disable of Ps2 keyboard/mouse,
UART1 and UART2 com ports.

Renamed the Sio driver's base name

Cc: Michael Kubacki 
Cc: Chasel Chiu 
Cc: Nate DeSimone 

Signed-off-by: Prince Agyeman 
---
 .../LegacySioDxe/LegacySioDxe.inf | 15 +++-
 .../BoardModulePkg/LegacySioDxe/SioChip.c | 69 +--
 .../BoardModulePkg/LegacySioDxe/SioChip.h | 10 +++
 .../BoardModulePkg/LegacySioDxe/SioDriver.c   | 42 ++-
 .../BoardX58Ich10/OpenBoardPkgPcd.dsc |  6 ++
 5 files changed, 133 insertions(+), 9 deletions(-)

diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
index d606ba43dc..4ab01a6098 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
@@ -10,7 +10,7 @@
 
 [Defines]
   INF_VERSION= 0x00010017
-  BASE_NAME  = HitachiH8s2113Dxe
+  BASE_NAME  = LegacySioDxe
   FILE_GUID  = 7807E404-8281-4FF1-8457-0B54BABE263F
   VERSION_STRING = 1.0
   MODULE_TYPE= UEFI_DRIVER
@@ -34,6 +34,7 @@
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  BoardModulePkg/BoardModulePkg.dec
 
 [Sources]
   SioChip.c
@@ -44,6 +45,18 @@
   SioDriver.h
   ComponentName.c
 
+[Pcd]
+  gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
+  gBoardModulePkgTokenSpaceGuid.PcdUart1Enable
+  gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask
+  gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort
+  gBoardModulePkgTokenSpaceGuid.PcdUart1Length
+  gBoardModulePkgTokenSpaceGuid.PcdUart2Enable
+  gBoardModulePkgTokenSpaceGuid.PcdUart2IrqMask
+  gBoardModulePkgTokenSpaceGuid.PcdUart2IoPort
+  gBoardModulePkgTokenSpaceGuid.PcdUart2Length
+  gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice
+
 [Protocols]
   gEfiPciIoProtocolGuid ## CONSUMES
   gEfiDevicePathProtocolGuid## PRODUCES
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
index 81efe3c38b..09403a7354 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
@@ -19,12 +19,31 @@
 ACPI_SIO_RESOURCES_IO_IRQ  mCom1Resources = {
   {
 { ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR },
-0x3f8,
-8
+  FixedPcdGet16 (PcdUart1IoPort),
+  FixedPcdGet8 (PcdUart1Length)
+},
+{
+  { ACPI_IRQ_NOFLAG_DESCRIPTOR },
+  FixedPcdGet16 (PcdUart1IrqMask)
+},
+{
+  ACPI_END_TAG_DESCRIPTOR,
+  0
+}
+};
+
+//
+// COM 2 UART Controller
+//
+ACPI_SIO_RESOURCES_IO_IRQ  mCom2Resources = {
+  {
+{ ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR },
+FixedPcdGet16 (PcdUart2IoPort),
+FixedPcdGet8 (PcdUart2Length)
   },
   {
 { ACPI_IRQ_NOFLAG_DESCRIPTOR },
-BIT4// IRQ4
+FixedPcdGet16 (PcdUart2IrqMask),
   },
   {
 ACPI_END_TAG_DESCRIPTOR,
@@ -70,10 +89,12 @@ ACPI_SIO_RESOURCES_IO_IRQ  mMouseResources = {
   }
 };
 
+
 //
 // Table of SIO Controllers
 //
 DEVICE_INFOmDeviceInfo[] = {
+#if FixedPcdGet8 (PcdUart1Enable) == DEVICE_ENABLED
   {
 {
   EISA_PNP_ID(0x501),
@@ -84,6 +105,20 @@ DEVICE_INFOmDeviceInfo[] = {
 { (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources },
 { (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources }
   },  // COM 1 UART Controller
+#endif
+#if FixedPcdGet8 (PcdUart2Enable) == DEVICE_ENABLED
+  {
+{
+  EISA_PNP_ID(0x501),
+  0
+},
+0,
+RESOURCE_IO | RESOURCE_IRQ,
+{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources },
+{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources }
+  },  // COM 2 UART Controller
+#endif
+#if FixedPcdGet8 (PcdPs2KbMsEnable) == DEVICE_ENABLED
   {
 {
   EISA_PNP_ID(0x303),
@@ -103,10 +138,28 @@ DEVICE_INFOmDeviceInfo[] = {
 0,  // Cannot change resource
 { (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources },
 { (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources }
-  }  // PS/2 Mouse Controller
+  },  // PS/2 Mouse Controller
+#endif
+  DEVICE_INFO_END
 };
 
 
+
+/**
+  Gets the number of devices in Table of SIO Controllers mDeviceInfo
+
+  @retval Number of enabled devices in Table of SIO Controllers.
+**/
+UINTN
+EFIAPI
+GetDeviceCount(
+  VOID
+){
+   UINTNCount;
+   Count = ARRAY_SIZE(mDeviceInfo) - 1; // -1 to account for for the end 
device info
+   return Count;
+}
+
 /**
   Return the supported devices.
 
@@ -128,7 +181,7 @@ DeviceGetLis

Re: [edk2-devel] [edk2-platforms] [PATCH 2/5] Platform/Intel: Move Sio Dxe Driver

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: Agyeman, Prince  
Sent: Friday, November 1, 2019 12:51 PM
To: devel@edk2.groups.io
Cc: Kubacki, Michael A ; Chiu, Chasel 
; Desimone, Nathaniel L 
Subject: [edk2-platforms] [PATCH 2/5] Platform/Intel: Move Sio Dxe Driver

Moved LegacySioDxe from SimicsOpenBoardPkg to BoardModulePkg as LegacySioDxe is 
generic and can be shared between open board packages

Removed unused libraries and functions in LegacySioDxe

Pointed BoardX58Ich10 to the current LegacySioDxe location

Cc: Michael Kubacki 
Cc: Chasel Chiu 
Cc: Nate DeSimone 

Signed-off-by: Prince Agyeman 
---
 Platform/Intel/BoardModulePkg/BoardModulePkg.dsc   |  1 +
 .../LegacySioDxe/ComponentName.c   |  0
 .../LegacySioDxe/ComponentName.h   |  0
 .../LegacySioDxe/LegacySioDxe.inf  |  3 ---
 .../LegacySioDxe/Register.h|  0
 .../LegacySioDxe/SioChip.c |  2 --
 .../LegacySioDxe/SioChip.h | 10 --
 .../LegacySioDxe/SioDriver.c   |  0
 .../LegacySioDxe/SioDriver.h   |  1 -
 .../LegacySioDxe/SioService.c  |  0
 .../LegacySioDxe/SioService.h  |  0
 .../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc  |  2 +-  
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf  |  2 +-
 13 files changed, 3 insertions(+), 18 deletions(-)  rename 
Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/ComponentName.c (100%)  rename 
Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/ComponentName.h (100%)  rename 
Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/LegacySioDxe.inf (92%)  rename 
Platform/Intel/{SimicsOpenBoardPkg => BoardModulePkg}/LegacySioDxe/Register.h 
(100%)  rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioChip.c (94%)  rename 
Platform/Intel/{SimicsOpenBoardPkg => BoardModulePkg}/LegacySioDxe/SioChip.h 
(93%)  rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioDriver.c (100%)  rename 
Platform/Intel/{SimicsOpenBoardPkg => BoardModulePkg}/LegacySioDxe/SioDriver.h 
(95%)  rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioService.c (100%)  rename 
Platform/Intel/{SimicsOpenBoardPkg => BoardModulePkg}/LegacySioDxe/SioService.h 
(100%)

diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc 
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
index 5ec68ceebf..fffc135d75 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
@@ -76,6 +76,7 @@
 
 [Components]
   BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMediaInfoPei.inf
+  BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
   BoardModulePkg/Library/CmosAccessLib/CmosAccessLib.inf
   
BoardModulePkg/Library/PlatformCmosAccessLibNull/PlatformCmosAccessLibNull.inf
 
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
similarity index 100%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.h 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
similarity index 100%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.h
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
similarity index 92%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
index 275f36ca47..d606ba43dc 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
@@ -28,11 +28,8 @@
   MemoryAllocationLib
   PcdLib
   DevicePathLib
-  IoLib
   UefiDriverEntryPoint
   UefiBootServicesTableLib
-  S3BootScriptLib
-  S3IoLib
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/Register.h 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/Register.h
similarity index 100%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/Register.h
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/Register.h
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
similarity index 94%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
index b9a7b9cd24..81efe3c38b 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c
+++ b/Platform/Intel/BoardModulePk

Re: [edk2-devel] [edk2-platforms] [PATCH 1/5] Platform/Intel: Add gBoardModulePkgTokenSpaceGuid

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: Agyeman, Prince  
Sent: Friday, November 1, 2019 12:51 PM
To: devel@edk2.groups.io
Cc: Kubacki, Michael A ; Chiu, Chasel 
; Desimone, Nathaniel L 
Subject: [edk2-platforms] [PATCH 1/5] Platform/Intel: Add 
gBoardModulePkgTokenSpaceGuid

Added gBoardModulePkgTokenSpaceGuid to BoardModulePkg

Added ps2 keyboard and Uart enable PCDs.

Added PCDs to define IO ports for Uart1 and Uart2

Enabled KabylakeOpenBoardPkg and WhiskeylakeOpenBoardPkg boards to use the ps2 
keyboard enable PCD.

Cc: Michael Kubacki 
Cc: Chasel Chiu 
Cc: Nate DeSimone 

Signed-off-by: Prince Agyeman 
---
 .../Intel/BoardModulePkg/BoardModulePkg.dec   | 25 +++
 .../BoardAcpiLib/DxeBoardAcpiTableLib.inf |  3 ++-
 .../DxeMultiBoardAcpiSupportLib.inf   |  3 ++-
 .../GalagoPro3/OpenBoardPkgPcd.dsc|  5 
 .../BoardAcpiLib/DxeBoardAcpiTableLib.inf |  3 ++-
 .../DxeMultiBoardAcpiSupportLib.inf   |  3 ++-
 .../KabylakeRvp3/OpenBoardPkgPcd.dsc  |  5 
 .../KabylakeOpenBoardPkg/OpenBoardPkg.dec |  2 --
 .../WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec  |  1 -
 .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc   |  5 
 10 files changed, 48 insertions(+), 7 deletions(-)

diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec 
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
index f461cc7cab..26e662f711 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
@@ -42,3 +42,28 @@
 
   ## GUID to publish BIOS information HOB
   gBiosInfoGuid = { 0x09d0d15c, 0xe9f0, 0x4dfc, {0x9e, 0x0b, 0x39, 0x33, 0x1f, 
0xca, 0x66, 0x85} }
+
+  ## {7F4EE1A3-C1F3-43E4-BA1A-39DCDE46C343}
+  gBoardModulePkgTokenSpaceGuid = { 0x7f4ee1a3, 0xc1f3, 0x43e4, { 0xba, 
+ 0x1a, 0x39, 0xdc, 0xde, 0x46, 0xc3, 0x43 } }
+
+[PcdsFixedAtBuild]
+  ## PcdPs2KbMsEnable 0x0:Disable, 0x1:Enable
+  gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|0x00|UINT8|0x0001
+
+  ## SuperIo Pci ISA Bridge info. It is an array that contains the 
+ Segment, Bus, Device and Function  #  information describing the PCI 
+ Device Info. The first byte is the segment number,  #  the second is 
+ the bus number, third byte is the device number, the fourth byte  #  is the 
Function.
+  gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0xFF, 
+ 0xFF, 0xFF, 0xFF}|VOID*|0x0002
+
+  ## PcdUart1Enable 0x0:Disable, 0x1:Enable
+  gBoardModulePkgTokenSpaceGuid.PcdUart1Enable|0x00|UINT8|0x0003
+
+ gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask|0x0010|UINT16|0x0004
+  gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort|0x03F8|UINT16|0x0005
+  gBoardModulePkgTokenSpaceGuid.PcdUart1Length|0x08|UINT8|0x0006
+
+  ## PcdUart2Enable 0x0:Disable, 0x1:Enable
+  gBoardModulePkgTokenSpaceGuid.PcdUart2Enable|0x00|UINT8|0x0007
+
+ gBoardModulePkgTokenSpaceGuid.PcdUart2IrqMask|0x0008|UINT16|0x0008
+  gBoardModulePkgTokenSpaceGuid.PcdUart2IoPort|0x02F8|UINT16|0x0009
+  gBoardModulePkgTokenSpaceGuid.PcdUart2Length|0x08|UINT8|0x000A
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
index a79bdcdbc6..35cd5c8fdb 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLi
+++ b/DxeBoardAcpiTableLib.inf
@@ -33,9 +33,10 @@
   MinPlatformPkg/MinPlatformPkg.dec
   KabylakeOpenBoardPkg/OpenBoardPkg.dec
   KabylakeSiliconPkg/SiPkg.dec
+  BoardModulePkg/BoardModulePkg.dec
 
 [Pcd]
-  gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPs2KbMsEnable
+  gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
   gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative
   gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable
   gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
index db8ba7a822..9fe27f9fda 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLi
+++ b/DxeMultiBoardAcpiSupportLib.inf
@@ -34,9 +34,10 @@
   MinPlatformPkg/MinPlatformPkg.dec
   KabylakeOpenBoardPkg/OpenBoardPkg.dec
   KabylakeSiliconPkg/SiPkg.dec
+  BoardModulePkg/BoardModulePkg.dec
 
 [Pcd]
-  gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPs2KbMsEnable
+  gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPciExpNative
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdNativeAspmEnable
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLowPowerS0Idle
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc 
b/Platform/Intel/KabylakeOpenB

Re: [edk2-devel] [edk2-platforms] [PATCH 4/5] KabylakeOpenBoardPkg: Add Ps2 keyboard Null Library

[Nate DeSimone]

This is actually a really generic library. Please move it to BoardModulePkg and 
rename it to BdsPs2KeyboardLib.

This isn't really a "null library" please update your commit message. I'd 
recommend "Add BdsPs2KeyboardLib".

-Original Message-
From: Agyeman, Prince  
Sent: Friday, November 1, 2019 12:51 PM
To: devel@edk2.groups.io
Cc: Kubacki, Michael A ; Chiu, Chasel 
; Desimone, Nathaniel L 
Subject: [edk2-platforms] [PATCH 4/5] KabylakeOpenBoardPkg: Add Ps2 keyboard 
Null Library

Added GalagoPro3 board ps2 keyboard library that adds ps2 device path to ConIn 
and ConInDev Uefi variables

Cc: Michael Kubacki 
Cc: Chasel Chiu 
Cc: Nate DeSimone 

Signed-off-by: Prince Agyeman 
---
 .../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c  | 202 ++  
.../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h  |  65 ++
 .../Library/Ps2KbcLib/Ps2KbcLib.inf   |  39 
 3 files changed, 306 insertions(+)
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.inf

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
new file mode 100644
index 00..ac1563d3cd
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/P
+++ s2KbcLib.c
@@ -0,0 +1,202 @@
+/** @file
+  Main file for NULL named library for Ps2 keyboard controller librarr.
+
+  Copyright (c) 2019, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "Ps2KbcLib.h"
+
+GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_KEYBOARD_DEVICE_PATH
+gKeyboardDevicePath = {
+  gPciRootBridge,
+  {
+{
+  HARDWARE_DEVICE_PATH,
+  HW_PCI_DP,
+  {
+(UINT8) (sizeof (PCI_DEVICE_PATH)),
+(UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8)
+  }
+},
+0, // Function, patched in EnumPs2Keyboard
+0  // Device, patched in EnumPs2Keyboard
+  },
+  {
+{
+  ACPI_DEVICE_PATH,
+  ACPI_DP,
+  {
+(UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
+(UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
+  }
+},
+EISA_PNP_ID(0x0303),
+0
+  },
+  gEndEntire
+};
+
+/**
+  Check if PS2 keyboard is conntected, by sending ECHO command.
+  @retval   TRUE if connected FALSE otherwise
+**/
+BOOLEAN
+DetectPs2Keyboard (
+  VOID
+  )
+{
+  UINT32TimeOut;
+  UINT32RegEmptied;
+  UINT8 Data;
+  UINT32SumTimeOut;
+  BOOLEAN   FoundPs2Kbc;
+
+  TimeOut = 0;
+  RegEmptied  = 0;
+  FoundPs2Kbc   = FALSE;
+
+  //
+  // Wait for input buffer empty
+  //
+  for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30) {
+if ((IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x02) == 0) {
+  FoundPs2Kbc = TRUE;
+  break;
+}
+MicroSecondDelay (30);
+  }
+
+  if (FoundPs2Kbc == FALSE) {
+return FALSE;
+  }
+
+  //
+  // Send echo command
+  //
+  IoWrite8 (KEYBOARD_8042_DATA_REGISTER, KBC_INPBUF_VIA60_KBECHO);
+
+  //
+  // Init variables
+  //
+  FoundPs2Kbc   = FALSE;
+  TimeOut = 0;
+  SumTimeOut  = 0;
+  Data = 0;
+
+  //
+  // Read from 8042 (multiple times if needed)  // until the expected 
+ value appears  // use SumTimeOut to control the iteration  //  while 
+ (1) {
+//
+// Perform a read
+//
+for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30) {
+  if (IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x01) {
+Data = IoRead8 (KEYBOARD_8042_DATA_REGISTER);
+break;
+  }
+  MicroSecondDelay (30);
+}
+
+SumTimeOut += TimeOut;
+
+if (Data == KBC_INPBUF_VIA60_KBECHO) {
+  FoundPs2Kbc = TRUE;
+  break;
+}
+
+if (SumTimeOut >= PS2_KEYBOARD_WAITFORVALUE_TIMEOUT) {
+  break;
+}
+  }
+  return FoundPs2Kbc;
+}
+
+/**
+  Check if PS2 keyboard is conntected. If the result of first time is
+  error, it will retry again.
+  @retval   TRUE if connected FALSE otherwise
+**/
+BOOLEAN
+IsPs2KeyboardConnected (
+  VOID
+  )
+{
+  BOOLEAN Result;
+  Result = DetectPs2Keyboard ();
+
+  if (Result == FALSE) {
+//
+// If there is no ps2 keyboard detected for the 1st time, retry again.
+//
+Result = DetectPs2Keyboard ();
+  }
+  return Result;
+}
+
+
+/**
+  Updates the ConIn variable with Ps2 Keyboard device path,
+  if it doesn't already exists in ConIn and ConInDev **/ VOID 
+AddPs2Keyboard (
+  VOID
+  )
+{
+  SIO_PCI_ISA_BRIDGE_DEVICE_INFO *SioIsaInfo;
+
+  DEBUG ((DEBUG_INFO, "[AddPs2Keyboard]\n"));
+
+  SioIsaInfo = (SIO_PCI_ISA_BRIDGE_DEVICE_INFO*) FixedPcdGetPtr 
+ (PcdSuperIoPciIsaBridgeDevice);
+
+  //
+  // patch IsaBridge device and and function  //
+ gKeyboardD

Re: [edk2-devel] [edk2-platforms] [PATCH 5/5] KabylakeOpenBoardPkg: Add Ps2 Keyboard Support

[Nate DeSimone]

Please implement a patch 6 and 7 adding the same changes you made here for 
GalagoPro3 to KabylakeRvp3 and WhiskeyLakeURvp. Both of those boards have PS/2 
keyboard connectors and your change is valuable there too.

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Agyeman, Prince
Sent: Friday, November 1, 2019 12:51 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] [edk2-platforms] [PATCH 5/5] KabylakeOpenBoardPkg: Add 
Ps2 Keyboard Support

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2228

Added Ps2Keyboard DXE driver.

Added Sio dxe driver to publish the SIO protocol needed by the Ps2Keyboard DXE 
driver.

Included a Ps2 null Library to BdsDxe driver to add the Ps2 device path to 
ConIn and ConInDev variables

Configured the Super I/O Pci to Isa bridge bus, device, function device info 
PCD. This will help the Super I/O driver identify which bridge the Super I/O is 
connected to.

Signed-off-by: Prince Agyeman 
---
 .../Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 7 +++  
.../Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 2 ++
 .../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc| 1 +
 3 files changed, 10 insertions(+)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index f59248bba4..c6a0749458 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -311,6 +311,11 @@
   MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
   MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
   MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+  MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
+  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf{
+
+  NULL|$(PROJECT)/Library/Ps2KbcLib/Ps2KbcLib.inf
+  }
   UefiCpuPkg/CpuDxe/CpuDxe.inf
 
   ShellPkg/Application/Shell/Shell.inf { @@ -408,3 +413,5 @@
   !endif
   }
 !endif
+
+  BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index 80efab1aad..d58466d390 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -335,6 +335,8 @@ INF  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
 INF  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
 INF  MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
 INF  MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+INF  BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+INF  MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
 
 INF  ShellPkg/Application/Shell/Shell.inf
 
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
index 4550a4e0b5..c6f5ae7534 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
@@ -312,6 +312,7 @@
   # Board Configuration
   ##
   gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|1
+  gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x00, 
+ 0x00, 0x1F, 0x00}
 
 [PcdsFixedAtBuild.IA32]
   ##
--
2.19.1.windows.1





-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49865): https://edk2.groups.io/g/devel/message/49865
Mute This Topic: https://groups.io/mt/40479687/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [PATCH] Support skipping automatic BM enumeration

[Laszlo Ersek]

On 10/31/19 13:42, Ashish Singhal wrote:
> Hello Laszlo,
> 
> This is the cover letter. The patch was also submitted.

Can you please state the groups.io permalink for the posted patch,
and/or the Message-Id header for the posted patch?

> Please let me know if you are unable to find it and I'll resubmit it.

I can't see the patch email in my list folder.

Thanks
Laszlo


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49864): https://edk2.groups.io/g/devel/message/49864
Mute This Topic: https://groups.io/mt/39747302/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [edk2-platforms][PATCH V1 00/19] Remove Intel server packages

[Oram, Isaac W]

For the patch series...
Reviewed-by: Isaac Oram 

-Original Message-
From: Kubacki, Michael A  
Sent: Friday, November 1, 2019 2:03 PM
To: devel@edk2.groups.io
Cc: Bu, Daocheng ; Desimone, Nathaniel L 
; Gillispie, Thad ; 
Kinney, Michael D ; Lu, Shifei A 
; Oram, Isaac W ; Piwko, Maciej 
; Richardson, Brian ; Zhou, 
Bowen 
Subject: [edk2-platforms][PATCH V1 00/19] Remove Intel server packages

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2322
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2323
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2324
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2325

RFC:https://edk2.groups.io/g/devel/message/49360

This change implements a proposal sent in the RFC referenced above.

The current set of maintainers for these packages do not plan to
maintain the packages moving forward. Simply leaving the code as
unmaintained is undesirable for several reasons including presence
of build issues, functional issues, and lack of consistency with
other Intel platform/silicon code in design and usage. Some of
these issues already exist in these packages and will worsen over
time.

It is suggested that these be removed for the next stable tag due
to lack of recent testing.

Note: Some patches in this series were created to reduce overall
patch size during package removal.

Cc: Daocheng Bu 
Cc: Nate DeSimone 
Cc: Thad Gillispie 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Maciej Piwko 
Cc: Brian Richardson 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 

Michael Kubacki (19):
  Readme.md: Remove PurleyOpenBoardPkg
  Platform/Intel/build.cfg: Remove BoardMtOlympus
  PurleyOpenBoardPkg: Remove StructureConfig.dsc
  PurleyOpenBoardPkg: Remove package build files
  PurleyOpenBoardPkg/BoardMtOlympus: Remove all files
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove PlatformPciTree_WFP.asi
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove PCxx .asi files
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove .asi files
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove all files
  PurleyOpenBoardPkg: Remove all modules
  PurleyOpenBoardPkg: Remove all includes and libraries
  PurleyRcPkg: Remove the package
  PurleySktPkg: Remove the package
  LewisburgPkg: Remove DEC and DSC files
  LewisburgPkg/AcpiTables: Remove all files
  LewisburgPkg/Include/Register: Remove all files
  LewisburgPkg/Include: Remove all files
  LewisburgPkg: Remove all libraries
  Maintainers.txt: Update Intel package maintainers

 Platform/Intel/PurleyOpenBoardPkg/PlatPkg.dec  
  |  146 -
 Silicon/Intel/LewisburgPkg/PchRcPkg.dec
  |  226 -
 Silicon/Intel/PurleyRcPkg/RcPkg.dec
  |   90 -
 Silicon/Intel/PurleySktPkg/Override/IA32FamilyCpuPkg/IA32FamilyCpuPkg.dec  
  |  601 --
 Silicon/Intel/PurleySktPkg/SocketPkg.dec   
  |  110 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc   
  |  257 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgBuildOption.dsc
  |   81 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgConfig.dsc 
  |   62 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgPcd.dsc
  |  334 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/StructureConfig.dsc   
  | 6141 
---
 Silicon/Intel/LewisburgPkg/PchCommonLib.dsc
  |   19 -
 Silicon/Intel/LewisburgPkg/PchDxeLib.dsc   
  |   13 -
 Silicon/Intel/LewisburgPkg/PchPeiLib.dsc   
  |8 -
 Silicon/Intel/PurleyRcPkg/RcCommonLib.dsc  
  |   14 -
 Silicon/Intel/PurleyRcPkg/RcDxeLib.dsc 
  |   21 -
 Silicon/Intel/PurleyRcPkg/RcPeiLib.dsc 
  |8 -
 Silicon/Intel/PurleySktPkg/SktCommonLib.dsc 

[edk2-devel] [edk2-platforms][PATCH V1 05/19] PurleyOpenBoardPkg/BoardMtOlympus: Remove all files

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2322

The current set of maintainers do not plan to maintain this package
moving forward. Simply leaving the code as unmaintained is
undesirable for several reasons including presence of build issues,
functional issues, and lack of consistency with other Intel
platform/silicon code in design and usage.

It is suggested that these be removed for the next stable tag due
to lack of recent testing.

This change removes all files for BoardMtOlympus.

Cc: Nate DeSimone 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 
---
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BasePlatformHookLib/BasePlatformHookLib.inf
 |  38 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
   |  41 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.inf
  |  41 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
 |  38 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
  |  71 ---
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiMtOlympusInitLib.h
  |  17 -
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BasePlatformHookLib/BasePlatformHookLib.c
   | 294 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.c
 |  35 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeMtOlympusAcpiTableLib.c
 |  52 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmBoardAcpiEnableLib.c
|  61 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmMtOlympusAcpiEnableLib.c
|  36 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c
  | 119 
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/AllLanesEparam.c
   |  43 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/GpioTable.c
| 296 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/IioBifur.c
 |  88 ---
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiBoardInitPostMemLib.c
   |  45 --
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiBoardInitPreMemLib.c
| 111 
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiMtOlympusDetect.c
   |  27 -
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiMtOlympusInitPostMemLib.c
   |  85 ---
 
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/PeiMtOlympusInitPreMemLib.c
| 593 
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardInitLib/UsbOC.c  
  |  45 --
 21 files changed, 2176 deletions(-)

diff --git 
a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BasePlatformHookLib/BasePlatformHookLib.inf
 
b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BasePlatformHookLib/BasePlatformHookLib.inf
deleted file mode 100644
index d86a8f6cd0..00
--- 
a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BasePlatformHookLib/BasePlatformHookLib.inf
+++ /dev/null
@@ -1,38 +0,0 @@
-### @file
-#
-# Copyright (c) 2018, Intel Corporation. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
-  INF_VERSION= 0x00010017
-  BASE_NAME  = BasePlatformHookLib
-  FILE_GUID  = E22ADCC6-ED90-4A90-9837-C8E7FF9E963D
-  VERSION_STRING = 1.0
-  MODULE_TYPE= BASE
-  LIBRARY_CLASS  = PlatformHookLib
-#
-# The following information is for reference only and not required by the 
build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC
-#
-
-[LibraryClasses]
-  BaseLib
-  IoLib
-  PciLib
-
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  PurleyOpenBoardPkg/PlatPkg.dec
-  PurleySktPkg/SocketPkg.dec
-  LewisburgPkg/PchRcPkg.dec
-  PurleyRcPkg/RcPkg.dec
-
-[FixedPcd]
-
-[Sources]
-  BasePlatformHookLib.c
diff --git 
a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
 
b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
deleted file mode 100644
index d4f63fa7e1..00
--- 
a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
+++ /dev/null
@@ -1,41 +0,0 @@
-### @file
-#
-# Copyright (c) 2018, Intel Corporation. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
-  INF_VERSION= 0x00010017
-  BASE_NAME  

[edk2-devel] [edk2-platforms][PATCH V1 14/19] LewisburgPkg: Remove DEC and DSC files

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2325

The current set of maintainers do not plan to maintain this package
moving forward. Simply leaving the code as unmaintained is
undesirable for several reasons including presence of build issues,
functional issues, and lack of consistency with other Intel
platform/silicon code in design and usage.

It is suggested that these be removed for the next stable tag due
to lack of recent testing.

This change removes the DEC and DSC files in LewisburgPkg.

Cc: Bu, Daocheng 
Cc: Nate DeSimone 
Cc: Michael D Kinney 
Cc: Isaac W Oram 
Cc: Piwko, Maciej 
Signed-off-by: Michael Kubacki 
---
 Silicon/Intel/LewisburgPkg/PchRcPkg.dec | 226 
 Silicon/Intel/LewisburgPkg/PchCommonLib.dsc |  19 --
 Silicon/Intel/LewisburgPkg/PchDxeLib.dsc|  13 --
 Silicon/Intel/LewisburgPkg/PchPeiLib.dsc|   8 -
 4 files changed, 266 deletions(-)

diff --git a/Silicon/Intel/LewisburgPkg/PchRcPkg.dec 
b/Silicon/Intel/LewisburgPkg/PchRcPkg.dec
deleted file mode 100644
index 71f57dc2b8..00
--- a/Silicon/Intel/LewisburgPkg/PchRcPkg.dec
+++ /dev/null
@@ -1,226 +0,0 @@
-### @file
-#
-# Copyright (c) 2018, Intel Corporation. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
-  DEC_SPECIFICATION  = 0x00010005
-  PACKAGE_NAME   = PchRcPkg
-  PACKAGE_GUID   = 4E97AC4B-F64C-4008-BBDE-01CC3B0BAA6B
-  PACKAGE_VERSION= 0.91
-
-[Includes]
-  Include
-  IncludePrivate
-  AcpiTables/Dsdt
-
-[Ppis]
-  #
-  # PCH
-  #
-  gPchPmcXramOffsetDataPpiGuid = { 0xc1392859, 0x1f65, 0x446e, { 0xa3, 0xf6, 
0x85, 0x36, 0xfc, 0xc7, 0xd1, 0xc4 }}
-
-[LibraryClasses]
-
-[LibraryClasses.IA32]
-
-[Guids]
-  gRcPkgTokenSpaceGuid= { 0x86cf2b1a, 0xb3da, 0x4642, { 0x95, 
0xf5, 0xd0, 0x1c, 0x6c, 0x1c, 0x60, 0xb8 }}
-  gEfiPchTokenSpaceGuid = { 0x89a1b278, 0xa1a1, 0x4df7, { 0xb1, 0x37, 0xde, 
0x5a, 0xd7, 0xc4, 0x79, 0x13 } }
-  gSataControllerDriverGuid = { 0xbb929da9, 0x68f7, 0x4035, { 0xb2, 0x2c, 
0xa3, 0xbb, 0x3f, 0x23, 0xda, 0x55 }}
-  gPchInitVariableGuid = { 0xe6c2f70a, 0xb604, 0x4877, { 0x85, 0xba, 0xde, 
0xec, 0x89, 0xe1, 0x17, 0xeb }}
-  gPchS3ImageGuid = { 0x271dd6f2, 0x54cb, 0x45e6, { 0x85, 0x85, 0x8c, 0x92, 
0x3c, 0x1a, 0xc7, 0x6 }}
-  gEfiSmbusArpMapGuid = { 0x707be83e, 0x0bf6, 0x40a5, { 0xbe, 0x64, 0x34, 
0xc0, 0x3a, 0xa0, 0xb8, 0xe2 }}
-  mPchSataRsteProtocolGuid = { 0x3ea94650, 0xfc5b, 0x11e1, {0xa2, 0x1f, 0x08, 
0x00, 0x20, 0x0c, 0x9a, 0x66}}
-  mPchSataRstProtocolGuid = { 0xfc5f2e00, 0xfc68, 0x11e1, {0xa2, 0x1f, 0x08, 
0x00, 0x20, 0x0c, 0x9a, 0x66}}
-  gPchInitPeiVariableGuid = { 0xa31b27a4, 0xcae6, 0x48ff, {0x8c, 0x5a, 0x29, 
0x42, 0x21, 0xe6, 0xf3, 0x89 }}
-  gChipsetInitInfoHobGuid = { 0xc1392859, 0x1f65, 0x446e, {0xb3, 0xf5, 0x84, 
0x35, 0xfc, 0xc7, 0xd1, 0xc4}}
-  gPchOemSmmGuid = { 0xc0cfaf36, 0x4296, 0x40ba, {0xa9, 0xf1, 0x77, 0x10, 
0x9b, 0x91, 0xce, 0x19}}
-  gPchPowerCycleResetGuid  =  { 0x8d8ee25b, 0x66dd, 0x4ed8, { 0x8a, 0xbd, 
0x14, 0x16, 0xe8, 0x8e, 0x1d, 0x24 }}
-  gPchGlobalResetGuid  =  { 0x9db31b4c, 0xf5ef, 0x48bb, { 0x94, 0x2b, 0x18, 
0x1f, 0x7e, 0x3a, 0x3e, 0x40 }}
-  gPchGlobalResetWithEcGuid  =  { 0xd22e6b72, 0x53cd, 0x4158, { 0x83, 0x3f, 
0x6f, 0xd8, 0x7e, 0xbe, 0xa9, 0x93 }}
-#S3 add
-  gPchS3CodeInLockBoxGuid   =  { 0x1f18c5b3, 0x29ed, 0x4d9e, {0xa5, 0x4, 0x6d, 
0x97, 0x8e, 0x7e, 0xd5, 0x69}}
-  gPchS3ContextInLockBoxGuid = { 0xe5769ea9, 0xe706, 0x454b, {0x95, 0x7f, 
0xaf, 0xc6, 0xdb, 0x4b, 0x8a, 0xd}}
-#S3 add
-  gMeBiosExtensionSetupGuid  = { 0x1bad711c, 0xd451, 0x4241, { 0xb1, 0xf3, 
0x85, 0x37, 0x81, 0x2e, 0xc, 0x70 } }
-  gAmtForcePushPetPolicyGuid = { 0xacc8e1e4, 0x9f9f, 0x4e40, { 0xa5, 0x7e, 
0xf9, 0x9e, 0x52, 0xf3, 0x4c, 0xa5 } }
-  gEfiAcpiVariableGuid   = { 0xc020489e, 0x6db2, 0x4ef2,{ 0x9a, 0xa5, 
0xca, 0x6, 0xfc, 0x11, 0xd3, 0x6a } }
-  gEfiCommonPkgTokenSpaceGuid= { 0x86cf2b1a, 0xb3da, 0x4642, { 0x95, 0xf5, 
0xd0, 0x1c, 0x6c, 0x1c, 0x60, 0xb8 }}
-  gSiPolicyHobGuid   = { 0xb3903068, 0x7482, 0x4424, { 0xba, 0x4b, 
0x40, 0x5f, 0x8f, 0xd7, 0x65, 0x4e }}
-  gEfiPchTokenSpaceGuid= { 0x977c97c1, 0x47e1, 0x4b6b, { 0x96, 0x69, 
0x43, 0x66, 0x99, 0xcb, 0xe4, 0x5b }}
-  gPchPolicyHobGuid= { 0x524ed3ca, 0xb250, 0x49f5, { 0x94, 0xd9, 
0xa2, 0xba, 0xff, 0xc7, 0x0e, 0x14 }}
-  gPchDeviceTableHobGuid   = { 0xb3e123d0, 0x7a1e, 0x4db4, { 0xaf, 0x66, 
0xbe, 0xd4, 0x1e, 0x9c, 0x66, 0x38 }}
-  gPchChipsetInitHobGuid   = { 0xc1392859, 0x1f65, 0x446e, { 0xb3, 0xf5, 
0x84, 0x35, 0xfc, 0xc7, 0xd1, 0xc4 }}
-  gWdtHobGuid  = { 0x65675786, 0xacca, 0x4b11, { 0x8a, 0xb7, 
0xf8, 0x43, 0xaa, 0x2a, 0x8b, 0xea }}
- # PCH_SERVER_BIOS_FLAG add
-  gPchPsfErrorHobGuid  = { 0x9ee875f4, 0xa463, 0x4b29, { 0x88, 
0x79, 0x11, 0x2a, 0x4d, 0x05, 0x47, 0x7f }} #PCH_SERVER_BIOS_FLAG  
-
-##
-## PreMem Performance
-##
-  gPerfPchPrePolicyGuid = {0x3112356F, 0xCC77, 0x4E82, 

[edk2-devel] [edk2-platforms][PATCH V1 08/19] PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove .asi files

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2322

The current set of maintainers do not plan to maintain this package
moving forward. Simply leaving the code as unmaintained is
undesirable for several reasons including presence of build issues,
functional issues, and lack of consistency with other Intel
platform/silicon code in design and usage.

It is suggested that these be removed for the next stable tag due
to lack of recent testing.

This change removes all remaining .asi files used by the module
BoardAcpiDxe in PurleyOpenBoardPkg.

Cc: Nate DeSimone 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/CommonPlatform.asi | 
227 --
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Mother.asi | 
202 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Os.asi | 
145 
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Pch.asi|  
10 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchApic.asi|  
17 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchEhci1.asi   |  
91 ---
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchEhci2.asi   |  
92 ---
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchLpc.asi |  
22 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchSata.asi| 
807 
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PchXhci.asi| 
329 
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PciCrs.asi | 
312 
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PciIrq.asi | 
455 ---
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PcieHp.asi | 
644 
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PcieHpDev.asi  |  
14 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PcieNonHpDev.asi   |  
16 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PcieSeg.asi| 
355 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/PlatformGpe.asi|  
78 --
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Sck1Ejd.asi|  
 9 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Sck2Ejd.asi|  
 9 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Sck3Ejd.asi|  
 9 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Uncore0.asi|  
33 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Uncore1.asi| 
175 -
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Uncore2.asi| 
125 ---
 Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Uncore3.asi|  
98 ---
 24 files changed, 4274 deletions(-)

diff --git 
a/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/CommonPlatform.asi 
b/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/CommonPlatform.asi
deleted file mode 100644
index f5317cff86..00
--- 
a/Platform/Intel/PurleyOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/CommonPlatform.asi
+++ /dev/null
@@ -1,227 +0,0 @@
-/** @file
-
-Copyright (c) 2018, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "MaxSocket.h"
-
-  //
-  // External declarations
-  // HECI-1/HECI-2 are in PurleyPlatPkg\Me\Sps\Acpi\SpsNm.asl
-  //
-  External(\_SB.PC00.HEC2.HPTS, MethodObj)
-  External(\_SB.PC00.HEC2.HWAK, MethodObj)
-  
-  //
-  // System Sleep States
-  //
-  Name (\_S0,Package (){0,0,0,0})
-  Name (\_S3,Package (){5,0,0,0})   // Name changed to \DS3 if disabled in 
Setup
-  Name (\_S4,Package (){6,0,0,0})   // Name changed to \DS4 if disabled in 
Setup
-  Name (\_S5,Package (){7,0,0,0})
-  
-  //
-  // Native OS hot plug support, 0->ACPI, 1->OS 
-  //
-  Name (\OSHF, 0)
-
-  //
-  // OS flag
-  //
-  #include "Os.asi"
-
-  //
-  // for determing PIC mode
-  //
-  Name (\PICM,Zero)
-  Method (\_PIC, 1, NotSerialized) {
-Store(Arg0,\PICM)
-  }
-
-  OperationRegion (DBG0, SystemIO, 0x80, 2)
-  Field (DBG0, ByteAcc,NoLock,Preserve) {
-IO80, 8,
-IO81, 8
-  }
-
-  //
-  // Access CMOS range
-  //
-  OperationRegion (ACMS, SystemIO, 0x72, 2)
-  Field ( ACMS, ByteAcc, NoLock, Preserve) {
-INDX, 8,
-DATA, 8
-  }
-
-  // 
-  // SWGPE_CTRL
-  //
-  OperationRegion (GPCT, SystemIO, 0x442, 1)
-  Field ( GPCT, ByteAcc, NoLock, Preserve) {
-  ,   1,
-SGPC  ,   1,
-  }
-
-  // 
-  // GPI_INV
-  //
-  OperationRegion (GPIV, SystemIO, 0x52c, 2)
-  Field ( GPIV, ByteAcc, NoLock, Preserve) {
-GP0I  ,   1,
-  }
-
-#include "Acpi/GlobalNvs.asi"
-
-  //
-  // Operation region for GPI status bits
-  //
-  OperationRegion (GSTS, SystemIO, 0x422, 2)
-  Field ( GSTS, ByteAcc, NoLock, Preserve) {
-GP00  , 1,
-  , 12,
-GP13  , 1,
-  }
-
-  //
-  // GPE0 HOT_PLUG_EN
-  //
-  OperationRegion (GPE0, SystemIO,

[edk2-devel] [edk2-platforms][PATCH V1 11/19] PurleyOpenBoardPkg: Remove all includes and libraries

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2322

The current set of maintainers do not plan to maintain this package
moving forward. Simply leaving the code as unmaintained is
undesirable for several reasons including presence of build issues,
functional issues, and lack of consistency with other Intel
platform/silicon code in design and usage.

It is suggested that these be removed for the next stable tag due
to lack of recent testing.

This change removes all the include files and libraries presently
in PurleyOpenBoardPkg.

Cc: Nate DeSimone 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 
---
 
Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf
   |  40 --
 
Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiPlatformHookLib/IpmiPlatformHookLib.inf
 |  29 -
 
Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyInitLib/SiliconPolicyInitLib.inf
  |  41 --
 
Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.inf
  |  56 --
 Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/KcsBmc.h
 | 208 --
 Platform/Intel/PurleyOpenBoardPkg/Include/Acpi/GlobalNvsAreaDef.h  
 | 128 
 Platform/Intel/PurleyOpenBoardPkg/Include/Guid/PchRcVariable.h 
 | 414 
 Platform/Intel/PurleyOpenBoardPkg/Include/Guid/SetupVariable.h 
 | 539 
 Platform/Intel/PurleyOpenBoardPkg/Include/IioBifurcationSlotTable.h
 | 100 ---
 Platform/Intel/PurleyOpenBoardPkg/Include/Platform.h   
 |  92 ---
 Platform/Intel/PurleyOpenBoardPkg/Include/Ppi/SystemBoard.h
 |  63 --
 Platform/Intel/PurleyOpenBoardPkg/Include/Protocol/PciIovPlatform.h
 |  70 ---
 Platform/Intel/PurleyOpenBoardPkg/Include/SetupTable.h 
 |  21 -
 Platform/Intel/PurleyOpenBoardPkg/Include/SioRegs.h
 |  35 --
 
Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/IpmiLibKcs.c 
| 362 ---
 Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/KcsBmc.c
 | 485 --
 
Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiPlatformHookLib/IpmiPlatformHookLib.c
   |  39 --
 
Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyInitLib/SiliconPolicyInitLib.c
| 130 
 
Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyUpdateLib/PchPolicyUpdateUsb.c
|  99 ---
 
Platform/Intel/PurleyOpenBoardPkg/Policy/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.c
| 659 
 Platform/Intel/PurleyOpenBoardPkg/Include/Acpi/GlobalNvs.asi   
 | 282 -
 21 files changed, 3892 deletions(-)

diff --git 
a/Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf
 
b/Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf
deleted file mode 100644
index f46a8fcac6..00
--- 
a/Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiLibKcs/IpmiLibKcs.inf
+++ /dev/null
@@ -1,40 +0,0 @@
-### @file
-# Component description file for IPMI KCS Library.
-#
-# Copyright (c) 2018, Intel Corporation. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
-  INF_VERSION= 0x00010005
-  BASE_NAME  = IpmiLibKcs
-  FILE_GUID  = 9879DB3A-C2CD-4615-ACDA-95C1B2EC00B3
-  MODULE_TYPE= UEFI_DRIVER
-  VERSION_STRING = 1.0
-  LIBRARY_CLASS  = IpmiLib
-
-[sources]
-  IpmiLibKcs.c
-  KcsBmc.c
-  
-[Packages]
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-  AdvancedFeaturePkg/AdvancedFeaturePkg.dec
-  PurleyOpenBoardPkg/PlatPkg.dec
-
-[LibraryClasses]
-  BaseMemoryLib
-  DebugLib
-  HobLib
-  PcdLib
-  TimerLib
-  IoLib
-  IpmiPlatformHookLib
-
-[Pcd]
-  gEfiIpmiPkgTokenSpaceGuid.PcdIpmiKcsTimeoutPeriod
-  gEfiIpmiPkgTokenSpaceGuid.PcdIpmiBmcSlaveAddress
-  gAdvancedFeaturePkgTokenSpaceGuid.PcdIpmiIoBaseAddress
\ No newline at end of file
diff --git 
a/Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiPlatformHookLib/IpmiPlatformHookLib.inf
 
b/Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiPlatformHookLib/IpmiPlatformHookLib.inf
deleted file mode 100644
index 4047130b3d..00
--- 
a/Platform/Intel/PurleyOpenBoardPkg/Features/Ipmi/Library/IpmiPlatformHookLib/IpmiPlatformHookLib.inf
+++ /dev/null
@@ -1,29 +0,0 @@
-### @file
-# Component description file for IPMI platform hook Library.
-#
-# Copyright (c) 2018, Inte

[edk2-devel] [edk2-platforms][PATCH V1 04/19] PurleyOpenBoardPkg: Remove package build files

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2322

The current set of maintainers do not plan to maintain this package
moving forward. Simply leaving the code as unmaintained is
undesirable for several reasons including presence of build issues,
functional issues, and lack of consistency with other Intel
platform/silicon code in design and usage.

It is suggested that these be removed for the next stable tag due
to lack of recent testing.

This change removes files related to the overall package build and
description. These include the package DEC file, build scripts
(both batch and python), DSC files, and the package FDF file.

Cc: Nate DeSimone 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/PurleyOpenBoardPkg/PlatPkg.dec   | 
146 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc| 
257 
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgBuildOption.dsc |  
81 ---
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgConfig.dsc  |  
62 --
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgPcd.dsc | 
334 ---
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.fdf| 
634 
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/GitEdk2MinMtOlympus.bat|  
74 ---
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/bld.bat| 
138 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_board.py | 
177 --
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_config.cfg   |  
32 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/logo.txt   |  
11 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/postbuild.bat  |  
95 ---
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/prebuild.bat   | 
197 --
 13 files changed, 2238 deletions(-)

diff --git a/Platform/Intel/PurleyOpenBoardPkg/PlatPkg.dec 
b/Platform/Intel/PurleyOpenBoardPkg/PlatPkg.dec
deleted file mode 100644
index 5fc4de6f24..00
--- a/Platform/Intel/PurleyOpenBoardPkg/PlatPkg.dec
+++ /dev/null
@@ -1,146 +0,0 @@
-### @file
-#
-# Copyright (c) 2018, Intel Corporation. All rights reserved.
-#
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-###
-
-[Defines]
-  DEC_SPECIFICATION  = 0x00010005
-  PACKAGE_NAME   = PlatPkg
-  PACKAGE_GUID   = 454FB726-6A01-49ce-B222-749CD093D3C5
-  PACKAGE_VERSION= 0.91
-
-[Includes]
-  Include
-
-[Guids]
-  gEfiMemoryConfigDataGuid= { 0x80dbd530, 0xb74c, 
0x4f11, { 0x8c, 0x03, 0x41, 0x86, 0x65, 0x53, 0x28, 0x31 } }
-  gCpPlatFlashTokenSpaceGuid  = { 0xc9c39664, 0x96dd, 
0x4c5c, { 0xaf, 0xd7, 0xcd, 0x65, 0x76, 0x29, 0xcf, 0xb0 } }
-  gOemSkuTokenSpaceGuid   = { 0x9e37d253, 0xabf8, 
0x4985, { 0x8e, 0x23, 0xba, 0xca, 0x10, 0x39, 0x56, 0x13 } }
-  gEfiIpmiPkgTokenSpaceGuid   = { 0xe96431d, 0xc68e, 
0x4212, { 0xa1, 0x70, 0x16, 0xa6, 0x8, 0x55, 0x12, 0xc6 } }
-  gPlatformTokenSpaceGuid = { 0x07dfa0d2, 0x2ac5, 
0x4cab, { 0xac, 0x14, 0x30, 0x5c, 0x62, 0x48, 0x87, 0xe4 } }
-
-[Ppis]
-  gEfiPeiSystemBoardPpiGuid   = { 0xc8d85e8c, 0xdc1c, 
0x4f8c, { 0xad, 0xa7, 0x58, 0xc1, 0xd1, 0x07, 0xa3, 0x04 } }
-  gEfiSiliconRcHobsReadyPpi   = { 0xecf149b5, 0xbf4e, 
0x4ac8, { 0x8a, 0x8c, 0xce, 0x87, 0xcb, 0xac, 0x93, 0xd3 } }
-
-[Protocols]
-  gEfiPciIovPlatformProtocolGuid  = { 0xf3a4b484, 0x9b26, 
0x4eea, { 0x90, 0xe5, 0xa2, 0x06, 0x54, 0x0c, 0xa5, 0x25 } }
-  gEfiDxeSystemBoardProtocolGuid  = { 0xa57c1118, 0x6afc, 
0x46d2, { 0xba, 0xe6, 0x92, 0x92, 0x62, 0xd3, 0xeb, 0x1e } }
-
-[PcdsFixedAtBuild]
-
-  gPlatformTokenSpaceGuid.PcdCmosDebugPrintLevelReg|0x4C|UINT8|0x3032
-
-  # Choose the default serial debug message level when CMOS is bad; in the 
later BIOS phase, the setup default is applied
-  # 0 - Disable; 1 - Minimum; 2 - Normal; 3 - Max
-  gPlatformTokenSpaceGuid.PcdSerialDbgLvlAtBadCmos|0x1|UINT8|0x3033
-
-[PcdsFeatureFlag]
-  gPlatformTokenSpaceGuid.PcdFastBoot|FALSE|BOOLEAN|0x3034
-
-  gPlatformTokenSpaceGuid.PcdUpdateConsoleInBds|TRUE|BOOLEAN|0x3035
-
-[PcdsDynamicEx]
-  gPlatformTokenSpaceGuid.PcdDfxAdvDebugJumper|FALSE|BOOLEAN|0x601D
-
-  ## This value is used to save memory address of MRC data structure.
-  gPlatformTokenSpaceGuid.PcdSyshostMemoryAddress|0x|UINT64|0x3040
-
-  gOemSkuTokenSpaceGuid.PcdForceTo1SConfigMode|FALSE|BOOLEAN|0x0205
-
-  gOemSkuTokenSpaceGuid.PcdAcpiGnvsAddress|0|UINT64|0x0206
-
-  gOemSkuTokenSpaceGuid.PcdOemSkuUplinkPortIndex|0xFF|UINT8|0x0207
-
-  gOemSkuTokenSpaceGuid.PcdMemTsegSize|0x0|UINT32|0x0208
-  gOemSkuTokenSpaceGuid.PcdMemIedSize|0x0|UINT32

[edk2-devel] [edk2-platforms][PATCH V1 19/19] Maintainers.txt: Update Intel package maintainers

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2325

Due to some Intel packages being removed, this change removes the
corresponding packages from Maintainers.txt.

Cc: Bu, Daocheng 
Cc: Nate DeSimone 
Cc: Gillispie, Thad 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Piwko, Maciej 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 
---
 Maintainers.txt | 20 
 1 file changed, 20 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt
index 1260c8d246..9599024e20 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -96,11 +96,6 @@ M: Chasel Chiu 
 M: Nate DeSimone 
 R: Liming Gao 
 
-Platform/Intel/PurleyOpenBoardPkg
-M: Shifei A Lu 
-M: Xiaohu Zhou 
-M: Isaac W Oram 
-
 Platform/Intel/WhiskeylakeOpenBoardPkg
 M: Chasel Chiu 
 M: Michael Kubacki 
@@ -147,21 +142,6 @@ M: Chasel Chiu 
 M: Michael Kubacki 
 M: Sai Chaganty 
 
-Silicon/Intel/LewisburgPkg
-M: Piwko, Maciej 
-M: Bu, Daocheng 
-M: Oram, Isaac W 
-
-Silicon/Intel/PurleyRcPkg
-M: Gillispie, Thad 
-M: Bu, Daocheng 
-M: Oram, Isaac W 
-
-Silicon/Intel/PurleySktPkg
-M: Gillispie, Thad 
-M: Bu, Daocheng 
-M: Oram, Isaac W 
-
 Silicon/Intel/SimicsX58SktPkg
 M: Wei David Y 
 M: Agyeman Prince 
-- 
2.16.2.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49862): https://edk2.groups.io/g/devel/message/49862
Mute This Topic: https://groups.io/mt/40498683/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [edk2-platforms][PATCH V1 02/19] Platform/Intel/build.cfg: Remove BoardMtOlympus

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2322

Removes the BoardMtOlympus build configuration from build.cfg as
the package will be removed in a future change.

Cc: Nate DeSimone 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/build.cfg | 1 -
 1 file changed, 1 deletion(-)

diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg
index 6aee96694c..e42db243f6 100644
--- a/Platform/Intel/build.cfg
+++ b/Platform/Intel/build.cfg
@@ -53,7 +53,6 @@ BIOS_INFO_GUID =
 
 [PLATFORMS]
 # board_name = path_to_board_build_config.cfg
-BoardMtOlympus = PurleyOpenBoardPkg/BoardMtOlympus/build_config.cfg
 BoardX58Ich10 = SimicsOpenBoardPkg/BoardX58Ich10/build_config.cfg
 GalagoPro3 = KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
 KabylakeRvp3 = KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
-- 
2.16.2.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49845): https://edk2.groups.io/g/devel/message/49845
Mute This Topic: https://groups.io/mt/40498528/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [edk2-platforms][PATCH V1 01/19] Readme.md: Remove PurleyOpenBoardPkg

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2322

Removes all references to PurleyOpenBoardPkg in Readme.md files in
edk2-platforms as the package will be removed in a future change.

Cc: Nate DeSimone 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 
---
 Platform/Intel/Readme.md | 36 
 Readme.md|  1 -
 2 files changed, 37 deletions(-)

diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md
index 03fa4c2315..0f86978fee 100644
--- a/Platform/Intel/Readme.md
+++ b/Platform/Intel/Readme.md
@@ -54,7 +54,6 @@ A UEFI firmware implementation using MinPlatformPkg is 
constructed using the fol
 
 ## Board Support
 * The `KabylakeOpenBoardPkg` contains board implementations for Kaby Lake 
systems.
-* The `PurleyOpenBoardPkg` contains board implementations for Purley systems.
 * The `SimicsOpenBoardPkg` contains board implementations for the Simics 
hardware simulator.
 * The `WhiskeylakeOpenBoardPkg` contains board implementations for Whiskey 
Lake systems.
 
@@ -71,12 +70,6 @@ A UEFI firmware implementation using MinPlatformPkg is 
constructed using the fol
 
 *Note: RVP = Reference and Validation Platform*
 
- Microsoft
-
-| Machine Name  | Supported Chipsets   
  | BoardPkg | Board Name |
-||--||
-| Mt. Olympus   | Purley   
  | PurleyOpenBoardPkg   | BoardMtOlympus |
-
  Simics
 
 | Machine Name  | Supported Chipsets   
  | BoardPkg | Board Name |
@@ -235,13 +228,6 @@ return back to the minimum platform caller.
   |   ||   |---build_board.py: Optional 
board-specific pre-build, build
   |   ||   and clean 
post-build functions.
   |   ||
-  |   ||--PurleyOpenBoardPkg
-  |   ||   |--BoardMtOlympus
-  |   ||   |---build_config.cfg: 
BoardMtOlympus specific
-  |   ||   | build 
settings, environment variables.
-  |   ||   |---build_board.py: Optional 
board-specific pre-build,
-  |   ||   build, 
post-build and clean functions.
-  |   ||
   |   ||--SimicsOpenBoardPkg
   |   ||   |--BoardX58Ich10
   |   ||   |---build_config.cfg: BoardX58Ich10 
specific
@@ -255,23 +241,6 @@ return back to the minimum platform caller.
   |--FSP
   
 
-**Building with the batch scripts**
-
-Only PurleyOpenBoardPkg still supports batch script build. Future board 
packages must only use the Python build
-infrastructure.
-
-For PurleyOpenBoardPkg
-1. Open command window, go to the workspace directory, e.g. c:\Edk2Workspace.
-2. Type "cd edk2-platforms\Platform\Intel\PurleyOpenBoardPkg\BoardMtOlympus".
-3. Type "GitEdk2MinMtOlympus.bat" to setup GIT environment.
-4. Type "bld" to build Purley Mt Olympus board UEFI firmware image, "bld 
release" for release build, "bld clean" to
-   remove intermediate files."bld cache-produce" Generate a cache of binary 
files in the specified directory,
-   "bld cache-consume" Consume a cache of binary files from the specified 
directory, BINARY_CACHE_PATH is empty,
-   used "BinCache" as default path.
-
-The validated version of iASL compiler that can build MinPurley is 20180629. 
Older version may generate ACPI build
-errors.
-
 ### **Known limitations**
 
 **KabylakeOpenBoardPkg**
@@ -282,11 +251,6 @@ errors.
 1. This firmware project has only been tested for Microsoft Windows 10 x64 
boot with AHCI mode and Integrated Graphic
Device.
 
-**PurleyOpenBoardPkg**
-1. This firmware project has only been tested booting to Microsoft Windows 
Server 2016 with NVME on M.2 slot.
-2. This firmware project does not build with the GCC compiler.
-3. This firmware project does not build with the Python build script 
infrastructure.
-
 **SimicsOpenBoardPkg**
 1. This firmware project has only been tested booting to Microsoft Windows 10 
x64 and Ubuntu 17.10 with AHCI mode.
 
diff --git a/Readme.md b/Readme.md
index 2b54b8e0b4..54be226f4c 100644
--- a/Readme.md
+++ b/Readme.md
@@ -226,7 +226,6 @@ they will be documented with the platform.
 ## Intel
 ### [Minimum Platforms](Platform/Intel/Readme.md)
 * [Kaby Lake](Platform/Intel/KabylakeOpenBoardPkg)
-* [Purley](Platform/Intel/PurleyOpenBoardPkg)
 * [Simics](Platform/Intel/SimicsOpenBoardPkg)
 * [Whiskey Lake](Platform/Intel/WhiskeylakeOpenBoardPkg)
 
-- 
2.16.2.windows.1


-=-=

[edk2-devel] [edk2-platforms][PATCH V1 00/19] Remove Intel server packages

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2322
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2323
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2324
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2325

RFC:https://edk2.groups.io/g/devel/message/49360

This change implements a proposal sent in the RFC referenced above.

The current set of maintainers for these packages do not plan to
maintain the packages moving forward. Simply leaving the code as
unmaintained is undesirable for several reasons including presence
of build issues, functional issues, and lack of consistency with
other Intel platform/silicon code in design and usage. Some of
these issues already exist in these packages and will worsen over
time.

It is suggested that these be removed for the next stable tag due
to lack of recent testing.

Note: Some patches in this series were created to reduce overall
patch size during package removal.

Cc: Daocheng Bu 
Cc: Nate DeSimone 
Cc: Thad Gillispie 
Cc: Michael D Kinney 
Cc: Shifei A Lu 
Cc: Isaac W Oram 
Cc: Maciej Piwko 
Cc: Brian Richardson 
Cc: Xiaohu Zhou 
Signed-off-by: Michael Kubacki 

Michael Kubacki (19):
  Readme.md: Remove PurleyOpenBoardPkg
  Platform/Intel/build.cfg: Remove BoardMtOlympus
  PurleyOpenBoardPkg: Remove StructureConfig.dsc
  PurleyOpenBoardPkg: Remove package build files
  PurleyOpenBoardPkg/BoardMtOlympus: Remove all files
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove PlatformPciTree_WFP.asi
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove PCxx .asi files
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove .asi files
  PurleyOpenBoardPkg/Acpi/BoardAcpiDxe: Remove all files
  PurleyOpenBoardPkg: Remove all modules
  PurleyOpenBoardPkg: Remove all includes and libraries
  PurleyRcPkg: Remove the package
  PurleySktPkg: Remove the package
  LewisburgPkg: Remove DEC and DSC files
  LewisburgPkg/AcpiTables: Remove all files
  LewisburgPkg/Include/Register: Remove all files
  LewisburgPkg/Include: Remove all files
  LewisburgPkg: Remove all libraries
  Maintainers.txt: Update Intel package maintainers

 Platform/Intel/PurleyOpenBoardPkg/PlatPkg.dec  
  |  146 -
 Silicon/Intel/LewisburgPkg/PchRcPkg.dec
  |  226 -
 Silicon/Intel/PurleyRcPkg/RcPkg.dec
  |   90 -
 Silicon/Intel/PurleySktPkg/Override/IA32FamilyCpuPkg/IA32FamilyCpuPkg.dec  
  |  601 --
 Silicon/Intel/PurleySktPkg/SocketPkg.dec   
  |  110 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc   
  |  257 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgBuildOption.dsc
  |   81 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgConfig.dsc 
  |   62 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkgPcd.dsc
  |  334 -
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/StructureConfig.dsc   
  | 6141 
---
 Silicon/Intel/LewisburgPkg/PchCommonLib.dsc
  |   19 -
 Silicon/Intel/LewisburgPkg/PchDxeLib.dsc   
  |   13 -
 Silicon/Intel/LewisburgPkg/PchPeiLib.dsc   
  |8 -
 Silicon/Intel/PurleyRcPkg/RcCommonLib.dsc  
  |   14 -
 Silicon/Intel/PurleyRcPkg/RcDxeLib.dsc 
  |   21 -
 Silicon/Intel/PurleyRcPkg/RcPeiLib.dsc 
  |8 -
 Silicon/Intel/PurleySktPkg/SktCommonLib.dsc
  |9 -
 Silicon/Intel/PurleySktPkg/SktDxeLib.dsc   
  |   10 -
 Silicon/Intel/PurleySktPkg/SktPeiLib.dsc   
  |   12 -
 Platform/I

[edk2-devel] [edk2-platforms] [PATCH 4/5] KabylakeOpenBoardPkg: Add Ps2 keyboard Null Library

[Agyeman, Prince]

Added GalagoPro3 board ps2 keyboard library
that adds ps2 device path to ConIn and ConInDev
Uefi variables

Cc: Michael Kubacki 
Cc: Chasel Chiu 
Cc: Nate DeSimone 

Signed-off-by: Prince Agyeman 
---
 .../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c  | 202 ++
 .../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h  |  65 ++
 .../Library/Ps2KbcLib/Ps2KbcLib.inf   |  39 
 3 files changed, 306 insertions(+)
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.inf

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
new file mode 100644
index 00..ac1563d3cd
--- /dev/null
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
@@ -0,0 +1,202 @@
+/** @file
+  Main file for NULL named library for Ps2 keyboard controller librarr.
+
+  Copyright (c) 2019, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "Ps2KbcLib.h"
+
+GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_KEYBOARD_DEVICE_PATH  
gKeyboardDevicePath = {
+  gPciRootBridge,
+  {
+{
+  HARDWARE_DEVICE_PATH,
+  HW_PCI_DP,
+  {
+(UINT8) (sizeof (PCI_DEVICE_PATH)),
+(UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8)
+  }
+},
+0, // Function, patched in EnumPs2Keyboard
+0  // Device, patched in EnumPs2Keyboard
+  },
+  {
+{
+  ACPI_DEVICE_PATH,
+  ACPI_DP,
+  {
+(UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
+(UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
+  }
+},
+EISA_PNP_ID(0x0303),
+0
+  },
+  gEndEntire
+};
+
+/**
+  Check if PS2 keyboard is conntected, by sending ECHO command.
+  @retval   TRUE if connected FALSE otherwise
+**/
+BOOLEAN
+DetectPs2Keyboard (
+  VOID
+  )
+{
+  UINT32TimeOut;
+  UINT32RegEmptied;
+  UINT8 Data;
+  UINT32SumTimeOut;
+  BOOLEAN   FoundPs2Kbc;
+
+  TimeOut = 0;
+  RegEmptied  = 0;
+  FoundPs2Kbc   = FALSE;
+
+  //
+  // Wait for input buffer empty
+  //
+  for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30) {
+if ((IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x02) == 0) {
+  FoundPs2Kbc = TRUE;
+  break;
+}
+MicroSecondDelay (30);
+  }
+
+  if (FoundPs2Kbc == FALSE) {
+return FALSE;
+  }
+
+  //
+  // Send echo command
+  //
+  IoWrite8 (KEYBOARD_8042_DATA_REGISTER, KBC_INPBUF_VIA60_KBECHO);
+
+  //
+  // Init variables
+  //
+  FoundPs2Kbc   = FALSE;
+  TimeOut = 0;
+  SumTimeOut  = 0;
+  Data = 0;
+
+  //
+  // Read from 8042 (multiple times if needed)
+  // until the expected value appears
+  // use SumTimeOut to control the iteration
+  //
+  while (1) {
+//
+// Perform a read
+//
+for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30) {
+  if (IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x01) {
+Data = IoRead8 (KEYBOARD_8042_DATA_REGISTER);
+break;
+  }
+  MicroSecondDelay (30);
+}
+
+SumTimeOut += TimeOut;
+
+if (Data == KBC_INPBUF_VIA60_KBECHO) {
+  FoundPs2Kbc = TRUE;
+  break;
+}
+
+if (SumTimeOut >= PS2_KEYBOARD_WAITFORVALUE_TIMEOUT) {
+  break;
+}
+  }
+  return FoundPs2Kbc;
+}
+
+/**
+  Check if PS2 keyboard is conntected. If the result of first time is
+  error, it will retry again.
+  @retval   TRUE if connected FALSE otherwise
+**/
+BOOLEAN
+IsPs2KeyboardConnected (
+  VOID
+  )
+{
+  BOOLEAN Result;
+  Result = DetectPs2Keyboard ();
+
+  if (Result == FALSE) {
+//
+// If there is no ps2 keyboard detected for the 1st time, retry again.
+//
+Result = DetectPs2Keyboard ();
+  }
+  return Result;
+}
+
+
+/**
+  Updates the ConIn variable with Ps2 Keyboard device path,
+  if it doesn't already exists in ConIn and ConInDev
+**/
+VOID
+AddPs2Keyboard (
+  VOID
+  )
+{
+  SIO_PCI_ISA_BRIDGE_DEVICE_INFO *SioIsaInfo;
+
+  DEBUG ((DEBUG_INFO, "[AddPs2Keyboard]\n"));
+
+  SioIsaInfo = (SIO_PCI_ISA_BRIDGE_DEVICE_INFO*) FixedPcdGetPtr 
(PcdSuperIoPciIsaBridgeDevice);
+
+  //
+  // patch IsaBridge device and and function
+  //
+  gKeyboardDevicePath.IsaBridge.Device = SioIsaInfo->Device;
+  gKeyboardDevicePath.IsaBridge.Function = SioIsaInfo->Funtion;
+
+  //
+  // Append Ps2 Keyboard into "ConIn"
+  //
+  EfiBootManagerUpdateConsoleVariable (ConIn, (EFI_DEVICE_PATH_PROTOCOL *) 
&gKeyboardDevicePath, NULL);
+
+  //
+  // Append Ps2 Keyboard into "ConInDev"
+  //
+  EfiBootManagerUpdateConsoleVariable (ConInDev, (EFI_DEVICE_PATH_PROTOCOL *) 
&gKeyboardDevicePath, NULL);
+}
+
+
+/**
+  Constructor for the Ps2 keyboard controller l

[edk2-devel] [edk2-platforms] [PATCH 0/5] Enable Ps2 keyboard

[Agyeman, Prince]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2228

This patch series enables BIOS Ps2 keyboard in GalagoPro3


What was done:
Patch 0001 adds PCDs to BoardModulePkg that will enable/disable,
describe Super I/O , Ps2 keyboard/mouse, uart1 and uart2 com ports

Patch 0002 moves the generic Super I/O driver from SimicsOpenBoardPkg to
BoardModulePkg in order for it to be shared. This driver publishes the
gEfiSioProtocolGuid consumed by edk2's MdeModulePkg/Bus/Isa/Ps2KeyboardDxe
driver to enable Ps2 keyboard functions in BIOS

Patch 0003 adds PCDs defined in patch 0001 to enable/disable devices in the
Super I/O driver added in patch 0002

Patch 0004 adds a Null Ps2 Library that adds Ps2 keyboard device path to
ConIn and ConInDev

Patch 0005 enables Ps2 keyboard in BIOS by setting Ps2 keyboard related PCDs
Prince Agyeman (5):
  Platform/Intel: Add gBoardModulePkgTokenSpaceGuid
  Platform/Intel: Move Sio Dxe Driver
  BoardModulePkg: Added Pcds Sio Driver
  KabylakeOpenBoardPkg: Add Ps2 keyboard Null Library
  KabylakeOpenBoardPkg: Add Ps2 Keyboard Support

 .../Intel/BoardModulePkg/BoardModulePkg.dec   |  25 +++
 .../Intel/BoardModulePkg/BoardModulePkg.dsc   |   1 +
 .../LegacySioDxe/ComponentName.c  |   0
 .../LegacySioDxe/ComponentName.h  |   0
 .../LegacySioDxe/LegacySioDxe.inf |  18 +-
 .../LegacySioDxe/Register.h   |   0
 .../LegacySioDxe/SioChip.c|  71 +-
 .../LegacySioDxe/SioChip.h|  18 +-
 .../LegacySioDxe/SioDriver.c  |  42 +++-
 .../LegacySioDxe/SioDriver.h  |   1 -
 .../LegacySioDxe/SioService.c |   0
 .../LegacySioDxe/SioService.h |   0
 .../BoardAcpiLib/DxeBoardAcpiTableLib.inf |   3 +-
 .../DxeMultiBoardAcpiSupportLib.inf   |   3 +-
 .../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c  | 202 ++
 .../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h  |  65 ++
 .../Library/Ps2KbcLib/Ps2KbcLib.inf   |  39 
 .../GalagoPro3/OpenBoardPkg.dsc   |   7 +
 .../GalagoPro3/OpenBoardPkg.fdf   |   2 +
 .../GalagoPro3/OpenBoardPkgPcd.dsc|   6 +
 .../BoardAcpiLib/DxeBoardAcpiTableLib.inf |   3 +-
 .../DxeMultiBoardAcpiSupportLib.inf   |   3 +-
 .../KabylakeRvp3/OpenBoardPkgPcd.dsc  |   5 +
 .../KabylakeOpenBoardPkg/OpenBoardPkg.dec |   2 -
 .../BoardX58Ich10/OpenBoardPkg.dsc|   2 +-
 .../BoardX58Ich10/OpenBoardPkg.fdf|   2 +-
 .../BoardX58Ich10/OpenBoardPkgPcd.dsc |   6 +
 .../WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec  |   1 -
 .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc   |   5 +
 29 files changed, 499 insertions(+), 33 deletions(-)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/ComponentName.c (100%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/ComponentName.h (100%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/LegacySioDxe.inf (63%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/Register.h (100%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioChip.c (75%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioChip.h (90%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioDriver.c (88%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioDriver.h (95%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioService.c (100%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioService.h (100%)
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h
 create mode 100644 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.inf

-- 
2.19.1.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49837): https://edk2.groups.io/g/devel/message/49837
Mute This Topic: https://groups.io/mt/40479678/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [edk2-platforms] [PATCH 1/5] Platform/Intel: Add gBoardModulePkgTokenSpaceGuid

[Agyeman, Prince]

Added gBoardModulePkgTokenSpaceGuid to BoardModulePkg

Added ps2 keyboard and Uart enable PCDs.

Added PCDs to define IO ports for Uart1 and Uart2

Enabled KabylakeOpenBoardPkg and WhiskeylakeOpenBoardPkg
boards to use the ps2 keyboard enable PCD.

Cc: Michael Kubacki 
Cc: Chasel Chiu 
Cc: Nate DeSimone 

Signed-off-by: Prince Agyeman 
---
 .../Intel/BoardModulePkg/BoardModulePkg.dec   | 25 +++
 .../BoardAcpiLib/DxeBoardAcpiTableLib.inf |  3 ++-
 .../DxeMultiBoardAcpiSupportLib.inf   |  3 ++-
 .../GalagoPro3/OpenBoardPkgPcd.dsc|  5 
 .../BoardAcpiLib/DxeBoardAcpiTableLib.inf |  3 ++-
 .../DxeMultiBoardAcpiSupportLib.inf   |  3 ++-
 .../KabylakeRvp3/OpenBoardPkgPcd.dsc  |  5 
 .../KabylakeOpenBoardPkg/OpenBoardPkg.dec |  2 --
 .../WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec  |  1 -
 .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc   |  5 
 10 files changed, 48 insertions(+), 7 deletions(-)

diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec 
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
index f461cc7cab..26e662f711 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
@@ -42,3 +42,28 @@
 
   ## GUID to publish BIOS information HOB
   gBiosInfoGuid = { 0x09d0d15c, 0xe9f0, 0x4dfc, {0x9e, 0x0b, 0x39, 0x33, 0x1f, 
0xca, 0x66, 0x85} }
+
+  ## {7F4EE1A3-C1F3-43E4-BA1A-39DCDE46C343}
+  gBoardModulePkgTokenSpaceGuid = { 0x7f4ee1a3, 0xc1f3, 0x43e4, { 0xba, 0x1a, 
0x39, 0xdc, 0xde, 0x46, 0xc3, 0x43 } }
+
+[PcdsFixedAtBuild]
+  ## PcdPs2KbMsEnable 0x0:Disable, 0x1:Enable
+  gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|0x00|UINT8|0x0001
+
+  ## SuperIo Pci ISA Bridge info. It is an array that contains the Segment, 
Bus, Device and Function
+  #  information describing the PCI Device Info. The first byte is the segment 
number,
+  #  the second is the bus number, third byte is the device number, the fourth 
byte
+  #  is the Function.
+  gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0xFF, 0xFF, 
0xFF, 0xFF}|VOID*|0x0002
+
+  ## PcdUart1Enable 0x0:Disable, 0x1:Enable
+  gBoardModulePkgTokenSpaceGuid.PcdUart1Enable|0x00|UINT8|0x0003
+  gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask|0x0010|UINT16|0x0004
+  gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort|0x03F8|UINT16|0x0005
+  gBoardModulePkgTokenSpaceGuid.PcdUart1Length|0x08|UINT8|0x0006
+
+  ## PcdUart2Enable 0x0:Disable, 0x1:Enable
+  gBoardModulePkgTokenSpaceGuid.PcdUart2Enable|0x00|UINT8|0x0007
+  gBoardModulePkgTokenSpaceGuid.PcdUart2IrqMask|0x0008|UINT16|0x0008
+  gBoardModulePkgTokenSpaceGuid.PcdUart2IoPort|0x02F8|UINT16|0x0009
+  gBoardModulePkgTokenSpaceGuid.PcdUart2Length|0x08|UINT8|0x000A
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
index a79bdcdbc6..35cd5c8fdb 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
@@ -33,9 +33,10 @@
   MinPlatformPkg/MinPlatformPkg.dec
   KabylakeOpenBoardPkg/OpenBoardPkg.dec
   KabylakeSiliconPkg/SiPkg.dec
+  BoardModulePkg/BoardModulePkg.dec
 
 [Pcd]
-  gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPs2KbMsEnable
+  gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
   gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative
   gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable
   gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle
diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
index db8ba7a822..9fe27f9fda 100644
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
+++ 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
@@ -34,9 +34,10 @@
   MinPlatformPkg/MinPlatformPkg.dec
   KabylakeOpenBoardPkg/OpenBoardPkg.dec
   KabylakeSiliconPkg/SiPkg.dec
+  BoardModulePkg/BoardModulePkg.dec
 
 [Pcd]
-  gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPs2KbMsEnable
+  gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPciExpNative
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdNativeAspmEnable
   gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLowPowerS0Idle
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
index c68b8a49cf..4550a4e0b5 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
@@ -308,6 +308,11 @@
   gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x

[edk2-devel] [edk2-platforms] [PATCH 5/5] KabylakeOpenBoardPkg: Add Ps2 Keyboard Support

[Agyeman, Prince]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2228

Added Ps2Keyboard DXE driver.

Added Sio dxe driver to publish the SIO protocol
needed by the Ps2Keyboard DXE driver.

Included a Ps2 null Library to BdsDxe driver
to add the Ps2 device path to ConIn and ConInDev
variables

Configured the Super I/O Pci to Isa bridge bus,
device, function device info PCD. This will help the Super I/O
driver identify which bridge the Super I/O is connected to.

Signed-off-by: Prince Agyeman 
---
 .../Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 7 +++
 .../Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 2 ++
 .../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc| 1 +
 3 files changed, 10 insertions(+)

diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index f59248bba4..c6a0749458 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -311,6 +311,11 @@
   MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
   MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
   MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+  MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
+  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf{
+
+  NULL|$(PROJECT)/Library/Ps2KbcLib/Ps2KbcLib.inf
+  }
   UefiCpuPkg/CpuDxe/CpuDxe.inf
 
   ShellPkg/Application/Shell/Shell.inf {
@@ -408,3 +413,5 @@
   !endif
   }
 !endif
+
+  BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index 80efab1aad..d58466d390 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -335,6 +335,8 @@ INF  MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
 INF  MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
 INF  MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
 INF  MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+INF  BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+INF  MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
 
 INF  ShellPkg/Application/Shell/Shell.inf
 
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
index 4550a4e0b5..c6f5ae7534 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
@@ -312,6 +312,7 @@
   # Board Configuration
   ##
   gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|1
+  gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x00, 0x00, 
0x1F, 0x00}
 
 [PcdsFixedAtBuild.IA32]
   ##
-- 
2.19.1.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49842): https://edk2.groups.io/g/devel/message/49842
Mute This Topic: https://groups.io/mt/40479687/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [edk2-platforms] [PATCH 2/5] Platform/Intel: Move Sio Dxe Driver

[Agyeman, Prince]

Moved LegacySioDxe from SimicsOpenBoardPkg
to BoardModulePkg as LegacySioDxe is generic
and can be shared between open board packages

Removed unused libraries and functions in LegacySioDxe

Pointed BoardX58Ich10 to the current LegacySioDxe
location

Cc: Michael Kubacki 
Cc: Chasel Chiu 
Cc: Nate DeSimone 

Signed-off-by: Prince Agyeman 
---
 Platform/Intel/BoardModulePkg/BoardModulePkg.dsc   |  1 +
 .../LegacySioDxe/ComponentName.c   |  0
 .../LegacySioDxe/ComponentName.h   |  0
 .../LegacySioDxe/LegacySioDxe.inf  |  3 ---
 .../LegacySioDxe/Register.h|  0
 .../LegacySioDxe/SioChip.c |  2 --
 .../LegacySioDxe/SioChip.h | 10 --
 .../LegacySioDxe/SioDriver.c   |  0
 .../LegacySioDxe/SioDriver.h   |  1 -
 .../LegacySioDxe/SioService.c  |  0
 .../LegacySioDxe/SioService.h  |  0
 .../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc  |  2 +-
 .../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf  |  2 +-
 13 files changed, 3 insertions(+), 18 deletions(-)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/ComponentName.c (100%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/ComponentName.h (100%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/LegacySioDxe.inf (92%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/Register.h (100%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioChip.c (94%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioChip.h (93%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioDriver.c (100%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioDriver.h (95%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioService.c (100%)
 rename Platform/Intel/{SimicsOpenBoardPkg => 
BoardModulePkg}/LegacySioDxe/SioService.h (100%)

diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc 
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
index 5ec68ceebf..fffc135d75 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
@@ -76,6 +76,7 @@
 
 [Components]
   BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMediaInfoPei.inf
+  BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
   BoardModulePkg/Library/CmosAccessLib/CmosAccessLib.inf
   
BoardModulePkg/Library/PlatformCmosAccessLibNull/PlatformCmosAccessLibNull.inf
 
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
similarity index 100%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.h 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
similarity index 100%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.h
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
similarity index 92%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
index 275f36ca47..d606ba43dc 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
@@ -28,11 +28,8 @@
   MemoryAllocationLib
   PcdLib
   DevicePathLib
-  IoLib
   UefiDriverEntryPoint
   UefiBootServicesTableLib
-  S3BootScriptLib
-  S3IoLib
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/Register.h 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/Register.h
similarity index 100%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/Register.h
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/Register.h
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
similarity index 94%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
index b9a7b9cd24..81efe3c38b 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
@@ -7,9 +7,7 @@
 **/
 
 #include "SioDriver.h"
-#include 
 
-LOCAL_IO_WRITE8mIoWrite8 = IoWrite8;
 //
 // System configuration (setup) information
 //
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.h 
b/Platform/Intel/BoardModulePkg/Le

[edk2-devel] [edk2-platforms] [PATCH 3/5] BoardModulePkg: Added Pcds Sio Driver

[Agyeman, Prince]

Included PCDs to the Sio dxe driver,
to allow the enable/disable of Ps2 keyboard/mouse,
UART1 and UART2 com ports.

Renamed the Sio driver's base name

Cc: Michael Kubacki 
Cc: Chasel Chiu 
Cc: Nate DeSimone 

Signed-off-by: Prince Agyeman 
---
 .../LegacySioDxe/LegacySioDxe.inf | 15 +++-
 .../BoardModulePkg/LegacySioDxe/SioChip.c | 69 +--
 .../BoardModulePkg/LegacySioDxe/SioChip.h | 10 +++
 .../BoardModulePkg/LegacySioDxe/SioDriver.c   | 42 ++-
 .../BoardX58Ich10/OpenBoardPkgPcd.dsc |  6 ++
 5 files changed, 133 insertions(+), 9 deletions(-)

diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
index d606ba43dc..4ab01a6098 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
@@ -10,7 +10,7 @@
 
 [Defines]
   INF_VERSION= 0x00010017
-  BASE_NAME  = HitachiH8s2113Dxe
+  BASE_NAME  = LegacySioDxe
   FILE_GUID  = 7807E404-8281-4FF1-8457-0B54BABE263F
   VERSION_STRING = 1.0
   MODULE_TYPE= UEFI_DRIVER
@@ -34,6 +34,7 @@
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
+  BoardModulePkg/BoardModulePkg.dec
 
 [Sources]
   SioChip.c
@@ -44,6 +45,18 @@
   SioDriver.h
   ComponentName.c
 
+[Pcd]
+  gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
+  gBoardModulePkgTokenSpaceGuid.PcdUart1Enable
+  gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask
+  gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort
+  gBoardModulePkgTokenSpaceGuid.PcdUart1Length
+  gBoardModulePkgTokenSpaceGuid.PcdUart2Enable
+  gBoardModulePkgTokenSpaceGuid.PcdUart2IrqMask
+  gBoardModulePkgTokenSpaceGuid.PcdUart2IoPort
+  gBoardModulePkgTokenSpaceGuid.PcdUart2Length
+  gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice
+
 [Protocols]
   gEfiPciIoProtocolGuid ## CONSUMES
   gEfiDevicePathProtocolGuid## PRODUCES
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c 
b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
index 81efe3c38b..09403a7354 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
@@ -19,12 +19,31 @@
 ACPI_SIO_RESOURCES_IO_IRQ  mCom1Resources = {
   {
 { ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR },
-0x3f8,
-8
+  FixedPcdGet16 (PcdUart1IoPort),
+  FixedPcdGet8 (PcdUart1Length)
+},
+{
+  { ACPI_IRQ_NOFLAG_DESCRIPTOR },
+  FixedPcdGet16 (PcdUart1IrqMask)
+},
+{
+  ACPI_END_TAG_DESCRIPTOR,
+  0
+}
+};
+
+//
+// COM 2 UART Controller
+//
+ACPI_SIO_RESOURCES_IO_IRQ  mCom2Resources = {
+  {
+{ ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR },
+FixedPcdGet16 (PcdUart2IoPort),
+FixedPcdGet8 (PcdUart2Length)
   },
   {
 { ACPI_IRQ_NOFLAG_DESCRIPTOR },
-BIT4// IRQ4
+FixedPcdGet16 (PcdUart2IrqMask),
   },
   {
 ACPI_END_TAG_DESCRIPTOR,
@@ -70,10 +89,12 @@ ACPI_SIO_RESOURCES_IO_IRQ  mMouseResources = {
   }
 };
 
+
 //
 // Table of SIO Controllers
 //
 DEVICE_INFOmDeviceInfo[] = {
+#if FixedPcdGet8 (PcdUart1Enable) == DEVICE_ENABLED
   {
 {
   EISA_PNP_ID(0x501),
@@ -84,6 +105,20 @@ DEVICE_INFOmDeviceInfo[] = {
 { (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources },
 { (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources }
   },  // COM 1 UART Controller
+#endif
+#if FixedPcdGet8 (PcdUart2Enable) == DEVICE_ENABLED
+  {
+{
+  EISA_PNP_ID(0x501),
+  0
+},
+0,
+RESOURCE_IO | RESOURCE_IRQ,
+{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources },
+{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources }
+  },  // COM 2 UART Controller
+#endif
+#if FixedPcdGet8 (PcdPs2KbMsEnable) == DEVICE_ENABLED
   {
 {
   EISA_PNP_ID(0x303),
@@ -103,10 +138,28 @@ DEVICE_INFOmDeviceInfo[] = {
 0,  // Cannot change resource
 { (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources },
 { (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources }
-  }  // PS/2 Mouse Controller
+  },  // PS/2 Mouse Controller
+#endif
+  DEVICE_INFO_END
 };
 
 
+
+/**
+  Gets the number of devices in Table of SIO Controllers mDeviceInfo
+
+  @retval Number of enabled devices in Table of SIO Controllers.
+**/
+UINTN
+EFIAPI
+GetDeviceCount(
+  VOID
+){
+   UINTNCount;
+   Count = ARRAY_SIZE(mDeviceInfo) - 1; // -1 to account for for the end 
device info
+   return Count;
+}
+
 /**
   Return the supported devices.
 
@@ -128,7 +181,7 @@ DeviceGetList (
   //
   // Allocate enough memory for simplicity
   //
-  DeviceCount =  sizeof (mDeviceInfo) / sizeof (mDeviceInfo[0]);
+  DeviceCount = GetDeviceCount();
   LocalDevices = AllocatePool (sizeof (EFI_SIO_ACPI_DEVICE_ID) * DeviceCount);
   ASSERT (LocalDevices != NULL);
   if (LocalDevices == NULL) {
@@ -157,7 +210,6 @@ SioInit

Re: [edk2-devel] [edk2-platforms: PATCH v3 1/6] MinPlatformPkg: Add SetCacheMtrrLib library class.

[Nate DeSimone]

With Michael's comments addressed...

Reviewed-by: Nate DeSimone 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Chiu, Chasel
Sent: Thursday, October 31, 2019 3:28 AM
To: devel@edk2.groups.io
Cc: Kubacki, Michael A ; Desimone, Nathaniel L 
; Gao, Liming 
Subject: [edk2-devel] [edk2-platforms: PATCH v3 1/6] MinPlatformPkg: Add 
SetCacheMtrrLib library class.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2314

MinPlatformPkg should contain the library class header (API) and the NULL 
library class instance.

Cc: Michael Kubacki 
Cc: Nate DeSimone 
Cc: Liming Gao 
Signed-off-by: Chasel Chiu 
---
 Platform/Intel/MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c   
| 327 
+++
 Platform/Intel/MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.c   
|  37 +
 Platform/Intel/MinPlatformPkg/Include/Library/SetCacheMtrrLib.h   
|  34 ++
 Platform/Intel/MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf 
|  46 ++
 Platform/Intel/MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLibNull.inf 
|  29 +
 Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec  
|   6 --
 6 files changed, 477 insertions(+), 2 deletions(-)

diff --git 
a/Platform/Intel/MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c 
b/Platform/Intel/MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c
new file mode 100644
index 00..26f06321f7
--- /dev/null
+++ b/Platform/Intel/MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrr
+++ Lib.c
@@ -0,0 +1,327 @@
+/** @file
+
+SetCacheMtrr library functions.
+This implementation is for typical platforms and may not be needed when 
+cache MTRR will be initialized by FSP.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Set Cache Mtrr.
+**/
+VOID
+EFIAPI
+SetCacheMtrr (
+  VOID
+  )
+{
+  EFI_STATUS  Status;
+  EFI_PEI_HOB_POINTERSHob;
+  MTRR_SETTINGS   MtrrSetting;
+  UINT64  MemoryBase;
+  UINT64  MemoryLength;
+  UINT64  LowMemoryLength;
+  UINT64  HighMemoryLength;
+  EFI_BOOT_MODE   BootMode;
+  EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
+  UINT64  CacheMemoryLength;
+
+  ///
+  /// Reset all MTRR setting.
+  ///
+  ZeroMem(&MtrrSetting, sizeof(MTRR_SETTINGS));
+
+  ///
+  /// Cache the Flash area as WP to boost performance  ///  Status = 
+ MtrrSetMemoryAttributeInMtrrSettings (
+&MtrrSetting,
+(UINTN) PcdGet32 (PcdFlashAreaBaseAddress),
+(UINTN) PcdGet32 (PcdFlashAreaSize),
+CacheWriteProtected
+);
+  ASSERT_EFI_ERROR (Status);
+
+  ///
+  /// Update MTRR setting from MTRR buffer for Flash Region to be WP to 
+ boost performance  ///  MtrrSetAllMtrrs (&MtrrSetting);
+
+  ///
+  /// Set low to 1 MB. Since 1MB cacheability will always be set  /// 
+ until override by CSM.
+  /// Initialize high memory to 0.
+  ///
+  LowMemoryLength   = 0x10;
+  HighMemoryLength  = 0;
+  ResourceAttribute = (
+   EFI_RESOURCE_ATTRIBUTE_PRESENT |
+   EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+   EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
+   EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
+   EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
+   EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
+   );
+
+  Status = PeiServicesGetBootMode (&BootMode);  ASSERT_EFI_ERROR 
+ (Status);
+
+  if (BootMode != BOOT_ON_S3_RESUME) {
+ResourceAttribute |= EFI_RESOURCE_ATTRIBUTE_TESTED;  }
+
+  Status = PeiServicesGetHobList ((VOID **) &Hob.Raw);  while 
+ (!END_OF_HOB_LIST (Hob)) {
+if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
+  if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) 
||
+  ((Hob.ResourceDescriptor->ResourceType == 
EFI_RESOURCE_MEMORY_RESERVED) &&
+   (Hob.ResourceDescriptor->ResourceAttribute == ResourceAttribute))
+ ) {
+if (Hob.ResourceDescriptor->PhysicalStart >= 0x1ULL) {
+  HighMemoryLength += Hob.ResourceDescriptor->ResourceLength;
+} else if (Hob.ResourceDescriptor->PhysicalStart >= 0x10) {
+  LowMemoryLength 

Re: [edk2-devel] [edk2-platforms: PATCH v3 6/6] SimicsOpenBoardPkg/BoardX58Ich10: Add SetCacheMtrrLib library class.

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Chiu, Chasel
Sent: Thursday, October 31, 2019 3:28 AM
To: devel@edk2.groups.io
Cc: Wei, David Y ; Agyeman, Prince 

Subject: [edk2-devel] [edk2-platforms: PATCH v3 6/6] 
SimicsOpenBoardPkg/BoardX58Ich10: Add SetCacheMtrrLib library class.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2314

Include SetCacheMtrrLib from MinPlatformPkg.

Cc: Wei David Y 
Cc: Agyeman Prince 
Signed-off-by: Chasel Chiu 
---
 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc 
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 4f8ab4170d..8cad7b5b69 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -136,6 +136,7 @@
   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
 !endif
   
TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLib.inf
+  
SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
 
 [LibraryClasses.common.DXE_DRIVER]
   ###
-- 
2.13.3.windows.1





-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49836): https://edk2.groups.io/g/devel/message/49836
Mute This Topic: https://groups.io/mt/40108822/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [edk2-platforms: PATCH v3 4/6] WhiskeylakeOpenBoardPkg: Add SetCacheMtrrLib library class.

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Chiu, Chasel
Sent: Thursday, October 31, 2019 3:28 AM
To: devel@edk2.groups.io
Cc: Kubacki, Michael A ; Desimone, Nathaniel L 

Subject: [edk2-devel] [edk2-platforms: PATCH v3 4/6] WhiskeylakeOpenBoardPkg: 
Add SetCacheMtrrLib library class.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2314

Whiskeylake board relying on FSP to configure MTRRs so it can include 
SetCacheMtrrLibNull.

Test: internal platform can boot with FSP API modes.

Cc: Michael Kubacki 
Cc: Nate DeSimone 
Signed-off-by: Chasel Chiu 
---
 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git 
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc 
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index 8e0ea2d5ce..20b16fd7ef 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPk
+++ g.dsc
@@ -164,6 +164,7 @@
 !if $(TARGET) == DEBUG
   
TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf
 !endif
+
+ SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMt
+ rrLibNull.inf
 
   ###
   # Board Package
--
2.13.3.windows.1





-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49834): https://edk2.groups.io/g/devel/message/49834
Mute This Topic: https://groups.io/mt/40108820/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [edk2-platforms: PATCH v3 5/6] PurleyOpenBoardPkg/BoardMtOlympus: Add SetCacheMtrrLib library class.

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Chiu, Chasel
Sent: Thursday, October 31, 2019 3:28 AM
To: devel@edk2.groups.io
Cc: Lu, Shifei A ; Zhou, Bowen ; 
Oram, Isaac W 
Subject: [edk2-devel] [edk2-platforms: PATCH v3 5/6] 
PurleyOpenBoardPkg/BoardMtOlympus: Add SetCacheMtrrLib library class.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2314

Include SetCacheMtrrLib from MinPlatformPkg.

Cc: Shifei A Lu 
Cc: Xiaohu Zhou 
Cc: Isaac W Oram 
Signed-off-by: Chasel Chiu 
---
 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc 
b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc
index 595ffd4144..488243081f 100644
--- a/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc
+++ b/Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/PlatformPkg.dsc
@@ -1,6 +1,6 @@
 ### @file
 #
-# Copyright (c) 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2018 - 2019, Intel Corporation. All rights 
+reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent  # @@ -135,6 +135,7 @@  
!include $(RC_PKG)/RcDxeLib.dsc  !include $(SKT_PKG)/SktDxeLib.dsc  !include 
$(PCH_PKG)/PchDxeLib.dsc
+
+ SetCacheMtrrLib|MinPlatformPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib
+ .inf
 
 [LibraryClasses.X64]
   
BoardAcpiTableLib|$(BOARD_PKG)/$(BOARD_NAME)/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
--
2.13.3.windows.1





-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49835): https://edk2.groups.io/g/devel/message/49835
Mute This Topic: https://groups.io/mt/40108821/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] [edk2-platforms: PATCH v3 3/6] KabylakeOpenBoardPkg: Add SetCacheMtrrLib library class.

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Chiu, Chasel
Sent: Thursday, October 31, 2019 3:28 AM
To: devel@edk2.groups.io
Cc: Kubacki, Michael A ; Desimone, Nathaniel L 
; Gao, Liming ; Jeremy 
Soller 
Subject: [edk2-devel] [edk2-platforms: PATCH v3 3/6] KabylakeOpenBoardPkg: Add 
SetCacheMtrrLib library class.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2314

Kabylake boards are relying on FSP to configure MTRRs so they can include 
SetCacheMtrrLibNull.

Test: internal platform can boot with FSP API and Dispatch modes.

Cc: Michael Kubacki 
Cc: Nate DeSimone 
Cc: Liming Gao 
Cc: Jeremy Soller 
Signed-off-by: Chasel Chiu 
---
 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Override/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c
   | 640 

 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
   |   3 ++-
 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
   |   2 +-
 
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Override/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
 |  67 ---
 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc  
   |   1 +
 5 files changed, 4 insertions(+), 709 deletions(-)

diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Override/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c
 
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Override/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c
deleted file mode 100644
index b784026c1b..00
--- 
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Override/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c
+++ /dev/null
@@ -1,640 +0,0 @@
-/** @file
-  Source code file for Platform Init Pre-Memory PEI module
-
-Copyright (c) 2019, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include  -#include  
-#include 
-
-EFI_STATUS
-EFIAPI
-MemoryDiscoveredPpiNotifyCallback (
-  IN CONST EFI_PEI_SERVICES  **PeiServices,
-  IN EFI_PEI_NOTIFY_DESCRIPTOR   *NotifyDescriptor,
-  IN VOID*Ppi
-  );
-
-EFI_STATUS
-EFIAPI
-GetPlatformMemorySize (
-  IN  EFI_PEI_SERVICES   **PeiServices,
-  IN  PEI_PLATFORM_MEMORY_SIZE_PPI   *This,
-  IN OUT  UINT64 *MemorySize
-  );
-
-/**
-
-  This function checks the memory range in PEI.
-
-  @param PeiServices Pointer to PEI Services.
-  @param ThisPei memory test PPI pointer.
-  @param BeginAddressBeginning of the memory address to be checked.
-  @param MemoryLengthBytes of memory range to be checked.
-  @param Operation   Type of memory check operation to be performed.
-  @param ErrorAddressReturn the address of the error memory address.
-
-  @retval EFI_SUCCESS The operation completed successfully.
-  @retval EFI_DEVICE_ERRORMemory test failed. It's not safe to use this 
range of memory.
-
-**/
-EFI_STATUS
-EFIAPI
-BaseMemoryTest (
-  IN  EFI_PEI_SERVICES   **PeiServices,
-  IN  PEI_BASE_MEMORY_TEST_PPI   *This,
-  IN  EFI_PHYSICAL_ADDRESS   BeginAddress,
-  IN  UINT64 MemoryLength,
-  IN  PEI_MEMORY_TEST_OP Operation,
-  OUT EFI_PHYSICAL_ADDRESS   *ErrorAddress
-  );
-
-static EFI_PEI_NOTIFY_DESCRIPTOR mMemDiscoveredNotifyList = {
-  (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | 
EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
-  &gEfiPeiMemoryDiscoveredPpiGuid,
-  (EFI_PEIM_NOTIFY_ENTRY_POINT) MemoryDiscoveredPpiNotifyCallback -};
-
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mPpiListRecoveryBootMode 
= {
-  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR

Re: [edk2-devel] [edk2-platforms: PATCH v3 2/6] MinPlatformPkg: Add SetCacheMtrrLib library class.

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Chiu, Chasel
Sent: Thursday, October 31, 2019 3:28 AM
To: devel@edk2.groups.io
Cc: Kubacki, Michael A ; Desimone, Nathaniel L 
; Gao, Liming 
Subject: [edk2-devel] [edk2-platforms: PATCH v3 2/6] MinPlatformPkg: Add 
SetCacheMtrrLib library class.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2314

MinPlatformPkg PlatformInit modules to consume SetCacheMtrrLib.

Cc: Michael Kubacki 
Cc: Nate DeSimone 
Cc: Liming Gao 
Signed-off-by: Chasel Chiu 
---
 
Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c
   | 151 
++-
 
Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.c 
   | 164 
++--
 
Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf
 |  11 +--
 
Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf
  |   7 ++-
 4 files changed, 7 insertions(+), 326 deletions(-)

diff --git 
a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c
 
b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c
index 70e6b9a495..1b00d1dd6a 100644
--- 
a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPostMem.c
+++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/Platfor
+++ mInitPostMem.c
@@ -13,8 +13,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent  #include 
  #include   #include 
 -#include  -#include 

 
 #include 
 #include  @@ -22,6 +20,7 @@ 
SPDX-License-Identifier: BSD-2-Clause-Patent  #include   
#include   #include 
+#include 
 
 EFI_STATUS
 EFIAPI
@@ -38,152 +37,6 @@ static EFI_PEI_NOTIFY_DESCRIPTOR  mEndOfPeiNotifyList = {  
};
 
 /**
-  Update MTRR setting and set write back as default memory attribute.
-
-  @retval  EFI_SUCCESS  The function completes successfully.
-  @retval  Others   Some error occurs.
-**/
-EFI_STATUS
-EFIAPI
-SetCacheMtrrAfterEndOfPei (
-  VOID
-  )
-{
-  EFI_STATUSStatus;
-  MTRR_SETTINGS MtrrSetting;
-  EFI_PEI_HOB_POINTERS  Hob;
-  UINT64MemoryBase;
-  UINT64MemoryLength;
-  UINT64Power2Length;
-  EFI_BOOT_MODE BootMode;
-  UINTN Index;
-  UINT64SmramSize;
-  UINT64SmramBase;
-  EFI_SMRAM_HOB_DESCRIPTOR_BLOCK*SmramHobDescriptorBlock;
-  Status = PeiServicesGetBootMode (&BootMode);
-  ASSERT_EFI_ERROR (Status);
-
-  if (BootMode == BOOT_ON_S3_RESUME) {
-return EFI_SUCCESS;
-  }
-  //
-  // Clear the CAR Settings
-  //
-  ZeroMem(&MtrrSetting, sizeof(MTRR_SETTINGS));
-
-  //
-  // Default Cachable attribute will be set to WB to support large memory 
size/hot plug memory
-  //
-  MtrrSetting.MtrrDefType &= ~((UINT64)(0xFF));
-  MtrrSetting.MtrrDefType |= (UINT64) CacheWriteBack;
-
-  //
-  // Set fixed cache for memory range below 1MB
-  //
-  Status = MtrrSetMemoryAttributeInMtrrSettings (
- &MtrrSetting,
- 0x0,
- 0xA,
- CacheWriteBack
- );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = MtrrSetMemoryAttributeInMtrrSettings (
- &MtrrSetting,
- 0xA,
- 0x2,
- CacheUncacheable
- );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = MtrrSetMemoryAttributeInMtrrSettings (
- &MtrrSetting,
- 0xC,
- 0x4,
- CacheWriteProtected
- );
-  ASSERT_EFI_ERROR ( Status);
-
-  //
-  // PI SMM IPL can't set SMRAM to WB because at that time CPU ARCH protocol 
is not available.
-  // Set cacheability of SMRAM to WB here to improve SMRAM initialization 
performance.
-  //
-  SmramSize = 0;
-  SmramBase = 0;
-  Status = PeiServicesGetHobList ((VOID **) &Hob.Raw);
-  while (!END_OF_HOB_LIST (Hob)) {
-if (Hob.Header->HobType == EFI_HOB_TYPE_GUID_EXTENSION) {
-  if (CompareGuid (&Hob.Guid->Name, &gEfiSmmSmramMemoryGuid)) {
-SmramHobDescriptorBlock = (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *) (Hob.Guid 
+ 1);
-for (Index = 0; Index < 
SmramHobDescriptorBlock->NumberOfSmmReservedRegions; Index++) {
-  if (SmramHobDescriptorBlock->Descriptor[Index].PhysicalStart > 
0x10) {
-SmramSize += 
SmramHobDescriptorBloc

[edk2-devel] [PATCH V7 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache support

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2220

This change reduces SMIs for GetVariable () by maintaining a
UEFI variable cache in Runtime DXE in addition to the pre-
existing cache in SMRAM. When the Runtime Service GetVariable()
is invoked, a Runtime DXE cache is used instead of triggering an
SMI to VariableSmm. This can improve overall system performance
by servicing variable read requests without rendezvousing all
cores into SMM.

The runtime cache  can be disabled with by setting the FeaturePCD
gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache
to FALSE. If the PCD is set to FALSE, the runtime cache will not be
used and an SMI will be triggered for Runtime Service
GetVariable () and GetNextVariableName () invocations.

The following are important points regarding the behavior of the
variable drivers when the variable runtime cache is enabled.

1. All of the non-volatile storage contents are loaded into the
   cache upon driver load. This one time load operation from storage
   is preferred as opposed to building the cache on demand. An on-
   demand cache would require a fallback SMI to load data into the
   cache as variables are requested.

2. SetVariable () requests will continue to always trigger an SMI.
   This occurs regardless of whether the variable is volatile or
   non-volatile.

3. Both volatile and non-volatile variables are cached in a runtime
   buffer. As is the case in the current EDK II variable driver, they
   continue to be cached in separate buffers.

4. The cache in Runtime DXE and SMM are intended to be exact copies
   of one another. All SMM variable accesses only return data from the
   SMM cache. The runtime caches are only updated after the variable I/O
   operation is successful in SMM. The runtime caches are only updated
   from SMM.

5. Synchronization mechanisms are in place to ensure the runtime cache
   content integrity with the SMM cache. These may result in updates to
   runtime cache that are the same in content but different in offset and
   size from updates to the SMM cache.

When using SMM variables with runtime cache enabled, two caches will now
be present.
1. "Runtime Cache" - Maintained in VariableSmmRuntimeDxe. Used to service
   Runtime Services GetVariable () and GetNextVariableName () callers.
2. "SMM Cache" - Maintained in VariableSmm to service SMM GetVariable ()
   and GetNextVariableName () callers.
   a. This cache is retained so SMM modules do not operate on data outside
  SMRAM.

Because a race condition can occur if an SMI occurs during the execution
of runtime code reading from the runtime cache, a runtime cache read lock
is introduced that explicitly moves pending updates from SMM to the runtime
cache if an SMM update occurs while the runtime cache is locked. Note that
it is not expected a Runtime services call will interrupt SMM processing
since all CPU cores rendezvous in SMM.

It is possible to view UEFI variable read and write statistics by setting
the gEfiMdeModulePkgTokenSpaceGuid.PcdVariableCollectStatistics FeaturePcd
to TRUE and using the VariableInfo UEFI application in MdeModulePkg to dump
variable statistics to the console. By doing so, a user can view the number
of GetVariable () hits from the Runtime DXE variable driver (Runtime Cache
hits) and the SMM variable driver (SMM Cache hits). SMM Cache hits for
GetVariable () will occur when SMM modules invoke GetVariable ().

Cc: Dandan Bi 
Cc: Ard Biesheuvel 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Jiewen Yao 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/MdeModulePkg.dec|  12 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf|   2 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf   |   2 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf |  18 +-
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf  |   2 +
 MdeModulePkg/Include/Guid/SmmVariableCommon.h|  29 +-
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.h|  32 +-
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeCache.h|  51 ++
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c|  50 +-
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeCache.c| 153 
++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c | 189 
+++-
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c   | 512 
+++-
 12 files changed, 1011 insertions(+), 41 deletions(-)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index d6bac974da..3ef8fe7644 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -641,6 +641,18 @@
   # @Prompt Enable Device Path From Text support.
   
gEfiMdeModulePkgTokenSpaceGuid.PcdDevicePathSupportDevicePathFromText|TRUE|BO

[edk2-devel] [PATCH V7 10/10] MdeModulePkg: Enable variable runtime cache by default

[Kubacki, Michael A]

This change enables the variable runtime cache by default by setting
gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache in
MdeModulePkg.dec to TRUE.

Cc: Dandan Bi 
Cc: Ard Biesheuvel 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Jiewen Yao 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/MdeModulePkg.dec | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 3ef8fe7644..1e964f5903 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -651,7 +651,7 @@
   #   TRUE  - The UEFI variable runtime cache is enabled.
   #   FALSE - The UEFI variable runtime cache is disabled.
   # @Prompt Enable the UEFI variable runtime cache.
-  
gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE|BOOLEAN|0x00010039
+  
gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|TRUE|BOOLEAN|0x00010039
 
   ## Indicates if the statistics about variable usage will be collected. This 
information is
   #  stored as a vendor configuration table into the EFI system table.
-- 
2.16.2.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49830): https://edk2.groups.io/g/devel/message/49830
Mute This Topic: https://groups.io/mt/40450461/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [PATCH V7 02/10] MdeModulePkg/Variable: Parameterize GetNextVariableInternal () stores

[Kubacki, Michael A]

The majority of logic related to GetNextVariableName () is currently
implemented in VariableServiceGetNextVariableInternal (). The list
of variable stores to search for the given variable name and variable
GUID is defined in the function body. This change adds a new parameter
so that the caller must pass in the list of variable stores to be used
in the variable search.

Cc: Dandan Bi 
Cc: Ard Biesheuvel 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Jiewen Yao 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h | 13 ++--
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c| 12 ++-
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableExLib.c   |  6 ++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.c | 82 

 4 files changed, 73 insertions(+), 40 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h
index b0d7f76bd8..6555316f52 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h
@@ -248,18 +248,20 @@ FindVariableEx (
   );
 
 /**
-  This code Finds the Next available variable.
+  This code finds the next available variable.
 
   Caution: This function may receive untrusted input.
   This function may be invoked in SMM mode. This function will do basic 
validation, before parse the data.
 
-  @param[in]  VariableName  Pointer to variable name.
-  @param[in]  VendorGuidVariable Vendor Guid.
-  @param[out] VariablePtr   Pointer to variable header address.
+  @param[in]  VariableName  Pointer to variable name.
+  @param[in]  VendorGuidVariable Vendor Guid.
+  @param[in]  VariableStoreList A list of variable stores that should be used 
to get the next variable.
+The maximum number of entries is the max value 
of VARIABLE_STORE_TYPE.
+  @param[out] VariablePtr   Pointer to variable header address.
 
   @retval EFI_SUCCESS   The function completed successfully.
   @retval EFI_NOT_FOUND The next variable was not found.
-  @retval EFI_INVALID_PARAMETER If VariableName is not an empty string, while 
VendorGuid is NULL.
+  @retval EFI_INVALID_PARAMETER If VariableName is nt an empty string, while 
VendorGuid is NULL.
   @retval EFI_INVALID_PARAMETER The input values of VariableName and 
VendorGuid are not a name and
 GUID of an existing variable.
 
@@ -269,6 +271,7 @@ EFIAPI
 VariableServiceGetNextVariableInternal (
   IN  CHAR16*VariableName,
   IN  EFI_GUID  *VendorGuid,
+  IN  VARIABLE_STORE_HEADER **VariableStoreList,
   OUT VARIABLE_HEADER   **VariablePtr
   );
 
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
index 76536308e6..70af86db24 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -2358,6 +2358,7 @@ VariableServiceGetNextVariableName (
   UINTN   MaxLen;
   UINTN   VarNameSize;
   VARIABLE_HEADER *VariablePtr;
+  VARIABLE_STORE_HEADER   *VariableStoreHeader[VariableStoreTypeMax];
 
   if (VariableNameSize == NULL || VariableName == NULL || VendorGuid == NULL) {
 return EFI_INVALID_PARAMETER;
@@ -2377,7 +2378,16 @@ VariableServiceGetNextVariableName (
 
   
AcquireLockOnlyAtBootTime(&mVariableModuleGlobal->VariableGlobal.VariableServicesLock);
 
-  Status = VariableServiceGetNextVariableInternal (VariableName, VendorGuid, 
&VariablePtr);
+  //
+  // 0: Volatile, 1: HOB, 2: Non-Volatile.
+  // The index and attributes mapping must be kept in this order as 
FindVariable
+  // makes use of this mapping to implement search algorithm.
+  //
+  VariableStoreHeader[VariableStoreTypeVolatile] = (VARIABLE_STORE_HEADER *) 
(UINTN) mVariableModuleGlobal->VariableGlobal.VolatileVariableBase;
+  VariableStoreHeader[VariableStoreTypeHob]  = (VARIABLE_STORE_HEADER *) 
(UINTN) mVariableModuleGlobal->VariableGlobal.HobVariableBase;
+  VariableStoreHeader[VariableStoreTypeNv]   = mNvVariableCache;
+
+  Status = VariableServiceGetNextVariableInternal (VariableName, VendorGuid, 
VariableStoreHeader, &VariablePtr);
   if (!EFI_ERROR (Status)) {
 VarNameSize = NameSizeOfVariable (VariablePtr);
 ASSERT (VarNameSize != 0);
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableExLib.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableExLib.c
index dc78f68fa9..c787ddba5b 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableExLib.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableExLib.c
@@ -98,10 +98,16 @@ VariableExLibFindNextVariable (
   EFI_STATUSStatus;
   VARIABLE_HEADER   *Variable

[edk2-devel] [PATCH V7 09/10] OvmfPkg: Disable variable runtime cache

[Kubacki, Michael A]

Sets gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache
to FALSE in OvmfPkgIa32.dsc, OvmfPkgIa32X64.dsc, and OvmfPkgX64.dsc
so that when SMM_REQUIRE is TRUE, the SMM variable driver will not
use the runtime variable cache.

This is done for OvmfPkg because it currently depends upon a SMM
variable GetVariable ()implementation as a simple method to exercise
the SMM driver stack. This allows the following commands to be used
for variables such as Boot, BootOrder, and BootNext to test SMM
timing and stability differences on the BSP (e.g. CPU#0) vs an
AP (e.g. CPU#1).
 # taskset -c 0 efibootmgr
 # taskset -c 1 efibootmgr

Cc: Ard Biesheuvel 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Jordan Justen 
Cc: Hao A Wu 
Signed-off-by: Michael Kubacki 
---
 OvmfPkg/OvmfPkgIa32.dsc| 1 +
 OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
 OvmfPkg/OvmfPkgX64.dsc | 1 +
 3 files changed, 3 insertions(+)

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 05bb6ae136..d350b75630 100644
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -431,6 +431,7 @@
 !if $(SMM_REQUIRE) == TRUE
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE
 !endif
 
 [PcdsFixedAtBuild]
diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index 4a75a0332e..1ef82cafe4 100644
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -436,6 +436,7 @@
 !if $(SMM_REQUIRE) == TRUE
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE
 !endif
 
 [PcdsFixedAtBuild]
diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index ed54181180..232815c08e 100644
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -436,6 +436,7 @@
 !if $(SMM_REQUIRE) == TRUE
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire|TRUE
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE
+  gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache|FALSE
 !endif
 
 [PcdsFixedAtBuild]
-- 
2.16.2.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49829): https://edk2.groups.io/g/devel/message/49829
Mute This Topic: https://groups.io/mt/40450444/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [PATCH V7 03/10] MdeModulePkg/Variable: Parameterize VARIABLE_INFO_ENTRY buffer

[Kubacki, Michael A]

UpdateVariableInfo () currently accepts parameters regarding updates
to be made to a global variable of type VARIABLE_INFO_ENTRY. This
change passes the structure by pointer to UpdateVariableInfo ()
so structures other than the fixed global variable can be updated.

Cc: Dandan Bi 
Cc: Ard Biesheuvel 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Jiewen Yao 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h | 18 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c| 14 +++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.c | 41 
+++-
 3 files changed, 39 insertions(+), 34 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h
index 6555316f52..1777ce0e69 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h
@@ -286,13 +286,14 @@ VariableServiceGetNextVariableInternal (
   the transaction. Data is allocated by this routine, but never
   freed.
 
-  @param[in] VariableName   Name of the Variable to track.
-  @param[in] VendorGuid Guid of the Variable to track.
-  @param[in] Volatile   TRUE if volatile FALSE if non-volatile.
-  @param[in] Read   TRUE if GetVariable() was called.
-  @param[in] Write  TRUE if SetVariable() was called.
-  @param[in] Delete TRUE if deleted via SetVariable().
-  @param[in] Cache  TRUE for a cache hit.
+  @param[in]  VariableName   Name of the Variable to track.
+  @param[in]  VendorGuid Guid of the Variable to track.
+  @param[in]  Volatile   TRUE if volatile FALSE if non-volatile.
+  @param[in]  Read   TRUE if GetVariable() was called.
+  @param[in]  Write  TRUE if SetVariable() was called.
+  @param[in]  Delete TRUE if deleted via SetVariable().
+  @param[in]  Cache  TRUE for a cache hit.
+  @param[in,out]  VariableInfo   Pointer to a pointer of VARIABLE_INFO_ENTRY 
structures.
 
 **/
 VOID
@@ -303,7 +304,8 @@ UpdateVariableInfo (
   IN  BOOLEAN Read,
   IN  BOOLEAN Write,
   IN  BOOLEAN Delete,
-  IN  BOOLEAN Cache
+  IN  BOOLEAN Cache,
+  IN OUT VARIABLE_INFO_ENTRY  **VariableInfo
   );
 
 #endif
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
index 70af86db24..5cc12c2ae0 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -1641,7 +1641,7 @@ UpdateVariable (
 // go to delete this variable in variable HOB and
 // try to flush other variables from HOB to flash.
 //
-UpdateVariableInfo (VariableName, VendorGuid, FALSE, FALSE, FALSE, 
TRUE, FALSE);
+UpdateVariableInfo (VariableName, VendorGuid, FALSE, FALSE, FALSE, 
TRUE, FALSE, &gVariableInfo);
 FlushHobVariableToFlash (VariableName, VendorGuid);
 return EFI_SUCCESS;
   }
@@ -1758,7 +1758,7 @@ UpdateVariable (
  &State
  );
   if (!EFI_ERROR (Status)) {
-UpdateVariableInfo (VariableName, VendorGuid, Variable->Volatile, 
FALSE, FALSE, TRUE, FALSE);
+UpdateVariableInfo (VariableName, VendorGuid, Variable->Volatile, 
FALSE, FALSE, TRUE, FALSE, &gVariableInfo);
 if (!Variable->Volatile) {
   CacheVariable->CurrPtr->State = State;
   FlushHobVariableToFlash (VariableName, VendorGuid);
@@ -1777,7 +1777,7 @@ UpdateVariable (
   //
   // Variable content unchanged and no need to update timestamp, just 
return.
   //
-  UpdateVariableInfo (VariableName, VendorGuid, Variable->Volatile, FALSE, 
TRUE, FALSE, FALSE);
+  UpdateVariableInfo (VariableName, VendorGuid, Variable->Volatile, FALSE, 
TRUE, FALSE, FALSE, &gVariableInfo);
   Status = EFI_SUCCESS;
   goto Done;
 } else if ((CacheVariable->CurrPtr->State == VAR_ADDED) ||
@@ -2006,7 +2006,7 @@ UpdateVariable (
   CacheVariable->CurrPtr = (VARIABLE_HEADER *)((UINTN) 
CacheVariable->StartPtr + ((UINTN) Variable->CurrPtr - (UINTN) 
Variable->StartPtr));
   CacheVariable->InDeletedTransitionPtr = NULL;
 }
-UpdateVariableInfo (VariableName, VendorGuid, FALSE, FALSE, TRUE, 
FALSE, FALSE);
+UpdateVariableInfo (VariableName, VendorGuid, FALSE, FALSE, TRUE, 
FALSE, FALSE, &gVariableInfo);
 FlushHobVariableToFlash (VariableName, VendorGuid);
   } else {
 if (IsCommonUserVariable && ((VarSize + 
mVariableModuleGlobal->CommonUserVariableTotalSize) > 
mVariableModuleGlobal->CommonMaxUserVariableSpace)) {
@@ -2156,7 +2156,7 @@ UpdateVariable (
   CacheVariable->CurrPtr = (VARIABLE_HEADER *

[edk2-devel] [PATCH V7 04/10] MdeModulePkg/Variable: Parameterize auth status in VariableParsing

[Kubacki, Michael A]

The file VariableParsing.c provides generic functionality related
to parsing variable related structures and information. In order to
calculate offsets for certain operations, the functions must know if
authenticated variables are enabled as this increases the size of
variable headers.

This change removes linking against a global variable in an external file
in favor of passing the authenticated variable status as a parameter to
the variable parsing functions.

Cc: Dandan Bi 
Cc: Ard Biesheuvel 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Jiewen Yao 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h |  82 +--
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c| 258 
++--
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableExLib.c   |  15 +-
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.c | 146 +++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c |   5 +-
 5 files changed, 339 insertions(+), 167 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h
index 1777ce0e69..92a729d140 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h
@@ -49,53 +49,65 @@ GetVariableStoreStatus (
 /**
   This code gets the size of variable header.
 
+  @param[in]  AuthFormatTRUE indicates authenticated variables are used.
+FALSE indicates authenticated variables are not 
used.
+
   @return Size of variable header in bytes in type UINTN.
 
 **/
 UINTN
 GetVariableHeaderSize (
-  VOID
+  IN  BOOLEAN   AuthFormat
   );
 
 /**
 
   This code gets the size of name of variable.
 
-  @param VariablePointer to the Variable Header.
+  @param[in]  Variable  Pointer to the variable header.
+  @param[in]  AuthFormatTRUE indicates authenticated variables are used.
+FALSE indicates authenticated variables are not 
used.
 
   @return UINTN  Size of variable in bytes.
 
 **/
 UINTN
 NameSizeOfVariable (
-  IN  VARIABLE_HEADER   *Variable
+  IN  VARIABLE_HEADER   *Variable,
+  IN  BOOLEAN   AuthFormat
   );
 
 /**
   This code sets the size of name of variable.
 
-  @param[in] Variable   Pointer to the Variable Header.
-  @param[in] NameSize   Name size to set.
+  @param[in]  Variable  Pointer to the Variable Header.
+  @param[in]  NameSize  Name size to set.
+  @param[in]  AuthFormatTRUE indicates authenticated variables are used.
+FALSE indicates authenticated variables are not 
used.
 
 **/
 VOID
 SetNameSizeOfVariable (
   IN VARIABLE_HEADER*Variable,
-  IN UINTN  NameSize
+  IN UINTN  NameSize,
+  IN BOOLEANAuthFormat
   );
 
 /**
 
   This code gets the size of variable data.
 
-  @param VariablePointer to the Variable Header.
+  @param[in]  Variable  Pointer to the Variable Header.
+  @param[in]  AuthFormatTRUE indicates authenticated variables are used.
+FALSE indicates authenticated variables are not 
used.
 
   @return Size of variable in bytes.
 
 **/
 UINTN
 DataSizeOfVariable (
-  IN  VARIABLE_HEADER   *Variable
+  IN  VARIABLE_HEADER   *Variable,
+  IN  BOOLEAN   AuthFormat
   );
 
 /**
@@ -103,80 +115,98 @@ DataSizeOfVariable (
 
   @param[in] Variable   Pointer to the Variable Header.
   @param[in] DataSize   Data size to set.
+  @param[in] AuthFormat TRUE indicates authenticated variables are used.
+FALSE indicates authenticated variables are not used.
 
 **/
 VOID
 SetDataSizeOfVariable (
-  IN VARIABLE_HEADER*Variable,
-  IN UINTN  DataSize
+  IN  VARIABLE_HEADER   *Variable,
+  IN  UINTN DataSize,
+  IN  BOOLEAN   AuthFormat
   );
 
 /**
 
   This code gets the pointer to the variable name.
 
-  @param VariablePointer to the Variable Header.
+  @param[in] Variable Pointer to the Variable Header.
+  @param[in] AuthFormat   TRUE indicates authenticated variables are used.
+  FALSE indicates authenticated variables are not used.
 
   @return Pointer to Variable Name which is Unicode encoding.
 
 **/
 CHAR16 *
 GetVariableNamePtr (
-  IN  VARIABLE_HEADER   *Variable
+  IN  VARIABLE_HEADER   *Variable,
+  IN  BOOLEAN   AuthFormat
   );
 
 /**
   This code gets the pointer to the variable guid.
 
-  @param Variable   Pointer to the Variable Header.
+  @param[in] Variable Pointer to the Variable Header.
+  @param[in] AuthFormat   TRUE indicates authenticated variables are used.
+  FALSE indicates authenticated variables are not used.
 
   @return A EFI_GUID* pointer to Vendor Guid.
 
 **/
 EFI_GUID *
 GetVendorGuidPtr

[edk2-devel] [PATCH V7 01/10] MdeModulePkg/Variable: Consolidate common parsing functions

[Kubacki, Michael A]

This change moves the following functions into a dedicated file
so they may be used in other variable files as needed. These are
commonly needed for basic variable data structure parsing
operations. The functions are grouped together in VariableParsing.c
to support cohesiveness for these operations in the file.
Furthermore, it reduces the overall size of the common Variable.c
file.

 * DataSizeOfVariable ()
 * FindVariableEx ()
 * GetEndPointer ()
 * GetNextVariablePtr ()
 * GetStartPointer ()
 * GetVariableDataOffset ()
 * GetVariableDataPtr ()
 * GetVariableHeaderSize ()
 * GetVariableNamePtr ()
 * GetVariableStoreStatus ()
 * GetVendorGuidPtr ()
 * IsValidVariableHeader ()
 * NameSizeOfVariable ()
 * SetDataSizeOfVariable ()
 * SetNameSizeOfVariable ()
 * UpdateVariableInfo ()
 * VariableCompareTimeStampInternal ()
 * VariableServiceGetNextVariableInternal ()

Cc: Dandan Bi 
Cc: Ard Biesheuvel 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Jiewen Yao 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf   |   2 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf  |   2 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf |   2 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.h   | 119 
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.h| 306 

 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c   | 726 
+--
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableExLib.c  |   3 +-
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableParsing.c| 731 

 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c|   1 +
 9 files changed, 1047 insertions(+), 845 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
index 641376c9c5..c35e5fe787 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
@@ -36,6 +36,8 @@
   Variable.c
   VariableDxe.c
   Variable.h
+  VariableParsing.c
+  VariableParsing.h
   PrivilegePolymorphic.h
   Measurement.c
   TcgMorLockDxe.c
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
index 0a160d269d..626738b9c7 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
@@ -45,6 +45,8 @@
   Variable.c
   VariableTraditionalMm.c
   VariableSmm.c
+  VariableParsing.c
+  VariableParsing.h
   VarCheck.c
   Variable.h
   PrivilegePolymorphic.h
diff --git 
a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf
index 21bc81163b..ff714b193a 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf
@@ -45,6 +45,8 @@
   Variable.c
   VariableSmm.c
   VariableStandaloneMm.c
+  VariableParsing.c
+  VariableParsing.h
   VarCheck.c
   Variable.h
   PrivilegePolymorphic.h
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.h 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.h
index 9eac43759f..fb574b2e32 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.h
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.h
@@ -179,89 +179,6 @@ FindVariable (
   IN  BOOLEAN IgnoreRtCheck
   );
 
-/**
-
-  Gets the pointer to the end of the variable storage area.
-
-  This function gets pointer to the end of the variable storage
-  area, according to the input variable store header.
-
-  @param VarStoreHeader  Pointer to the Variable Store Header.
-
-  @return Pointer to the end of the variable storage area.
-
-**/
-VARIABLE_HEADER *
-GetEndPointer (
-  IN VARIABLE_STORE_HEADER   *VarStoreHeader
-  );
-
-/**
-  This code gets the size of variable header.
-
-  @return Size of variable header in bytes in type UINTN.
-
-**/
-UINTN
-GetVariableHeaderSize (
-  VOID
-  );
-
-/**
-
-  This code gets the pointer to the variable name.
-
-  @param VariablePointer to the Variable Header.
-
-  @return Pointer to Variable Name which is Unicode encoding.
-
-**/
-CHAR16 *
-GetVariableNamePtr (
-  IN  VARIABLE_HEADER   *Variable
-  );
-
-/**
-  This code gets the pointer to the variable guid.
-
-  @param Variable   Pointer to the Variable Header.
-
-  @return A EFI_GUID* pointer to Vendor Guid.
-
-**/
-EFI_GUID *
-GetVendorGuidPtr (
-  IN VARIABLE_HEADER*Variable
-  );
-
-/**
-
-  This code gets the pointer to the variable data.
-
-  @param VariablePointer to the Variable Header.
-
-  @return Pointer to Variable Data.
-
-**/
-UINT8 *
-GetVari

[edk2-devel] [PATCH V7 08/10] MdeModulePkg/Variable: Add RT GetNextVariableName() cache support

[Kubacki, Michael A]

https://bugzilla.tianocore.org/show_bug.cgi?id=2220

This change implements the Runtime Service GetNextVariableName()
using the runtime cache in VariableSmmRuntimeDxe. Runtime Service
calls to GetNextVariableName() will no longer trigger a SW SMI
when gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache
is set to TRUE (default value).

Overall system performance and stability will be improved by
eliminating an SMI for these calls as they typically result in a
relatively large number of invocations to retrieve all variable
names in all variable stores present.

Cc: Dandan Bi 
Cc: Ard Biesheuvel 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Jiewen Yao 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c | 137 
++--
 1 file changed, 128 insertions(+), 9 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
index 3dee05fded..d525998ae3 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
@@ -823,7 +823,7 @@ RuntimeServiceGetVariable (
 }
 
 /**
-  This code Finds the Next available variable.
+  Finds the next available variable in a runtime cache variable store.
 
   @param[in, out] VariableNameSize   Size of the variable name.
   @param[in, out] VariableName   Pointer to variable name.
@@ -836,8 +836,81 @@ RuntimeServiceGetVariable (
 
 **/
 EFI_STATUS
-EFIAPI
-RuntimeServiceGetNextVariableName (
+GetNextVariableNameInRuntimeCache (
+  IN OUT  UINTN *VariableNameSize,
+  IN OUT  CHAR16*VariableName,
+  IN OUT  EFI_GUID  *VendorGuid
+  )
+{
+  EFI_STATUS  Status;
+  UINTN   VarNameSize;
+  VARIABLE_HEADER *VariablePtr;
+  VARIABLE_STORE_HEADER   *VariableStoreHeader[VariableStoreTypeMax];
+
+  Status = EFI_NOT_FOUND;
+
+  //
+  // The UEFI specification restricts Runtime Services callers from invoking 
the same or certain other Runtime Service
+  // functions prior to completion and return from a previous Runtime Service 
call. These restrictions prevent
+  // a GetVariable () or GetNextVariable () call from being issued until a 
prior call has returned. The runtime
+  // cache read lock should always be free when entering this function.
+  //
+  ASSERT (!mVariableRuntimeCacheReadLock);
+
+  CheckForRuntimeCacheSync ();
+
+  mVariableRuntimeCacheReadLock = TRUE;
+  if (!mVariableRuntimeCachePendingUpdate) {
+//
+// 0: Volatile, 1: HOB, 2: Non-Volatile.
+// The index and attributes mapping must be kept in this order as 
FindVariable
+// makes use of this mapping to implement search algorithm.
+//
+VariableStoreHeader[VariableStoreTypeVolatile] = 
mVariableRuntimeVolatileCacheBuffer;
+VariableStoreHeader[VariableStoreTypeHob]  = 
mVariableRuntimeHobCacheBuffer;
+VariableStoreHeader[VariableStoreTypeNv]   = 
mVariableRuntimeNvCacheBuffer;
+
+Status =  VariableServiceGetNextVariableInternal (
+VariableName,
+VendorGuid,
+VariableStoreHeader,
+&VariablePtr,
+mVariableAuthFormat
+);
+if (!EFI_ERROR (Status)) {
+  VarNameSize = NameSizeOfVariable (VariablePtr, mVariableAuthFormat);
+  ASSERT (VarNameSize != 0);
+  if (VarNameSize <= *VariableNameSize) {
+CopyMem (VariableName, GetVariableNamePtr (VariablePtr, 
mVariableAuthFormat), VarNameSize);
+CopyMem (VendorGuid, GetVendorGuidPtr (VariablePtr, 
mVariableAuthFormat), sizeof (EFI_GUID));
+Status = EFI_SUCCESS;
+  } else {
+Status = EFI_BUFFER_TOO_SMALL;
+  }
+
+  *VariableNameSize = VarNameSize;
+}
+  }
+  mVariableRuntimeCacheReadLock = FALSE;
+
+  return Status;
+}
+
+/**
+  Finds the next available variable in a SMM variable store.
+
+  @param[in, out] VariableNameSize   Size of the variable name.
+  @param[in, out] VariableName   Pointer to variable name.
+  @param[in, out] VendorGuid Variable Vendor Guid.
+
+  @retval EFI_INVALID_PARAMETER  Invalid parameter.
+  @retval EFI_SUCCESSFind the specified variable.
+  @retval EFI_NOT_FOUND  Not found.
+  @retval EFI_BUFFER_TO_SMALLDataSize is too small for the result.
+
+**/
+EFI_STATUS
+GetNextVariableNameInSmm (
   IN OUT  UINTN *VariableNameSize,
   IN OUT  CHAR16*VariableName,
   IN OUT  EFI_GUID  *VendorGuid
@@ -849,10 +922,6 @@ RuntimeServiceGetNextVariableName (
   UINTN   OutVariableNameSize;
   UINTN   InVariableNameSize;
 
-  if

[edk2-devel] [PATCH V7 00/10] UEFI Variable SMI Reduction

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2220

V7 Changes:
 [PATCH V6 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache support
 * Remove VariableRuntimeCache.c and VariableRuntimeCache.h from
   VariableSmmRuntimeDxe.inf since they are not needed to build the module.

V6 Changes:
 [PATCH V5 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache support
 The most significant change is:
 * Free mVariableRuntimeHobCacheBuffer in CheckForRuntimeCacheSync () in
   VariableSmmRuntimeDxe.c with FreePages () instead of FreePool ().
 This issue was not found in earlier testing because on the initial set of
 platforms tested, the variable HOB flush was finished prior to the variable
 HOB runtime cache buffer being allocated so the FreePages () call was not
 executed.

 The remaining changes did not affect testing but are included for robustness:
 * Pass EFI_OPTIONAL_PTR for the DebugDisposition type in the EfiConvertPointer 
()
   calls for mVariableRuntimeHobCacheBuffer, mVariableRuntimeNvCacheBuffer, and
   mVariableRuntimeVolatileCacheBuffer in VariableAddressChangeEvent () in
   VariableSmmRuntimeDxe.c as these buffers will not be allocated if the runtime
   cache is disabled.
 * In the SMM_VARIABLE_FUNCTION_INIT_RUNTIME_VARIABLE_CACHE_CONTEXT case in
   SmmVariableHandler () in VariableSmm.c, explicitly verify that
   VariableRuntimeHobCache.Store is not NULL in addition to checking that
   VariableGlobal.HobVariableBase is not set to zero (variable HOB is flushed)
   before writing to VariableRuntimeHobCache.Store.

V5 Changes:
 [PATCH V4 07/10] MdeModulePkg/Variable: Add RT GetVariable() cache support
 * Increased validation of the runtime buffers passed in the SMM comm buffer
   SMM_VARIABLE_COMMUNICATE_RUNTIME_VARIABLE_CACHE_CONTEXT structure to the
   SMM_VARIABLE_FUNCTION_INIT_RUNTIME_VARIABLE_CACHE_CONTEXT function in
   SmmVariableHandler () in VariableSmm.c.
 * Most notably, each runtime buffer given is checked to ensure its memory
   range does not overlap with SMRAM ranges via 
VariableSmmIsBufferOutsideSmmValid ().

V4 Changes:
 [PATCH V3 7/9] MdeModulePkg/Variable: Add RT GetVariable() cache support
 * Set gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache to FALSE
   by default in MdeModulePkg.dec.

 * Added a new patch to set 
gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache
   to TRUE at the end of the patch series. This allows someone to bisect an 
issue at
   patch #7 or patch #8 in the series with no change in variable caching 
behavior. The
   runtime cache variable logic would be applied explicitly in V4 patch #10.

V3 Changes:
 [PATCH V2 1/9] MdeModulePkg/Variable: Consolidate common parsing functions
 * Removed GUIDs added to VariableStandaloneMm.inf that are not required.
 * Added more details to the commit message describing the criteria of
   moving the chosen functions to VariableParsing.c.

 [PATCH V2 2/9] MdeModulePkg/Variable: Parameterize GetNextVariableEx() store 
list
 * RenamedGetNextVariableEx () to VariableServiceGetNextVariableInternal ()
 * Updated comments in VariableServiceGetNextVariableInternal () to refer to
   "FindVariablEx ()" instead of "FindVariable ()" since FindVariableEx ()
   is not used in the function.

 [PATCH V2 3/9] MdeModulePkg/Variable: Parameterize VARIABLE_INFO_ENTRY buffer
 * Updated the commit message to clarify the message "structure can be updated
   outside the fixed global variable".

 [edk2-devel] [PATCH V2 4/9] MdeModulePkg/Variable: Add local auth status in 
VariableParsing
 * Remove the function InitVariableParsing ()
 * Remove the mAuthFormat global variable and instead add a BOOLEAN parameter
   to all functions that require variable authentication information  to
   indicate if authenticated variables are used.
   * This allows the authenticated variable status to be tracked in one place in
 each variable driver in the SMM variable solution (VariableSmmRuntimeDxe
 and VariableSmm).

 [edk2-devel] [PATCH V2 5/9] MdeModulePkg/Variable: Add a file for NV variable 
functions
 * Added the following non-volatile related functions to VariableNonVolatile.c
   from Variable.c:
   * InitRealNonVolatileVariableStore ()
   * InitEmuNonVolatileVariableStore ()
   * InitNonVolatileVariableStore ()

 [edk2-devel] [PATCH V2 7/9] MdeModulePkg/Variable: Add RT GetVariable() cache 
support
 * Added a FeaturePCD to control enabling the runtime variable cache -
   gEfiMdeModulePkgTokenSpaceGuid.PcdEnableVariableRuntimeCache.
 * Removed usage of the TimerLib and the wait to acquire
   mVariableRuntimeCacheReadLock. Can rely on the UEFI specification
   restrictions on Runtime Services callers.
 * Removed the EFIAPI keyword from internal functions.
 * Removed PCDs in VariableSmmRuntimeDxe.inf not required.
 * Removed the HobVariableBackupBase variable no longer required.
 * Renamed SynchronizeRuntimeVariableCacheEx () to better reflect usage.
 * Renamed functions in VariableRuntimeCache.c to better reflect usage

[edk2-devel] [PATCH V7 06/10] MdeModulePkg VariableInfo: Always consider RT DXE and SMM stats

[Kubacki, Michael A]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2220

The current VariableInfo application only checks for variable
statistics from SMM if the variable information entries are
not present in the UEFI System Configuration table as published
by the DXE UEFI variable driver (VariableRuntimeDxe).

This change first checks for variable information entries in the
UEFI System Configuration but always checks for entries in SMM
as well. If the SMM variable driver is not present, an instance of
EFI_SMM_VARIABLE_PROTOCOL will not be found and the search for
SMM variable statistics will be aborted (an SW SMI to get variable
statistics will not be triggered).

In the case variable statistics are provided by both a Runtime DXE
driver (e.g. VariableSmmRuntimeDxe) and a SMM driver (VariableSmm),
this change will clearly identify statistics from each respective
driver.

Cc: Dandan Bi 
Cc: Ard Biesheuvel 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Jiewen Yao 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/Application/VariableInfo/VariableInfo.c | 37 ++--
 1 file changed, 18 insertions(+), 19 deletions(-)

diff --git a/MdeModulePkg/Application/VariableInfo/VariableInfo.c 
b/MdeModulePkg/Application/VariableInfo/VariableInfo.c
index f213471e9a..c04ba18213 100644
--- a/MdeModulePkg/Application/VariableInfo/VariableInfo.c
+++ b/MdeModulePkg/Application/VariableInfo/VariableInfo.c
@@ -3,7 +3,7 @@
   this utility will print out the statistics information. You can use console
   redirection to capture the data.
 
-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -126,7 +126,7 @@ PrintInfoFromSmm (
   ASSERT (CommBuffer != NULL);
   ZeroMem (CommBuffer, RealCommSize);
 
-  Print (L"Non-Volatile SMM Variables:\n");
+  Print (L"SMM Driver Non-Volatile Variables:\n");
   do {
 CommSize = RealCommSize;
 Status = GetVariableStatisticsData (CommBuffer, &CommSize);
@@ -155,7 +155,7 @@ PrintInfoFromSmm (
 }
   } while (TRUE);
 
-  Print (L"Volatile SMM Variables:\n");
+  Print (L"SMM Driver Volatile Variables:\n");
   ZeroMem (CommBuffer, RealCommSize);
   do {
 CommSize = RealCommSize;
@@ -207,24 +207,18 @@ UefiMain (
   IN EFI_SYSTEM_TABLE  *SystemTable
   )
 {
-  EFI_STATUSStatus;
+  EFI_STATUSRuntimeDxeStatus;
+  EFI_STATUSSmmStatus;
   VARIABLE_INFO_ENTRY   *VariableInfo;
   VARIABLE_INFO_ENTRY   *Entry;
 
-  Status = EfiGetSystemConfigurationTable (&gEfiVariableGuid, (VOID **)&Entry);
-  if (EFI_ERROR (Status) || (Entry == NULL)) {
-Status = EfiGetSystemConfigurationTable (&gEfiAuthenticatedVariableGuid, 
(VOID **)&Entry);
+  RuntimeDxeStatus = EfiGetSystemConfigurationTable (&gEfiVariableGuid, (VOID 
**) &Entry);
+  if (EFI_ERROR (RuntimeDxeStatus) || (Entry == NULL)) {
+RuntimeDxeStatus = EfiGetSystemConfigurationTable 
(&gEfiAuthenticatedVariableGuid, (VOID **) &Entry);
   }
 
-  if (EFI_ERROR (Status) || (Entry == NULL)) {
-Status = PrintInfoFromSmm ();
-if (!EFI_ERROR (Status)) {
-  return Status;
-}
-  }
-
-  if (!EFI_ERROR (Status) && (Entry != NULL)) {
-Print (L"Non-Volatile EFI Variables:\n");
+  if (!EFI_ERROR (RuntimeDxeStatus) && (Entry != NULL)) {
+Print (L"Runtime DXE Driver Non-Volatile EFI Variables:\n");
 VariableInfo = Entry;
 do {
   if (!VariableInfo->Volatile) {
@@ -242,7 +236,7 @@ UefiMain (
   VariableInfo = VariableInfo->Next;
 } while (VariableInfo != NULL);
 
-Print (L"Volatile EFI Variables:\n");
+Print (L"Runtime DXE Driver Volatile EFI Variables:\n");
 VariableInfo = Entry;
 do {
   if (VariableInfo->Volatile) {
@@ -258,14 +252,19 @@ UefiMain (
   }
   VariableInfo = VariableInfo->Next;
 } while (VariableInfo != NULL);
+  }
 
-  } else {
+  SmmStatus = PrintInfoFromSmm ();
+
+  if (EFI_ERROR (RuntimeDxeStatus) && EFI_ERROR (SmmStatus)) {
 Print (L"Warning: Variable Dxe/Smm driver doesn't enable the feature of 
statistical information!\n");
 Print (L"If you want to see this info, please:\n");
 Print (L"  1. Set PcdVariableCollectStatistics as TRUE\n");
 Print (L"  2. Rebuild Variable Dxe/Smm driver\n");
 Print (L"  3. Run \"VariableInfo\" cmd again\n");
+
+return EFI_NOT_FOUND;
   }
 
-  return Status;
+  return EFI_SUCCESS;
 }
-- 
2.16.2.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49826): https://edk2.groups.io/g/devel/message/49826
Mute This Topic: https://groups.io/mt/40450376/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [PATCH V7 05/10] MdeModulePkg/Variable: Add a file for NV variable functions

[Kubacki, Michael A]

This change adds a dedicated file for variable operations specific
to non-volatile variables. This decreases the overall length of the
relatively large Variable.c file.

Cc: Dandan Bi 
Cc: Ard Biesheuvel 
Cc: Eric Dong 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Jiewen Yao 
Signed-off-by: Michael Kubacki 
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf   |   2 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf  |   2 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf |   2 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableNonVolatile.h|  67 
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c   | 317 
+--
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableNonVolatile.c| 334 

 6 files changed, 408 insertions(+), 316 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
index c35e5fe787..08a5490787 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
@@ -36,6 +36,8 @@
   Variable.c
   VariableDxe.c
   Variable.h
+  VariableNonVolatile.c
+  VariableNonVolatile.h
   VariableParsing.c
   VariableParsing.h
   PrivilegePolymorphic.h
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
index 626738b9c7..6dc2721b81 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
@@ -45,6 +45,8 @@
   Variable.c
   VariableTraditionalMm.c
   VariableSmm.c
+  VariableNonVolatile.c
+  VariableNonVolatile.h
   VariableParsing.c
   VariableParsing.h
   VarCheck.c
diff --git 
a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf
index ff714b193a..f8a3742959 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableStandaloneMm.inf
@@ -45,6 +45,8 @@
   Variable.c
   VariableSmm.c
   VariableStandaloneMm.c
+  VariableNonVolatile.c
+  VariableNonVolatile.h
   VariableParsing.c
   VariableParsing.h
   VarCheck.c
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableNonVolatile.h 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableNonVolatile.h
new file mode 100644
index 00..43653f27e6
--- /dev/null
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableNonVolatile.h
@@ -0,0 +1,67 @@
+/** @file
+  Common variable non-volatile store routines.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _VARIABLE_NON_VOLATILE_H_
+#define _VARIABLE_NON_VOLATILE_H_
+
+#include "Variable.h"
+
+/**
+  Get non-volatile maximum variable size.
+
+  @return Non-volatile maximum variable size.
+
+**/
+UINTN
+GetNonVolatileMaxVariableSize (
+  VOID
+  );
+
+/**
+  Init emulated non-volatile variable store.
+
+  @param[out] VariableStoreBase Output pointer to emulated non-volatile 
variable store base.
+
+  @retval EFI_SUCCESS   Function successfully executed.
+  @retval EFI_OUT_OF_RESOURCES  Fail to allocate enough memory resource.
+
+**/
+EFI_STATUS
+InitEmuNonVolatileVariableStore (
+  EFI_PHYSICAL_ADDRESS  *VariableStoreBase
+  );
+
+/**
+  Init real non-volatile variable store.
+
+  @param[out] VariableStoreBase Output pointer to real non-volatile variable 
store base.
+
+  @retval EFI_SUCCESS   Function successfully executed.
+  @retval EFI_OUT_OF_RESOURCES  Fail to allocate enough memory resource.
+  @retval EFI_VOLUME_CORRUPTED  Variable Store or Firmware Volume for Variable 
Store is corrupted.
+
+**/
+EFI_STATUS
+InitRealNonVolatileVariableStore (
+  OUT EFI_PHYSICAL_ADDRESS  *VariableStoreBase
+  );
+
+/**
+  Init non-volatile variable store.
+
+  @retval EFI_SUCCESS   Function successfully executed.
+  @retval EFI_OUT_OF_RESOURCES  Fail to allocate enough memory resource.
+  @retval EFI_VOLUME_CORRUPTED  Variable Store or Firmware Volume for Variable 
Store is corrupted.
+
+**/
+EFI_STATUS
+InitNonVolatileVariableStore (
+  VOID
+  );
+
+#endif
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c 
b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
index 2e32905dfe..0bd2f22e1a 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -23,6 +23,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
 #include "Variable.h"
+#include "VariableNonVolatile.h"
 #include "VariableParsing.h"
 
 VARIABLE_MODULE_GLOBAL  *mVariableModuleGlobal;
@@ -3079,25 +3080,6 @@ ReclaimForOS(
   }
 }
 
-/**
-  Get non-volatile maximum v

Re: [edk2-devel] [PATCH v1 0/2] Update the SRAT Acpiview parser to ACPI 6.3

[Sudipto Paul]

Tested-by: Sudipto Paul https://community.arm.com/developer/tools-software/oss-platforms/w/docs/440/neoverse-n1-sdp


-Sudipto

-Original Message-
From: Sami Mujawar 
Sent: 21 October 2019 17:06
To: Krzysztof Koch ; devel@edk2.groups.io
Cc: jaben.car...@intel.com; ray...@intel.com; zhichao@intel.com; 
michael.d.kin...@intel.com; liming@intel.com; Matteo Carlini 
; nd ; Deepak Pandey 
; Sudipto Paul 
Subject: RE: [PATCH v1 0/2] Update the SRAT Acpiview parser to ACPI 6.3

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

-Original Message-
From: Krzysztof Koch 
Sent: 12 June 2019 03:10 PM
To: devel@edk2.groups.io
Cc: jaben.car...@intel.com; ray...@intel.com; zhichao@intel.com; 
michael.d.kin...@intel.com; liming@intel.com; Sami Mujawar 
; Matteo Carlini ; Stephanie 
Hughes-Fitt ; nd 
Subject: [PATCH v1 0/2] Update the SRAT Acpiview parser to ACPI 6.3

This patch adds a number of definitions to the ACPI 6.3 header file for the 
purpose of parsing Revision 3 of the System Resource Affinity Table
(SRAT) in the Acpiview UEFI shell tool.

By defining the Generic Initiator Affinity Structure's Type ID and the allowed 
Device Handle Types for the structure, it is possible to dump and validate the 
contents of the latest version of the SRAT table in acpiview.

References:
- ACPI 6.3 January 2019, Section 5.2.16.6

Changes can be seen at: 
https://github.com/KrzysztofKoch1/edk2/tree/582_acpiview_6_3_srat_v1

Krzysztof Koch (2):
  MdePkg: Add Generic Initiator Affinity Structure definitions to SRAT
  ShellPkg: acpiview: Update SRAT parser to ACPI 6.3

 MdePkg/Include/IndustryStandard/Acpi63.h   |  11 +-
 ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.c  |  35 
++-
 ShellPkg/Library/UefiShellAcpiViewCommandLib/AcpiParser.h  |  16 ++
 ShellPkg/Library/UefiShellAcpiViewCommandLib/Parsers/Srat/SratParser.c | 256 
+++-
 4 files changed, 309 insertions(+), 9 deletions(-)

--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'



IMPORTANT NOTICE: The contents of this email and any attachments are 
confidential and may also be privileged. If you are not the intended recipient, 
please notify the sender immediately and do not disclose the contents to any 
other person, use it for any purpose, or store or copy the information in any 
medium. Thank you.

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49819): https://edk2.groups.io/g/devel/message/49819
Mute This Topic: https://groups.io/mt/32042460/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

Re: [edk2-devel] How /sys/firmware/fdt getting created

[Bhupesh Sharma]

Hi Prabhakar,


On Fri, Nov 1, 2019 at 10:22 AM Prabhakar Kushwaha
 wrote:
>
> Hi Bhupesh,
>
> On Fri, Nov 1, 2019 at 1:59 AM Bhupesh Sharma  wrote:
> >
> > Hi Prabhakar,
> >
> > On Wed, Oct 30, 2019 at 1:47 PM Prabhakar Kushwaha
> >  wrote:
> > >
> > > On Wed, Oct 30, 2019 at 1:14 PM Ard Biesheuvel
> > >  wrote:
> > > >
> > > > On Wed, 30 Oct 2019 at 08:36, Prabhakar Kushwaha
> > > >  wrote:
> > > > >
> > > > > On Wed, Oct 30, 2019 at 12:43 PM Ard Biesheuvel
> > > > >  wrote:
> > > > > >
> > > > > > On Tue, 29 Oct 2019 at 18:17, Prabhakar Kushwaha
> > > > > >  wrote:
> > > > > > >
> > > > > > > Hi All,
> > > > > > >
> > > > > > > I am working on Ubuntu-18.04 with UEFI on ARM64(64 bit) platform. 
> > > > > > > The
> > > > > > > UEFI used is having ACPI tables.
> > > > > > >
> > > > > > > I am trying to understand where and how /sys/firmware/fdt is 
> > > > > > > getting
> > > > > > > created. is it created by UEFI or grub and passed to Linux?
> > > > > > >
> > > > > >
> > > > > > Neither. It is created by Linux itself.
> > > > > >
> > > > > >
> > > > > >
> > > > >
> > > > > Thanks Ard,
> > > > >
> > > > > Can you please point me the code where it is getting created.
> > > > > I want to add below in /sys/firmware/fdt.
> > > > >
> > > > > #size-cells = <0x02>;
> > > > > #address-cells = <0x02>;
> > > > >
> > > >
> > > > Actually, in your case it is GRUB not the kernel that creates the FDT.
> > > > It does this to pass the initrd information.
> > > >
> > > > So if you want to add these properties, you should add them there.
> > > >
> > > > Can you explain why doing this is necessary?
> > >
> > > I am trying to test kexec -p (kdump feature) on CentOS-release
> > > 7.7.1908 and Ubuntu-18.04 distributions.
> > >
> > >  "kexec -p" command show error on Ubuntu. While no error on CentOS
> > >
> > > CentOS:
> > > $ kexec -p /boot/vmlinuz-`uname -r` --initrd=/boot/initramfs-`uname
> > > -r`.img --reuse-cmdline
> > > $==> No error
> > >
> > > Ubuntu
> > > $ kexec -p /boot/vmlinuz-`uname -r` --initrd=/boot/initrd.img-`uname
> > > -r` --reuse-cmdline
> > > $ kexec: elfcorehdr doesn't fit cells-size.
> > > $ kexec: setup_2nd_dtb failed.
> > > $ kexec: load failed.
> > > $ Cannot load /boot/vmlinuz-5.4.0-rc4+
> > >
> > > Note: Both CentOS and Ubuntu has Linux-5.4-rc4 tag.
> > >
> > > When i debugged further reason for Ubuntu error is due to
> > > address-cells and size-cells as "1"
> > > log from kexec tool :-
> > > load_crashdump_segments: elfcorehdr 0x7f7cbfc000-0x7f7cbff7ff
> > > read_1st_dtb: found name =dtb_sys  /sys/firmware/fdt
> > > get_cells_size: #address-cells:1 #size-cells:1
> > >
> > > On CentOS both values are "2".
> > > log from kexec tool :-
> > > load_crashdump_segments: elfcorehdr 0xbf98bf-0xbf98bf33ff
> > > read_1st_dtb: found nmae=dtb_sys /sys/firmware/fdt
> > > get_cells_size: #address-cells:2 #size-cells:2
> > >
> > > Note: Kexec tool read values from /sys/firmware/fdt.
> > >
> > > I am trying to figure out why 2 distributions showing different values.
> >
> > There are a couple of things I can suggest:
> >
> > 1. Try to see if it is a kexec-tools specific issue or is the kernel
> > itself passed an incorrectly fixed DTB (by grub?) with incorrect
> > #address-cells and #size-cells values (in the past I have seen
> > kexec-tools sometimes reports incorrect #address-cells and #size-cells
> > values, but they should be fixed in the newer kexec-tools versions):
> >
> > a). Can you check the kexec-tools version and share the same:
> > $ kexec -v
> >
> > b). Using 'dtc' tool, you can confirm if it reports a correct
> > #address-cells and #size-cells values:
> > # dtc -I dtb -O dts /sys/firmware/fdt | grep cells | less
> >
> > For e.g on my fedora arm64 system, it reports:
> > #address-cells = <0x2>;
> > #size-cells = <0x2>;
> >
> > 2a). If its not a kexec-tools specific issue, it is most probably a
> > bootloader (grub?) issue in your case:
> >
> > For e.g. I use the following grub2 on my Fedora arm64 board:
> > 
> > and 
> > 
> > contains the changes to send the correct #address-cells and
> > #size-cells values to Linux (and hence user-space tools like
> > kexec-tools later).
> >
> > I believe the same grub2 is used (backported) for CentOS, so things
> > should be fine there.
> >
> > 2b). I see that the latest devel branch of ubuntu grub2
> > () also contains this
> > fix, but I am not sure which grub2 version you have on your ubuntu
> > machine.
> >
>
> Ubuntu 18.04 has grub 2.02. When i migrated to grub 2.05, this issue
> is not there.
> Most probably the patch which is mentioned by Laszlo done the fix.
>
> http://git.savannah.gnu.org/cgit/grub.git/commit/?id=347210a5d5ce655b95315f320faa515afb723c11

That's good news. I am also glad its not a kexec-tools issues which I
need to fix :)
Thanks for sharing the update.

Regards,
Bhupesh

Re: [edk2-devel] How /sys/firmware/fdt getting created

[dann frazier]

On Fri, Nov 01, 2019 at 10:17:30AM +0530, Prabhakar Kushwaha wrote:
> On Fri, Nov 1, 2019 at 2:04 AM dann frazier  
> wrote:
> >
> > On Thu, Oct 31, 2019 at 12:55:10PM -0600, dann frazier wrote:
> > > On Thu, Oct 31, 2019 at 6:16 AM Leif Lindholm  
> > > wrote:
> > > >
> > > > On Thu, Oct 31, 2019 at 11:07:52AM +0100, Laszlo Ersek wrote:
> > > > > +Leif, comment at bottom
> > > >
> > > > Thanks Laszlo. +Dann, -kexec.
> > > >
> > > > > On 10/30/19 09:16, Prabhakar Kushwaha wrote:
> > > > > >> So if you want to add these properties, you should add them there.
> > > > > >>
> > > > > >> Can you explain why doing this is necessary?
> > > > > >
> > > > > > I am trying to test kexec -p (kdump feature) on CentOS-release
> > > > > > 7.7.1908 and Ubuntu-18.04 distributions.
> > > > > >
> > > > > >  "kexec -p" command show error on Ubuntu. While no error on CentOS
> > > > > >
> > > > > > CentOS:
> > > > > > $ kexec -p /boot/vmlinuz-`uname -r` --initrd=/boot/initramfs-`uname
> > > > > > -r`.img --reuse-cmdline
> > > > > > $==> No error
> > > > > >
> > > > > > Ubuntu
> > > > > > $ kexec -p /boot/vmlinuz-`uname -r` --initrd=/boot/initrd.img-`uname
> > > > > > -r` --reuse-cmdline
> > > > > > $ kexec: elfcorehdr doesn't fit cells-size.
> > > > > > $ kexec: setup_2nd_dtb failed.
> > > > > > $ kexec: load failed.
> > > > > > $ Cannot load /boot/vmlinuz-5.4.0-rc4+
> > > > > >
> > > > > > Note: Both CentOS and Ubuntu has Linux-5.4-rc4 tag.
> > > > > >
> > > > > > When i debugged further reason for Ubuntu error is due to
> > > > > > address-cells and size-cells as "1"
> > > > > > log from kexec tool :-
> > > > > > load_crashdump_segments: elfcorehdr 0x7f7cbfc000-0x7f7cbff7ff
> > > > > > read_1st_dtb: found name =dtb_sys  /sys/firmware/fdt
> > > > > > get_cells_size: #address-cells:1 #size-cells:1
> > > > > >
> > > > > > On CentOS both values are "2".
> > > > > > log from kexec tool :-
> > > > > > load_crashdump_segments: elfcorehdr 0xbf98bf-0xbf98bf33ff
> > > > > > read_1st_dtb: found nmae=dtb_sys /sys/firmware/fdt
> > > > > > get_cells_size: #address-cells:2 #size-cells:2
> > > > > >
> > > > > > Note: Kexec tool read values from /sys/firmware/fdt.
> > > > > >
> > > > > > I am trying to figure out why 2 distributions showing different 
> > > > > > values.
> > > > >
> > > > > http://git.savannah.gnu.org/cgit/grub.git/commit/?id=347210a5d5ce655b95315f320faa515afb723c11
> > > > >
> > > > > Ubuntu probably ships a grub version that lacks this commit.
> > > >
> > > > Yes, it came after the 18.04 release.
> > > > Dann: given that 18.04 is LTS, would it be reasonable to cherry-pick
> > > > this grub patch? I would consider the behaviour without it to be a
> > > > bug.
> > >
> > > Leif,
> > >
> > >   Likely - I'll run some tests and get back to you...
> >
> > Can you help me understand the scenario in which the above patch is
> > required? I tested an 18.04 VM w/ AAVMF (ACPI-mode), and kexec -p
> > worked fine. I also verified that 18.04 does not carry the above patch.
> >
> 
> This issue is only visible when crashkernel region reserved beyond 4GB
> by kernel.
> I reproduced this issue by providing "crashkernel=2G" in bootargs.

Prabhakar,

Thanks. I was able to reproduce w/ crashkernel=1G@4G.

In order to get this addressed in 18.04 we'll need a LP bug to track
it - would you mind filing one at
https://bugs.launchpad.net/ubuntu/+source/grub2 and subscribing me
(lpid dannf) to it?

  -dann

> 
> if kernel is not reserving memory due to crashkernel region
> overlapping with "reserved regions", you can apply below patch.
> https://patchwork.kernel.org/patch/10144305/
> 
> Update: When I migrated ubuntu grub to 2.05 this issue is gone.
> 
> --pk

-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49817): https://edk2.groups.io/g/devel/message/49817
Mute This Topic: https://groups.io/mt/39480086/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 08/12] PciBusDxe: New PCI feature Max_Payload_Size

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194

The code changes are made to enable the configuration of new PCI feature
Max_Payload_Size (MPS), which defines the data packet size for the PCI
transactions, as per the PCI Base Specification 4 Revision 1.

The code changes are made to calibrate highest common value that is appl-
icable to all the child nodes originating from the primary parent root
port of the root bridge instance.

This programming of MPS is based on each PCI device's capability, and also
its device-specific platform policy obtained using the new PCI Platform
Protocol interface, defined in the below record:-
https://bugzilla.tianocore.org/show_bug.cgi?id=1954

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h |   4 
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c  | 157 
+
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h  |   5 +
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c |  59 
+++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h |  32 

 5 files changed, 257 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index dc29ef3..065ae54 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -286,6 +286,10 @@ struct _PCI_IO_DEVICE {
   // This field is used to support this case.
   //
   UINT16BridgeIoAlignment;
+  //
+  // Other PCI features setup flags
+  //
+  UINT8 SetupMPS;
 };
 
 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
index df9e696..8fdaa05 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
@@ -582,6 +582,146 @@ IsPciRootPortEmpty (
   return FALSE;
 }
 
+/**
+  The main routine which process the PCI feature Max_Payload_Size as per the
+  device-specific platform policy, as well as in complaince with the PCI Base
+  specification Revision 4, that aligns the value for the entire PCI heirarchy
+  starting from its physical PCI Root port / Bridge device.
+
+  @param PciDevice  A pointer to the PCI_IO_DEVICE.
+  @param PciConfigPhase for the PCI feature configuration 
phases:
+PciFeatureGetDevicePolicy & 
PciFeatureSetupPhase
+  @param PciFeaturesConfigurationTable  pointer to 
OTHER_PCI_FEATURES_CONFIGURATION_TABLE
+
+  @retval EFI_SUCCESS   processing of PCI feature 
Max_Payload_Size
+is successful.
+**/
+EFI_STATUS
+ProcessMaxPayloadSize (
+  IN  PCI_IO_DEVICE   *PciDevice,
+  IN  PCI_FEATURE_CONFIGURATION_PHASE PciConfigPhase,
+  IN  OTHER_PCI_FEATURES_CONFIGURATION_TABLE  *PciFeaturesConfigurationTable
+  )
+{
+  PCI_REG_PCIE_DEVICE_CAPABILITY  PciDeviceCap;
+  UINT8   MpsValue;
+
+
+  PciDeviceCap.Uint32 = PciDevice->PciExpStruct.DeviceCapability.Uint32;
+
+  if (PciConfigPhase == PciFeatureGetDevicePolicy) {
+if (SetupMpsAsPerDeviceCapability (PciDevice->SetupMPS)) {
+  MpsValue = (UINT8)PciDeviceCap.Bits.MaxPayloadSize;
+  //
+  // no change to PCI Root ports without any endpoint device
+  //
+  if (IS_PCI_BRIDGE (&PciDevice->Pci) && PciDeviceCap.Bits.MaxPayloadSize) 
{
+if (IsPciRootPortEmpty (PciDevice)) {
+  MpsValue = PCIE_MAX_PAYLOAD_SIZE_128B;
+}
+  }
+} else {
+  MpsValue = TranslateMpsSetupValueToPci (PciDevice->SetupMPS);
+}
+//
+// discard device policy override request if greater than PCI device 
capability
+//
+PciDevice->SetupMPS = MIN ((UINT8)PciDeviceCap.Bits.MaxPayloadSize, 
MpsValue);
+  }
+
+  //
+  // align the MPS of the tree to the HCF with this device
+  //
+  if (PciFeaturesConfigurationTable) {
+MpsValue = PciFeaturesConfigurationTable->Max_Payload_Size;
+
+MpsValue = MIN (PciDevice->SetupMPS, MpsValue);
+PciDevice->SetupMPS = MIN (PciDevice->SetupMPS, MpsValue);
+
+if (MpsValue != PciFeaturesConfigurationTable->Max_Payload_Size) {
+  PciFeaturesConfigurationTable->Max_Payload_Size = MpsValue;
+}
+  }
+
+  DEBUG (( DEBUG_INFO,
+  "MPS: %d [DevCap:%d],",
+  PciDevice->SetupMPS, PciDeviceCap.Bits.MaxPayloadSize
+  ));
+  return EFI_SUCCESS;
+}
+
+/**
+  Overrides the PCI Device Control register MaxPayloadSize register field; if
+  the hardware value is different than the intended value.
+
+  @param  PciDevice A pointer to 

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 12/12] PciBusDxe: New PCI feature Completion Timeout

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2313

The code changes are made; as per the PCI Base Specification 4 Revision
1; to enable the configuration of new PCI feature Completion Timeout
(CTO), which enables the PCI function to wait on programmed duration for
its transactions before timeout, or disable its detection mechanism.

The code changes are made to configure only those PCI devices which are
requested to override by platform through the new PCI Platform protocol
interface for device-specific policies. The changes are made to also com-
ply with the device-specific capability attributes.

The code follows the below implementation specific rules in case the req-
uested platform policy does not match with the device-specific capability
attributes:-
(1) if device is capable of Range A only and if platform ask for any of
ranges B, C, D; than this implementation will only program the default
range value for the duration of 50us to 50ms
(2) if device is capable of Range B, or range B & C, or Ranges B, C & D
only and if the platform ask for the Range A; than this implementation
will only program the default range value for the duration of 50us to
50ms
(3) if the device is capable of Range B only, or the ranges A & B; and if
the platform ask for Range C, or Range D values, than this implement-
ation will only program the Range B value for the duration of 65ms to
210ms
(4) if the device is capable of Ranges B & C, or Ranges A, B, and C; and
if the platform ask for Range D values; than this implementation will
only program the Range C for the duration of 1s to 3.5s


Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h |   1 +
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c  | 413 
+
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c |  84 

 3 files changed, 498 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index be1c341..b6ec14f 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -294,6 +294,7 @@ struct _PCI_IO_DEVICE {
   UINT8 SetupMRRS;
   PCI_FEATURE_POLICYSetupRO;
   PCI_FEATURE_POLICYSetupNS;
+  PCI_FEATURE_POLICYSetupCTO;
 };
 
 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
index a7f0a2f..ba0de0d 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
@@ -765,6 +765,294 @@ ProcessMaxReadReqSize (
   return EFI_SUCCESS;
 }
 
+/**
+  To determine the CTO Range A values
+
+  @param  CtoValueinput CTO range value from 0 to 14
+  @retval TRUEthe given CTO value belongs to Range A
+  FALSE   the given value does not belong to Range A
+**/
+BOOLEAN
+IsCtoRangeA (
+  IN  UINT8   CtoValue
+  )
+{
+  switch (CtoValue) {
+case  PCIE_COMPLETION_TIMEOUT_50US_100US:
+case  PCIE_COMPLETION_TIMEOUT_1MS_10MS:
+  return TRUE;
+  }
+  return FALSE;
+}
+
+/**
+  To determine the CTO Range B values
+
+  @param  CtoValueinput CTO range value from 0 to 14
+  @retval TRUEthe given CTO value belongs to Range B
+  FALSE   the given value does not belong to Range B
+**/
+BOOLEAN
+IsCtoRangeB (
+  IN  UINT8   CtoValue
+  )
+{
+  switch (CtoValue) {
+case  PCIE_COMPLETION_TIMEOUT_16MS_55MS:
+case  PCIE_COMPLETION_TIMEOUT_65MS_210MS:
+  return TRUE;
+  }
+  return FALSE;
+}
+
+/**
+  To determine the CTO Range C values
+
+  @param  CtoValueinput CTO range value from 0 to 14
+  @retval TRUEthe given CTO value belongs to Range C
+  FALSE   the given value does not belong to Range C
+**/
+BOOLEAN
+IsCtoRangeC (
+  IN  UINT8   CtoValue
+  )
+{
+  switch (CtoValue) {
+case  PCIE_COMPLETION_TIMEOUT_260MS_900MS:
+case  PCIE_COMPLETION_TIMEOUT_1S_3_5S:
+  return TRUE;
+  }
+  return FALSE;
+}
+
+/**
+  To determine the CTO Range D values
+
+  @param  CtoValueinput CTO range value from 0 to 14
+  @retval TRUEthe given CTO value belongs to Range D
+  FALSE   the given value does not belong to Range D
+**/
+BOOLEAN
+IsCtoRangeD (
+  IN  UINT8   CtoValue
+  )
+{
+  switch (CtoValue) {
+case  PCIE

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 09/12] PciBusDxe: New PCI feature Max_Read_Req_Size

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194

The code changes are made to enable the configuration of new PCI feature
Max_Read_Req_Size (MRRS), which defines the memory read request size for
the PCI transactions, as per the PCI Base Specification 4 Revision 1.

The code changes are made to configure a common value that is applicable
to all the child nodes originating from the primary parent root port of
the root bridge instance, based on following 3 criteria:-
(1) if platform defines MRRS device policy for any one PCI device in the
 tree than align all the devices in the PCI tree to that same value
(2) if platform does not provide device policy for any of the devices in
the PCI tree than setup the MRRS value equivalent to MPS value for
all PCI devices to meet the criteria for the isochronous traffic
(3) if platform does not provide device policy for any of the devices in
the PCI tree and platform firmware policy has not selected the PCI
bus driver to configure the MPS; than configuration of the MRRS is
performed based on highest common value of the MPS advertized in the
PCI device capability registers of the PCI devices

This programming of MRRS gets the device-specific platform policy using
the new PCI Platform Protocol interface, defined in the below record:-
https://bugzilla.tianocore.org/show_bug.cgi?id=1954

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h |   1 +
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c  | 204 

 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h  |   9 +
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c |  59 
+++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h |  32 

 5 files changed, 305 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 065ae54..38abd20 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -290,6 +290,7 @@ struct _PCI_IO_DEVICE {
   // Other PCI features setup flags
   //
   UINT8 SetupMPS;
+  UINT8 SetupMRRS;
 };
 
 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
index 8fdaa05..614285f 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
@@ -650,6 +650,121 @@ ProcessMaxPayloadSize (
   return EFI_SUCCESS;
 }
 
+/**
+  The main routine which process the PCI feature Max_Read_Req_Size as per the
+  device-specific platform policy, as well as in complaince with the PCI Base
+  specification Revision 4, that aligns the value for the entire PCI heirarchy
+  starting from its physical PCI Root port / Bridge device.
+
+  @param PciDevice  A pointer to the PCI_IO_DEVICE.
+  @param PciConfigPhase for the PCI feature configuration 
phases:
+PciFeatureGetDevicePolicy & 
PciFeatureSetupPhase
+  @param PciFeaturesConfigurationTable  pointer to 
OTHER_PCI_FEATURES_CONFIGURATION_TABLE
+
+  @retval EFI_SUCCESS   processing of PCI feature 
Max_Read_Req_Size
+is successful.
+**/
+EFI_STATUS
+ProcessMaxReadReqSize (
+  IN  PCI_IO_DEVICE   *PciDevice,
+  IN  PCI_FEATURE_CONFIGURATION_PHASE PciConfigPhase,
+  IN  OTHER_PCI_FEATURES_CONFIGURATION_TABLE  *PciFeaturesConfigurationTable
+  )
+{
+  PCI_REG_PCIE_DEVICE_CAPABILITY  PciDeviceCap;
+  UINT8   MrrsValue;
+
+  PciDeviceCap.Uint32 = PciDevice->PciExpStruct.DeviceCapability.Uint32;
+
+  if (PciConfigPhase == PciFeatureGetDevicePolicy) {
+if (SetupMrrsAsPerDeviceCapability (PciDevice->SetupMRRS)) {
+  //
+  // The maximum read request size is not the data packet size of the TLP,
+  // but the memory read request size, and set to the function as a 
requestor
+  // to not exceed this limit.
+  // However, for the PCI device capable of isochronous traffic; this 
memory read
+  // request size should not extend beyond the Max_Payload_Size. Thus, in 
case if
+  // device policy return by platform indicates to set as per device 
capability
+  // than set as per Max_Payload_Size configuration value
+  //
+  if (SetupMaxPayloadSize ()) {
+MrrsValue = PciDevice->SetupMPS;
+  } else {
+//
+// in case this driver is not required to configure the 
Max_Payload_Size
+// than consider progr

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 11/12] PciBusDxe: New PCI feature No-Snoop

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2313

The code changes are made; as per the PCI Base Specification 4 Revision
1; to enable the configuration of new PCI feature No-Snoop (NS), which
enables the PCI function to initiate requests if it does not require har-
dware enforced cache-coherency for its transactions.

The code changes are made to configure only those PCI devices which are
requested to override by platform through the new PCI Platform protocol
interface for device-specific policies.

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h |  1 +
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c  | 78 
++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c | 45 
+
 3 files changed, 124 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 9f017b7..be1c341 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -293,6 +293,7 @@ struct _PCI_IO_DEVICE {
   UINT8 SetupMPS;
   UINT8 SetupMRRS;
   PCI_FEATURE_POLICYSetupRO;
+  PCI_FEATURE_POLICYSetupNS;
 };
 
 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
index a60cb42..a7f0a2f 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
@@ -986,6 +986,81 @@ OverrideRelaxOrder (
   return Status;
 }
 
+/**
+  Overrides the PCI Device Control register No-Snoop register field; if
+  the hardware value is different than the intended value.
+
+  @param  PciDevice A pointer to the PCI_IO_DEVICE instance.
+
+  @retval EFI_SUCCESS   The data was read from or written to the PCI 
device.
+  @retval EFI_UNSUPPORTED   The address range specified by Offset, Width, 
and Count is not
+valid for the PCI configuration header of the 
PCI controller.
+  @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
+
+**/
+EFI_STATUS
+OverrideNoSnoop (
+  IN PCI_IO_DEVICE  *PciDevice
+  )
+{
+  PCI_REG_PCIE_DEVICE_CONTROL PcieDev;
+  UINT32  Offset;
+  EFI_STATUS  Status;
+  EFI_TPL OldTpl;
+
+  PcieDev.Uint16 = 0;
+  Offset = PciDevice->PciExpressCapabilityOffset +
+   OFFSET_OF (PCI_CAPABILITY_PCIEXP, DeviceControl);
+  Status = PciDevice->PciIo.Pci.Read (
+  &PciDevice->PciIo,
+  EfiPciIoWidthUint16,
+  Offset,
+  1,
+  &PcieDev.Uint16
+);
+  if (EFI_ERROR(Status)){
+DEBUG (( DEBUG_ERROR, "Unexpected DeviceControl register (0x%x) read 
error!",
+Offset
+));
+return Status;
+  }
+  if (PciDevice->SetupRO.Override
+  &&  PcieDev.Bits.NoSnoop != PciDevice->SetupNS.Act
+  ) {
+PcieDev.Bits.NoSnoop = PciDevice->SetupNS.Act;
+DEBUG (( DEBUG_INFO, "NS=%d", PciDevice->SetupNS.Act));
+
+//
+// Raise TPL to high level to disable timer interrupt while the write 
operation completes
+//
+OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+Status = PciDevice->PciIo.Pci.Write (
+&PciDevice->PciIo,
+EfiPciIoWidthUint16,
+Offset,
+1,
+&PcieDev.Uint16
+  );
+//
+// Restore TPL to its original level
+//
+gBS->RestoreTPL (OldTpl);
+
+if (!EFI_ERROR(Status)) {
+  PciDevice->PciExpStruct.DeviceControl.Uint16 = PcieDev.Uint16;
+} else {
+  DEBUG (( DEBUG_ERROR, "Unexpected DeviceControl register (0x%x) write 
error!",
+  Offset
+  ));
+}
+  } else {
+DEBUG (( DEBUG_INFO, "No write of NS,", PciDevice->SetupRO.Act));
+  }
+
+  return Status;
+}
+
 /**
   helper routine to dump the PCIe Device Port Type
 **/
@@ -1200,6 +1275,9 @@ ProgramDevicePciFeatures (
   if (SetupRelaxOrder ()) {
 Status = OverrideRelaxOrder (PciDevice);
   }
+  if (SetupNoSnoop ()) {
+Status = OverrideNoSnoop (PciDevice);
+  }
   DEBUG (( DEBUG_INFO, "\n"));
   return Status;
 }
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
index f1e7039..47295cd 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
@@ -509,6 +509,46 @@ SetDevicePolicyRelaxO

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 10/12] PciBusDxe: New PCI feature Relax Ordering

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2313

The code changes are made to enable the configuration of new PCI feature
Relax Ordering (OR), which enables the PCI function to initiate requests
if it does not require strong write ordering for its transactions; as per
the PCI Base Specification 4 Revision 1.

The code changes are made to configure only those PCI devices which are
requested to override by platform through the new PCI Platform protocol
interface for device-specific policies.

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h |  2 ++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c  | 78 
++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h  | 26 
++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c | 44 

 4 files changed, 150 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 38abd20..9f017b7 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -82,6 +82,7 @@ typedef enum {
 #include "PciHotPlugSupport.h"
 #include "PciLib.h"
 #include "PciPlatformSupport.h"
+#include "PciFeatureSupport.h"
 
 #define VGABASE1  0x3B0
 #define VGALIMIT1 0x3BB
@@ -291,6 +292,7 @@ struct _PCI_IO_DEVICE {
   //
   UINT8 SetupMPS;
   UINT8 SetupMRRS;
+  PCI_FEATURE_POLICYSetupRO;
 };
 
 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
index 614285f..a60cb42 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
@@ -911,6 +911,81 @@ OverrideMaxReadReqSize (
   return Status;
 }
 
+/**
+  Overrides the PCI Device Control register Relax Order register field; if
+  the hardware value is different than the intended value.
+
+  @param  PciDevice A pointer to the PCI_IO_DEVICE instance.
+
+  @retval EFI_SUCCESS   The data was read from or written to the PCI 
device.
+  @retval EFI_UNSUPPORTED   The address range specified by Offset, Width, 
and Count is not
+valid for the PCI configuration header of the 
PCI controller.
+  @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
+
+**/
+EFI_STATUS
+OverrideRelaxOrder (
+  IN PCI_IO_DEVICE  *PciDevice
+  )
+{
+  PCI_REG_PCIE_DEVICE_CONTROL PcieDev;
+  UINT32  Offset;
+  EFI_STATUS  Status;
+  EFI_TPL OldTpl;
+
+  PcieDev.Uint16 = 0;
+  Offset = PciDevice->PciExpressCapabilityOffset +
+   OFFSET_OF (PCI_CAPABILITY_PCIEXP, DeviceControl);
+  Status = PciDevice->PciIo.Pci.Read (
+  &PciDevice->PciIo,
+  EfiPciIoWidthUint16,
+  Offset,
+  1,
+  &PcieDev.Uint16
+);
+  if (EFI_ERROR(Status)){
+DEBUG (( DEBUG_ERROR, "Unexpected DeviceControl register (0x%x) read 
error!",
+Offset
+));
+return Status;
+  }
+  if (PciDevice->SetupRO.Override
+  &&  PcieDev.Bits.RelaxedOrdering != PciDevice->SetupRO.Act
+  ) {
+PcieDev.Bits.RelaxedOrdering = PciDevice->SetupRO.Act;
+DEBUG (( DEBUG_INFO, "RO=%d,", PciDevice->SetupRO.Act));
+
+//
+// Raise TPL to high level to disable timer interrupt while the write 
operation completes
+//
+OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+Status = PciDevice->PciIo.Pci.Write (
+&PciDevice->PciIo,
+EfiPciIoWidthUint16,
+Offset,
+1,
+&PcieDev.Uint16
+  );
+//
+// Restore TPL to its original level
+//
+gBS->RestoreTPL (OldTpl);
+
+if (!EFI_ERROR(Status)) {
+  PciDevice->PciExpStruct.DeviceControl.Uint16 = PcieDev.Uint16;
+} else {
+  DEBUG (( DEBUG_ERROR, "Unexpected DeviceControl register (0x%x) write 
error!",
+  Offset
+  ));
+}
+  } else {
+DEBUG (( DEBUG_INFO, "No write of RO,", PciDevice->SetupRO.Act));
+  }
+
+  return Status;
+}
+
 /**
   helper routine to dump the PCIe Device Port Type
 **/
@@ -1122,6 +1197,9 @@ ProgramDevicePciFeatures (
   if (SetupMaxReadReqSize ()) {
 Status = OverrideMaxReadReqSize (PciDevice);
   }
+  if (SetupRelaxOrder ()) {
+Status = OverrideRelaxOrder (PciDevice);
+  }
   DEBUG (( DEBUG_INFO, "\n"));
   return Status;
 }
diff --git a/MdeModulePkg/Bus/Pci/P

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 02/12] PciBusDxe: Reorganize the PCI Platform Protocol usage code

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194

The following legacy PCI Platform Protocol usage is reorganized in the
separate source files:-
(1) PlatformPrepController
(2) PlatformNotify
(3) GetPlatformPolicy
(4) GetPciRom

This code changes are made to support the new PCI Platform Protocol along
with the existing legacy interface in the PCI Bus driver.

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c |  23 
++-
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h |   3 +--
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf|   2 ++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c   |  58 
+++---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c  | 139 
+--
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c | 254 
++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h | 109 
+
 MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c |  15 +--
 8 files changed, 413 insertions(+), 190 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
index b020ce5..45cd64d 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c
@@ -8,7 +8,7 @@
   PCI Root Bridges. So it means platform needs install PCI Root Bridge IO 
protocol for each
   PCI Root Bus and install PCI Host Bridge Resource Allocation Protocol.
 
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -34,8 +34,6 @@ BOOLEAN   
gFullEnumeration = TRUE;
 UINT64gAllOne  = 
0xULL;
 UINT64gAllZero = 0;
 
-EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
-EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;
 EDKII_IOMMU_PROTOCOL  *mIoMmuProtocol;
 
 
@@ -266,24 +264,7 @@ PciBusDriverBindingStart (
   // If PCI Platform protocol is available, get it now.
   // If the platform implements this, it must be installed before BDS phase
   //
-  gPciPlatformProtocol = NULL;
-  gBS->LocateProtocol (
-&gEfiPciPlatformProtocolGuid,
-NULL,
-(VOID **) &gPciPlatformProtocol
-);
-
-  //
-  // If PCI Platform protocol doesn't exist, try to Pci Override Protocol.
-  //
-  if (gPciPlatformProtocol == NULL) {
-gPciOverrideProtocol = NULL;
-gBS->LocateProtocol (
-  &gEfiPciOverrideProtocolGuid,
-  NULL,
-  (VOID **) &gPciOverrideProtocol
-  );
-  }
+  LocatePciPlatformProtocol ();
 
   if (mIoMmuProtocol == NULL) {
 gBS->LocateProtocol (
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 504a1b1..141c158 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -79,6 +79,7 @@ typedef enum {
 #include "PciPowerManagement.h"
 #include "PciHotPlugSupport.h"
 #include "PciLib.h"
+#include "PciPlatformSupport.h"
 
 #define VGABASE1  0x3B0
 #define VGALIMIT1 0x3BB
@@ -307,8 +308,6 @@ extern UINTN
gPciHostBridgeNumber;
 extern EFI_HANDLE   
gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
 extern UINT64   gAllOne;
 extern UINT64   gAllZero;
-extern EFI_PCI_PLATFORM_PROTOCOL*gPciPlatformProtocol;
-extern EFI_PCI_OVERRIDE_PROTOCOL*gPciOverrideProtocol;
 extern BOOLEAN  mReserveIsaAliases;
 extern BOOLEAN  mReserveVgaAliases;
 
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
index 6dab970..4ce99ce 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
@@ -59,6 +59,8 @@
   PciBus.h
   PciFeatureSupport.c
   PciFeatureSupport.h
+  PciPlatformSupport.c
+  PciPlatformSupport.h
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
index b7832c6..149a120 100644
--- 

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 06/12] PciBusDxe: Integration of setup for PCI feature enumeration

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194

The code changes are made to integrate the setup infrastructure for the
PCI feature enumeration, in the last phase of the PCI Bus driver, after
its registration and its option ROM loading phase is complete.

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c  | 11 +++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c | 15 ++-
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h | 11 +++
 3 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
index 33a0e94..b839102 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
@@ -8,6 +8,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
 #include "PciBus.h"
+#include "PciFeatureSupport.h"
 
 //
 // This device structure is serviced as a header.
@@ -170,6 +171,8 @@ DestroyRootBridgeByHandle (
 
 if (Temp->Handle == Controller) {
 
+  DestroyRootBridgePciFeaturesConfigCompletionList (Temp);
+
   RemoveEntryList (CurrentLink);
 
   DestroyPciDeviceTree (Temp);
@@ -818,6 +821,14 @@ StartPciDevicesOnBridge (
   if (EFI_ERROR (Status) == EFI_NOT_FOUND) {
 return Status;
   } else {
+if (CheckOtherPciFeaturesPcd ()) {
+  //
+  // the late configuration of PCI features
+  //
+  Status = EnumerateOtherPciFeatures (
+  RootBridge
+);
+}
 //
 // finally start those PCI bridge port devices only
 //
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
index ab0e096..9e6671d 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
@@ -25,6 +25,19 @@ PRIMARY_ROOT_PORT_NODE  
*mPrimaryRootPortList;
 **/
 PCI_FEATURE_CONFIGURATION_COMPLETION_LIST   
*mPciFeaturesConfigurationCompletionList = NULL;
 
+/**
+  Main routine to indicate platform selection of any of the other PCI features
+  to be configured by this driver
+
+  @retval TRUEplatform has selected the other PCI features to be configured
+  FALSE   platform has not selected any of the other PCI features
+**/
+BOOLEAN
+CheckOtherPciFeaturesPcd (
+  )
+{
+  return PcdGet32 (PcdOtherPciFeatures) ? TRUE : FALSE;
+}
 
 /**
   Main routine to indicate whether the platform has selected the 
Max_Payload_Size
@@ -699,7 +712,7 @@ ProgramDevicePciFeatures (
   IN PCI_IO_DEVICE  *PciDevice
   )
 {
-  EFI_STATUS   Status;
+  EFI_STATUS   Status = EFI_SUCCESS;
 
   return Status;
 }
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h
index b06c140..f92d008 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h
@@ -138,6 +138,17 @@ typedef enum {
 }PCI_FEATURE_CONFIGURATION_PHASE;
 
 
+/**
+  Main routine to indicate platform selection of any of the other PCI features
+  to be configured by this driver
+
+  @retval TRUEplatform has selected the other PCI features to be configured
+  FALSE   platform has not selected any of the other PCI features
+**/
+BOOLEAN
+CheckOtherPciFeaturesPcd (
+  );
+
 /**
   Enumerate all the nodes of the specified root bridge or PCI-PCI Bridge, to
   configure the other PCI features.
-- 
2.21.0.windows.1


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#49810): https://edk2.groups.io/g/devel/message/49810
Mute This Topic: https://groups.io/mt/40419700/21656
Group Owner: devel+ow...@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub  [arch...@mail-archive.com]
-=-=-=-=-=-=-=-=-=-=-=-

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 01/12] MdeModulePkg/PciBusDxe:New PCI features separation with PCD

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194

Definition of bit masks for the new PCD for the following new PCI feature
set:-
1.  Maximum Payload Size (MPS)
2.  Maximum Read Request Size (MRRS)
3.  Completion Timeout (CTO)
4.  Relax Order (RO) Enable
5.  No Snoop (NS) Enable
6.  Extended Tag
7.  ASPM support
8.  Common Clock Configuration
9.  Extended SYNC
10. Atomic Op
11. LTR Enable
12. PTM support

Code changes made to the PCI Bus driver to adopt to these new PCD defini-
tion, helper routines defined for features that needs to be supported in.
future.

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf   |   5 -
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c | 177 
+
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h |  26 
++
 MdeModulePkg/MdeModulePkg.dec  |  22 ++
 4 files changed, 229 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
index 05c2202..6dab970 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
@@ -2,7 +2,7 @@
 #  The PCI bus driver will probe all PCI devices and allocate MMIO and IO 
space for these devices.
 #  Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable hot 
plug supporting.
 #
-#  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+#  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -57,6 +57,8 @@
   PciCommand.h
   PciIo.h
   PciBus.h
+  PciFeatureSupport.c
+  PciFeatureSupport.h
 
 [Packages]
   MdePkg/MdePkg.dec
@@ -104,6 +106,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport  ## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport## CONSUMES
   gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration## 
SOMETIMES_CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdOtherPciFeatures## CONSUMES
 
 [UserExtensions.TianoCore."ExtraFiles"]
   PciBusDxeExtra.uni
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
new file mode 100644
index 000..8be227a
--- /dev/null
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
@@ -0,0 +1,177 @@
+/** @file
+  PCI standard feature support functions implementation for PCI Bus module..
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "PciBus.h"
+#include "PciFeatureSupport.h"
+
+/**
+  Main routine to indicate whether the platform has selected the 
Max_Payload_Size
+  PCI feature to be configured by this driver
+
+  @retval TRUEplatform has selected the Max_Payload_Size to be configured
+  FALSE   platform has not selected this feature
+**/
+BOOLEAN
+SetupMaxPayloadSize (
+  )
+{
+  return (PcdGet32 (PcdOtherPciFeatures) & PCI_FEATURE_SUPPORT_FLAG_MPS) ? 
TRUE : FALSE;
+}
+
+/**
+  Main routine to indicate whether the platform has selected the 
Max_Read_Req_Size
+  PCI feature to be configured by this driver
+
+  @retval TRUEplatform has selected the Max_Read_Req_Size to be configured
+  FALSE   platform has not selected this feature
+**/
+BOOLEAN
+SetupMaxReadReqSize (
+  )
+{
+  return (PcdGet32 (PcdOtherPciFeatures) & PCI_FEATURE_SUPPORT_FLAG_MRRS) ? 
TRUE : FALSE;
+}
+
+/**
+  Main routine to indicate whether the platform has selected the Relax Ordering
+  PCI feature to be configured by this driver
+
+  @retval TRUEplatform has selected the Relax Ordering to be configured
+  FALSE   platform has not selected this feature
+**/
+BOOLEAN
+SetupRelaxOrder (
+  )
+{
+  return (PcdGet32 (PcdOtherPciFeatures) & PCI_FEATURE_SUPPORT_FLAG_RO) ? TRUE 
: FALSE;
+}
+
+/**
+  Main routine to indicate whether the platform has selected the No-Snoop
+  PCI feature to be configured by this driver
+
+  @retval TRUEplatform has selected the No-Snoop to be configured
+  FALSE   platform has not selected this feature
+**/
+BOOLEAN
+SetupNoSnoop (
+  )
+{
+  return (PcdGet32 (PcdOtherPciFeatures) & PCI_FEATURE_SUPPORT_FLAG_NS) ? TRUE 
: FALSE;
+}
+
+/**
+  Main routine to indicate whether the platform has selected the Completion 
Timeout
+  PCI feature to be configured by this driver
+
+  @retval TRUEplatform has selected the Completion Timeout to be configured
+  FALSE   platform has not selected this feature
+**/
+BOOLEAN
+SetupCompletionTimeout (
+  )
+{
+  return (PcdGet32 (PcdOtherPciFeatures) & PCI_FEATURE_SUPPORT_FLAG_CTO) ? 
TRUE : FALSE;
+}
+
+/**
+  Main routine t

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 05/12] PciBusDxe: Setup sub-phases for PCI feature enumeration

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194

The code changes are made to setup the following internal sub-phases for
enumerating the PCI features in the late phase of the PCI Bus driver.
(1) PciFeatureRootBridgeScan - initial phase in configuring the other PCI
features to record the primary root ports
(2) PciFeatureGetDevicePolicy - get the PCI device-specific platform pol-
icies and align with device capabilities
(3) PciFeatureSetupPhase - align all PCI nodes in the PCI heirarchical
tree (if required for that PCI feature)
(4) PciFeatureConfigurationPhase - finally override to complete configu-
ration of the PCI feature

The code changes are made to support the configuration of other PCIe
features, like MPS, which require a common value to be assigned among
all the child PCI devices and its parent root port device.

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c | 859 
+++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.h | 146 
++
 2 files changed, 1005 insertions(+)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
index 8be227a..ab0e096 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c
@@ -9,6 +9,23 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include "PciBus.h"
 #include "PciFeatureSupport.h"
 
+/**
+  A gobal pointer to PRIMARY_ROOT_PORT_NODE buffer to track all the primary 
physical
+  PCI Root Ports (PCI Controllers) for a given PCI Root Bridge instance while
+  enumerating to configure the PCI features
+**/
+PRIMARY_ROOT_PORT_NODE  *mPrimaryRootPortList;
+
+/**
+  A global pointer to PCI_FEATURE_CONFIGURATION_COMPLETION_LIST, which stores 
all
+  the PCI Root Bridge instances that are enumerated for the other PCI features,
+  like MaxPayloadSize & MaxReadReqSize; during the the Start() interface of the
+  driver binding protocol. The records pointed by this pointer would be 
destroyed
+  when the DXE core invokes the Stop() interface.
+**/
+PCI_FEATURE_CONFIGURATION_COMPLETION_LIST   
*mPciFeaturesConfigurationCompletionList = NULL;
+
+
 /**
   Main routine to indicate whether the platform has selected the 
Max_Payload_Size
   PCI feature to be configured by this driver
@@ -175,3 +192,845 @@ SetupPtm (
 {
   return (PcdGet32 (PcdOtherPciFeatures) & PCI_FEATURE_SUPPORT_FLAG_PTM) ? 
TRUE : FALSE;
 }
+
+/**
+ Helper routine to determine the existence of previously enumerated PCI device
+
+ @retval  TRUE  PCI device exist
+  FALSE does not exist
+**/
+BOOLEAN
+DeviceExist (
+  PCI_IO_DEVICE   *PciDevice
+  )
+{
+  EFI_PCI_IO_PROTOCOL   *PciIoProtocol = &PciDevice->PciIo;
+  UINT16VendorId = 0x;
+
+  PciIoProtocol->Pci.Read (
+  PciIoProtocol,
+  EfiPciIoWidthUint16,
+  PCI_VENDOR_ID_OFFSET,
+  1,
+  &VendorId
+  );
+  if (VendorId == 0 || VendorId == 0x) {
+return FALSE;
+  } else {
+return TRUE;
+  }
+}
+
+/**
+  Helper routine which determines whether the given PCI Root Bridge instance
+  record already exist. This routine shall help avoid duplicate record creation
+  in case of re-enumeration of PCI configuation features.
+
+  @param  RootBridge  A pointer to the PCI_IO_DEVICE for the Root 
Bridge
+  @param  PciFeatureConfigRecord  A pointer to a pointer for type
+  PCI_FEATURE_CONFIGURATION_COMPLETION_LIST
+  record, Use to return the specific record.
+
+  @retval TRUERecord already exist
+  FALSE   Record does not exist for the given PCI Root 
Bridge
+**/
+BOOLEAN
+CheckPciFeatureConfigurationRecordExist (
+  IN  PCI_IO_DEVICE

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 03/12] PciBusDxe: Separation of the PCI device registration and start

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194

The separation of the PCI device registration phase includes only the
installation of the PCI IO Protocol on the PCI node to acquire the EFI
handles, and loading of its applicable PCI Option ROM.

The separation of the PCI device start phase only includes the code that
enables the PCI Bridge device as a Bus Master.

This code change is made in order to introduce the enabling of the other
PCI features in the PCI Bus driver.

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c | 164 
++--
 1 file changed, 130 insertions(+), 34 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
index 149a120..33a0e94 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c
@@ -561,7 +561,7 @@ DeRegisterPciDevice (
 }
 
 /**
-  Start to manage the PCI device on the specified root bridge or PCI-PCI 
Bridge.
+  Start the PCI root Ports or PCI-PCI Bridge only.
 
   @param Controller  The root bridge handle.
   @param RootBridge  A pointer to the PCI_IO_DEVICE.
@@ -576,7 +576,82 @@ DeRegisterPciDevice (
 
 **/
 EFI_STATUS
-StartPciDevicesOnBridge (
+StartPciRootPortsOnBridge (
+  IN EFI_HANDLE  Controller,
+  IN PCI_IO_DEVICE   *RootBridge
+  )
+
+{
+  PCI_IO_DEVICE *PciIoDevice;
+  EFI_STATUSStatus;
+  LIST_ENTRY*CurrentLink;
+  UINT64Supports;
+
+  PciIoDevice = NULL;
+  CurrentLink = RootBridge->ChildList.ForwardLink;
+
+  while (CurrentLink != NULL && CurrentLink != &RootBridge->ChildList) {
+
+PciIoDevice = PCI_IO_DEVICE_FROM_LINK (CurrentLink);
+
+//
+// check if the device has been assigned with required resource
+// and registered
+//
+if (!PciIoDevice->Registered && !PciIoDevice->Allocated) {
+  return EFI_NOT_READY;
+}
+
+if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
+  Status = StartPciRootPortsOnBridge (
+ Controller,
+ PciIoDevice
+ );
+
+  PciIoDevice->PciIo.Attributes (
+   &(PciIoDevice->PciIo),
+   EfiPciIoAttributeOperationSupported,
+   0,
+   &Supports
+ );
+  Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
+  PciIoDevice->PciIo.Attributes (
+   &(PciIoDevice->PciIo),
+   EfiPciIoAttributeOperationEnable,
+   Supports,
+   NULL
+ );
+
+}
+
+CurrentLink = CurrentLink->ForwardLink;
+  }
+
+  if (PciIoDevice == NULL) {
+return EFI_NOT_FOUND;
+  } else {
+return EFI_SUCCESS;
+  }
+}
+
+
+/**
+  Register to manage the PCI device on the specified root bridge or PCI-PCI 
Bridge.
+
+  @param Controller  The root bridge handle.
+  @param RootBridge  A pointer to the PCI_IO_DEVICE.
+  @param RemainingDevicePath A pointer to the EFI_DEVICE_PATH_PROTOCOL.
+  @param NumberOfChildrenChildren number.
+  @param ChildHandleBuffer   A pointer to the child handle buffer.
+
+  @retval EFI_NOT_READY   Device is not allocated.
+  @retval EFI_UNSUPPORTED Device only support PCI-PCI bridge.
+  @retval EFI_NOT_FOUND   Can not find the specific device.
+  @retval EFI_SUCCESS Success to start Pci devices on bridge.
+
+**/
+EFI_STATUS
+RegisterPciDevicesOnBridge (
   IN EFI_HANDLE  Controller,
   IN PCI_IO_DEVICE   *RootBridge,
   IN EFI_DEVICE_PATH_PROTOCOL*RemainingDevicePath,
@@ -590,7 +665,6 @@ StartPciDevicesOnBridge (
   EFI_DEVICE_PATH_PROTOCOL  *CurrentDevicePath;
   EFI_STATUSStatus;
   LIST_ENTRY*CurrentLink;
-  UINT64Supports;
 
   PciIoDevice = NULL;
   CurrentLink = RootBridge->ChildList.ForwardLink;
@@ -645,7 +719,7 @@ StartPciDevicesOnBridge (
   // If it is a PPB
   //
   if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
-Status = StartPciDevicesOnBridge (
+Status = RegisterPciDevicesOnBridge (
Controller,
PciIoDevice,
CurrentDevicePath,
@@ -653,20 +727,6 @@ StartPciDevicesOnBridge (
ChildHandleBuffer
);
 
-PciIoDevice->PciIo.Attributes (
- &(PciIoDevice->PciIo),
- EfiPciIoAttributeOperationSupported,
- 0,
- &Supports
- );
-Supports &= (

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 04/12] PciBusDxe: Inclusion of new PCI Platform Protocol 2

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194

The code changes are made to support the new PCI Platform Protocol, as
well as the legacy PCI Platform Protocol interfaces.

The code change is made to consume the new interface to acquire the PCI
device-specific platform policy.

This code change is made to support the enabling of the other
PCI features in the PCI Bus driver.

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h |   2 ++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf|   2 ++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c | 208 
++--
 MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.h |  18 ++
 4 files changed, 228 insertions(+), 2 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 141c158..95a677b 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -27,6 +27,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include 
 #include 
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
index 4ce99ce..44dec53 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
@@ -95,6 +95,8 @@
   gEfiLoadFile2ProtocolGuid   ## SOMETIMES_PRODUCES
   gEdkiiIoMmuProtocolGuid ## SOMETIMES_CONSUMES
   gEfiLoadedImageDevicePathProtocolGuid   ## CONSUMES
+  gEfiPciPlatformProtocol2Guid ## SOMETIMES_CONSUMES
+  gEfiPciOverrideProtocol2Guid ## SOMETIMES_CONSUMES
 
 [FeaturePcd]
   gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport  ## CONSUMES
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
index 6f95794..238959e 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciPlatformSupport.c
@@ -14,6 +14,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 EFI_PCI_PLATFORM_PROTOCOL *mPciPlatformProtocol;
 EFI_PCI_OVERRIDE_PROTOCOL *mPciOverrideProtocol;
 
+EFI_PCI_PLATFORM_PROTOCOL2*mPciPlatformProtocol2;
+EFI_PCI_OVERRIDE_PROTOCOL2*mPciOverrideProtocol2;
 
 
 /**
@@ -24,6 +26,29 @@ VOID
 LocatePciPlatformProtocol (
   )
 {
+  mPciPlatformProtocol2 = NULL;
+  gBS->LocateProtocol (
+  &gEfiPciPlatformProtocol2Guid,
+  NULL,
+  (VOID **) &mPciPlatformProtocol2
+  );
+
+  //
+  // If PCI Platform protocol doesn't exist, try to get Pci Override Protocol.
+  //
+  if (mPciPlatformProtocol2 == NULL) {
+mPciOverrideProtocol2 = NULL;
+gBS->LocateProtocol (
+&gEfiPciOverrideProtocol2Guid,
+NULL,
+(VOID **) &mPciOverrideProtocol2
+);
+  }
+  //
+  // fetch the old PCI Platform Protocols if new are not installed
+  //
+  if (mPciOverrideProtocol2 == NULL) {
+
 mPciPlatformProtocol = NULL;
 gBS->LocateProtocol (
 &gEfiPciPlatformProtocolGuid,
@@ -42,6 +67,7 @@ LocatePciPlatformProtocol (
   (VOID **) &mPciOverrideProtocol
   );
 }
+  }
 }
 
 /**
@@ -52,13 +78,17 @@ BOOLEAN
 CheckPciPlatformProtocolInstall (
   )
 {
-
+  if (mPciPlatformProtocol2 != NULL) {
+return TRUE;
+  } else if (mPciOverrideProtocol2 != NULL) {
+return TRUE;
+  } else {
 if (mPciPlatformProtocol != NULL) {
   return TRUE;
 } else if (mPciOverrideProtocol != NULL){
   return TRUE;
 }
-
+  }
   return FALSE;
 }
 
@@ -90,6 +120,32 @@ PciPlatformPreprocessController (
   )
 {
   EFI_STATUS  Status;
+
+  if (mPciPlatformProtocol2 != NULL) {
+//
+// Call PlatformPci::PrepController() if the protocol is present.
+//
+Status = mPciPlatformProtocol2->PlatformPrepController (
+  mPciPlatformProtocol2,
+  HostBridgeHandle,
+  RootBridgeHandle,
+  RootBridgePciAddress,
+  Phase,
+  ExecPhase
+);
+  } else if (mPciOverrideProtocol2 != NULL) {
+//
+// Call PlatformPci::PrepController() if the protocol is present.
+//
+Status = mPciOverrideProtocol2->PlatformPrepController (
+  mPciOverrideProtocol2,
+  HostBridgeHandle,
+  RootBridgeHandle,
+  RootBridgePciAddress,
+

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 07/12] PciBusDxe: Record the PCI-Express Capability Structure

[Javeed, Ashraf]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2194

The code changes are made to record the PCI device's PCI-Express
Capability Structure register set during early PCI enumeration phase.
This data shall be used during PCI feature enumeration phase.

Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h   |  6 +-
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c | 34 
++
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c| 51 
+++
 3 files changed, 78 insertions(+), 13 deletions(-)

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 95a677b..dc29ef3 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -266,9 +266,13 @@ struct _PCI_IO_DEVICE {
 
   BOOLEAN   IsPciExp;
   //
-  // For SR-IOV
+  // For PCI Express Capability List Structure
   //
   UINT8 PciExpressCapabilityOffset;
+  PCI_CAPABILITY_PCIEXP PciExpStruct;
+  //
+  // For SR-IOV
+  //
   UINT32AriCapabilityOffset;
   UINT32SrIovCapabilityOffset;
   UINT32MrIovCapabilityOffset;
diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c 
b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
index c7eafff..2343702 100644
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c
@@ -230,7 +230,7 @@ PciSearchDevice (
   PciIoDevice = NULL;
 
   DEBUG ((
-EFI_D_INFO,
+DEBUG_INFO,
 "PciBus: Discovered %s @ [%02x|%02x|%02x]\n",
 IS_PCI_BRIDGE (Pci) ? L"PPB" :
 IS_CARDBUS_BRIDGE (Pci) ? L"P2C" :
@@ -397,7 +397,7 @@ DumpPpbPaddingResource (
 
 if ((Type != PciBarTypeUnknown) && ((ResourceType == PciBarTypeUnknown) || 
(ResourceType == Type))) {
   DEBUG ((
-EFI_D_INFO,
+DEBUG_INFO,
 "   Padding: Type = %s; Alignment = 0x%lx;\tLength = 0x%lx\n",
 mBarTypeStr[Type], Descriptor->AddrRangeMax, Descriptor->AddrLen
 ));
@@ -424,7 +424,7 @@ DumpPciBars (
 }
 
 DEBUG ((
-  EFI_D_INFO,
+  DEBUG_INFO,
   "   BAR[%d]: Type = %s; Alignment = 0x%lx;\tLength = 0x%lx;\tOffset = 
0x%02x\n",
   Index, mBarTypeStr[MIN (PciIoDevice->PciBar[Index].BarType, 
PciBarTypeMaxType)],
   PciIoDevice->PciBar[Index].Alignment, PciIoDevice->PciBar[Index].Length, 
PciIoDevice->PciBar[Index].Offset
@@ -437,13 +437,13 @@ DumpPciBars (
 }
 
 DEBUG ((
-  EFI_D_INFO,
+  DEBUG_INFO,
   " VFBAR[%d]: Type = %s; Alignment = 0x%lx;\tLength = 0x%lx;\tOffset = 
0x%02x\n",
   Index, mBarTypeStr[MIN (PciIoDevice->VfPciBar[Index].BarType, 
PciBarTypeMaxType)],
   PciIoDevice->VfPciBar[Index].Alignment, 
PciIoDevice->VfPciBar[Index].Length, PciIoDevice->VfPciBar[Index].Offset
   ));
   }
-  DEBUG ((EFI_D_INFO, "\n"));
+  DEBUG ((DEBUG_INFO, "\n"));
 }
 
 /**
@@ -1903,7 +1903,7 @@ PciParseBar (
   // Fix the length to support some special 64 bit BAR
   //
   if (Value == 0) {
-DEBUG ((EFI_D_INFO, "[PciBus]BAR probing for upper 32bit of MEM64 BAR 
returns 0, change to 0x.\n"));
+DEBUG ((DEBUG_INFO, "[PciBus]BAR probing for upper 32bit of MEM64 BAR 
returns 0, change to 0x.\n"));
 Value = (UINT32) -1;
   } else {
 Value |= ((UINT32)(-1) << HighBitSet32 (Value));
@@ -2153,7 +2153,17 @@ CreatePciIoDevice (
  NULL
  );
   if (!EFI_ERROR (Status)) {
-PciIoDevice->IsPciExp = TRUE;
+  PciIoDevice->IsPciExp = TRUE;
+//
+// read the PCI device's entire PCI Express Capability structure
+//
+PciIo->Pci.Read (
+  PciIo,
+  EfiPciIoWidthUint8,
+  PciIoDevice->PciExpressCapabilityOffset,
+  sizeof (PCI_CAPABILITY_PCIEXP) / sizeof (UINT8),
+  &PciIoDevice->PciExpStruct
+);
   }
 
   if (PcdGetBool (PcdAriSupport)) {
@@ -2206,7 +2216,7 @@ CreatePciIoDevice (
   &Data32
   );
   DEBUG ((
-EFI_D_INFO,
+DEBUG_INFO,
 " ARI: forwarding enabled for PPB[%02x:%02x:%02x]\n",
 Bridge->BusNumber,
 Bridge->DeviceNumber,
@@ -2215,7 +2225,7 @@ CreatePciIoDevice (
 }
   }
 
-  DEBUG ((EFI_D_INFO, " ARI: CapOffset = 0x%x\n", 
PciIoDevice->AriCapabilityOffset));
+  DEBUG ((DEBUG_INFO, " ARI: CapOffset = 0x%x\n", 
PciIoDevice->AriCapabilityOffset));
 }
   }
 
@@ -2325,12 +2335,12 @@ CreatePciIoDevice (
   PciIoDevice->ReservedBusNum = (UINT16)(EFI_PCI_BUS_OF_RID (LastVF) - Bus 
+ 1);
 
   DEBUG ((
-EFI_D_INFO,
+

[edk2-devel] [edk2-staging/UEFI_PCI_ENHANCE-2 PATCH 00/12] New PCI features - MPS, MRRS, RO, NS, CTO

[Javeed, Ashraf]

The EDK2 Kernel PciBusDxe driver is enhanced to enable the configuration
of PCI features like
(1) Max_Payload_Size
(2) Max_Read_Req_Size
(3) Relax Ordering
(4) No-Snoop
(5) Completion Timeout

Max_Payload_Size:- The PCI Device Control register provides this feature
register field which controls the maximum data packet (TLP) size that a
PCI device should maintain as a requester. The PCI Bus driver is required
to maintain a highest common value supported by all the PCI devices in a
PCIe hierarchy, especially in case of isochronous applications.

Max_Read_Req_Size:- The PCI Device Control register provides this feature
register field which controls the maximum memory read request size that a
PCI device should maintain as a requester. The PCI Bus driver is required
to maintain a common value, same as Max_Payload_Size, in case of
isochronous applications only; or else, it should maintain the user
requested value uniformly in a PCIe hierarchy (PCI root port and its
downstream devices).

Relax Ordering:- The PCI Device Control register has the enabling of
Relax Ordering functionality register field (bit 4). If this bit is Set,
the PCI Function is permitted to set the Relaxed Ordering bit in the
Attributes field of transactions it initiates that do not require strong
write ordering (see PCI Base Specification 4, Section 2.2.6.4 and Sect-
ion 2.4). Any supporting PCI function is expected have this bit enabled
by as per its hardware default; the code enhancement is to enable / dis-
able as per the PCI device policy provided by the platform firmware. If
no device policy override is provided than it shall be ignored by the PCI
Bus driver for that PCI function.

No-Snoop:- The PCI Device Control register has the enabling of No-Snoop
functionality register field (bit 11). If this bit is Set, the PCI
Function is permitted to Set the No Snoop bit in the Requester Attributes
of transactions it initiates that do not require hardware enforced cache
coherency (see PCI Base Specification 4, Section 2.2.6.5). Any supporting
PCI function is expected have this bit enabled by as per its hardware
default; the code enhancement is to enable / disable as per the PCI
device policy provided by the platform firmware. If no device policy
override is provided than it shall be ignored by the PCI Bus driver for
that PCI function.

Completion Timeout:- The PCI Device Control 2 register provides two
register fields based on its Device Capability 2 register; the CTO Ranges
(bits [3:0]) and the disabling of CTO detection mechanism (bit 4). The
software is permitted to change the CTO ranges and enable/disable the CTO
detection mechanism any time. The code enhancement here is to override
these register fields as per the platform device policy. If no device
policy override is provided than it shall be ignored by the PCI Bus
driver for that PCI function.

The PCI Base Specification 4 Revision 1 contains detailed information
about these features. The EDK2 PCI Bus driver needs to enable the
configuration of these features as per the PCI Base specification.

The EDK2 PCI Bus driver also needs to take the PCI device-specific
platform policy into the consideration while programming these features;
thus the code changes to support these, is explicitly dependent on the
new PCI Platform Protocol interface definition defined in the below
record:-
https://bugzilla.tianocore.org/show_bug.cgi?id=1954


Signed-off-by: Ashraf Javeed 
Cc: Jian J Wang 
Cc: Hao A Wu 
Cc: Ray Ni 
---

Ashraf Javeed (12):
  MdeModulePkg/PciBusDxe:New PCI features separation with PCD
  PciBusDxe: Reorganize the PCI Platform Protocol usage code
  PciBusDxe: Separation of the PCI device registration and start
  PciBusDxe: Inclusion of new PCI Platform Protocol 2
  PciBusDxe: Setup sub-phases for PCI feature enumeration
  PciBusDxe: Integration of setup for PCI feature enumeration
  PciBusDxe: Record the PCI-Express Capability Structure
  PciBusDxe: New PCI feature Max_Payload_Size
  PciBusDxe: New PCI feature Max_Read_Req_Size
  PciBusDxe: New PCI feature Relax Ordering
  PciBusDxe: New PCI feature No-Snoop
  PciBusDxe: New PCI feature Completion Timeout

 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.c   |   23 +--
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h   |   20 --
 MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf  |9 -
 MdeModulePkg/Bus/Pci/PciBusDxe/PciDeviceSupport.c |  233 
++--
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c|  139 
-
 MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumeratorSupport.c |   34 ++--
 MdeModulePkg/Bus/Pci/PciBusDxe/PciFeatureSupport.c| 2030 
++

Re: [edk2-devel] Question regarding MMIO address space exposed from GetMemoryMap

[Jon Nettleton]

On Fri, Nov 1, 2019 at 6:57 AM Jon Nettleton via Groups.Io
 wrote:
>
> On Thu, Oct 31, 2019 at 5:44 PM Andrew Fish via Groups.Io
>  wrote:
> >
> > Jon,
> >
> > Its a little confusing but gBS->GetMemoryMap () only returns information 
> > about DRAM and any address that requires a kernel virtual address mapping 
> > in EFI. The OS calls EFI Runtime Services from a kernel virtual mapping so 
> > the memory map is also involved in the hand shake to communicate the 
> > virtual address mappings to EFI. Thus any MMIO region in the EFI Memory Map 
> > should always have  the EFI_MEMORY_RUNTIME attribute set. The most common 
> > MMIO region to be mapped is the NOR FLASH to support the EFI Runtime 
> > Variable services.
> >
> > On a UEFI system MMIO regions are described to the OS via ACPI. Processing 
> > the ACPI tables requires an interpreter, and source to an interpreter is 
> > available at the ACPI CA site [1].
> >
> > The PI (Platform Initialization) Spec has a concept called the Global 
> > Coherency Domain (GCD) [2]. The GCD is the map for who owns the CPU address 
> > and IO (x86 in/out instructions not MMIO) space. You can dump the GCD info 
> > via gDS->GetMemorySpaceMap(). The idea is the DRAM controller would carve 
> > out a EfiGcdMemoryTypeSystemMemory range, and the PCI Host Bridge would 
> > carve out a EfiGcdMemoryTypeMemoryMappedIo range, etc.
> >
> > Note: A UEFI implementation is not required to be constructed out of PI 
> > Spec components, but the EDKII UEFI implementation is constructed using the 
> > PI Specification.
> >
> > [1] https://acpica.org/downloads/uefi-support
> > [2] Sorry I could not make up a better name at the time.
> >
> > Thanks,
> >
> > Andrew Fish
> >
> > > On Oct 31, 2019, at 1:32 AM, Jon Nettleton  wrote:
> > >
> > > I am working on sorting out a failure on test 605 of the SBSA test.
> > > The test is "Where a memory access is to an unpopulated part of the
> > > addressable memory space, accesses must be terminated in a manner that
> > > is presented to the PE as either a precise Data Abort or that causes a
> > > system error interrupt or an SPI or LPI interrupt to be delivered to
> > > the GIC."  The issue is that the random test address that was chosen
> > > 0x0420 falls directly in the middle of the Qoriq configuration,
> > > control, and status register (CCSR) address space.  This is an area in
> > > the memory space that provides CPU access to the device registers.
> > >
> > > An entry is added for this region in the VirtualMemoryMap, and
> > > registered with the attribute, ARM_MEMORY_REGION_ATTRIBUTE_DEVICE.
> > > However only a handful of devices are being registered so only a
> > > couple of ranges are showing up in memmap as MMIO.
> > >
> > > The SBSA test in question gets the memorymap and starts at the address
> > > mentioned above and looks for the first chunk of memory that is free
> > > and then attempts to access the memory and is looking for a Data
> > > Abort.  Of course a data abort is not generated because 0x0420 is
> > > a valid address.  If you offset this to 0x4200 then a DA is
> > > generated as expected and the test passes.
> > >
> > > There is a very old thread started by Ard, "MMIO regions in
> > > GetMemoryMap ()", in which he questions if all the MMIO regions should
> > > be reported by GetMemoryMap() or only the ones being used by
> > > initialized devices, which is what the current implementation does.
> > > The end result of the thread was the current implementation is
> > > correct.  That leaves me with the question, "What is the proper
> > > solution for the current implementation that I am working with?"
> > >
> > > To me it seems like I need a special Library that on boot goes through
> > > and claims and maps every valid MMIO slot in this region, and then
> > > have the drivers use this library for proxying requests to
> > > gDS->AddMemorySpace (), gDS->SetMemorySpaceAttributes () etc.   If
> > > there is a standardized way to deal with this configuration I would
> > > much rather follow that.
> > >
> > > Thanks for any input,
> > > Jon
> > >
> > >
> > >
> >
> >
> >
> >
>
> Andrew,
>
> Thanks for clearing this up.  I definitely understand the
> relationships much better now.  I am still uncertain of the proper way
> to fix this issue regarding the SBSA peripheral test.  The test is
> using gBS->GetMemoryMap in order to look for available memory
> segments, which according to the earlier thread and your confirmation
> "gBS->GetMemoryMap () only returns information about DRAM and any
> address that requires a kernel virtual address mapping in EFI.", which
> means that this test will never work on this platform because the
> address that was randomly chosen just happens to fall right into the
> address range for the device addresses that are valid so won't produce
> a DA, but aren't being used by EFI therefore don't require a virtual
> address mapping in EFI.
>
> Is this something I should bring up with the SBSA group?
>

Re: [edk2-devel] [PATCH v4] CryptoPkg: Upgrade OpenSSL to 1.1.1d

[Wang, Jian J]

Hi Laszlo,

I did simple ovmf boot tests (shell, linux, windows) and all passed. Let me 
know if you have
any comments or want to do more tests against v4 before check in.

Based on my review and tests,
   Reviewed-by: Jian J Wang 

Regards,
Jian

> -Original Message-
> From: Zhang, Shenglei 
> Sent: Friday, November 01, 2019 2:56 PM
> To: devel@edk2.groups.io
> Cc: Wang, Jian J ; Lu, XiaoyuX ;
> Gao, Liming 
> Subject: [PATCH v4] CryptoPkg: Upgrade OpenSSL to 1.1.1d
> 
> Update openssl from 1.1.1b to 1.1.1d.
> Something needs to be noticed is that, there is a bug existing in the
> released 1_1_1d version(894da2fb7ed5d314ee5c2fc9fd2d9b8b74111596),
> which causes build failure. So we switch the code base to a usable
> version, which is 2 commits later than the stable tag.
> Now we use the version c3656cc594daac8167721dde7220f0e59ae146fc.
> This log is to fix the build failure.
> https://bugzilla.tianocore.org/show_bug.cgi?id=2226
> 
> Besides, the absense of "DSO_NONE" in dso_conf.h causes build failure
> in OvmfPkg. So update process_files.pl to generate information from
> "crypto/include/internal/dso_conf.h.in".
> 
> shm.h and utsname.h are added to avoid GCC build failure.
> 
> Cc: Jian J Wang 
> Cc: Xiaoyu Lu 
> Cc: Liming Gao 
> Signed-off-by: Shenglei Zhang 
> ---
> v2: Revert the changes in OpensslLib.inf and OpensslLibCrypto.inf.
> The removed header files could be auto-generated by process_files.pl now.
> 
> v3: Add display information for dso_conf.h.
> 
> v4: Add shm.h and utsname.h to avoid GCC build failure.
> 
>  CryptoPkg/Library/Include/internal/dso_conf.h | 16 
>  CryptoPkg/Library/Include/sys/shm.h   |  9 +
>  CryptoPkg/Library/Include/sys/utsname.h   | 10 ++
>  CryptoPkg/Library/OpensslLib/openssl  |  2 +-
>  CryptoPkg/Library/OpensslLib/process_files.pl | 15 ++-
>  5 files changed, 50 insertions(+), 2 deletions(-)
>  create mode 100644 CryptoPkg/Library/Include/sys/shm.h
>  create mode 100644 CryptoPkg/Library/Include/sys/utsname.h
> 
> diff --git a/CryptoPkg/Library/Include/internal/dso_conf.h
> b/CryptoPkg/Library/Include/internal/dso_conf.h
> index e69de29bb2d1..43c891588bc2 100644
> --- a/CryptoPkg/Library/Include/internal/dso_conf.h
> +++ b/CryptoPkg/Library/Include/internal/dso_conf.h
> @@ -0,0 +1,16 @@
> +/* WARNING: do not edit! */
> +/* Generated from crypto/include/internal/dso_conf.h.in */
> +/*
> + * Copyright 2016-2019 The OpenSSL Project Authors. All Rights Reserved.
> + *
> + * Licensed under the OpenSSL license (the "License").  You may not use
> + * this file except in compliance with the License.  You can obtain a copy
> + * in the file LICENSE in the source distribution or at
> + * https://www.openssl.org/source/license.html
> + */
> +
> +#ifndef HEADER_DSO_CONF_H
> +# define HEADER_DSO_CONF_H
> +# define DSO_NONE
> +# define DSO_EXTENSION ".so"
> +#endif
> diff --git a/CryptoPkg/Library/Include/sys/shm.h
> b/CryptoPkg/Library/Include/sys/shm.h
> new file mode 100644
> index ..dc0b8e81c8b0
> --- /dev/null
> +++ b/CryptoPkg/Library/Include/sys/shm.h
> @@ -0,0 +1,9 @@
> +/** @file
> +  Include file to support building the third-party cryptographic library.
> +
> +Copyright (c) 2019, Intel Corporation. All rights reserved.
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> diff --git a/CryptoPkg/Library/Include/sys/utsname.h
> b/CryptoPkg/Library/Include/sys/utsname.h
> new file mode 100644
> index ..75955b0a4eb6
> --- /dev/null
> +++ b/CryptoPkg/Library/Include/sys/utsname.h
> @@ -0,0 +1,10 @@
> +/** @file
> +  Include file to support building the third-party cryptographic library.
> +
> +Copyright (c) 2019, Intel Corporation. All rights reserved.
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +
> diff --git a/CryptoPkg/Library/OpensslLib/openssl
> b/CryptoPkg/Library/OpensslLib/openssl
> index 50eaac9f3337..c3656cc594da 16
> --- a/CryptoPkg/Library/OpensslLib/openssl
> +++ b/CryptoPkg/Library/OpensslLib/openssl
> @@ -1 +1 @@
> -Subproject commit 50eaac9f3337667259de725451f201e784599687
> +Subproject commit c3656cc594daac8167721dde7220f0e59ae146fc
> diff --git a/CryptoPkg/Library/OpensslLib/process_files.pl
> b/CryptoPkg/Library/OpensslLib/process_files.pl
> index 4fe54cd808a5..dd93bd84da22 100755
> --- a/CryptoPkg/Library/OpensslLib/process_files.pl
> +++ b/CryptoPkg/Library/OpensslLib/process_files.pl
> @@ -106,6 +106,14 @@ BEGIN {
>  ) == 0 ||
>  die "Failed to generate opensslconf.h!\n";
> 
> +# Generate dso_conf.h per config data
> +system(
> +"perl -I. -Mconfigdata util/dofile.pl " .
> +"crypto/include/internal/dso_conf.h.in " .
> +"> include/internal/dso_conf.h"
> +) == 0 ||
> +die "Failed to generate dso_conf.h!\n";
> +
>  chdir($basedir) ||
>