Re: [edk2-devel] [Patch V3 8/8] Update Maintainers.txt for TigerlakeOpenBoardPkg
Thanks Heng! For the series.. Reviewed-by: Sai Chaganty -Original Message- From: Luo, Heng Sent: Tuesday, February 09, 2021 8:00 PM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L Subject: [Patch V3 8/8] Update Maintainers.txt for TigerlakeOpenBoardPkg REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 This change adds owners to the the Maintainers.txt for TigerlakeOpenBoardPkg Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Maintainers.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Maintainers.txt b/Maintainers.txt index 8c561166c1..2e6e87bb6d 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -195,6 +195,12 @@ M: Rangasai V Chaganty R: Deepika Kethi Reddy R: Kathappan Esakkithevar +Platform/Intel/TigerlakeOpenBoardPkg+F: Platform/Intel/TigerlakeOpenBoardPkg/+M: Sai Chaganty +M: Nate DeSimone +R: Heng Luo + Platform/Intel/SimicsOpenBoardPkg F: Platform/Intel/SimicsOpenBoardPkg/ M: Agyeman Prince -- 2.24.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71570): https://edk2.groups.io/g/devel/message/71570 Mute This Topic: https://groups.io/mt/80524495/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v0] Platform/NXP: Add Dynamic Acpi for layerscape platforms
On Wed, Jan 27, 2021 at 12:21 PM Vikas Singh
wrote:
>
> On Tue, Jan 26, 2021 at 4:49 PM Leif Lindholm wrote:
> >
> > Hi Vikas,
> >
> > On Tue, Jan 19, 2021 at 10:11:43 +0530, Vikas Singh wrote:
> > > > > > > +/** A helper macro for returning configuration manager objects
> > > > > > > +*/
> > > > > > > +#define HANDLE_CM_OBJECT(ObjId, CmObjectId, Object, ObjectCount)
> > > > > > > \
> > > > > > > + case ObjId: {
> > > > > > > \
> > > > > > > +CmObject->ObjectId = CmObjectId;
> > > > > > > \
> > > > > > > +CmObject->Size = sizeof (Object);
> > > > > > > \
> > > > > > > +CmObject->Data = (VOID*)&Object;
> > > > > > > \
> > > > > > > +CmObject->Count = ObjectCount;
> > > > > > > \
> > > > > > > +DEBUG ((
> > > > > > > \
> > > > > > > + DEBUG_INFO,
> > > > > > > \
> > > > > > > + #CmObjectId ": Ptr = 0x%p, Size = %d, Count = %d\n",
> > > > > > > \
> > > > > > > + CmObject->Data,
> > > > > > > \
> > > > > > > + CmObject->Size,
> > > > > > > \
> > > > > > > + CmObject->Count
> > > > > > > \
> > > > > > > + ));
> > > > > > > \
> > > > > > > +break;
> > > > > > > \
> > > > > > > + }
> > > > > >
> > > > > > This is code obfuscation. Please don't invent your own programming
> > > > > > languages. In C, the case, the start bracket, the break and the end
> > > > > > bracket always go inline.
> > > > > > The rest would be better as a static helper function than a macro.
> > > > > >
> > > > > Leif, changes are in accordance with :
> > > > > https://raw.githubusercontent.com/tianocore-docs/Docs/master/Specifications/CCS_2_1_Draft.pdf
> > > >
> > > > Do you mean 5.5.2.1:
> > > > Functional macros are generally discouraged.
> > > > ?
> > >
> > > Leif + Sami, I was referring section 5.7.3.7, since you commented on
> > > switch case & break statement.
> > > However keeping section 5.5.2.1 in consideration, I have done few
> > > changes and shared updated V1 series.
> > > Could you please have a look on it and revert, if in case you have any
> > > concerns.
> >
> > I have not seen any update?
> >
> > Please have a look at Sami's updates to the ARM platform code, which I
> > merged yeaterday.
> >
> > Best Regards,
> >
> > Leif
> >
> Leif , I have sent an updated V2 patch series today. FYI.
>
> Thnx.
Hi Leif,
Any Update on V2 patch series that I have shared to you at the end of Jan 2021.
I did not receive any comments (if any).
Thnx !!
Vikas Singh
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Re: [edk2-devel] [Patch V3 4/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add library instances
Reviewed-by: Sai Chaganty -Original Message- From: Luo, Heng Sent: Tuesday, February 09, 2021 8:00 PM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L Subject: [Patch V3 4/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add library instances REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following library instances: * TigerlakeURvp/Library/BoardAcpiLib * TigerlakeURvp/Library/BoardInitLib * TigerlakeURvp/Library/PeiPlatformHookLib Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c | 88 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf | 43 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 136 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmTigerlakeURvpAcpiEnableLib.c | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c | 160 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/BoardSaInitPreMemLib.c | 96 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/GpioTableTigerlakeUDdr4Rvp.h | 93 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/GpioTableTigerlakeUDdr4RvpPreMem.h | 33 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.c | 41 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf | 49 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.c | 88 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf | 115 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpDetect.c | 39 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpInitPostMemLib.c | 153 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpInitPreMemLib.c | 445 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/TigerlakeURvpInit.h | 23 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/PeiPlatformHookLib/PeiPlatformHooklib.c | 212 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/PeiPlatformHookLib/PeiPlatformHooklib.inf | 58 ++ 18 files changed, 1923 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c new file mode 100644 index 00..1436d9b79a --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcp
[edk2-devel] [Patch V3 8/8] Update Maintainers.txt for TigerlakeOpenBoardPkg
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 This change adds owners to the the Maintainers.txt for TigerlakeOpenBoardPkg Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Maintainers.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Maintainers.txt b/Maintainers.txt index 8c561166c1..2e6e87bb6d 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -195,6 +195,12 @@ M: Rangasai V Chaganty R: Deepika Kethi Reddy R: Kathappan Esakkithevar +Platform/Intel/TigerlakeOpenBoardPkg +F: Platform/Intel/TigerlakeOpenBoardPkg/ +M: Sai Chaganty +M: Nate DeSimone +R: Heng Luo + Platform/Intel/SimicsOpenBoardPkg F: Platform/Intel/SimicsOpenBoardPkg/ M: Agyeman Prince -- 2.24.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71567): https://edk2.groups.io/g/devel/message/71567 Mute This Topic: https://groups.io/mt/80524495/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [Patch V3 7/8] Enable build for TigerlakeOpenBoardPkg
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 This change adds the configuration to enable build for TigerlakeURvp. Also it updates Tigerlake U Rvp details to the Readme.md. Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/Readme.md | 11 +++ Platform/Intel/build.cfg | 1 + 2 files changed, 12 insertions(+) diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index f7bfc7aad2..b3b15405af 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -57,6 +57,7 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol * The `SimicsOpenBoardPkg` contains board implementations for the Simics hardware simulator. * The `WhiskeylakeOpenBoardPkg` contains board implementations for WhiskeyLake systems. * The `CometlakeOpenBoardPkg` contains board implementations for CometLake systems. +* The `TigerlakeOpenBoardPkg` contains board implementations for TigerLake systems. ### **Supported Hardware** @@ -75,6 +76,7 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol | RVP 3 | SkyLake, KabyLake, KabyLake Refresh | KabylakeOpenBoardPkg | KabylakeRvp3 | | WHL-U DDR4 RVP| WhiskeyLake | WhiskeylakeOpenBoardPkg | WhiskeylakeURvp| | CML-U LPDDR3 RVP | CometLake V1 | CometlakeOpenBoardPkg| CometlakeURvp | +| TGL-U LPDDR4 RVP | TigerLake | TigerlakeOpenBoardPkg| TigerlakeURvp | *Note: RVP = Reference and Validation Platform* @@ -253,6 +255,11 @@ return back to the minimum platform caller. | || |---build_config.cfg: CometlakeURvp specific build | || settings environment variables. | || + | ||--TigerlakeOpenBoardPkg + | || |--TigerlakeURvp + | || |---build_config.cfg: TigerlakeURvp specific build + | || settings environment variables. + | || |--FSP @@ -283,6 +290,10 @@ return back to the minimum platform caller. 1. This firmware project has been tested booting to Microsoft Windows 10 x64 with AHCI mode and External Graphic Device. 2. This firmware project has been also tested booting to Ubuntu 17.10 with AHCI mode and Integrated Graphic Device. +**TigerlakeOpenBoardPkg** +1. This firmware project has been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic Device. +2. This firmware project has been also tested booting to Puppy Linux BionicPup64 8.0 with AHCI mode and Integrated Graphic Device. + ### **Package Builds** In some cases, such as BoardModulePkg, a package may provide a set of functionality that is included in other diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg index 8aa6b22956..97c5c9a290 100644 --- a/Platform/Intel/build.cfg +++ b/Platform/Intel/build.cfg @@ -60,3 +60,4 @@ KabylakeRvp3 = KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg UpXtreme = WhiskeylakeOpenBoardPkg/UpXtreme/build_config.cfg WhiskeylakeURvp = WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg CometlakeURvp = CometlakeOpenBoardPkg/CometlakeURvp/build_config.cfg +TigerlakeURvp = TigerlakeOpenBoardPkg/TigerlakeURvp/build_config.cfg -- 2.24.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71566): https://edk2.groups.io/g/devel/message/71566 Mute This Topic: https://groups.io/mt/80524494/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [Patch V3 6/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add DSC and build files
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the DSC and build files necessary to build the TigerlakeURvp board instance. Key files: * build_config.cfg - Board-specific build configuration file. * OpenBoardPkg.dsc - The TigerlakeURvp board description file. * OpenBoardPkgPcd.dsc - Used for other PCD customization. * OpenBoardPkg.fdf - The TigerlakeURvp board flash file. * OpenBoardPkgBuildOption.dsc - Sets build options Based on PCD values. Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 347 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 702 ++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgBuildOption.dsc | 141 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc | 392 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/build_config.cfg | 34 ++ 5 files changed, 1616 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc new file mode 100644 index 00..a4265a839c --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc @@ -0,0 +1,347 @@ +## @file +# The main build description file for the TigerlakeURvp board. +# +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + DEFINE PLATFORM_PACKAGE = MinPlatformPkg + DEFINE PLATFORM_SI_PACKAGE = TigerlakeSiliconPkg + DEFINE PLATFORM_SI_BIN_PACKAGE = TigerlakeSiliconBinPkg + DEFINE PLATFORM_FSP_BIN_PACKAGE = TigerLakeFspBinPkg/Client + DEFINE PLATFORM_BOARD_PACKAGE= TigerlakeOpenBoardPkg + DEFINE BOARD = TigerlakeURvp + DEFINE PROJECT = $(PLATFORM_BOARD_PACKAGE)/$(BOARD) + DEFINE PEI_ARCH = IA32 + DEFINE DXE_ARCH = X64 + DEFINE TOP_MEMORY_ADDRESS= 0x0 + + # + # Default value for OpenBoardPkg.fdf use + # + DEFINE BIOS_SIZE_OPTION = SIZE_120 + +[Defines] + PLATFORM_NAME = $(PLATFORM_BOARD_PACKAGE) + PLATFORM_GUID = 465B0A0B-7AC1-443b-8F67-7B8DEC145F90 + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY = Build/$(PROJECT) + SUPPORTED_ARCHITECTURES = IA32|X64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = ALL + + FLASH_DEFINITION = $(PROJECT)/OpenBoardPkg.fdf + FIX_LOAD_TOP_MEMORY_ADDRESS = 0x0 + + # + # Include PCD configuration for this board. + # + !include OpenBoardPkgPcd.dsc + + +# +# SKU Identification section - list of all SKU IDs supported by this board. +# + +[SkuIds] + 0|DEFAULT # 0|DEFAULT is reserved and always required. + 0x01|SkuIdTglU + + + +# +# Includes section -
[edk2-devel] [Patch V3 5/8] TigerlakeOpenBoardPkg: Add modules
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175
Adds the following modules:
* BiosInfo
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c | 200
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 83
+++
2 files changed, 283 insertions(+)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..46c3d439c2
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,200 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define BASE_FV_SIZE 10
+
+#define FSP_WRAPPER_FV_SIZE 3
+
+#define TSN_MAC_ADDRESS_FV_SIZE 0
+
+#define BIOS_INFO_STRUCT_SIZE (BASE_FV_SIZE + FSP_WRAPPER_FV_SIZE +
TSN_MAC_ADDRESS_FV_SIZE)
+
+
+/*
+ BIOS_INFO structure is the base of the firmware volume layout for Intel
platform BIOS implementation
+ so security checker module can run based on the structure and throw
warnings, error or deadloop
+ when any unexpected firmware volumes are detected.
+
+ BIOS_INFO is recommended to support full entries of firmware volumes present
in a flash
+ with right type, attribute, version, flash map base address and size,
+ all associated information which is defined by BIOS_INFO_STRUCT structure.
+ - IBB firmware volumes, which are expected to be measured or/and verified
+by hardware base security solution to meet SecureBoot chain of trust
+(Intel BootGuard for example), have attribute 0x0.
+ - Post IBB firmware volumes, which are expected to be measured or/and
verified
+by BIOS (TCG code for measurement, RSA2048SHA256Sign algorithm for
verification for example),
+have attribute BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB.
+ - Else, follows Firmware Interface Table specification.
+*/
+#pragma pack (1)
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[BIOS_INFO_STRUCT_SIZE];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+BIOS_INFO_STRUCT_SIZE,
+0,
+ },
+ {
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashNvStorageVariableSize) + FixedPcdGet32
(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32
(PcdFlashNvStorageFtwSpareSize),
+ FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvAdvancedSize),
+ FixedPcdGet32 (PcdFlashFvAdvancedBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvOptionalSize),
+ FixedPcdGet32 (PcdFlashFvOptionalBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvOsBootSize),
+ FixedPcdGet32 (PcdFlashFvOsBootBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvUefiBootSize),
+ FixedPcdGet32 (PcdFlashFvUefiBootBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvPostMemorySize),
+ FixedPcdGet32 (PcdFlashFvPostMemoryBase)
+},
+{
+ /*
+Note :
+Startup ACM is one of the binaries in FvFirmwareBinaries,
+so put type 07 but not type 02.
+FIT table will contain a type 02 entry with actual address
+of ACM binary (it is passed as an input to FitGen tool).
+ */
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvFirmwareBinariesSize),
+ FixedPcdGet32 (PcdFlashFvFirmwareBinariesBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvFspSSize),
+ FixedPcdGet32 (PcdFlashFvFspSBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ 0x00,// IBB FV
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvFspMSize),
+ FixedPcdGet32 (PcdFlashFvFspMBase)
+},
+{
+ FIT_TYPE_07
[edk2-devel] [Patch V3 3/8] TigerlakeOpenBoardPkg: Add library instances
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following library instances: * FspWrapper/Library/PeiFspPolicyInitLib * FspWrapper/Library/PeiSiDefaultPolicyInitLib * FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib * Library/BasePlatformHookLib * Library/SmmSpiFlashCommonLib * Policy/Library/DxeSiliconPolicyUpdateLib Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspCpuPolicyInitLib.c | 79 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspMePolicyInitLib.c | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspMiscUpdInitLib.c | 27 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPchPolicyInitLib.c | 372 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.c | 308 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.h | 187 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.inf | 183 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c | 240 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspSecurityPolicyInitLib.c | 49 + Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiDefaultPolicyInitLib/PeiSiDefaultPolicyInitLib.c | 39 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiDefaultPolicyInitLib/PeiSiDefaultPolicyInitLib.inf | 38 ++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib/PeiSiPreMemDefaultPolicyInitLib.c | 40 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib/PeiSiPreMemDefaultPolicyInitLib.inf | 38 ++ Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c | 391 +++ Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 49 + Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 210 +
[edk2-devel] [Patch V3 4/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add library instances
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following library instances: * TigerlakeURvp/Library/BoardAcpiLib * TigerlakeURvp/Library/BoardInitLib * TigerlakeURvp/Library/PeiPlatformHookLib Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c | 88 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf | 43 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 136 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmTigerlakeURvpAcpiEnableLib.c | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c | 160 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/BoardSaInitPreMemLib.c | 96 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/GpioTableTigerlakeUDdr4Rvp.h | 93 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/GpioTableTigerlakeUDdr4RvpPreMem.h | 33 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.c | 41 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf | 49 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.c | 88 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf | 115 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpDetect.c | 39 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpInitPostMemLib.c | 153 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpInitPreMemLib.c | 445 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/TigerlakeURvpInit.h | 23 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/PeiPlatformHookLib/PeiPlatformHooklib.c | 212 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/PeiPlatformHookLib/PeiPlatformHooklib.inf | 58 ++ 18 files changed, 1923 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c new file mode 100644 index 00..1436d9b79a --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c @@ -0,0 +1,88 @@ +/** @file + Tiger Lake U RVP SMM Multi-Board ACPI Support library + + Copyright (c) 2021, Intel Corporation. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include +#include +#include +#
[edk2-devel] [Patch V3 1/8] TigerlakeOpenBoardPkg: Add package and headers
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175
Create the TigerlakeOpenBoardPkg to provide board support code. The
package may support Tigerlake boards. The package serves as a board
support package in the EDK II Minimum Platform design. Silicon support
for this package is provided in TigerLakeFspBinPkg in the FSP repository
and TigerlakeSiliconPkg in the edk2-platforms repository.
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h | 61
+
Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h | 17
+
Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h | 49
+
Platform/Intel/TigerlakeOpenBoardPkg/OpenBoardPkg.dec | 153
+
4 files changed, 280 insertions(+)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h
b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h
new file mode 100644
index 00..148abcce74
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h
@@ -0,0 +1,61 @@
+/** @file
+ Header file for Platform Boards Configurations.
+
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _PLATFORM_BOARD_CONFIG_H
+#define _PLATFORM_BOARD_CONFIG_H
+
+#include
+#include
+
+
+#pragma pack(1)
+
+typedef struct {
+ UINT8 ClkReqNumber : 4;
+ UINT8 ClkReqSupported : 1;
+ UINT8 DeviceResetPadActiveHigh : 1;
+ UINT32 DeviceResetPad;
+} ROOT_PORT_CLK_INFO;
+
+typedef struct {
+ UINT8 Section;
+ UINT8 Pin;
+} EXPANDER_GPIO_CONFIG;
+
+typedef struct {
+ UINT8 Type;
+ UINT8 Reserved[3]; // alignment for COMMON_GPIO_CONFIG
+ union {
+UINT32 Pin;
+EXPANDER_GPIO_CONFIG Expander;
+ } u;
+} BOARD_GPIO_CONFIG;
+
+// Do not change the encoding. It must correspond with PCH_PCIE_CLOCK_USAGE
from PCH RC.
+#define NOT_USED 0xFF
+#define FREE_RUNNING 0x80
+#define LAN_CLOCK0x70
+#define PCIE_PEG 0x40
+#define PCIE_PCH 0x00
+
+typedef struct {
+ UINT32 ClockUsage;
+ UINT32 ClkReqSupported;
+} PCIE_CLOCK_CONFIG;
+
+typedef union {
+ UINT64 Blob;
+ BOARD_GPIO_CONFIG BoardGpioConfig;
+ ROOT_PORT_CLK_INFO Info;
+ PCIE_CLOCK_CONFIG PcieClock;
+} PCD64_BLOB;
+
+#pragma pack()
+
+#endif // _PLATFORM_BOARD_CONFIG_H
+
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h
b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h
new file mode 100644
index 00..2e1ee9eca4
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h
@@ -0,0 +1,17 @@
+/** @file
+ Defines Platform BoardIds
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _PLATFORM_BOARD_ID_H_
+#define _PLATFORM_BOARD_ID_H_
+
+// TigerLake Sku IDs
+#define SkuIdTglU 0x1
+
+// TigerLake Board Id 0x01
+#define BoardIdTglUDdr4 0x01
+
+#endif // _PLATFORM_BOARD_ID_H_
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
new file mode 100644
index 00..0848efe5b6
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
@@ -0,0 +1,49 @@
+
+/** @file
+ Macros for platform to update different types of policy.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _POLICY_UPDATE_MACRO_H_
+#define _POLICY_UPDATE_MACRO_H_
+
+#ifdef UPDATE_POLICY
+#undef UPDATE_POLICY
+#endif
+
+#ifdef COPY_POLICY
+#undef COPY_POLICY
+#endif
+
+#ifdef GET_POLICY
+#undef GET_POLICY
+#endif
+
+#ifdef AND_POLICY
+#undef AND_POLICY
+#endif
+
+#ifdef OR_POLICY
+#undef OR_POLICY
+#endif
+
+#if FixedPcdGetBool(PcdFspModeSelection) == 1
+//
+// MACROS for platform code use
+//
+#define UPDATE_POLICY(UpdField, ConfigField, Value) UpdField = Value;
+#define COPY_POLICY(UpdField, ConfigField, Value, Size) CopyMem (UpdField,
Value, Size);
+#define GET_POLICY(UpdField, ConfigField, Value) Value = UpdField;
+#define AND_POLICY(UpdField, ConfigField, Value) UpdField &= Value;
+#define OR_POLICY(UpdField, ConfigField, Value) UpdField |= Value;
+#else
+#define UPDATE_POLICY(UpdField, ConfigField, Value) ConfigField = Value;
+#define COPY_POLICY(UpdField, ConfigField, Value, Size) CopyMem (ConfigField,
Value, Size);
+#define GET_POLICY(UpdField, ConfigField, Value) Value = ConfigField;
+#define AND_POLICY(UpdField, ConfigField, Value) ConfigField &= Value;
+#define OR_POLICY(UpdField, ConfigField, Value) ConfigField |= Value;
[edk2-devel] [Patch V3 2/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add fdf and header file
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following files: * TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf * TigerlakeURvp/Include/PeiPlatformHookLib.h Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf | 54 ++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/PeiPlatformHookLib.h | 130 ++ 2 files changed, 184 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf new file mode 100644 index 00..b21ae6401f --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf @@ -0,0 +1,54 @@ +## @file +# FDF file of Platform. +# +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +#=# +# 12 M BIOS - for FSP wrapper +#=# +DEFINE FLASH_BASE = 0xFF40 # +DEFINE FLASH_SIZE = 0x00C0 # +DEFINE FLASH_BLOCK_SIZE = 0x0001 # +DEFINE FLASH_NUM_BLOCKS = 0x00C0 # +#=# + +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = 0x # Flash addr (0xFF40) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = 0x0006 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = 0x # Flash addr (0xFF40) +SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize = 0x0002E000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 0x0002E000 # Flash addr (0xFF42E000) +SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize= 0x2000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x0003 # Flash addr (0xFF43) +SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x0003 # + +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset= 0x000E # Flash addr (0xFF4E) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x001A # +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x0028 # Flash addr (0xFF68) +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x0030 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x0058 # Flash addr (0xFF98) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize= 0x000A # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset= 0x0062 # Flash addr (0xFFA2) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x001D # + +## Firmware binaries FV absolute address requires 256kB alignment +## Build script checks the requirement. +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x0080 # Flash addr (0xFFC0) +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x0008 # Keep 0x8 or larger +SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset= 0x0088 # Flash addr (0xFFC8) +SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x0007 # Keep 0x7 or larger, change MicrocodeFv.fdf in case that this value change +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x008F # Flash addr (0xFFC0) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize= 0x0008 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset= 0x0097 # Flash addr (0xFFD7) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset= 0x00A1 # Flash addr (0xFFE1) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x0011 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset= 0x00B2 # Flash addr (0xFFF2) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x0001 # + +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset= 0x00B3 # Flash addr (0xFFF3) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize
Re: [edk2-devel] [Patch V2 4/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add library instances
I will send Patch V3 to remove commented code in SiliconEnableAcpi() and associated comments. > -Original Message- > From: Chaganty, Rangasai V > Sent: Wednesday, February 10, 2021 8:39 AM > To: Luo, Heng ; devel@edk2.groups.io > Cc: Desimone, Nathaniel L > Subject: RE: [Patch V2 4/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add library > instances > > Please remove commented code in SiliconEnableAcpi() and associated > comments. > > Thanks, > Sai > > -Original Message- > From: Luo, Heng > Sent: Tuesday, February 09, 2021 12:46 AM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V ; Desimone, > Nathaniel L > Subject: [Patch V2 4/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add library > instances > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 > > Adds the following library instances: > * TigerlakeURvp/Library/BoardAcpiLib > * TigerlakeURvp/Library/BoardInitLib > * TigerlakeURvp/Library/PeiPlatformHookLib > > Cc: Sai Chaganty > Cc: Nate DeSimone > Signed-off-by: Heng Luo > --- > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/S > mmMultiBoardAcpiSupportLib.c | 88 > + > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/S > mmMultiBoardAcpiSupportLib.inf| 43 > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/S > mmSiliconAcpiEnableLib.c | 160 > + > + > ++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/S > mmTigerlakeURvpAcpiEnableLib.c| 51 > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Bo > ardPchInitPreMemLib.c| 160 > + > + > ++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Bo > ardSaInitPreMemLib.c | 96 > + > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Gpi > oTableTigerlakeUDdr4Rvp.h | 93 > + > > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Gpi > oTableTigerlakeUDdr4RvpPreMem.h | 33 > + > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Pei > MultiBoardInitPostMemLib.c | 41 > + > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Pei > MultiBoardInitPostMemLib.inf| 49 > + > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Pei > MultiBoardInitPreMemLib.c | 88 > + > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Pei > MultiBoardInitPreMemLib.inf | 115 > + > ++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Pei > TigerlakeURvpDetect.c | 39 > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Pei > TigerlakeURvpInitPostMemLib.c | 153 > + > + > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Pei > TigerlakeURvpInitPreMemLib.c| 445 > + > + > + > + > + > + > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/Tig > erlakeURvpInit.h| 23 +++ > > Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/PeiPlatformHoo > kLib/PeiPlatformHooklib.c | 212 > + > ++
[edk2-devel] [edk2-platforms PATCH 1/1] Platform/Qemu/SbsaQemu: Add SMBIOS tables
o Add SMBIOS 3.4.0 tables using ArmPkg/Universal/Smbios.
o Bump the PcdSmbiosVersion PCD from 0x300 to 0x304 to indicate support
for SMBIOS 3.4.0, as is required by SBBR.
o Add an implementation of OemMiscLib that provides the system
information. The serial numbers, asset tags etc. are currently all
fixed strings, to allow fwts to pass without errors.
o Add SMBIOS PCDs to identify the platform. The processor serial
number, asset tag and part number are populated because otherwise
fwts reports errors.
Signed-off-by: Rebecca Cran
---
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 278
Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf | 37 +++
Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 33 ++-
Platform/Qemu/SbsaQemu/SbsaQemu.fdf | 7 +
4 files changed, 354 insertions(+), 1 deletion(-)
diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
new file mode 100644
index ..e736096dc607
--- /dev/null
+++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
@@ -0,0 +1,278 @@
+/** @file
+* OemMiscLib.c
+*
+* Copyright (c) 2021, NUVIA Inc. All rights reserved.
+* Copyright (c) 2020, Linaro Ltd. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/** Returns whether the specified processor is present or not.
+
+ @param ProcessIndex The processor index to check.
+
+ @return TRUE if the processor is present, FALSE otherwise.
+**/
+BOOLEAN
+OemIsSocketPresent (
+ UINTN ProcessorIndex
+ )
+{
+ if (ProcessorIndex == 0) {
+return TRUE;
+ }
+
+ return FALSE;
+}
+
+/** Gets the CPU frequency of the specified processor.
+
+ @param ProcessorIndex Index of the processor to get the frequency for.
+
+ @return CPU frequency in Hz
+**/
+UINTN OemGetCpuFreq (
+ UINT8 ProcessorIndex
+ )
+{
+ return 20; // 2 GHz
+}
+
+
+/** Walks through the Device Tree created by Qemu and counts the number
+of CPUs present in it.
+
+Copied from Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+
+@return The number of CPUs present.
+**/
+UINT16
+CountCpusFromFdt (
+ VOID
+)
+{
+ VOID *DeviceTreeBase;
+ INT32 Node;
+ INT32 Prev;
+ INT32 CpuNode;
+ INT32 CpuCount;
+
+ DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeBaseAddress);
+ ASSERT (DeviceTreeBase != NULL);
+
+ // Make sure we have a valid device tree blob
+ ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+ CpuNode = fdt_path_offset (DeviceTreeBase, "/cpus");
+ if (CpuNode <= 0) {
+DEBUG ((DEBUG_ERROR, "Unable to locate /cpus in device tree\n"));
+return 0;
+ }
+
+ CpuCount = 0;
+
+ // Walk through /cpus node and count the number of subnodes.
+ // The count of these subnodes corresponds to the number of
+ // CPUs created by Qemu.
+ Prev = fdt_first_subnode (DeviceTreeBase, CpuNode);
+ while (1) {
+CpuCount++;
+Node = fdt_next_subnode (DeviceTreeBase, Prev);
+if (Node < 0) {
+ break;
+}
+Prev = Node;
+ }
+
+ return CpuCount;
+}
+
+/** Gets information about the specified processor and stores it in
+the structures provided.
+
+ @param ProcessorIndex Index of the processor to get the information for.
+ @param ProcessorStatus Processor status.
+ @param ProcessorCharacteristics Processor characteritics.
+ @param MiscProcessorDataMiscellaneous processor information.
+
+ @return TRUE on success, FALSE on failure.
+**/
+BOOLEAN
+OemGetProcessorInformation (
+ IN UINTN ProcessorIndex,
+ IN OUT PROCESSOR_STATUS_DATA *ProcessorStatus,
+ IN OUT PROCESSOR_CHARACTERISTIC_FLAGS *ProcessorCharacteristics,
+ IN OUT OEM_MISC_PROCESSOR_DATA*MiscProcessorData
+ )
+{
+ UINT16 CoreCount = CountCpusFromFdt ();
+
+ if (ProcessorIndex == 0) {
+ProcessorStatus->Bits.CpuStatus = 1; // CPU enabled
+ProcessorStatus->Bits.Reserved1 = 0;
+ProcessorStatus->Bits.SocketPopulated = 1;
+ProcessorStatus->Bits.Reserved2 = 0;
+ } else {
+ProcessorStatus->Bits.CpuStatus = 0; // CPU disabled
+ProcessorStatus->Bits.Reserved1 = 0;
+ProcessorStatus->Bits.SocketPopulated = 0;
+ProcessorStatus->Bits.Reserved2 = 0;
+ }
+
+ ProcessorCharacteristics->ProcessorReserved1 = 0;
+ ProcessorCharacteristics->ProcessorUnknown= 0;
+ ProcessorCharacteristics->Processor64BitCapable = 1;
+ ProcessorCharacteristics->ProcessorMultiCore = 1;
+ ProcessorCharacteristics->ProcessorHardwareThread = 0;
+ ProcessorCharacteristics->ProcessorExecuteProtection = 1;
+ ProcessorCharacteristics->ProcessorEnhancedVirtualization = 0;
+ ProcessorCharacteristics->ProcessorPowerPerformanceCtrl = 0;
+ ProcessorCharacteristics->Processor128BitCapable = 0;
+ ProcessorCharacteristics->ProcessorArm64SocId =
Re: [edk2-devel] [PATCH v1 1/1] StandaloneMmPkg/StandaloneMmCore: Fix compiler warning
Hi Sami, I'm happy to change the spacing. The code base is very inconsistent with this (a somewhat similar scenario would be space before opening parenthesis) and it often trends toward a space after the cast. The space before opening parenthesis is clearly required. However, I've never managed to find a definitive statement in the EDK II C Coding Standards Specification regarding typecast spacing. For my own future benefit, could you please point me to the definitive statement regarding this rule in the specification? In the specification itself, the following section has no space between the typecast and the variable: https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/v/release%2F2.20/5_source_files/57_c_programming#5-7-2-3-comparison-of-unsigned-integer-types-to-be-greater-than-0-is-permitted The following section does have a space between the typecast and variable: https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/v/release%2F2.20/5_source_files/57_c_programming#5-7-2-4-the-ordering-of-terms-in-predicate-expressions-may-impact-performance-significantly Thanks, Michael On 2/9/2021 2:07 PM, Sami Mujawar wrote: Hi Michael, Please see my response inline marked [SAMI]. Other than the minor space change needed to match the coding style, this patch looks good to me. With that changed: Reviewed-by: Sami Mujawar Regards, Sami Mujawar -Original Message- From: mikub...@linux.microsoft.com Sent: 03 February 2021 03:51 AM To: devel@edk2.groups.io Cc: Ard Biesheuvel ; Sami Mujawar ; Jiewen Yao ; Supreeth Venkatesh Subject: [PATCH v1 1/1] StandaloneMmPkg/StandaloneMmCore: Fix compiler warning From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3204 Fixes the following compiler warning in VS2019 by changing defining the MmramRangeCount variable to be UINTN and type casting prior to value assignment. \edk2\StandaloneMmPkg\Core\StandaloneMmCore.c(570): error C2220: the following warning is treated as an error \edk2\StandaloneMmPkg\Core\StandaloneMmCore.c(570): warning C4244: '=': conversion from 'UINT64' to 'UINT32', possible loss of data Cc: Ard Biesheuvel Cc: Sami Mujawar Cc: Jiewen Yao Cc: Supreeth Venkatesh Signed-off-by: Michael Kubacki --- StandaloneMmPkg/Core/StandaloneMmCore.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/StandaloneMmPkg/Core/StandaloneMmCore.c b/StandaloneMmPkg/Core/StandaloneMmCore.c index 8388ec289ca8..d254a68f2fb8 100644 --- a/StandaloneMmPkg/Core/StandaloneMmCore.c +++ b/StandaloneMmPkg/Core/StandaloneMmCore.c @@ -511,7 +511,7 @@ StandaloneMmMain ( EFI_HOB_GUID_TYPE *MmramRangesHob; EFI_MMRAM_HOB_DESCRIPTOR_BLOCK *MmramRangesHobData; EFI_MMRAM_DESCRIPTOR*MmramRanges; - UINT32 MmramRangeCount; + UINTN MmramRangeCount; EFI_HOB_FIRMWARE_VOLUME *BfvHob; ProcessLibraryConstructorList (HobStart, &gMmCoreMmst); @@ -546,7 +546,7 @@ StandaloneMmMain ( MmramRangesHobData = GET_GUID_HOB_DATA (MmramRangesHob); ASSERT (MmramRangesHobData != NULL); MmramRanges = MmramRangesHobData->Descriptor; -MmramRangeCount = MmramRangesHobData->NumberOfMmReservedRegions; +MmramRangeCount = (UINTN) MmramRangesHobData->NumberOfMmReservedRegions; [SAMI] There should be no space between the typecast and the variable, i.e. space after typecast (UINTN) and MmramRangesHobData. Same at other places in this file. [/SAMI] ASSERT (MmramRanges); ASSERT (MmramRangeCount); @@ -554,7 +554,7 @@ StandaloneMmMain ( // Copy the MMRAM ranges into MM_CORE_PRIVATE_DATA table just in case any // code relies on them being present there // -gMmCorePrivate->MmramRangeCount = MmramRangeCount; +gMmCorePrivate->MmramRangeCount = (UINT64) MmramRangeCount; gMmCorePrivate->MmramRanges = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (MmramRangeCount * sizeof (EFI_MMRAM_DESCRIPTOR)); ASSERT (gMmCorePrivate->MmramRanges != 0); @@ -567,7 +567,7 @@ StandaloneMmMain ( DataInHob = GET_GUID_HOB_DATA (GuidHob); gMmCorePrivate = (MM_CORE_PRIVATE_DATA *)(UINTN)DataInHob->Address; MmramRanges = (EFI_MMRAM_DESCRIPTOR *)(UINTN)gMmCorePrivate->MmramRanges; -MmramRangeCount = gMmCorePrivate->MmramRangeCount; +MmramRangeCount = (UINTN) gMmCorePrivate->MmramRangeCount; } // -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71557): https://edk2.groups.io/g/devel/message/71557 Mute This Topic: https://groups.io/mt/80346365/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [Patch] BaseTools: Fix the ending character for Linux script BuildEnv
Pushed
PR: https://github.com/tianocore/edk2/pull/1419
Commit:
https://github.com/tianocore/edk2/pull/1419/commits/c10b513830e63fa4fc28f1edc43352de8d97b61f
Mike
> -Original Message-
> From: Kinney, Michael D
> Sent: Tuesday, February 9, 2021 5:21 PM
> To: Feng, Bob C ; Leif Lindholm ;
> Kinney, Michael D
> Cc: devel@edk2.groups.io; Liming Gao ; Chen,
> Christine ; Matthew Carlson
>
> Subject: RE: [Patch] BaseTools: Fix the ending character for Linux script
> BuildEnv
>
> Hi Bob,
>
> Reviewed-by: Michael D Kinney
>
> It is difficult to see the changes. I did verify that the file before the
> patch had mixed line
> endings and the one after the patch is LF only line endings.
>
> Minor issues with Author name with a ','. I fixed that when I added the rb
> to the commit message.
>
> Best regards,
>
> Mike
>
>
> > -Original Message-
> > From: Feng, Bob C
> > Sent: Tuesday, February 9, 2021 7:03 AM
> > To: Kinney, Michael D ; Leif Lindholm
> >
> > Cc: devel@edk2.groups.io; Liming Gao ; Chen,
> > Christine ; Matthew Carlson
> >
> > Subject: RE: [Patch] BaseTools: Fix the ending character for Linux script
> > BuildEnv
> >
> > Hi Mike
> >
> > Could you help review this patch and push it?
> > Liming may take leave now.
> >
> > Thanks,
> > Bob
> >
> > -Original Message-
> > From: Leif Lindholm
> > Sent: Tuesday, February 9, 2021 11:01 PM
> > To: Feng, Bob C
> > Cc: devel@edk2.groups.io; Liming Gao ; Chen,
> > Christine ; Matthew Carlson
> > ; Kinney, Michael D
> > Subject: Re: [Patch] BaseTools: Fix the ending character for Linux script
> > BuildEnv
> >
> > On Tue, Feb 09, 2021 at 22:58:08 +0800, Bob Feng wrote:
> > > Signed-off-by: Bob Feng
> > > Cc: Liming Gao
> > > Cc: Yuwei Chen
> > > Cc: Matthew Carlson
> > > Cc: Michael D Kinney
> > > Cc: Leif Lindholm
> >
> > SMTP strips the intersting aspect, but as long as the end result is a
> > BuildEnv that has no characters:
> > Reviewed-by: Leif Lindholm
> >
> > > ---
> > > BaseTools/BuildEnv | 24
> > > 1 file changed, 12 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/BaseTools/BuildEnv b/BaseTools/BuildEnv index
> > > 8d283e10c0..275f4c5901 100755
> > > --- a/BaseTools/BuildEnv
> > > +++ b/BaseTools/BuildEnv
> > > @@ -44,11 +44,11 @@ RestorePreviousConfiguration() {
> > >break
> > > fi
> > >done
> > > fi
> > >fi
> > > -
> > > +
> > >PREVIOUS_CONF_FILE=$CONF_PATH/BuildEnv.sh
> > >if [ -e $PREVIOUS_CONF_FILE ]
> > >then
> > > echo Loading previous configuration from $PREVIOUS_CONF_FILE
> > > . $PREVIOUS_CONF_FILE
> > > @@ -196,21 +196,21 @@ AddEdkToolsToPath() {
> > > return 1
> > >fi
> > >
> > >EDK_TOOLS_PATH_BIN=`GetEdkToolsPathBinDirectory`
> > >
> > > - # check if the edk2basetools pip package is available
> > > - if $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
> > > -# if it is, use the pip version of the wrappers
> > > -echo "Using Pip Basetools"
> > > -AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
> > > - else
> > > -echo "Using EDK2 in-source Basetools"
> > > -AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
> > > - fi
> > > -
> > > -
> > > + # check if the edk2basetools pip package is available if
> > > + $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
> > > +# if it is, use the pip version of the wrappers
> > > +echo "Using Pip Basetools"
> > > +AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
> > > + else
> > > +echo "Using EDK2 in-source Basetools"
> > > +AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
> > > + fi
> > > +
> > > +
> > >AddDirToStartOfPath $EDK_TOOLS_PATH_BIN
> > >
> > > }
> > >
> > > CopySingleTemplateFile() {
> > > --
> > > 2.29.1.windows.1
> > >
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[edk2-devel] [PATCH v2 6/6] SecurityPkg: Tcg2Acpi: Added unblock memory interface for NVS region
This changes added usage of DxeMmUnblockMemoryLib to explicitly request
allocated NVS region to be accessible from MM environment. It will bring
in compatibility with architectures that supports full memory blockage
inside MM.
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Qi Zhang
Cc: Rahul Kumar
Signed-off-by: Kun Qin
---
Notes:
v2:
- Newly added in v2.
SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.c | 6 ++
SecurityPkg/SecurityPkg.dsc | 1 +
SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.inf | 1 +
3 files changed, 8 insertions(+)
diff --git a/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.c
b/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.c
index 7080df81efe7..cc37a8d5b9d9 100644
--- a/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.c
+++ b/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.c
@@ -36,6 +36,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include
#include
#include
+#include
//
// Physical Presence Interface Version supported by Platform
@@ -145,6 +146,11 @@ AssignOpRegion (
ZeroMem ((VOID *)(UINTN)MemoryAddress, Size);
OpRegion->RegionOffset = (UINT32) (UINTN) MemoryAddress;
OpRegion->RegionLen= (UINT8) Size;
+ // Request to unblock this region from MM core
+ Status = DxeMmUnblockMemoryRequest (MemoryAddress, EFI_SIZE_TO_PAGES
(Size));
+ if (Status != EFI_UNSUPPORTED && EFI_ERROR (Status)) {
+ASSERT_EFI_ERROR (Status);
+ }
break;
}
}
diff --git a/SecurityPkg/SecurityPkg.dsc b/SecurityPkg/SecurityPkg.dsc
index 37242da93f3d..d937521db388 100644
--- a/SecurityPkg/SecurityPkg.dsc
+++ b/SecurityPkg/SecurityPkg.dsc
@@ -67,6 +67,7 @@ [LibraryClasses]
VariableKeyLib|SecurityPkg/Library/VariableKeyLibNull/VariableKeyLibNull.inf
RpmcLib|SecurityPkg/Library/RpmcLibNull/RpmcLibNull.inf
TcgEventLogRecordLib|SecurityPkg/Library/TcgEventLogRecordLib/TcgEventLogRecordLib.inf
+
DxeMmUnblockMemoryLib|MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.inf
[LibraryClasses.ARM]
#
diff --git a/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.inf
b/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.inf
index d8e06881c01d..60455610f9f6 100644
--- a/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.inf
+++ b/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.inf
@@ -55,6 +55,7 @@ [LibraryClasses]
Tpm2CommandLib
Tcg2PhysicalPresenceLib
PcdLib
+ DxeMmUnblockMemoryLib
[Guids]
gEfiTpmDeviceInstanceTpm20DtpmGuid## PRODUCES
## GUID # TPM device identifier
--
2.30.0.windows.1
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[edk2-devel] [PATCH v2 5/6] SecurityPkg: Tcg2Smm: Added support for Standalone Mm
https://bugzilla.tianocore.org/show_bug.cgi?id=3169
This change added Standalone MM instance of Tcg2. The notify function for
Standalone MM instance is left empty.
A designated dependency library was created for DXE drivers to link as an
anonymous library.
Lastly, the support of CI build for Tcg2 Standalone MM module is added.
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Qi Zhang
Cc: Rahul Kumar
Signed-off-by: Kun Qin
---
Notes:
v2:
- Newly added.
SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.c | 48
SecurityPkg/Tcg/Tcg2Smm/Tcg2StandaloneMm.c | 71
++
SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.inf | 39 ++
SecurityPkg/SecurityPkg.ci.yaml | 1 +
SecurityPkg/SecurityPkg.dec | 1 +
SecurityPkg/SecurityPkg.dsc | 10 +++
SecurityPkg/Tcg/Tcg2Smm/Tcg2StandaloneMm.inf| 77
7 files changed, 247 insertions(+)
diff --git a/SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.c
b/SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.c
new file mode 100644
index ..12b23813dce1
--- /dev/null
+++ b/SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.c
@@ -0,0 +1,48 @@
+/** @file
+ Runtime DXE part corresponding to StandaloneMM Tcg2 module.
+
+This module installs gTcg2MmSwSmiRegisteredGuid to notify readiness of
+StandaloneMM Tcg2 module.
+
+Copyright (c) 2019 - 2021, Arm Ltd. All rights reserved.
+Copyright (c) Microsoft Corporation.
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+
+#include
+#include
+
+/**
+ The constructor function installs gTcg2MmSwSmiRegisteredGuid to notify
+ readiness of StandaloneMM Tcg2 module.
+
+ @param ImageHandle The firmware allocated handle for the EFI image.
+ @param SystemTable A pointer to the Management mode System Table.
+
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+Tcg2MmDependencyLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUSStatus;
+ EFI_HANDLEHandle;
+
+ Handle = NULL;
+ Status = gBS->InstallProtocolInterface (
+ &Handle,
+ &gTcg2MmSwSmiRegisteredGuid,
+ EFI_NATIVE_INTERFACE,
+ NULL
+ );
+ ASSERT_EFI_ERROR (Status);
+ return EFI_SUCCESS;
+}
diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tcg2StandaloneMm.c
b/SecurityPkg/Tcg/Tcg2Smm/Tcg2StandaloneMm.c
new file mode 100644
index ..9e0095efbc5e
--- /dev/null
+++ b/SecurityPkg/Tcg/Tcg2Smm/Tcg2StandaloneMm.c
@@ -0,0 +1,71 @@
+/** @file
+ TCG2 Standalone MM driver that updates TPM2 items in ACPI table and registers
+ SMI2 callback functions for Tcg2 physical presence, ClearMemory, and
+ sample for dTPM StartMethod.
+
+ Caution: This module requires additional review when modified.
+ This driver will have external input - variable and ACPINvs data in SMM mode.
+ This external input must be validated carefully to avoid security issue.
+
+ PhysicalPresenceCallback() and MemoryClearCallback() will receive untrusted
input and do some check.
+
+Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) Microsoft Corporation.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "Tcg2Smm.h"
+#include
+
+/**
+ Notify the system that the SMM variable driver is ready.
+**/
+VOID
+Tcg2NotifyMmReady (
+ VOID
+ )
+{
+ // Do nothing
+}
+
+/**
+ This function is an abstraction layer for implementation specific Mm buffer
validation routine.
+
+ @param Buffer The buffer start address to be checked.
+ @param Length The buffer length to be checked.
+
+ @retval TRUE This buffer is valid per processor architecture and not
overlap with SMRAM.
+ @retval FALSE This buffer is not valid per processor architecture or overlap
with SMRAM.
+**/
+BOOLEAN
+IsBufferOutsideMmValid (
+ IN EFI_PHYSICAL_ADDRESS Buffer,
+ IN UINT64Length
+ )
+{
+ return MmIsBufferOutsideMmValid (Buffer, Length);
+}
+
+/**
+ The driver's entry point.
+
+ It install callbacks for TPM physical presence and MemoryClear, and locate
+ SMM variable to be used in the callback function.
+
+ @param[in] ImageHandle The firmware allocated handle for the EFI image.
+ @param[in] SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS The entry point is executed successfully.
+ @retval Others Some error occurs when executing this entry point.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeTcgStandaloneMm (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_MM_SYSTEM_TABLE *SystemTable
+ )
+{
+ return InitializeTcgCommon ();
+}
diff --git a/SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.in
[edk2-devel] [PATCH v2 4/6] SecurityPkg: Tcg2Smm: Separate Tcg2Smm into 2 modules
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3169
This change separated the original Tcg2Smm module into 2 drivers: the
SMM driver that registers callback for physical presence and memory
clear; the Tcg2Acpi driver that patches and publishes ACPI table for
runtime use.
Tcg2Smm introduced an SMI root handler to allow Tcg2Acpi to communicate
the NVS region used by Tpm.asl and exchange the registered SwSmiValue.
Lastly, Tcg2Smm driver will publish gTcg2MmSwSmiRegisteredGuid at the end
of entrypoint to ensure Tcg2Acpi to load after Tcg2Smm is ready to
communicate.
Cc: Jiewen Yao
Cc: Jian J Wang
Cc: Qi Zhang
Cc: Rahul Kumar
Signed-off-by: Kun Qin
---
Notes:
v2:
- Newly added in v2.
v2:
- Newly added.
SecurityPkg/Tcg/{Tcg2Smm/Tcg2Smm.c => Tcg2Acpi/Tcg2Acpi.c} | 350
SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c | 850
SecurityPkg/Tcg/Tcg2Smm/Tcg2TraditionalMm.c| 82 ++
SecurityPkg/Include/Guid/TpmNvsMm.h| 68 ++
SecurityPkg/SecurityPkg.dec| 7 +
SecurityPkg/SecurityPkg.dsc| 1 +
SecurityPkg/Tcg/{Tcg2Smm/Tcg2Smm.inf => Tcg2Acpi/Tcg2Acpi.inf} | 32 +-
SecurityPkg/Tcg/{Tcg2Smm => Tcg2Acpi}/Tpm.asl | 0
SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.h | 119 +--
SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf| 25 +-
10 files changed, 542 insertions(+), 992 deletions(-)
diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c
b/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.c
similarity index 72%
copy from SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c
copy to SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.c
index 08105c3692ba..7080df81efe7 100644
--- a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c
+++ b/SecurityPkg/Tcg/Tcg2Acpi/Tcg2Acpi.c
@@ -1,20 +1,74 @@
/** @file
- It updates TPM2 items in ACPI table and registers SMI2 callback
- functions for Tcg2 physical presence, ClearMemory, and sample
- for dTPM StartMethod.
+ This driver implements TPM 2.0 definition block in ACPI table and
+ populates registered SMI callback functions for Tcg2 physical presence
+ and MemoryClear to handle the requests for ACPI method.
Caution: This module requires additional review when modified.
This driver will have external input - variable and ACPINvs data in SMM mode.
This external input must be validated carefully to avoid security issue.
- PhysicalPresenceCallback() and MemoryClearCallback() will receive untrusted
input and do some check.
-
Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) Microsoft Corporation.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-#include "Tcg2Smm.h"
+#include
+
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+//
+// Physical Presence Interface Version supported by Platform
+//
+#define PHYSICAL_PRESENCE_VERSION_TAG "$PV"
+#define PHYSICAL_PRESENCE_VERSION_SIZE 4
+
+//
+// PNP _HID for TPM2 device
+//
+#define TPM_HID_TAG""
+#define TPM_HID_PNP_SIZE 8
+#define TPM_HID_ACPI_SIZE 9
+
+#define TPM_PRS_RESL "RESL"
+#define TPM_PRS_RESS "RESS"
+#define TPM_PRS_RES_NAME_SIZE 4
+//
+// Minimum PRS resource template size
+// 1 bytefor BufferOp
+// 1 bytefor PkgLength
+// 2 bytes for BufferSize
+// 12 bytes for Memory32Fixed descriptor
+// 5 bytes for Interrupt descriptor
+// 2 bytes for END Tag
+//
+#define TPM_POS_RES_TEMPLATE_MIN_SIZE (1 + 1 + 2
+ 12 + 5 + 2)
+
+//
+// Max Interrupt buffer size for PRS interrupt resource
+// Now support 15 interrupts in maxmum
+//
+#define MAX_PRS_INT_BUF_SIZE (15*4)
#pragma pack(1)
@@ -49,142 +103,8 @@ EFI_TPM2_ACPI_TABLE_V4 mTpm2AcpiTemplate = {
EFI_TPM2_ACPI_TABLE_START_METHOD_TIS, // StartMethod
};
-EFI_SMM_VARIABLE_PROTOCOL *mSmmVariable;
TCG_NVS*mTcgNvs;
-/**
- Software SMI callback for TPM physical presence which is called from ACPI
method.
-
- Caution: This function may receive untrusted input.
- Variable and ACPINvs are external input, so this function will validate
- its data structure to be valid value.
-
- @param[in] DispatchHandle The unique handle assigned to this handler
by SmiHandlerRegister().
- @param[in] Context Points to an optional handler context which
was specified when the
- handler was registered.
- @param[in, out] CommB
[edk2-devel] [PATCH v2 2/6] MdeModulePkg: VariableSmmRuntimeDxe: Added request unblock memory interface
This changes added usage of DxeMmUnblockMemoryLib to explicitly request
runtime cache regions(and its indicators) to be accessible from MM
environment when PcdEnableVariableRuntimeCache is enabled. It will bring
in compatibility with architectures that supports full memory blockage
inside MM.
Cc: Jian J Wang
Cc: Hao A Wu
Cc: Liming Gao
Signed-off-by: Kun Qin
---
Notes:
v2:
- Newly added in v2.
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c | 42
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf | 1 +
2 files changed, 43 insertions(+)
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
index c47e614d81f4..b96ca4b89ee4 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c
@@ -35,6 +35,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include
#include
#include
+#include
#include
#include
@@ -165,6 +166,7 @@ InitVariableCache (
)
{
VARIABLE_STORE_HEADER *VariableCacheStorePtr;
+ EFI_STATUS Status;
if (TotalVariableCacheSize == NULL) {
return EFI_INVALID_PARAMETER;
@@ -186,6 +188,18 @@ InitVariableCache (
if (*VariableCacheBuffer == NULL) {
return EFI_OUT_OF_RESOURCES;
}
+
+ //
+ // Request to unblock the newly allocated cache region to be accessible from
inside MM
+ //
+ Status = DxeMmUnblockMemoryRequest (
+(EFI_PHYSICAL_ADDRESS) (UINTN) *VariableCacheBuffer,
+EFI_SIZE_TO_PAGES (*TotalVariableCacheSize)
+);
+ if (Status != EFI_UNSUPPORTED && EFI_ERROR (Status)) {
+return Status;
+ }
+
VariableCacheStorePtr = *VariableCacheBuffer;
SetMem32 ((VOID *) VariableCacheStorePtr, *TotalVariableCacheSize, (UINT32)
0x);
@@ -1536,6 +1550,34 @@ SendRuntimeVariableCacheContextToSmm (
SmmRuntimeVarCacheContext->ReadLock = &mVariableRuntimeCacheReadLock;
SmmRuntimeVarCacheContext->HobFlushComplete = &mHobFlushComplete;
+ //
+ // Request to unblock this region to be accessible from inside MM environment
+ // These fields "should" be all on the same page, but just to be on the safe
side...
+ //
+ Status = DxeMmUnblockMemoryRequest (
+(EFI_PHYSICAL_ADDRESS) ALIGN_VALUE ((UINTN)
SmmRuntimeVarCacheContext->PendingUpdate - EFI_PAGE_SIZE + 1, EFI_PAGE_SIZE),
+EFI_SIZE_TO_PAGES (sizeof(mVariableRuntimeCachePendingUpdate))
+);
+ if (Status != EFI_UNSUPPORTED && EFI_ERROR (Status)) {
+goto Done;
+ }
+
+ Status = DxeMmUnblockMemoryRequest (
+(EFI_PHYSICAL_ADDRESS) ALIGN_VALUE ((UINTN)
SmmRuntimeVarCacheContext->ReadLock - EFI_PAGE_SIZE + 1, EFI_PAGE_SIZE),
+EFI_SIZE_TO_PAGES (sizeof(mVariableRuntimeCacheReadLock))
+);
+ if (Status != EFI_UNSUPPORTED && EFI_ERROR (Status)) {
+goto Done;
+ }
+
+ Status = DxeMmUnblockMemoryRequest (
+(EFI_PHYSICAL_ADDRESS) ALIGN_VALUE ((UINTN)
SmmRuntimeVarCacheContext->HobFlushComplete - EFI_PAGE_SIZE + 1, EFI_PAGE_SIZE),
+EFI_SIZE_TO_PAGES (sizeof(mHobFlushComplete))
+);
+ if (Status != EFI_UNSUPPORTED && EFI_ERROR (Status)) {
+goto Done;
+ }
+
//
// Send data to SMM.
//
diff --git
a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
index b6dbc839e023..b84a407833c2 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
@@ -60,6 +60,7 @@ [LibraryClasses]
TpmMeasurementLib
SafeIntLib
PcdLib
+ DxeMmUnblockMemoryLib
[Protocols]
gEfiVariableWriteArchProtocolGuid ## PRODUCES
--
2.30.0.windows.1
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[edk2-devel] [PATCH v2 3/6] SecurityPkg: Tcg2Smm: Switching from gSmst to gMmst
This change replaced gSmst with gMmst to support broader compatibility under MM environment for Tcg2Smm driver. Cc: Jiewen Yao Cc: Jian J Wang Cc: Qi Zhang Cc: Rahul Kumar Signed-off-by: Kun Qin --- Notes: v2: - Newly added in v2. SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c | 4 ++-- SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.h | 2 +- SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c index 91aebb62b8bf..08105c3692ba 100644 --- a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c +++ b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c @@ -870,7 +870,7 @@ InitializeTcgSmm ( // // Get the Sw dispatch protocol and register SMI callback functions. // - Status = gSmst->SmmLocateProtocol (&gEfiSmmSwDispatch2ProtocolGuid, NULL, (VOID**)&SwDispatch); + Status = gMmst->MmLocateProtocol (&gEfiSmmSwDispatch2ProtocolGuid, NULL, (VOID**)&SwDispatch); ASSERT_EFI_ERROR (Status); SwContext.SwSmiInputValue = (UINTN) -1; Status = SwDispatch->Register (SwDispatch, PhysicalPresenceCallback, &SwContext, &SwHandle); @@ -891,7 +891,7 @@ InitializeTcgSmm ( // // Locate SmmVariableProtocol. // - Status = gSmst->SmmLocateProtocol (&gEfiSmmVariableProtocolGuid, NULL, (VOID**)&mSmmVariable); + Status = gMmst->MmLocateProtocol (&gEfiSmmVariableProtocolGuid, NULL, (VOID**)&mSmmVariable); ASSERT_EFI_ERROR (Status); // diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.h b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.h index fd19e7dc0553..d7328c8f2ac9 100644 --- a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.h +++ b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.h @@ -24,7 +24,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include #include -#include +#include #include #include #include diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf index 2ebf2e05f2ea..872ed27cbe71 100644 --- a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf +++ b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf @@ -50,7 +50,7 @@ [LibraryClasses] BaseLib BaseMemoryLib UefiDriverEntryPoint - SmmServicesTableLib + MmServicesTableLib UefiBootServicesTableLib DebugLib DxeServicesLib -- 2.30.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71552): https://edk2.groups.io/g/devel/message/71552 Mute This Topic: https://groups.io/mt/80522085/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 1/6] MdeModulePkg: DxeMmUnblockMemoryLib: Added definition and null instance
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3168
This interface definition provides an abstraction layer for DXE drivers
to request certain memory blocks to be mapped/unblocked for accessibility
inside MM environment.
Cc: Jian J Wang
Cc: Hao A Wu
Cc: Eric Dong
Cc: Ray Ni
Cc: Jiewen Yao
Signed-off-by: Kun Qin
---
Notes:
v2:
- Resend with practical usage. No change [Hao]
MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.c | 40
MdeModulePkg/Include/Library/DxeMmUnblockMemoryLib.h | 40
MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.inf | 29
++
MdeModulePkg/MdeModulePkg.dec| 5
+++
MdeModulePkg/MdeModulePkg.dsc| 2 +
5 files changed, 116 insertions(+)
diff --git
a/MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.c
b/MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.c
new file mode 100644
index ..774a7e41cfb0
--- /dev/null
+++ b/MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.c
@@ -0,0 +1,40 @@
+/** @file
+ Null instance of MM Unblock Page Library.
+
+ This library provides an abstraction layer of requesting certain page access
to be unblocked
+ by MM environment if applicable.
+
+ Copyright (c), Microsoft Corporation.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include
+
+/**
+ This API provides a way to unblock certain data pages to be accessible
inside MM environment.
+
+ @param UnblockAddress The address of buffer caller requests to
unblock, the address
+ has to be page aligned.
+ @param NumberOfPages The number of pages requested to be
unblocked from MM
+ environment.
+
+ @return EFI_SUCCESS The request goes through successfully.
+ @return EFI_NOT_AVAILABLE_YET The requested functionality is not produced
yet.
+ @return EFI_UNSUPPORTED The requested functionality is not supported
on current platform.
+ @return EFI_SECURITY_VIOLATION The requested address failed to pass
security check for
+ unblocking.
+ @return EFI_INVALID_PARAMETER Input address either NULL pointer or not
page aligned.
+ @return EFI_ACCESS_DENIED The request is rejected due to system has
passed certain boot
+ phase.
+
+**/
+EFI_STATUS
+EFIAPI
+DxeMmUnblockMemoryRequest (
+ IN EFI_PHYSICAL_ADDRESS UnblockAddress,
+ IN UINT64 NumberOfPages
+ )
+{
+ return EFI_UNSUPPORTED;
+}
diff --git a/MdeModulePkg/Include/Library/DxeMmUnblockMemoryLib.h
b/MdeModulePkg/Include/Library/DxeMmUnblockMemoryLib.h
new file mode 100644
index ..8b63eb74a078
--- /dev/null
+++ b/MdeModulePkg/Include/Library/DxeMmUnblockMemoryLib.h
@@ -0,0 +1,40 @@
+/** @file
+ MM Unblock Memory Library Interface.
+
+ This library provides an abstraction layer of requesting certain page access
to be unblocked
+ by MM environment if applicable.
+
+ Copyright (c), Microsoft Corporation.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _DXE_MM_UNBLOCK_MEMORY_LIB_H_
+#define _DXE_MM_UNBLOCK_MEMORY_LIB_H_
+
+/**
+ This API provides a way to unblock certain data pages to be accessible
inside MM environment.
+
+ @param UnblockAddress The address of buffer caller requests to
unblock, the address
+ has to be page aligned.
+ @param NumberOfPages The number of pages requested to be
unblocked from MM
+ environment.
+
+ @return EFI_SUCCESS The request goes through successfully.
+ @return EFI_NOT_AVAILABLE_YET The requested functionality is not produced
yet.
+ @return EFI_UNSUPPORTED The requested functionality is not supported
on current platform.
+ @return EFI_SECURITY_VIOLATION The requested address failed to pass
security check for
+ unblocking.
+ @return EFI_INVALID_PARAMETER Input address either NULL pointer or not
page aligned.
+ @return EFI_ACCESS_DENIED The request is rejected due to system has
passed certain boot
+ phase.
+
+**/
+EFI_STATUS
+EFIAPI
+DxeMmUnblockMemoryRequest (
+ IN EFI_PHYSICAL_ADDRESS UnblockAddress,
+ IN UINT64 NumberOfPages
+);
+
+#endif // _DXE_MM_UNBLOCK_MEMORY_LIB_H_
diff --git
a/MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.inf
b/MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.inf
new file mode 100644
index ..e40462e5ab81
--- /dev/null
+++ b/MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.inf
@@ -0,0 +1,29 @@
+## @file
+# Null instance of MM Unblock Page Library.
+#
+# This library pr
[edk2-devel] [PATCH v2 0/6] Add DxeMmUnblockMemoryLib Interface and Usages
The interface proposed in this patch series intends to provide an
abstraction layer for DXE drivers to request certain memory regions to be
accessible from inside MM environment that applies total memory blockage.
The usage in VariableSmmRuntimeDxe to support runtime variable cache is
included in this patch series.
The usage in MM instance of Tcg2 to unblock NVS region is added after
separating the module into Tcg2Acpi and Tcg2 MM to support StandaloneMm.
Patch v2 branch: https://github.com/kuqin12/edk2/tree/unblock_mem_v2
Cc: Jian J Wang
Cc: Hao A Wu
Cc: Eric Dong
Cc: Ray Ni
Cc: Liming Gao
Cc: Jiewen Yao
Cc: Qi Zhang
Cc: Rahul Kumar
Kun Qin (6):
MdeModulePkg: DxeMmUnblockMemoryLib: Added definition and null
instance
MdeModulePkg: VariableSmmRuntimeDxe: Added request unblock memory
interface
SecurityPkg: Tcg2Smm: Switching from gSmst to gMmst
SecurityPkg: Tcg2Smm: Separate Tcg2Smm into 2 modules
SecurityPkg: Tcg2Smm: Added support for Standalone Mm
SecurityPkg: Tcg2Acpi: Added unblock memory interface for NVS region
MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.c | 40
+
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.c | 42
+
SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.c| 48
++
SecurityPkg/Tcg/{Tcg2Smm/Tcg2Smm.c => Tcg2Acpi/Tcg2Acpi.c} | 356
SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.c| 854
SecurityPkg/Tcg/Tcg2Smm/Tcg2StandaloneMm.c | 71
++
SecurityPkg/Tcg/Tcg2Smm/Tcg2TraditionalMm.c | 82
++
MdeModulePkg/Include/Library/DxeMmUnblockMemoryLib.h | 40
+
MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.inf | 29
+
MdeModulePkg/MdeModulePkg.dec| 5
+
MdeModulePkg/MdeModulePkg.dsc| 2
+
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf | 1
+
SecurityPkg/Include/Guid/TpmNvsMm.h | 68
++
SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.inf | 39
+
SecurityPkg/SecurityPkg.ci.yaml | 1
+
SecurityPkg/SecurityPkg.dec | 8
+
SecurityPkg/SecurityPkg.dsc | 12
+
SecurityPkg/Tcg/{Tcg2Smm/Tcg2Smm.inf => Tcg2Acpi/Tcg2Acpi.inf} | 33
+-
SecurityPkg/Tcg/{Tcg2Smm => Tcg2Acpi}/Tpm.asl| 0
SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.h| 121
+--
SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf | 27
+-
SecurityPkg/Tcg/Tcg2Smm/{Tcg2Smm.inf => Tcg2StandaloneMm.inf}| 50
+-
22 files changed, 896 insertions(+), 1033 deletions(-)
create mode 100644
MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.c
create mode 100644
SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.c
copy SecurityPkg/Tcg/{Tcg2Smm/Tcg2Smm.c => Tcg2Acpi/Tcg2Acpi.c} (72%)
create mode 100644 SecurityPkg/Tcg/Tcg2Smm/Tcg2StandaloneMm.c
create mode 100644 SecurityPkg/Tcg/Tcg2Smm/Tcg2TraditionalMm.c
create mode 100644 MdeModulePkg/Include/Library/DxeMmUnblockMemoryLib.h
create mode 100644
MdeModulePkg/Library/DxeMmUnblockMemoryLib/DxeMmUnblockMemoryLibNull.inf
create mode 100644 SecurityPkg/Include/Guid/TpmNvsMm.h
create mode 100644
SecurityPkg/Library/Tcg2MmDependencyLib/Tcg2MmDependencyLib.inf
copy SecurityPkg/Tcg/{Tcg2Smm/Tcg2Smm.inf => Tcg2Acpi/Tcg2Acpi.inf} (76%)
rename SecurityPkg/Tcg/{Tcg2Smm => Tcg2Acpi}/Tpm.asl (100%)
copy SecurityPkg/Tcg/Tcg2Smm/{Tcg2Smm.inf => Tcg2StandaloneMm.inf} (52%)
--
2.30.0.windows.1
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Re: [edk2-devel] [Patch] BaseTools: Fix the ending character for Linux script BuildEnv
Hi Bob,
Reviewed-by: Michael D Kinney
It is difficult to see the changes. I did verify that the file before the
patch had mixed line
endings and the one after the patch is LF only line endings.
Minor issues with Author name with a ','. I fixed that when I added the rb to
the commit message.
Best regards,
Mike
> -Original Message-
> From: Feng, Bob C
> Sent: Tuesday, February 9, 2021 7:03 AM
> To: Kinney, Michael D ; Leif Lindholm
>
> Cc: devel@edk2.groups.io; Liming Gao ; Chen,
> Christine ; Matthew Carlson
>
> Subject: RE: [Patch] BaseTools: Fix the ending character for Linux script
> BuildEnv
>
> Hi Mike
>
> Could you help review this patch and push it?
> Liming may take leave now.
>
> Thanks,
> Bob
>
> -Original Message-
> From: Leif Lindholm
> Sent: Tuesday, February 9, 2021 11:01 PM
> To: Feng, Bob C
> Cc: devel@edk2.groups.io; Liming Gao ; Chen,
> Christine ; Matthew Carlson
> ; Kinney, Michael D
> Subject: Re: [Patch] BaseTools: Fix the ending character for Linux script
> BuildEnv
>
> On Tue, Feb 09, 2021 at 22:58:08 +0800, Bob Feng wrote:
> > Signed-off-by: Bob Feng
> > Cc: Liming Gao
> > Cc: Yuwei Chen
> > Cc: Matthew Carlson
> > Cc: Michael D Kinney
> > Cc: Leif Lindholm
>
> SMTP strips the intersting aspect, but as long as the end result is a
> BuildEnv that has no characters:
> Reviewed-by: Leif Lindholm
>
> > ---
> > BaseTools/BuildEnv | 24
> > 1 file changed, 12 insertions(+), 12 deletions(-)
> >
> > diff --git a/BaseTools/BuildEnv b/BaseTools/BuildEnv index
> > 8d283e10c0..275f4c5901 100755
> > --- a/BaseTools/BuildEnv
> > +++ b/BaseTools/BuildEnv
> > @@ -44,11 +44,11 @@ RestorePreviousConfiguration() {
> >break
> > fi
> >done
> > fi
> >fi
> > -
> > +
> >PREVIOUS_CONF_FILE=$CONF_PATH/BuildEnv.sh
> >if [ -e $PREVIOUS_CONF_FILE ]
> >then
> > echo Loading previous configuration from $PREVIOUS_CONF_FILE
> > . $PREVIOUS_CONF_FILE
> > @@ -196,21 +196,21 @@ AddEdkToolsToPath() {
> > return 1
> >fi
> >
> >EDK_TOOLS_PATH_BIN=`GetEdkToolsPathBinDirectory`
> >
> > - # check if the edk2basetools pip package is available
> > - if $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
> > -# if it is, use the pip version of the wrappers
> > -echo "Using Pip Basetools"
> > -AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
> > - else
> > -echo "Using EDK2 in-source Basetools"
> > -AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
> > - fi
> > -
> > -
> > + # check if the edk2basetools pip package is available if
> > + $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
> > +# if it is, use the pip version of the wrappers
> > +echo "Using Pip Basetools"
> > +AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
> > + else
> > +echo "Using EDK2 in-source Basetools"
> > +AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
> > + fi
> > +
> > +
> >AddDirToStartOfPath $EDK_TOOLS_PATH_BIN
> >
> > }
> >
> > CopySingleTemplateFile() {
> > --
> > 2.29.1.windows.1
> >
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Re: [edk2-devel] [Patch V2 4/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add library instances
Please remove commented code in SiliconEnableAcpi() and associated comments. Thanks, Sai -Original Message- From: Luo, Heng Sent: Tuesday, February 09, 2021 12:46 AM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L Subject: [Patch V2 4/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add library instances REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following library instances: * TigerlakeURvp/Library/BoardAcpiLib * TigerlakeURvp/Library/BoardInitLib * TigerlakeURvp/Library/PeiPlatformHookLib Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c | 88 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf | 43 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 160 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmTigerlakeURvpAcpiEnableLib.c | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c | 160 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/BoardSaInitPreMemLib.c | 96 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/GpioTableTigerlakeUDdr4Rvp.h | 93 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/GpioTableTigerlakeUDdr4RvpPreMem.h | 33 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.c | 41 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf | 49 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.c | 88 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf | 115 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpDetect.c | 39 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpInitPostMemLib.c | 153 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpInitPreMemLib.c | 445 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/TigerlakeURvpInit.h | 23 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/PeiPlatformHookLib/PeiPlatformHooklib.c | 212 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/PeiPlatformHookLib/PeiPlatformHooklib.inf | 58 ++ 18 files changed, 1947 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c new file mode 100644 index 00..1436d9b79a
Re: [edk2-devel] [Patch V2 8/8] Update Maintainers.txt for TigerlakeOpenBoardPkg
Reviewed-by: Sai Chaganty -Original Message- From: Luo, Heng Sent: Tuesday, February 09, 2021 12:46 AM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L Subject: [Patch V2 8/8] Update Maintainers.txt for TigerlakeOpenBoardPkg REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 This change adds owners to the the Maintainers.txt for TigerlakeOpenBoardPkg Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Maintainers.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Maintainers.txt b/Maintainers.txt index 34f0b58581..b2f1b67cf9 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -195,6 +195,12 @@ M: Rangasai V Chaganty R: Deepika Kethi Reddy R: Kathappan Esakkithevar +Platform/Intel/TigerlakeOpenBoardPkg+F: Platform/Intel/TigerlakeOpenBoardPkg/+M: Sai Chaganty +M: Nate DeSimone +R: Heng Luo + Platform/Intel/SimicsOpenBoardPkg F: Platform/Intel/SimicsOpenBoardPkg/ M: Agyeman Prince -- 2.24.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71546): https://edk2.groups.io/g/devel/message/71546 Mute This Topic: https://groups.io/mt/80500131/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [Patch V2 7/8] Enable build for TigerlakeOpenBoardPkg
Reviewed-by: Sai Chaganty -Original Message- From: Luo, Heng Sent: Tuesday, February 09, 2021 12:46 AM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L Subject: [Patch V2 7/8] Enable build for TigerlakeOpenBoardPkg REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 This change adds the configuration to enable build for TigerlakeURvp. Also it updates Tigerlake U Rvp details to the Readme.md. Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/Readme.md | 11 +++ Platform/Intel/build.cfg | 1 + 2 files changed, 12 insertions(+) diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index f7bfc7aad2..b3b15405af 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -57,6 +57,7 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol * The `SimicsOpenBoardPkg` contains board implementations for the Simics hardware simulator. * The `WhiskeylakeOpenBoardPkg` contains board implementations for WhiskeyLake systems. * The `CometlakeOpenBoardPkg` contains board implementations for CometLake systems.+* The `TigerlakeOpenBoardPkg` contains board implementations for TigerLake systems. ### **Supported Hardware** @@ -75,6 +76,7 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol | RVP 3 | SkyLake, KabyLake, KabyLake Refresh | KabylakeOpenBoardPkg | KabylakeRvp3 | | WHL-U DDR4 RVP | WhiskeyLake| WhiskeylakeOpenBoardPkg | WhiskeylakeURvp| | CML-U LPDDR3 RVP | CometLake V1 | CometlakeOpenBoardPkg| CometlakeURvp |+| TGL-U LPDDR4 RVP | TigerLake | TigerlakeOpenBoardPkg| TigerlakeURvp | *Note: RVP = Reference and Validation Platform* @@ -253,6 +255,11 @@ return back to the minimum platform caller. | || |---build_config.cfg: CometlakeURvp specific build | || settings environment variables. | ||+ | ||--TigerlakeOpenBoardPkg+ | || |--TigerlakeURvp+ | || |---build_config.cfg: TigerlakeURvp specific build+ | || settings environment variables.+ | || |--FSP@@ -283,6 +290,10 @@ return back to the minimum platform caller. 1. This firmware project has been tested booting to Microsoft Windows 10 x64 with AHCI mode and External Graphic Device. 2. This firmware project has been also tested booting to Ubuntu 17.10 with AHCI mode and Integrated Graphic Device. +**TigerlakeOpenBoardPkg**+1. This firmware project has been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic Device.+2. This firmware project has been also tested booting to Puppy Linux BionicPup64 8.0 with AHCI mode and Integrated Graphic Device.+ ### **Package Builds** In some cases, such as BoardModulePkg, a package may provide a set of functionality that is included in otherdiff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg index 8aa6b22956..97c5c9a290 100644 --- a/Platform/Intel/build.cfg +++ b/Platform/Intel/build.cfg @@ -60,3 +60,4 @@ KabylakeRvp3 = KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg UpXtreme = WhiskeylakeOpenBoardPkg/UpXtreme/build_config.cfg WhiskeylakeURvp = WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg CometlakeURvp = CometlakeOpenBoardPkg/CometlakeURvp/build_config.cfg+TigerlakeURvp = TigerlakeOpenBoardPkg/TigerlakeURvp/build_config.cfg-- 2.24.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71545): https://edk2.groups.io/g/devel/message/71545 Mute This Topic: https://groups.io/mt/80500130/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [Patch V2 6/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add DSC and build files
Reviewed-by: Sai Chaganty -Original Message- From: Luo, Heng Sent: Tuesday, February 09, 2021 12:46 AM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L Subject: [Patch V2 6/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add DSC and build files REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the DSC and build files necessary to build the TigerlakeURvp board instance. Key files: * build_config.cfg - Board-specific build configuration file. * OpenBoardPkg.dsc - The TigerlakeURvp board description file. * OpenBoardPkgPcd.dsc - Used for other PCD customization. * OpenBoardPkg.fdf - The TigerlakeURvp board flash file. * OpenBoardPkgBuildOption.dsc - Sets build options Based on PCD values. Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 347 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 702 ++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgBuildOption.dsc | 141 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc | 392 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/build_config.cfg | 34 ++ 5 files changed, 1616 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc new file mode 100644 index 00..a4265a839c --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc @@ -0,0 +1,347 @@ +## @file +# The main build description file for the TigerlakeURvp board. +# +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + DEFINE PLATFORM_PACKAGE = MinPlatformPkg + DEFINE PLATFORM_SI_PACKAGE = TigerlakeSiliconPkg + DEFINE PLATFORM_SI_BIN_PACKAGE = TigerlakeSiliconBinPkg + DEFINE PLATFORM_FSP_BIN_PACKAGE = TigerLakeFspBinPkg/Client + DEFINE PLATFORM_BOARD_PACKAGE= TigerlakeOpenBoardPkg + DEFINE BOARD = TigerlakeURvp + DEFINE PROJECT = $(PLATFORM_BOARD_PACKAGE)/$(BOARD) + DEFINE PEI_ARCH = IA32 + DEFINE DXE_ARCH = X64 + DEFINE TOP_MEMORY_ADDRESS= 0x0 + + # + # Default value for OpenBoardPkg.fdf use + # + DEFINE BIOS_SIZE_OPTION = SIZE_120 + +[Defines] + PLATFORM_NAME = $(PLATFORM_BOARD_PACKAGE) + PLATFORM_GUID = 465B0A0B-7AC1-443b-8F67-7B8DEC145F90 + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY = Build/$(PROJECT) + SUPPORTED_ARCHITECTURES = IA32|X64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = ALL + + FLASH_DEFINITION = $(PROJECT)/OpenBoardPkg.fdf + FIX_LOAD_TOP_MEMORY_ADDRESS = 0x0 + + # + # Include PCD configuration for this board. + # + !include OpenBoardPkgPcd.dsc + + +# +# SKU Identification section - list of all SKU
Re: [edk2-devel] [Patch V2 5/8] TigerlakeOpenBoardPkg: Add modules
Reviewed-by: Sai Chaganty
-Original Message-
From: Luo, Heng
Sent: Tuesday, February 09, 2021 12:46 AM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L
Subject: [Patch V2 5/8] TigerlakeOpenBoardPkg: Add modules
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175
Adds the following modules:
* BiosInfo
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c | 200
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 83
+++
2 files changed, 283 insertions(+)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..46c3d439c2
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,200 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define BASE_FV_SIZE 10
+
+#define FSP_WRAPPER_FV_SIZE 3
+
+#define TSN_MAC_ADDRESS_FV_SIZE 0
+
+#define BIOS_INFO_STRUCT_SIZE (BASE_FV_SIZE + FSP_WRAPPER_FV_SIZE +
TSN_MAC_ADDRESS_FV_SIZE)
+
+
+/*
+ BIOS_INFO structure is the base of the firmware volume layout for Intel
platform BIOS implementation
+ so security checker module can run based on the structure and throw
warnings, error or deadloop
+ when any unexpected firmware volumes are detected.
+
+ BIOS_INFO is recommended to support full entries of firmware volumes present
in a flash
+ with right type, attribute, version, flash map base address and size,
+ all associated information which is defined by BIOS_INFO_STRUCT structure.
+ - IBB firmware volumes, which are expected to be measured or/and verified
+by hardware base security solution to meet SecureBoot chain of trust
+(Intel BootGuard for example), have attribute 0x0.
+ - Post IBB firmware volumes, which are expected to be measured or/and
verified
+by BIOS (TCG code for measurement, RSA2048SHA256Sign algorithm for
verification for example),
+have attribute BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB.
+ - Else, follows Firmware Interface Table specification.
+*/
+#pragma pack (1)
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[BIOS_INFO_STRUCT_SIZE];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+BIOS_INFO_STRUCT_SIZE,
+0,
+ },
+ {
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashNvStorageVariableSize) + FixedPcdGet32
(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32
(PcdFlashNvStorageFtwSpareSize),
+ FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvAdvancedSize),
+ FixedPcdGet32 (PcdFlashFvAdvancedBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvOptionalSize),
+ FixedPcdGet32 (PcdFlashFvOptionalBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvOsBootSize),
+ FixedPcdGet32 (PcdFlashFvOsBootBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvUefiBootSize),
+ FixedPcdGet32 (PcdFlashFvUefiBootBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvPostMemorySize),
+ FixedPcdGet32 (PcdFlashFvPostMemoryBase)
+},
+{
+ /*
+Note :
+Startup ACM is one of the binaries in FvFirmwareBinaries,
+so put type 07 but not type 02.
+FIT table will contain a type 02 entry with actual address
+of ACM binary (it is passed as an input to FitGen tool).
+ */
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvFirmwareBinariesSize),
+ FixedPcdGet32 (PcdFlashFvFirmwareBinariesBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODU
Re: [edk2-devel] [Patch V2 5/8] TigerlakeOpenBoardPkg: Add modules
Reviewed-by: Sai Chaganty
-Original Message-
From: Luo, Heng
Sent: Tuesday, February 09, 2021 12:46 AM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L
Subject: [Patch V2 5/8] TigerlakeOpenBoardPkg: Add modules
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175
Adds the following modules:
* BiosInfo
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c | 200
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 83
+++
2 files changed, 283 insertions(+)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..46c3d439c2
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,200 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define BASE_FV_SIZE 10
+
+#define FSP_WRAPPER_FV_SIZE 3
+
+#define TSN_MAC_ADDRESS_FV_SIZE 0
+
+#define BIOS_INFO_STRUCT_SIZE (BASE_FV_SIZE + FSP_WRAPPER_FV_SIZE +
TSN_MAC_ADDRESS_FV_SIZE)
+
+
+/*
+ BIOS_INFO structure is the base of the firmware volume layout for Intel
platform BIOS implementation
+ so security checker module can run based on the structure and throw
warnings, error or deadloop
+ when any unexpected firmware volumes are detected.
+
+ BIOS_INFO is recommended to support full entries of firmware volumes present
in a flash
+ with right type, attribute, version, flash map base address and size,
+ all associated information which is defined by BIOS_INFO_STRUCT structure.
+ - IBB firmware volumes, which are expected to be measured or/and verified
+by hardware base security solution to meet SecureBoot chain of trust
+(Intel BootGuard for example), have attribute 0x0.
+ - Post IBB firmware volumes, which are expected to be measured or/and
verified
+by BIOS (TCG code for measurement, RSA2048SHA256Sign algorithm for
verification for example),
+have attribute BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB.
+ - Else, follows Firmware Interface Table specification.
+*/
+#pragma pack (1)
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[BIOS_INFO_STRUCT_SIZE];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+BIOS_INFO_STRUCT_SIZE,
+0,
+ },
+ {
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashNvStorageVariableSize) + FixedPcdGet32
(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32
(PcdFlashNvStorageFtwSpareSize),
+ FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvAdvancedSize),
+ FixedPcdGet32 (PcdFlashFvAdvancedBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvOptionalSize),
+ FixedPcdGet32 (PcdFlashFvOptionalBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvOsBootSize),
+ FixedPcdGet32 (PcdFlashFvOsBootBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvUefiBootSize),
+ FixedPcdGet32 (PcdFlashFvUefiBootBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvPostMemorySize),
+ FixedPcdGet32 (PcdFlashFvPostMemoryBase)
+},
+{
+ /*
+Note :
+Startup ACM is one of the binaries in FvFirmwareBinaries,
+so put type 07 but not type 02.
+FIT table will contain a type 02 entry with actual address
+of ACM binary (it is passed as an input to FitGen tool).
+ */
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvFirmwareBinariesSize),
+ FixedPcdGet32 (PcdFlashFvFirmwareBinariesBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE
Re: [edk2-devel] [Patch V2 3/8] TigerlakeOpenBoardPkg: Add library instances
Reviewed-by: Sai Chaganty -Original Message- From: Luo, Heng Sent: Tuesday, February 09, 2021 12:46 AM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L Subject: [Patch V2 3/8] TigerlakeOpenBoardPkg: Add library instances REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following library instances: * FspWrapper/Library/PeiFspPolicyInitLib * FspWrapper/Library/PeiSiDefaultPolicyInitLib * FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib * Library/BasePlatformHookLib * Library/SmmSpiFlashCommonLib * Policy/Library/DxeSiliconPolicyUpdateLib Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspCpuPolicyInitLib.c | 79 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspMePolicyInitLib.c | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspMiscUpdInitLib.c | 27 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPchPolicyInitLib.c | 372 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.c | 308 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.h | 187 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.inf | 183 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c | 240 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspSecurityPolicyInitLib.c | 49 + Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiDefaultPolicyInitLib/PeiSiDefaultPolicyInitLib.c | 39 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiDefaultPolicyInitLib/PeiSiDefaultPolicyInitLib.inf | 38 ++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib/PeiSiPreMemDefaultPolicyInitLib.c | 40 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib/PeiSiPreMemDefaultPolicyInitLib.inf | 38 ++ Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c | 391 +++ Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 49 + Platform/Intel/Tige
Re: [edk2-devel] [Patch V2 2/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add fdf and header file
Reviewed-by: Sai Chaganty -Original Message- From: Luo, Heng Sent: Tuesday, February 09, 2021 12:46 AM To: devel@edk2.groups.io Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L Subject: [Patch V2 2/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add fdf and header file REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following files: * TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf * TigerlakeURvp/Include/PeiPlatformHookLib.h Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf | 54 ++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/PeiPlatformHookLib.h | 130 ++ 2 files changed, 184 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf new file mode 100644 index 00..b21ae6401f --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf @@ -0,0 +1,54 @@ +## @file +# FDF file of Platform. +# +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +#=# +# 12 M BIOS - for FSP wrapper +#=# +DEFINE FLASH_BASE = 0xFF40 # +DEFINE FLASH_SIZE = 0x00C0 # +DEFINE FLASH_BLOCK_SIZE = 0x0001 # +DEFINE FLASH_NUM_BLOCKS = 0x00C0 # +#=# + +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = 0x # Flash addr (0xFF40) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = 0x0006 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = 0x # Flash addr (0xFF40) +SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize = 0x0002E000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 0x0002E000 # Flash addr (0xFF42E000) +SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize= 0x2000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x0003 # Flash addr (0xFF43) +SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x0003 # + +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset= 0x000E # Flash addr (0xFF4E) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x001A # +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x0028 # Flash addr (0xFF68) +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x0030 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x0058 # Flash addr (0xFF98) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize= 0x000A # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset= 0x0062 # Flash addr (0xFFA2) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x001D # + +## Firmware binaries FV absolute address requires 256kB alignment +## Build script checks the requirement. +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x0080 # Flash addr (0xFFC0) +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x0008 # Keep 0x8 or larger +SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset= 0x0088 # Flash addr (0xFFC8) +SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x0007 # Keep 0x7 or larger, change MicrocodeFv.fdf in case that this value change +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x008F # Flash addr (0xFFC0) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize= 0x0008 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset= 0x0097 # Flash addr (0xFFD7) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset= 0x00A1 # Flash addr (0xFFE1) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x0011 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset
Re: [edk2-devel] [Patch V2 1/8] TigerlakeOpenBoardPkg: Add package and headers
Reviewed-by: Sai Chaganty
-Original Message-
From: Luo, Heng
Sent: Tuesday, February 09, 2021 12:46 AM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L
Subject: [Patch V2 1/8] TigerlakeOpenBoardPkg: Add package and headers
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175
Create the TigerlakeOpenBoardPkg to provide board support code. The package may
support Tigerlake boards. The package serves as a board support package in the
EDK II Minimum Platform design. Silicon support for this package is provided in
TigerLakeFspBinPkg in the FSP repository and TigerlakeSiliconPkg in the
edk2-platforms repository.
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h | 61
+
Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h | 17
+
Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h | 49
+
Platform/Intel/TigerlakeOpenBoardPkg/OpenBoardPkg.dec | 153
+
4 files changed, 280 insertions(+)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h
b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h
new file mode 100644
index 00..148abcce74
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h
@@ -0,0 +1,61 @@
+/** @file+ Header file for Platform Boards Configurations.+++ Copyright (c)
2021, Intel Corporation. All rights reserved.+ SPDX-License-Identifier:
BSD-2-Clause-Patent+**/++#ifndef _PLATFORM_BOARD_CONFIG_H+#define
_PLATFORM_BOARD_CONFIG_H++#include +#include
+++#pragma pack(1)++typedef struct {+ UINT8 ClkReqNumber :
4;+ UINT8 ClkReqSupported : 1;+ UINT8 DeviceResetPadActiveHigh : 1;+ UINT32
DeviceResetPad;+} ROOT_PORT_CLK_INFO;++typedef struct {+ UINT8 Section;+
UINT8 Pin;+} EXPANDER_GPIO_CONFIG;++typedef struct {+ UINT8 Type;+ UINT8
Reserved[3]; // alignment for COMMON_GPIO_CONFIG+ union {+UINT32 Pin;+
EXPANDER_GPIO_CONFIG Expander;+ } u;+} BOARD_GPIO_CONFIG;++// Do not change
the encoding. It must correspond with PCH_PCIE_CLOCK_USAGE from PCH RC.+#define
NOT_USED 0xFF+#define FREE_RUNNING 0x80+#define LAN_CLOCK0x70+#define
PCIE_PEG 0x40+#define PCIE_PCH 0x00++typedef struct {+ UINT32
ClockUsage;+ UINT32 ClkReqSupported;+} PCIE_CLOCK_CONFIG;++typedef union {+
UINT64 Blob;+ BOARD_GPIO_CONFIG BoardGpioConfig;+ ROOT_PORT_CLK_INFO Info;+
PCIE_CLOCK_CONFIG PcieClock;+} PCD64_BLOB;++#pragma pack()++#endif //
_PLATFORM_BOARD_CONFIG_H+diff --git
a/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h
b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h
new file mode 100644
index 00..2e1ee9eca4
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h
@@ -0,0 +1,17 @@
+/** @file+ Defines Platform BoardIds++ Copyright (c) 2021, Intel
Corporation. All rights reserved.+ SPDX-License-Identifier:
BSD-2-Clause-Patent+**/++#ifndef _PLATFORM_BOARD_ID_H_+#define
_PLATFORM_BOARD_ID_H_++// TigerLake Sku IDs+#define SkuIdTglU
0x1++// TigerLake Board Id 0x01+#define BoardIdTglUDdr4
0x01++#endif // _PLATFORM_BOARD_ID_H_diff --git
a/Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
new file mode 100644
index 00..0848efe5b6
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
@@ -0,0 +1,49 @@
++/** @file+ Macros for platform to update different types of policy.++
++Copyright (c) 2021, Intel Corporation. All rights reserved.+
++SPDX-License-Identifier: BSD-2-Clause-Patent+**/++#ifndef
++_POLICY_UPDATE_MACRO_H_+#define _POLICY_UPDATE_MACRO_H_++#ifdef
++UPDATE_POLICY+#undef UPDATE_POLICY+#endif++#ifdef COPY_POLICY+#undef
++COPY_POLICY+#endif++#ifdef GET_POLICY+#undef GET_POLICY+#endif++#ifdef
++AND_POLICY+#undef AND_POLICY+#endif++#ifdef OR_POLICY+#undef
++OR_POLICY+#endif++#if FixedPcdGetBool(PcdFspModeSelection) == 1+//+//
++MACROS for platform code use+//+#define UPDATE_POLICY(UpdField,
++ConfigField, Value) UpdField = Value;+#define COPY_POLICY(UpdField,
++ConfigField, Value, Size) CopyMem (UpdField, Value, Size);+#define
++GET_POLICY(UpdField, ConfigField, Value) Value = UpdField;+#define
++AND_POLICY(UpdField, ConfigField, Value) UpdField &= Value;+#define
++OR_POLICY(UpdField, ConfigField, Value) UpdField |=
++Value;+#else+#define UPDATE_POLICY(UpdField, ConfigField, Value)
++ConfigField = Value;+#define COPY_POLICY(UpdField, ConfigField, Value,
++Size) CopyMem (ConfigField, Value, Size);+#define
Re: [edk2-devel] [PATCH v1 1/1] StandaloneMmPkg/FvLib.h: Add EFIAPI to FfsFindSection()
Hi Michael, Thank you for this patch. There must be something missing with the GCC5 settings for AARCH64 as this problem does not get flagged. However, this change looks good to me. Reviewed-by: Sami Mujawar Regards, Sami Mujawar -Original Message- From: devel@edk2.groups.io On Behalf Of mikuback via groups.io Sent: 03 February 2021 03:52 AM To: devel@edk2.groups.io Cc: Ard Biesheuvel ; Sami Mujawar ; Jiewen Yao ; Supreeth Venkatesh Subject: [edk2-devel] [PATCH v1 1/1] StandaloneMmPkg/FvLib.h: Add EFIAPI to FfsFindSection() From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3203 The EFIAPI modifier is present in the function definition in FvLib.c but missing in FvLib.h. Causes a GCC build error. Cc: Ard Biesheuvel Cc: Sami Mujawar Cc: Jiewen Yao Cc: Supreeth Venkatesh Signed-off-by: Michael Kubacki --- StandaloneMmPkg/Include/Library/FvLib.h | 1 + 1 file changed, 1 insertion(+) diff --git a/StandaloneMmPkg/Include/Library/FvLib.h b/StandaloneMmPkg/Include/Library/FvLib.h index c08e043cf65f..4ef2c8540a1f 100644 --- a/StandaloneMmPkg/Include/Library/FvLib.h +++ b/StandaloneMmPkg/Include/Library/FvLib.h @@ -50,6 +50,7 @@ FfsFindNextFile ( @retval EFI_SUCCESS **/ EFI_STATUS +EFIAPI FfsFindSection ( IN EFI_SECTION_TYPE SectionType, IN EFI_FFS_FILE_HEADER *FfsFileHeader, -- 2.28.0.windows.1 -=-=-=-=-=-= Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71088): https://edk2.groups.io/g/devel/message/71088 Mute This Topic: https://groups.io/mt/80346397/1779659 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [sami.muja...@arm.com] -=-=-=-=-=-= -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71538): https://edk2.groups.io/g/devel/message/71538 Mute This Topic: https://groups.io/mt/80346397/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-test] build EMS tests
I would like to perform passive mode tests but I've been unsuccessfully trying to build the EMS tool(ver 2.6 and 2.7) following https://github.com/tianocore/edk2-test/blob/master/uefi-sct/HowToBuild/HowToBuildEms.txt. Since I'm snowballing into poorly updated libs and old compiler versions Is there any successful recipe for it or some light on what to attempt? Thanks in advance. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71537): https://edk2.groups.io/g/devel/message/71537 Mute This Topic: https://groups.io/mt/80518207/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v1 1/1] StandaloneMmPkg/StandaloneMmCore: Fix compiler warning
Hi Michael, Please see my response inline marked [SAMI]. Other than the minor space change needed to match the coding style, this patch looks good to me. With that changed: Reviewed-by: Sami Mujawar Regards, Sami Mujawar -Original Message- From: mikub...@linux.microsoft.com Sent: 03 February 2021 03:51 AM To: devel@edk2.groups.io Cc: Ard Biesheuvel ; Sami Mujawar ; Jiewen Yao ; Supreeth Venkatesh Subject: [PATCH v1 1/1] StandaloneMmPkg/StandaloneMmCore: Fix compiler warning From: Michael Kubacki REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3204 Fixes the following compiler warning in VS2019 by changing defining the MmramRangeCount variable to be UINTN and type casting prior to value assignment. \edk2\StandaloneMmPkg\Core\StandaloneMmCore.c(570): error C2220: the following warning is treated as an error \edk2\StandaloneMmPkg\Core\StandaloneMmCore.c(570): warning C4244: '=': conversion from 'UINT64' to 'UINT32', possible loss of data Cc: Ard Biesheuvel Cc: Sami Mujawar Cc: Jiewen Yao Cc: Supreeth Venkatesh Signed-off-by: Michael Kubacki --- StandaloneMmPkg/Core/StandaloneMmCore.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/StandaloneMmPkg/Core/StandaloneMmCore.c b/StandaloneMmPkg/Core/StandaloneMmCore.c index 8388ec289ca8..d254a68f2fb8 100644 --- a/StandaloneMmPkg/Core/StandaloneMmCore.c +++ b/StandaloneMmPkg/Core/StandaloneMmCore.c @@ -511,7 +511,7 @@ StandaloneMmMain ( EFI_HOB_GUID_TYPE *MmramRangesHob; EFI_MMRAM_HOB_DESCRIPTOR_BLOCK *MmramRangesHobData; EFI_MMRAM_DESCRIPTOR*MmramRanges; - UINT32 MmramRangeCount; + UINTN MmramRangeCount; EFI_HOB_FIRMWARE_VOLUME *BfvHob; ProcessLibraryConstructorList (HobStart, &gMmCoreMmst); @@ -546,7 +546,7 @@ StandaloneMmMain ( MmramRangesHobData = GET_GUID_HOB_DATA (MmramRangesHob); ASSERT (MmramRangesHobData != NULL); MmramRanges = MmramRangesHobData->Descriptor; -MmramRangeCount = MmramRangesHobData->NumberOfMmReservedRegions; +MmramRangeCount = (UINTN) MmramRangesHobData->NumberOfMmReservedRegions; [SAMI] There should be no space between the typecast and the variable, i.e. space after typecast (UINTN) and MmramRangesHobData. Same at other places in this file. [/SAMI] ASSERT (MmramRanges); ASSERT (MmramRangeCount); @@ -554,7 +554,7 @@ StandaloneMmMain ( // Copy the MMRAM ranges into MM_CORE_PRIVATE_DATA table just in case any // code relies on them being present there // -gMmCorePrivate->MmramRangeCount = MmramRangeCount; +gMmCorePrivate->MmramRangeCount = (UINT64) MmramRangeCount; gMmCorePrivate->MmramRanges = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (MmramRangeCount * sizeof (EFI_MMRAM_DESCRIPTOR)); ASSERT (gMmCorePrivate->MmramRanges != 0); @@ -567,7 +567,7 @@ StandaloneMmMain ( DataInHob = GET_GUID_HOB_DATA (GuidHob); gMmCorePrivate = (MM_CORE_PRIVATE_DATA *)(UINTN)DataInHob->Address; MmramRanges = (EFI_MMRAM_DESCRIPTOR *)(UINTN)gMmCorePrivate->MmramRanges; -MmramRangeCount = gMmCorePrivate->MmramRangeCount; +MmramRangeCount = (UINTN) gMmCorePrivate->MmramRangeCount; } // -- 2.28.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71536): https://edk2.groups.io/g/devel/message/71536 Mute This Topic: https://groups.io/mt/80346365/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms] [PATCH v1] IntelSiliconPkg: Add DWORD_ALIGN macro
After I sent this patch, Mike K helpfully pointed out that we already have ALIGN_VALUE() In Base.h. Therefore, please consider this patch abandoned. > -Original Message- > From: devel@edk2.groups.io On Behalf Of Nate > DeSimone > Sent: Tuesday, February 9, 2021 11:27 AM > To: devel@edk2.groups.io > Cc: Ni, Ray ; Chaganty, Rangasai V > > Subject: [edk2-devel] [edk2-platforms] [PATCH v1] IntelSiliconPkg: Add > DWORD_ALIGN macro > > Adds a macro that rounds a given integer up to the nearest DWORD. > The config block data structure needs to be DWORD aligned. Since config > blocks are run-length encoded, the size of all config blocks therefore needs > to be in DWORD increments. This macro aids in storing arbitary data in a > config block. > > Cc: Ray Ni > Cc: Rangasai V Chaganty > Signed-off-by: Nate DeSimone > --- > Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h > b/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h > index 37a3968168..0233137e99 100644 > --- a/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h > +++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h > @@ -9,6 +9,8 @@ > #ifndef _CONFIG_BLOCK_LIB_H_ > #define _CONFIG_BLOCK_LIB_H_ > > +#define DWORD_ALIGN(x) (((x) & 3) ? 0 : 1) ? x : (((x) + 4) & ((UINTN) > ~0x3)) > + > /** >Create config block table. > > -- > 2.27.0.windows.1 > > > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71535): https://edk2.groups.io/g/devel/message/71535 Mute This Topic: https://groups.io/mt/80513741/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH v1] IntelSiliconPkg: Add DWORD_ALIGN macro
Adds a macro that rounds a given integer up to the nearest DWORD. The config block data structure needs to be DWORD aligned. Since config blocks are run-length encoded, the size of all config blocks therefore needs to be in DWORD increments. This macro aids in storing arbitary data in a config block. Cc: Ray Ni Cc: Rangasai V Chaganty Signed-off-by: Nate DeSimone --- Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h b/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h index 37a3968168..0233137e99 100644 --- a/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h +++ b/Silicon/Intel/IntelSiliconPkg/Include/Library/ConfigBlockLib.h @@ -9,6 +9,8 @@ #ifndef _CONFIG_BLOCK_LIB_H_ #define _CONFIG_BLOCK_LIB_H_ +#define DWORD_ALIGN(x) (((x) & 3) ? 0 : 1) ? x : (((x) + 4) & ((UINTN) ~0x3)) + /** Create config block table. -- 2.27.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71534): https://edk2.groups.io/g/devel/message/71534 Mute This Topic: https://groups.io/mt/80513741/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] Does EDK2 ArmVirtPkg has support for a virtio-mmio-blk device
On 02/09/21 16:28, Ard Biesheuvel wrote:
> On Tue, 9 Feb 2021 at 14:41, Laszlo Ersek wrote:
>>
>> On 02/09/21 03:54, Ying Fang wrote:
>>
>>> I now realize that we emulate the virtio-blk-device over mmio, and we
>>> only emulate virtio-1.0 spec.
>>> As mentioned in (1c) , EDK2 only supports virtio-0.95 spec for now, so
>>> this maybe a big problem.
>>> Since it may not handshake ok if we only emulate virtio-1.0.
>>
>> Yes.
>>
>> First, the MMIO transport (as I remember from checking it last time,
>> which was quite some time ago) is very different between 0.9.5 and 1.0.
>>
>> Second, device initialization steps differ:
>> - between 0.9.5 MMIO and 0.9.5 PCI,
>> - between 0.9.5 and 1.0, regardless of transport.
>>
>> This means that the device driver code has *some* specifics (=
>> abstraction leaks) that relate to the underlying transport (MMIO vs.
>> PCI, and 0.9.5 vs. 1.0). See:
>>
>> OvmfPkg/VirtioBlkDxe/VirtioBlk.c
>>
>> 752 //
>> 753 // Set Page Size - MMIO VirtIo Specific
>> 754 //
>> 755 Status = Dev->VirtIo->SetPageSize (Dev->VirtIo, EFI_PAGE_SIZE);
>>
>> 822 //
>> 823 // In virtio-1.0, feature negotiation is expected to complete
>> before queue
>> 824 // discovery, and the device can also reject the selected set of
>> features.
>> 825 //
>> 826 if (Dev->VirtIo->Revision >= VIRTIO_SPEC_REVISION (1, 0, 0)) {
>> 827 Status = Virtio10WriteFeatures (Dev->VirtIo, Features,
>> &NextDevStat);
>>
>> 867 //
>> 868 // Additional steps for MMIO: align the queue appropriately, and
>> set the
>> 869 // size. If anything fails from here on, we must unmap the ring
>> resources.
>> 870 //
>> 871 Status = Dev->VirtIo->SetQueueNum (Dev->VirtIo, QueueSize);
>>
>> 894 //
>> 895 // step 5 -- Report understood features.
>> 896 //
>> 897 if (Dev->VirtIo->Revision < VIRTIO_SPEC_REVISION (1, 0, 0)) {
>> 898 Features &= ~(UINT64)(VIRTIO_F_VERSION_1 |
>> VIRTIO_F_IOMMU_PLATFORM);
>> 899 Status = Dev->VirtIo->SetGuestFeatures (Dev->VirtIo, Features);
>>
>> We tried to make these "abstraction leaks" as small as possible; for
>> example the MMIO specific operations (SetPageSize, SetQueueNum) are
>> performed unconditionally, and it's only the PCI transport backends that
>> simply ignore those actions (after performing some sanity checks).
>> However, the different order of initialization steps couldn't really be
>> hidden (I wasn't comfortable with simply regression-testing the new 1.0
>> order against 0.9.5 transports of QEMU, so we kept both init orders).
>>
>> Virtio MMIO was always classified as "temporary" and "legacy", needed
>> only until PCI support would be brought about on ARM. So given the
>> increased complexity of Virtio MMIO in the 1.0 spec, I always believed
>> that designing and implementing the latter in OVMF would be a waste of
>> effort.
>>
>>
>>> I will try to emulate the virtio-0.95 later to see if it is the root
>>> cause.
>>
>> Yes, please either do that, or please add a PCI host.
>>
>> Given that you do get a BLK0: alias in the UEFI shell, the
>> initialization of the device might even *appear* to complete, to OVMF;
>> however, the actual virtio transfers likely fail.
>>
>
> That BLK0: alias in the UEFI shell is the NOR flash not a virtio block device.
>
Sigh, thanks.
In the original message, only "VenHw(xxx, 00)" was included, and I
couldn't tell at once whether the vendor GUID was indeed
gVirtioMmioTransportGuid (837DCA9E-E874-4D82-B29A-23FE0E23D1E2). So I
assumed. :/
Ying Fang: in the future, please only paste actual logs. If you edit the
log, you may render it useless. In this instance, you managed to edit
out a relatively important log detail.
Thanks, Ard!
Laszlo
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[edk2-devel] [edk2-test PATCHv2 5/5] SctPkg: Remove trailing whitespace
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3042 Cc: G Edhaya Chandran Cc: Barton Gao Cc: Samer El-Haj-Mahmoud Cc: Eric Jin Cc: Arvin Chen Cc: Leif Lindholm Cc: Heinrich Schuchardt Cc: Abner Chang Signed-off-by: Daniel Schaefer --- uefi-sct/SctPkg/Library/SctLib/Aarch64/SctLibPlat.h | 4 +-- uefi-sct/SctPkg/Library/SctLib/Aarch64/initplat.c | 6 ++--- uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h | 7 +++-- uefi-sct/SctPkg/Library/SctLib/Riscv64/initplat.c | 6 ++--- uefi-sct/SctPkg/SCRT/SCRTApp/Aarch64/GoVirtual.S | 15 ++- uefi-sct/SctPkg/SCRT/SCRTApp/Aarch64/VirtualMemory.c | 22 +++ uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S | 6 ++--- uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/VirtualMemory.c | 6 ++--- uefi-sct/SctPkg/SCRT/SCRTDriver/Aarch64/Debug.c | 28 +++- uefi-sct/SctPkg/SCRT/SCRTDriver/Aarch64/Dump.c | 8 +++--- uefi-sct/SctPkg/SCRT/SCRTDriver/Aarch64/Io.c | 15 ++- uefi-sct/SctPkg/SCRT/SCRTDriver/Aarch64/Io.h | 8 +++--- uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Debug.c | 6 ++--- uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Dump.c | 8 +++--- uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Io.c | 8 +++--- uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Aarch64/DebugSupportBBTestCacheFunction.c | 6 ++--- uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Aarch64/DebugSupportBBTestExceptionCallbackFunction.c | 18 ++--- uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Aarch64/PlatformIsa.c | 10 +++ uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Riscv64/DebugSupportBBTestCacheFunction.c | 6 ++--- uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Riscv64/DebugSupportBBTestExceptionCallbackFunction.c | 6 ++--- uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Riscv64/PlatformIsa.c | 6 ++--- uefi-sct/SctPkg/TestInfrastructure/SCT/Framework/ENTS/EasLib/Aarch64/EntsLibPlat.h | 8 +++--- uefi-sct/SctPkg/TestInfrastructure/SCT/Framework/ENTS/EasLib/Aarch64/InitPlat.c | 6 ++--- uefi-sct/SctPkg/TestInfrastructure/SCT/Framework/ENTS/EasLib/Riscv64/EntsLibPlat.h | 6 ++--- uefi-sct/SctPkg/TestInfrastructure/SCT/Framework/ENTS/EasLib/Riscv64/InitPlat.c | 6 ++--- 25 files changed, 109 insertions(+), 122 deletions(-) diff --git a/uefi-sct/SctPkg/Library/SctLib/Aarch64/SctLibPlat.h b/uefi-sct/SctPkg/Library/SctLib/Aarch64/SctLibPlat.h index ee7c656b..b7832e18 100644 --- a/uefi-sct/SctPkg/Library/SctLib/Aarch64/SctLibPlat.h +++ b/uefi-sct/SctPkg/Library/SctLib/Aarch64/SctLibPlat.h @@ -5,12 +5,12 @@ This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at + which accompanies this distribution. The full text of the license may be found at http://opensource.org/licenses/bsd-license.php THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - + **/ /*++ diff --git a/uefi-sct/SctPkg/Library/SctLib/Aarch64/initplat.c b/uefi-sct/SctPkg/Library/SctLib/Aarch64/initplat.c index a48bb2f3..1c247c91 100644 --- a/uefi-sct/SctPkg/Library/SctLib/Aarch64/initplat.c +++ b/uefi-sct/SctPkg/Library/SctLib/Aarch64/initplat.c @@ -5,12 +5,12 @@ This program and the accompanying materials are licensed and made available under the terms and conditions of t
[edk2-devel] [edk2-test PATCHv2 3/5] SctPkg: Add RISCV64 build support
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3042 Cc: G Edhaya Chandran Cc: Barton Gao Cc: Samer El-Haj-Mahmoud Cc: Eric Jin Cc: Arvin Chen Cc: Leif Lindholm Cc: Heinrich Schuchardt Cc: Abner Chang Signed-off-by: Daniel Schaefer --- uefi-sct/SctPkg/Application/InstallSct/InstallSctDef.h | 4 ++ uefi-sct/SctPkg/Library/SctLib/SctLib.inf | 6 ++ uefi-sct/SctPkg/SCRT/SCRTApp/SCRTApp.inf | 5 ++ uefi-sct/SctPkg/SCRT/SCRTDriver/SCRTDriver.inf | 6 ++ uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/DebugSupportBBTest.inf | 6 ++ uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/Usb2Hc/BlackBoxTest/Usb2HcTest.inf | 4 ++ uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/UsbHc/BlackBoxTest/UsbHcTest.inf | 4 ++ uefi-sct/SctPkg/TestInfrastructure/SCT/Framework/ENTS/EasLib/EntsLib.inf | 5 ++ uefi-sct/SctPkg/Tools/Source/GenBin/GNUmakefile | 4 ++ uefi-sct/SctPkg/UEFI/IHV_SCT.dsc | 17 +- uefi-sct/SctPkg/UEFI/Protocol/DebugSupport.h | 61 +++- uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc | 18 +- uefi-sct/SctPkg/build.sh | 11 +++- 13 files changed, 144 insertions(+), 7 deletions(-) diff --git a/uefi-sct/SctPkg/Application/InstallSct/InstallSctDef.h b/uefi-sct/SctPkg/Application/InstallSct/InstallSctDef.h index a7815580..02f0283e 100644 --- a/uefi-sct/SctPkg/Application/InstallSct/InstallSctDef.h +++ b/uefi-sct/SctPkg/Application/InstallSct/InstallSctDef.h @@ -3,6 +3,7 @@ Copyright 2006 - 2017 Unified EFI, Inc. Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved. Portions copyright (c) 2014, ARM Ltd. All rights reserved. + (C) Copyright 2021 Hewlett Packard Enterprise Development LP This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -32,6 +33,9 @@ #elif defined(EFIAARCH64) #define INSTALL_SCT_PLATFORM_SHORT_NAME L"aarch64" #define INSTALL_SCT_PLATFORM_NAME L"AARCH64" +#elif defined(EFIRISCV64) + #define INSTALL_SCT_PLATFORM_SHORT_NAME L"riscv64" + #define INSTALL_SCT_PLATFORM_NAME L"RISCV64" #else #error "Architecture not supported" #endif diff --git a/uefi-sct/SctPkg/Library/SctLib/SctLib.inf b/uefi-sct/SctPkg/Library/SctLib/SctLib.inf index 23cb77fb..7527b203 100644 --- a/uefi-sct/SctPkg/Library/SctLib/SctLib.inf +++ b/uefi-sct/SctPkg/Library/SctLib/SctLib.inf @@ -3,6 +3,7 @@ # Copyright 2006 - 2016 Unified EFI, Inc. # Copyright (c) 2013 - 2014, ARM Ltd. All rights reserved. # Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved. +# (C) Copyright 2021 Hewlett Packard Enterprise Development LP # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -62,6 +63,11 @@ Aarch64/initplat.c Math.c +[sources.RISCV64] + Riscv64/SctLibPlat.h + Riscv64/initplat.c + Math.c + [sources.ia32] ia32/SctLibPlat.h ia32/initplat.c diff --git a/uefi-sct/SctPkg/SCRT/SCRTApp/SCRTApp.inf b/uefi-sct/SctPkg/SCRT/SCRTApp/SCRTApp.inf index 7aca6e30..8104a4ef 100644 --- a/uefi-sct/SctPkg/SCRT/SCRTApp/SCRTApp.inf +++ b/uefi-sct/SctPkg/SCRT/SCRTApp/SCRTApp.inf @@ -2,6 +2,7 @@ # # Copyright 2006 - 2016 Unified EFI, Inc. # Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved. +# (C) Copyright 2021 Hewlett Packard Enterprise Development LP # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -39,6 +40,10 @@ Aarch64/GoVirtual.asm | RVCT Aarch64/GoVirtual.S | GCC +[sources.RISCV64] + Riscv64/VirtualMemory.c + Riscv64/GoVirtual.S | GCC + [sources.ia32] ia32/VirtualMemory.c ia32/GoVirtual.asm | MSFT diff --git a/uefi-sct/SctPkg/SCRT/SCRTDriver/SCRTDriver.inf b/uefi-sct/SctPkg/SCRT/SCRTDriver/SCRTDriver.inf index ad0eb0f8..a3ef454e 100644 --- a/uefi-sct/SctPkg/SCRT/SCRTDriver/SCRTDriver.inf +++ b/uefi-sct/SctPkg/SCRT/SCRTDriver/SCRTDriver.inf @@ -2,6 +2,7 @@ # # Copyright 2006 - 2016 Unified EFI, Inc. # Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved. +# (C) Copyright 2021 Hewlett Packard Enterprise Development LP # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -69,6 +70,11 @@ Aarch64/Dump.c Aarch64/Debug.c +[sources.RISCV64]
[edk2-devel] [edk2-test PATCHv2 4/5] SctPkg: Unify CC_FLAGS for all GCC platforms
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3042 Cc: G Edhaya Chandran Cc: Barton Gao Cc: Samer El-Haj-Mahmoud Cc: Eric Jin Cc: Arvin Chen Cc: Leif Lindholm Cc: Heinrich Schuchardt Cc: Abner Chang Signed-off-by: Daniel Schaefer --- uefi-sct/SctPkg/UEFI/IHV_SCT.dsc | 15 --- uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc | 15 --- 2 files changed, 16 insertions(+), 14 deletions(-) diff --git a/uefi-sct/SctPkg/UEFI/IHV_SCT.dsc b/uefi-sct/SctPkg/UEFI/IHV_SCT.dsc index 94bb5c36..91116ca7 100644 --- a/uefi-sct/SctPkg/UEFI/IHV_SCT.dsc +++ b/uefi-sct/SctPkg/UEFI/IHV_SCT.dsc @@ -69,15 +69,16 @@ MSFT:*_*_X64_APP_FLAGS = /D EFIX64 MSFT:*_*_X64_PP_FLAGS= /D EFIX64 -# GCC:*_*_IA32_CC_FLAGS = -D EFI32 $(GCC_VER_MACRO) -ffreestanding -nostdinc -nostdlib -Wno-error -mno-red-zone -Wno-address -mno-stack-arg-probe "-DEFIAPI=__attribute__((ms_abi))" -m32 -mabi=ms -D MDE_CPU_X32 - GCC:*_*_IA32_CC_FLAGS = -D EFIX64 $(GCC_VER_MACRO) -Wno-error + GCC:*_*_*_CC_FLAGS= -ffreestanding -nostdinc -nostdlib -Wno-error +# GCC:*_*_IA32_CC_FLAGS = -D EFI32 $(GCC_VER_MACRO) -mno-red-zone -Wno-address -mno-stack-arg-probe "-DEFIAPI=__attribute__((ms_abi))" -m32 -mabi=ms -D MDE_CPU_X32 + GCC:*_*_IA32_CC_FLAGS = -D EFIX64 $(GCC_VER_MACRO) # GCC:*_*_IA32_VFRPP_FLAGS = -D EFI32 $(GCC_VER_MACRO) # GCC:*_*_IA32_APP_FLAGS= -D EFI32 $(GCC_VER_MACRO) # GCC:*_*_IA32_PP_FLAGS = -D EFI32 $(GCC_VER_MACRO) -# GCC:*_*_X64_CC_FLAGS = -D EFIX64 $(GCC_VER_MACRO) -ffreestanding -nostdinc -nostdlib -Wno-error -mno-red-zone -Wno-address -mno-stack-arg-probe "-DEFIAPI=__attribute__((ms_abi))" -m64 -mcmodel=large -mabi=ms -D MDE_CPU_X64 +# GCC:*_*_X64_CC_FLAGS = -D EFIX64 $(GCC_VER_MACRO) -mno-red-zone -Wno-address -mno-stack-arg-probe "-DEFIAPI=__attribute__((ms_abi))" -m64 -mcmodel=large -mabi=ms -D MDE_CPU_X64 - GCC:*_*_X64_CC_FLAGS = -D EFIX64 $(GCC_VER_MACRO) -Wno-error + GCC:*_*_X64_CC_FLAGS = -D EFIX64 $(GCC_VER_MACRO) # GCC:*_*_X64_VFRPP_FLAGS = -D EFIX64 $(GCC_VER_MACRO) # GCC:*_*_X64_APP_FLAGS= -D EFIX64 $(GCC_VER_MACRO) # GCC:*_*_X64_PP_FLAGS = -D EFIX64 $(GCC_VER_MACRO) @@ -85,7 +86,7 @@ #TODO: OM - fixme RVCT:*_*_ARM_CC_FLAGS = -D EFIARM $(GCC_VER_MACRO) *_*_ARM_CC_FLAGS = -D EFIARM - GCC:*_*_ARM_CC_FLAGS = -D EFIARM $(GCC_VER_MACRO) -fno-stack-protector -ffreestanding -nostdinc -nostdlib -Wno-error=unused-function -Wno-error=unused-but-set-variable -Wno-error=implicit-function-declaration -Wno-error + GCC:*_*_ARM_CC_FLAGS = -D EFIARM $(GCC_VER_MACRO) -fno-stack-protector *_*_ARM_VFRPP_FLAGS = -D EFIARM $(GCC_VER_MACRO) *_*_ARM_APP_FLAGS = -D EFIARM $(GCC_VER_MACRO) *_*_ARM_PP_FLAGS = -D EFIARM $(GCC_VER_MACRO) @@ -104,14 +105,14 @@ RVCT:*_*_ARM_CC_FLAGS= --diag_remark=167 --diag_suppress=167,1295,188,550,1,68,111,177 *_*_AARCH64_CC_FLAGS = -D EFIAARCH64 $(GCC_VER_MACRO) - GCC:*_*_AARCH64_CC_FLAGS = -D EFIAARCH64 $(GCC_VER_MACRO) -ffreestanding -nostdinc -nostdlib -Wno-error=unused-function -Wno-error=unused-but-set-variable -Wno-error + GCC:*_*_AARCH64_CC_FLAGS = -D EFIAARCH64 $(GCC_VER_MACRO) *_*_AARCH64_VFRPP_FLAGS = -D EFIAARCH64 $(GCC_VER_MACRO) *_*_AARCH64_APP_FLAGS= -D EFIAARCH64 $(GCC_VER_MACRO) *_*_AARCH64_PP_FLAGS = -D EFIAARCH64 $(GCC_VER_MACRO) RVCT:*_*_AARCH64_DLINK_FLAGS = --muldefweak *_*_RISCV64_CC_FLAGS = -D EFIRISCV64 $(GCC_VER_MACRO) - GCC:*_*_RISCV64_CC_FLAGS = -D EFIRISCV64 $(GCC_VER_MACRO) -ffreestanding -nostdinc -nostdlib -Wno-error=unused-function -Wno-error=unused-but-set-variable -Wno-error + GCC:*_*_RISCV64_CC_FLAGS = -D EFIRISCV64 $(GCC_VER_MACRO) *_*_RISCV64_VFRPP_FLAGS = -D EFIRISCV64 $(GCC_VER_MACRO) *_*_RISCV64_APP_FLAGS= -D EFIRISCV64 $(GCC_VER_MACRO) *_*_RISCV64_PP_FLAGS = -D EFIRISCV64 $(GCC_VER_MACRO) diff --git a/uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc b/uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc index e13e40e4..3bb57d26 100644 --- a/uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc +++ b/uefi-sct/SctPkg/UEFI/UEFI_SCT.dsc @@ -72,14 +72,15 @@ MSFT:*_*_X64_APP_FLAGS = /D EFIX64 MSFT:*_*_X64_PP_FLAGS= /D EFIX64 -# GCC:*_*_IA32_CC_FLAGS = -D EFI32 $(GCC_VER_MACRO) -ffreestanding -nostdinc -nostdlib -Wno-error -mno-red-zone -Wno-address -mno-stack-arg-probe "-DEFIAPI=__attribute__((ms_abi))" -m32 -mabi=ms -D MDE_CPU_X32 - GCC:*_*_IA32_CC_FLAGS = -D EFIX64 $(GCC_VER_MACRO) -Wno-error + GCC:*_*_*_CC_FLAGS= -ffreestanding -nostdinc -nostdlib -Wno-error +# GCC:*_*_IA32_CC_FLAGS = -D EFI32 $(GCC_VER_MACRO) -mno-red-zone -Wno-address -mno-stack-arg-probe "-DEFIAPI=__attribute__((ms_abi))" -m32 -mabi=ms -D MDE_CPU_X32 + GCC:*_*_IA32_CC_FLAGS = -D EFIX64 $(GCC_VER_MACRO) # GCC:*_*_IA32_VFRPP_FLAGS = -D EFI32 $(GCC_VER_MACRO) # GCC:*_*_IA32_APP_FLAGS= -D EFI32 $(G
[edk2-devel] [edk2-test PATCHv2 1/5] SctPkg: Add RISCV64 support by using Aarch64 sources
The sources were copied from Aarch64. Follow-up commit will adapt them
for Riscv64.
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3042
Cc: G Edhaya Chandran
Cc: Barton Gao
Cc: Samer El-Haj-Mahmoud
Cc: Eric Jin
Cc: Arvin Chen
Cc: Leif Lindholm
Cc: Heinrich Schuchardt
Cc: Abner Chang
Signed-off-by: Daniel Schaefer
---
uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h
| 32 +++
uefi-sct/SctPkg/Library/SctLib/Riscv64/initplat.c
| 45
uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S
| 44
uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/VirtualMemory.c
| 182 +
uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Debug.c
| 88 +++
uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Dump.c
| 68 +
uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Io.c
| 134 ++
uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Io.h
| 48
uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Riscv64/DebugSupportBBTestCacheFunction.c
| 137 ++
uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Riscv64/DebugSupportBBTestExceptionCallbackFunction.c
| 276
uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Riscv64/PlatformIsa.c
| 30 +++
uefi-sct/SctPkg/TestInfrastructure/SCT/Framework/ENTS/EasLib/Riscv64/EntsLibPlat.h
| 55
uefi-sct/SctPkg/TestInfrastructure/SCT/Framework/ENTS/EasLib/Riscv64/InitPlat.c
| 55
13 files changed, 1194 insertions(+)
diff --git a/uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h
b/uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h
new file mode 100644
index ..ee7c656b
--- /dev/null
+++ b/uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h
@@ -0,0 +1,32 @@
+/** @file
+
+ Copyright 2006 - 2012 Unified EFI, Inc.
+ Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+/*++
+
+Module Name:
+
+ SctLibPlat.h
+
+Abstract:
+
+ AArch64 specific defines
+
+--*/
+
+#ifndef _EFI_LIB_PLAT_H_
+#define _EFI_LIB_PLAT_H_
+
+#define MIN_ALIGNMENT_SIZE 8
+
+#endif
diff --git a/uefi-sct/SctPkg/Library/SctLib/Riscv64/initplat.c
b/uefi-sct/SctPkg/Library/SctLib/Riscv64/initplat.c
new file mode 100644
index ..a48bb2f3
--- /dev/null
+++ b/uefi-sct/SctPkg/Library/SctLib/Riscv64/initplat.c
@@ -0,0 +1,45 @@
+/** @file
+
+ Copyright 2006 - 2012 Unified EFI, Inc.
+ Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+/*++
+
+Module Name:
+
+ initplat.c
+
+Abstract:
+
+ Math routines for compatibility with native EFI library routines.
+
+--*/
+
+#include "SctLibInternal.h"
+
+VOID
+InitializeLibPlatform (
+IN EFI_HANDLE ImageHandle,
+IN EFI_SYSTEM_TABLE *SystemTable
+)
+
+{
+ // No platform-specific initializations
+}
+
+UINT64
+SctReadTsc (
+ VOID
+ )
+{
+ return 0;
+}
diff --git a/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S
b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S
new file mode 100644
index ..d223b36b
--- /dev/null
+++ b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S
@@ -0,0 +1,44 @@
+## @file
+#
+# Copyright 2010 - 2012 Unified EFI, Inc.
+# Copyright (c) 2012, ARM Ltd. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD
License
+# which accompanies this distribution. T
[edk2-devel] [edk2-test PATCHv2 2/5] SctPkg: Adapt Aarch64 sources for Riscv64
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3042
Cc: G Edhaya Chandran
Cc: Barton Gao
Cc: Samer El-Haj-Mahmoud
Cc: Eric Jin
Cc: Arvin Chen
Cc: Leif Lindholm
Cc: Heinrich Schuchardt
Cc: Abner Chang
Signed-off-by: Daniel Schaefer
---
uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h
| 3 +-
uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S
| 9 ++--
uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/VirtualMemory.c
| 16 +++
uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Debug.c
| 22 +++--
uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Io.c
| 7 +--
uefi-sct/SctPkg/SCRT/SCRTDriver/Riscv64/Io.h
| 48
uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Riscv64/DebugSupportBBTestExceptionCallbackFunction.c
| 12 ++---
uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Riscv64/PlatformIsa.c
| 4 +-
uefi-sct/SctPkg/TestInfrastructure/SCT/Framework/ENTS/EasLib/Riscv64/EntsLibPlat.h
| 2 +-
9 files changed, 31 insertions(+), 92 deletions(-)
diff --git a/uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h
b/uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h
index ee7c656b..69e7f904 100644
--- a/uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h
+++ b/uefi-sct/SctPkg/Library/SctLib/Riscv64/SctLibPlat.h
@@ -2,6 +2,7 @@
Copyright 2006 - 2012 Unified EFI, Inc.
Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
@@ -20,7 +21,7 @@ Module Name:
Abstract:
- AArch64 specific defines
+ RISCV64 specific defines
--*/
diff --git a/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S
b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S
index d223b36b..ae33da18 100644
--- a/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S
+++ b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S
@@ -2,6 +2,7 @@
#
# Copyright 2010 - 2012 Unified EFI, Inc.
# Copyright (c) 2012, ARM Ltd. All rights reserved.
+# Copyright (c) 2021, Hewlett Packard Enterprise Development LP.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
@@ -23,8 +24,6 @@
#--*/
#start of the code section
.text
-/* FIXME: Should alignment be different on Aarch64? */
-.align 3
.global JumpToTestFunc
.type JumpToTestFunc, %function
@@ -37,8 +36,8 @@
# )
#
JumpToTestFunc:
- mov x2, x0
- mov x0, x1
+ mv x2, x0
+ mv x0, x1
// Jump to Virtual function
- blr x2
+ jalr x2
diff --git a/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/VirtualMemory.c
b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/VirtualMemory.c
index 397b3514..00b59594 100644
--- a/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/VirtualMemory.c
+++ b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/VirtualMemory.c
@@ -2,6 +2,7 @@
Copyright 2006 - 2012 Unified EFI, Inc.
Copyright (c) 2012, ARM Ltd. All rights reserved.
+ Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights
reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
@@ -22,9 +23,6 @@ Module Name:
#include "SCRTApp.h"
-#define VIRT_TO_PHYS_OFFSET (0x8000) //2G
-
-BOOLEAN HighAddress = FALSE;
UINTN PageTable = 0;
@@ -49,11 +47,10 @@ Returns:
--*/
{
- /*Note: It is presumed that on ARM v5, V6 and V7 architectures
-* the MMU is configured and enabled in PEI phase. As VirtualFunc
-* is already mapped to virtual memory, don't have to do anything here.
+ /* Note: It is presumed that on RISCV architectures the MMU is configured and
+ * enabled in PEI phase. As VirtualFunc is already mapped to virtual memory,
+ * don't have to do anything here.
*/
- /* FIXME: Is it the same on ARM v8? */
}
@@ -174,9 +171,8 @@ Returns:
--*/
{
//
- // Note: It is assumed that the MMU and page tables are configured on ARM
platforms
- // based on ARM v5 v6 and v7 architecture.
+ // Note: It is assumed that the MMU and page tables are configured on RISC-V
+ // platforms.
//
- /* FIXME: Is it the same on ARM v8? */
JumpToTestFunc(VirtualFunc, HandOffAddr);
}
diff --git
[edk2-devel] [edk2-test PATCHv2 0/5] Port SCT to RISCV64
Hi everyone,
here's my second patch series for porting the SCT to RISCV64.
Nothing substantial has changed. The first one was really just an RFC
like Leif mentioned. Now I have cleaned it up and it could be merged.
I've got 5 patches:
1. Copy the architectures specific sources from Aarch64
2. Adapt those sources to Riscv64
3. Adapt the generic files, like the make system and general headers to Riscv64
4. Unify the CC_FLAGS for the different GCC architectures
5. Remove trailing whitespace from Riscv64 and Aarch64 specific sources
1, 2 and 3 are split to make the review easier and to provide clean
separated commits. If you think it would be better to squash before
applying them to the repo, feel free to do so.
Please don't waste your time reviewing 1 because you'll just be
reviewing the old Aarch64 code.
4 and 5 are new in this series because of Leif's comments on the last
series. I don't really think 5 belongs here, as almost all files in this
repo have the same issue. We could have a separate patch series for
that.
4 could also be squashed into 3, if you like.
Heinrich already tested the first patch series on Uboot and confirmed
that the test results of SCT look similar as on Aarch64.
It can't currently be easily tested on the EDK2 port that we've done
because a few things are missing.
We're working on an OVMF-style platform for the RISC-V virt machine of
QEMU.
Cheers,
Daniel
Cc: G Edhaya Chandran
Cc: Barton Gao
Cc: Samer El-Haj-Mahmoud
Cc: Eric Jin
Cc: Arvin Chen
Cc: Leif Lindholm
Cc: Heinrich Schuchardt
Cc: Abner Chang
Daniel Schaefer (5):
SctPkg: Add RISCV64 support by using Aarch64 sources
SctPkg: Adapt Aarch64 sources for Riscv64
SctPkg: Add RISCV64 build support
SctPkg: Unify CC_FLAGS for all GCC platforms
SctPkg: Remove trailing whitespace
uefi-sct/SctPkg/Application/InstallSct/InstallSctDef.h
| 4 ++
uefi-sct/SctPkg/Library/SctLib/Aarch64/SctLibPlat.h
| 4 +-
uefi-sct/SctPkg/Library/SctLib/Aarch64/initplat.c
| 6 +-
uefi-sct/SctPkg/Library/SctLib/{Aarch64 => Riscv64}/SctLibPlat.h
| 4 +-
uefi-sct/SctPkg/Library/SctLib/{Aarch64 => Riscv64}/initplat.c
| 6 +-
uefi-sct/SctPkg/Library/SctLib/SctLib.inf
| 6 ++
uefi-sct/SctPkg/SCRT/SCRTApp/Aarch64/GoVirtual.S
| 15 ++---
uefi-sct/SctPkg/SCRT/SCRTApp/Aarch64/VirtualMemory.c
| 22 +++
uefi-sct/SctPkg/SCRT/SCRTApp/{Aarch64 => Riscv64}/GoVirtual.S
| 15 +++--
uefi-sct/SctPkg/SCRT/SCRTApp/{Aarch64 => Riscv64}/VirtualMemory.c
| 22 +++
uefi-sct/SctPkg/SCRT/SCRTApp/SCRTApp.inf
| 5 ++
uefi-sct/SctPkg/SCRT/SCRTDriver/Aarch64/Debug.c
| 28 -
uefi-sct/SctPkg/SCRT/SCRTDriver/Aarch64/Dump.c
| 8 +--
uefi-sct/SctPkg/SCRT/SCRTDriver/Aarch64/Io.c
| 15 ++---
uefi-sct/SctPkg/SCRT/SCRTDriver/Aarch64/Io.h
| 8 +--
uefi-sct/SctPkg/SCRT/SCRTDriver/{Aarch64 => Riscv64}/Debug.c
| 28 -
uefi-sct/SctPkg/SCRT/SCRTDriver/{Aarch64 => Riscv64}/Dump.c
| 8 +--
uefi-sct/SctPkg/SCRT/SCRTDriver/{Aarch64 => Riscv64}/Io.c
| 15 ++---
uefi-sct/SctPkg/SCRT/SCRTDriver/SCRTDriver.inf
| 6 ++
uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Aarch64/DebugSupportBBTestCacheFunction.c
| 6 +-
uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Aarch64/DebugSupportBBTestExceptionCallbackFunction.c
| 18 +++---
uefi-sct/SctPkg/TestCase/UEFI/EFI/Protocol/DebugSupport/BlackBoxTest/Aarch64/Pla
Re: [edk2-devel] Does EDK2 ArmVirtPkg has support for a virtio-mmio-blk device
On Tue, 9 Feb 2021 at 14:41, Laszlo Ersek wrote:
>
> On 02/09/21 03:54, Ying Fang wrote:
>
> > I now realize that we emulate the virtio-blk-device over mmio, and we
> > only emulate virtio-1.0 spec.
> > As mentioned in (1c) , EDK2 only supports virtio-0.95 spec for now, so
> > this maybe a big problem.
> > Since it may not handshake ok if we only emulate virtio-1.0.
>
> Yes.
>
> First, the MMIO transport (as I remember from checking it last time,
> which was quite some time ago) is very different between 0.9.5 and 1.0.
>
> Second, device initialization steps differ:
> - between 0.9.5 MMIO and 0.9.5 PCI,
> - between 0.9.5 and 1.0, regardless of transport.
>
> This means that the device driver code has *some* specifics (=
> abstraction leaks) that relate to the underlying transport (MMIO vs.
> PCI, and 0.9.5 vs. 1.0). See:
>
> OvmfPkg/VirtioBlkDxe/VirtioBlk.c
>
> 752 //
> 753 // Set Page Size - MMIO VirtIo Specific
> 754 //
> 755 Status = Dev->VirtIo->SetPageSize (Dev->VirtIo, EFI_PAGE_SIZE);
>
> 822 //
> 823 // In virtio-1.0, feature negotiation is expected to complete
> before queue
> 824 // discovery, and the device can also reject the selected set of
> features.
> 825 //
> 826 if (Dev->VirtIo->Revision >= VIRTIO_SPEC_REVISION (1, 0, 0)) {
> 827 Status = Virtio10WriteFeatures (Dev->VirtIo, Features,
> &NextDevStat);
>
> 867 //
> 868 // Additional steps for MMIO: align the queue appropriately, and
> set the
> 869 // size. If anything fails from here on, we must unmap the ring
> resources.
> 870 //
> 871 Status = Dev->VirtIo->SetQueueNum (Dev->VirtIo, QueueSize);
>
> 894 //
> 895 // step 5 -- Report understood features.
> 896 //
> 897 if (Dev->VirtIo->Revision < VIRTIO_SPEC_REVISION (1, 0, 0)) {
> 898 Features &= ~(UINT64)(VIRTIO_F_VERSION_1 |
> VIRTIO_F_IOMMU_PLATFORM);
> 899 Status = Dev->VirtIo->SetGuestFeatures (Dev->VirtIo, Features);
>
> We tried to make these "abstraction leaks" as small as possible; for
> example the MMIO specific operations (SetPageSize, SetQueueNum) are
> performed unconditionally, and it's only the PCI transport backends that
> simply ignore those actions (after performing some sanity checks).
> However, the different order of initialization steps couldn't really be
> hidden (I wasn't comfortable with simply regression-testing the new 1.0
> order against 0.9.5 transports of QEMU, so we kept both init orders).
>
> Virtio MMIO was always classified as "temporary" and "legacy", needed
> only until PCI support would be brought about on ARM. So given the
> increased complexity of Virtio MMIO in the 1.0 spec, I always believed
> that designing and implementing the latter in OVMF would be a waste of
> effort.
>
>
> > I will try to emulate the virtio-0.95 later to see if it is the root
> > cause.
>
> Yes, please either do that, or please add a PCI host.
>
> Given that you do get a BLK0: alias in the UEFI shell, the
> initialization of the device might even *appear* to complete, to OVMF;
> however, the actual virtio transfers likely fail.
>
That BLK0: alias in the UEFI shell is the NOR flash not a virtio block device.
--
Ard.
>
> > BTW, I found it really hard to read and understand the EDK2 code for
> > me, there is a long way to go.
>
> Yes. Edk2 uses PPIs and protocols [*] and library classes / library
> instances and sometimes callback registrations for composability, and so
> edk2 is really difficult to read in comparison to other projects, where
> you can just follow function calls.
>
> In edk2, you have to grep the source code for GUIDs, to understand what
> calls what. It was one of the hardest things for me as well, when
> starting with edk2.
>
> [*] Basically a GUID-identified structure of function pointers, and some
> data fields.
>
> Thanks
> Laszlo
>
>
>
>
>
>
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Re: [edk2-devel] [edk2-test PATCH v1 2/2] SctPkg: Enable RISCV64 support using AARCH64 sources
On 2/9/21 10:58 PM, Leif Lindholm wrote: On Tue, Feb 09, 2021 at 14:47:46 +0100, Heinrich Schuchardt wrote: I have no idea why the alignment would be 3 on other platforms, so I don't know how to fix it. If anyone knows more, please let me know. I'll just change the comment to say Riscv64. +.align 3 Both on Aarch64 and on RISC-V an odd alignment value makes no sense. .align 8 should do no harm. But is it needed? No idea why it was added for Arm and Aarch64 copied it. It's not there for the other architectures. Let's remove it. The glory of the GAS .align directive is that its meaning differs between architectures and executable formats. On ARM/AArch64, as well as on RISC-V (I think?) the alignment is described as a power of 2. So .align 3 on ARM and others are the same as .align 8 on x86 (ELF) and others. (It might not be a bad idea to start replacing .align directives with .baligh to reduce confusion.) Thanks for pointing out the different meanings of .align. They are documented in binutils-2.36/gas/doc/as.info chapter 7.3. .balign is GNU assembler specific. Do we have to consider other assemblers here? I don't think so. The GNU family of toolchains are the only ones using .s/.S sources. Unless there are GNU-compatible assemblers that don't support the directive. Visual Studio uses .asm on ARM* and .nasm on x86. / Leif -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71525): https://edk2.groups.io/g/devel/message/71525 Mute This Topic: https://groups.io/mt/78637307/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [Patch] BaseTools: Fix the ending character for Linux script BuildEnv
Hi Mike
Could you help review this patch and push it?
Liming may take leave now.
Thanks,
Bob
-Original Message-
From: Leif Lindholm
Sent: Tuesday, February 9, 2021 11:01 PM
To: Feng, Bob C
Cc: devel@edk2.groups.io; Liming Gao ; Chen,
Christine ; Matthew Carlson ;
Kinney, Michael D
Subject: Re: [Patch] BaseTools: Fix the ending character for Linux script
BuildEnv
On Tue, Feb 09, 2021 at 22:58:08 +0800, Bob Feng wrote:
> Signed-off-by: Bob Feng
> Cc: Liming Gao
> Cc: Yuwei Chen
> Cc: Matthew Carlson
> Cc: Michael D Kinney
> Cc: Leif Lindholm
SMTP strips the intersting aspect, but as long as the end result is a BuildEnv
that has no characters:
Reviewed-by: Leif Lindholm
> ---
> BaseTools/BuildEnv | 24
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/BaseTools/BuildEnv b/BaseTools/BuildEnv index
> 8d283e10c0..275f4c5901 100755
> --- a/BaseTools/BuildEnv
> +++ b/BaseTools/BuildEnv
> @@ -44,11 +44,11 @@ RestorePreviousConfiguration() {
>break
> fi
>done
> fi
>fi
> -
> +
>PREVIOUS_CONF_FILE=$CONF_PATH/BuildEnv.sh
>if [ -e $PREVIOUS_CONF_FILE ]
>then
> echo Loading previous configuration from $PREVIOUS_CONF_FILE
> . $PREVIOUS_CONF_FILE
> @@ -196,21 +196,21 @@ AddEdkToolsToPath() {
> return 1
>fi
>
>EDK_TOOLS_PATH_BIN=`GetEdkToolsPathBinDirectory`
>
> - # check if the edk2basetools pip package is available
> - if $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
> -# if it is, use the pip version of the wrappers
> -echo "Using Pip Basetools"
> -AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
> - else
> -echo "Using EDK2 in-source Basetools"
> -AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
> - fi
> -
> -
> + # check if the edk2basetools pip package is available if
> + $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
> +# if it is, use the pip version of the wrappers
> +echo "Using Pip Basetools"
> +AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
> + else
> +echo "Using EDK2 in-source Basetools"
> +AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
> + fi
> +
> +
>AddDirToStartOfPath $EDK_TOOLS_PATH_BIN
>
> }
>
> CopySingleTemplateFile() {
> --
> 2.29.1.windows.1
>
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Re: [edk2-devel] [Patch] BaseTools: Fix the ending character for Linux script BuildEnv
On Tue, Feb 09, 2021 at 22:58:08 +0800, Bob Feng wrote:
> Signed-off-by: Bob Feng
> Cc: Liming Gao
> Cc: Yuwei Chen
> Cc: Matthew Carlson
> Cc: Michael D Kinney
> Cc: Leif Lindholm
SMTP strips the intersting aspect, but as long as the end result is a
BuildEnv that has no characters:
Reviewed-by: Leif Lindholm
> ---
> BaseTools/BuildEnv | 24
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/BaseTools/BuildEnv b/BaseTools/BuildEnv
> index 8d283e10c0..275f4c5901 100755
> --- a/BaseTools/BuildEnv
> +++ b/BaseTools/BuildEnv
> @@ -44,11 +44,11 @@ RestorePreviousConfiguration() {
>break
> fi
>done
> fi
>fi
> -
> +
>PREVIOUS_CONF_FILE=$CONF_PATH/BuildEnv.sh
>if [ -e $PREVIOUS_CONF_FILE ]
>then
> echo Loading previous configuration from $PREVIOUS_CONF_FILE
> . $PREVIOUS_CONF_FILE
> @@ -196,21 +196,21 @@ AddEdkToolsToPath() {
> return 1
>fi
>
>EDK_TOOLS_PATH_BIN=`GetEdkToolsPathBinDirectory`
>
> - # check if the edk2basetools pip package is available
> - if $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
> -# if it is, use the pip version of the wrappers
> -echo "Using Pip Basetools"
> -AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
> - else
> -echo "Using EDK2 in-source Basetools"
> -AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
> - fi
> -
> -
> + # check if the edk2basetools pip package is available
> + if $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
> +# if it is, use the pip version of the wrappers
> +echo "Using Pip Basetools"
> +AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
> + else
> +echo "Using EDK2 in-source Basetools"
> +AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
> + fi
> +
> +
>AddDirToStartOfPath $EDK_TOOLS_PATH_BIN
>
> }
>
> CopySingleTemplateFile() {
> --
> 2.29.1.windows.1
>
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Re: [edk2-devel] [edk2-test PATCH v1 2/2] SctPkg: Enable RISCV64 support using AARCH64 sources
On Tue, Feb 09, 2021 at 14:47:46 +0100, Heinrich Schuchardt wrote: > >>> I have no idea why the alignment would be 3 on other platforms, so I > >>> don't know how to fix it. > >>> If anyone knows more, please let me know. I'll just change the comment > >>> to say Riscv64. > >>> > > +.align 3 > >> > >> Both on Aarch64 and on RISC-V an odd alignment value makes no sense. > >> > >> .align 8 should do no harm. But is it needed? > > > > The glory of the GAS .align directive is that its meaning differs > > between architectures and executable formats. On ARM/AArch64, as well > > as on RISC-V (I think?) the alignment is described as a power of 2. > > > > So .align 3 on ARM and others are the same as .align 8 on x86 (ELF) > > and others. > > > > (It might not be a bad idea to start replacing .align directives with > > .baligh to reduce confusion.) > > Thanks for pointing out the different meanings of .align. They are > documented in binutils-2.36/gas/doc/as.info chapter 7.3. > > .balign is GNU assembler specific. > > Do we have to consider other assemblers here? I don't think so. The GNU family of toolchains are the only ones using .s/.S sources. Unless there are GNU-compatible assemblers that don't support the directive. Visual Studio uses .asm on ARM* and .nasm on x86. / Leif -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71522): https://edk2.groups.io/g/devel/message/71522 Mute This Topic: https://groups.io/mt/78637307/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [Patch] BaseTools: Fix the ending character for Linux script BuildEnv
Signed-off-by: Bob Feng
Cc: Liming Gao
Cc: Yuwei Chen
Cc: Matthew Carlson
Cc: Michael D Kinney
Cc: Leif Lindholm
---
BaseTools/BuildEnv | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/BaseTools/BuildEnv b/BaseTools/BuildEnv
index 8d283e10c0..275f4c5901 100755
--- a/BaseTools/BuildEnv
+++ b/BaseTools/BuildEnv
@@ -44,11 +44,11 @@ RestorePreviousConfiguration() {
break
fi
done
fi
fi
-
+
PREVIOUS_CONF_FILE=$CONF_PATH/BuildEnv.sh
if [ -e $PREVIOUS_CONF_FILE ]
then
echo Loading previous configuration from $PREVIOUS_CONF_FILE
. $PREVIOUS_CONF_FILE
@@ -196,21 +196,21 @@ AddEdkToolsToPath() {
return 1
fi
EDK_TOOLS_PATH_BIN=`GetEdkToolsPathBinDirectory`
- # check if the edk2basetools pip package is available
- if $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
-# if it is, use the pip version of the wrappers
-echo "Using Pip Basetools"
-AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
- else
-echo "Using EDK2 in-source Basetools"
-AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
- fi
-
-
+ # check if the edk2basetools pip package is available
+ if $PYTHON_COMMAND -c "import edk2basetools" &> /dev/null; then
+# if it is, use the pip version of the wrappers
+echo "Using Pip Basetools"
+AddDirToStartOfPath $EDK_TOOLS_PATH/BinPipWrappers/PosixLike
+ else
+echo "Using EDK2 in-source Basetools"
+AddDirToStartOfPath $EDK_TOOLS_PATH/BinWrappers/PosixLike
+ fi
+
+
AddDirToStartOfPath $EDK_TOOLS_PATH_BIN
}
CopySingleTemplateFile() {
--
2.29.1.windows.1
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[edk2-devel] [PATCH v3 4/4] UefiCpuPkg/MpInitLib: Remove unused Lock from MP_CPU_EXCHANGE_INFO
The Lock is no longer needed since "LOCK XADD" was used in
MpFuncs.nasm for ApIndex atomic increment.
Signed-off-by: Ray Ni
Cc: Eric Dong
Cc: Laszlo Ersek
Cc: Rahul Kumar
---
UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 4
UefiCpuPkg/Library/MpInitLib/MpEqu.inc | 4
UefiCpuPkg/Library/MpInitLib/MpLib.c | 1 -
UefiCpuPkg/Library/MpInitLib/MpLib.h | 3 +--
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 4
5 files changed, 1 insertion(+), 15 deletions(-)
diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
index 4363ad9a18..7bd2415670 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -121,10 +121,6 @@ SkipEnableExecuteDisable:
lock inc dword [edi]
; AP init
-movedi, esi
-addedi, MP_CPU_EXCHANGE_INFO_FIELD (Lock)
-moveax, NotVacantFlag
-
movedi, esi
addedi, MP_CPU_EXCHANGE_INFO_FIELD (ApIndex)
movebx, 1
diff --git a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
index 46c2b5c116..2e9368a374 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
+++ b/UefiCpuPkg/Library/MpInitLib/MpEqu.inc
@@ -13,9 +13,6 @@
;---
%include "Nasm.inc"
-VacantFlagequ00h
-NotVacantFlag equ0ffh
-
CPU_SWITCH_STATE_IDLE equ0
CPU_SWITCH_STATE_STORED equ1
CPU_SWITCH_STATE_LOADED equ2
@@ -72,7 +69,6 @@ endstruc
; Equivalent NASM structure of MP_CPU_EXCHANGE_INFO
;
struc MP_CPU_EXCHANGE_INFO
- .Lock: CTYPE_UINTN 1
.StackStart: CTYPE_UINTN 1
.StackSize:CTYPE_UINTN 1
.CFunction:CTYPE_UINTN 1
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c
b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 2568986d8c..5040053dad 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -1006,7 +1006,6 @@ FillExchangeInfoData (
IA32_CR4 Cr4;
ExchangeInfo = CpuMpData->MpCpuExchangeInfo;
- ExchangeInfo->Lock= 0;
ExchangeInfo->StackStart = CpuMpData->Buffer;
ExchangeInfo->StackSize = CpuMpData->CpuApStackSize;
ExchangeInfo->BufferStart = CpuMpData->WakeupBuffer;
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 02652eaae1..0bd60388b1 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -1,7 +1,7 @@
/** @file
Common header file for MP Initialize Library.
- Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.
Copyright (c) 2020, AMD Inc. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -190,7 +190,6 @@ typedef struct _CPU_MP_DATA CPU_MP_DATA;
// into this structure are used in assembly code in this module
//
typedef struct {
- UINTN Lock;
UINTN StackStart;
UINTN StackSize;
UINTN CFunction;
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index db297f5cca..50df802d1f 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -157,10 +157,6 @@ LongModeStart:
lock inc dword [edi]
; AP init
-movedi, esi
-addedi, MP_CPU_EXCHANGE_INFO_FIELD (Lock)
-movrax, NotVacantFlag
-
movedi, esi
addedi, MP_CPU_EXCHANGE_INFO_FIELD (ApIndex)
movebx, 1
--
2.27.0.windows.1
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[edk2-devel] [PATCH v3 2/4] MdePkg/Nasm.inc: add macros for C types used in structure definition
Signed-off-by: Ray Ni Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu --- MdePkg/Include/Ia32/Nasm.inc | 38 MdePkg/Include/X64/Nasm.inc | 38 2 files changed, 76 insertions(+) diff --git a/MdePkg/Include/Ia32/Nasm.inc b/MdePkg/Include/Ia32/Nasm.inc index 31ce861f1e..017fe5ffd8 100644 --- a/MdePkg/Include/Ia32/Nasm.inc +++ b/MdePkg/Include/Ia32/Nasm.inc @@ -20,3 +20,41 @@ %macro INCSSP_EAX 0 DB 0xF3, 0x0F, 0xAE, 0xE8 %endmacro + +; NASM provides built-in macros STRUC and ENDSTRUC for structure definition. +; For example, to define a structure called mytype containing a longword, +; a word, a byte and a string of bytes, you might code +; +; struc mytype +; +; mt_long: resd1 +; mt_word: resw1 +; mt_byte: resb1 +; mt_str: resb32 +; +; endstruc +; +; Below macros are help to map the C types and the RESB family of pseudo-instructions. +; So that the above structure definition can be coded as +; +; struc mytype +; +; mt_long: CTYPE_UINT321 +; mt_word: CTYPE_UINT161 +; mt_byte: CTYPE_UINT8 1 +; mt_str: CTYPE_CHAR8 32 +; +; endstruc +%define CTYPE_UINT64resq +%define CTYPE_INT64 resq +%define CTYPE_UINT32resd +%define CTYPE_INT32 resd +%define CTYPE_UINT16resw +%define CTYPE_INT16 resw +%define CTYPE_BOOLEAN resb +%define CTYPE_UINT8 resb +%define CTYPE_CHAR8 resb +%define CTYPE_INT8 resb + +%define CTYPE_UINTN resd +%define CTYPE_INTN resd diff --git a/MdePkg/Include/X64/Nasm.inc b/MdePkg/Include/X64/Nasm.inc index 42412735ea..b48d8680bb 100644 --- a/MdePkg/Include/X64/Nasm.inc +++ b/MdePkg/Include/X64/Nasm.inc @@ -20,3 +20,41 @@ %macro INCSSP_RAX 0 DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8 %endmacro + +; NASM provides built-in macros STRUC and ENDSTRUC for structure definition. +; For example, to define a structure called mytype containing a longword, +; a word, a byte and a string of bytes, you might code +; +; struc mytype +; +; mt_long: resd1 +; mt_word: resw1 +; mt_byte: resb1 +; mt_str: resb32 +; +; endstruc +; +; Below macros are help to map the C types and the RESB family of pseudo-instructions. +; So that the above structure definition can be coded as +; +; struc mytype +; +; mt_long: CTYPE_UINT321 +; mt_word: CTYPE_UINT161 +; mt_byte: CTYPE_UINT8 1 +; mt_str: CTYPE_CHAR8 32 +; +; endstruc +%define CTYPE_UINT64resq +%define CTYPE_INT64 resq +%define CTYPE_UINT32resd +%define CTYPE_INT32 resd +%define CTYPE_UINT16resw +%define CTYPE_INT16 resw +%define CTYPE_BOOLEAN resb +%define CTYPE_UINT8 resb +%define CTYPE_CHAR8 resb +%define CTYPE_INT8 resb + +%define CTYPE_UINTN resq +%define CTYPE_INTN resq -- 2.27.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71518): https://edk2.groups.io/g/devel/message/71518 Mute This Topic: https://groups.io/mt/80504937/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v3 3/4] UefiCpuPkg/MpInitLib: Use NASM struc to avoid hardcode offset
In Windows environment, "dumpbin /disasm" is used to verify the disassembly before and after using NASM struc doesn't change. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Laszlo Ersek Cc: Rahul Kumar --- UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 5 +- UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc | 43 .../Library/MpInitLib/Ia32/MpFuncs.nasm | 80 +++--- UefiCpuPkg/Library/MpInitLib/MpEqu.inc| 103 ++ UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 5 +- UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc| 45 UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 92 7 files changed, 193 insertions(+), 180 deletions(-) delete mode 100644 UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc create mode 100644 UefiCpuPkg/Library/MpInitLib/MpEqu.inc delete mode 100644 UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf index 1771575c69..860a9750e2 100644 --- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf +++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf @@ -1,7 +1,7 @@ ## @file # MP Initialize Library instance for DXE driver. # -# Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved. +# Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved. # SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -22,14 +22,13 @@ [Defines] # [Sources.IA32] - Ia32/MpEqu.inc Ia32/MpFuncs.nasm [Sources.X64] - X64/MpEqu.inc X64/MpFuncs.nasm [Sources.common] + MpEqu.inc DxeMpLib.c MpLib.c MpLib.h diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc deleted file mode 100644 index 4f5a7c859a..00 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc +++ /dev/null @@ -1,43 +0,0 @@ -;-- ; -; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved. -; SPDX-License-Identifier: BSD-2-Clause-Patent -; -; Module Name: -; -; MpEqu.inc -; -; Abstract: -; -; This is the equates file for Multiple Processor support -; -;--- - -VacantFlagequ00h -NotVacantFlag equ0ffh - -CPU_SWITCH_STATE_IDLE equ0 -CPU_SWITCH_STATE_STORED equ1 -CPU_SWITCH_STATE_LOADED equ2 - -LockLocation equ(SwitchToRealProcEnd - RendezvousFunnelProcStart) -StackStartAddressLocation equLockLocation + 04h -StackSizeLocation equLockLocation + 08h -ApProcedureLocation equLockLocation + 0Ch -GdtrLocation equLockLocation + 10h -IdtrLocation equLockLocation + 16h -BufferStartLocation equLockLocation + 1Ch -ModeOffsetLocationequLockLocation + 20h -ApIndexLocation equLockLocation + 24h -CodeSegmentLocation equLockLocation + 28h -DataSegmentLocation equLockLocation + 2Ch -EnableExecuteDisableLocation equLockLocation + 30h -Cr3Location equLockLocation + 34h -InitFlagLocation equLockLocation + 38h -CpuInfoLocation equLockLocation + 3Ch -NumApsExecutingLocation equLockLocation + 40h -InitializeFloatingPointUnitsAddress equ LockLocation + 48h -ModeTransitionMemoryLocationequ LockLocation + 4Ch -ModeTransitionSegmentLocation equ LockLocation + 50h -ModeHighMemoryLocation equ LockLocation + 52h -ModeHighSegmentLocation equ LockLocation + 56h - diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm index 2eaddc93bc..4363ad9a18 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm @@ -39,21 +39,21 @@ BITS 16 movfs, ax movgs, ax -movsi, BufferStartLocation +movsi, MP_CPU_EXCHANGE_INFO_FIELD (BufferStart) movebx, [si] -movsi, DataSegmentLocation +movsi, MP_CPU_EXCHANGE_INFO_FIELD (DataSegment) movedx, [si] ; ; Get start address of 32-bit code in low memory (<1MB) ; -movedi, ModeTransitionMemoryLocation +movedi, MP_CPU_EXCHANGE_INFO_FIELD (ModeTransitionMemory) -movsi, GdtrLocation +movsi, MP_CPU_EXCHANGE_INFO_FIELD (GdtrProfile) o32 lgdt [cs:si] -movsi, IdtrLocation +movsi, MP_CPU_EXCHANGE_INFO_FIELD (IdtrProfile) o32 lidt [cs:si] ; @@ -82,7 +82,7 @@ Flat32Start: ; protected mode entry point movesi, ebx mov edi, e
[edk2-devel] [PATCH v3 0/4] Use XADD to avoid lock acquire/release
Patch #1 follows Mike's suggestion to use XADD to avoid lock acquire/release. Patch #2 follows Laszlo's suggestion to add global NASM macros for NASM struc usage. Patch #3 simply remves all hardcode offset in NASM without changing any logic. Patch #4 removes the dead code. The final code is the same as that of V2. Ray Ni (4): UefiCpuPkg/MpInitLib: Use XADD to avoid lock acquire/release MdePkg/Nasm.inc: add macros for C types used in structure definition UefiCpuPkg/MpInitLib: Use NASM struc to avoid hardcode offset UefiCpuPkg/MpInitLib: Remove unused Lock from MP_CPU_EXCHANGE_INFO MdePkg/Include/Ia32/Nasm.inc | 38 ++ MdePkg/Include/X64/Nasm.inc | 38 ++ UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 5 +- UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc | 43 --- .../Library/MpInitLib/Ia32/MpFuncs.nasm | 98 +++- UefiCpuPkg/Library/MpInitLib/MpEqu.inc| 99 UefiCpuPkg/Library/MpInitLib/MpLib.c | 1 - UefiCpuPkg/Library/MpInitLib/MpLib.h | 3 +- UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 5 +- UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc| 45 UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 108 -- 11 files changed, 272 insertions(+), 211 deletions(-) delete mode 100644 UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc create mode 100644 UefiCpuPkg/Library/MpInitLib/MpEqu.inc delete mode 100644 UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc -- 2.27.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71516): https://edk2.groups.io/g/devel/message/71516 Mute This Topic: https://groups.io/mt/80504933/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v3 1/4] UefiCpuPkg/MpInitLib: Use XADD to avoid lock acquire/release
When AP firstly wakes up, MpFuncs.nasm contains below logic to assign an unique ApIndex to each AP according to who comes first: ---ASM--- TestLock: xchg [edi], eax cmpeax, NotVacantFlag jz TestLock movecx, esi addecx, ApIndexLocation incdword [ecx] movebx, [ecx] Releaselock: moveax, VacantFlag xchg [edi], eax ---ASM END--- "lock inc" cannot be used to increase ApIndex because not only the global ApIndex should be increased, but also the result should be stored to a local general purpose register EBX. This patch learns from the NASM implementation of InternalSyncIncrement() to use "XADD" instruction which can increase the global ApIndex and store the original ApIndex to EBX in one instruction. With this patch, OVMF when running in a 255 threads QEMU spends about one second to wakeup all APs. Original implementation needs more than 10 seconds. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Laszlo Ersek Cc: Rahul Kumar --- .../Library/MpInitLib/Ia32/MpFuncs.nasm | 20 ++- UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 18 ++--- 2 files changed, 12 insertions(+), 26 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm index 7e81d24aa6..2eaddc93bc 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm @@ -1,5 +1,5 @@ ;-- ; -; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved. +; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved. ; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -125,19 +125,11 @@ SkipEnableExecuteDisable: addedi, LockLocation moveax, NotVacantFlag -TestLock: -xchg [edi], eax -cmpeax, NotVacantFlag -jz TestLock - -movecx, esi -addecx, ApIndexLocation -incdword [ecx] -movebx, [ecx] - -Releaselock: -moveax, VacantFlag -xchg [edi], eax +movedi, esi +addedi, ApIndexLocation +movebx, 1 +lock xadd dword [edi], ebx ; EBX = ApIndex++ +incebx ; EBX is CpuNumber movedi, esi addedi, StackSizeLocation diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm index aecfd07bc0..5b588f2dcb 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -1,5 +1,5 @@ ;-- ; -; Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved. +; Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved. ; SPDX-License-Identifier: BSD-2-Clause-Patent ; ; Module Name: @@ -161,18 +161,12 @@ LongModeStart: addedi, LockLocation movrax, NotVacantFlag -TestLock: -xchg qword [edi], rax -cmprax, NotVacantFlag -jz TestLock - -leaecx, [esi + ApIndexLocation] -incdword [ecx] -movebx, [ecx] +movedi, esi +addedi, ApIndexLocation +movebx, 1 +lock xadd dword [edi], ebx ; EBX = ApIndex++ +incebx ; EBX is CpuNumber -Releaselock: -movrax, VacantFlag -xchg qword [edi], rax ; program stack movedi, esi addedi, StackSizeLocation -- 2.27.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71517): https://edk2.groups.io/g/devel/message/71517 Mute This Topic: https://groups.io/mt/80504936/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-test PATCH v1 2/2] SctPkg: Enable RISCV64 support using AARCH64 sources
On 09.02.21 13:42, Leif Lindholm wrote: > On Mon, Feb 08, 2021 at 18:04:45 +0100, Heinrich Schuchardt wrote: > diff --git a/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S > b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S > new file mode 100644 > index ..8bc2c624 > --- /dev/null > +++ b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S > @@ -0,0 +1,45 @@ > +## @file > +# > +# Copyright 2010 - 2012 Unified EFI, Inc. > +# Copyright (c) 2012, ARM Ltd. All rights reserved. > +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. > +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of > the BSD License > +# which accompanies this distribution. The full text of the > license may be found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS > OR IMPLIED. > +# > +## > +# > +# > +#/*++ > +# > +# Module Name: > +# > +# GoVirtual.S > +# > +#--*/ > +#start of the code section > +.text > +/* FIXME: Should alignment be different on Aarch64? */ 1) FIXME 2) Aarch64. >>> >>> I have no idea why the alignment would be 3 on other platforms, so I >>> don't know how to fix it. >>> If anyone knows more, please let me know. I'll just change the comment >>> to say Riscv64. >>> > +.align 3 >> >> Both on Aarch64 and on RISC-V an odd alignment value makes no sense. >> >> .align 8 should do no harm. But is it needed? > > The glory of the GAS .align directive is that its meaning differs > between architectures and executable formats. On ARM/AArch64, as well > as on RISC-V (I think?) the alignment is described as a power of 2. > > So .align 3 on ARM and others are the same as .align 8 on x86 (ELF) > and others. > > (It might not be a bad idea to start replacing .align directives with > .baligh to reduce confusion.) Thanks for pointing out the different meanings of .align. They are documented in binutils-2.36/gas/doc/as.info chapter 7.3. .balign is GNU assembler specific. Do we have to consider other assemblers here? Best regards Heinrich > > I haven't looked into whether 8-byte alignment is actually required by > the code here. > > / > Leif > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71515): https://edk2.groups.io/g/devel/message/71515 Mute This Topic: https://groups.io/mt/78637307/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] Does EDK2 ArmVirtPkg has support for a virtio-mmio-blk device
On 02/09/21 03:54, Ying Fang wrote:
> I now realize that we emulate the virtio-blk-device over mmio, and we
> only emulate virtio-1.0 spec.
> As mentioned in (1c) , EDK2 only supports virtio-0.95 spec for now, so
> this maybe a big problem.
> Since it may not handshake ok if we only emulate virtio-1.0.
Yes.
First, the MMIO transport (as I remember from checking it last time,
which was quite some time ago) is very different between 0.9.5 and 1.0.
Second, device initialization steps differ:
- between 0.9.5 MMIO and 0.9.5 PCI,
- between 0.9.5 and 1.0, regardless of transport.
This means that the device driver code has *some* specifics (=
abstraction leaks) that relate to the underlying transport (MMIO vs.
PCI, and 0.9.5 vs. 1.0). See:
OvmfPkg/VirtioBlkDxe/VirtioBlk.c
752 //
753 // Set Page Size - MMIO VirtIo Specific
754 //
755 Status = Dev->VirtIo->SetPageSize (Dev->VirtIo, EFI_PAGE_SIZE);
822 //
823 // In virtio-1.0, feature negotiation is expected to complete before
queue
824 // discovery, and the device can also reject the selected set of
features.
825 //
826 if (Dev->VirtIo->Revision >= VIRTIO_SPEC_REVISION (1, 0, 0)) {
827 Status = Virtio10WriteFeatures (Dev->VirtIo, Features,
&NextDevStat);
867 //
868 // Additional steps for MMIO: align the queue appropriately, and set
the
869 // size. If anything fails from here on, we must unmap the ring
resources.
870 //
871 Status = Dev->VirtIo->SetQueueNum (Dev->VirtIo, QueueSize);
894 //
895 // step 5 -- Report understood features.
896 //
897 if (Dev->VirtIo->Revision < VIRTIO_SPEC_REVISION (1, 0, 0)) {
898 Features &= ~(UINT64)(VIRTIO_F_VERSION_1 | VIRTIO_F_IOMMU_PLATFORM);
899 Status = Dev->VirtIo->SetGuestFeatures (Dev->VirtIo, Features);
We tried to make these "abstraction leaks" as small as possible; for
example the MMIO specific operations (SetPageSize, SetQueueNum) are
performed unconditionally, and it's only the PCI transport backends that
simply ignore those actions (after performing some sanity checks).
However, the different order of initialization steps couldn't really be
hidden (I wasn't comfortable with simply regression-testing the new 1.0
order against 0.9.5 transports of QEMU, so we kept both init orders).
Virtio MMIO was always classified as "temporary" and "legacy", needed
only until PCI support would be brought about on ARM. So given the
increased complexity of Virtio MMIO in the 1.0 spec, I always believed
that designing and implementing the latter in OVMF would be a waste of
effort.
> I will try to emulate the virtio-0.95 later to see if it is the root
> cause.
Yes, please either do that, or please add a PCI host.
Given that you do get a BLK0: alias in the UEFI shell, the
initialization of the device might even *appear* to complete, to OVMF;
however, the actual virtio transfers likely fail.
> BTW, I found it really hard to read and understand the EDK2 code for
> me, there is a long way to go.
Yes. Edk2 uses PPIs and protocols [*] and library classes / library
instances and sometimes callback registrations for composability, and so
edk2 is really difficult to read in comparison to other projects, where
you can just follow function calls.
In edk2, you have to grep the source code for GUIDs, to understand what
calls what. It was one of the hardest things for me as well, when
starting with edk2.
[*] Basically a GUID-identified structure of function pointers, and some
data fields.
Thanks
Laszlo
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Re: [edk2-devel] [PATCH v5 1/1] BaseTools: Use pip module if available, CI uses it by default
Hi Bob,
Something has gone wrong with the line endings on BaseTools/BuildEnv,
breaking the build on posix systems:
/work/git/edk2$ . edksetup.sh
-bash: /work/git/orion/edk2/BaseTools/BuildEnv: line 214: syntax error
near unexpected token `}'
-bash: /work/git/orion/edk2/BaseTools/BuildEnv: line 214: `}'
If I run dos2unix on BaseTools/BuildEnv, it works again.
Can you address please?
/
Leif
On Tue, Feb 09, 2021 at 03:25:30 +, Bob Feng wrote:
> Matt,
>
> I helped to convert the endling character for those PosixLike scripts and
> created a PR https://github.com/tianocore/edk2/pull/1415
>
> Liming,
>
> I verified the your pervious comments on this patch.
>
> Thanks,
> Bob
>
> -Original Message-
> From: Chen, Christine
> Sent: Tuesday, February 9, 2021 10:32 AM
> To: matthewfcarl...@gmail.com; devel@edk2.groups.io
> Cc: Feng, Bob C ; Liming Gao
> Subject: RE: [PATCH v5 1/1] BaseTools: Use pip module if available, CI uses
> it by default
>
> Reviewed-by: Yuwei Chen
>
> > -Original Message-
> > From: matthewfcarl...@gmail.com
> > Sent: Tuesday, February 9, 2021 8:51 AM
> > To: devel@edk2.groups.io
> > Cc: Feng, Bob C ; Liming Gao
> > ; Chen, Christine ;
> > Matthew Carlson
> > Subject: [PATCH v5 1/1] BaseTools: Use pip module if available, CI uses it
> > by
> > default
> >
> > From: Matthew Carlson
> >
> > Use the new edk2-basetools pip module.
> > Includes a helpful message in setup to let users know which has been
> > selected.
> >
> > Cc: Bob Feng
> > Cc: Liming Gao
> > Cc: Yuwei Chen
> >
> > Reviewed-by: Bob Feng
> >
> > Signed-off-by: Matthew Carlson
> > ---
> > .pytool/CISettings.py
> > | 51
> > +++-
> > BaseTools/BinPipWrappers/PosixLike/AmlToC
> > | 14
> > ++
> > BaseTools/BinPipWrappers/PosixLike/BPDG
> > | 12
> > +
> > BaseTools/BinPipWrappers/PosixLike/BrotliCompress
> > |
> > 34 +
> > BaseTools/BinPipWrappers/PosixLike/DevicePath
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/Ecc
> > | 13
> > +
> > BaseTools/BinPipWrappers/PosixLike/EfiRom
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/GenCrc32
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/GenDepex
> > | 12
> > +
> > BaseTools/BinPipWrappers/PosixLike/GenFds
> > | 12
> > +
> > BaseTools/BinPipWrappers/PosixLike/GenFfs
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/GenFv
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/GenFw
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/GenPatchPcdTable
> > |
> > 12 +
> > BaseTools/BinPipWrappers/PosixLike/GenSec
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/GenerateCapsule
> > |
> > 12 +
> > BaseTools/BinPipWrappers/PosixLike/LzmaCompress
> > |
> > 29 +++
> > BaseTools/BinPipWrappers/PosixLike/LzmaF86Compress
> > |
> > 19
> > BaseTools/BinPipWrappers/PosixLike/PatchPcdValue
> > | 12
> > +
> > BaseTools/BinPipWrappers/PosixLike/Pkcs7Sign
> > | 12
> > +
> > BaseTools/BinPipWrappers/PosixLike/Rsa2048Sha256GenerateKeys
> > | 12 +
> > BaseTools/BinPipWrappers/PosixLike/Rsa2048Sha256Sign
> > |
> > 12 +
> > BaseTools/BinPipWrappers/PosixLike/Split
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/TargetTool
> > | 12
> > +
> > BaseTools/BinPipWrappers/PosixLike/TianoCompress
> > |
> > 29 +++
> > BaseTools/BinPipWrappers/PosixLike/Trim
> > | 13
> > +
> > BaseTools/BinPipWrappers/PosixLike/UPT
> > | 12
> > +
> > BaseTools/BinPipWrappers/PosixLike/VfrCompile
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/VolInfo
> > | 29
> > +++
> > BaseTools/BinPipWrappers/PosixLike/build
> > | 12
> > +
> > BaseTools/{BinWr
Re: [edk2-devel] [PATCH 1/1] ArmPkg: add DebugLib to OemMiscLibNull
On Tue, 9 Feb 2021 at 00:48, Leif Lindholm wrote: > > The just added OemMiscLibNull fails to build due to DebugLib.h not > being included, missing the ASSERT definition. Add the include and the > library dependency. > > Cc: Rebecca Cran > Cc: Ard Biesheuvel > Signed-off-by: Leif Lindholm Acked-by: Ard Biesheuvel > --- > ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf | 2 +- > ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c | 1 + > 2 files changed, 2 insertions(+), 1 deletion(-) > > diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf > b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf > index b21eeade64b5..5c4268f68b4a 100644 > --- a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf > +++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLibNull.inf > @@ -28,4 +28,4 @@ [Packages] > > [LibraryClasses] >BaseMemoryLib > - > + DebugLib > diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c > b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c > index 767fc08d166b..73cebef2d1b9 100644 > --- a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c > +++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c > @@ -11,6 +11,7 @@ > > #include > #include > +#include > #include > > #include > -- > 2.20.1 > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71512): https://edk2.groups.io/g/devel/message/71512 Mute This Topic: https://groups.io/mt/80492440/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-test PATCH v1 2/2] SctPkg: Enable RISCV64 support using AARCH64 sources
On Mon, Feb 08, 2021 at 18:04:45 +0100, Heinrich Schuchardt wrote: > >>> diff --git a/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S > >>> b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S > >>> new file mode 100644 > >>> index ..8bc2c624 > >>> --- /dev/null > >>> +++ b/uefi-sct/SctPkg/SCRT/SCRTApp/Riscv64/GoVirtual.S > >>> @@ -0,0 +1,45 @@ > >>> +## @file > >>> +# > >>> +# Copyright 2010 - 2012 Unified EFI, Inc. > >>> +# Copyright (c) 2012, ARM Ltd. All rights reserved. > >>> +# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. > >>> +# > >>> +# This program and the accompanying materials > >>> +# are licensed and made available under the terms and conditions of > >>> the BSD License > >>> +# which accompanies this distribution. The full text of the > >>> license may be found at > >>> +# http://opensource.org/licenses/bsd-license.php > >>> +# > >>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" > >>> BASIS, > >>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS > >>> OR IMPLIED. > >>> +# > >>> +## > >>> +# > >>> +# > >>> +#/*++ > >>> +# > >>> +# Module Name: > >>> +# > >>> +# GoVirtual.S > >>> +# > >>> +#--*/ > >>> +#start of the code section > >>> +.text > >>> +/* FIXME: Should alignment be different on Aarch64? */ > >> > >> 1) FIXME > >> 2) Aarch64. > > > > I have no idea why the alignment would be 3 on other platforms, so I > > don't know how to fix it. > > If anyone knows more, please let me know. I'll just change the comment > > to say Riscv64. > > > >>> +.align 3 > > Both on Aarch64 and on RISC-V an odd alignment value makes no sense. > > .align 8 should do no harm. But is it needed? The glory of the GAS .align directive is that its meaning differs between architectures and executable formats. On ARM/AArch64, as well as on RISC-V (I think?) the alignment is described as a power of 2. So .align 3 on ARM and others are the same as .align 8 on x86 (ELF) and others. (It might not be a bad idea to start replacing .align directives with .baligh to reduce confusion.) I haven't looked into whether 8-byte alignment is actually required by the code here. / Leif -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71511): https://edk2.groups.io/g/devel/message/71511 Mute This Topic: https://groups.io/mt/78637307/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH edk2-platforms v1 1/1] Maintainers.txt: Update Arm platform maintainer
On Mon, Feb 08, 2021 at 10:11:05 +, Sami Mujawar wrote: > Update maintainer for Arm Ltd. Platforms in > edk2-platforms ( > F: Platform/ARM/ > F: Silicon/ARM/ > ) > based on discussions on the mailing list at: > https://edk2.groups.io/g/devel/message/71354 > > Cc: Ard Biesheuvel > Cc: Thomas Abraham > Cc: Leif Lindholm > Signed-off-by: Sami Mujawar Thanks Sami. Reviewed-by: Leif Lindholm Pushed as 021ee4d6182e. > --- > Maintainers.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Maintainers.txt b/Maintainers.txt > index > 34f0b585815f36e44c0e7f3366a39ebe9cfb5cfd..8c561166c17b3babc89459b3e77b1c6c5c869554 > 100644 > --- a/Maintainers.txt > +++ b/Maintainers.txt > @@ -105,7 +105,7 @@ F: Platform/ARM/ > F: Silicon/ARM/ > R: Ard Biesheuvel > R: Thomas Abraham > -M: Leif Lindholm > +M: Sami Mujawar > > BeagleBoard: > F: Platform/BeagleBoard/ > -- > 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71510): https://edk2.groups.io/g/devel/message/71510 Mute This Topic: https://groups.io/mt/80473954/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 3/8] TigerlakeOpenBoardPkg: Add library instances
Thank Sai, I have sent Patch V2: 1. remove file PeiFspSiPolicyInitLib.c. 2. remove "PeiFspSiPolicyInitLib.c" from FspWrapper\Library\PeiFspPolicyInitLib\PeiFspPolicyInitLib.inf 3. remove the code below It8628SioSerialPortInit Thanks, Heng > -Original Message- > From: Chaganty, Rangasai V > Sent: Tuesday, February 9, 2021 8:45 AM > To: Luo, Heng ; devel@edk2.groups.io > Cc: Desimone, Nathaniel L > Subject: RE: [PATCH 3/8] TigerlakeOpenBoardPkg: Add library instances > > Also, PeiFspSiPolicyInitLib.c is only including three header files. Please > double > check and remove this file if these header files are already included by the > callers. > > -Original Message- > From: Chaganty, Rangasai V > Sent: Monday, February 08, 2021 4:43 PM > To: Luo, Heng ; devel@edk2.groups.io > Cc: Desimone, Nathaniel L > Subject: RE: [PATCH 3/8] TigerlakeOpenBoardPkg: Add library instances > > In BasePlatformHookLib.c, the code below It8628SioSerialPortInit () can be > removed. > > Thanks, > Sai > > -Original Message- > From: Luo, Heng > Sent: Saturday, February 06, 2021 9:38 PM > To: devel@edk2.groups.io > Cc: Chaganty, Rangasai V ; Desimone, > Nathaniel L > Subject: [PATCH 3/8] TigerlakeOpenBoardPkg: Add library instances > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 > > Adds the following library instances: > * FspWrapper/Library/PeiFspPolicyInitLib > * FspWrapper/Library/PeiSiDefaultPolicyInitLib > * FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib > * Library/BasePlatformHookLib > * Library/SmmSpiFlashCommonLib > * Policy/Library/DxeSiliconPolicyUpdateLib > > Cc: Sai Chaganty > Cc: Nate DeSimone > Signed-off-by: Heng Luo > --- > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspCpuPolicyInitLib.c| 79 > + > ++ > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspMePolicyInitLib.c | 51 > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspMiscUpdInitLib.c | 27 > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspPchPolicyInitLib.c| 372 > + > + > + > + > + > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspPolicyInitLib.c | 308 > + > + > + > + > > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspPolicyInitLib.h | 187 > + > + > + > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspPolicyInitLib.inf | 184 > + > + > ++ > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspSaPolicyInitLib.c | 240 > + > + > + > + > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspSecurityPolicyInitLib.c | 49 > + > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/ > PeiFspSiPolicyInitLib.c | 10 ++ > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiDefaultPolicyI > nitLib/PeiSiDefaultPolicyInitLib.c | 39 > +++ > > Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiDefaultPolicyI > nitLib/PeiSiDefaultPolicyInitLib.inf | 38 >
[edk2-devel] [Patch V2 8/8] Update Maintainers.txt for TigerlakeOpenBoardPkg
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 This change adds owners to the the Maintainers.txt for TigerlakeOpenBoardPkg Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Maintainers.txt | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Maintainers.txt b/Maintainers.txt index 34f0b58581..b2f1b67cf9 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -195,6 +195,12 @@ M: Rangasai V Chaganty R: Deepika Kethi Reddy R: Kathappan Esakkithevar +Platform/Intel/TigerlakeOpenBoardPkg +F: Platform/Intel/TigerlakeOpenBoardPkg/ +M: Sai Chaganty +M: Nate DeSimone +R: Heng Luo + Platform/Intel/SimicsOpenBoardPkg F: Platform/Intel/SimicsOpenBoardPkg/ M: Agyeman Prince -- 2.24.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71508): https://edk2.groups.io/g/devel/message/71508 Mute This Topic: https://groups.io/mt/80500131/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [Patch V2 6/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add DSC and build files
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the DSC and build files necessary to build the TigerlakeURvp board instance. Key files: * build_config.cfg - Board-specific build configuration file. * OpenBoardPkg.dsc - The TigerlakeURvp board description file. * OpenBoardPkgPcd.dsc - Used for other PCD customization. * OpenBoardPkg.fdf - The TigerlakeURvp board flash file. * OpenBoardPkgBuildOption.dsc - Sets build options Based on PCD values. Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc | 347 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.fdf | 702 ++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgBuildOption.dsc | 141 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc | 392 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/build_config.cfg | 34 ++ 5 files changed, 1616 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc new file mode 100644 index 00..a4265a839c --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkg.dsc @@ -0,0 +1,347 @@ +## @file +# The main build description file for the TigerlakeURvp board. +# +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + DEFINE PLATFORM_PACKAGE = MinPlatformPkg + DEFINE PLATFORM_SI_PACKAGE = TigerlakeSiliconPkg + DEFINE PLATFORM_SI_BIN_PACKAGE = TigerlakeSiliconBinPkg + DEFINE PLATFORM_FSP_BIN_PACKAGE = TigerLakeFspBinPkg/Client + DEFINE PLATFORM_BOARD_PACKAGE= TigerlakeOpenBoardPkg + DEFINE BOARD = TigerlakeURvp + DEFINE PROJECT = $(PLATFORM_BOARD_PACKAGE)/$(BOARD) + DEFINE PEI_ARCH = IA32 + DEFINE DXE_ARCH = X64 + DEFINE TOP_MEMORY_ADDRESS= 0x0 + + # + # Default value for OpenBoardPkg.fdf use + # + DEFINE BIOS_SIZE_OPTION = SIZE_120 + +[Defines] + PLATFORM_NAME = $(PLATFORM_BOARD_PACKAGE) + PLATFORM_GUID = 465B0A0B-7AC1-443b-8F67-7B8DEC145F90 + PLATFORM_VERSION = 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY = Build/$(PROJECT) + SUPPORTED_ARCHITECTURES = IA32|X64 + BUILD_TARGETS = DEBUG|RELEASE + SKUID_IDENTIFIER = ALL + + FLASH_DEFINITION = $(PROJECT)/OpenBoardPkg.fdf + FIX_LOAD_TOP_MEMORY_ADDRESS = 0x0 + + # + # Include PCD configuration for this board. + # + !include OpenBoardPkgPcd.dsc + + +# +# SKU Identification section - list of all SKU IDs supported by this board. +# + +[SkuIds] + 0|DEFAULT # 0|DEFAULT is reserved and always required. + 0x01|SkuIdTglU + + + +# +# Includes section -
[edk2-devel] [Patch V2 7/8] Enable build for TigerlakeOpenBoardPkg
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 This change adds the configuration to enable build for TigerlakeURvp. Also it updates Tigerlake U Rvp details to the Readme.md. Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/Readme.md | 11 +++ Platform/Intel/build.cfg | 1 + 2 files changed, 12 insertions(+) diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index f7bfc7aad2..b3b15405af 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -57,6 +57,7 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol * The `SimicsOpenBoardPkg` contains board implementations for the Simics hardware simulator. * The `WhiskeylakeOpenBoardPkg` contains board implementations for WhiskeyLake systems. * The `CometlakeOpenBoardPkg` contains board implementations for CometLake systems. +* The `TigerlakeOpenBoardPkg` contains board implementations for TigerLake systems. ### **Supported Hardware** @@ -75,6 +76,7 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol | RVP 3 | SkyLake, KabyLake, KabyLake Refresh | KabylakeOpenBoardPkg | KabylakeRvp3 | | WHL-U DDR4 RVP| WhiskeyLake | WhiskeylakeOpenBoardPkg | WhiskeylakeURvp| | CML-U LPDDR3 RVP | CometLake V1 | CometlakeOpenBoardPkg| CometlakeURvp | +| TGL-U LPDDR4 RVP | TigerLake | TigerlakeOpenBoardPkg| TigerlakeURvp | *Note: RVP = Reference and Validation Platform* @@ -253,6 +255,11 @@ return back to the minimum platform caller. | || |---build_config.cfg: CometlakeURvp specific build | || settings environment variables. | || + | ||--TigerlakeOpenBoardPkg + | || |--TigerlakeURvp + | || |---build_config.cfg: TigerlakeURvp specific build + | || settings environment variables. + | || |--FSP @@ -283,6 +290,10 @@ return back to the minimum platform caller. 1. This firmware project has been tested booting to Microsoft Windows 10 x64 with AHCI mode and External Graphic Device. 2. This firmware project has been also tested booting to Ubuntu 17.10 with AHCI mode and Integrated Graphic Device. +**TigerlakeOpenBoardPkg** +1. This firmware project has been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic Device. +2. This firmware project has been also tested booting to Puppy Linux BionicPup64 8.0 with AHCI mode and Integrated Graphic Device. + ### **Package Builds** In some cases, such as BoardModulePkg, a package may provide a set of functionality that is included in other diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg index 8aa6b22956..97c5c9a290 100644 --- a/Platform/Intel/build.cfg +++ b/Platform/Intel/build.cfg @@ -60,3 +60,4 @@ KabylakeRvp3 = KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg UpXtreme = WhiskeylakeOpenBoardPkg/UpXtreme/build_config.cfg WhiskeylakeURvp = WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg CometlakeURvp = CometlakeOpenBoardPkg/CometlakeURvp/build_config.cfg +TigerlakeURvp = TigerlakeOpenBoardPkg/TigerlakeURvp/build_config.cfg -- 2.24.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#71507): https://edk2.groups.io/g/devel/message/71507 Mute This Topic: https://groups.io/mt/80500130/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [Patch V2 5/8] TigerlakeOpenBoardPkg: Add modules
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175
Adds the following modules:
* BiosInfo
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c | 200
Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.inf | 83
+++
2 files changed, 283 insertions(+)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..46c3d439c2
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,200 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define BASE_FV_SIZE 10
+
+#define FSP_WRAPPER_FV_SIZE 3
+
+#define TSN_MAC_ADDRESS_FV_SIZE 0
+
+#define BIOS_INFO_STRUCT_SIZE (BASE_FV_SIZE + FSP_WRAPPER_FV_SIZE +
TSN_MAC_ADDRESS_FV_SIZE)
+
+
+/*
+ BIOS_INFO structure is the base of the firmware volume layout for Intel
platform BIOS implementation
+ so security checker module can run based on the structure and throw
warnings, error or deadloop
+ when any unexpected firmware volumes are detected.
+
+ BIOS_INFO is recommended to support full entries of firmware volumes present
in a flash
+ with right type, attribute, version, flash map base address and size,
+ all associated information which is defined by BIOS_INFO_STRUCT structure.
+ - IBB firmware volumes, which are expected to be measured or/and verified
+by hardware base security solution to meet SecureBoot chain of trust
+(Intel BootGuard for example), have attribute 0x0.
+ - Post IBB firmware volumes, which are expected to be measured or/and
verified
+by BIOS (TCG code for measurement, RSA2048SHA256Sign algorithm for
verification for example),
+have attribute BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB.
+ - Else, follows Firmware Interface Table specification.
+*/
+#pragma pack (1)
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[BIOS_INFO_STRUCT_SIZE];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+BIOS_INFO_STRUCT_SIZE,
+0,
+ },
+ {
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashNvStorageVariableSize) + FixedPcdGet32
(PcdFlashNvStorageFtwWorkingSize) + FixedPcdGet32
(PcdFlashNvStorageFtwSpareSize),
+ FixedPcdGet32 (PcdFlashNvStorageVariableBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvAdvancedSize),
+ FixedPcdGet32 (PcdFlashFvAdvancedBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvOptionalSize),
+ FixedPcdGet32 (PcdFlashFvOptionalBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvOsBootSize),
+ FixedPcdGet32 (PcdFlashFvOsBootBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvUefiBootSize),
+ FixedPcdGet32 (PcdFlashFvUefiBootBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvPostMemorySize),
+ FixedPcdGet32 (PcdFlashFvPostMemoryBase)
+},
+{
+ /*
+Note :
+Startup ACM is one of the binaries in FvFirmwareBinaries,
+so put type 07 but not type 02.
+FIT table will contain a type 02 entry with actual address
+of ACM binary (it is passed as an input to FitGen tool).
+ */
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvFirmwareBinariesSize),
+ FixedPcdGet32 (PcdFlashFvFirmwareBinariesBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvFspSSize),
+ FixedPcdGet32 (PcdFlashFvFspSBase)
+},
+{
+ FIT_TYPE_07_BIOS_STARTUP_MODULE,
+ 0x00,// IBB FV
+ 0x0100,
+ FixedPcdGet32 (PcdFlashFvFspMSize),
+ FixedPcdGet32 (PcdFlashFvFspMBase)
+},
+{
+ FIT_TYPE_07
[edk2-devel] [Patch V2 4/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add library instances
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following library instances: * TigerlakeURvp/Library/BoardAcpiLib * TigerlakeURvp/Library/BoardInitLib * TigerlakeURvp/Library/PeiPlatformHookLib Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c | 88 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.inf | 43 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmSiliconAcpiEnableLib.c | 160 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmTigerlakeURvpAcpiEnableLib.c | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c | 160 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/BoardSaInitPreMemLib.c | 96 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/GpioTableTigerlakeUDdr4Rvp.h | 93 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/GpioTableTigerlakeUDdr4RvpPreMem.h | 33 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.c | 41 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPostMemLib.inf | 49 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.c | 88 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiMultiBoardInitPreMemLib.inf | 115 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpDetect.c | 39 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpInitPostMemLib.c | 153 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/PeiTigerlakeURvpInitPreMemLib.c | 445 + Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardInitLib/TigerlakeURvpInit.h | 23 +++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/PeiPlatformHookLib/PeiPlatformHooklib.c | 212 Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/PeiPlatformHookLib/PeiPlatformHooklib.inf | 58 ++ 18 files changed, 1947 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c new file mode 100644 index 00..1436d9b79a --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Library/BoardAcpiLib/SmmMultiBoardAcpiSupportLib.c @@ -0,0 +1,88 @@ +/** @file + Tiger Lake U RVP SMM Multi-Board ACPI Support library + + Copyright (c) 2021, Intel Corporation. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +#include
[edk2-devel] [Patch V2 3/8] TigerlakeOpenBoardPkg: Add library instances
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following library instances: * FspWrapper/Library/PeiFspPolicyInitLib * FspWrapper/Library/PeiSiDefaultPolicyInitLib * FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib * Library/BasePlatformHookLib * Library/SmmSpiFlashCommonLib * Policy/Library/DxeSiliconPolicyUpdateLib Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspCpuPolicyInitLib.c | 79 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspMePolicyInitLib.c | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspMiscUpdInitLib.c | 27 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPchPolicyInitLib.c | 372 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.c | 308 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.h | 187 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.inf | 183 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspSaPolicyInitLib.c | 240 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiFspPolicyInitLib/PeiFspSecurityPolicyInitLib.c | 49 + Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiDefaultPolicyInitLib/PeiSiDefaultPolicyInitLib.c | 39 +++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiDefaultPolicyInitLib/PeiSiDefaultPolicyInitLib.inf | 38 ++ Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib/PeiSiPreMemDefaultPolicyInitLib.c | 40 Platform/Intel/TigerlakeOpenBoardPkg/FspWrapper/Library/PeiSiPreMemDefaultPolicyInitLib/PeiSiPreMemDefaultPolicyInitLib.inf | 38 ++ Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.c | 391 +++ Platform/Intel/TigerlakeOpenBoardPkg/Library/BasePlatformHookLib/BasePlatformHookLib.inf | 51 +++ Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf | 49 + Platform/Intel/TigerlakeOpenBoardPkg/Library/SmmSpiFlashCommonLib/SpiFlashCommon.c | 210 +
[edk2-devel] [Patch V2 2/8] TigerlakeOpenBoardPkg/TigerlakeURvp: Add fdf and header file
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175 Adds the following files: * TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf * TigerlakeURvp/Include/PeiPlatformHookLib.h Cc: Sai Chaganty Cc: Nate DeSimone Signed-off-by: Heng Luo --- Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf | 54 ++ Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/PeiPlatformHookLib.h | 130 ++ 2 files changed, 184 insertions(+) diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf new file mode 100644 index 00..b21ae6401f --- /dev/null +++ b/Platform/Intel/TigerlakeOpenBoardPkg/TigerlakeURvp/Include/Fdf/FlashMapInclude.fdf @@ -0,0 +1,54 @@ +## @file +# FDF file of Platform. +# +# Copyright (c) 2021, Intel Corporation. All rights reserved. +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +#=# +# 12 M BIOS - for FSP wrapper +#=# +DEFINE FLASH_BASE = 0xFF40 # +DEFINE FLASH_SIZE = 0x00C0 # +DEFINE FLASH_BLOCK_SIZE = 0x0001 # +DEFINE FLASH_NUM_BLOCKS = 0x00C0 # +#=# + +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = 0x # Flash addr (0xFF40) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = 0x0006 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = 0x # Flash addr (0xFF40) +SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize = 0x0002E000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = 0x0002E000 # Flash addr (0xFF42E000) +SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize= 0x2000 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = 0x0003 # Flash addr (0xFF43) +SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = 0x0003 # + +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset= 0x000E # Flash addr (0xFF4E) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = 0x001A # +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalOffset = 0x0028 # Flash addr (0xFF68) +SET gBoardModuleTokenSpaceGuid.PcdFlashFvOptionalSize = 0x0030 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = 0x0058 # Flash addr (0xFF98) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize= 0x000A # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset= 0x0062 # Flash addr (0xFFA2) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = 0x001D # + +## Firmware binaries FV absolute address requires 256kB alignment +## Build script checks the requirement. +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesOffset = 0x0080 # Flash addr (0xFFC0) +SET gBoardModuleTokenSpaceGuid.PcdFlashFvFirmwareBinariesSize = 0x0008 # Keep 0x8 or larger +SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset= 0x0088 # Flash addr (0xFFC8) +SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = 0x0007 # Keep 0x7 or larger, change MicrocodeFv.fdf in case that this value change +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = 0x008F # Flash addr (0xFFC0) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize= 0x0008 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset= 0x0097 # Flash addr (0xFFD7) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x000A # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset= 0x00A1 # Flash addr (0xFFE1) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x0011 # +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset= 0x00B2 # Flash addr (0xFFF2) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x0001 # + +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset= 0x00B3 # Flash addr (0xFFF3) +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize
[edk2-devel] [Patch V2 1/8] TigerlakeOpenBoardPkg: Add package and headers
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3175
Create the TigerlakeOpenBoardPkg to provide board support code. The
package may support Tigerlake boards. The package serves as a board
support package in the EDK II Minimum Platform design. Silicon support
for this package is provided in TigerLakeFspBinPkg in the FSP repository
and TigerlakeSiliconPkg in the edk2-platforms repository.
Cc: Sai Chaganty
Cc: Nate DeSimone
Signed-off-by: Heng Luo
---
Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h | 61
+
Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h | 17
+
Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h | 49
+
Platform/Intel/TigerlakeOpenBoardPkg/OpenBoardPkg.dec | 153
+
4 files changed, 280 insertions(+)
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h
b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h
new file mode 100644
index 00..148abcce74
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardConfig.h
@@ -0,0 +1,61 @@
+/** @file
+ Header file for Platform Boards Configurations.
+
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _PLATFORM_BOARD_CONFIG_H
+#define _PLATFORM_BOARD_CONFIG_H
+
+#include
+#include
+
+
+#pragma pack(1)
+
+typedef struct {
+ UINT8 ClkReqNumber : 4;
+ UINT8 ClkReqSupported : 1;
+ UINT8 DeviceResetPadActiveHigh : 1;
+ UINT32 DeviceResetPad;
+} ROOT_PORT_CLK_INFO;
+
+typedef struct {
+ UINT8 Section;
+ UINT8 Pin;
+} EXPANDER_GPIO_CONFIG;
+
+typedef struct {
+ UINT8 Type;
+ UINT8 Reserved[3]; // alignment for COMMON_GPIO_CONFIG
+ union {
+UINT32 Pin;
+EXPANDER_GPIO_CONFIG Expander;
+ } u;
+} BOARD_GPIO_CONFIG;
+
+// Do not change the encoding. It must correspond with PCH_PCIE_CLOCK_USAGE
from PCH RC.
+#define NOT_USED 0xFF
+#define FREE_RUNNING 0x80
+#define LAN_CLOCK0x70
+#define PCIE_PEG 0x40
+#define PCIE_PCH 0x00
+
+typedef struct {
+ UINT32 ClockUsage;
+ UINT32 ClkReqSupported;
+} PCIE_CLOCK_CONFIG;
+
+typedef union {
+ UINT64 Blob;
+ BOARD_GPIO_CONFIG BoardGpioConfig;
+ ROOT_PORT_CLK_INFO Info;
+ PCIE_CLOCK_CONFIG PcieClock;
+} PCD64_BLOB;
+
+#pragma pack()
+
+#endif // _PLATFORM_BOARD_CONFIG_H
+
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h
b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h
new file mode 100644
index 00..2e1ee9eca4
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PlatformBoardId.h
@@ -0,0 +1,17 @@
+/** @file
+ Defines Platform BoardIds
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _PLATFORM_BOARD_ID_H_
+#define _PLATFORM_BOARD_ID_H_
+
+// TigerLake Sku IDs
+#define SkuIdTglU 0x1
+
+// TigerLake Board Id 0x01
+#define BoardIdTglUDdr4 0x01
+
+#endif // _PLATFORM_BOARD_ID_H_
diff --git a/Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
new file mode 100644
index 00..0848efe5b6
--- /dev/null
+++ b/Platform/Intel/TigerlakeOpenBoardPkg/Include/PolicyUpdateMacro.h
@@ -0,0 +1,49 @@
+
+/** @file
+ Macros for platform to update different types of policy.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _POLICY_UPDATE_MACRO_H_
+#define _POLICY_UPDATE_MACRO_H_
+
+#ifdef UPDATE_POLICY
+#undef UPDATE_POLICY
+#endif
+
+#ifdef COPY_POLICY
+#undef COPY_POLICY
+#endif
+
+#ifdef GET_POLICY
+#undef GET_POLICY
+#endif
+
+#ifdef AND_POLICY
+#undef AND_POLICY
+#endif
+
+#ifdef OR_POLICY
+#undef OR_POLICY
+#endif
+
+#if FixedPcdGetBool(PcdFspModeSelection) == 1
+//
+// MACROS for platform code use
+//
+#define UPDATE_POLICY(UpdField, ConfigField, Value) UpdField = Value;
+#define COPY_POLICY(UpdField, ConfigField, Value, Size) CopyMem (UpdField,
Value, Size);
+#define GET_POLICY(UpdField, ConfigField, Value) Value = UpdField;
+#define AND_POLICY(UpdField, ConfigField, Value) UpdField &= Value;
+#define OR_POLICY(UpdField, ConfigField, Value) UpdField |= Value;
+#else
+#define UPDATE_POLICY(UpdField, ConfigField, Value) ConfigField = Value;
+#define COPY_POLICY(UpdField, ConfigField, Value, Size) CopyMem (ConfigField,
Value, Size);
+#define GET_POLICY(UpdField, ConfigField, Value) Value = ConfigField;
+#define AND_POLICY(UpdField, ConfigField, Value) ConfigField &= Value;
+#define OR_POLICY(UpdField, ConfigField, Value) ConfigField |= Value;
Re: [edk2-devel] [PATCH v4] IntelFsp2Pkg: Add YAML file generation support
Patch pushed: 273261126e30c46737736bff3ece64c4bd77bedd > -Original Message- > From: Loo Tung Lun > Sent: Monday, February 8, 2021 1:04 PM > To: devel@edk2.groups.io > Cc: Loo, Tung Lun ; Ma, Maurice > ; Desimone, Nathaniel L > ; Zeng, Star ; Chiu, > Chasel > Subject: [PATCH v4] IntelFsp2Pkg: Add YAML file generation support > > Add support for YAML format file generation in addition > to current BSF structure. Configuration of YAML format > output will be supported by an open source ConfigEditor. > > Reference to YAML code, test and ConfigEditor is at > https://github.com/joshloo/fsp_yaml_cfg/tree/master/Tools > > A unit test is also added in Tests folder. This test compares > the generated yaml file against the expected output to know > if it is constructing the yaml data structure as expected. > > Cc: Maurice Ma > Cc: Nate DeSimone > Cc: Star Zeng > Cc: Chasel Chiu > Signed-off-by: Loo Tung Lun > --- > IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py | 877 > + > + > + > + > + > + > + > + > + > + > + > + > + > > IntelFsp2Pkg/Tools/GenCfgOpt.py| 470 > + > + > + > + > + > +-- > -- > IntelFsp2Pkg/Tools/Tests/ExpectedFspUpd.h | 16 > > IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h | 75 > + > ++ > IntelFsp2Pkg/Tools/Tests/ExpectedFspsUpd.h | 69 > + > > IntelFsp2Pkg/Tools/Tests/ExpectedFsptUpd.h | 87 > + > ++ > IntelFsp2Pkg/Tools/Tests/ExpectedOutput.bsf| 88 > + > +++ > IntelFsp2Pkg/Tools/Tests/ExpectedOutput.yaml | 267 > + > + > + > + > +++ > IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc| 469 > + > + > + > + > + > + > + > ++ > IntelFsp2Pkg/Tools/Tests/test_yaml.py | 96 > + > +++ > IntelFsp2Pkg/Tools/UserManuals/FspDscBsf2YamlUserManual.md | 39 > +++ > 11 files changed, 2421 insertions(+), 132 deletions(-) > > diff --git a/IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py > b/IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py > new file mode 100644 > index 00..cad9b60e73 > --- /dev/null > +++ b/IntelFsp2Pkg/Tools/FspDscBsf2Yaml.py > @@ -0,0 +1,877 @@ > +#!/usr/bin/env python > > +## @ FspDscBsf2Yaml.py > > +# This script convert DSC or BSF format file into YAML format > > +# > > +# Copyright(c) 2021, Intel Corporation. All rights reserved. > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > +## > > + > > +import os > > +import re > > +import sys > > +fr
