[edk2-devel] [PATCH] MdeModulePkg SmbiosMeasurementDxe: Add Type4 CurrentSpeed to filter table

[Heng Luo]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4051

The Type4 CurrentSpeed field may be various.
So this patch adds it into the filter table.

Signed-off-by: Heng Luo 
Cc: Jian J Wang 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Dandan Bi 
Cc: Star Zeng 
Cc: Zhichao Gao 
---
 MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c 
b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c
index 348082ff86..d61edc846b 100644
--- a/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c
+++ b/MdeModulePkg/Universal/SmbiosMeasurementDxe/SmbiosMeasurementDxe.c
@@ -1,7 +1,7 @@
 /** @file
   This driver measures SMBIOS table to TPM.
 
-Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -66,6 +66,7 @@ SMBIOS_FILTER_TABLE  mSmbiosFilterType4BlackList[] = {
   { 0x04, OFFSET_OF (SMBIOS_TABLE_TYPE4, EnabledCoreCount2), FIELD_SIZE_OF 
(SMBIOS_TABLE_TYPE4, EnabledCoreCount2), 0  },
   { 0x04, OFFSET_OF (SMBIOS_TABLE_TYPE4, ThreadCount2),  FIELD_SIZE_OF 
(SMBIOS_TABLE_TYPE4, ThreadCount2),  0  },
   { 0x04, OFFSET_OF (SMBIOS_TABLE_TYPE4, Voltage),   FIELD_SIZE_OF 
(SMBIOS_TABLE_TYPE4, Voltage),   0  },
+  { 0x04, OFFSET_OF (SMBIOS_TABLE_TYPE4, CurrentSpeed),  FIELD_SIZE_OF 
(SMBIOS_TABLE_TYPE4, CurrentSpeed),  0  },
 };
 SMBIOS_FILTER_TABLE  mSmbiosFilterType17BlackList[] = {
   { 0x11, OFFSET_OF (SMBIOS_TABLE_TYPE17, SerialNumber), FIELD_SIZE_OF 
(SMBIOS_TABLE_TYPE17, SerialNumber), SMBIOS_FILTER_TABLE_FLAG_IS_STRING },
-- 
2.31.1.windows.1



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[edk2-devel] [PATCH v1 34/34] BaseTools: Add LoongArch64 binding.

[Chao Li]

Add LoongArch64 ProcessorBin.h and add LoongArch to Makefiles.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
---
 BaseTools/Source/C/GNUmakefile|  3 +
 .../C/Include/LoongArch64/ProcessorBind.h | 80 +++
 2 files changed, 83 insertions(+)
 create mode 100644 BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h

diff --git a/BaseTools/Source/C/GNUmakefile b/BaseTools/Source/C/GNUmakefile
index 8c191e0c38..5275f657ef 100644
--- a/BaseTools/Source/C/GNUmakefile
+++ b/BaseTools/Source/C/GNUmakefile
@@ -29,6 +29,9 @@ ifndef HOST_ARCH
   ifneq (,$(findstring riscv64,$(uname_m)))
 HOST_ARCH=RISCV64
   endif
+  ifneq (,$(findstring loongarch64,$(uname_m)))
+HOST_ARCH=LOONGARCH64
+  endif
   ifndef HOST_ARCH
 $(info Could not detected HOST_ARCH from uname results)
 $(error HOST_ARCH is not defined!)
diff --git a/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h 
b/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h
new file mode 100644
index 00..0267859dee
--- /dev/null
+++ b/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h
@@ -0,0 +1,80 @@
+/** @file
+  Processor or Compiler specific defines and types for LoongArch
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef PROCESSOR_BIND_H_
+#define PROCESSOR_BIND_H_
+
+//
+// Define the processor type so other code can make processor based choices
+//
+#define MDE_CPU_LOONGARCH64
+
+#define EFIAPI
+
+//
+// Make sure we are using the correct packing rules per EFI specification
+//
+#ifndef __GNUC__
+#pragma pack()
+#endif
+
+//
+// Use ANSI C 2000 stdint.h integer width declarations
+//
+#include 
+typedef uint8_t   BOOLEAN;
+typedef int8_tINT8;
+typedef uint8_t   UINT8;
+typedef int16_t   INT16;
+typedef uint16_t  UINT16;
+typedef int32_t   INT32;
+typedef uint32_t  UINT32;
+typedef int64_t   INT64;
+typedef uint64_t  UINT64;
+typedef char  CHAR8;
+typedef uint16_t  CHAR16;
+
+//
+// Unsigned value of native width.  (4 bytes on supported 32-bit processor 
instructions,
+// 8 bytes on supported 64-bit processor instructions)
+//
+typedef UINT64 UINTN;
+
+//
+// Signed value of native width.  (4 bytes on supported 32-bit processor 
instructions,
+// 8 bytes on supported 64-bit processor instructions)
+//
+typedef INT64 INTN;
+
+//
+// Processor specific defines
+//
+
+//
+// A value of native width with the highest bit set.
+//
+#define MAX_BIT  0x8000ULL
+//
+// A value of native width with the two highest bits set.
+//
+#define MAX_2_BITS  0xC000ULL
+
+#if defined (__GNUC__)
+//
+// For GNU assembly code, .global or .globl can declare global symbols.
+// Define this macro to unify the usage.
+//
+#define ASM_GLOBAL  .globl
+#endif
+
+//
+// The stack alignment required for LoongArch
+//
+#define CPU_STACK_ALIGNMENT  16
+
+#endif
-- 
2.27.0



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[edk2-devel] [PATCH v1 33/34] NetworkPkg: Add LoongArch64 architecture.

[Chao Li]

Add LoongArch64 architecture in to NetworkPkg.

Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Cc: Siyuan Fu 

Signed-off-by: Chao Li 
---
 NetworkPkg/Network.dsc.inc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/NetworkPkg/Network.dsc.inc b/NetworkPkg/Network.dsc.inc
index 99fad885bf..04b515a0bb 100644
--- a/NetworkPkg/Network.dsc.inc
+++ b/NetworkPkg/Network.dsc.inc
@@ -9,6 +9,7 @@
 #
 # Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -38,7 +39,7 @@
 !include NetworkPkg/NetworkComponents.dsc.inc
 
 !else
-[Components.IA32, Components.X64, Components.ARM, Components.AARCH64, 
Components.RISCV64]
+[Components.IA32, Components.X64, Components.ARM, Components.AARCH64, 
Components.RISCV64, Components.LOONGARCH64]
 !include NetworkPkg/NetworkComponents.dsc.inc
 
 !endif
-- 
2.27.0



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[edk2-devel] [PATCH v1 32/34] MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation.

[Chao Li]

Implement LoongArch DxeIPL instance.

Cc: Liming Gao 
Cc: Guomin Jiang 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
---
 MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf   |  6 +-
 .../Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c | 63 +++
 2 files changed, 68 insertions(+), 1 deletion(-)
 create mode 100644 MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c

diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf 
b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
index 19b8a4c8ae..052ea0ec1a 100644
--- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
@@ -8,6 +8,7 @@
 #  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -26,7 +27,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC (EBC is for build only) 
AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC (EBC is for build only) 
AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
@@ -53,6 +54,9 @@
 [Sources.RISCV64]
   RiscV64/DxeLoadFunc.c
 
+[Sources.LOONGARCH64]
+  LoongArch64/DxeLoadFunc.c
+
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
diff --git a/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c 
b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
new file mode 100644
index 00..95d3af19ea
--- /dev/null
+++ b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
@@ -0,0 +1,63 @@
+/** @file
+  LoongArch specifc functionality for DxeLoad.
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "DxeIpl.h"
+
+/**
+   Transfers control to DxeCore.
+
+   This function performs a CPU architecture specific operations to execute
+   the entry point of DxeCore with the parameters of HobList.
+   It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
+
+   @param[in] DxeCoreEntryPoint The entry point of DxeCore.
+   @param[in] HobList   The start of HobList passed to DxeCore.
+
+**/
+VOID
+HandOffToDxeCore (
+  IN EFI_PHYSICAL_ADDRESS  DxeCoreEntryPoint,
+  IN EFI_PEI_HOB_POINTERS  HobList
+  )
+{
+  VOID*BaseOfStack;
+  VOID*TopOfStack;
+  EFI_STATUS  Status;
+
+  //
+  // Allocate 128KB for the Stack
+  //
+  BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
+  ASSERT (BaseOfStack != NULL);
+
+  //
+  // Compute the top of the stack we were allocated. Pre-allocate a UINTN
+  // for safety.
+  //
+  TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * 
EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
+  TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
+
+  //
+  // End of PEI phase signal
+  //
+  Status = PeiServicesInstallPpi ();
+  ASSERT_EFI_ERROR (Status);
+
+  //
+  // Update the contents of BSP stack HOB to reflect the real stack info 
passed to DxeCore.
+  //
+  UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);
+
+  SwitchStack (
+(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
+HobList.Raw,
+NULL,
+TopOfStack
+);
+}
-- 
2.27.0



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[edk2-devel] [PATCH v1 31/34] MdeModulePkg/CapsuleRuntimeDxe: Add LoongArch64 architecture.

[Chao Li]

Add LoongArch in INF for building CapsuleRuntimeDxe LoongArch64 image.

Cc: Liming Gao 
Cc: Guomin Jiang 

Sigend-off-by: Chao Li 
---
 .../Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf| 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf 
b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
index 8bf5035a69..601eada170 100644
--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
@@ -6,6 +6,7 @@
 #
 #  Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -22,20 +23,20 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
   CapsuleService.c
   CapsuleService.h
 
-[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64]
+[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64, 
Sources.LOONGARCH64]
   SaveLongModeContext.c
 
-[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64, Sources.RISCV64]
+[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64, Sources.RISCV64, 
Sources.LOONGARCH64]
   CapsuleCache.c
 
-[Sources.Ia32, Sources.X64, Sources.EBC, Sources.RISCV64]
+[Sources.Ia32, Sources.X64, Sources.EBC, Sources.RISCV64, Sources.LOONGARCH64]
   CapsuleReset.c
 
 [Sources.ARM, Sources.AARCH64]
-- 
2.27.0



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[edk2-devel] [PATCH v1 30/34] MdeModulePkg/Logo: Add LoongArch64 architecture.

[Chao Li]

Add LoongArch64 architecture to the Logo.

Cc: Zhichao Gao 
Cc: Ray Ni 

Signed-off-by: Chao Li 
---
 MdeModulePkg/Logo/Logo.inf | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Logo/Logo.inf b/MdeModulePkg/Logo/Logo.inf
index 70a66cae98..294482ccdc 100644
--- a/MdeModulePkg/Logo/Logo.inf
+++ b/MdeModulePkg/Logo/Logo.inf
@@ -3,6 +3,7 @@
 #
 #  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -21,7 +22,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Binaries]
-- 
2.27.0



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[edk2-devel] [PATCH v1 29/34] MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for BaseSafeIntLib.

[Chao Li]

Add LoongArch64 architecture for BaseSafeIntLib library.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
---
 MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf 
b/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
index 40017ec88b..9d039f2e5b 100644
--- a/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
+++ b/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
@@ -4,9 +4,10 @@
 # This library provides helper functions to prevent integer overflow during
 # type conversion, addition, subtraction, and multiplication.
 #
-#  Copyright (c) 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2018, Intel Corporation. All rights reserved.
 # Copyright (c) 2017, Microsoft Corporation
-#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 
 #
 # All rights reserved.
@@ -25,7 +26,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
@@ -34,7 +35,7 @@
 [Sources.Ia32, Sources.ARM]
   SafeIntLib32.c
 
-[Sources.X64, Sources.AARCH64, Sources.RISCV64]
+[Sources.X64, Sources.AARCH64, Sources.RISCV64, Sources.LOONGARCH64]
   SafeIntLib64.c
 
 [Sources.EBC]
-- 
2.27.0



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[edk2-devel] [PATCH v1 28/34] MdePkg/BaseSynchronizationLib: LoongArch cache related code.

[Chao Li]

Support LoongArch cache related functions.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
---
 .../BaseSynchronizationLib.inf|   5 +
 .../LoongArch64/Synchronization.c | 246 ++
 2 files changed, 251 insertions(+)
 create mode 100644 
MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c

diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf 
b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
index 02ba12961a..10021f3352 100755
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -4,6 +4,7 @@
 #  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -82,6 +83,10 @@
   Synchronization.c
   RiscV64/Synchronization.S
 
+[Sources.LOONGARCH64]
+  Synchronization.c
+  LoongArch64/Synchronization.c
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git 
a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c 
b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
new file mode 100644
index 00..b7789f3212
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
@@ -0,0 +1,246 @@
+/** @file
+  LoongArch synchronization functions.
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
+/**
+  Performs an atomic compare exchange operation on a 16-bit
+  unsigned integer.
+
+  Performs an atomic compare exchange operation on the 16-bit
+  unsigned integer specified by Value.  If Value is equal to
+  CompareValue, then Value is set to ExchangeValue and
+  CompareValue is returned.  If Value is not equal to
+  CompareValue, then Value is returned. The compare exchange
+  operation must be performed using MP safe mechanisms.
+
+  @param[in]  Value A pointer to the 16-bit value for the
+compare exchange operation.
+  @param[in]  CompareValue  16-bit value used in compare operation.
+  @param[in]  ExchangeValue 16-bit value used in exchange operation.
+
+  @return The original *Value before exchange.
+
+**/
+UINT16
+EFIAPI
+InternalSyncCompareExchange16 (
+  IN  volatile UINT16  *Value,
+  IN  UINT16   CompareValue,
+  IN  UINT16   ExchangeValue
+  )
+{
+  UINT32   RetValue;
+  UINT32   Temp;
+  UINT32   Shift;
+  UINT64   Mask;
+  UINT64   LocalCompareValue;
+  UINT64   LocalExchangeValue;
+  volatile UINT32  *Ptr32;
+
+  /* Check that ptr is naturally aligned */
+  ASSERT (!((UINT64)Value & (sizeof (Value) - 1)));
+
+  /* Mask inputs to the correct size. */
+  Mask   = (((~0UL) - (1UL << (0)) + 1) & (~0UL >> (64 - 1 - 
((sizeof (UINT16) * 8) - 1;
+  LocalCompareValue  = ((UINT64)CompareValue) & Mask;
+  LocalExchangeValue = ((UINT64)ExchangeValue) & Mask;
+
+  /*
+   * Calculate a shift & mask that correspond to the value we wish to
+   * compare & exchange within the naturally aligned 4 byte integer
+   * that includes it.
+   */
+  Shift= (UINT64)Value & 0x3;
+  Shift   *= 8; /* BITS_PER_BYTE */
+  LocalCompareValue  <<= Shift;
+  LocalExchangeValue <<= Shift;
+  Mask   <<= Shift;
+
+  /*
+   * Calculate a pointer to the naturally aligned 4 byte integer that
+   * includes our byte of interest, and load its value.
+   */
+  Ptr32 = (UINT32 *)((UINT64)Value & ~0x3);
+
+  __asm__ __volatile__ (
+"1:   \n"
+"ll.w  %0, %3 \n"
+"and   %1, %0, %4 \n"
+"bne   %1, %5, 2f \n"
+"andn  %1, %0, %4 \n"
+"or%1, %1, %6 \n"
+"sc.w  %1, %2 \n"
+"beqz  %1, 1b \n"
+"b 3f \n"
+"2:   \n"
+"dbar  0  \n"
+"3:   \n"
+: "=" (RetValue), "=" (Temp), "=" "ZC" (*Ptr32)
+: "ZC" (*Ptr32), "Jr" (Mask), "Jr" (LocalCompareValue), "Jr" 
(LocalExchangeValue)
+: "memory"
+  );
+
+  return (RetValue & Mask) >> Shift;
+}
+
+/**
+  Performs an atomic compare exchange operation on a 32-bit
+  unsigned integer.
+
+  Performs an atomic compare exchange operation on the 32-bit
+  unsigned integer specified by Value.  If Value is equal to
+  CompareValue, then Value is set to ExchangeValue and
+  CompareValue is returned.  If Value is not equal to
+  CompareValue, then Value is returned. The compare exchange
+  operation must be performed using MP safe mechanisms.
+
+  @param[in]  Value A pointer to the 32-bit value for the
+

[edk2-devel] [PATCH v1 27/34] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.

[Chao Li]

Implement LoongArch CPU related functions in BaseCpuLib.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
---
 MdePkg/Library/BaseCpuLib/BaseCpuLib.inf  |  7 ++-
 MdePkg/Library/BaseCpuLib/BaseCpuLib.uni  |  5 +++--
 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15 +++
 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S| 15 +++
 4 files changed, 39 insertions(+), 3 deletions(-)
 create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
 create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S

diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf 
b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index c4cd29a783..6b230f6e6d 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -8,6 +8,7 @@
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -25,7 +26,7 @@
 
 
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources.IA32]
@@ -61,6 +62,10 @@
 [Sources.RISCV64]
   RiscV/Cpu.S
 
+[Sources.LOONGARCH64]
+  LoongArch/CpuFlushTlb.S | GCC
+  LoongArch/CpuSleep.S| GCC
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni 
b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
index 80dc495786..7c5c8dfb37 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
@@ -1,13 +1,14 @@
 // /** @file
 // Instance of CPU Library for various architecture.
 //
-// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
+// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and 
LoongArch64,
 // PAL CALLs for IPF, and empty functions for EBC.
 //
 // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
 // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
@@ -16,5 +17,5 @@
 
 #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU 
Library for various architectures"
 
-#string STR_MODULE_DESCRIPTION  #language en-US "CPU Library 
implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, 
and empty functions for EBC."
+#string STR_MODULE_DESCRIPTION  #language en-US "CPU Library 
implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, PAL 
CALLs for IPF, and empty functions for EBC."
 
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S 
b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
new file mode 100644
index 00..8b792f0a37
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
@@ -0,0 +1,15 @@
+#--
+#
+# CpuFlushTlb() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+ASM_GLOBAL ASM_PFX(CpuFlushTlb)
+
+ASM_PFX(CpuFlushTlb):
+  tlbflush
+  jirl $zero, $ra, 0
+  .end
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S 
b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
new file mode 100644
index 00..eb31b10714
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
@@ -0,0 +1,15 @@
+#--
+#
+# CpuSleep() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+ASM_GLOBAL ASM_PFX(CpuSleep)
+
+ASM_PFX(CpuSleep):
+  idle 0
+  jirl $zero, $ra, 0
+  .end
-- 
2.27.0



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[edk2-devel] [PATCH v1 26/34] MdePkg/BasePeCoff: Add LoongArch PE/Coff related code.

[Chao Li]

Add LoongArch image relocation.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
---
 MdePkg/Library/BasePeCoffLib/BasePeCoff.c |   3 +-
 .../Library/BasePeCoffLib/BasePeCoffLib.inf   |   5 +
 .../Library/BasePeCoffLib/BasePeCoffLib.uni   |   2 +
 .../BasePeCoffLib/LoongArch/PeCoffLoaderEx.c  | 137 ++
 4 files changed, 146 insertions(+), 1 deletion(-)
 create mode 100644 MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c

diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c 
b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c
index 6d8d9faeb8..97a8aaf8c7 100644
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c
@@ -1,6 +1,6 @@
 /** @file
   Base PE/COFF loader supports loading any PE32/PE32+ or TE image, but
-  only supports relocating IA32, x64, IPF, ARM, RISC-V and EBC images.
+  only supports relocating IA32, x64, IPF, ARM, RISC-V, LoongArch and EBC 
images.
 
   Caution: This file requires additional review when modified.
   This library will have external input - PE/COFF image.
@@ -18,6 +18,7 @@
   Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
   Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+  Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf 
b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
index 110b6d5a09..3b8b8eb191 100644
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
@@ -4,6 +4,7 @@
 #  The IA32 version library support loading IA32, X64 and EBC PE/COFF images.
 #  The X64 version library support loading IA32, X64 and EBC PE/COFF images.
 #  The RISC-V version library support loading RISC-V images.
+#  The LoongArch version library support loading LoongArch images.
 #
 #  Caution: This module requires additional review when modified.
 #  This library will have external input - PE/COFF image.
@@ -13,6 +14,7 @@
 #  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+#  Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -46,6 +48,9 @@
 [Sources.RISCV64]
   RiscV/PeCoffLoaderEx.c
 
+[Sources.LOONGARCH64]
+  LoongArch/PeCoffLoaderEx.c
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni 
b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni
index 55417029f2..1f731344e1 100644
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni
@@ -5,6 +5,7 @@
 // The IA32 version library support loading IA32, X64 and EBC PE/COFF images.
 // The X64 version library support loading IA32, X64 and EBC PE/COFF images.
 // The RISC-V version library support loading RISC-V32 and RISC-V64 PE/COFF 
images.
+// The LoongArch version library support loading LoongArch32 and LoongArch64 
PE/COFF images.
 //
 // Caution: This module requires additional review when modified.
 // This library will have external input - PE/COFF image.
@@ -14,6 +15,7 @@
 // Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
 // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 // Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
diff --git a/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c 
b/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c
new file mode 100644
index 00..417096f334
--- /dev/null
+++ b/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c
@@ -0,0 +1,137 @@
+/** @file
+  PE/Coff loader for LoongArch PE image
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "BasePeCoffLibInternals.h"
+#include 
+
+/**
+  Performs an LoongArch specific relocation fixup and is a no-op on other
+  instruction sets.
+
+  @param[in]   Reloc   Pointer to the relocation record.
+  @param[in, out]  Fixup   Pointer to the address to fix up.
+  @param[in, out]  FixupData   Pointer to a buffer to log the fixups.
+  @param[in]   Adjust  The offset to adjust the fixup.
+
+  @return Status code.
+
+**/
+RETURN_STATUS
+PeCoffLoaderRelocateImageEx (
+  IN UINT16 *Reloc,
+  IN OUT CHAR8  *Fixup,
+  IN OUT CHAR8  **FixupData,
+  IN UINT64 Adjust

[edk2-devel] [PATCH v1 25/34] MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture.

[Chao Li]

LoongArch MMIO library instance, use the IoLibNoIo.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
---
 .../Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf  | 10 +++---
 MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c  |  3 ++-
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf 
b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
index 27b15d9ae2..aeb072ee95 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -4,13 +4,14 @@
 #  I/O Library that uses compiler intrinsics to perform IN and OUT instructions
 #  for IA-32 and x64.  On IPF, I/O port requests are translated into MMIO 
requests.
 #  MMIO requests are forwarded directly to memory.  For EBC, I/O port requests
-#  ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides non 
I/O
-#  read and write.
+#  ASSERT(). For ARM, AARCH64, RISCV64 and LoongArch, this I/O library only 
provides
+#  non I/O read and write.
 #
 #  Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.
 #  Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+#  Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -27,7 +28,7 @@
 
 
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
@@ -62,6 +63,9 @@
 [Sources.RISCV64]
   IoLibNoIo.c
 
+[Sources.LOONGARCH64]
+  IoLibNoIo.c
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c 
b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
index c71f45b22e..c51e5da39b 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
@@ -1,11 +1,12 @@
 /** @file
   I/O library for non I/O read and write access (memory map I/O read and
-  write only) architecture, such as ARM and RISC-V processor.
+  write only) architecture, such as ARM, RISC-V and LoongArch processor.
 
   Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
   Copyright (c) 2017, AMD Incorporated. All rights reserved.
   Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
-- 
2.27.0



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[edk2-devel] [PATCH v1 24/34] MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance implementation.

[Chao Li]

Implement LoongArch cache maintenance functions in
BaseCacheMaintenanceLib.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
---
 .../BaseCacheMaintenanceLib.inf   |   4 +
 .../BaseCacheMaintenanceLib/LoongArchCache.c  | 252 ++
 2 files changed, 256 insertions(+)
 create mode 100644 MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf 
b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
index 33114243d5..e103705b2c 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
@@ -7,6 +7,7 @@
 #  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -45,6 +46,9 @@
 [Sources.RISCV64]
   RiscVCache.c
 
+[Sources.LOONGARCH64]
+  LoongArchCache.c
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c 
b/MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c
new file mode 100644
index 00..067b5def55
--- /dev/null
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c
@@ -0,0 +1,252 @@
+/** @file
+  Cache Maintenance Functions for LoongArch.
+  LoongArch cache maintenance functions has not yet been completed, and will 
added in later.
+  Functions are null functions now.
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include 
+#include 
+#include 
+
+/**
+  Invalidates the entire instruction cache in cache coherency domain of the
+  calling CPU.
+
+**/
+VOID
+EFIAPI
+InvalidateInstructionCache (
+  VOID
+  )
+{
+  __asm__ __volatile__ (
+ "ibar 0\n"
+ :
+ :
+  );
+}
+
+/**
+  Invalidates a range of instruction cache lines in the cache coherency domain
+  of the calling CPU.
+
+  Invalidates the instruction cache lines specified by Address and Length. If
+  Address is not aligned on a cache line boundary, then entire instruction
+  cache line containing Address is invalidated. If Address + Length is not
+  aligned on a cache line boundary, then the entire instruction cache line
+  containing Address + Length -1 is invalidated. This function may choose to
+  invalidate the entire instruction cache if that is more efficient than
+  invalidating the specified range. If Length is 0, the no instruction cache
+  lines are invalidated. Address is returned.
+
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+  @param[in]  Address The base address of the instruction cache lines to
+  invalidate. If the CPU is in a physical addressing mode, then
+  Address is a physical address. If the CPU is in a virtual
+  addressing mode, then Address is a virtual address.
+
+  @param[in]  Length  The number of bytes to invalidate from the instruction 
cache.
+
+  @return Address.
+
+**/
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+  IN   VOID   *Address,
+  IN   UINTN  Length
+  )
+{
+  __asm__ __volatile__ (
+ "ibar 0\n"
+ :
+ :
+  );
+  return Address;
+}
+
+/**
+  Writes Back and Invalidates the entire data cache in cache coherency domain
+  of the calling CPU.
+
+  Writes Back and Invalidates the entire data cache in cache coherency domain
+  of the calling CPU. This function guarantees that all dirty cache lines are
+  written back to system memory, and also invalidates all the data cache lines
+  in the cache coherency domain of the calling CPU.
+
+**/
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+  VOID
+  )
+{
+  DEBUG ((DEBUG_ERROR, "%a: Not currently implemented on LoongArch.\n", 
__FUNCTION__));
+}
+
+/**
+  Writes Back and Invalidates a range of data cache lines in the cache
+  coherency domain of the calling CPU.
+
+  Writes Back and Invalidate the data cache lines specified by Address and
+  Length. If Address is not aligned on a cache line boundary, then entire data
+  cache line containing Address is written back and invalidated. If Address +
+  Length is not aligned on a cache line boundary, then the entire data cache
+  line containing Address + Length -1 is written back and invalidated. This
+  function may choose to write back and invalidate the entire data cache if
+  that is more efficient than writing back and invalidating the specified
+  range. If Length is 0, the no data cache lines are written back and
+  invalidated. Address is returned.
+
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+ 

[edk2-devel] [PATCH v1 23/34] MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.

[Chao Li]

Add LoongArch LOONGARCH64 BaseLib functions.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
---
 MdePkg/Include/Library/BaseLib.h  |  24 ++
 MdePkg/Library/BaseLib/BaseLib.inf|  13 +
 .../BaseLib/LoongArch64/CpuBreakpoint.S   |  24 ++
 MdePkg/Library/BaseLib/LoongArch64/CpuPause.S |  31 +++
 .../BaseLib/LoongArch64/DisableInterrupts.S   |  21 ++
 .../BaseLib/LoongArch64/EnableInterrupts.S|  21 ++
 .../BaseLib/LoongArch64/GetInterruptState.S   |  35 +++
 .../BaseLib/LoongArch64/InternalSwitchStack.c |  58 +
 .../Library/BaseLib/LoongArch64/MemoryFence.S |  19 ++
 .../BaseLib/LoongArch64/SetJumpLongJump.S |  49 
 .../Library/BaseLib/LoongArch64/SwitchStack.S |  39 +++
 .../Library/BaseLib/LoongArch64/Unaligned.c   | 242 ++
 12 files changed, 576 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/CpuPause.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/GetInterruptState.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/InternalSwitchStack.c
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/MemoryFence.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/SetJumpLongJump.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/SwitchStack.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/Unaligned.c

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index a6f9a194ef..f3f59f21c2 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -6,6 +6,7 @@ Copyright (c) 2006 - 2021, Intel Corporation. All rights 
reserved.
 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 Copyright (c) Microsoft Corporation.
 Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -152,6 +153,29 @@ typedef struct {
 
 #endif // defined (MDE_CPU_RISCV64)
 
+#if defined (MDE_CPU_LOONGARCH64)
+///
+/// The LoongArch architecture context buffer used by SetJump() and LongJump()
+///
+typedef struct {
+  UINT64S0;
+  UINT64S1;
+  UINT64S2;
+  UINT64S3;
+  UINT64S4;
+  UINT64S5;
+  UINT64S6;
+  UINT64S7;
+  UINT64S8;
+  UINT64SP;
+  UINT64FP;
+  UINT64RA;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT  8
+
+#endif // defined (MDE_CPU_LOONGARCH64)
+
 //
 // String Services
 //
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index 6be5be9428..86de3ae7cd 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -402,6 +402,19 @@
   RiscV64/RiscVInterrupt.S  | GCC
   RiscV64/FlushCache.S  | GCC
 
+[Sources.LOONGARCH64]
+  Math64.c
+  LoongArch64/Unaligned.c
+  LoongArch64/InternalSwitchStack.c
+  LoongArch64/GetInterruptState.S   | GCC
+  LoongArch64/EnableInterrupts.S| GCC
+  LoongArch64/DisableInterrupts.S   | GCC
+  LoongArch64/MemoryFence.S | GCC
+  LoongArch64/CpuBreakpoint.S   | GCC
+  LoongArch64/CpuPause.S| GCC
+  LoongArch64/SetJumpLongJump.S | GCC
+  LoongArch64/SwitchStack.S | GCC
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S 
b/MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S
new file mode 100644
index 00..4e022e9bb5
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S
@@ -0,0 +1,24 @@
+#--
+#
+# CpuBreakpoint for LoongArch
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+ASM_GLOBAL ASM_PFX(CpuBreakpoint)
+
+#/**
+#  Generates a breakpoint on the CPU.
+#
+#  Generates a breakpoint on the CPU. The breakpoint must be implemented such
+#  that code can resume normal execution after the breakpoint.
+#
+#**/
+
+ASM_PFX(CpuBreakpoint):
+  break 3
+  jirl  $zero, $ra, 0
+  .end
diff --git a/MdePkg/Library/BaseLib/LoongArch64/CpuPause.S 
b/MdePkg/Library/BaseLib/LoongArch64/CpuPause.S
new file mode 100644
index 00..e9140e8742
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LoongArch64/CpuPause.S
@@ -0,0 +1,31 @@
+#--
+#
+# CpuPause for LoongArch
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent

[edk2-devel] [PATCH v1 22/34] MdePkg/Include: LoongArch definitions.

[Chao Li]

Add LoongArch processor related definitions.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
---
 MdePkg/Include/IndustryStandard/PeImage.h |   9 ++
 MdePkg/Include/Protocol/DebugSupport.h| 107 --
 MdePkg/Include/Protocol/PxeBaseCode.h |   3 +
 MdePkg/Include/Uefi/UefiBaseType.h|  14 +++
 MdePkg/Include/Uefi/UefiSpec.h|  16 ++--
 5 files changed, 136 insertions(+), 13 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/PeImage.h 
b/MdePkg/Include/IndustryStandard/PeImage.h
index 3109dc20f8..dd4cc25483 100644
--- a/MdePkg/Include/IndustryStandard/PeImage.h
+++ b/MdePkg/Include/IndustryStandard/PeImage.h
@@ -10,6 +10,7 @@
 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. 
All rights reserved.
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -38,6 +39,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define IMAGE_FILE_MACHINE_RISCV32 0x5032
 #define IMAGE_FILE_MACHINE_RISCV64 0x5064
 #define IMAGE_FILE_MACHINE_RISCV1280x5128
+#define IMAGE_FILE_MACHINE_LOONGARCH32 0x6232
+#define IMAGE_FILE_MACHINE_LOONGARCH64 0x6264
 
 //
 // EXE file formats
@@ -503,6 +506,12 @@ typedef struct {
 #define EFI_IMAGE_REL_BASED_RISCV_LOW12I  7
 #define EFI_IMAGE_REL_BASED_RISCV_LOW12S  8
 
+//
+// Relocation types of LoongArch processor.
+//
+#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA  8
+#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA  8
+
 ///
 /// Line number format.
 ///
diff --git a/MdePkg/Include/Protocol/DebugSupport.h 
b/MdePkg/Include/Protocol/DebugSupport.h
index ec5b92a5c5..2b0ae2d157 100644
--- a/MdePkg/Include/Protocol/DebugSupport.h
+++ b/MdePkg/Include/Protocol/DebugSupport.h
@@ -654,17 +654,110 @@ typedef struct {
   UINT64X31;
 } EFI_SYSTEM_CONTEXT_RISCV64;
 
+//
+// LoongArch processor exception types.
+//
+#define EXCEPT_LOONGARCH_INT   0
+#define EXCEPT_LOONGARCH_PIL   1
+#define EXCEPT_LOONGARCH_PIS   2
+#define EXCEPT_LOONGARCH_PIF   3
+#define EXCEPT_LOONGARCH_PME   4
+#define EXCEPT_LOONGARCH_PNR   5
+#define EXCEPT_LOONGARCH_PNX   6
+#define EXCEPT_LOONGARCH_PPI   7
+#define EXCEPT_LOONGARCH_ADE   8
+#define EXCEPT_LOONGARCH_ALE   9
+#define EXCEPT_LOONGARCH_BCE   10
+#define EXCEPT_LOONGARCH_SYS   11
+#define EXCEPT_LOONGARCH_BRK   12
+#define EXCEPT_LOONGARCH_INE   13
+#define EXCEPT_LOONGARCH_IPE   14
+#define EXCEPT_LOONGARCH_FPD   15
+#define EXCEPT_LOONGARCH_SXD   16
+#define EXCEPT_LOONGARCH_ASXD  17
+#define EXCEPT_LOONGARCH_FPE   18
+#define EXCEPT_LOONGARCH_TBR   64 // For code only, there is no such type in 
the ISA spec, the TLB refill is defined for an independent exception.
+
+//
+// LoongArch processor Interrupt types.
+//
+#define EXCEPT_LOONGARCH_INT_SIP0   0
+#define EXCEPT_LOONGARCH_INT_SIP1   1
+#define EXCEPT_LOONGARCH_INT_IP02
+#define EXCEPT_LOONGARCH_INT_IP13
+#define EXCEPT_LOONGARCH_INT_IP24
+#define EXCEPT_LOONGARCH_INT_IP35
+#define EXCEPT_LOONGARCH_INT_IP46
+#define EXCEPT_LOONGARCH_INT_IP57
+#define EXCEPT_LOONGARCH_INT_IP68
+#define EXCEPT_LOONGARCH_INT_IP79
+#define EXCEPT_LOONGARCH_INT_PMC10
+#define EXCEPT_LOONGARCH_INT_TIMER  11
+#define EXCEPT_LOONGARCH_INT_IPI12
+
+//
+// For coding convenience, define the maximum valid
+// LoongArch interrupt.
+//
+#define MAX_LOONGARCH_INTERRUPT  14
+
+typedef struct {
+  UINT64R0;
+  UINT64R1;
+  UINT64R2;
+  UINT64R3;
+  UINT64R4;
+  UINT64R5;
+  UINT64R6;
+  UINT64R7;
+  UINT64R8;
+  UINT64R9;
+  UINT64R10;
+  UINT64R11;
+  UINT64R12;
+  UINT64R13;
+  UINT64R14;
+  UINT64R15;
+  UINT64R16;
+  UINT64R17;
+  UINT64R18;
+  UINT64R19;
+  UINT64R20;
+  UINT64R21;
+  UINT64R22;
+  UINT64R23;
+  UINT64R24;
+  UINT64R25;
+  UINT64R26;
+  UINT64R27;
+  UINT64R28;
+  UINT64R29;
+  UINT64R30;
+  UINT64R31;
+
+  UINT64CRMD;  // CuRrent MoDe information
+  UINT64PRMD;  // PRe-exception MoDe information
+  UINT64EUEN;  // Extended component Unit ENable
+  UINT64MISC;  // MISCellaneous controller
+  UINT64ECFG;  // Exception ConFiGuration
+  UINT64ESTAT; // Exception STATus
+  UINT64ERA;   // Exception Return Address
+  UINT64BADV;  // BAD Virtual address
+  UINT64BADI;  // BAD Instruction
+} EFI_SYSTEM_CONTEXT_LOONGARCH64;
+
 ///
 /// Universal EFI_SYSTEM_CONTEXT definition.
 ///
 typedef union {
-  EFI_SYSTEM_CONTEXT_EBC*SystemContextEbc;
-  EFI_SYSTEM_CONTEXT_IA32   *SystemContextIa32;
-  EFI_SYSTEM_CONTEXT_X64*SystemContextX64;
-  EFI_SYSTEM_CONTEXT_IPF*SystemContextIpf;
-  EFI_SYSTEM_CONTEXT_ARM*SystemContextArm;

[edk2-devel] [PATCH v1 21/34] MdePkg: Add LoongArch LOONGARCH64 binding

[Chao Li]

Add LOONGARCH64 sections in MdePkg.dec and LOONGARCH64 ProcessorBind.h

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Dongyan Qian 
---
 MdePkg/Include/LoongArch64/ProcessorBind.h | 120 +
 MdePkg/MdePkg.dec  |   4 +
 MdePkg/MdePkg.dsc  |   3 +-
 3 files changed, 126 insertions(+), 1 deletion(-)
 create mode 100644 MdePkg/Include/LoongArch64/ProcessorBind.h

diff --git a/MdePkg/Include/LoongArch64/ProcessorBind.h 
b/MdePkg/Include/LoongArch64/ProcessorBind.h
new file mode 100644
index 00..502d479099
--- /dev/null
+++ b/MdePkg/Include/LoongArch64/ProcessorBind.h
@@ -0,0 +1,120 @@
+/** @file
+  Processor or Compiler specific defines and types for LoongArch
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef PROCESSOR_BIND_H_
+#define PROCESSOR_BIND_H_
+
+//
+// Define the processor type so other code can make processor based choices
+//
+#define MDE_CPU_LOONGARCH64
+
+#define EFIAPI
+
+//
+// Make sure we are using the correct packing rules per EFI specification
+//
+#ifndef __GNUC__
+  #pragma pack()
+#endif
+
+//
+// Assume standard LoongArch 64-bit alignment.
+// Need to check portability of long long
+//
+typedef unsigned long   UINT64;
+typedef longINT64;
+typedef unsigned intUINT32;
+typedef int INT32;
+typedef unsigned short  UINT16;
+typedef unsigned short  CHAR16;
+typedef short   INT16;
+typedef unsigned char   BOOLEAN;
+typedef unsigned char   UINT8;
+typedef charCHAR8;
+typedef charINT8;
+
+//
+// Unsigned value of native width.  (4 bytes on supported 32-bit processor 
instructions,
+// 8 bytes on supported 64-bit processor instructions)
+//
+
+typedef UINT64 UINTN;
+
+//
+// Signed value of native width.  (4 bytes on supported 32-bit processor 
instructions,
+// 8 bytes on supported 64-bit processor instructions)
+//
+typedef INT64 INTN;
+
+//
+// Processor specific defines
+//
+
+//
+// A value of native width with the highest bit set.
+//
+#define MAX_BIT  0x8000ULL
+//
+// A value of native width with the two highest bits set.
+//
+#define MAX_2_BITS  0xC000ULL
+
+//
+// Maximum legal LoongArch 64-bit address
+//
+#define MAX_ADDRESS  0xULL
+
+//
+// Maximum usable address at boot time (48 bits using 4KB pages)
+//
+#define MAX_ALLOC_ADDRESS  0xULL
+
+//
+// Maximum legal LoongArch  64-bit INTN and UINTN values.
+//
+#define MAX_INTN   ((INTN)0x7FFFULL)
+#define MAX_UINTN  ((UINTN)0xULL)
+
+//
+// Page allocation granularity for LoongArch
+//
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY  (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY  (0x1)
+
+#if defined (__GNUC__)
+//
+// For GNU assembly code, .global or .globl can declare global symbols.
+// Define this macro to unify the usage.
+//
+#define ASM_GLOBAL  .globl
+#endif
+
+//
+// The stack alignment required for LoongArch
+//
+#define CPU_STACK_ALIGNMENT  16
+
+/**
+  Return the pointer to the first instruction of a function given a function 
pointer.
+  On LOONGARCH CPU architectures, these two pointer values are the same,
+  so the implementation of this macro is very simple.
+
+  @param  FunctionPointer   A pointer to a function.
+
+  @return The pointer to the first instruction of a function given a function 
pointer.
+
+**/
+#define FUNCTION_ENTRY_POINT(FunctionPointer)  (VOID *)(UINTN)(FunctionPointer)
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__
+#endif
+
+#endif
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index f1ebf9e251..4c81cbd75a 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -7,6 +7,7 @@
 # Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
 # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 # (C) Copyright 2016 - 2021 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -43,6 +44,9 @@
 [Includes.RISCV64]
   Include/RiscV64
 
+[Includes.LOONGARCH64]
+  Include/LoongArch64
+
 [LibraryClasses]
   ##  @libraryclass  Provides most usb APIs to support the Hid requests 
defined in Usb Hid 1.1 spec
   #  and the standard requests defined in Usb 1.1 spec.
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index cc1ac196a9..493a13ec91 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -4,6 +4,7 @@
 # Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
 # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 # (C) Copyright 2020 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #

[edk2-devel] [PATCH v1 20/34] .pytool: Add LoongArch64 architecture on LoongArch64 EDK2 CI.

[Chao Li]

Add LoongArch64 architecture on LoongArch64 EDK2 CI testing.

Cc: Michael D Kinney 
Cc: Liming Gao 

Signed-off-by: Chao Li 
---
 .pytool/CISettings.py | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index cf9e0d77b1..7ebec0ba0a 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -79,7 +79,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
 "X64",
 "ARM",
 "AARCH64",
-"RISCV64")
+"RISCV64",
+"LOONGARCH64")
 
 def GetTargetsSupported(self):
 ''' return iterable of edk2 target tags supported by this build '''
@@ -170,6 +171,8 @@ class Settings(CiBuildSettingsManager, 
UpdateSettingsManager, SetupSettingsManag
 scopes += ("gcc_arm_linux",)
 if "RISCV64" in self.ActualArchitectures:
 scopes += ("gcc_riscv64_unknown",)
+if "LOONGARCH64" in self.ActualArchitectures:
+scopes += ("gcc_loongarch64_unknown_linux",)
 self.ActualScopes = scopes
 return self.ActualScopes
 
-- 
2.27.0



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[edk2-devel] [PATCH v1 19/34] .azurepipelines: Add LoongArch64 architecture on LoongArch64 EDK2 CI.

[Chao Li]

Add LoongArch64 architecture on LoongArch64 EDK2 CI.

Cc: Michael D Kinney 
Cc: Liming Gao 

Signed-off-by: Chao Li 
---
 .azurepipelines/Ubuntu-GCC5.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.azurepipelines/Ubuntu-GCC5.yml b/.azurepipelines/Ubuntu-GCC5.yml
index 3760c6efe1..1acd8d2a46 100644
--- a/.azurepipelines/Ubuntu-GCC5.yml
+++ b/.azurepipelines/Ubuntu-GCC5.yml
@@ -3,6 +3,7 @@
 #
 # Copyright (c) Microsoft Corporation.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 ##
 trigger:
@@ -17,5 +18,5 @@ jobs:
   parameters:
 tool_chain_tag: 'GCC5'
 vm_image: 'ubuntu-latest'
-arch_list: "IA32,X64,ARM,AARCH64,RISCV64"
+arch_list: "IA32,X64,ARM,AARCH64,RISCV64,LOONGARCH64"
 
-- 
2.27.0



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[edk2-devel] [PATCH v1 18/34] BaseTools: Enable LoongArch64 architecture for LoongArch64 EDK2 CI.

[Chao Li]

EDK CI for LoongArch64 architecture

Enable LoongArch64 architecture for LoongArch64 EDK2 CI testing.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 
---
 ...gcc_loongarch64_unknown_linux_ext_dep.yaml | 22 +
 .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py  | 31 +++
 2 files changed, 53 insertions(+)
 create mode 100644 BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml

diff --git a/BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml 
b/BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml
new file mode 100644
index 00..ac18438080
--- /dev/null
+++ b/BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml
@@ -0,0 +1,22 @@
+## @file
+# Download GCC LoongArch64 compiler from LoongArch GitHub release site
+# Set shell variable GCC5_LOONGARCH64_INSTALL to this folder
+#
+# This is only downloaded when a build activates scope 
gcc_loongarch64_unknown_linux
+#
+# Copyright (c) Microsoft Corporation.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+  "scope": "gcc_loongarch64_unknown_linux",
+  "type": "web",
+  "name": "gcc_loongarch64_unknown_linux",
+  
"source":"https://github.com/loongson/build-tools/releases/download/2022.09.06/loongarch64-clfs-6.3-cross-tools-gcc-full.tar.xz;,
+  "version": "13.0.0",
+  "sha256":"27a43c5bb127794f091d0e75da0003c4d0eec28a958d8f2cc7cd290a6e6133ab",
+  "compression_type": "tar",
+  "internal_path": "/cross-tools/",
+  "flags": ["set_shell_var", ],
+  "var_name": "GCC5_LOONGARCH64_INSTALL"
+}
diff --git a/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py 
b/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
index f0685d8040..dab7a87997 100644
--- a/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
+++ b/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
@@ -5,6 +5,7 @@
 #
 # Copyright (c) Microsoft Corporation
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 ##
 import os
@@ -43,6 +44,12 @@ class LinuxGcc5ToolChain(IUefiBuildPlugin):
 self.Logger.critical("Failed in check riscv64")
 return ret
 
+# Check LoongArch64 compiler
+ret = self._check_loongarch64()
+if ret != 0:
+self.Logger.critical("Failed in check loongarch64")
+return ret
+
 return 0
 
 def _check_arm(self):
@@ -121,3 +128,27 @@ class LinuxGcc5ToolChain(IUefiBuildPlugin):
 shell_environment.GetEnvironment().set_shell_var("LD_LIBRARY_PATH", 
prefix)
 
 return 0
+
+def _check_loongarch64(self):
+# check to see if full path already configured
+if 
shell_environment.GetEnvironment().get_shell_var("GCC5_LOONGARCH64_PREFIX") is 
not None:
+self.Logger.info("GCC5_LOONGARCH64_PREFIX is already set.")
+
+else:
+# now check for install dir.  If set then set the Prefix
+install_path = shell_environment.GetEnvironment(
+).get_shell_var("GCC5_LOONGARCH64_INSTALL")
+if install_path is None:
+return 0
+
+# make GCC5_LOONGARCH64_PREFIX to align with tools_def.txt
+prefix = os.path.join(install_path, "bin", 
"loongarch64-unknown-linux-gnu-")
+
shell_environment.GetEnvironment().set_shell_var("GCC5_LOONGARCH64_PREFIX", 
prefix)
+
+# now confirm it exists
+if not 
os.path.exists(shell_environment.GetEnvironment().get_shell_var("GCC5_LOONGARCH64_PREFIX")
 + "gcc"):
+self.Logger.error(
+"Path for GCC5_LOONGARCH64_PREFIX toolchain is invalid")
+return -2
+
+return 0
-- 
2.27.0



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[edk2-devel] [PATCH v1 17/34] BaseTools: BaseTools changes for LoongArch platform.

[Chao Li]

Python code changes for building EDK2 LoongArch platform.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
---
 BaseTools/Source/Python/Common/DataType.py| 21 ++--
 .../Source/Python/UPT/Library/DataType.py | 24 ++-
 BaseTools/Source/Python/build/buildoptions.py |  3 ++-
 3 files changed, 44 insertions(+), 4 deletions(-)

diff --git a/BaseTools/Source/Python/Common/DataType.py 
b/BaseTools/Source/Python/Common/DataType.py
index dc4962..48dbf16495 100644
--- a/BaseTools/Source/Python/Common/DataType.py
+++ b/BaseTools/Source/Python/Common/DataType.py
@@ -4,6 +4,7 @@
 # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
 # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 # Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 
 ##
@@ -52,10 +53,10 @@ TAB_ARCH_X64 = 'X64'
 TAB_ARCH_ARM = 'ARM'
 TAB_ARCH_EBC = 'EBC'
 TAB_ARCH_AARCH64 = 'AARCH64'
-
 TAB_ARCH_RISCV64 = 'RISCV64'
+TAB_ARCH_LOONGARCH64 = 'LOONGARCH64'
 
-ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC, 
TAB_ARCH_AARCH64, TAB_ARCH_RISCV64, TAB_ARCH_COMMON}
+ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC, 
TAB_ARCH_AARCH64, TAB_ARCH_RISCV64, TAB_ARCH_LOONGARCH64, TAB_ARCH_COMMON}
 
 SUP_MODULE_BASE = 'BASE'
 SUP_MODULE_SEC = 'SEC'
@@ -138,6 +139,7 @@ TAB_SOURCES_X64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_X64
 TAB_SOURCES_ARM = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_SOURCES_EBC = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_SOURCES_AARCH64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_SOURCES_LOONGARCH64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_BINARIES = 'Binaries'
 TAB_BINARIES_COMMON = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_COMMON
@@ -146,6 +148,7 @@ TAB_BINARIES_X64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_X64
 TAB_BINARIES_ARM = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_BINARIES_EBC = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_BINARIES_AARCH64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_BINARIES_LOONGARCH64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_INCLUDES = 'Includes'
 TAB_INCLUDES_COMMON = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_COMMON
@@ -154,6 +157,7 @@ TAB_INCLUDES_X64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_X64
 TAB_INCLUDES_ARM = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_INCLUDES_EBC = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_INCLUDES_AARCH64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_INCLUDES_LOONGARCH64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_GUIDS = 'Guids'
 TAB_GUIDS_COMMON = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON
@@ -162,6 +166,7 @@ TAB_GUIDS_X64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_X64
 TAB_GUIDS_ARM = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM
 TAB_GUIDS_EBC = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC
 TAB_GUIDS_AARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_GUIDS_LOONGARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_PROTOCOLS = 'Protocols'
 TAB_PROTOCOLS_COMMON = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_COMMON
@@ -170,6 +175,7 @@ TAB_PROTOCOLS_X64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_X64
 TAB_PROTOCOLS_ARM = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM
 TAB_PROTOCOLS_EBC = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC
 TAB_PROTOCOLS_AARCH64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_PROTOCOLS_LOONGARCH64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_PPIS = 'Ppis'
 TAB_PPIS_COMMON = TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON
@@ -178,6 +184,7 @@ TAB_PPIS_X64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_X64
 TAB_PPIS_ARM = TAB_PPIS + TAB_SPLIT + TAB_ARCH_ARM
 TAB_PPIS_EBC = TAB_PPIS + TAB_SPLIT + TAB_ARCH_EBC
 TAB_PPIS_AARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_PPIS_LOONGARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_LIBRARY_CLASSES = 'LibraryClasses'
 TAB_LIBRARY_CLASSES_COMMON = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_COMMON
@@ -186,6 +193,7 @@ TAB_LIBRARY_CLASSES_X64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + 
TAB_ARCH_X64
 TAB_LIBRARY_CLASSES_ARM = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_LIBRARY_CLASSES_EBC = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_LIBRARY_CLASSES_AARCH64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + 
TAB_ARCH_AARCH64
+TAB_LIBRARY_CLASSES_LOONGARCH64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + 
TAB_ARCH_LOONGARCH64
 
 TAB_PACKAGES = 'Packages'
 TAB_PACKAGES_COMMON = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_COMMON
@@ -194,6 +202,7 @@ TAB_PACKAGES_X64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_X64
 TAB_PACKAGES_ARM = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_PACKAGES_EBC = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_PACKAGES_AARCH64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_PACKAGES_LOONGARCH64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_PCDS = 

[edk2-devel] [PATCH v1 16/34] BaseTools: BaseTools changes for LoongArch platform.

[Chao Li]

BaseTools define template files changes for building EDK2 LoongArch
platform.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 
Co-authored-by: Dongyan Qian 
Co-authored-by: Baoqi Zhang 
---
 BaseTools/Conf/tools_def.template | 54 +++
 1 file changed, 48 insertions(+), 6 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 5ed19810b7..9ceadeaa59 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -4,6 +4,7 @@
 #  Portions copyright (c) 2011 - 2019, ARM Ltd. All rights reserved.
 #  Copyright (c) 2015, Hewlett-Packard Development Company, L.P.
 #  (C) Copyright 2020, Hewlett Packard Enterprise Development LP
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  Copyright (c) Microsoft Corporation
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -267,7 +268,7 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
 #   Intel(r) ACPI Compiler from
 #   https://acpica.org/downloads
 #   GCC5-Linux,Windows-  Requires:
-# GCC 5 with LTO support, targeting 
x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnueabi or riscv64-linux-gnu
+# GCC 5 with LTO support, targeting 
x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnueabi, riscv64-linux-gnu or 
loongarch64-linux-gnu
 #Optional:
 # Required to build platforms or ACPI tables:
 #   Intel(r) ACPI Compiler from
@@ -1852,6 +1853,7 @@ DEFINE GCC_ALL_CC_FLAGS= -g -Os -fshort-wchar 
-fno-builtin -fno-stri
 DEFINE GCC_IA32_CC_FLAGS   = DEF(GCC_ALL_CC_FLAGS) -m32 -malign-double 
-freorder-blocks -freorder-blocks-and-partition -O2 -mno-stack-arg-probe
 DEFINE GCC_X64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mno-red-zone 
-Wno-address -mno-stack-arg-probe
 DEFINE GCC_ARM_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-mabi=aapcs -fno-short-enums -funsigned-char -ffunction-sections 
-fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft 
-fno-pic -fno-pie
+DEFINE GCC_LOONGARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mabi=lp64d 
-fno-asynchronous-unwind-tables -fno-plt -Wno-address -fno-short-enums 
-fsigned-char -ffunction-sections -fdata-sections
 DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access
 DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-fno-short-enums -fverbose-asm -funsigned-char  -ffunction-sections 
-fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables 
-fno-pic -fno-pie -ffixed-x18
 DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only
@@ -1859,12 +1861,15 @@ DEFINE GCC_DLINK_FLAGS_COMMON  = -nostdlib --pie
 DEFINE GCC_DLINK2_FLAGS_COMMON = 
-Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
 DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
 DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib 
-Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) 
-Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
+DEFINE GCC_LOONGARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib 
-Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) 
-Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
 DEFINE GCC_ARM_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z 
common-page-size=0x20 -Wl,--pic-veneer
 DEFINE GCC_AARCH64_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z 
common-page-size=0x20
+DEFINE GCC_LOONGARCH64_DLINK_FLAGS = DEF(GCC_LOONGARCH64_DLINK_COMMON) -z 
common-page-size=0x20
 DEFINE GCC_ARM_AARCH64_ASLDLINK_FLAGS = -Wl,--defsym=PECOFF_HEADER_SIZE=0 
DEF(GCC_DLINK2_FLAGS_COMMON) -z common-page-size=0x20
 DEFINE GCC_IA32_X64_ASLDLINK_FLAGS = DEF(GCC_IA32_X64_DLINK_COMMON) --entry 
_ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT)
 DEFINE GCC_ARM_ASLDLINK_FLAGS  = DEF(GCC_ARM_DLINK_FLAGS) 
-Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) 
DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS)
 DEFINE GCC_AARCH64_ASLDLINK_FLAGS  = DEF(GCC_AARCH64_DLINK_FLAGS) 
-Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) 
DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS)
+DEFINE GCC_LOONGARCH64_ASLDLINK_FLAGS = DEF(GCC_LOONGARCH64_DLINK_FLAGS) 
--entry ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT)
 DEFINE GCC_IA32_X64_DLINK_FLAGS= DEF(GCC_IA32_X64_DLINK_COMMON) --entry 
_$(IMAGE_ENTRY_POINT) --file-alignment 0x20 --section-alignment 0x20 -Map 
$(DEST_DIR_DEBUG)/$(BASE_NAME).map
 DEFINE GCC_ASM_FLAGS   = -c -x assembler -imacros AutoGen.h
 DEFINE GCC_PP_FLAGS= -E -x assembler-with-cpp -include 
AutoGen.h
@@ -1873,11 +1878,12 @@ DEFINE GCC_ASLPP_FLAGS = -x c -E -include 
AutoGen.h
 DEFINE GCC_ASLCC_FLAGS = -x c
 DEFINE GCC_WINDRES_FLAGS   = -J rc -O coff
 DEFINE 

[edk2-devel] [PATCH v1 15/34] BaseTools: BaseTools changes for LoongArch platform.

[Chao Li]

C code changes for building EDK2 LoongArch platform.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 
Co-authored-by: Dongyan Qian 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Yang Zhou 
Co-authored-by: Xiaotian Wu 
---
 BaseTools/Source/C/Common/BasePeCoff.c|  15 +-
 BaseTools/Source/C/Common/PeCoffLoaderEx.c|  79 +
 BaseTools/Source/C/GenFv/GenFvInternalLib.c   | 125 +++-
 BaseTools/Source/C/GenFw/Elf64Convert.c   | 293 +-
 BaseTools/Source/C/GenFw/elf_common.h |  94 ++
 .../C/Include/IndustryStandard/PeImage.h  |  57 ++--
 BaseTools/Source/C/Makefiles/header.makefile  |   6 +
 7 files changed, 636 insertions(+), 33 deletions(-)

diff --git a/BaseTools/Source/C/Common/BasePeCoff.c 
b/BaseTools/Source/C/Common/BasePeCoff.c
index 62fbb2985c..30400d1341 100644
--- a/BaseTools/Source/C/Common/BasePeCoff.c
+++ b/BaseTools/Source/C/Common/BasePeCoff.c
@@ -5,6 +5,7 @@
 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -68,6 +69,14 @@ PeCoffLoaderRelocateRiscVImage (
   IN UINT64  Adjust
   );
 
+RETURN_STATUS
+PeCoffLoaderRelocateLoongArch64Image (
+  IN UINT16  *Reloc,
+  IN OUT CHAR8   *Fixup,
+  IN OUT CHAR8   **FixupData,
+  IN UINT64  Adjust
+  );
+
 STATIC
 RETURN_STATUS
 PeCoffLoaderGetPeHeader (
@@ -184,7 +193,8 @@ Returns:
   ImageContext->Machine != EFI_IMAGE_MACHINE_ARMT && \
   ImageContext->Machine != EFI_IMAGE_MACHINE_EBC  && \
   ImageContext->Machine != EFI_IMAGE_MACHINE_AARCH64 && \
-  ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64) {
+  ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64 && \
+  ImageContext->Machine != EFI_IMAGE_MACHINE_LOONGARCH64) {
 if (ImageContext->Machine == IMAGE_FILE_MACHINE_ARM) {
   //
   // There are two types of ARM images. Pure ARM and ARM/Thumb.
@@ -815,6 +825,9 @@ Returns:
 case EFI_IMAGE_MACHINE_RISCV64:
   Status = PeCoffLoaderRelocateRiscVImage (Reloc, Fixup, , 
Adjust);
   break;
+case EFI_IMAGE_MACHINE_LOONGARCH64:
+  Status = PeCoffLoaderRelocateLoongArch64Image (Reloc, Fixup, 
, Adjust);
+  break;
 default:
   Status = RETURN_UNSUPPORTED;
   break;
diff --git a/BaseTools/Source/C/Common/PeCoffLoaderEx.c 
b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
index 799f282970..2cc428d733 100644
--- a/BaseTools/Source/C/Common/PeCoffLoaderEx.c
+++ b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
@@ -4,6 +4,7 @@ IA32 and X64 Specific relocation fixups
 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 --*/
@@ -332,3 +333,81 @@ PeCoffLoaderRelocateArmImage (
 
   return RETURN_SUCCESS;
 }
+
+/**
+  Performs a LoongArch specific relocation fixup.
+
+  @param[in]   Reloc   Pointer to the relocation record.
+  @param[in, out]  Fixup   Pointer to the address to fix up.
+  @param[in, out]  FixupData   Pointer to a buffer to log the fixups.
+  @param[in]   Adjust  The offset to adjust the fixup.
+
+  @return Status code.
+**/
+RETURN_STATUS
+PeCoffLoaderRelocateLoongArch64Image (
+  IN UINT16 *Reloc,
+  IN OUT CHAR8  *Fixup,
+  IN OUT CHAR8  **FixupData,
+  IN UINT64 Adjust
+  )
+{
+  UINT8  RelocType;
+  UINT64 Value;
+  UINT64 Tmp1;
+  UINT64 Tmp2;
+
+  RelocType = ((*Reloc) >> 12);
+  Value = 0;
+  Tmp1  = 0;
+  Tmp2  = 0;
+
+  switch (RelocType) {
+case EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA:
+  // The next four instructions are used to load a 64 bit address, 
relocate all of them
+  Value = (*(UINT32 *)Fixup & 0x1e0) << 7 |   // lu12i.w 20bits 
from bit5
+  (*((UINT32 *)Fixup + 1) & 0x3ffc00) >> 10;  // ori 12bits 
from bit10
+  Tmp1   = *((UINT32 *)Fixup + 2) & 0x1e0;// lu32i.d 20bits 
from bit5
+  Tmp2   = *((UINT32 *)Fixup + 3) & 0x3ffc00; // lu52i.d 12bits 
from bit10
+  Value  = Value | (Tmp1 << 27) | (Tmp2 << 42);
+  Value += Adjust;
+
+  *(UINT32 *)Fixup = (*(UINT32 *)Fixup & ~0x1e0) | (((Value >> 12) & 
0xf) << 5);
+  if (*FixupData != NULL) {
+*FixupData  = ALIGN_POINTER (*FixupData, sizeof (UINT32));
+*(UINT32 *)(*FixupData) = *(UINT32 *)Fixup;
+*FixupData  = *FixupData + sizeof (UINT32);
+  }
+
+  Fixup   += sizeof (UINT32);
+  *(UINT32 *)Fixup = 

[edk2-devel] [PATCH v1 14/34] .python/SpellCheck: Add "Loongson" and "LOONGARCH" to "words" section

[Chao Li]

Add Loongson and LOONGARCH to "words" section in cspell.base.yaml file
to avoid spelling check error.

Cc: Michael D Kinney 
Cc: Liming Gao 

Signed-off-by: Chao Li 
---
 .pytool/Plugin/SpellCheck/cspell.base.yaml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/.pytool/Plugin/SpellCheck/cspell.base.yaml 
b/.pytool/Plugin/SpellCheck/cspell.base.yaml
index f0d5791876..92e65ec6f6 100644
--- a/.pytool/Plugin/SpellCheck/cspell.base.yaml
+++ b/.pytool/Plugin/SpellCheck/cspell.base.yaml
@@ -289,6 +289,8 @@
 "unrecovered",
 "cmocka",
 "unenrolling",
-"unconfigure"
+"unconfigure",
+"Loongson",
+"LOONGARCH"
 ]
 }
-- 
2.27.0



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[edk2-devel] [PATCH v1 13/34] MdeModulePkg: Use LockBoxNullLib for LOONGARCH64

[Chao Li]

LoongArch doesn't have SMM by now.

Cc: Jian J Wang 
Cc: Liming Gao 

Signed-off-by: Chao Li 
---
 MdeModulePkg/MdeModulePkg.dsc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index 45a8ec84ad..659482ab73 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -15,7 +15,7 @@
   PLATFORM_VERSION   = 0.98
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/MdeModule
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
@@ -193,7 +193,7 @@
   #
   NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
 
-[LibraryClasses.EBC, LibraryClasses.RISCV64]
+[LibraryClasses.EBC, LibraryClasses.RISCV64, LibraryClasses.LOONGARCH64]
   LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf
 
 [PcdsFeatureFlag]
-- 
2.27.0



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[edk2-devel] [PATCH v1 12/34] MdePkg/DxeServicesLib: Add LOONGARCH64 architecture

[Chao Li]

Add LOONGARCH64 architecture to MdePkg/DxeServiceLib.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
---
 MdePkg/Library/DxeServicesLib/DxeServicesLib.inf | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf 
b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
index ec3e8711c2..a93541847f 100644
--- a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+++ b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
@@ -22,13 +22,13 @@
   LIBRARY_CLASS  = DxeServicesLib|DXE_CORE DXE_DRIVER 
DXE_RUNTIME_DRIVER DXE_SMM_DRIVER SMM_CORE UEFI_APPLICATION UEFI_DRIVER
 
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
   DxeServicesLib.c
 
-[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64]
+[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64, 
Sources.LOONGARCH64]
   Allocate.c
 
 [Sources.X64]
-- 
2.27.0



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[edk2-devel] [PATCH v1 11/34] UnitTestFrameworkPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Add LOONGARCH64 architecture to UnitTestFramworkPkg for LOONGARCH64 EDK2
CI.

Cc: Michael D Kinney 

Signed-off-by: Chao Li 
---
 UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc 
b/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
index 23baef87d6..e4f9fb6eb6 100644
--- a/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
+++ b/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
@@ -3,6 +3,7 @@
 #
 # Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -14,7 +15,7 @@
   PLATFORM_VERSION= 1.00
   DSC_SPECIFICATION   = 0x00010005
   OUTPUT_DIRECTORY= Build/UnitTestFrameworkPkg
-  SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS   = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER= DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v1 10/34] ShellPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Add LOONGARCH64 architecture to ShellPkg for EDK2 CI testing.

Cc: Ray Ni 
Cc: Zhichao Gao 

Signed-off-by: Chao Li 
---
 ShellPkg/ShellPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc
index 38fde3dc71..dd0d88603f 100644
--- a/ShellPkg/ShellPkg.dsc
+++ b/ShellPkg/ShellPkg.dsc
@@ -4,6 +4,7 @@
 # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) 2018 - 2020, Arm Limited. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -15,7 +16,7 @@
   PLATFORM_VERSION   = 1.02
   DSC_SPECIFICATION  = 0x00010006
   OUTPUT_DIRECTORY   = Build/Shell
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v1 02/34] MdePkg: Added LoongArch jump buffer register definition to MdePkg.ci.yaml

[Chao Li]

If the new Arch register is defined in BaseLib.h when running
the CI tests, it will give an ECC check error. Add the
LoongArch register defined in the IgnoreFiles field to make
the CI ECC check pass.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
---
 MdePkg/MdePkg.ci.yaml | 12 
 1 file changed, 12 insertions(+)

diff --git a/MdePkg/MdePkg.ci.yaml b/MdePkg/MdePkg.ci.yaml
index 9d141aa3cb..19bc0138cb 100644
--- a/MdePkg/MdePkg.ci.yaml
+++ b/MdePkg/MdePkg.ci.yaml
@@ -27,6 +27,18 @@
 "8005", "void",
 "8005", "va_list.__ap",
 "8005", "__stack_chk_guard",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S0",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S1",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S2",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S3",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S4",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S5",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S6",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S7",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S8",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.SP",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.FP",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.RA",
 "8001", "MSG_IPv6_DP",
 "8001", "MSG_IPv4_DP",
 "8001", "DEFAULT_ToS",
-- 
2.27.0



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[edk2-devel] [PATCH v1 05/34] NetworkPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Add LOONGARCH64 architecture for EDK2 CI testing.

Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Cc: Siyuan Fu 

Signed-off-by: Chao Li 
---
 NetworkPkg/NetworkPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/NetworkPkg/NetworkPkg.dsc b/NetworkPkg/NetworkPkg.dsc
index 762134023d..6c231c97b5 100644
--- a/NetworkPkg/NetworkPkg.dsc
+++ b/NetworkPkg/NetworkPkg.dsc
@@ -4,6 +4,7 @@
 # (C) Copyright 2014 Hewlett-Packard Development Company, L.P.
 # Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -14,7 +15,7 @@
   PLATFORM_VERSION   = 0.98
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/NetworkPkg
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v1 08/34] MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.

[Chao Li]

HTTP/PXE boot LOONGARCH64 related definitions for EDK2 CI.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
---
 MdePkg/Include/IndustryStandard/Dhcp.h | 41 +++---
 1 file changed, 23 insertions(+), 18 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/Dhcp.h 
b/MdePkg/Include/IndustryStandard/Dhcp.h
index f209f1b2eb..845d6e4fed 100644
--- a/MdePkg/Include/IndustryStandard/Dhcp.h
+++ b/MdePkg/Include/IndustryStandard/Dhcp.h
@@ -4,6 +4,7 @@
 
   Copyright (c) 2016, Intel Corporation. All rights reserved.
   Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
@@ -259,24 +260,28 @@ typedef enum {
 /// These identifiers are defined by IETF:
 /// http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml
 ///
-#define PXE_CLIENT_ARCH_X86_BIOS  0x   /// x86 BIOS for PXE
-#define PXE_CLIENT_ARCH_IPF   0x0002   /// Itanium for PXE
-#define PXE_CLIENT_ARCH_IA32  0x0006   /// x86 uefi for PXE
-#define PXE_CLIENT_ARCH_X64   0x0007   /// x64 uefi for PXE
-#define PXE_CLIENT_ARCH_EBC   0x0009   /// EBC for PXE
-#define PXE_CLIENT_ARCH_ARM   0x000A   /// Arm uefi 32 for PXE
-#define PXE_CLIENT_ARCH_AARCH64   0x000B   /// Arm uefi 64 for PXE
-#define PXE_CLIENT_ARCH_RISCV32   0x0019   /// RISC-V uefi 32 for PXE
-#define PXE_CLIENT_ARCH_RISCV64   0x001B   /// RISC-V uefi 64 for PXE
-#define PXE_CLIENT_ARCH_RISCV128  0x001D   /// RISC-V uefi 128 for PXE
+#define PXE_CLIENT_ARCH_X86_BIOS 0x  /// x86 BIOS for PXE
+#define PXE_CLIENT_ARCH_IPF  0x0002  /// Itanium for PXE
+#define PXE_CLIENT_ARCH_IA32 0x0006  /// x86 uefi for PXE
+#define PXE_CLIENT_ARCH_X64  0x0007  /// x64 uefi for PXE
+#define PXE_CLIENT_ARCH_EBC  0x0009  /// EBC for PXE
+#define PXE_CLIENT_ARCH_ARM  0x000A  /// Arm uefi 32 for PXE
+#define PXE_CLIENT_ARCH_AARCH64  0x000B  /// Arm uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV32  0x0019  /// RISC-V uefi 32 for PXE
+#define PXE_CLIENT_ARCH_RISCV64  0x001B  /// RISC-V uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV128 0x001D  /// RISC-V uefi 128 for 
PXE
+#define PXE_CLIENT_ARCH_LOONGARCH32  0x0025  /// LoongArch uefi 32 for 
PXE
+#define PXE_CLIENT_ARCH_LOONGARCH64  0x0027  /// LoongArch uefi 64 for 
PXE
 
-#define HTTP_CLIENT_ARCH_IA32  0x000F  /// x86 uefi boot from http
-#define HTTP_CLIENT_ARCH_X64   0x0010  /// x64 uefi boot from http
-#define HTTP_CLIENT_ARCH_EBC   0x0011  /// EBC boot from http
-#define HTTP_CLIENT_ARCH_ARM   0x0012  /// Arm uefi 32 boot from 
http
-#define HTTP_CLIENT_ARCH_AARCH64   0x0013  /// Arm uefi 64 boot from 
http
-#define HTTP_CLIENT_ARCH_RISCV32   0x001A  /// RISC-V uefi 32 boot 
from http
-#define HTTP_CLIENT_ARCH_RISCV64   0x001C  /// RISC-V uefi 64 boot 
from http
-#define HTTP_CLIENT_ARCH_RISCV128  0x001E  /// RISC-V uefi 128 boot 
from http
+#define HTTP_CLIENT_ARCH_IA32 0x000F  /// x86 uefi boot from 
http
+#define HTTP_CLIENT_ARCH_X64  0x0010  /// x64 uefi boot from 
http
+#define HTTP_CLIENT_ARCH_EBC  0x0011  /// EBC boot from http
+#define HTTP_CLIENT_ARCH_ARM  0x0012  /// Arm uefi 32 boot 
from http
+#define HTTP_CLIENT_ARCH_AARCH64  0x0013  /// Arm uefi 64 boot 
from http
+#define HTTP_CLIENT_ARCH_RISCV32  0x001A  /// RISC-V uefi 32 boot 
from http
+#define HTTP_CLIENT_ARCH_RISCV64  0x001C  /// RISC-V uefi 64 boot 
from http
+#define HTTP_CLIENT_ARCH_RISCV128 0x001E  /// RISC-V uefi 128 boot 
from http
+#define HTTP_CLIENT_ARCH_LOONGARCH32  0x0026  /// LoongArch uefi 32 
boot from http
+#define HTTP_CLIENT_ARCH_LOONGARCH64  0x0028  /// LoongArch uefi 64 
boot from http
 
 #endif
-- 
2.27.0



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[edk2-devel] [PATCH v1 07/34] CryptoPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Add LOONGARCH64 architecture for EDK2 CI testing.

Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Xiaoyu Lu 
Cc: Guomin Jiang 

Signed-off-by: Chao Li 
---
 CryptoPkg/CryptoPkg.dsc | 3 ++-
 CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 6 +-
 CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf  | 4 
 CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 ++-
 CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 ++-
 CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 ++-
 CryptoPkg/Library/Include/CrtLibSupport.h   | 3 ++-
 CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 ++
 CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf   | 2 ++
 CryptoPkg/Library/TlsLib/TlsLib.inf | 3 ++-
 CryptoPkg/Library/TlsLibNull/TlsLibNull.inf | 3 ++-
 11 files changed, 27 insertions(+), 8 deletions(-)

diff --git a/CryptoPkg/CryptoPkg.dsc b/CryptoPkg/CryptoPkg.dsc
index 50e7721f25..c3a02aafb0 100644
--- a/CryptoPkg/CryptoPkg.dsc
+++ b/CryptoPkg/CryptoPkg.dsc
@@ -4,6 +4,7 @@
 #
 #  Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -19,7 +20,7 @@
   PLATFORM_VERSION   = 0.98
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/CryptoPkg
-  SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
diff --git a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
index 3d7b917103..f8790d2c72 100644
--- a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
@@ -8,6 +8,7 @@
 #
 #  Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -24,7 +25,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
@@ -74,6 +75,9 @@
 [Sources.RISCV64]
   Rand/CryptRand.c
 
+[Sources.LOONGARCH64]
+  Rand/CryptRand.c
+
 [Packages]
   MdePkg/MdePkg.dec
   CryptoPkg/CryptoPkg.dec
diff --git a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
index d28fb98b66..7da789d00e 100644
--- a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
@@ -13,6 +13,7 @@
 #
 #  Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.
 #  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -79,6 +80,9 @@
 [Sources.RISCV64]
   Rand/CryptRand.c
 
+[Sources.LOONGARCH64]
+  Rand/CryptRand.c
+
 [Packages]
   MdePkg/MdePkg.dec
   CryptoPkg/CryptoPkg.dec
diff --git a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf 
b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
index 63d1d82d19..1d8b502813 100644
--- a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
+++ b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
@@ -8,6 +8,7 @@
 #
 #  Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -24,7 +25,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
index baa4433cbe..b4945de336 100644
--- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
@@ -4,6 +4,7 @@
 #
 # Copyright (C) Microsoft Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson 

[edk2-devel] [PATCH v1 06/34] NetworkPkg/HttpBootDxe: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Add LOONGARCH architecture for EDK2 CI testing.

Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Cc: Siyuan Fu 

Signed-off-by: Chao Li 
---
 NetworkPkg/HttpBootDxe/HttpBootDhcp4.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h 
b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
index d76f0e84d6..f00fabead2 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
+++ b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
@@ -3,6 +3,7 @@
 
 Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
 Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -40,6 +41,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE  HTTP_CLIENT_ARCH_RISCV64
 #elif defined (MDE_CPU_EBC)
 #define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE  HTTP_CLIENT_ARCH_EBC
+#elif defined (MDE_CPU_LOONGARCH64)
+#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE  HTTP_CLIENT_ARCH_LOONGARCH64
 #endif
 
 /// DHCP offer types among HTTP boot.
-- 
2.27.0



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[edk2-devel] [PATCH v1 09/34] SecurityPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Add LOONGARCH64 architecture to SecurityPkg for EDK2 CI testing.

Cc: Jiewen Yao 
Cc: Jian J Wang 

Signed-off-by: Chao Li 
---
 SecurityPkg/SecurityPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/SecurityPkg/SecurityPkg.dsc b/SecurityPkg/SecurityPkg.dsc
index f48187650f..6bf53c5658 100644
--- a/SecurityPkg/SecurityPkg.dsc
+++ b/SecurityPkg/SecurityPkg.dsc
@@ -3,6 +3,7 @@
 #
 # Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved.
 # (C) Copyright 2015-2020 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -13,7 +14,7 @@
   PLATFORM_VERSION   = 0.98
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/SecurityPkg
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v1 10/34] ShellPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Add LOONGARCH64 architecture to ShellPkg for EDK2 CI testing.

Cc: Ray Ni 
Cc: Zhichao Gao 

Signed-off-by: Chao Li 
---
 ShellPkg/ShellPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc
index 38fde3dc71..dd0d88603f 100644
--- a/ShellPkg/ShellPkg.dsc
+++ b/ShellPkg/ShellPkg.dsc
@@ -4,6 +4,7 @@
 # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) 2018 - 2020, Arm Limited. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -15,7 +16,7 @@
   PLATFORM_VERSION   = 1.02
   DSC_SPECIFICATION  = 0x00010006
   OUTPUT_DIRECTORY   = Build/Shell
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v1 04/34] FmpDevicePkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Add LOONGARCH64 architecture for EDK2 CI testing.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Guomin Jiang 
Cc: Wei6 Xu 

Signed-off-by: Chao Li 
---
 FmpDevicePkg/FmpDevicePkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/FmpDevicePkg/FmpDevicePkg.dsc b/FmpDevicePkg/FmpDevicePkg.dsc
index 7b1af285dd..f9f26c54bb 100644
--- a/FmpDevicePkg/FmpDevicePkg.dsc
+++ b/FmpDevicePkg/FmpDevicePkg.dsc
@@ -9,6 +9,7 @@
 # Copyright (c) Microsoft Corporation.
 # Copyright (c) 2018 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -20,7 +21,7 @@
   PLATFORM_VERSION   = 0.1
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/FmpDevicePkg
-  SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v1 01/34] MdePkg: Added file of DebugSupport.h to MdePkg.ci.yaml

[Chao Li]

DebugSupport.h is all defined by UEFI Spec, most of the code
doesn't fit EDKII coding style, add it to IgnoreFiles field to
make CI ECC check pass.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
---
 MdePkg/MdePkg.ci.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MdePkg/MdePkg.ci.yaml b/MdePkg/MdePkg.ci.yaml
index 054233ebc7..9d141aa3cb 100644
--- a/MdePkg/MdePkg.ci.yaml
+++ b/MdePkg/MdePkg.ci.yaml
@@ -52,6 +52,7 @@
 "Include/IndustryStandard/UefiTcgPlatform.h",
 "Include/Library/PcdLib.h",
 "Include/Library/SafeIntLib.h",
+"Include/Protocol/DebugSupport.h",
 "Test/UnitTest/Library/BaseSafeIntLib/TestBaseSafeIntLib.c"
 ]
 },
-- 
2.27.0



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[edk2-devel] [PATCH v1 00/34] Add a new architecture called LoongArch in EDK II

[Chao Li]

UEFI Spec V2.10 already supports LoongArch and all changes of this
commit passwed Azure CI testing, so let's enable it in EDK2. This commit
contains 35 patchs, with patch 0 is the cover and the rest being the
LoongArch base code.

Modified modules: FatPkg, FmpDevicePkg, NetworkPkg,
NetworkPkg/HttpBootDxe, CryptoPkg, MdePkg/Include, SecurityPkg,
ShellPkg, UnitTestFrameworkPkg, MdePkg/DxeServicesLib, MdeModulePkg,
.python/SpellCheck, BaseTools, .azurepipelines, .pytool, MdePkg,
MdeModulePkg and MdePkg/MdePkg.ci.yaml.

Cc: Ray Ni 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Guomin Jiang 
Cc: Wei6 Xu 
Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Cc: Siyuan Fu 
Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Xiaoyu Lu 
Cc: Zhiguang Liu 
Cc: Zhichao Gao 
Cc: Bob Feng 
Cc: Yuwei Chen 

Chao Li (34):
  MdePkg: Added file of DebugSupport.h to MdePkg.ci.yaml
  MdePkg: Added LoongArch jump buffer register definition to
MdePkg.ci.yaml
  FatPkg: Add LOONGARCH64 architecture for EDK2 CI.
  FmpDevicePkg: Add LOONGARCH64 architecture for EDK2 CI.
  NetworkPkg: Add LOONGARCH64 architecture for EDK2 CI.
  NetworkPkg/HttpBootDxe: Add LOONGARCH64 architecture for EDK2 CI.
  CryptoPkg: Add LOONGARCH64 architecture for EDK2 CI.
  MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.
  SecurityPkg: Add LOONGARCH64 architecture for EDK2 CI.
  ShellPkg: Add LOONGARCH64 architecture for EDK2 CI.
  UnitTestFrameworkPkg: Add LOONGARCH64 architecture for EDK2 CI.
  MdePkg/DxeServicesLib: Add LOONGARCH64 architecture
  MdeModulePkg: Use LockBoxNullLib for LOONGARCH64
  .python/SpellCheck: Add "Loongson" and "LOONGARCH" to "words" section
  BaseTools: BaseTools changes for LoongArch platform.
  BaseTools: BaseTools changes for LoongArch platform.
  BaseTools: BaseTools changes for LoongArch platform.
  BaseTools: Enable LoongArch64 architecture for LoongArch64 EDK2 CI.
  .azurepipelines: Add LoongArch64 architecture on LoongArch64 EDK2 CI.
  .pytool: Add LoongArch64 architecture on LoongArch64 EDK2 CI.
  MdePkg: Add LoongArch LOONGARCH64 binding
  MdePkg/Include: LoongArch definitions.
  MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.
  MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance
implementation.
  MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture.
  MdePkg/BasePeCoff: Add LoongArch PE/Coff related code.
  MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
  MdePkg/BaseSynchronizationLib: LoongArch cache related code.
  MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for
BaseSafeIntLib.
  MdeModulePkg/Logo: Add LoongArch64 architecture.
  MdeModulePkg/CapsuleRuntimeDxe: Add LoongArch64 architecture.
  MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation.
  NetworkPkg: Add LoongArch64 architecture.
  BaseTools: Add LoongArch64 binding.

 .azurepipelines/Ubuntu-GCC5.yml   |   3 +-
 .pytool/CISettings.py |   5 +-
 .pytool/Plugin/SpellCheck/cspell.base.yaml|   4 +-
 ...gcc_loongarch64_unknown_linux_ext_dep.yaml |  22 ++
 BaseTools/Conf/tools_def.template |  54 +++-
 .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py  |  31 ++
 BaseTools/Source/C/Common/BasePeCoff.c|  15 +-
 BaseTools/Source/C/Common/PeCoffLoaderEx.c|  79 +
 BaseTools/Source/C/GNUmakefile|   3 +
 BaseTools/Source/C/GenFv/GenFvInternalLib.c   | 125 +++-
 BaseTools/Source/C/GenFw/Elf64Convert.c   | 293 +-
 BaseTools/Source/C/GenFw/elf_common.h |  94 ++
 .../C/Include/IndustryStandard/PeImage.h  |  57 ++--
 .../C/Include/LoongArch64/ProcessorBind.h |  80 +
 BaseTools/Source/C/Makefiles/header.makefile  |   6 +
 BaseTools/Source/Python/Common/DataType.py|  21 +-
 .../Source/Python/UPT/Library/DataType.py |  24 +-
 BaseTools/Source/Python/build/buildoptions.py |   3 +-
 CryptoPkg/CryptoPkg.dsc   |   3 +-
 .../Library/BaseCryptLib/BaseCryptLib.inf |   6 +-
 .../Library/BaseCryptLib/RuntimeCryptLib.inf  |   4 +
 .../BaseCryptLibNull/BaseCryptLibNull.inf |   3 +-
 .../BaseCryptLibOnProtocolPpi/DxeCryptLib.inf |   3 +-
 .../BaseCryptLibOnProtocolPpi/PeiCryptLib.inf |   3 +-
 CryptoPkg/Library/Include/CrtLibSupport.h |   3 +-
 CryptoPkg/Library/OpensslLib/OpensslLib.inf   |   2 +
 .../Library/OpensslLib/OpensslLibCrypto.inf   |   2 +
 CryptoPkg/Library/TlsLib/TlsLib.inf   |   3 +-
 CryptoPkg/Library/TlsLibNull/TlsLibNull.inf   |   3 +-
 FatPkg/FatPkg.dsc |   3 +-
 FmpDevicePkg/FmpDevicePkg.dsc |   3 +-
 MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf   |   6 +-
 .../Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c |  63 
 MdeModulePkg/Logo/Logo.inf|   3 +-
 MdeModulePkg/MdeModulePkg.dsc |   4 +-
 .../CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf   |   9 +-
 MdePkg/Include/IndustryStandard/Dhcp.h|  41 +--
 MdePkg/Include/IndustryStandard/PeImage.h |   9 +
 MdePkg/Include/Library/BaseLib.h  

[edk2-devel] [PATCH v1 03/34] FatPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Add LOONGARCH64 architecture for EDK2 CI testing.

Cc: Ray Ni 

Signed-off-by: Chao Li  
---
 FatPkg/FatPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
index 6fa439e440..076b577972 100644
--- a/FatPkg/FatPkg.dsc
+++ b/FatPkg/FatPkg.dsc
@@ -5,6 +5,7 @@
 #  for EDK II Prime release.
 #  Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -15,7 +16,7 @@
   PLATFORM_GUID  = 25b55dbc-9d0b-4a32-80da-46e1273d622c
   PLATFORM_VERSION   = 0.3
   DSC_SPECIFICATION  = 0x00010005
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   OUTPUT_DIRECTORY   = Build/Fat
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
-- 
2.27.0



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[edk2-devel] [PATCH v2] MdeModulePkg: Use configurable PCD for AHCI command retries

[Anbazhagan, Baraneedharan via groups.io]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4011

AHCI commands are retried internally which prevents platform feature
like drive password to process correctly entered password on subsequent
attempts. PCD allows the platform to determine the number of retries.

Signed-off-by: Baraneedharan Anbazhagan 
anbazha...@hp.com
---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h   | 2 +-
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf | 3 ++-
MdeModulePkg/MdeModulePkg.dec  | 4 
MdeModulePkg/MdeModulePkg.uni  | 4 
4 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
index 7802ebd200..7fe9ac2da7 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
@@ -193,7 +193,7 @@ typedef union {
#define   AHCI_PORT_DEVSLP_DITO_MASK  0x01FF8000
#define   AHCI_PORT_DEVSLP_DM_MASK0x1E00
-#define AHCI_COMMAND_RETRIES  5
+#define AHCI_COMMAND_RETRIES  PcdGet32 (PcdAhciCommandRetryCount)
 #pragma pack(1)
//
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
index a3e42a9ab4..78caa3c458 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
@@ -65,7 +65,8 @@
   gEdkiiAtaAtapiPolicyProtocolGuid  ## CONSUMES
 [Pcd]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable   ## SOMETIMES_CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable  ## 
SOMETIMES_CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAhciCommandRetryCount   ## 
SOMETIMES_CONSUMES
 # [Event]
# EVENT_TYPE_PERIODIC_TIMER ## SOMETIMES_CONSUMES
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 7d98910832..58e6ab0048 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -1574,6 +1574,10 @@
   # @Prompt SD/MMC Host Controller Operations Timeout (us).
   
gEfiMdeModulePkgTokenSpaceGuid.PcdSdMmcGenericTimeoutValue|100|UINT32|0x0031
+  ## The Retry Count of AHCI command if there is a failure
+  # @Prompt The value of Retry Count,  Default value is 5.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAhciCommandRetryCount|5|UINT32|0x0032
+
[PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
   ## This PCD defines the Console output row. The default value is 25 
according to UEFI spec.
   #  This PCD could be set to 0 then console output would be at max column and 
max row.
diff --git a/MdeModulePkg/MdeModulePkg.uni b/MdeModulePkg/MdeModulePkg.uni
index b070f15ff2..33ce9f6198 100644
--- a/MdeModulePkg/MdeModulePkg.uni
+++ b/MdeModulePkg/MdeModulePkg.uni
@@ -1166,6 +1166,10 @@

"in the DXE phase. Minimum value is 1. Sections nested more 
deeply are"

"rejected."
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdAhciCommandRetryCount_PROMPT  
#language en-US "Retry Count of AHCI command if there is a failure"
+
+#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdAhciCommandRetryCount_HELP  
#language en-US "This value is used to configure number of retries on AHCI 
commands, if there is a failure."
+
#string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdCapsuleInRamSupport_PROMPT  
#language en-US "Enable Capsule In Ram support"
 #string STR_gEfiMdeModulePkgTokenSpaceGuid_PcdCapsuleInRamSupport_HELP  
#language en-US   "Capsule In Ram is to use memory to deliver the capsules that 
will be processed after system reset."
--
2.36.1.windows.1



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[edk2-devel][edk2-platforms][PATCH V1 2/2] PlatformPayloadFeaturePkg/Build: Use MinPlatform PCD include

[Isaac Oram]

Fix build issue from removed PCD and use MinPlatformFeaturesPcd.dsc.inc.

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Signed-off-by: Isaac Oram 
---
 .../PlatformPayloadFeaturePkg.dsc   | 13 +
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git 
a/Features/Intel/PlatformPayloadFeaturePkg/PlatformPayloadFeaturePkg.dsc 
b/Features/Intel/PlatformPayloadFeaturePkg/PlatformPayloadFeaturePkg.dsc
index 1b79e0039b..e36e5d6e1e 100644
--- a/Features/Intel/PlatformPayloadFeaturePkg/PlatformPayloadFeaturePkg.dsc
+++ b/Features/Intel/PlatformPayloadFeaturePkg/PlatformPayloadFeaturePkg.dsc
@@ -48,16 +48,13 @@
 #
 

 
-#
-# Since there are no 32b libraries or components in this package, these PCD 
are specified for 64b only
-#
-[PcdsFeatureFlag]
   #
-  # PCD needed for MinPlatform build includes
+  # MinPlatform common include for required feature PCD
+  # These PCD must be set before the core include files, CoreCommonLib,
+  # CorePeiLib, and CoreDxeLib.
+  # Optional MinPlatformPkg features should be enabled after this
   #
-  gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable
|FALSE
-  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable   
|FALSE
-  gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable  
|FALSE
+  !include MinPlatformPkg/Include/Dsc/MinPlatformFeaturesPcd.dsc.inc
 
 [PcdsPatchableInModule]
   gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x7
-- 
2.36.1.windows.1



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[edk2-devel][edk2-platforms][PATCH V1 0/2] Fix build issues

[Isaac Oram]

These commits fix some small build issues from various changes.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Isaac Oram 

Isaac Oram (2):
  MinPlatformPkg/Include: Add PEI DevicePathLib instance
  PlatformPayloadFeaturePkg/Build: Use MinPlatform PCD include

 .../PlatformPayloadFeaturePkg.dsc   | 13 +
 .../Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc |  1 +
 2 files changed, 6 insertions(+), 8 deletions(-)

--
2.36.1.windows.1


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[edk2-devel][edk2-platforms][PATCH V1 1/2] MinPlatformPkg/Include: Add PEI DevicePathLib instance

[Isaac Oram]

PEI DevicePathLib instance required by NvmExpressPei.inf
due to recent change.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Isaac Oram 
---
 Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc 
b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc
index 9bac751eaf..4424ebaecc 100644
--- a/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc
+++ b/Platform/Intel/MinPlatformPkg/Include/Dsc/CorePeiLib.dsc
@@ -27,6 +27,7 @@
   
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
   
ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
   
ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLibBase.inf
   LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf
   
CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
 
-- 
2.36.1.windows.1



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Re: [edk2-devel] [PATCH 1/1] pip-requirement: Upgrade the edk2-basetools version from 0.1.28 to 0.1.29

[Bob Feng]

Pushed.

-Original Message-
From: Kinney, Michael D  
Sent: Thursday, September 8, 2022 10:23 AM
To: devel@edk2.groups.io; Feng, Bob C ; Kinney, Michael D 

Cc: Gao, Liming ; Chen, Christine 
; Rebecca Cran 
Subject: RE: [edk2-devel] [PATCH 1/1] pip-requirement: Upgrade the 
edk2-basetools version from 0.1.28 to 0.1.29

Reviewed-by: Michael D Kinney 


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Bob 
> Feng
> Sent: Wednesday, September 7, 2022 8:24 AM
> To: devel@edk2.groups.io
> Cc: Feng, Bob C ; Gao, Liming 
> ; Chen, Christine ; 
> Rebecca Cran 
> Subject: [edk2-devel] [PATCH 1/1] pip-requirement: Upgrade the 
> edk2-basetools version from 0.1.28 to 0.1.29
> 
> features and bug fixes:
> 1. Revert "BaseTools: Fix DSC LibraryClass precedence rule"
> 
> Signed-off-by: Bob Feng 
> Cc: Liming Gao 
> Cc: Yuwei Chen 
> Cc: Rebecca Cran 
> ---
>  pip-requirements.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/pip-requirements.txt b/pip-requirements.txt index 
> 353c01ff71ed..967da7cb3783 100644
> --- a/pip-requirements.txt
> +++ b/pip-requirements.txt
> @@ -14,5 +14,5 @@
> 
>  edk2-pytool-library==0.11.2
>  edk2-pytool-extensions~=0.16.0
> -edk2-basetools==0.1.28
> +edk2-basetools==0.1.29
>  antlr4-python3-runtime==4.7.1
> --
> 2.37.0.windows.1
> 
> 
> 
> 
> 



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Re: [edk2-devel][edk2-platforms][PATCH v2 5/6] MinPlatformPkg: Implement working S3 resume

[Isaac Oram]

DSC and FDF should wrap performance PEIM with !if 
gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable == TRUE to be consistent 
with the MinPlatformPkg DSC implementations.  Or you could take a look at what 
we did in WhitleyOpenBoardPkg/Include/Dsc/ 
EnablePerformanceMonitoringInfrastructure.dsc.  But I don't think that this is 
quite ready for promotion to wider use.  It might fit better as an advanced 
feature, but I haven't had time to play with it.

That plus adding the UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf to 
CorePostMemoryInclude.fdf
And
  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
To CoreOsBootInclude.fdf.

I think that those are the best places.  They don't need any conditional logic 
because they have dependencies that should enable the desired execution timing.

Regards,
Isaac

-Original Message-
From: Benjamin Doron  
Sent: Tuesday, September 6, 2022 10:02 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Sinha, Ankit ; Oram, 
Isaac W ; Gao, Liming ; Dong, 
Eric 
Subject: [edk2-devel][edk2-platforms][PATCH v2 5/6] MinPlatformPkg: Implement 
working S3 resume

Consume S3 resume memory allocation on resume flow.

Also, include complementary FirmwarePerformanceDataTablePei module in 
MinPlatform FV for S3 resume performance measurement.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Isaac Oram 
Cc: Liming Gao 
Cc: Eric Dong 
Signed-off-by: Benjamin Doron 
---
 .../FspWrapperHobProcessLib.c | 69 ++-
 .../PeiFspWrapperHobProcessLib.inf|  2 +
 .../Include/Dsc/CorePeiInclude.dsc|  2 +
 .../Include/Fdf/CorePostMemoryInclude.fdf |  2 +
 4 files changed, 74 insertions(+), 1 deletion(-)

diff --git 
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
 
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
index 7ee4d3a31c49..9bd6fe6290c5 100644
--- 
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobProcessLib/FspWrapperHobProcessLib.c
+++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/PeiFspWrapperHobP
+++ rocessLib/FspWrapperHobProcessLib.c
@@ -16,14 +16,17 @@ SPDX-License-Identifier: BSD-2-Clause-Patent  #include 
 #include  #include 
+#include  #include 
 #include  #include 
 #include  #include 
 #include +#include   
#include +#include   // // Additional pages are 
used by DXE memory manager.@@ -130,6 +133,55 @@ GetPeiMemSize (
   return MinSize + Size + PEI_ADDITIONAL_MEMORY_SIZE; } +/**+  Get S3 PEI 
memory information.++  @note At this point, memory is ready, and PeiServices 
are available to use.+  Platform can get some data from SMRAM directly.++  
@param[out] S3PeiMemSize  PEI memory size to be installed in S3 phase.+  
@param[out] S3PeiMemBase  PEI memory base to be installed in S3 phase.++  
@return If S3 PEI memory information is got 
successfully.+**/+EFI_STATUS+EFIAPI+GetS3MemoryInfo (+  OUT UINT64  
  *S3PeiMemSize,+  OUT EFI_PHYSICAL_ADDRESS  *S3PeiMemBase+  )+{+  EFI_STATUS   
Status;+  EFI_PEI_READ_ONLY_VARIABLE2_PPI  *VariablePpi;+  
UINTNDataSize;+  ACPI_S3_MEMORY   
S3MemoryInfo;++  *S3PeiMemBase = 0;+  *S3PeiMemSize = 0;++  Status = 
PeiServicesLocatePpi (, 0, NULL, (VOID **) 
);+  ASSERT_EFI_ERROR (Status);++  DataSize = sizeof 
(S3MemoryInfo);+  Status = VariablePpi->GetVariable (+  
VariablePpi,+  ACPI_S3_MEMORY_NV_NAME,+ 
 ,+  NULL,+
  ,+  +   
   );+  ASSERT_EFI_ERROR (Status);++  if (EFI_ERROR (Status)) {+return 
Status;+  }++  *S3PeiMemBase = S3MemoryInfo.S3PeiMemBase;+  *S3PeiMemSize = 
S3MemoryInfo.S3PeiMemSize;+  return EFI_SUCCESS;+}+ /**   Post FSP-M HOB 
process for Memory Resource Descriptor. @@ -280,7 +332,7 @@ PostFspmHobProcess (
 0x1000 ); -+  if (BootMode != BOOT_ON_S3_RESUME) { // // 
Capsule mode //@@ -337,7 +389,22 @@ PostFspmHobProcess (
 if (Capsule != NULL) {   Status = Capsule->CreateState 
((EFI_PEI_SERVICES **)PeiServices, CapsuleBuffer, CapsuleBufferLength); }+  
} else {+Status = GetS3MemoryInfo (, );+
ASSERT_EFI_ERROR (Status); +DEBUG ((DEBUG_INFO, "S3 resume PeiMemBase   
 : 0x%08x\n", PeiMemBase));+DEBUG ((DEBUG_INFO, "S3 resume PeiMemSize   
 : 0x%08x\n", PeiMemSize));++//+// Install efi memory+//+Status 
= PeiServicesInstallPeiMemory (+   PeiMemBase,+   
PeiMemSize+   );+ASSERT_EFI_ERROR (Status);+  }//   // 
Create a memory allocation HOB at fixed location for MP Services PPI AP wait 
loop.diff --git 

Re: [edk2-devel] [PATCH 1/1] pip-requirement: Upgrade the edk2-basetools version from 0.1.28 to 0.1.29

[Michael D Kinney]

Reviewed-by: Michael D Kinney 


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Bob Feng
> Sent: Wednesday, September 7, 2022 8:24 AM
> To: devel@edk2.groups.io
> Cc: Feng, Bob C ; Gao, Liming 
> ; Chen, Christine ;
> Rebecca Cran 
> Subject: [edk2-devel] [PATCH 1/1] pip-requirement: Upgrade the edk2-basetools 
> version from 0.1.28 to 0.1.29
> 
> features and bug fixes:
> 1. Revert "BaseTools: Fix DSC LibraryClass precedence rule"
> 
> Signed-off-by: Bob Feng 
> Cc: Liming Gao 
> Cc: Yuwei Chen 
> Cc: Rebecca Cran 
> ---
>  pip-requirements.txt | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/pip-requirements.txt b/pip-requirements.txt
> index 353c01ff71ed..967da7cb3783 100644
> --- a/pip-requirements.txt
> +++ b/pip-requirements.txt
> @@ -14,5 +14,5 @@
> 
>  edk2-pytool-library==0.11.2
>  edk2-pytool-extensions~=0.16.0
> -edk2-basetools==0.1.28
> +edk2-basetools==0.1.29
>  antlr4-python3-runtime==4.7.1
> --
> 2.37.0.windows.1
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices for CloudHv

[Yao, Jiewen]

Merged - https://github.com/tianocore/edk2/pull/3317

From: Boeuf, Sebastien 
Sent: Wednesday, September 7, 2022 11:25 PM
To: Yao, Jiewen 
Cc: kra...@redhat.com; Justen, Jordan L ; 
devel@edk2.groups.io
Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices for 
CloudHv

Ok sounds good.

Thanks,
Sebastien

From: Yao, Jiewen mailto:jiewen@intel.com>>
Sent: Wednesday, September 7, 2022 5:23 PM
To: Boeuf, Sebastien 
mailto:sebastien.bo...@intel.com>>
Cc: kra...@redhat.com 
mailto:kra...@redhat.com>>; Justen, Jordan L 
mailto:jordan.l.jus...@intel.com>>; 
devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>
Subject: RE: [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices for 
CloudHv

I see. The is hard to let a base lib access the HOB.

I think we can integrate this patch at first to make it work, with known 
limitation.


> -Original Message-
> From: Boeuf, Sebastien 
> mailto:sebastien.bo...@intel.com>>
> Sent: Wednesday, September 7, 2022 11:21 PM
> To: Yao, Jiewen mailto:jiewen@intel.com>>
> Cc: kra...@redhat.com; Justen, Jordan L 
> mailto:jordan.l.jus...@intel.com>>;
> devel@edk2.groups.io
> Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices
> for CloudHv
>
> I had a quick try and I've realized
> OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c didn't have access
> to the EFI_HOB_PLATFORM_INFO. Is there an alternative?
>
> Thanks,
> Sebastien
>
> On Wed, 2022-09-07 at 16:23 +0200, Sebastien Boeuf wrote:
> > Hi Jiewen,
> >
> > After I looked into the UefiPayload example, I have a few questions
> > on
> > how to implement things in OvmfPkg:
> >
> > - Do you expect EFI_HOB_PLATFORM_INFO to be extended with two
> > additional fields AcpiTimerAddress and AcpiShutdownAddress? Or do you
> > think the ACPI_BOARD_INFO should be copied over from the the
> > UefiPayload package?
> >
> > - Is InitializePlatform() from OvmfPkg/PlatformPei/Platform.c the
> > correct place where the FADT parsing should happen? I would need the
> > platform info HOB to be accessible from
> > OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c,
> > OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c,
> > OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c,
> > OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c, and
> > OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c.
> >
> > Thanks,
> > Sebastien
> >
> > On Tue, 2022-09-06 at 15:57 +, Yao, Jiewen wrote:
> > > One good example is in UefiPayloadPkg.
> > >
> > > 1. At entrypoint, the UefiPayload parses the ACPI table and build
> > > gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> > > ter/UefiPayloadPkg/UefiPayloadEntry/AcpiTable.c#L23
> > >
> > > 1. Later, AcpiTimer driver uses the ACPI data in
> > > gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> > > ter/UefiPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#L49
> > >
> > > 1. Other driver may also use the ACPI data, such as
> > > PciExpressAddress. (from
> > > MCFG).https://github.com/tianocore/edk2/blob/master/UefiPayloadPk
> > > g/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoa
> > > rdInfo.c#L55
> > >
> > >
> > > Thank you
> > > Yao Jiewen
> > >
> > >
> > > From: Boeuf, Sebastien 
> > > mailto:sebastien.bo...@intel.com>>
> > > Sent: Tuesday, September 6, 2022 11:41 PM
> > > To: Yao, Jiewen mailto:jiewen@intel.com>>
> > > Cc: Justen, Jordan L 
> > > mailto:jordan.l.jus...@intel.com>>;
> > > kra...@redhat.com;
> > > devel@edk2.groups.io
> > > Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices for CloudHv
> > >
> > > Hi Jiewen,
> > >
> > > We patched Cloud Hypervisor to support both I/O ports for at least
> > > two versions. And of course at some point users will have to rely
> > > on
> > > latest CloudHv binary (which we always build).
> > >
> > > One improvement could be to retrieve the I/O ports addresses from
> > > the
> > > FADT table. Do you know if there's some code already doing that in
> > > OVMF?
> > >
> > > Thanks,
> > > Sebastien
> > > From: Yao, Jiewen mailto:jiewen@intel.com>>
> > > Sent: Tuesday, September 6, 2022 4:27 PM
> > > To: Boeuf, Sebastien 
> > > mailto:sebastien.bo...@intel.com>>
> > > Cc: Justen, Jordan L 
> > > mailto:jordan.l.jus...@intel.com>>;kra...@redhat.com
> > > mailto:kra...@redhat.com>>;devel@edk2.groups.io 
> > > mailto:devel@edk2.groups.io>>
> > > Subject: RE: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices for CloudHv
> > >
> > > This seems a big incompatible change.
> > >
> > > I feel this is weird to hardcode the configuration here.
> > >
> > > How the OVMF binary knows it runs on a new CloudHv or old CloudHv?
> > >
> > > Can we have a mechanism to detect the data at runtime? E.g. read
> > > some
> > > PCI register ?
> > >
> > >
> > >
> > 

Re: [edk2-devel] MdeModulePkg: Use configurable PCD for AHCI command retries

[Wu, Hao A]

Thanks for the patch.

Could you help to:
1. Add the information of this new PCD in MdeModulePkg.uni
2. Keep the macro AHCI_COMMAND_RETRIES in AhciMode.h and update its definition 
to:
#define AHCI_COMMAND_RETRIES  PcdGet32 (PcdAhciCommandRetryCount)

Best Regards,
Hao Wu

From: devel@edk2.groups.io  On Behalf Of Anbazhagan, 
Baraneedharan via groups.io
Sent: Thursday, September 8, 2022 12:44 AM
To: devel@edk2.groups.io
Cc: Gao, Liming ; Wu, Hao A ; Ni, 
Ray 
Subject: [edk2-devel] MdeModulePkg: Use configurable PCD for AHCI command 
retries

https://bugzilla.tianocore.org/show_bug.cgi?id=4011

AHCI commands are retried internally which prevents platform feature
like drive password to process correctly entered password on subsequent
attempts. PCD allows the platform to determine the number of retries.

Signed-off-by: Baraneedharan Anbazhagan 
anbazha...@hp.com
---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c   | 6 +++---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h   | 2 --
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf | 3 ++-
MdeModulePkg/MdeModulePkg.dec  | 4 
4 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index a240be940d..bf8105d4e7 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -983,7 +983,7 @@ AhciPioTransfer (
   CmdList.AhciCmdCfl = EFI_AHCI_FIS_REGISTER_H2D_LENGTH / 4;
   CmdList.AhciCmdW   = Read ? 0 : 1;

-  for (Retry = 0; Retry < AHCI_COMMAND_RETRIES; Retry++) {
+  for (Retry = 0; Retry < PcdGet32 (PcdAhciCommandRetryCount); Retry++) {
 AhciBuildCommand (
   PciIo,
   AhciRegisters,
@@ -1190,7 +1190,7 @@ AhciDmaTransfer (
 }

 gBS->RestoreTPL (OldTpl);
-for (Retry = 0; Retry < AHCI_COMMAND_RETRIES; Retry++) {
+for (Retry = 0; Retry < PcdGet32 (PcdAhciCommandRetryCount); Retry++) {
   AhciBuildCommand (
 PciIo,
 AhciRegisters,
@@ -1385,7 +1385,7 @@ AhciNonDataTransfer (

   CmdList.AhciCmdCfl = EFI_AHCI_FIS_REGISTER_H2D_LENGTH / 4;

-  for (Retry = 0; Retry < AHCI_COMMAND_RETRIES; Retry++) {
+  for (Retry = 0; Retry < PcdGet32 (PcdAhciCommandRetryCount); Retry++) {
 AhciBuildCommand (
   PciIo,
   AhciRegisters,
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
index 7802ebd200..66256bf718 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
@@ -193,8 +193,6 @@ typedef union {
#define   AHCI_PORT_DEVSLP_DITO_MASK  0x01FF8000
#define   AHCI_PORT_DEVSLP_DM_MASK0x1E00

-#define AHCI_COMMAND_RETRIES  5
-
#pragma pack(1)
//
// Command List structure includes total 32 entries.
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
index a3e42a9ab4..78caa3c458 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
@@ -65,7 +65,8 @@
   gEdkiiAtaAtapiPolicyProtocolGuid  ## CONSUMES

 [Pcd]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable   ## SOMETIMES_CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable  ## 
SOMETIMES_CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAhciCommandRetryCount   ## 
SOMETIMES_CONSUMES

 # [Event]
# EVENT_TYPE_PERIODIC_TIMER ## SOMETIMES_CONSUMES
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 7d98910832..58e6ab0048 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -1574,6 +1574,10 @@
   # @Prompt SD/MMC Host Controller Operations Timeout (us).
   
gEfiMdeModulePkgTokenSpaceGuid.PcdSdMmcGenericTimeoutValue|100|UINT32|0x0031

+  ## The Retry Count of AHCI command if there is a failure
+  # @Prompt The value of Retry Count,  Default value is 5.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAhciCommandRetryCount|5|UINT32|0x0032
+
[PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
   ## This PCD defines the Console output row. The default value is 25 
according to UEFI spec.
   #  This PCD could be set to 0 then console output would be at max column and 
max row.
--
2.36.1.windows.1




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Re: [edk2-devel] [PATCH V3 08/12] OvmfPkg: Introduce lazy accept in PlatformInitLib and PlatformPei

[Min Xu]

On September 7, 2022 1:37 PM, Gerd Hoffmann wrote:
> On Mon, Sep 05, 2022 at 04:35:02PM +0800, Min Xu wrote:
> > From: Min M Xu 
> >
> > RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3937
> >
> > There are below major changes in PlatformInitLib/PlatformPei 1.
> > ProcessHobList
> >   The unaccepted memory is accepted if it is under 4G address.
> 
> Good.
> 
> >   If an EFI_RESOURCE_MEMORY_UNACCEPTED memory region is cross the
> 4G
> >   address, it will be split into 2 parts and only the left one (<4G)
> >   is accepted.
> 
> Looks pointless to me.  I doubt this will ever happen given the address space
> just below 4G is populated with firmware rom/flash, lapic, ioapic and other
> devices.
Yes, you're right. It will be fixed in the next version.

Thanks
Min


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Re: [edk2-devel] [PATCH V3 09/12] OvmfPkg: Update ConstructFwHobList for lazy accept

[Min Xu]

On September 7, 2022 1:42 PM, Gerd Hoffmann wrote:
>   Hi,
> 
> > +  //
> > +  // This memory region is split into 2 parts. The left part is 
> > accepted.
> > +  //
> > +  PhysicalEnd= MaxAcceptedMemoryAddress;
> > +  ResourceLength = PhysicalEnd - PhysicalStart;
> 
> Same comment here.  Can't happen when all memory below 4G is accepted,
> and I think MaxAcceptedMemoryAddress is not needed either.
> 
It may happen. For example, a TD VM is created with 2G memory, then the 
MaxAcceptedMemoryAddress is 0x8000. If it is created with 1G memory, 
MaxAcceptedMemoryAddress is 0x4000. This information can be retrieved by 
walking thru the TD-Hob and read the largest address of the unaccept-mem-region 
under 4G. 
But I think it's easier to record the value in MaxAcceptedMemoryAddress. And it 
can be used when not all memory below 4G is accepted.

Thanks
Min


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Re: [edk2-devel][edk2-platforms][PATCH v2 4/6] S3FeaturePkg: Implement working S3 resume

[Isaac Oram]

It seems like:
  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf

Are not S3 specific and belong with common stage 4 or 5 content.  It seems many 
features could require them.  DSC can deal with duplicates, but FDF would fail 
if there were collisions.

S3Feature.dsc
- Remove commented out code

Regards,
Isaac

-Original Message-
From: Benjamin Doron  
Sent: Tuesday, September 6, 2022 10:02 AM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Sinha, Ankit 
; Chaganty, Rangasai V ; 
Oram, Isaac W ; Gao, Liming 
Subject: [edk2-devel][edk2-platforms][PATCH v2 4/6] S3FeaturePkg: Implement 
working S3 resume

Follow-up commits to MinPlatform (PeiFspWrapperHobProcessLib for
memory) and FSP-related board libraries (policy overrides) required for 
successful S3 resume.

Factored allocation logic into new module to avoid MinPlatform dependency on 
S3Feature package.

TODO: Can optimise required size.

Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Liming Gao 
Signed-off-by: Benjamin Doron 
---
 .../S3FeaturePkg/Include/PostMemory.fdf   |  13 ++
 .../S3FeaturePkg/Include/PreMemory.fdf|   8 +-
 .../S3FeaturePkg/Include/S3Feature.dsc|  38 -
 .../S3FeaturePkg/S3Dxe/S3Dxe.c| 155 ++
 .../S3FeaturePkg/S3Dxe/S3Dxe.inf  |  49 ++
 .../S3FeaturePkg/S3Pei/S3Pei.c|  83 +-
 .../S3FeaturePkg/S3Pei/S3Pei.inf  |   8 +-
 .../Include/AcpiS3MemoryNvData.h  |  22 +++
 8 files changed, 365 insertions(+), 11 deletions(-)  create mode 100644 
Features/Intel/PowerManagement/S3FeaturePkg/S3Dxe/S3Dxe.c
 create mode 100644 Features/Intel/PowerManagement/S3FeaturePkg/S3Dxe/S3Dxe.inf
 create mode 100644 Platform/Intel/MinPlatformPkg/Include/AcpiS3MemoryNvData.h

diff --git a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf 
b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf
index 9e17f853c630..7f630908fa2c 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PostMemory.fdf
@@ -2,7 +2,20 @@
 #  FDF file for post-memory S3 advanced feature modules. # # Copyright (c) 
2019, Intel Corporation. All rights reserved.+# Copyright (c) 2022, Baruch 
Binyamin Doron. # # SPDX-License-Identifier: BSD-2-Clause-Patent # ##++## 
Dependencies+  INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf+  
INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf++## Save-state 
module stack+  INF S3FeaturePkg/S3Dxe/S3Dxe.inf+  INF 
MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf+  INF 
UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf++## Restore-state module stack+  INF 
MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.infdiff 
--git a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf 
b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf
index fdd16a4e0356..e130fa5f098d 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/Include/PreMemory.fdf
@@ -2,9 +2,15 @@
 #  FDF file for pre-memory S3 advanced feature modules. # # Copyright (c) 
2019, Intel Corporation. All rights reserved.+# Copyright (c) 2022, Baruch 
Binyamin Doron. # # SPDX-License-Identifier: BSD-2-Clause-Patent # ## -INF 
S3FeaturePkg/S3Pei/S3Pei.inf+## Dependencies+  INF 
S3FeaturePkg/S3Pei/S3Pei.inf+  INF 
UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf++## Restore-state 
module stack+  INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.infdiff 
--git a/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc 
b/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc
index cc34e785076a..d8bfc7909413 100644
--- a/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc
+++ b/Features/Intel/PowerManagement/S3FeaturePkg/Include/S3Feature.dsc
@@ -7,6 +7,7 @@
 # for the build infrastructure. # # Copyright (c) 2019 - 2021, Intel 
Corporation. All rights reserved.+# Copyright (c) 2022, Baruch Binyamin 
Doron. # # SPDX-License-Identifier: BSD-2-Clause-Patent #@@ -25,6 +26,10 @@
 !error "DXE_ARCH must be specified to build this feature!"   !endif 
+[PcdsFixedAtBuild]+  # Attempts to improve performance at the cost of more 
DRAM usage+  gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|TRUE+ 

 # # Library Class section - list of all Library Classes needed by this 
feature.@@ -32,7 +37,14 @@
 

  [LibraryClasses.common.PEIM]-  
SmmAccessLib|IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLib/PeiSmmAccessLib.inf+
  

Re: [edk2-devel] [PATCH V2 01/14] MdeModulePkg: Add PrePiHob.h

[Min Xu]

On September 7, 2022 1:31 PM, Gerd Hoffmann wrote:
> On Sun, Sep 04, 2022 at 11:34:14AM +, Xu, Min M wrote:
> > On September 1, 2022 11:48 PM, Gerd Hoffmann wrote:
> > >   Hi,
> > >
> > > > EFI_RESOURCE_MEMORY_UNACCEPTED is defined for unaccepted
> memory.
> > > > But this defitinion has not been officially in the PI spec.
> > >
> > > I think this has just changed with uefi spec 2.10 released in August.
> > >
> > I carefully checked the UEFI spec 2.10 but didn't find the unaccepted
> related changes in version 2.10. The latest one is in version 2.9. " 2134
> Introduce unaccepted memory type "
> 
> Hmm, seems PI spec has its own memory types instead if just using the UEFI
> spec ones so unaccepted memory being in UEFI doesn't help here as long as
> we don't have a new PI spec yet.  Is there any ETA for the next PI spec 
> update?
> 
I have no idea of the ETA.

Thanks
Min


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Re: [edk2-devel][edk2-platforms][PATCH v2 3/6] IntelSiliconPkg/Feature/SmmControl: Implement PPI with chipset support

[Isaac Oram]

Reviewed-by: Isaac Oram 

-Original Message-
From: Benjamin Doron  
Sent: Tuesday, September 6, 2022 10:02 AM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Sinha, Ankit 
; Ni, Ray ; Chaganty, Rangasai V 
; Oram, Isaac W 
Subject: [edk2-devel][edk2-platforms][PATCH v2 3/6] 
IntelSiliconPkg/Feature/SmmControl: Implement PPI with chipset support

S3 resume may require communication with SMM, for which we need the SmmControl 
PPI. Therefore, port the DXE drivers to a library, like there is for SMM Access.

Tested, working on Kabylake. Further testing required after the refactor for 
compatibility.

Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Cc: Isaac Oram 
Signed-off-by: Benjamin Doron 
---
 .../PeiSmmControlLib/PeiSmmControlLib.c   | 309 ++
 .../PeiSmmControlLib/PeiSmmControlLib.inf |  34 ++
 .../Include/Library/SmmControlLib.h   |  26 ++
 .../Intel/IntelSiliconPkg/IntelSiliconPkg.dec |   4 +
 4 files changed, 373 insertions(+)
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.c
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.inf
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Include/Library/SmmControlLib.h

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.c
 
b/Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmControlLib/PeiSmmControlLib.c
new file mode 100644
index ..cc6c7f8fe672
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmControl/Library/PeiSmmCon
+++ trolLib/PeiSmmControlLib.c
@@ -0,0 +1,309 @@
+/** @file+  This is to publish the SMM Control Ppi instance.++  Copyright (c) 
2019 - 2020, Intel Corporation. All rights reserved.+  
SPDX-License-Identifier: BSD-2-Clause-Patent++**/+#include 
+#include +#include 
+#include +#include 
+#include ++#include 
+#include ++#define 
SMM_CONTROL_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('i', '4', 's', 'c')++typedef 
struct {+  UINTN   Signature;+  EFI_HANDLE  
Handle;+  EFI_PEI_MM_CONTROL_PPI  SmmControl;+} 
SMM_CONTROL_PRIVATE_DATA;++#define SMM_CONTROL_PRIVATE_DATA_FROM_THIS(a) \+ 
   CR (a, \+  SMM_CONTROL_PRIVATE_DATA, \+  SmmControl, \+  
SMM_CONTROL_DEV_SIGNATURE \+  )++//+// Common registers:+//+//+// APM 
Registers+//+#define R_PCH_APM_CNT 0xB2+//+// ACPI 
and legacy I/O register offsets from ACPIBASE+//+#define R_PCH_ACPI_PM1_STS 
   0x00+#define B_PCH_ACPI_PM1_STS_PRBTNOR
BIT11++#define R_PCH_SMI_EN  0x30++#define 
R_PCH_SMI_STS 0x34+#define B_PCH_SMI_STS_APM
 BIT5+#define B_PCH_SMI_EN_APMC 
BIT5+#define B_PCH_SMI_EN_EOS  BIT1+#define 
B_PCH_SMI_EN_GBL_SMI  BIT0++/**+  Trigger the software 
SMI++  @param[in] Data The value to be set on the software SMI 
data port++  @retval EFI_SUCCESS Function completes 
successfully+**/+EFI_STATUS+EFIAPI+SmmTrigger (+  UINT8   Data+  )+{+  UINT16  
ABase;+  UINT32  OutputData;+  UINT32  OutputPort;++  ABase = FixedPcdGet16 
(PcdAcpiBaseAddress);++  ///+  /// Enable the APMC SMI+  ///+  OutputPort  = 
ABase + R_PCH_SMI_EN;+  OutputData  = IoRead32 ((UINTN) OutputPort);+  
OutputData |= (B_PCH_SMI_EN_APMC | B_PCH_SMI_EN_GBL_SMI);+  DEBUG (+
(DEBUG_EVENT,+ "The SMI Control Port at address %x will be written to 
%x.\n",+ OutputPort,+ OutputData)+);+  IoWrite32 (+(UINTN) 
OutputPort,+(UINT32) (OutputData)+);++  OutputPort  = R_PCH_APM_CNT;+  
OutputData  = Data;++  ///+  /// Generate the APMC SMI+  ///+  IoWrite8 (+
(UINTN) OutputPort,+(UINT8) (OutputData)+);++  return 
EFI_SUCCESS;+}++/**+  Clear the SMI status+++  @retval EFI_SUCCESS 
The function completes successfully+  @retval EFI_DEVICE_ERRORSomething 
error occurred+**/+EFI_STATUS+EFIAPI+SmmClear (+  VOID+  )+{+  UINT16  ABase;+  
UINT32  OutputData;+  UINT32  OutputPort;++  ABase = FixedPcdGet16 
(PcdAcpiBaseAddress);++  ///+  /// Clear the Power Button Override Status Bit, 
it gates EOS from being set.+  ///+  OutputPort  = ABase + R_PCH_ACPI_PM1_STS;+ 
 OutputData  = B_PCH_ACPI_PM1_STS_PRBTNOR;+  DEBUG (+(DEBUG_EVENT,+ 
"The PM1 Status Port at address %x will be written to %x.\n",+ OutputPort,+ 
OutputData)+);+  IoWrite16 (+(UINTN) OutputPort,+(UINT16) 
(OutputData)+);++  ///+  /// Clear the APM SMI Status Bit+  ///+  
OutputPort  = ABase + R_PCH_SMI_STS;+  OutputData  = B_PCH_SMI_STS_APM;+  DEBUG 
(+(DEBUG_EVENT,+ "The SMI Status Port at address %x will be written to 
%x.\n",+ OutputPort,+ OutputData)+);+  IoWrite32 (+(UINTN) 

Re: [edk2-devel][edk2-platforms][PATCH v2 2/6] IntelSiliconPkg/Feature/SmmAccess: Implement PPI with chipset support

[Isaac Oram]

Reviewed-by: Isaac Oram 

-Original Message-
From: Benjamin Doron  
Sent: Tuesday, September 6, 2022 10:02 AM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Sinha, Ankit 
; Ni, Ray ; Chaganty, Rangasai V 
; Oram, Isaac W 
Subject: [edk2-devel][edk2-platforms][PATCH v2 2/6] 
IntelSiliconPkg/Feature/SmmAccess: Implement PPI with chipset support

SMRAM must be opened to retrieve the lockbox for S3, and SMM communication 
depends on this PPI. For security purposes, SMRAM lock must be performed before 
EndOfPei (although FSP notify performs lockdown too).

It seems to me that this library is generic and applicable to all Intel 
platforms in the tree using the MCH SMRAMC register.

Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Ray Ni 
Cc: Rangasai V Chaganty 
Cc: Isaac Oram 
Signed-off-by: Benjamin Doron 
---
 .../PeiSmmAccessLibSmramc/PeiSmmAccessLib.c   | 430 ++
 .../PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf |  36 ++
 2 files changed, 466 insertions(+)
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.c
 create mode 100644 
Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.inf

diff --git 
a/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.c
 
b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAccessLibSmramc/PeiSmmAccessLib.c
new file mode 100644
index ..5b472bf86abf
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/SmmAccess/Library/PeiSmmAcce
+++ ssLibSmramc/PeiSmmAccessLib.c
@@ -0,0 +1,430 @@
+/** @file+  This is to publish the SMM Access Ppi instance.++  Copyright (c) 
2019 - 2020, Intel Corporation. All rights reserved.+  
SPDX-License-Identifier: BSD-2-Clause-Patent++**/+#include 
+#include +#include 
+#include +#include 
+#include +#include 
+#include ++#include 
+#include ++#define 
SMM_ACCESS_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('4', '5', 's', 'a')++///+/// 
Private data+///+typedef struct {+  UINTN Signature;+  
EFI_HANDLEHandle;+  EFI_PEI_MM_ACCESS_PPI SmmAccess;+  //+  // 
Local Data for SMM Access interface goes here+  //+  UINTN 
NumberRegions;+  EFI_SMRAM_DESCRIPTOR  *SmramDesc;+} 
SMM_ACCESS_PRIVATE_DATA;++#define SMM_ACCESS_PRIVATE_DATA_FROM_THIS(a) \+   
 CR (a, \+  SMM_ACCESS_PRIVATE_DATA, \+  SmmAccess, \+  
SMM_ACCESS_PRIVATE_DATA_SIGNATURE \+  )++//+// Common registers:+//+// 
DEVICE 0 (Memory Controller Hub)+//+#define SA_MC_BUS  0x00+#define 
SA_MC_DEV  0x00+#define SA_MC_FUN  0x00+///+/// 
Description:+///  The SMRAMC register controls how accesses to Compatible SMRAM 
spaces are treated.  The Open, Close and Lock bits function only when G_SMRAME 
bit is set to 1.  Also, the Open bit must be reset before the Lock bit is 
set.+///+#define R_SA_SMRAMC  (0x88)+#define B_SA_SMRAMC_D_LCK_MASK 
(0x10)+#define B_SA_SMRAMC_D_CLS_MASK (0x20)+#define 
B_SA_SMRAMC_D_OPEN_MASK(0x40)++/**+  This routine accepts a request to 
"open" a region of SMRAM.  The+  region could be legacy ABSEG, HSEG, or TSEG 
near top of physical memory.+  The use of "open" means that the memory is 
visible from all PEIM+  and SMM agents.++  @param[in] PeiServices -  
General purpose services available to every PEIM.+  @param[in] This 
   -  Pointer to the SMM Access Interface.+  @param[in] DescriptorIndex -  
Region of SMRAM to Open.++  @retval EFI_SUCCESS-  The region was 
successfully opened.+  @retval EFI_DEVICE_ERROR   -  The region could not 
be opened because locked by+chipset.+  
@retval EFI_INVALID_PARAMETER  -  The descriptor index was out of 
bounds.+**/+EFI_STATUS+EFIAPI+Open (+  IN EFI_PEI_SERVICES   
**PeiServices,+  IN EFI_PEI_MM_ACCESS_PPI  *This,+  IN UINTN
  DescriptorIndex+  )+{+  SMM_ACCESS_PRIVATE_DATA *SmmAccess;+  UINT8   
Index;+  UINT64  Address;+  UINT8   
SmramControl;++  SmmAccess = SMM_ACCESS_PRIVATE_DATA_FROM_THIS (This);+  if 
(DescriptorIndex >= SmmAccess->NumberRegions) {+DEBUG ((DEBUG_WARN, "SMRAM 
region out of range\n"));++return EFI_INVALID_PARAMETER;+  } else if 
(SmmAccess->SmramDesc[DescriptorIndex].RegionState & EFI_SMRAM_LOCKED) {+
//+// Cannot open a "locked" region+//+DEBUG ((DEBUG_WARN, "Cannot 
open a locked SMRAM region\n"));++return EFI_DEVICE_ERROR;+  }++  ///+  /// 
BEGIN CHIPSET CODE+  ///+  ///+  /// SMRAM register is PCI 0:0:0:88, SMRAMC (8 
bit)+  ///+  Address = PCI_SEGMENT_LIB_ADDRESS (0, SA_MC_BUS, SA_MC_DEV, 
SA_MC_FUN, R_SA_SMRAMC);+  SmramControl = PciSegmentRead8 (Address);+  ///+  
///  Is SMRAM locked?+  ///+  if ((SmramControl & B_SA_SMRAMC_D_LCK_MASK) != 0) 
{+///+/// Cannot Open a locked region+///+for (Index = 0; Index 
< 

Re: [edk2-devel][edk2-platforms][PATCH v2 1/6] {Platform,Silicon}/Intel: Move PcdAcpiBaseAddress definition

[Chaganty, Rangasai V]

Reviewed-by: Sai Chaganty 

-Original Message-
From: Benjamin Doron  
Sent: Tuesday, September 06, 2022 10:02 AM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V ; Oram, Isaac W 
; Desimone, Nathaniel L 
; Sinha, Ankit ; Ni, Ray 
; Chiu, Chasel ; Luo, Heng 

Subject: [edk2-devel][edk2-platforms][PATCH v2 1/6] {Platform,Silicon}/Intel: 
Move PcdAcpiBaseAddress definition

All these platforms have an ABase, so move the definition to enable common 
silicon code in IntelSiliconPkg. Otherwise, library shims would be required, 
because PCDs are GUID-ed and package DEC specific.

Cc: Rangasai V Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Ray Ni 
Cc: Chasel Chiu 
Cc: Sai Chaganty 
Cc: Heng Luo 
Signed-off-by: Benjamin Doron 
---
 .../CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc  | 1 +
 .../Features/Tbt/TbtInit/Smm/TbtSmm.inf  | 2 +-
 .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc| 1 +
 .../KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf | 2 +-
 .../Library/BasePlatformHookLib/BasePlatformHookLib.inf  | 2 +-
 .../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc  | 1 +
 .../Library/BasePlatformHookLib/BasePlatformHookLib.inf  | 2 +-
 .../KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc| 1 +
 .../TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc  | 1 +
 .../Features/Tbt/TbtInit/Smm/TbtSmm.inf  | 2 +-
 .../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc | 1 +
 .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc  | 1 +
 Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc  | 1 +
 .../Library/PeiSiliconInitLib/PeiSiliconInitLib.inf  | 5 +++--
 .../Pch/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf  | 3 ++-
 .../PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibCnl.inf | 2 +-
 Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 1 -
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec| 4 
 Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc  | 1 +
 .../Library/PeiSiliconInitLib/PeiSiliconInitLib.inf  | 2 +-
 .../Pch/Library/PeiDxeSmmPchPmcLib/PeiDxeSmmPchPmcLib.inf| 3 ++-
 .../Pch/Library/PeiPchPolicyLib/PeiPchPolicyLib.inf  | 2 +-
 .../KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf   | 2 +-
 Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec   | 1 -
 .../IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf  | 3 ++-
 .../PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf| 3 ++-
 Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec  | 1 -
 Silicon/Intel/TigerlakeSiliconPkg/TigerlakeSiliconPkg.dsc| 1 +
 28 files changed, 34 insertions(+), 18 deletions(-)

diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc 
b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
index 79924f1fda7f..81dc0747fab8 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd
+++ .dsc
@@ -65,6 +65,7 @@
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000   
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x1000+  
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800   #   # PCIe Reserved 
Memory Space Range   #diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf 
b/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
index e3fdd3981653..c4dd863c3ee8 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtS
+++ mm.inf
@@ -49,7 +49,7 @@
   gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength  ## CONSUMES  
[FixedPcd]-  gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress   ## CONSUMES+  
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress## CONSUMES  
[Sources]   TbtSmiHandler.hdiff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
index a4ea524e26bc..3ed7aa0a2b10 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg
+++ Pcd.dsc
@@ -241,6 +241,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140 !endif   
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000+  
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800
gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE   
gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf 
b/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
index e6c185a4bd91..13116488eaa0 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+++ 

Re: [edk2-devel][edk2-platforms][PATCH v2 1/6] {Platform,Silicon}/Intel: Move PcdAcpiBaseAddress definition

[Isaac Oram]

Reviewed-by: Isaac Oram 

-Original Message-
From: Benjamin Doron  
Sent: Tuesday, September 6, 2022 10:02 AM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V ; Oram, Isaac W 
; Desimone, Nathaniel L 
; Sinha, Ankit ; Ni, Ray 
; Chiu, Chasel ; Luo, Heng 

Subject: [edk2-devel][edk2-platforms][PATCH v2 1/6] {Platform,Silicon}/Intel: 
Move PcdAcpiBaseAddress definition

All these platforms have an ABase, so move the definition to enable common 
silicon code in IntelSiliconPkg. Otherwise, library shims would be required, 
because PCDs are GUID-ed and package DEC specific.

Cc: Rangasai V Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Ankit Sinha 
Cc: Ray Ni 
Cc: Chasel Chiu 
Cc: Sai Chaganty 
Cc: Heng Luo 
Signed-off-by: Benjamin Doron 
---
 .../CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc  | 1 +
 .../Features/Tbt/TbtInit/Smm/TbtSmm.inf  | 2 +-
 .../AspireVn7Dash572G/OpenBoardPkgPcd.dsc| 1 +
 .../KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf | 2 +-
 .../Library/BasePlatformHookLib/BasePlatformHookLib.inf  | 2 +-
 .../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc  | 1 +
 .../Library/BasePlatformHookLib/BasePlatformHookLib.inf  | 2 +-
 .../KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc| 1 +
 .../TigerlakeOpenBoardPkg/TigerlakeURvp/OpenBoardPkgPcd.dsc  | 1 +
 .../Features/Tbt/TbtInit/Smm/TbtSmm.inf  | 2 +-
 .../WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc | 1 +
 .../WhiskeylakeURvp/OpenBoardPkgPcd.dsc  | 1 +
 Silicon/Intel/CoffeelakeSiliconPkg/CoffeelakeSiliconPkg.dsc  | 1 +
 .../Library/PeiSiliconInitLib/PeiSiliconInitLib.inf  | 5 +++--
 .../Pch/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf  | 3 ++-
 .../PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibCnl.inf | 2 +-
 Silicon/Intel/CoffeelakeSiliconPkg/SiPkg.dec | 1 -
 Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec| 4 
 Silicon/Intel/KabylakeSiliconPkg/KabylakeSiliconPkg.dsc  | 1 +
 .../Library/PeiSiliconInitLib/PeiSiliconInitLib.inf  | 2 +-
 .../Pch/Library/PeiDxeSmmPchPmcLib/PeiDxeSmmPchPmcLib.inf| 3 ++-
 .../Pch/Library/PeiPchPolicyLib/PeiPchPolicyLib.inf  | 2 +-
 .../KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.inf   | 2 +-
 Silicon/Intel/KabylakeSiliconPkg/SiPkg.dec   | 1 -
 .../IpBlock/Pmc/Library/PeiDxeSmmPmcLib/PeiDxeSmmPmcLib.inf  | 3 ++-
 .../PeiDxeSmmPmcPrivateLib/PeiDxeSmmPmcPrivateLibVer2.inf| 3 ++-
 Silicon/Intel/TigerlakeSiliconPkg/SiPkg.dec  | 1 -
 Silicon/Intel/TigerlakeSiliconPkg/TigerlakeSiliconPkg.dsc| 1 +
 28 files changed, 34 insertions(+), 18 deletions(-)

diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc 
b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
index 79924f1fda7f..81dc0747fab8 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/CometlakeOpenBoardPkg/CometlakeURvp/OpenBoardPkgPcd
+++ .dsc
@@ -65,6 +65,7 @@
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000   
gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength|0x1000+  
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800   #   # PCIe Reserved 
Memory Space Range   #diff --git 
a/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf 
b/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
index e3fdd3981653..c4dd863c3ee8 100644
--- a/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+++ b/Platform/Intel/CometlakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtS
+++ mm.inf
@@ -49,7 +49,7 @@
   gMinPlatformPkgTokenSpaceGuid.PcdPciExpressRegionLength  ## CONSUMES  
[FixedPcd]-  gSiPkgTokenSpaceGuid.PcdAcpiBaseAddress   ## CONSUMES+  
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress## CONSUMES  
[Sources]   TbtSmiHandler.hdiff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc 
b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
index a4ea524e26bc..3ed7aa0a2b10 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/AspireVn7Dash572G/OpenBoardPkg
+++ Pcd.dsc
@@ -241,6 +241,7 @@
   gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140 !endif   
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xE000+  
gIntelSiliconPkgTokenSpaceGuid.PcdAcpiBaseAddress|0x1800
gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE   
gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01diff --git 
a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf 
b/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
index e6c185a4bd91..13116488eaa0 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Features/Tbt/TbtInit/Smm/TbtSmm.inf
+++ 

Re: [edk2-devel] [PATCH v2 1/1] Features/Intel/OutOfBandManagement/AsfFeaturePkg: Add initial package

[Isaac Oram]

Pushed as a81614e456..341d41ac40

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Isaac Oram
Sent: Wednesday, September 7, 2022 3:37 PM
To: CrystalLee [李怡萱] ; devel@edk2.groups.io
Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L 
; Gao, Liming ; 
DavidHsieh [謝坤智] 
Subject: Re: [edk2-devel] [PATCH v2 1/1] 
Features/Intel/OutOfBandManagement/AsfFeaturePkg: Add initial package

Reviewed-by: Isaac Oram 

Looks good, thank you.

-Original Message-
From: CrystalLee [李怡萱]  
Sent: Monday, September 5, 2022 5:15 AM
To: devel@edk2.groups.io
Cc: Oram, Isaac W ; Chaganty, Rangasai V 
; Desimone, Nathaniel L 
; Gao, Liming ; 
DavidHsieh [謝坤智] ; CrystalLee [李怡萱] 
Subject: [PATCH v2 1/1] Features/Intel/OutOfBandManagement/AsfFeaturePkg: Add 
initial package

Add a new feature package for Alert standard format support.

Alert Standard format specification(DSP0136)
REF:https://www.dmtf.org/sites/default/files/standards/documents/DSP0136.pdf

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Liming Gao 
Signed-off-by: CrystalLee 
---
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfAcpiTable.c 
 | 234 
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxe.c   
 | 340 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxeEvent.c  
 | 319 
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfPei/AsfPei.c   
 | 384 
 Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc   
 |   1 +
 Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc 
 |   4 +
 Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc  
 |   2 +
 Features/Intel/AdvancedFeaturePkg/Include/PostMemory.fdf   
 |   4 +
 Features/Intel/AdvancedFeaturePkg/Include/PreMemory.fdf
 |   4 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxe.h   
 |  66 
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxe.inf 
 |  51 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxe.uni 
 |  15 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxeExtra.uni
 |  13 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfFeaturePkg.dec 
 |  47 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfFeaturePkg.dsc 
 |  40 ++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfPei/AsfPei.inf 
 |  51 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfPei/AsfPei.uni 
 |  15 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfPei/AsfPeiExtra.uni
 |  13 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/AsfFeature.dsc
 |  52 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/AsfMessages.h 
 | 104 ++
 
Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/IndustryStandard/Asf.h 
| 145 
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/PostMemory.fdf
 |   8 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/PreMemory.fdf 
 |   8 +
 
Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/Protocol/AsfProtocol.h 
|  57 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Readme.md 
 |  63 
 25 files changed, 2040 insertions(+)

diff --git 
a/Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfAcpiTable.c 
b/Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfAcpiTable.c
new file mode 100644
index 00..7d4a864e2c
--- /dev/null
+++ b/Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfAcpiTable.c
@@ -0,0 +1,234 @@
+/** @file

+  Asf Acpi table

+

+  Install Asf Acpi table

+

+  Copyright (c) 1985 - 2022, AMI. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+

+// ASF Table Definitions

+// Below array size define should follow mAsfAcpiTable setting

+#define ASF_RCTL_DEVICES_ARRAY_LENGTH  4

+#define ASF_ADDR_DEVICE_ARRAY_LENGTH   11

+

+#pragma pack(push,1)

+

+//

+// Alert Remote Control System Actions.

+//

+typedef struct {

+  EFI_ACPI_ASF_RCTL   AsfRctl;

+  EFI_ACPI_ASF_CONTROLDATAControlDataArray[ASF_RCTL_DEVICES_ARRAY_LENGTH];

+} ACPI_ASF_RCTL_ALL;

+

+//

+// SmBus Devices with fixed addresses.

+//

+typedef struct {

+  EFI_ACPI_ASF_ADDRAsfAddr;

+  UINT8FixedSmBusAddresses[ASF_ADDR_DEVICE_ARRAY_LENGTH];

+} ACPI_ASF_ADDR_ALL;

+

+//

+// ACPI 1.0 Structure for ASF Descriptor Table.

+//

+typedef struct {

+  EFI_ACPI_SDT_HEADERHeader;

+  EFI_ACPI_ASF_INFO  AsfInfo;

+  ACPI_ASF_RCTL_ALL  AsfRctlAll;

+  EFI_ACPI_ASF_RMCP  AsfRmcp;

+  ACPI_ASF_ADDR_ALL  AsfAddrAll;

+} ASF_DESCRIPTION_TABLE;

+

+#pragma pack(pop)

+

+#define 

Re: [edk2-devel] [PATCH v2 1/1] Features/Intel/OutOfBandManagement/AsfFeaturePkg: Add initial package

[Isaac Oram]

Reviewed-by: Isaac Oram 

Looks good, thank you.

-Original Message-
From: CrystalLee [李怡萱]  
Sent: Monday, September 5, 2022 5:15 AM
To: devel@edk2.groups.io
Cc: Oram, Isaac W ; Chaganty, Rangasai V 
; Desimone, Nathaniel L 
; Gao, Liming ; 
DavidHsieh [謝坤智] ; CrystalLee [李怡萱] 
Subject: [PATCH v2 1/1] Features/Intel/OutOfBandManagement/AsfFeaturePkg: Add 
initial package

Add a new feature package for Alert standard format support.

Alert Standard format specification(DSP0136)
REF:https://www.dmtf.org/sites/default/files/standards/documents/DSP0136.pdf

Cc: Sai Chaganty 
Cc: Isaac Oram 
Cc: Nate DeSimone 
Cc: Liming Gao 
Signed-off-by: CrystalLee 
---
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfAcpiTable.c 
 | 234 
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxe.c   
 | 340 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxeEvent.c  
 | 319 
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfPei/AsfPei.c   
 | 384 
 Features/Intel/AdvancedFeaturePkg/AdvancedFeaturePkg.dsc   
 |   1 +
 Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeatures.dsc 
 |   4 +
 Features/Intel/AdvancedFeaturePkg/Include/AdvancedFeaturesPcd.dsc  
 |   2 +
 Features/Intel/AdvancedFeaturePkg/Include/PostMemory.fdf   
 |   4 +
 Features/Intel/AdvancedFeaturePkg/Include/PreMemory.fdf
 |   4 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxe.h   
 |  66 
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxe.inf 
 |  51 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxe.uni 
 |  15 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfDxeExtra.uni
 |  13 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfFeaturePkg.dec 
 |  47 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfFeaturePkg.dsc 
 |  40 ++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfPei/AsfPei.inf 
 |  51 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfPei/AsfPei.uni 
 |  15 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfPei/AsfPeiExtra.uni
 |  13 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/AsfFeature.dsc
 |  52 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/AsfMessages.h 
 | 104 ++
 
Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/IndustryStandard/Asf.h 
| 145 
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/PostMemory.fdf
 |   8 +
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/PreMemory.fdf 
 |   8 +
 
Features/Intel/OutOfBandManagement/AsfFeaturePkg/Include/Protocol/AsfProtocol.h 
|  57 +++
 Features/Intel/OutOfBandManagement/AsfFeaturePkg/Readme.md 
 |  63 
 25 files changed, 2040 insertions(+)

diff --git 
a/Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfAcpiTable.c 
b/Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfAcpiTable.c
new file mode 100644
index 00..7d4a864e2c
--- /dev/null
+++ b/Features/Intel/OutOfBandManagement/AsfFeaturePkg/AsfDxe/AsfAcpiTable.c
@@ -0,0 +1,234 @@
+/** @file

+  Asf Acpi table

+

+  Install Asf Acpi table

+

+  Copyright (c) 1985 - 2022, AMI. All rights reserved.

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+**/

+

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+

+// ASF Table Definitions

+// Below array size define should follow mAsfAcpiTable setting

+#define ASF_RCTL_DEVICES_ARRAY_LENGTH  4

+#define ASF_ADDR_DEVICE_ARRAY_LENGTH   11

+

+#pragma pack(push,1)

+

+//

+// Alert Remote Control System Actions.

+//

+typedef struct {

+  EFI_ACPI_ASF_RCTL   AsfRctl;

+  EFI_ACPI_ASF_CONTROLDATAControlDataArray[ASF_RCTL_DEVICES_ARRAY_LENGTH];

+} ACPI_ASF_RCTL_ALL;

+

+//

+// SmBus Devices with fixed addresses.

+//

+typedef struct {

+  EFI_ACPI_ASF_ADDRAsfAddr;

+  UINT8FixedSmBusAddresses[ASF_ADDR_DEVICE_ARRAY_LENGTH];

+} ACPI_ASF_ADDR_ALL;

+

+//

+// ACPI 1.0 Structure for ASF Descriptor Table.

+//

+typedef struct {

+  EFI_ACPI_SDT_HEADERHeader;

+  EFI_ACPI_ASF_INFO  AsfInfo;

+  ACPI_ASF_RCTL_ALL  AsfRctlAll;

+  EFI_ACPI_ASF_RMCP  AsfRmcp;

+  ACPI_ASF_ADDR_ALL  AsfAddrAll;

+} ASF_DESCRIPTION_TABLE;

+

+#pragma pack(pop)

+

+#define EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_REVISION  0x20

+

+ASF_DESCRIPTION_TABLE  mAsfAcpiTable = {

+  {

+EFI_ACPI_ASF_DESCRIPTION_TABLE_SIGNATURE,

+sizeof (ASF_DESCRIPTION_TABLE),

+EFI_ACPI_1_0_ASF_DESCRIPTION_TABLE_REVISION,

+0,  //  Checksum

+

+// OEM identification

+{ 'O',  'E',  'M',  '_', 'I', 'D' },

+

+// OEM table 

Re: [edk2-devel] [RFC PATCH 2/2] Maintainers.txt: Add entry for new RiscVVirt

[Heinrich Schuchardt]

On 9/6/22 19:10, Sunil V L wrote:

Signed-off-by: Sunil V L 
---
  Maintainers.txt | 5 +
  1 file changed, 5 insertions(+)


Acked-by: Heinrich Schuchardt 



diff --git a/Maintainers.txt b/Maintainers.txt
index a4a0e4b907..6fac3369dd 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -381,6 +381,11 @@ F: Silicon/RISC-V/ProcessorPkg/
  M: Sunil V L 
  R: Daniel Schaefer 
  
+QEMU RISC-V virt platform

+F: Platform/Qemu/RiscVVirt/
+M: Sunil V L 
+R: Daniel Schaefer 
+
  Silicon/SiFive
  F: Silicon/SiFive/
  M: Daniel Schaefer 



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Re: [edk2-devel] [RFC PATCH 1/2] RISC-V: Add Qemu Virt platform support

[Heinrich Schuchardt]

On 9/6/22 19:10, Sunil V L wrote:

Add build infrastructure files to boot qemu virt machine.

EDK2 will boot as S-mode payload of opensbi. There is no
integrated opensbi (M-mode firmware) within EDK2 for virt
machine.

It relies on the RISC-V calling convention that M-mode firmware like
opensbi will pass the BootHartId and the DTB to EDK2. This helps
to simplify the platform specific PCD variables required. It
can parse the DTB to know all the details. Even for future ACPI
support, EDK2 can parse the DTB to create static tables.

Signed-off-by: Sunil V L 



Please, provide a list of all prerequisite patches in the cover-letter.

It seems that this patch at least depends on

https://edk2.groups.io/g/devel/message/93261
[RFC PATCH 00/17] Refactor and add RISC-V support in edk2 repo

Best regards

Heinrich


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Re: [edk2-devel] [RFC PATCH 1/2] RISC-V: Add Qemu Virt platform support

[Heinrich Schuchardt]

On 9/6/22 19:10, Sunil V L wrote:

Add build infrastructure files to boot qemu virt machine.

EDK2 will boot as S-mode payload of opensbi. There is no
integrated opensbi (M-mode firmware) within EDK2 for virt
machine.

It relies on the RISC-V calling convention that M-mode firmware like
opensbi will pass the BootHartId and the DTB to EDK2. This helps
to simplify the platform specific PCD variables required. It
can parse the DTB to know all the details. Even for future ACPI
support, EDK2 can parse the DTB to create static tables.

Signed-off-by: Sunil V L 


The patch does not apply cleanly on origin/master:

$ git am ~/temp/0.patch --keep-cr
warning: quoted CRLF detected
Applying: RISC-V: Add Qemu Virt platform support
error: git diff header lacks filename information when removing 1 
leading pathname component (line 13)

Patch failed at 0001 RISC-V: Add Qemu Virt platform support

I guess the problem is with using the wrong transferEncoding.

Please, run
edk2/BaseTools/Scripts/SetupGit.py
on the platform repo and resend with git send-email.

Best regards

Heinrich


---
  Platform/Qemu/RiscVVirt/RiscVVirt.dsc | 713 ++
  Platform/Qemu/RiscVVirt/RiscVVirt.fdf | 379 
  Platform/Qemu/RiscVVirt/RiscVVirt.fdf.inc |  49 ++
  Platform/Qemu/RiscVVirt/VarStore.fdf.inc  |  79 +++
  4 files changed, 1220 insertions(+)
  create mode 100644 Platform/Qemu/RiscVVirt/RiscVVirt.dsc
  create mode 100644 Platform/Qemu/RiscVVirt/RiscVVirt.fdf
  create mode 100644 Platform/Qemu/RiscVVirt/RiscVVirt.fdf.inc
  create mode 100644 Platform/Qemu/RiscVVirt/VarStore.fdf.inc

diff --git a/Platform/Qemu/RiscVVirt/RiscVVirt.dsc 
b/Platform/Qemu/RiscVVirt/RiscVVirt.dsc
new file mode 100644
index 00..3bd030fb87
--- /dev/null
+++ b/Platform/Qemu/RiscVVirt/RiscVVirt.dsc
@@ -0,0 +1,713 @@
+## @file
+#  RISC-V EFI on RiscVVirt RISC-V platform
+#
+#  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Ventana Micro Systems Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+
+[Defines]
+  PLATFORM_NAME  = RiscVVirt
+  PLATFORM_GUID  = 39DADB39-1B21-4867-838E-830B6149B9E0
+  PLATFORM_VERSION   = 0.1
+  DSC_SPECIFICATION  = 0x0001001c
+  OUTPUT_DIRECTORY   = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES= RISCV64
+  BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
+  SKUID_IDENTIFIER   = DEFAULT
+  FLASH_DEFINITION   = Platform/Qemu/RiscVVirt/RiscVVirt.fdf
+
+  #
+  # Enable below options may cause build error or may not work on
+  # the initial version of RISC-V package
+  # Defines for default states.  These can be changed on the command line.
+  # -D FLAG=VALUE
+  #
+  DEFINE SECURE_BOOT_ENABLE  = FALSE
+  DEFINE DEBUG_ON_SERIAL_PORT= TRUE
+
+  #
+  # Network definition
+  #
+  DEFINE NETWORK_SNP_ENABLE   = FALSE
+  DEFINE NETWORK_IP6_ENABLE   = FALSE
+  DEFINE NETWORK_TLS_ENABLE   = TRUE
+  DEFINE NETWORK_HTTP_BOOT_ENABLE = TRUE
+  DEFINE NETWORK_ISCSI_ENABLE = FALSE
+  DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE
+
+[BuildOptions]
+  GCC:RELEASE_*_*_CC_FLAGS   = -DMDEPKG_NDEBUG
+!ifdef $(SOURCE_DEBUG_ENABLE)
+  GCC:*_*_RISCV64_GENFW_FLAGS= --keepexceptiontable
+!endif
+
+[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
+  GCC:  *_*_*_DLINK_FLAGS = -z common-page-size=0x1000
+  MSFT: *_*_*_DLINK_FLAGS = /ALIGN:4096
+
+
+#
+# SKU Identification section - list of all SKU IDs supported by this Platform.
+#
+
+[SkuIds]
+  0|DEFAULT
+
+
+#
+# Library Class section - list of all Library Classes needed by this Platform.
+#
+
+
+!include MdePkg/MdeLibs.dsc.inc
+
+[LibraryClasses]
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+  SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
+  
SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+  
PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+  

[edk2-devel] [PATCH v4 1/1] NetworkPkg/HttpBootDxe: Add Support for HTTPS Proxy Server for HTTP Boot

[Saloni Kasbekar]

Add CONNECT HTTP command to create a tunnel from Proxy to EndPoint Server.
Add support to connect through proxy server using multi-URI DevicePath
sent to the Boot Manager.

Cc: Maciej Rabeda 
Cc: Wu Jiaxin 
Cc: Siyuan Fu 
Cc: Jian J Wang 
Cc: Liming Gao 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/UefiBootManagerLib/BmBoot.c   |  28 +++
 .../UefiBootManagerLib/BmBootDescription.c|   4 +-
 MdePkg/Include/Protocol/Http.h|   5 +
 NetworkPkg/HttpBootDxe/HttpBootClient.c   | 206 -
 NetworkPkg/HttpBootDxe/HttpBootClient.h   |  15 ++
 NetworkPkg/HttpBootDxe/HttpBootDxe.h  |   6 +
 NetworkPkg/HttpBootDxe/HttpBootImpl.c | 211 +-
 NetworkPkg/HttpBootDxe/HttpBootImpl.h |   8 +
 NetworkPkg/HttpBootDxe/HttpBootSupport.c  |  18 +-
 NetworkPkg/HttpBootDxe/HttpBootSupport.h  |   8 +-
 NetworkPkg/HttpDxe/HttpDriver.h   |   2 +
 NetworkPkg/HttpDxe/HttpDxe.inf|   1 +
 NetworkPkg/HttpDxe/HttpImpl.c | 131 +--
 NetworkPkg/HttpDxe/HttpProto.c|  41 ++--
 NetworkPkg/HttpDxe/HttpProto.h|  14 +-
 NetworkPkg/HttpDxe/HttpsSupport.c |  14 +-
 NetworkPkg/Library/DxeHttpLib/DxeHttpLib.c|   5 +
 17 files changed, 607 insertions(+), 110 deletions(-)

diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
index 962892d38f14..fdef1ba292e2 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBoot.c
@@ -1513,6 +1513,9 @@ BmExpandLoadFiles (
   UINTN HandleCount;
   UINTN Index;
   EFI_DEVICE_PATH_PROTOCOL  *Node;
+  URI_DEVICE_PATH   *NullUriPath;
+
+  NullUriPath = NULL;
 
   //
   // Get file buffer from load file instance.
@@ -1545,11 +1548,36 @@ BmExpandLoadFiles (
 
 for (Index = 0; Index < HandleCount; Index++) {
   if (BmMatchHttpBootDevicePath (DevicePathFromHandle (Handles[Index]), 
FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+//
+Handle = Handles[Index];
+goto Done;
+  }
+}
+
+NullUriPath = (URI_DEVICE_PATH *)CreateDeviceNode (
+   MESSAGING_DEVICE_PATH,
+   MSG_URI_DP,
+   (UINT16)(sizeof (URI_DEVICE_PATH))
+   );
+for (Index = 0; Index < HandleCount; Index++) {
+  if (BmMatchHttpBootDevicePath (AppendDevicePathNode 
(DevicePathFromHandle (Handles[Index]), (EFI_DEVICE_PATH_PROTOCOL 
*)NullUriPath), FilePath)) {
+//
+// Matches HTTP Boot Device Path described as
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)/Uri(...)
+//   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)/Uri(...)
+//
 Handle = Handles[Index];
 break;
   }
 }
 
+FreePool (NullUriPath);
+
+Done:
 if (Handles != NULL) {
   FreePool (Handles);
 }
diff --git a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c 
b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
index fac33b9ee915..19b7cd14575f 100644
--- a/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
+++ b/MdeModulePkg/Library/UefiBootManagerLib/BmBootDescription.c
@@ -412,8 +412,8 @@ BmGetNetworkDescription (
   //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)
   //
   // The HTTP device path is like:
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)
-  //   ../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv4(...)[/Dns(...)]/Uri(...)[/Uri(...)]
+  //   
../Mac(...)[/Vlan(...)][/Wi-Fi(...)]/IPv6(...)[/Dns(...)]/Uri(...)[/Uri(...)]
   //
   while (!IsDevicePathEnd (DevicePath) &&
  ((DevicePathType (DevicePath) != MESSAGING_DEVICE_PATH) ||
diff --git a/MdePkg/Include/Protocol/Http.h b/MdePkg/Include/Protocol/Http.h
index 28e622159392..d47092c58e5a 100644
--- a/MdePkg/Include/Protocol/Http.h
+++ b/MdePkg/Include/Protocol/Http.h
@@ -191,6 +191,11 @@ typedef struct {
   /// is assumed. See RFC 3986 for more details on URI syntax.
   ///
   CHAR16 *Url;
+  ///
+  /// The URI of an endpoint host if the Url field contains the address of a 
proxy server.
+  /// This field will be NULL there is no proxy server in the device path.
+  ///
+  CHAR16 *EndPointUrl;
 } EFI_HTTP_REQUEST_DATA;
 
 ///
diff --git a/NetworkPkg/HttpBootDxe/HttpBootClient.c 
b/NetworkPkg/HttpBootDxe/HttpBootClient.c
index 40f64fcb6bf8..2bdf07560382 100644
--- 

Re: [edk2-devel] [PATCH v2] EmbeddedPkg/PrePiMemoryAllocationLib: Check for space on offset allocation

[Jeff Brasen via groups.io]

> -Original Message-
> From: Ard Biesheuvel 
> Sent: Wednesday, September 7, 2022 10:16 AM
> To: Jeff Brasen 
> Cc: devel@edk2.groups.io; ardb+tianoc...@kernel.org;
> abner.ch...@amd.com; g...@danielschaefer.me; quic_llind...@quicinc.com
> Subject: Re: [PATCH v2] EmbeddedPkg/PrePiMemoryAllocationLib: Check for
> space on offset allocation
> 
> External email: Use caution opening links or attachments
> 
> 
> On Wed, 7 Sept 2022 at 17:46, Jeff Brasen  wrote:
> >
> > Update check for enough space to occur prior to alignment offset
> > modification. This prevents a case where EfiFreeMemoryTop could be
> > less than EfiFreeMemoryBottom
> >
> > Signed-off-by: Jeff Brasen 
> 
> Thanks for the respin. I have caught up in the mean time.
> 
> 
> > ---
> >  .../MemoryAllocationLib.c | 53 +++
> >  1 file changed, 30 insertions(+), 23 deletions(-)
> >
> > diff --git
> >
> a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> >
> b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> > index 2cc2a71121..9208826565 100644
> > ---
> >
> a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> > +++
> b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib
> > +++ .c
> > @@ -27,37 +27,44 @@ InternalAllocatePages (
> >
> >Hob.Raw = GetHobList ();
> >
> > -  // Check to see if on 4k boundary
> >Offset = Hob.HandoffInformationTable->EfiFreeMemoryTop & 0xFFF;
> > +  //
> > +  // Verify that there is sufficient memory to satisfy the allocation
> > + and padding prior to updating anything  //  if
> > + ((Hob.HandoffInformationTable->EfiFreeMemoryTop - ((Pages *
> EFI_PAGE_SIZE) + sizeof (EFI_HOB_MEMORY_ALLOCATION)) - Offset) <
> Hob.HandoffInformationTable->EfiFreeMemoryBottom) {
> > +if (Offset != 0) {
> > +  DEBUG ((DEBUG_ERROR, "Offset applied without enough
> space\r\n"));
> > +} else {
> > +  DEBUG ((DEBUG_ERROR, "Out of memory\r\n"));
> > +}
> > +
> > +ASSERT (FALSE);
> > +return 0;
> > +  }
> > +
> > +  // Check to see if on 4k boundary
> >if (Offset != 0) {
> >  // If not aligned, make the allocation aligned.
> >  Hob.HandoffInformationTable->EfiFreeMemoryTop -= Offset;
> >}
> >
> 
> I understand how you are trying to stick with the original code as much as
> possible, but this is all extremely clunky, and I'd prefer we just clean it 
> up, if
> you don't mind.
> 
> Would something like the below work for you as well?

Yup this looks good to me and cleaner as well.

> 
> 
> 
> diff --git
> a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> index 2cc2a7112197..547117dc13d6 100644
> ---
> a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> +++
> b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> @@ -23,41 +23,36 @@ InternalAllocatePages (
>)
>  {
>EFI_PEI_HOB_POINTERS  Hob;
> -  EFI_PHYSICAL_ADDRESS  Offset;
> +  EFI_PHYSICAL_ADDRESS  NewTop;
> 
>Hob.Raw = GetHobList ();
> 
> -  // Check to see if on 4k boundary
> -  Offset = Hob.HandoffInformationTable->EfiFreeMemoryTop & 0xFFF;
> -  if (Offset != 0) {
> -// If not aligned, make the allocation aligned.
> -Hob.HandoffInformationTable->EfiFreeMemoryTop -= Offset;
> -  }
> +  NewTop = Hob.HandoffInformationTable->EfiFreeMemoryTop &
> ~(EFI_PHYSICAL_ADDRESS)EFI_PAGE_MASK;
> +  NewTop -= Pages * EFI_PAGE_SIZE;
> 
>//
>// Verify that there is sufficient memory to satisfy the allocation
>//
> -  if (Hob.HandoffInformationTable->EfiFreeMemoryTop - ((Pages *
> EFI_PAGE_SIZE) + sizeof (EFI_HOB_MEMORY_ALLOCATION)) <
> Hob.HandoffInformationTable->EfiFreeMemoryBottom) {
> -return 0;
> -  } else {
> -//
> -// Update the PHIT to reflect the memory usage
> -//
> -Hob.HandoffInformationTable->EfiFreeMemoryTop -= Pages *
> EFI_PAGE_SIZE;
> -
> -// This routine used to create a memory allocation HOB a la PEI,
> but that's not
> -// necessary for us.
> -
> -//
> -// Create a memory allocation HOB.
> -//
> -BuildMemoryAllocationHob (
> -  Hob.HandoffInformationTable->EfiFreeMemoryTop,
> -  Pages * EFI_PAGE_SIZE,
> -  MemoryType
> -  );
> -return (VOID *)(UINTN)Hob.HandoffInformationTable-
> >EfiFreeMemoryTop;
> +  if (NewTop < (Hob.HandoffInformationTable->EfiFreeMemoryBottom +
> sizeof (EFI_HOB_MEMORY_ALLOCATION)))
> +  {
> +return NULL;
>}
> +
> +  //
> +  // Update the PHIT to reflect the memory usage  //
> + Hob.HandoffInformationTable->EfiFreeMemoryTop = NewTop;
> +
> +  //
> +  // Create a memory allocation HOB.
> +  //
> +  BuildMemoryAllocationHob (
> +Hob.HandoffInformationTable->EfiFreeMemoryTop,
> +Pages * EFI_PAGE_SIZE,
> +MemoryType
> +);
> +
> +  return (VOID *)(UINTN)Hob.HandoffInformationTable-
> >EfiFreeMemoryTop;
>  }
> 
>  /**


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You 

[edk2-devel] [PATCH] IntelFsp2Pkg: Fix FspSecCoreI build failure.

[Chiu, Chasel]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4049

Link error occurred in certain compiling environment when building
FspSecCoreI: unresolved external symbol _TempRamInitApi.

Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm | 11 +++
 IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm  | 11 +++
 2 files changed, 22 insertions(+)

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm 
b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
index e9365d6832..e392ebed58 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
@@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue)
 ASM_PFX(FspApiCommonContinue):
   jmp $
 
+;
+; TempRamInit API
+;
+; Empty function for WHOLEARCHIVE build option
+;
+;
+global ASM_PFX(TempRamInitApi)
+ASM_PFX(TempRamInitApi):
+  jmp $
+  ret
+
 ;
 ; FspSmmInit API
 ;
diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm 
b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
index e74bf0a26b..5c9ffbd569 100644
--- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
+++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
@@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue)
 ASM_PFX(FspApiCommonContinue):
   jmp $
 
+;
+; TempRamInit API
+;
+; Empty function for WHOLEARCHIVE build option
+;
+;
+global ASM_PFX(TempRamInitApi)
+ASM_PFX(TempRamInitApi):
+  jmp $
+  ret
+
 ;
 ; FspSmmInit API
 ;
-- 
2.35.0.windows.1



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Re: [edk2-devel] [PATCH] UsbNetworkPkg: add USB network devices support

[Rebecca Cran]

In theory, yes QEMU should be the standard USB RNDIS protocol, but I 
don't know what bugs are present in the implementation.


--
Rebecca Cran

On 9/6/22 23:31, RichardHo [何明忠] wrote:

Hi Rebecca,

We didn't check it in QEMU.
Is QEMU report standard USB RNDIS protocol?

We only test it in physical device. Below is device lists.

USB RNDIS:
AST2500: BMC report the RNDIS device

USB NCM:
DisplayLink HIS USB3.0 Portable Dock(DisplayLink (UK) Ltd.)
Vendor ID: 0x17E9
Product ID: 0x4301

USB ECM:
DM9621(Davicom Semiconductor, Inc.)
Vendor ID: 0x0A46
Product ID: 0x1269

Thanks,
Richard

-Original Message-
From: Rebecca Cran 
Sent: 2022年9月6日 11:05 PM
To: devel@edk2.groups.io; RichardHo [何明忠] 
Cc: Andrew Fish ; Leif Lindholm ; Michael D Kinney 
; Michael Kubacki ; Zhiguang Liu 
; Liming Gao ; TonyLo [羅金松] 
Subject: [EXTERNAL] Re: [edk2-devel] [PATCH] UsbNetworkPkg: add USB network 
devices support


**CAUTION: The e-mail below is from an external source. Please exercise caution 
before opening attachments, clicking links, or following guidance.**

Is it expected that this will work with QEMU (with the usb-net fixes from 
https://nam12.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fmcb30%2Fqemu%2Ftree%2Fusbnet3data=05%7C01%7Crichardho%40ami.com%7C1dd20e124cd64659b4e908da90193dd3%7C27e97857e15f486cb58e86c2b3040f93%7C1%7C0%7C637980735342252066%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7Csdata=xHRQc%2Fnv7fPk%2BPEVavIlfFpaXj6Gq8NiHUsRdd5HD%2Fc%3Dreserved=0),
for example using the SBSA-REF machine for Arm or OVMF for X64?

I'm adding the following parameters to QEMU:

-netdev user,id=net0,net=192.168.10.0/24,dhcpstart=192.168.10.1 -device 
usb-net,netdev=net0


On OVMF I get the following crash when loading UsbRndis.efi after 
NetworkCommon.efi:

Support(): UNDI3.1 found on handle 6550D18
Support(): supported on 6550D18
Start(): UNDI3.1 found
 X64 Exception Type - 06(#UD - Invalid Opcode)  CPU Apic ID -  
RIP  - 000B0001, CS  - 0038, RFLAGS - 0283 RAX  
- 0653AF80, RCX - 065DC382, RDX - 5441 RBX  - 
065D8000, RSP - 07E8EA48, RBP - 065DB001 RSI  - 
0048, RDI - 06CE82C0
R8   - 07E8EA60, R9  - 07E8EAD0, R10 - 07E8E804
R11  - , R12 - 8003, R13 - 0001
R14  - 06CEE640, R15 - 0006
DS   - 0030, ES  - 0030, FS  - 0030
GS   - 0030, SS  - 0030
CR0  - 80010033, CR2 - , CR3 - 07C01000
CR4  - 0668, CR8 - 
DR0  - , DR1 - , DR2 - 
DR3  - , DR6 - 0FF0, DR7 - 0400 GDTR - 
079DE000 0047, LDTR - 
IDTR - 0753C018 0FFF,   TR - 
FXSAVE_STATE - 07E8E6A0
 Can't find image information. 


On Arm, I don't get a crash but no network interface gets created.
I've checked the QEMU RNDIS interface is working: if I boot to Linux I can get 
an IP address and communicate with the outside world.

--
Rebecca Cran


On 9/1/22 23:24, RichardHo [何明忠] via groups.io wrote:

UsbNetworkPkg provides network functions for USB ACM, USB NCM, and USB
RNDIS network device.

Signed-off-by: Richard Ho 
Cc: Andrew Fish 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
Cc: Michael Kubacki 
Cc: Zhiguang Liu 
Cc: Liming Gao 
Reviewed-by: Tony Lo 
---
   UsbNetworkPkg/Config/UsbNetworkPkg.inc.dsc|9 +
   .../Config/UsbNetworkPkgComponentsDxe.inc.dsc |   20 +
   .../Config/UsbNetworkPkgComponentsDxe.inc.fdf |   20 +
   .../Config/UsbNetworkPkgDefines.inc.dsc   |   23 +
   .../Include/Protocol/UsbEthernetProtocol.h|  872 +
   UsbNetworkPkg/NetworkCommon/ComponentName.c   |  264 +++
   UsbNetworkPkg/NetworkCommon/DriverBinding.c   |  583 ++
   UsbNetworkPkg/NetworkCommon/DriverBinding.h   |  263 +++
   UsbNetworkPkg/NetworkCommon/NetworkCommon.inf |   43 +
   UsbNetworkPkg/NetworkCommon/PxeFunction.c | 1734 +
   UsbNetworkPkg/ReadMe.md   |   65 +
   UsbNetworkPkg/ReleaseNotes.md |   11 +
   UsbNetworkPkg/UsbCdcEcm/ComponentName.c   |  170 ++
   UsbNetworkPkg/UsbCdcEcm/UsbCdcEcm.c   |  504 +
   UsbNetworkPkg/UsbCdcEcm/UsbCdcEcm.h   |  211 ++
   UsbNetworkPkg/UsbCdcEcm/UsbCdcEcm.inf |   41 +
   UsbNetworkPkg/UsbCdcEcm/UsbEcmFunction.c  |  861 
   UsbNetworkPkg/UsbCdcNcm/ComponentName.c   |  170 ++
   UsbNetworkPkg/UsbCdcNcm/UsbCdcNcm.c   |  508 +
   UsbNetworkPkg/UsbCdcNcm/UsbCdcNcm.h   |  245 +++
   UsbNetworkPkg/UsbCdcNcm/UsbCdcNcm.inf |   41 +
   UsbNetworkPkg/UsbCdcNcm/UsbNcmFunction.c  |  946 +
   UsbNetworkPkg/UsbNetworkPkg.dec   

Re: [edk2-devel] [PATCH v1 0/2] MM communicate functionality in variable policy

[Kun Qin]

Hi Ard,

No worries. Liming has helped to merge these patches here: MM 
communicate functionality in variable policy by lgao4 · Pull Request 
#2443 · tianocore/edk2 (github.com) 
. Thanks for checking back.


Regards,
Kun

On 9/7/2022 1:27 AM, Ard Biesheuvel wrote:

On Mon, 13 Dec 2021 at 19:23, Kun Qin  wrote:

Hi ArmPkg and MdeModulePkg maintainers,

Now that the hard freeze is lifted, could you please provide some
feedback on these patches when you have a chance?


My apologies for not responding to these changes.

If these patches are still relevant, please rebase and resend them.



On 12/06/2021 10:41, Ard Biesheuvel wrote:

On Mon, 6 Dec 2021 at 19:35, Kun Qin  wrote:

Hi ArmPkg and MdeModulePkg maintainers,

It has been a week since the patches were sent. Could you please review
the changes and let me know if there is any feedback? Any input is
appreciated.


As far as I know, we are still in hard freeze for the upcoming stable tag.


On 11/29/2021 16:39, Kun Qin via groups.io wrote:

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3709
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3751

Currently, setups with variable policy operations used together with MM
communicate from ArmPkg could fail with `EFI_INVALID_PARAMETER`. This was
due to the errors from 2 following aspects:

1. For variable policy implementations in MdeModulePkg, the DXE runtime
agent would communicate to MM to disable, register or query policies.
However, during these operations, the MessageLength calculation is
including MM communicate header. This could lead to MM agent read data
across the given buffer boundary and/or trigger other errors.

2. On the other hand, current MM communicate routine from ArmPkg would
fail the function if the input message length does not equal to input
buffer size.

As defined in PI specification, the `CommSize`, when as input, should
stand for "The size of the data buffer being passed in", which would mean
the maximal number of bytes `CommBuffer` can hold. In turn, the value of
this input parameter can be used for MM handlers to determine whether the
output data is too large to fit in this buffer. Enforcing the incoming
buffer to hold exactly the number of used bytes mismatches with the PI
spec description.

This change fix MessageLength field calculation from variable policy and
updated input argument inspections from MM communicate routine in ArmPkg
to match PI spec descriptions.

Patch v1 branch:https://github.com/kuqin12/edk2/tree/mm_communicate_check

Cc: Jian J Wang
Cc: Liming Gao
Cc: Hao A Wu
Cc: Leif Lindholm
Cc: Ard Biesheuvel
Cc: Bret Barkelew
Cc: Michael Kubacki

Kun Qin (2):
 MdeModulePkg: VariableSmmRuntimeDxe: Fix Variable Policy Message
   Length
 ArmPkg: MmCommunicationDxe: Update MM communicate input arguments
   checks

ArmPkg/Drivers/MmCommunicationDxe/MmCommunication.c   | 44 

MdeModulePkg/Universal/Variable/RuntimeDxe/VariablePolicySmmDxe.c | 10 ++---
2 files changed, 32 insertions(+), 22 deletions(-)




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[edk2-devel] MdeModulePkg: Use configurable PCD for AHCI command retries

[Anbazhagan, Baraneedharan via groups.io]

https://bugzilla.tianocore.org/show_bug.cgi?id=4011

AHCI commands are retried internally which prevents platform feature
like drive password to process correctly entered password on subsequent
attempts. PCD allows the platform to determine the number of retries.

Signed-off-by: Baraneedharan Anbazhagan 
anbazha...@hp.com
---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c   | 6 +++---
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h   | 2 --
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf | 3 ++-
MdeModulePkg/MdeModulePkg.dec  | 4 
4 files changed, 9 insertions(+), 6 deletions(-)

diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index a240be940d..bf8105d4e7 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -983,7 +983,7 @@ AhciPioTransfer (
   CmdList.AhciCmdCfl = EFI_AHCI_FIS_REGISTER_H2D_LENGTH / 4;
   CmdList.AhciCmdW   = Read ? 0 : 1;
-  for (Retry = 0; Retry < AHCI_COMMAND_RETRIES; Retry++) {
+  for (Retry = 0; Retry < PcdGet32 (PcdAhciCommandRetryCount); Retry++) {
 AhciBuildCommand (
   PciIo,
   AhciRegisters,
@@ -1190,7 +1190,7 @@ AhciDmaTransfer (
 }
 gBS->RestoreTPL (OldTpl);
-for (Retry = 0; Retry < AHCI_COMMAND_RETRIES; Retry++) {
+for (Retry = 0; Retry < PcdGet32 (PcdAhciCommandRetryCount); Retry++) {
   AhciBuildCommand (
 PciIo,
 AhciRegisters,
@@ -1385,7 +1385,7 @@ AhciNonDataTransfer (
   CmdList.AhciCmdCfl = EFI_AHCI_FIS_REGISTER_H2D_LENGTH / 4;
-  for (Retry = 0; Retry < AHCI_COMMAND_RETRIES; Retry++) {
+  for (Retry = 0; Retry < PcdGet32 (PcdAhciCommandRetryCount); Retry++) {
 AhciBuildCommand (
   PciIo,
   AhciRegisters,
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
index 7802ebd200..66256bf718 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
@@ -193,8 +193,6 @@ typedef union {
#define   AHCI_PORT_DEVSLP_DITO_MASK  0x01FF8000
#define   AHCI_PORT_DEVSLP_DM_MASK0x1E00
-#define AHCI_COMMAND_RETRIES  5
-
#pragma pack(1)
//
// Command List structure includes total 32 entries.
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
index a3e42a9ab4..78caa3c458 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
@@ -65,7 +65,8 @@
   gEdkiiAtaAtapiPolicyProtocolGuid  ## CONSUMES
 [Pcd]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable   ## SOMETIMES_CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAtaSmartEnable  ## 
SOMETIMES_CONSUMES
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAhciCommandRetryCount   ## 
SOMETIMES_CONSUMES
 # [Event]
# EVENT_TYPE_PERIODIC_TIMER ## SOMETIMES_CONSUMES
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 7d98910832..58e6ab0048 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -1574,6 +1574,10 @@
   # @Prompt SD/MMC Host Controller Operations Timeout (us).
   
gEfiMdeModulePkgTokenSpaceGuid.PcdSdMmcGenericTimeoutValue|100|UINT32|0x0031
+  ## The Retry Count of AHCI command if there is a failure
+  # @Prompt The value of Retry Count,  Default value is 5.
+  gEfiMdeModulePkgTokenSpaceGuid.PcdAhciCommandRetryCount|5|UINT32|0x0032
+
[PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
   ## This PCD defines the Console output row. The default value is 25 
according to UEFI spec.
   #  This PCD could be set to 0 then console output would be at max column and 
max row.
--
2.36.1.windows.1



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Re: [edk2-devel] [PATCH v2] EmbeddedPkg/PrePiMemoryAllocationLib: Check for space on offset allocation

[Ard Biesheuvel]

On Wed, 7 Sept 2022 at 17:46, Jeff Brasen  wrote:
>
> Update check for enough space to occur prior to alignment offset
> modification. This prevents a case where EfiFreeMemoryTop could be
> less than EfiFreeMemoryBottom
>
> Signed-off-by: Jeff Brasen 

Thanks for the respin. I have caught up in the mean time.


> ---
>  .../MemoryAllocationLib.c | 53 +++
>  1 file changed, 30 insertions(+), 23 deletions(-)
>
> diff --git 
> a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c 
> b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> index 2cc2a71121..9208826565 100644
> --- a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> +++ b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> @@ -27,37 +27,44 @@ InternalAllocatePages (
>
>Hob.Raw = GetHobList ();
>
> -  // Check to see if on 4k boundary
>Offset = Hob.HandoffInformationTable->EfiFreeMemoryTop & 0xFFF;
> +  //
> +  // Verify that there is sufficient memory to satisfy the allocation and 
> padding prior to updating anything
> +  //
> +  if ((Hob.HandoffInformationTable->EfiFreeMemoryTop - ((Pages * 
> EFI_PAGE_SIZE) + sizeof (EFI_HOB_MEMORY_ALLOCATION)) - Offset) < 
> Hob.HandoffInformationTable->EfiFreeMemoryBottom) {
> +if (Offset != 0) {
> +  DEBUG ((DEBUG_ERROR, "Offset applied without enough space\r\n"));
> +} else {
> +  DEBUG ((DEBUG_ERROR, "Out of memory\r\n"));
> +}
> +
> +ASSERT (FALSE);
> +return 0;
> +  }
> +
> +  // Check to see if on 4k boundary
>if (Offset != 0) {
>  // If not aligned, make the allocation aligned.
>  Hob.HandoffInformationTable->EfiFreeMemoryTop -= Offset;
>}
>

I understand how you are trying to stick with the original code as
much as possible, but this is all extremely clunky, and I'd prefer we
just clean it up, if you don't mind.

Would something like the below work for you as well?



diff --git a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
index 2cc2a7112197..547117dc13d6 100644
--- a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
+++ b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
@@ -23,41 +23,36 @@ InternalAllocatePages (
   )
 {
   EFI_PEI_HOB_POINTERS  Hob;
-  EFI_PHYSICAL_ADDRESS  Offset;
+  EFI_PHYSICAL_ADDRESS  NewTop;

   Hob.Raw = GetHobList ();

-  // Check to see if on 4k boundary
-  Offset = Hob.HandoffInformationTable->EfiFreeMemoryTop & 0xFFF;
-  if (Offset != 0) {
-// If not aligned, make the allocation aligned.
-Hob.HandoffInformationTable->EfiFreeMemoryTop -= Offset;
-  }
+  NewTop = Hob.HandoffInformationTable->EfiFreeMemoryTop &
~(EFI_PHYSICAL_ADDRESS)EFI_PAGE_MASK;
+  NewTop -= Pages * EFI_PAGE_SIZE;

   //
   // Verify that there is sufficient memory to satisfy the allocation
   //
-  if (Hob.HandoffInformationTable->EfiFreeMemoryTop - ((Pages *
EFI_PAGE_SIZE) + sizeof (EFI_HOB_MEMORY_ALLOCATION)) <
Hob.HandoffInformationTable->EfiFreeMemoryBottom) {
-return 0;
-  } else {
-//
-// Update the PHIT to reflect the memory usage
-//
-Hob.HandoffInformationTable->EfiFreeMemoryTop -= Pages * EFI_PAGE_SIZE;
-
-// This routine used to create a memory allocation HOB a la PEI,
but that's not
-// necessary for us.
-
-//
-// Create a memory allocation HOB.
-//
-BuildMemoryAllocationHob (
-  Hob.HandoffInformationTable->EfiFreeMemoryTop,
-  Pages * EFI_PAGE_SIZE,
-  MemoryType
-  );
-return (VOID *)(UINTN)Hob.HandoffInformationTable->EfiFreeMemoryTop;
+  if (NewTop < (Hob.HandoffInformationTable->EfiFreeMemoryBottom +
sizeof (EFI_HOB_MEMORY_ALLOCATION)))
+  {
+return NULL;
   }
+
+  //
+  // Update the PHIT to reflect the memory usage
+  //
+  Hob.HandoffInformationTable->EfiFreeMemoryTop = NewTop;
+
+  //
+  // Create a memory allocation HOB.
+  //
+  BuildMemoryAllocationHob (
+Hob.HandoffInformationTable->EfiFreeMemoryTop,
+Pages * EFI_PAGE_SIZE,
+MemoryType
+);
+
+  return (VOID *)(UINTN)Hob.HandoffInformationTable->EfiFreeMemoryTop;
 }

 /**


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Re: [edk2-devel] [PATCH] ArmPkg, ArmVirtPkg: put SpellCheck in AuditOnly mode

[Rebecca Cran]

Reviewed-by: Rebecca Cran 

On 9/7/22 09:27, Ard Biesheuvel wrote:

Don't allow spelling errors to break the CI build and inadvertently
reject pull requests - spelling is important but not that important.

Signed-off-by: Ard Biesheuvel 
---
  ArmPkg/ArmPkg.ci.yaml | 2 +-
  ArmVirtPkg/ArmVirtPkg.ci.yaml | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/ArmPkg.ci.yaml b/ArmPkg/ArmPkg.ci.yaml
index b7e07aaef675..24db74250513 100644
--- a/ArmPkg/ArmPkg.ci.yaml
+++ b/ArmPkg/ArmPkg.ci.yaml
@@ -87,7 +87,7 @@
  
  ## options defined .pytool/Plugin/SpellCheck

  "SpellCheck": {
-"AuditOnly": False,
+"AuditOnly": True,
  "IgnoreFiles": [
  "Library/ArmSoftFloatLib/berkeley-softfloat-3/**"
  ],   # use gitignore syntax to ignore errors
diff --git a/ArmVirtPkg/ArmVirtPkg.ci.yaml b/ArmVirtPkg/ArmVirtPkg.ci.yaml
index d5d63ddd4fd7..1e799dc4e194 100644
--- a/ArmVirtPkg/ArmVirtPkg.ci.yaml
+++ b/ArmVirtPkg/ArmVirtPkg.ci.yaml
@@ -96,7 +96,7 @@
  
  ## options defined .pytool/Plugin/SpellCheck

  "SpellCheck": {
-"AuditOnly": False,   # Fails right now with over 270 errors
+"AuditOnly": True,
  "IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
  "ExtendWords": [
  "acpiview",




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Re: [edk2-devel] [PATCH 1/1] pip-requirement: Upgrade the edk2-basetools version from 0.1.28 to 0.1.29

[Rebecca Cran]

Thanks.

Reviewed-by: Rebecca Cran 

On 9/7/22 09:23, Bob Feng wrote:

features and bug fixes:
1. Revert "BaseTools: Fix DSC LibraryClass precedence rule"

Signed-off-by: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 
Cc: Rebecca Cran 
---
  pip-requirements.txt | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/pip-requirements.txt b/pip-requirements.txt
index 353c01ff71ed..967da7cb3783 100644
--- a/pip-requirements.txt
+++ b/pip-requirements.txt
@@ -14,5 +14,5 @@
  
  edk2-pytool-library==0.11.2

  edk2-pytool-extensions~=0.16.0
-edk2-basetools==0.1.28
+edk2-basetools==0.1.29
  antlr4-python3-runtime==4.7.1




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[edk2-devel] [PATCH v2] EmbeddedPkg/PrePiMemoryAllocationLib: Check for space on offset allocation

[Jeff Brasen via groups.io]

Update check for enough space to occur prior to alignment offset

modification. This prevents a case where EfiFreeMemoryTop could be

less than EfiFreeMemoryBottom



Signed-off-by: Jeff Brasen 

---

 .../MemoryAllocationLib.c | 53 +++

 1 file changed, 30 insertions(+), 23 deletions(-)



diff --git a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c 
b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c

index 2cc2a71121..9208826565 100644

--- a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c

+++ b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c

@@ -27,37 +27,44 @@ InternalAllocatePages (

 

   Hob.Raw = GetHobList ();

 

-  // Check to see if on 4k boundary

   Offset = Hob.HandoffInformationTable->EfiFreeMemoryTop & 0xFFF;

+  //

+  // Verify that there is sufficient memory to satisfy the allocation and 
padding prior to updating anything

+  //

+  if ((Hob.HandoffInformationTable->EfiFreeMemoryTop - ((Pages * 
EFI_PAGE_SIZE) + sizeof (EFI_HOB_MEMORY_ALLOCATION)) - Offset) < 
Hob.HandoffInformationTable->EfiFreeMemoryBottom) {

+if (Offset != 0) {

+  DEBUG ((DEBUG_ERROR, "Offset applied without enough space\r\n"));

+} else {

+  DEBUG ((DEBUG_ERROR, "Out of memory\r\n"));

+}

+

+ASSERT (FALSE);

+return 0;

+  }

+

+  // Check to see if on 4k boundary

   if (Offset != 0) {

 // If not aligned, make the allocation aligned.

 Hob.HandoffInformationTable->EfiFreeMemoryTop -= Offset;

   }

 

   //

-  // Verify that there is sufficient memory to satisfy the allocation

+  // Update the PHIT to reflect the memory usage

   //

-  if (Hob.HandoffInformationTable->EfiFreeMemoryTop - ((Pages * EFI_PAGE_SIZE) 
+ sizeof (EFI_HOB_MEMORY_ALLOCATION)) < 
Hob.HandoffInformationTable->EfiFreeMemoryBottom) {

-return 0;

-  } else {

-//

-// Update the PHIT to reflect the memory usage

-//

-Hob.HandoffInformationTable->EfiFreeMemoryTop -= Pages * EFI_PAGE_SIZE;

-

-// This routine used to create a memory allocation HOB a la PEI, but 
that's not

-// necessary for us.

-

-//

-// Create a memory allocation HOB.

-//

-BuildMemoryAllocationHob (

-  Hob.HandoffInformationTable->EfiFreeMemoryTop,

-  Pages * EFI_PAGE_SIZE,

-  MemoryType

-  );

-return (VOID *)(UINTN)Hob.HandoffInformationTable->EfiFreeMemoryTop;

-  }

+  Hob.HandoffInformationTable->EfiFreeMemoryTop -= Pages * EFI_PAGE_SIZE;

+

+  // This routine used to create a memory allocation HOB a la PEI, but that's 
not

+  // necessary for us.

+

+  //

+  // Create a memory allocation HOB.

+  //

+  BuildMemoryAllocationHob (

+Hob.HandoffInformationTable->EfiFreeMemoryTop,

+Pages * EFI_PAGE_SIZE,

+MemoryType

+);

+  return (VOID *)(UINTN)Hob.HandoffInformationTable->EfiFreeMemoryTop;

 }

 

 /**

-- 

2.25.1





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Re: [edk2-devel] [PATCH] ArmPkg, ArmVirtPkg: put SpellCheck in AuditOnly mode

[Michael Kubacki]

Reviewed-by: Michael Kubacki 

On 9/7/2022 11:27 AM, Ard Biesheuvel wrote:

Don't allow spelling errors to break the CI build and inadvertently
reject pull requests - spelling is important but not that important.

Signed-off-by: Ard Biesheuvel 
---
  ArmPkg/ArmPkg.ci.yaml | 2 +-
  ArmVirtPkg/ArmVirtPkg.ci.yaml | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/ArmPkg.ci.yaml b/ArmPkg/ArmPkg.ci.yaml
index b7e07aaef675..24db74250513 100644
--- a/ArmPkg/ArmPkg.ci.yaml
+++ b/ArmPkg/ArmPkg.ci.yaml
@@ -87,7 +87,7 @@
  


  ## options defined .pytool/Plugin/SpellCheck

  "SpellCheck": {

-"AuditOnly": False,

+"AuditOnly": True,

  "IgnoreFiles": [

  "Library/ArmSoftFloatLib/berkeley-softfloat-3/**"

  ],   # use gitignore syntax to ignore errors

diff --git a/ArmVirtPkg/ArmVirtPkg.ci.yaml b/ArmVirtPkg/ArmVirtPkg.ci.yaml
index d5d63ddd4fd7..1e799dc4e194 100644
--- a/ArmVirtPkg/ArmVirtPkg.ci.yaml
+++ b/ArmVirtPkg/ArmVirtPkg.ci.yaml
@@ -96,7 +96,7 @@
  


  ## options defined .pytool/Plugin/SpellCheck

  "SpellCheck": {

-"AuditOnly": False,   # Fails right now with over 270 errors

+"AuditOnly": True,

  "IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files

  "ExtendWords": [

  "acpiview",




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Re: [edk2-devel] [PATCH v2 1/2] ArmPkg: implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls

[Michael Kubacki]

Please note that I already turned AuditOnly mode on for the EmbeddedPkg 
patch series.


On 9/7/2022 11:21 AM, Ard Biesheuvel wrote:

On Wed, 7 Sept 2022 at 17:11, Michael Kubacki
 wrote:


Maintainers have two options for Spell Check as described in the Spell
Check CI Plugin readme -
https://github.com/tianocore/edk2/tree/master/.pytool/Plugin/SpellCheck

1. Set AuditOnly to "true" - Disables all spelling errors in the package
from the failing the build entirely.

2. Extend the dictionary - Add specific words that are allowed. Many
packages already do this.

3. IgnoreStandardPaths - Do not check files by path pattern.

As a maintainer, you can either opt out of Spell Check from the failing
the build entirely by enabling AuditOnly or choose a different level of
granularity by simply updating your package CI YAML file.



Thanks for the explanation - patch coming up.



On 9/7/2022 3:35 AM, Ard Biesheuvel wrote:

On Wed, 7 Sept 2022 at 06:35, Rebecca Cran  wrote:


Also, CI is failing in the SpellCheck test because of the
"-mstrict-align" in
ArmPsciMpServicesDxe.inf.

/home/vsts/work/1/s/ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf:55:25
- Unknown word (mstrict)

Should I add "mstrict" to pytool/Plugin/SpellCheck/cspell.base.yaml ?



This is getting ridiculous.

I'm all for code quality and automation, but if t we cannot use
compiler command line options that it supported since the dawn of time
without bending over backwards to placate the CI machine, we are
throwing out the baby with the bath water.

At the very least, maintainers should be able to override the CI - I
spent 2 hours yesterday preparing a submission that ultimately got
rejected because MPIDR is not in the permitted word list (suggestion:
use 'mpidr')

In the Linux kernel, we have patch check and sparse (which is somewhat
similar to ECC in a sense). Some maintainers run it, some don't, but
in the end, the discretion lies with the person not the machine. This
is the only way that makes sense.

As the co-maintainer of ArmPkg, ArmVirtPkg, ArmPlatformPkg, OvmfPkg
and EmbeddedPkg, I hereby request that the Ci restrictions are either
lifted entirely for these packages, or relaxed so that a PR can be
merged at my discretion, even if the CI thinks there are unresolved
issues.




On 9/6/22 22:25, Rebecca Cran wrote:

On 9/6/22 22:03, Rebecca Cran wrote:

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 59fd8f295d4f..4716789402fc 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -125,6 +125,7 @@ [Components.common]
  ArmPkg/Drivers/CpuPei/CpuPei.inf
  ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
  ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+  ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
  ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
  ArmPkg/Drivers/TimerDxe/TimerDxe.inf

This won't work, since there's no support for 32-bit ARM code.
I'll move it into the AARCH64 section.






















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[edk2-devel] [PATCH] ArmPkg, ArmVirtPkg: put SpellCheck in AuditOnly mode

[Ard Biesheuvel]

Don't allow spelling errors to break the CI build and inadvertently
reject pull requests - spelling is important but not that important.

Signed-off-by: Ard Biesheuvel 
---
 ArmPkg/ArmPkg.ci.yaml | 2 +-
 ArmVirtPkg/ArmVirtPkg.ci.yaml | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/ArmPkg.ci.yaml b/ArmPkg/ArmPkg.ci.yaml
index b7e07aaef675..24db74250513 100644
--- a/ArmPkg/ArmPkg.ci.yaml
+++ b/ArmPkg/ArmPkg.ci.yaml
@@ -87,7 +87,7 @@
 
 ## options defined .pytool/Plugin/SpellCheck
 "SpellCheck": {
-"AuditOnly": False,
+"AuditOnly": True,
 "IgnoreFiles": [
 "Library/ArmSoftFloatLib/berkeley-softfloat-3/**"
 ],   # use gitignore syntax to ignore errors
diff --git a/ArmVirtPkg/ArmVirtPkg.ci.yaml b/ArmVirtPkg/ArmVirtPkg.ci.yaml
index d5d63ddd4fd7..1e799dc4e194 100644
--- a/ArmVirtPkg/ArmVirtPkg.ci.yaml
+++ b/ArmVirtPkg/ArmVirtPkg.ci.yaml
@@ -96,7 +96,7 @@
 
 ## options defined .pytool/Plugin/SpellCheck
 "SpellCheck": {
-"AuditOnly": False,   # Fails right now with over 270 errors
+"AuditOnly": True,
 "IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
 "ExtendWords": [
 "acpiview",
-- 
2.35.1



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Re: [edk2-devel] [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices for CloudHv

[Boeuf, Sebastien]

Ok sounds good.

Thanks,
Sebastien

From: Yao, Jiewen 
Sent: Wednesday, September 7, 2022 5:23 PM
To: Boeuf, Sebastien 
Cc: kra...@redhat.com ; Justen, Jordan L 
; devel@edk2.groups.io 
Subject: RE: [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices for 
CloudHv

I see. The is hard to let a base lib access the HOB.

I think we can integrate this patch at first to make it work, with known 
limitation.


> -Original Message-
> From: Boeuf, Sebastien 
> Sent: Wednesday, September 7, 2022 11:21 PM
> To: Yao, Jiewen 
> Cc: kra...@redhat.com; Justen, Jordan L ;
> devel@edk2.groups.io
> Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices
> for CloudHv
>
> I had a quick try and I've realized
> OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c didn't have access
> to the EFI_HOB_PLATFORM_INFO. Is there an alternative?
>
> Thanks,
> Sebastien
>
> On Wed, 2022-09-07 at 16:23 +0200, Sebastien Boeuf wrote:
> > Hi Jiewen,
> >
> > After I looked into the UefiPayload example, I have a few questions
> > on
> > how to implement things in OvmfPkg:
> >
> > - Do you expect EFI_HOB_PLATFORM_INFO to be extended with two
> > additional fields AcpiTimerAddress and AcpiShutdownAddress? Or do you
> > think the ACPI_BOARD_INFO should be copied over from the the
> > UefiPayload package?
> >
> > - Is InitializePlatform() from OvmfPkg/PlatformPei/Platform.c the
> > correct place where the FADT parsing should happen? I would need the
> > platform info HOB to be accessible from
> > OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c,
> > OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c,
> > OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c,
> > OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c, and
> > OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c.
> >
> > Thanks,
> > Sebastien
> >
> > On Tue, 2022-09-06 at 15:57 +, Yao, Jiewen wrote:
> > > One good example is in UefiPayloadPkg.
> > >
> > > 1. At entrypoint, the UefiPayload parses the ACPI table and build
> > > gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> > > ter/UefiPayloadPkg/UefiPayloadEntry/AcpiTable.c#L23
> > >
> > > 1. Later, AcpiTimer driver uses the ACPI data in
> > > gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> > > ter/UefiPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#L49
> > >
> > > 1. Other driver may also use the ACPI data, such as
> > > PciExpressAddress. (from
> > > MCFG).https://github.com/tianocore/edk2/blob/master/UefiPayloadPk
> > > g/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoa
> > > rdInfo.c#L55
> > >
> > >
> > > Thank you
> > > Yao Jiewen
> > >
> > >
> > > From: Boeuf, Sebastien 
> > > Sent: Tuesday, September 6, 2022 11:41 PM
> > > To: Yao, Jiewen 
> > > Cc: Justen, Jordan L ;
> > > kra...@redhat.com;
> > > devel@edk2.groups.io
> > > Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices for CloudHv
> > >
> > > Hi Jiewen,
> > >
> > > We patched Cloud Hypervisor to support both I/O ports for at least
> > > two versions. And of course at some point users will have to rely
> > > on
> > > latest CloudHv binary (which we always build).
> > >
> > > One improvement could be to retrieve the I/O ports addresses from
> > > the
> > > FADT table. Do you know if there's some code already doing that in
> > > OVMF?
> > >
> > > Thanks,
> > > Sebastien
> > > From: Yao, Jiewen 
> > > Sent: Tuesday, September 6, 2022 4:27 PM
> > > To: Boeuf, Sebastien 
> > > Cc: Justen, Jordan L ;kra...@redhat.com
> > > ;devel@edk2.groups.io 
> > > Subject: RE: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices for CloudHv
> > >
> > > This seems a big incompatible change.
> > >
> > > I feel this is weird to hardcode the configuration here.
> > >
> > > How the OVMF binary knows it runs on a new CloudHv or old CloudHv?
> > >
> > > Can we have a mechanism to detect the data at runtime? E.g. read
> > > some
> > > PCI register ?
> > >
> > >
> > >
> > >
> > > From: Boeuf, Sebastien 
> > > Sent: Tuesday, September 6, 2022 10:08 PM
> > > To: Yao, Jiewen 
> > > Cc: Justen, Jordan L ;kra...@redhat.com;
> > > devel@edk2.groups.io
> > > Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices for CloudHv
> > >
> > > Hi Jiewen,
> > >
> > > Do you think this could be merged?
> > >
> > > Thanks,
> > > Sebastien
> > > From: Boeuf, Sebastien 
> > > Sent: Friday, August 19, 2022 11:59 AM
> > > To: devel@edk2.groups.io 
> > > Cc: Yao, Jiewen ; Justen, Jordan L
> > > ;kra...@redhat.com ;
> > > Boeuf, Sebastien 
> > > Subject: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices
> > > for CloudHv
> > >
> > > From: Sebastien Boeuf 
> > >
> > > Both ACPI shutdown and ACPI PM timer devices has been moved to
> > > different
> > > port addresses in the latest version of Cloud Hypervisor. These
> > > changes
> > > need to be reflected on the OVMF firmware.
> > >
> > > Acked-by: Gerd Hoffmann 
> > > Signed-off-by: 

Re: [edk2-devel] [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices for CloudHv

[Yao, Jiewen]

I see. The is hard to let a base lib access the HOB.

I think we can integrate this patch at first to make it work, with known 
limitation.


> -Original Message-
> From: Boeuf, Sebastien 
> Sent: Wednesday, September 7, 2022 11:21 PM
> To: Yao, Jiewen 
> Cc: kra...@redhat.com; Justen, Jordan L ;
> devel@edk2.groups.io
> Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices
> for CloudHv
> 
> I had a quick try and I've realized
> OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c didn't have access
> to the EFI_HOB_PLATFORM_INFO. Is there an alternative?
> 
> Thanks,
> Sebastien
> 
> On Wed, 2022-09-07 at 16:23 +0200, Sebastien Boeuf wrote:
> > Hi Jiewen,
> >
> > After I looked into the UefiPayload example, I have a few questions
> > on
> > how to implement things in OvmfPkg:
> >
> > - Do you expect EFI_HOB_PLATFORM_INFO to be extended with two
> > additional fields AcpiTimerAddress and AcpiShutdownAddress? Or do you
> > think the ACPI_BOARD_INFO should be copied over from the the
> > UefiPayload package?
> >
> > - Is InitializePlatform() from OvmfPkg/PlatformPei/Platform.c the
> > correct place where the FADT parsing should happen? I would need the
> > platform info HOB to be accessible from
> > OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c,
> > OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c,
> > OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c,
> > OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c, and
> > OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c.
> >
> > Thanks,
> > Sebastien
> >
> > On Tue, 2022-09-06 at 15:57 +, Yao, Jiewen wrote:
> > > One good example is in UefiPayloadPkg.
> > >
> > > 1. At entrypoint, the UefiPayload parses the ACPI table and build
> > > gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> > > ter/UefiPayloadPkg/UefiPayloadEntry/AcpiTable.c#L23
> > >
> > > 1. Later, AcpiTimer driver uses the ACPI data in
> > > gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> > > ter/UefiPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#L49
> > >
> > > 1. Other driver may also use the ACPI data, such as
> > > PciExpressAddress. (from
> > > MCFG).https://github.com/tianocore/edk2/blob/master/UefiPayloadPk
> > > g/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoa
> > > rdInfo.c#L55
> > >
> > >
> > > Thank you
> > > Yao Jiewen
> > >
> > >
> > > From: Boeuf, Sebastien 
> > > Sent: Tuesday, September 6, 2022 11:41 PM
> > > To: Yao, Jiewen 
> > > Cc: Justen, Jordan L ;
> > > kra...@redhat.com;
> > > devel@edk2.groups.io
> > > Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices for CloudHv
> > >
> > > Hi Jiewen,
> > >
> > > We patched Cloud Hypervisor to support both I/O ports for at least
> > > two versions. And of course at some point users will have to rely
> > > on
> > > latest CloudHv binary (which we always build).
> > >
> > > One improvement could be to retrieve the I/O ports addresses from
> > > the
> > > FADT table. Do you know if there's some code already doing that in
> > > OVMF?
> > >
> > > Thanks,
> > > Sebastien
> > > From: Yao, Jiewen 
> > > Sent: Tuesday, September 6, 2022 4:27 PM
> > > To: Boeuf, Sebastien 
> > > Cc: Justen, Jordan L ;kra...@redhat.com
> > > ;devel@edk2.groups.io 
> > > Subject: RE: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices for CloudHv
> > >
> > > This seems a big incompatible change.
> > >
> > > I feel this is weird to hardcode the configuration here.
> > >
> > > How the OVMF binary knows it runs on a new CloudHv or old CloudHv?
> > >
> > > Can we have a mechanism to detect the data at runtime? E.g. read
> > > some
> > > PCI register ?
> > >
> > >
> > >
> > >
> > > From: Boeuf, Sebastien 
> > > Sent: Tuesday, September 6, 2022 10:08 PM
> > > To: Yao, Jiewen 
> > > Cc: Justen, Jordan L ;kra...@redhat.com;
> > > devel@edk2.groups.io
> > > Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices for CloudHv
> > >
> > > Hi Jiewen,
> > >
> > > Do you think this could be merged?
> > >
> > > Thanks,
> > > Sebastien
> > > From: Boeuf, Sebastien 
> > > Sent: Friday, August 19, 2022 11:59 AM
> > > To: devel@edk2.groups.io 
> > > Cc: Yao, Jiewen ; Justen, Jordan L
> > > ;kra...@redhat.com ;
> > > Boeuf, Sebastien 
> > > Subject: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > > devices
> > > for CloudHv
> > >
> > > From: Sebastien Boeuf 
> > >
> > > Both ACPI shutdown and ACPI PM timer devices has been moved to
> > > different
> > > port addresses in the latest version of Cloud Hypervisor. These
> > > changes
> > > need to be reflected on the OVMF firmware.
> > >
> > > Acked-by: Gerd Hoffmann 
> > > Signed-off-by: Sebastien Boeuf 
> > > ---
> > >  OvmfPkg/Include/IndustryStandard/CloudHv.h | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/OvmfPkg/Include/IndustryStandard/CloudHv.h
> > > b/OvmfPkg/Include/IndustryStandard/CloudHv.h
> > > index d31ecc9eec..527c236f48 100644
> > 

[edk2-devel] [PATCH 1/1] pip-requirement: Upgrade the edk2-basetools version from 0.1.28 to 0.1.29

[Bob Feng]

features and bug fixes:
1. Revert "BaseTools: Fix DSC LibraryClass precedence rule"

Signed-off-by: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 
Cc: Rebecca Cran 
---
 pip-requirements.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/pip-requirements.txt b/pip-requirements.txt
index 353c01ff71ed..967da7cb3783 100644
--- a/pip-requirements.txt
+++ b/pip-requirements.txt
@@ -14,5 +14,5 @@
 
 edk2-pytool-library==0.11.2
 edk2-pytool-extensions~=0.16.0
-edk2-basetools==0.1.28
+edk2-basetools==0.1.29
 antlr4-python3-runtime==4.7.1
-- 
2.37.0.windows.1



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Re: [edk2-devel] [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices for CloudHv

[Boeuf, Sebastien]

I had a quick try and I've realized
OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c didn't have access
to the EFI_HOB_PLATFORM_INFO. Is there an alternative?

Thanks,
Sebastien

On Wed, 2022-09-07 at 16:23 +0200, Sebastien Boeuf wrote:
> Hi Jiewen,
> 
> After I looked into the UefiPayload example, I have a few questions
> on
> how to implement things in OvmfPkg:
> 
> - Do you expect EFI_HOB_PLATFORM_INFO to be extended with two
> additional fields AcpiTimerAddress and AcpiShutdownAddress? Or do you
> think the ACPI_BOARD_INFO should be copied over from the the
> UefiPayload package?
> 
> - Is InitializePlatform() from OvmfPkg/PlatformPei/Platform.c the
> correct place where the FADT parsing should happen? I would need the
> platform info HOB to be accessible from
> OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c,
> OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c,
> OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c,
> OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c, and
> OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c. 
> 
> Thanks,
> Sebastien
> 
> On Tue, 2022-09-06 at 15:57 +, Yao, Jiewen wrote:
> > One good example is in UefiPayloadPkg.
> >  
> > 1. At entrypoint, the UefiPayload parses the ACPI table and build
> > gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> > ter/UefiPayloadPkg/UefiPayloadEntry/AcpiTable.c#L23
> >  
> > 1. Later, AcpiTimer driver uses the ACPI data in
> > gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> > ter/UefiPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#L49
> >  
> > 1. Other driver may also use the ACPI data, such as
> > PciExpressAddress. (from
> > MCFG).https://github.com/tianocore/edk2/blob/master/UefiPayloadPk
> > g/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoa
> > rdInfo.c#L55
> >  
> >  
> > Thank you
> > Yao Jiewen
> >  
> >  
> > From: Boeuf, Sebastien  
> > Sent: Tuesday, September 6, 2022 11:41 PM
> > To: Yao, Jiewen 
> > Cc: Justen, Jordan L ;
> > kra...@redhat.com;
> > devel@edk2.groups.io
> > Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > devices for CloudHv
> >  
> > Hi Jiewen,
> >  
> > We patched Cloud Hypervisor to support both I/O ports for at least
> > two versions. And of course at some point users will have to rely
> > on
> > latest CloudHv binary (which we always build).
> >  
> > One improvement could be to retrieve the I/O ports addresses from
> > the
> > FADT table. Do you know if there's some code already doing that in
> > OVMF?
> >  
> > Thanks,
> > Sebastien
> > From: Yao, Jiewen 
> > Sent: Tuesday, September 6, 2022 4:27 PM
> > To: Boeuf, Sebastien 
> > Cc: Justen, Jordan L ;kra...@redhat.com
> > ;devel@edk2.groups.io 
> > Subject: RE: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > devices for CloudHv
> >  
> > This seems a big incompatible change.
> >  
> > I feel this is weird to hardcode the configuration here.
> >  
> > How the OVMF binary knows it runs on a new CloudHv or old CloudHv?
> >  
> > Can we have a mechanism to detect the data at runtime? E.g. read
> > some
> > PCI register ?
> >  
> >  
> >  
> >  
> > From: Boeuf, Sebastien 
> > Sent: Tuesday, September 6, 2022 10:08 PM
> > To: Yao, Jiewen 
> > Cc: Justen, Jordan L ;kra...@redhat.com;
> > devel@edk2.groups.io
> > Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > devices for CloudHv
> >  
> > Hi Jiewen,
> >  
> > Do you think this could be merged?
> >  
> > Thanks,
> > Sebastien
> > From: Boeuf, Sebastien 
> > Sent: Friday, August 19, 2022 11:59 AM
> > To: devel@edk2.groups.io 
> > Cc: Yao, Jiewen ; Justen, Jordan L
> > ;kra...@redhat.com ;
> > Boeuf, Sebastien 
> > Subject: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> > devices
> > for CloudHv
> >  
> > From: Sebastien Boeuf 
> > 
> > Both ACPI shutdown and ACPI PM timer devices has been moved to
> > different
> > port addresses in the latest version of Cloud Hypervisor. These
> > changes
> > need to be reflected on the OVMF firmware.
> > 
> > Acked-by: Gerd Hoffmann 
> > Signed-off-by: Sebastien Boeuf 
> > ---
> >  OvmfPkg/Include/IndustryStandard/CloudHv.h | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/OvmfPkg/Include/IndustryStandard/CloudHv.h
> > b/OvmfPkg/Include/IndustryStandard/CloudHv.h
> > index d31ecc9eec..527c236f48 100644
> > --- a/OvmfPkg/Include/IndustryStandard/CloudHv.h
> > +++ b/OvmfPkg/Include/IndustryStandard/CloudHv.h
> > @@ -16,12 +16,12 @@
> >  //
> > 
> >  // ACPI timer address
> > 
> >  //
> > 
> > -#define CLOUDHV_ACPI_TIMER_IO_ADDRESS  0xb008
> > 
> > +#define CLOUDHV_ACPI_TIMER_IO_ADDRESS  0x0608
> > 
> >  
> > 
> >  //
> > 
> >  // ACPI shutdown device address
> > 
> >  //
> > 
> > -#define CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS  0x03c0
> > 
> > +#define CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS  0x0600
> > 
> >  
> > 
> >  //
> > 
> >  // 32-bit MMIO memory hole base address
> > 
> 

-

Re: [edk2-devel] [PATCH v2 1/2] ArmPkg: implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls

[Ard Biesheuvel]

On Wed, 7 Sept 2022 at 17:11, Michael Kubacki
 wrote:
>
> Maintainers have two options for Spell Check as described in the Spell
> Check CI Plugin readme -
> https://github.com/tianocore/edk2/tree/master/.pytool/Plugin/SpellCheck
>
> 1. Set AuditOnly to "true" - Disables all spelling errors in the package
> from the failing the build entirely.
>
> 2. Extend the dictionary - Add specific words that are allowed. Many
> packages already do this.
>
> 3. IgnoreStandardPaths - Do not check files by path pattern.
>
> As a maintainer, you can either opt out of Spell Check from the failing
> the build entirely by enabling AuditOnly or choose a different level of
> granularity by simply updating your package CI YAML file.
>

Thanks for the explanation - patch coming up.


> On 9/7/2022 3:35 AM, Ard Biesheuvel wrote:
> > On Wed, 7 Sept 2022 at 06:35, Rebecca Cran  wrote:
> >>
> >> Also, CI is failing in the SpellCheck test because of the
> >> "-mstrict-align" in
> >> ArmPsciMpServicesDxe.inf.
> >>
> >> /home/vsts/work/1/s/ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf:55:25
> >> - Unknown word (mstrict)
> >>
> >> Should I add "mstrict" to pytool/Plugin/SpellCheck/cspell.base.yaml ?
> >>
> >
> > This is getting ridiculous.
> >
> > I'm all for code quality and automation, but if t we cannot use
> > compiler command line options that it supported since the dawn of time
> > without bending over backwards to placate the CI machine, we are
> > throwing out the baby with the bath water.
> >
> > At the very least, maintainers should be able to override the CI - I
> > spent 2 hours yesterday preparing a submission that ultimately got
> > rejected because MPIDR is not in the permitted word list (suggestion:
> > use 'mpidr')
> >
> > In the Linux kernel, we have patch check and sparse (which is somewhat
> > similar to ECC in a sense). Some maintainers run it, some don't, but
> > in the end, the discretion lies with the person not the machine. This
> > is the only way that makes sense.
> >
> > As the co-maintainer of ArmPkg, ArmVirtPkg, ArmPlatformPkg, OvmfPkg
> > and EmbeddedPkg, I hereby request that the Ci restrictions are either
> > lifted entirely for these packages, or relaxed so that a PR can be
> > merged at my discretion, even if the CI thinks there are unresolved
> > issues.
> >
> >
> >
> >> On 9/6/22 22:25, Rebecca Cran wrote:
> >>> On 9/6/22 22:03, Rebecca Cran wrote:
>  diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
>  index 59fd8f295d4f..4716789402fc 100644
>  --- a/ArmPkg/ArmPkg.dsc
>  +++ b/ArmPkg/ArmPkg.dsc
>  @@ -125,6 +125,7 @@ [Components.common]
>   ArmPkg/Drivers/CpuPei/CpuPei.inf
>   ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
>   ArmPkg/Drivers/ArmGic/ArmGicLib.inf
>  +  ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
>   ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
>   ArmPkg/Drivers/TimerDxe/TimerDxe.inf
> >>> This won't work, since there's no support for 32-bit ARM code.
> >>> I'll move it into the AARCH64 section.
> >>>
> >>
> >>
> >>
> >>
> >>
> >>
> >
> >
> >
> >
>
>
> 
>
>


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Re: [edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI

[Ard Biesheuvel]

On Wed, 7 Sept 2022 at 17:00, Michael Kubacki
 wrote:
>
> When would you like to have that discussion?
>
> The Tianocore Tool, CI, Codebase meeting is every week. In that meeting
> we've discussed getting all edk2 packages to at least run CI.
>
> https://github.com/tianocore/edk2/discussions/2614
>
> If you prefer to have it here, that's fine as well.
>

In a nutshell, I am fine with enabling this, as long as I can override
the CI and merge PRs that the CI thinks have issues.


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[edk2-devel] [PATCH 0/3] DynamicTablesPkg: _CPC support

[Jeff Brasen via groups.io]

Add generator for creating the _CPC object for CPU nodes.

If viewing this review by a pull request is helpful one exists here:
https://github.com/NVIDIA/edk2/pull/12

Jeff Brasen (3):
  DynamicTablesPkg: Add CM_ARM_CPC_INFO object
  DynamicTablesPkg: AML Code generation to add _CPC entries
  DynamicTablesPkg: SSDT CPU _CPC generator

 .../Include/ArmNameSpaceObjects.h | 146 -
 .../Include/Library/AmlLib/AmlLib.h   | 155 +
 .../SsdtCpuTopologyGenerator.c| 211 ++-
 .../Common/AmlLib/CodeGen/AmlCodeGen.c| 549 ++
 .../ConfigurationManagerObjectParser.c|  79 +++
 5 files changed, 1118 insertions(+), 22 deletions(-)

-- 
2.25.1



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[edk2-devel] [PATCH 2/3] DynamicTablesPkg: AML Code generation to add _CPC entries

[Jeff Brasen via groups.io]

_CPC entries can describe CPU performance information.

The object is described in ACPI 6.4 s8.4.7.1.

"_CPC (Continuous Performance Control)".



Add AmlCreateCpcNode() helper function to add _CPC entries to an

existing CPU object.



Signed-off-by: Jeff Brasen 

---

 .../Include/Library/AmlLib/AmlLib.h   | 155 +

 .../Common/AmlLib/CodeGen/AmlCodeGen.c| 549 ++

 2 files changed, 704 insertions(+)



diff --git a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h 
b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h

index 39968660f2..65f6cd7583 100644

--- a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h

+++ b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h

@@ -1336,6 +1336,161 @@ AmlAddNameIntegerPackage (

   IN AML_OBJECT_NODE_HANDLE  PackageNode

   );

 

+/** Create a _CPC node.

+

+  Creates and optionally adds the following node

+   Name(_CPC, Package()

+   {

+NumEntries,  // Integer

+Revision,// Integer

+HighestPerformance,  // Integer or Buffer (Resource 
Descriptor)

+NominalPerformance,  // Integer or Buffer (Resource 
Descriptor)

+LowestNonlinearPerformance,  // Integer or Buffer (Resource 
Descriptor)

+LowestPerformance,   // Integer or Buffer (Resource 
Descriptor)

+GuaranteedPerformanceRegister,   // Buffer (Resource Descriptor)

+DesiredPerformanceRegister , // Buffer (Resource Descriptor)

+MinimumPerformanceRegister , // Buffer (Resource Descriptor)

+MaximumPerformanceRegister , // Buffer (Resource Descriptor)

+PerformanceReductionToleranceRegister,   // Buffer (Resource Descriptor)

+TimeWindowRegister,  // Buffer (Resource Descriptor)

+CounterWraparoundTime,   // Integer or Buffer (Resource 
Descriptor)

+ReferencePerformanceCounterRegister, // Buffer (Resource Descriptor)

+DeliveredPerformanceCounterRegister, // Buffer (Resource Descriptor)

+PerformanceLimitedRegister,  // Buffer (Resource Descriptor)

+CPPCEnableRegister   // Buffer (Resource Descriptor)

+AutonomousSelectionEnable,   // Integer or Buffer (Resource 
Descriptor)

+AutonomousActivityWindowRegister,// Buffer (Resource Descriptor)

+EnergyPerformancePreferenceRegister, // Buffer (Resource Descriptor)

+ReferencePerformance // Integer or Buffer (Resource 
Descriptor)

+LowestFrequency, // Integer or Buffer (Resource 
Descriptor)

+NominalFrequency // Integer or Buffer (Resource 
Descriptor)

+  })

+

+  If resource buffer is NULL then integer will be used.

+

+  Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)

+

+  @ingroup CodeGenApis

+

+  @param [in]  HighestPerformanceBuffer   If provided, buffer that 
indicates the highest level

+  of performance the 
processor.

+  @param [in]  HighestPerformanceInteger  Indicates the highest 
level of performance the processor,

+  used if buffer is NULL.

+  @param [in]  NominalPerformanceBuffer   If provided buffer that 
indicates the highest sustained

+  performance level of the 
processor.

+  @param [in]  NominalPerformanceInteger  Indicates the highest 
sustained performance level

+  of the processor, used 
if buffer is NULL.

+  @param [in]  LowestNonlinearPerformanceBuffer   If provided, buffer that 
indicates the lowest performance level

+  of the processor with 
non-linear power savings.

+  @param [in]  LowestNonlinearPerformanceInteger  Indicates the lowest 
performance level of the processor with

+  non-linear power 
savings, used if buffer is NULL.

+  @param [in]  LowestPerformanceBufferIf provided, buffer that 
indicates the

+  lowest performance level 
of the processor.

+  @param [in]  LowestPerformanceInteger   Indicates the lowest 
performance level of the processor,

+  used if buffer is NULL.

+  @param [in]  GuaranteedPerformanceRegister  If provided, Guaranteed 
Performance Register Buffer.

+  @param [in]  DesiredPerformanceRegister If provided, Desired 
Performance Register Buffer.

+  @param [in]  MinimumPerformanceRegister If provided, Minimum 
Performance Register Buffer.

+  @param [in]  MaximumPerformanceRegister 

[edk2-devel] [PATCH 3/3] DynamicTablesPkg: SSDT CPU _CPC generator

[Jeff Brasen via groups.io]

Add code to use a token attached to GICC to generate _CPC object on cpus.



Signed-off-by: Jeff Brasen 

---

 .../SsdtCpuTopologyGenerator.c| 211 +-

 1 file changed, 206 insertions(+), 5 deletions(-)



diff --git 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c

index 8561f48e1f..ba1f1bd436 100644

--- 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c

+++ 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c

@@ -76,6 +76,16 @@ GET_OBJECT_LIST (

   CM_ARM_LPI_INFO

   );

 

+/**

+  This macro expands to a function that retrieves the CPC

+  information from the Configuration Manager.

+*/

+GET_OBJECT_LIST (

+  EObjNameSpaceArm,

+  EArmObjCpcInfo,

+  CM_ARM_CPC_INFO

+  );

+

 /** Initialize the TokenTable.

 

   One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO

@@ -229,6 +239,182 @@ WriteAslName (

   return EFI_SUCCESS;

 }

 

+/** Utility function to check if generic address points to NULL

+

+  @param [in]  Address  Pointer to the Generic address

+

+  @retval TRUE  Address is system memory with an Address of 0.

+  @retval FALSE Address does not point to NULL.

+**/

+STATIC

+BOOLEAN

+EFIAPI

+IsNullGenericAddress (

+  IN EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE  *Address

+  )

+{

+  if ((Address == NULL) ||

+  ((Address->AddressSpaceId == EFI_ACPI_6_3_SYSTEM_MEMORY) &&

+   (Address->Address == 0x0)))

+  {

+return TRUE;

+  }

+

+  return FALSE;

+}

+

+/** Create and add an _CPC Node to Cpu Node.

+

+  For instance, transform an AML node from:

+  Device (C002)

+  {

+  Name (_UID, 2)

+  Name (_HID, "ACPI0007")

+  }

+

+  To:

+  Device (C002)

+  {

+  Name (_UID, 2)

+  Name (_HID, "ACPI0007")

+  Name(_CPC, Package()

+  {

+NumEntries,  // Integer

+Revision,// Integer

+HighestPerformance,  // Integer or Buffer 
(Resource Descriptor)

+NominalPerformance,  // Integer or Buffer 
(Resource Descriptor)

+LowestNonlinearPerformance,  // Integer or Buffer 
(Resource Descriptor)

+LowestPerformance,   // Integer or Buffer 
(Resource Descriptor)

+GuaranteedPerformanceRegister,   // Buffer (Resource 
Descriptor)

+DesiredPerformanceRegister , // Buffer (Resource 
Descriptor)

+MinimumPerformanceRegister , // Buffer (Resource 
Descriptor)

+MaximumPerformanceRegister , // Buffer (Resource 
Descriptor)

+PerformanceReductionToleranceRegister,   // Buffer (Resource 
Descriptor)

+TimeWindowRegister,  // Buffer (Resource 
Descriptor)

+CounterWraparoundTime,   // Integer or Buffer 
(Resource Descriptor)

+ReferencePerformanceCounterRegister, // Buffer (Resource 
Descriptor)

+DeliveredPerformanceCounterRegister, // Buffer (Resource 
Descriptor)

+PerformanceLimitedRegister,  // Buffer (Resource 
Descriptor)

+CPPCEnableRegister   // Buffer (Resource 
Descriptor)

+AutonomousSelectionEnable,   // Integer or Buffer 
(Resource Descriptor)

+AutonomousActivityWindowRegister,// Buffer (Resource 
Descriptor)

+EnergyPerformancePreferenceRegister, // Buffer (Resource 
Descriptor)

+ReferencePerformance // Integer or Buffer 
(Resource Descriptor)

+LowestFrequency, // Integer or Buffer 
(Resource Descriptor)

+NominalFrequency // Integer or Buffer 
(Resource Descriptor)

+  })

+  }

+

+  @param [in]  Generator  The SSDT Cpu Topology generator.

+  @param [in]  CfgMgrProtocol Pointer to the Configuration Manager

+  Protocol Interface.

+  @param [in]  ProcHierarchyNodeInfo  CM_ARM_PROC_HIERARCHY_INFO describing

+  the Cpu.

+  @param [in]  Node   CPU Node to which the _CPC node is

+  attached.

+

+  @retval EFI_SUCCESS The function completed successfully.

+  @retval EFI_INVALID_PARAMETER   Invalid parameter.

+  @retval EFI_OUT_OF_RESOURCESFailed to allocate memory.

+**/

+STATIC

+EFI_STATUS

+EFIAPI

+CreateAmlCpcNode (

+  IN  ACPI_CPU_TOPOLOGY_GENERATOR *Generator,

+  IN  CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL  *CONST  CfgMgrProtocol,

+  INCM_ARM_GICC_INFO  *GicCInfo,

+  IN  AML_OBJECT_NODE_HANDLE  

[edk2-devel] [PATCH 1/3] DynamicTablesPkg: Add CM_ARM_CPC_INFO object

[Jeff Brasen via groups.io]

Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects.

This allows to describe CPC information, as described in ACPI 6.4,

s8.4.7.1 "_CPC (Continuous Performance Control)".



Signed-off-by: Jeff Brasen 

---

 .../Include/ArmNameSpaceObjects.h | 146 --

 .../ConfigurationManagerObjectParser.c|  79 ++

 2 files changed, 208 insertions(+), 17 deletions(-)



diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h 
b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

index 102e0f96be..4d3f9ae534 100644

--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

@@ -63,6 +63,7 @@ typedef enum ArmObjectID {

   EArmObjPciInterruptMapInfo,  ///< 39 - Pci Interrupt Map Info

   EArmObjRmr,  ///< 40 - Reserved Memory Range Node

   EArmObjMemoryRangeDescriptor,///< 41 - Memory Range Descriptor

+  EArmObjCpcInfo,  ///< 42 - Continuous Performance 
Control Info

   EArmObjMax

 } EARM_OBJECT_ID;

 

@@ -97,99 +98,105 @@ typedef struct CmArmPowerManagementProfileInfo {

 */

 typedef struct CmArmGicCInfo {

   /// The GIC CPU Interface number.

-  UINT32CPUInterfaceNumber;

+  UINT32 CPUInterfaceNumber;

 

   /** The ACPI Processor UID. This must match the

   _UID of the CPU Device object information described

   in the DSDT/SSDT for the CPU.

   */

-  UINT32AcpiProcessorUid;

+  UINT32 AcpiProcessorUid;

 

   /** The flags field as described by the GICC structure

   in the ACPI Specification.

   */

-  UINT32Flags;

+  UINT32 Flags;

 

   /** The parking protocol version field as described by

 the GICC structure in the ACPI Specification.

   */

-  UINT32ParkingProtocolVersion;

+  UINT32 ParkingProtocolVersion;

 

   /** The Performance Interrupt field as described by

   the GICC structure in the ACPI Specification.

   */

-  UINT32PerformanceInterruptGsiv;

+  UINT32 PerformanceInterruptGsiv;

 

   /** The CPU Parked address field as described by

   the GICC structure in the ACPI Specification.

   */

-  UINT64ParkedAddress;

+  UINT64 ParkedAddress;

 

   /** The base address for the GIC CPU Interface

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64PhysicalBaseAddress;

+  UINT64 PhysicalBaseAddress;

 

   /** The base address for GICV interface

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64GICV;

+  UINT64 GICV;

 

   /** The base address for GICH interface

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64GICH;

+  UINT64 GICH;

 

   /** The GICV maintenance interrupt

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT32VGICMaintenanceInterrupt;

+  UINT32 VGICMaintenanceInterrupt;

 

   /** The base address for GICR interface

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64GICRBaseAddress;

+  UINT64 GICRBaseAddress;

 

   /** The MPIDR for the CPU

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64MPIDR;

+  UINT64 MPIDR;

 

   /** The Processor Power Efficiency class

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT8 ProcessorPowerEfficiencyClass;

+  UINT8  ProcessorPowerEfficiencyClass;

 

   /** Statistical Profiling Extension buffer overflow GSIV. Zero if

   unsupported by this processor. This field was introduced in

   ACPI 6.3 (MADT revision 5) and is therefore ignored when

   generating MADT revision 4 or lower.

   */

-  UINT16SpeOverflowInterrupt;

+  UINT16 SpeOverflowInterrupt;

 

   /** The proximity domain to which the logical processor belongs.

   This field is used to populate the GICC affinity structure

   in the SRAT table.

   */

-  UINT32ProximityDomain;

+  UINT32 ProximityDomain;

 

   /** The clock domain to which the logical processor belongs.

   This field is used to populate the GICC affinity structure

   in the SRAT table.

   */

-  UINT32ClockDomain;

+  UINT32 ClockDomain;

 

   /** The GICC Affinity flags field as described by the GICC Affinity structure

   in the SRAT table.

   */

-  UINT32AffinityFlags;

+  UINT32 AffinityFlags;

+

+  /** Optional field: Reference Token for the Cpc info of this processor.

+  Token identifying a CM_ARM_OBJ_REF structure, itself referencing

+  CM_ARM_CPC_INFO objects.

+  */

+  CM_OBJECT_TOKENCpcToken;

 } CM_ARM_GICC_INFO;

 

 /** A structure that describes the

@@ -1070,6 +1077,111 @@ 

Re: [edk2-devel] [PATCH v2 1/2] ArmPkg: implement EFI_MP_SERVICES_PROTOCOL based on PSCI calls

[Michael Kubacki]

Maintainers have two options for Spell Check as described in the Spell 
Check CI Plugin readme - 
https://github.com/tianocore/edk2/tree/master/.pytool/Plugin/SpellCheck


1. Set AuditOnly to "true" - Disables all spelling errors in the package 
from the failing the build entirely.


2. Extend the dictionary - Add specific words that are allowed. Many 
packages already do this.


3. IgnoreStandardPaths - Do not check files by path pattern.

As a maintainer, you can either opt out of Spell Check from the failing 
the build entirely by enabling AuditOnly or choose a different level of 
granularity by simply updating your package CI YAML file.


On 9/7/2022 3:35 AM, Ard Biesheuvel wrote:

On Wed, 7 Sept 2022 at 06:35, Rebecca Cran  wrote:


Also, CI is failing in the SpellCheck test because of the
"-mstrict-align" in
ArmPsciMpServicesDxe.inf.

/home/vsts/work/1/s/ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf:55:25
- Unknown word (mstrict)

Should I add "mstrict" to pytool/Plugin/SpellCheck/cspell.base.yaml ?



This is getting ridiculous.

I'm all for code quality and automation, but if t we cannot use
compiler command line options that it supported since the dawn of time
without bending over backwards to placate the CI machine, we are
throwing out the baby with the bath water.

At the very least, maintainers should be able to override the CI - I
spent 2 hours yesterday preparing a submission that ultimately got
rejected because MPIDR is not in the permitted word list (suggestion:
use 'mpidr')

In the Linux kernel, we have patch check and sparse (which is somewhat
similar to ECC in a sense). Some maintainers run it, some don't, but
in the end, the discretion lies with the person not the machine. This
is the only way that makes sense.

As the co-maintainer of ArmPkg, ArmVirtPkg, ArmPlatformPkg, OvmfPkg
and EmbeddedPkg, I hereby request that the Ci restrictions are either
lifted entirely for these packages, or relaxed so that a PR can be
merged at my discretion, even if the CI thinks there are unresolved
issues.




On 9/6/22 22:25, Rebecca Cran wrote:

On 9/6/22 22:03, Rebecca Cran wrote:

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 59fd8f295d4f..4716789402fc 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -125,6 +125,7 @@ [Components.common]
 ArmPkg/Drivers/CpuPei/CpuPei.inf
 ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
 ArmPkg/Drivers/ArmGic/ArmGicLib.inf
+  ArmPkg/Drivers/ArmPsciMpServicesDxe/ArmPsciMpServicesDxe.inf
 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
 ArmPkg/Drivers/TimerDxe/TimerDxe.inf

This won't work, since there's no support for 32-bit ARM code.
I'll move it into the AARCH64 section.
















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Re: [edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI

[Michael Kubacki]

When would you like to have that discussion?

The Tianocore Tool, CI, Codebase meeting is every week. In that meeting 
we've discussed getting all edk2 packages to at least run CI.


https://github.com/tianocore/edk2/discussions/2614

If you prefer to have it here, that's fine as well.

On 9/7/2022 3:37 AM, Ard Biesheuvel wrote:

On Wed, 7 Sept 2022 at 04:37,  wrote:


From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4046

Adds EmbeddedPkg to edk2 CI.

Due to a number of build errors (some intentional) such as
'BUILD_EPOCH' only being defined for GCC in
VirtualRealTimeClockLib.inf, the package is only run on GCC
build agents.

This still allows build to be verified and non-build CI checks
to be performed.

In the edk2 PR for this change, you can see that the package only
runs on GCC and CI passes with this configuration.

https://github.com/tianocore/edk2/pull/3299

Cc: Leif Lindholm 
Cc: Ard Biesheuvel 
Cc: Abner Chang 
Cc: Daniel Schaefer 
Signed-off-by: Michael Kubacki 

Michael Kubacki (3):
   EmbeddedPkg/AcpiLib: Fix code formatting errors
   EmbeddedPkg: Add CI YAML file
   EmbeddedPkg: Only run in CI for GCC5



NAK until we have a discussion about strictness of CI and ways to
permit manual override of merge time CI restrictions.



  EmbeddedPkg/Library/AcpiLib/AcpiLib.c   | 88 +--
  .azurepipelines/templates/pr-gate-build-job.yml |  4 +
  .pytool/CISettings.py   |  1 +
  EmbeddedPkg/EmbeddedPkg.ci.yaml | 89 
  EmbeddedPkg/EmbeddedPkg.dec |  8 ++
  EmbeddedPkg/Include/Library/AcpiLib.h   | 22 ++---
  6 files changed, 158 insertions(+), 54 deletions(-)
  create mode 100644 EmbeddedPkg/EmbeddedPkg.ci.yaml

--
2.28.0.windows.1









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Re: [edk2-devel] Pip edk2-basetools diverged from edk2/BaseTools (e.g. doesn't have "Revert "BaseTools: Fix DSC LibraryClass precedence rule"")

[Bob Feng]

Yes. I'll sync the edk2-basetools.

Thanks,
Bob

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Rebecca Cran
Sent: Wednesday, September 7, 2022 9:08 PM
To: devel@edk2.groups.io; Leif Lindholm ; Kinney, 
Michael D ; Andrew Fish ; Michael 
Kubacki ; Sean Brogan 
; Barkelew, Bret ; Gao, 
Liming 
Subject: [edk2-devel] Pip edk2-basetools diverged from edk2/BaseTools (e.g. 
doesn't have "Revert "BaseTools: Fix DSC LibraryClass precedence rule"")

I've been running into a problem with CI that was fixed in edk2 BaseTools 
before the recent stable tag:


ERROR - Compiler #3000 from
/home/vsts/work/1/s/MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf(42):
 
PCD [gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode] in 
[/home/vsts/work/1/s/MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf]
is not found in dependent packages:

I noticed that CI is using the Pip based tools, and from comparing 
https://github.com/tianocore/edk2-basetools/commits/master and 
https://github.com/tianocore/edk2/commits/master/BaseTools it's clear they've 
diverged, and the former for example doesn't have "Revert
"BaseTools: Fix DSC LibraryClass precedence rule"", as well as several other 
fixes.

Could we get them synced up?

--
Rebecca Cran







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Re: [edk2-devel] [PATCH] EmbeddedPkg/PrePiMemoryAllocationLib: Add check for space on offset allocation

[Jeff Brasen via groups.io]

I'll post another version to fix the formatting issue in a bit, but before the 
patch the issue was we applied the alignment offset before we did a space check.

-Jeff


> -Original Message-
> From: Ard Biesheuvel 
> Sent: Wednesday, September 7, 2022 2:34 AM
> To: Jeff Brasen 
> Cc: devel@edk2.groups.io; quic_llind...@quicinc.com;
> ardb+tianoc...@kernel.org; abner.ch...@hpe.com; daniel.schae...@hpe.com
> Subject: Re: [PATCH] EmbeddedPkg/PrePiMemoryAllocationLib: Add check for
> space on offset allocation
> 
> External email: Use caution opening links or attachments
> 
> 
> On Thu, 30 Jun 2022 at 21:06, Jeff Brasen  wrote:
> >
> > Update check for enough space to occur prior to alignment offset.
> > This prevents cases where EfiFreeMemoryTop < EfiFreeMemoryBottom.
> >
> 
> So prior to this patch, we would
> - check for enough space
> - apply the alignment
> - potentially exceed the available space due to alignment padding?
> 
> > Signed-off-by: Jeff Brasen 
> 
> This patch got mangled so I cannot apply it from the list.
> 
> > ---
> >  .../MemoryAllocationLib.c | 53 +++
> >  1 file changed, 30 insertions(+), 23 deletions(-)
> >
> > diff --git
> > a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> > b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> > index 78f8da5e95..1956d644c3 100644
> > ---
> > a/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib.c
> > +++ b/EmbeddedPkg/Library/PrePiMemoryAllocationLib/MemoryAllocationLib
> > +++ .c
> > @@ -38,37 +38,44 @@ AllocatePages (
> >
> >Hob.Raw = GetHobList ();
> >
> > -  // Check to see if on 4k boundary
> >Offset = Hob.HandoffInformationTable->EfiFreeMemoryTop & 0xFFF;
> > +  //
> > +  // Verify that there is sufficient memory to satisfy the allocation
> > + and padding prior to updating anything  //  if
> > + ((Hob.HandoffInformationTable->EfiFreeMemoryTop - ((Pages *
> EFI_PAGE_SIZE) + sizeof (EFI_HOB_MEMORY_ALLOCATION)) - Offset) <
> Hob.HandoffInformationTable->EfiFreeMemoryBottom) {
> > +if (Offset != 0) {
> > +  DEBUG ((DEBUG_ERROR, "Offset applied without enough space\r\n"));
> > +} else {
> > +  DEBUG ((DEBUG_ERROR, "Out of memory\r\n"));
> > +}
> > +
> > +ASSERT (FALSE);
> > +return 0;
> > +  }
> > +
> > +  // Check to see if on 4k boundary
> >if (Offset != 0) {
> >  // If not aligned, make the allocation aligned.
> >  Hob.HandoffInformationTable->EfiFreeMemoryTop -= Offset;
> >}
> >
> >//
> > -  // Verify that there is sufficient memory to satisfy the allocation
> > +  // Update the PHIT to reflect the memory usage
> >//
> > -  if (Hob.HandoffInformationTable->EfiFreeMemoryTop - ((Pages *
> EFI_PAGE_SIZE) + sizeof (EFI_HOB_MEMORY_ALLOCATION)) <
> Hob.HandoffInformationTable->EfiFreeMemoryBottom) {
> > -return 0;
> > -  } else {
> > -//
> > -// Update the PHIT to reflect the memory usage
> > -//
> > -Hob.HandoffInformationTable->EfiFreeMemoryTop -= Pages *
> EFI_PAGE_SIZE;
> > -
> > -// This routine used to create a memory allocation HOB a la PEI, but 
> > that's
> not
> > -// necessary for us.
> > -
> > -//
> > -// Create a memory allocation HOB.
> > -//
> > -BuildMemoryAllocationHob (
> > -  Hob.HandoffInformationTable->EfiFreeMemoryTop,
> > -  Pages * EFI_PAGE_SIZE,
> > -  EfiBootServicesData
> > -  );
> > -return (VOID *)(UINTN)Hob.HandoffInformationTable-
> >EfiFreeMemoryTop;
> > -  }
> > +  Hob.HandoffInformationTable->EfiFreeMemoryTop -= Pages *
> > + EFI_PAGE_SIZE;
> > +
> > +  // This routine used to create a memory allocation HOB a la PEI,
> > + but that's not  // necessary for us.
> > +
> > +  //
> > +  // Create a memory allocation HOB.
> > +  //
> > +  BuildMemoryAllocationHob (
> > +Hob.HandoffInformationTable->EfiFreeMemoryTop,
> > +Pages * EFI_PAGE_SIZE,
> > +EfiBootServicesData
> > +);
> > +  return (VOID
> > + *)(UINTN)Hob.HandoffInformationTable->EfiFreeMemoryTop;
> >  }
> >
> >  /**
> > --
> > 2.25.1
> >


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Re: [edk2-devel] [PATCH 5/5] uefi-sct/SctPkg: Add a category for RISCV_EFI_BOOT_PROTOCOL

[G Edhaya Chandran]

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH 4/5] uefi-sct/SctPkg: Install RISCV_EFI_BOOT_PROTOCOL test module

[G Edhaya Chandran]

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH 3/5] uefi-sct/SctPkg: Build test cases of RISCV_EFI_BOOT_PROTOCOL

[G Edhaya Chandran]

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH 2/5] uefi-sct/SctPkg: Add test cases for RISCV_EFI_BOOT_PROTOCOL

[G Edhaya Chandran]

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH 1/5] uefi-sct/SctPkg: Add header file for RISCV_EFI_BOOT_PROTOCOL

[G Edhaya Chandran]

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH 0/5] Add UEFI-SCT test cases for RISCV_EFI_BOOT_PROTOCOL

[G Edhaya Chandran]

On Thu, Jun 9, 2022 at 03:57 PM, Sunil V L wrote:

> 
> RISCV_EFI_BOOT_PROTOCOL

Reviewed-by: G Edhaya Chandran 


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Re: [edk2-devel] [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices for CloudHv

[Boeuf, Sebastien]

Hi Jiewen,

After I looked into the UefiPayload example, I have a few questions on
how to implement things in OvmfPkg:

- Do you expect EFI_HOB_PLATFORM_INFO to be extended with two
additional fields AcpiTimerAddress and AcpiShutdownAddress? Or do you
think the ACPI_BOARD_INFO should be copied over from the the
UefiPayload package?

- Is InitializePlatform() from OvmfPkg/PlatformPei/Platform.c the
correct place where the FADT parsing should happen? I would need the
platform info HOB to be accessible from
OvmfPkg/Library/AcpiTimerLib/DxeAcpiTimerLib.c,
OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c,
OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.c,
OvmfPkg/Library/ResetSystemLib/DxeResetShutdown.c, and
OvmfPkg/Library/ResetSystemLib/BaseResetShutdown.c. 

Thanks,
Sebastien

On Tue, 2022-09-06 at 15:57 +, Yao, Jiewen wrote:
> One good example is in UefiPayloadPkg.
>  
> 1. At entrypoint, the UefiPayload parses the ACPI table and build
> gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> ter/UefiPayloadPkg/UefiPayloadEntry/AcpiTable.c#L23
>  
> 1. Later, AcpiTimer driver uses the ACPI data in
> gUefiAcpiBoardInfoGuid.https://github.com/tianocore/edk2/blob/mas
> ter/UefiPayloadPkg/Library/AcpiTimerLib/AcpiTimerLib.c#L49
>  
> 1. Other driver may also use the ACPI data, such as
> PciExpressAddress. (from
> MCFG).https://github.com/tianocore/edk2/blob/master/UefiPayloadPk
> g/Library/PciSegmentInfoLibAcpiBoardInfo/PciSegmentInfoLibAcpiBoa
> rdInfo.c#L55
>  
>  
> Thank you
> Yao Jiewen
>  
>  
> From: Boeuf, Sebastien  
> Sent: Tuesday, September 6, 2022 11:41 PM
> To: Yao, Jiewen 
> Cc: Justen, Jordan L ; kra...@redhat.com;
> devel@edk2.groups.io
> Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> devices for CloudHv
>  
> Hi Jiewen,
>  
> We patched Cloud Hypervisor to support both I/O ports for at least
> two versions. And of course at some point users will have to rely on
> latest CloudHv binary (which we always build).
>  
> One improvement could be to retrieve the I/O ports addresses from the
> FADT table. Do you know if there's some code already doing that in
> OVMF?
>  
> Thanks,
> Sebastien
> From: Yao, Jiewen 
> Sent: Tuesday, September 6, 2022 4:27 PM
> To: Boeuf, Sebastien 
> Cc: Justen, Jordan L ;kra...@redhat.com
> ;devel@edk2.groups.io 
> Subject: RE: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> devices for CloudHv
>  
> This seems a big incompatible change.
>  
> I feel this is weird to hardcode the configuration here.
>  
> How the OVMF binary knows it runs on a new CloudHv or old CloudHv?
>  
> Can we have a mechanism to detect the data at runtime? E.g. read some
> PCI register ?
>  
>  
>  
>  
> From: Boeuf, Sebastien 
> Sent: Tuesday, September 6, 2022 10:08 PM
> To: Yao, Jiewen 
> Cc: Justen, Jordan L ;kra...@redhat.com;
> devel@edk2.groups.io
> Subject: Re: [PATCH v2] OvmfPkg: Update I/O port related to ACPI
> devices for CloudHv
>  
> Hi Jiewen,
>  
> Do you think this could be merged?
>  
> Thanks,
> Sebastien
> From: Boeuf, Sebastien 
> Sent: Friday, August 19, 2022 11:59 AM
> To: devel@edk2.groups.io 
> Cc: Yao, Jiewen ; Justen, Jordan L
> ;kra...@redhat.com ;
> Boeuf, Sebastien 
> Subject: [PATCH v2] OvmfPkg: Update I/O port related to ACPI devices
> for CloudHv
>  
> From: Sebastien Boeuf 
> 
> Both ACPI shutdown and ACPI PM timer devices has been moved to
> different
> port addresses in the latest version of Cloud Hypervisor. These
> changes
> need to be reflected on the OVMF firmware.
> 
> Acked-by: Gerd Hoffmann 
> Signed-off-by: Sebastien Boeuf 
> ---
>  OvmfPkg/Include/IndustryStandard/CloudHv.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/OvmfPkg/Include/IndustryStandard/CloudHv.h
> b/OvmfPkg/Include/IndustryStandard/CloudHv.h
> index d31ecc9eec..527c236f48 100644
> --- a/OvmfPkg/Include/IndustryStandard/CloudHv.h
> +++ b/OvmfPkg/Include/IndustryStandard/CloudHv.h
> @@ -16,12 +16,12 @@
>  //
> 
>  // ACPI timer address
> 
>  //
> 
> -#define CLOUDHV_ACPI_TIMER_IO_ADDRESS  0xb008
> 
> +#define CLOUDHV_ACPI_TIMER_IO_ADDRESS  0x0608
> 
>  
> 
>  //
> 
>  // ACPI shutdown device address
> 
>  //
> 
> -#define CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS  0x03c0
> 
> +#define CLOUDHV_ACPI_SHUTDOWN_IO_ADDRESS  0x0600
> 
>  
> 
>  //
> 
>  // 32-bit MMIO memory hole base address
> 

-
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Registered headquarters: "Les Montalets"- 2, rue de Paris, 
92196 Meudon Cedex, France
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[edk2-devel] [edk2-platforms][PATCH v5 1/2] Ext4Pkg: Add symbolic links support

[Savva Mitrofanov]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3677

Provided support for symlink file type. Added routine which allows
reading and following them through recursive open() call. As a security
meausure implemented simple symlink loop check with nest level limit
equal 8. Also this patch moves Ext4Open functionality to internal
routine.

Cc: Marvin Häuser 
Cc: Pedro Falcato 
Cc: Vitaly Cheptsov 
Signed-off-by: Savva Mitrofanov 
---
 Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.inf |   1 +
 Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h  |  13 +-
 Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h   |  72 +-
 Features/Ext4Pkg/Ext4Dxe/File.c  | 169 +++--
 Features/Ext4Pkg/Ext4Dxe/Inode.c |  15 ++
 Features/Ext4Pkg/Ext4Dxe/Symlink.c   | 261 
 6 files changed, 492 insertions(+), 39 deletions(-)

diff --git a/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.inf 
b/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.inf
index deaf89fb3743..a153fc41ccd6 100644
--- a/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.inf
+++ b/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.inf
@@ -108,6 +108,7 @@
   Directory.c

   Extents.c

   File.c

+  Symlink.c

   Collation.c

   Ext4Disk.h

   Ext4Dxe.h

diff --git a/Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h 
b/Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h
index 7a19d2f79d53..4fd91a423324 100644
--- a/Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h
+++ b/Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h
@@ -171,7 +171,7 @@
 #define EXT4_DIRTY_FL 0x0100

 #define EXT4_COMPRBLK_FL  0x0200

 #define EXT4_NOCOMPR_FL   0x0400

-#define EXT4_ECOMPR_FL0x0800

+#define EXT4_ENCRYPT_FL   0x0800

 #define EXT4_BTREE_FL 0x1000

 #define EXT4_INDEX_FL 0x2000

 #define EXT4_JOURNAL_DATA_FL  0x4000

@@ -332,11 +332,12 @@ STATIC_ASSERT (
   "ext4 block group descriptor struct has incorrect size"

   );

 

-#define EXT4_DBLOCKS 12

-#define EXT4_IND_BLOCK   12

-#define EXT4_DIND_BLOCK  13

-#define EXT4_TIND_BLOCK  14

-#define EXT4_NR_BLOCKS   15

+#define EXT4_DBLOCKS12

+#define EXT4_IND_BLOCK  12

+#define EXT4_DIND_BLOCK 13

+#define EXT4_TIND_BLOCK 14

+#define EXT4_NR_BLOCKS  15

+#define EXT4_FAST_SYMLINK_MAX_SIZE  EXT4_NR_BLOCKS * sizeof(UINT32)

 

 #define EXT4_GOOD_OLD_INODE_SIZE  128U

 

diff --git a/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h 
b/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h
index 81e59a4babc9..6d352d3995f1 100644
--- a/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h
+++ b/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h
@@ -31,8 +31,14 @@
 

 #include "Ext4Disk.h"

 

+#define SYMLOOP_MAX8

 #define EXT4_NAME_MAX  255

-

+//

+// We need to specify path length limit for security purposes, to prevent 
possible

+// overflows and dead-loop conditions. Originally this limit is absent in FS 
design,

+// but present in UNIX distros and shell environments, which may varies from 
1024 to 4096.

+//

+#define EXT4_EFI_PATH_MAX4096

 #define EXT4_DRIVER_VERSION  0x

 

 /**

@@ -324,11 +330,11 @@ number of read bytes.
 **/

 EFI_STATUS

 Ext4Read (

-  IN EXT4_PARTITION  *Partition,

-  IN EXT4_FILE   *File,

-  OUT VOID   *Buffer,

-  IN UINT64  Offset,

-  IN OUT UINTN   *Length

+  IN EXT4_PARTITION  *Partition,

+  IN EXT4_FILE   *File,

+  OUTVOID*Buffer,

+  IN UINT64  Offset,

+  IN OUT UINTN   *Length

   );

 

 /**

@@ -368,6 +374,7 @@ struct _Ext4File {
 

   UINT64OpenMode;

   UINT64Position;

+  UINT32SymLoops;

 

   EXT4_PARTITION*Partition;

 

@@ -497,6 +504,45 @@ Ext4SetupFile (
   IN EXT4_PARTITION  *Partition

   );

 

+/**

+  Opens a new file relative to the source file's location.

+

+  @param[out] FoundFile  A pointer to the location to return the opened handle 
for the new

+ file.

+  @param[in]  Source A pointer to the EXT4_FILE instance that is the file

+ handle to the source location. This would typically 
be an open

+ handle to a directory.

+  @param[in]  FileName   The Null-terminated string of the name of the file to 
be opened.

+ The file name may contain the following path 
modifiers: "\", ".",

+ and "..".

+  @param[in]  OpenMode   The mode to open the file. The only valid 
combinations that the

+ file may be opened with are: Read, Read/Write, or 
Create/Read/Write.

+  @param[in]  Attributes Only valid for EFI_FILE_MODE_CREATE, in which case 
these are the

+ attribute bits for the newly created file.

+

+  @retval EFI_SUCCESS  The file was opened.

+  @retval EFI_NOT_FOUNDThe specified file could not be found on the 
device.

+  @retval EFI_NO_MEDIA The device has no medium.

+  @retval EFI_MEDIA_CHANGEDThe device has a different medium in it or the 
medium is no

+

[edk2-devel] [edk2-platforms][PATCH v5 2/2] Ext4Pkg: Add base containing record macro for EXT4_FILE

[Savva Mitrofanov]

We shouldn't use direct casts, because in the future it could break
the code, so using BASE_CR would be safe against possible structure
changes and rearrangements

Cc: Marvin Häuser 
Cc: Pedro Falcato 
Cc: Vitaly Cheptsov 
Signed-off-by: Savva Mitrofanov 
Reviewed-by: Marvin Häuser 
---
 Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h |  2 ++
 Features/Ext4Pkg/Ext4Dxe/File.c| 16 
 2 files changed, 10 insertions(+), 8 deletions(-)

diff --git a/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h 
b/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h
index 6d352d3995f1..adf3c13f6ea9 100644
--- a/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h
+++ b/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h
@@ -386,6 +386,8 @@ struct _Ext4File {
   EXT4_DENTRY   *Dentry;

 };

 

+#define EXT4_FILE_FROM_THIS(This)  BASE_CR ((This), EXT4_FILE, Protocol)

+

 #define EXT4_FILE_FROM_OPEN_FILES_NODE(Node)   
\

   BASE_CR(Node, EXT4_FILE, OpenFilesListNode)

 

diff --git a/Features/Ext4Pkg/Ext4Dxe/File.c b/Features/Ext4Pkg/Ext4Dxe/File.c
index 86ccfff8603a..04198a53bfc0 100644
--- a/Features/Ext4Pkg/Ext4Dxe/File.c
+++ b/Features/Ext4Pkg/Ext4Dxe/File.c
@@ -372,7 +372,7 @@ Ext4Open (
   EXT4_FILE   *FoundFile;

   EXT4_FILE   *Source;

 

-  Source = (EXT4_FILE *)This;

+  Source = EXT4_FILE_FROM_THIS (This);

 

   //

   // Reset SymLoops counter

@@ -409,7 +409,7 @@ Ext4Close (
   IN EFI_FILE_PROTOCOL  *This

   )

 {

-  return Ext4CloseInternal ((EXT4_FILE *)This);

+  return Ext4CloseInternal (EXT4_FILE_FROM_THIS (This));

 }

 

 /**

@@ -490,7 +490,7 @@ Ext4ReadFile (
   EXT4_PARTITION  *Partition;

   EFI_STATUS  Status;

 

-  File  = (EXT4_FILE *)This;

+  File  = EXT4_FILE_FROM_THIS (This);

   Partition = File->Partition;

 

   ASSERT (Ext4FileIsOpenable (File));

@@ -541,7 +541,7 @@ Ext4WriteFile (
 {

   EXT4_FILE  *File;

 

-  File = (EXT4_FILE *)This;

+  File = EXT4_FILE_FROM_THIS (This);

 

   if (!(File->OpenMode & EFI_FILE_MODE_WRITE)) {

 return EFI_ACCESS_DENIED;

@@ -571,7 +571,7 @@ Ext4GetPosition (
 {

   EXT4_FILE  *File;

 

-  File = (EXT4_FILE *)This;

+  File = EXT4_FILE_FROM_THIS (This);

 

   if (Ext4FileIsDir (File)) {

 return EFI_UNSUPPORTED;

@@ -604,7 +604,7 @@ Ext4SetPosition (
 {

   EXT4_FILE  *File;

 

-  File = (EXT4_FILE *)This;

+  File = EXT4_FILE_FROM_THIS (This);

 

   // Only seeks to 0 (so it resets the ReadDir operation) are allowed

   if (Ext4FileIsDir (File) && (Position != 0)) {

@@ -872,7 +872,7 @@ Ext4GetInfo (
   EXT4_FILE   *File;

   EXT4_PARTITION  *Partition;

 

-  File  = (EXT4_FILE *)This;

+  File  = EXT4_FILE_FROM_THIS (This);

   Partition = File->Partition;

 

   if (CompareGuid (InformationType, )) {

@@ -989,7 +989,7 @@ Ext4SetInfo (
   EXT4_FILE   *File;

   EXT4_PARTITION  *Partition;

 

-  File  = (EXT4_FILE *)This;

+  File  = EXT4_FILE_FROM_THIS (This);

   Partition = File->Partition;

 

   if (Partition->ReadOnly) {

-- 
2.37.3



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[edk2-devel] [edk2-platforms][PATCH v5 0/2] Ext4Pkg: Add Symbolic Links support

[Savva Mitrofanov]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3677

Hi all,

In the fifth version I corrected remarks from Pedro Falcato and Marvin Häuser.
I moved symlink procedures into independent C file, corrected code style like
debug messages macros and etc.

This patchset adds symbolic links support with simple recursion protection based
on symbolic link nest level limitation, also I included patch which adds BASE_CR
to extract EXT4_FILE private structure to prevent possible code corruption 
caused
by structure changes and rearrangements in future.

REF: 
https://github.com/savvamitrofanov/edk2-platforms/tree/ext4pkg_symlink_support

Cc: Marvin Häuser 
Cc: Pedro Falcato 
Cc: Vitaly Cheptsov 

Savva Mitrofanov (2):
  Ext4Pkg: Add symbolic links support
  Ext4Pkg: Add base containing record macro for EXT4_FILE

 Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.inf |   1 +
 Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h  |  13 +-
 Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h   |  74 +-
 Features/Ext4Pkg/Ext4Dxe/File.c  | 179 +++---
 Features/Ext4Pkg/Ext4Dxe/Inode.c |  15 ++
 Features/Ext4Pkg/Ext4Dxe/Symlink.c   | 261 
 6 files changed, 499 insertions(+), 44 deletions(-)
 create mode 100644 Features/Ext4Pkg/Ext4Dxe/Symlink.c

-- 
2.37.3



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Re: [edk2-devel] [edk2-platforms][PATCH v4 1/2] Ext4Pkg: Add symbolic links support

[Savva Mitrofanov]

Hi Pedro,

Thank you for your code-review. I answer to comments inline too.

> On 30 Aug 2022, at 04:12, Pedro Falcato  wrote:
> 
> Hi Savva,
> 
> Sorry for the huge delay. Comments inline.
> 
> On Thu, Jul 28, 2022 at 4:26 PM Savva Mitrofanov  > wrote:
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3677 
> 
> 
> Provided support for symlink file type. Added routine which allows
> reading and following them through recursive open() call. As a security
> meausure implemented simple symlink loop check with nest level limit
> equal 8. Also this patch moves Ext4Open functionality to internal
> routine.
> 
> Cc: Marvin Häuser mailto:mhaeu...@posteo.de>>
> Cc: Pedro Falcato mailto:pedro.falc...@gmail.com>>
> Cc: Vitaly Cheptsov mailto:vit9...@protonmail.com>>
> Signed-off-by: Savva Mitrofanov  >
> ---
>  Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h |  13 +-
>  Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h  |  98 +-
>  Features/Ext4Pkg/Ext4Dxe/File.c | 359 ++--
>  Features/Ext4Pkg/Ext4Dxe/Inode.c|  53 +++
>  4 files changed, 485 insertions(+), 38 deletions(-)
> 
> diff --git a/Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h 
> b/Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h
> index a55cd2fa68ad..a73e3f8622f1 100644
> --- a/Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h
> +++ b/Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h
> @@ -171,7 +171,7 @@
>  #define EXT4_DIRTY_FL 0x0100
>  #define EXT4_COMPRBLK_FL  0x0200
>  #define EXT4_NOCOMPR_FL   0x0400
> -#define EXT4_ECOMPR_FL0x0800
> +#define EXT4_ENCRYPT_FL   0x0800
>  #define EXT4_BTREE_FL 0x1000
>  #define EXT4_INDEX_FL 0x2000
>  #define EXT4_JOURNAL_DATA_FL  0x4000
> @@ -332,11 +332,12 @@ STATIC_ASSERT (
>"ext4 block group descriptor struct has incorrect size"
>);
> 
> -#define EXT4_DBLOCKS 12
> -#define EXT4_IND_BLOCK   12
> -#define EXT4_DIND_BLOCK  13
> -#define EXT4_TIND_BLOCK  14
> -#define EXT4_NR_BLOCKS   15
> +#define EXT4_DBLOCKS12
> +#define EXT4_IND_BLOCK  12
> +#define EXT4_DIND_BLOCK 13
> +#define EXT4_TIND_BLOCK 14
> +#define EXT4_NR_BLOCKS  15
> +#define EXT4_FAST_SYMLINK_MAX_SIZE  EXT4_NR_BLOCKS * sizeof(UINT32)
> 
>  #define EXT4_GOOD_OLD_INODE_SIZE  128
> 
> diff --git a/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h 
> b/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h
> index b1508482b0a7..c1df9d1149e4 100644
> --- a/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h
> +++ b/Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h
> @@ -31,7 +31,9 @@
> 
>  #include "Ext4Disk.h"
> 
> +#define SYMLOOP_MAX8
> I'm scared that this may not be enough. Could we use 40 here as Linux does?

As we discussed, the limit equal 8 should be compatible for booting all modern 
operation systems using this fs driver.
In this recursion-based symlink implementation it is a bit dangerous due to 
possible exceed of stack size. So we
decided keep this limit until we are do the lookup logic like namei.

>  #define EXT4_NAME_MAX  255
> +#define EFI_PATH_MAX   4096
> Don't use EFI_* in Ext4Dxe code, so prefix this with EXT4_ instead maybe?

As a result of consensus, it was decided to use EXT4_EFI_PATH_MAX.

> 
>  #define EXT4_DRIVER_VERSION  0x
> 
> @@ -324,11 +326,11 @@ number of read bytes.
>  **/
>  EFI_STATUS
>  Ext4Read (
> -  IN EXT4_PARTITION  *Partition,
> -  IN EXT4_FILE   *File,
> -  OUT VOID   *Buffer,
> -  IN UINT64  Offset,
> -  IN OUT UINTN   *Length
> +  IN EXT4_PARTITION  *Partition,
> +  IN EXT4_FILE   *File,
> +  OUTVOID*Buffer,
> +  IN UINT64  Offset,
> +  IN OUT UINTN   *Length
>);
> 
>  /**
> @@ -368,6 +370,7 @@ struct _Ext4File {
> 
>UINT64OpenMode;
>UINT64Position;
> +  UINT32SymLoops;
> 
>EXT4_PARTITION*Partition;
> 
> @@ -497,6 +500,45 @@ Ext4SetupFile (
>IN EXT4_PARTITION  *Partition
>);
> 
> +/**
> +  Opens a new file relative to the source file's location.
> +
> +  @param[out] FoundFile  A pointer to the location to return the opened 
> handle for the new
> + file.
> +  @param[in]  Source A pointer to the EXT4_FILE instance that is the file
> + handle to the source location. This would typically 
> be an open
> + handle to a directory.
> +  @param[in]  FileName   The Null-terminated string of the name of the file 
> to be opened.
> + The file name may contain the following path 
> modifiers: "\", ".",
> + and "..".
> +  @param[in]  OpenMode   The mode to open the file. The only valid 
> combinations that the
> + file may be opened with are: Read, Read/Write, or 
> Create/Read/Write.
> +  @param[in]  Attributes Only valid for EFI_FILE_MODE_CREATE, in which case 
> these are the

[edk2-devel] Pip edk2-basetools diverged from edk2/BaseTools (e.g. doesn't have "Revert "BaseTools: Fix DSC LibraryClass precedence rule"")

[Rebecca Cran]

I've been running into a problem with CI that was fixed in edk2 BaseTools 
before the recent stable tag:


ERROR - Compiler #3000 from 
/home/vsts/work/1/s/MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf(42): 
PCD [gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode] in 
[/home/vsts/work/1/s/MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf] 
is not found in dependent packages:


I noticed that CI is using the Pip based tools, and from comparing 
https://github.com/tianocore/edk2-basetools/commits/master and 
https://github.com/tianocore/edk2/commits/master/BaseTools it's clear 
they've diverged, and the former for example doesn't have "Revert 
"BaseTools: Fix DSC LibraryClass precedence rule"", as well as several 
other fixes.


Could we get them synced up?

--
Rebecca Cran


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Re: [edk2-devel] [PATCH] BaseTools/GenFw AARCH64: Convert more types of explicit GOT references

[Bob Feng]

Acked-by: Bob Feng 

-Original Message-
From: Leif Lindholm  
Sent: Tuesday, September 6, 2022 7:54 PM
To: Ard Biesheuvel ; Rebecca Cran 
Cc: devel@edk2.groups.io; Feng, Bob C ; Gao, Liming 
; Kinney, Michael D 
Subject: Re: [edk2-devel] [PATCH] BaseTools/GenFw AARCH64: Convert more types 
of explicit GOT references

On 2022-09-06 11:30, Ard Biesheuvel wrote:
> Bob, Liming, Leif: any thoughts?

I'm happy with this.
(Spotted one typo - "ofset".)

Acked-by: Leif Lindholm 

> On Sun, 21 Aug 2022 at 16:33, Rebecca Cran  wrote:
>>
>> Tested-by: Rebecca Cran 
>>
>>
>> On 8/21/22 08:16, Ard Biesheuvel wrote:
>>> Rebecca reports that builds of AArch64 DSCs that involve PIE linking 
>>> when using ELF based toolchains are failing in some cases, resulting 
>>> in an error message like
>>>
>>> bad definition for symbol '_GLOBAL_OFFSET_TABLE_'@0x72d8 or
>>> unsupported symbol type.  For example, absolute and undefined symbols
>>> are not supported.
>>>
>>> The reason turns out to be that, while GenFw does carry some logic 
>>> to convert GOT based symbol references into direct ones (which is 
>>> always possible given that our ELF to PE/COFF conversion only 
>>> supports fully linked executables), it does not support all possible 
>>> combinations of relocations that the linker may emit to load symbol 
>>> addresses from the GOT.
>>>
>>> In particular, when performing a non-LTO link on object code built 
>>> with GCC using -fpie, we may end up with GOT based references such 
>>> as the one below, where the address of the GOT itself is taken, and 
>>> the ofset of the symbol in the GOT is reflected in the immediate 
>>> offset of the subsequent LDR instruction.
>>>
>>> 838:   adrpx0, 16000
>>> 838: R_AARCH64_ADR_PREL_PG_HI21 _GLOBAL_OFFSET_TABLE_
>>> 83c:   ldr x0, [x0, #2536]
>>> 83c: R_AARCH64_LD64_GOTPAGE_LO15
>>> _gPcd_BinaryPatch_PcdFdBaseAddress
>>>
>>> The reason that we omit GOT based symbol references when performing 
>>> ELF to PE/COFF conversion is that the GOT is not described by static 
>>> ELF relocations, which means that the ELF file lacks the metadata to 
>>> generate the PE/COFF relocations covering the GOT table in the 
>>> PE/COFF executable. Given that none of the usual motivations for 
>>> using a GOT (copy on write footprint, shared libraries) apply to EFI 
>>> executables in the first place, the easiest way around this is to 
>>> convert all GOT based symbol address loads to PC relative ADR/ADRP 
>>> instructions.
>>>
>>> So implement this handling for R_AARCH64_LD64_GOTPAGE_LO15 and
>>> R_AARCH64_LD64_GOTOFF_LO15 relocations as well, and turn the LDR 
>>> instructions in question into ADR instructions that generate the 
>>> address immediately.
>>>
>>> This leaves the reference to _GLOBAL_OFFSET_TABLE_ itself, which is 
>>> what generated the error to begin with. Considering that this symbol 
>>> is never referenced (i.e., it doesn't appear anywhere in the code) 
>>> and is only meaningful in combination with R_*_GOT_* based 
>>> relocations that follow it, we can just disregard any references to 
>>> it entirely, given that we convert all of those followup relocations into 
>>> direct references.
>>>
>>> Cc: Rebecca Cran 
>>> Cc: Bob Feng 
>>> Cc: Liming Gao 
>>> Cc: "Kinney, Michael D" 
>>> Cc: Leif Lindholm 
>>> Signed-off-by: Ard Biesheuvel 
>>> ---
>>>
>>> This patch can be tested using the following method:
>>>
>>> - add the following lines to 
>>> ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf
>>>
>>> [BuildOptions]
>>> GCC:*_*_AARCH64_CC_FLAGS = -fpie
>>> GCC:*_*_AARCH64_DLINK_FLAGS = -Wl,-Bsymbolic,-pie
>>>
>>> - build ArmVirtPkg/ArmVirtQemuKernel.dsc in DEBUG mode using GCC49
>>> (other combos might work as well) and observe the build failure
>>>
>>> - apply this patch and observe that the build failure is gone
>>>
>>> - boot the resulting image in QEMU using the -kernel ../QEMU_EFI.fd
>>> command line option and observe that the image boots as usual
>>>
>>>BaseTools/Source/C/GenFw/Elf64Convert.c | 35 
>>>1 file changed, 35 insertions(+)
>>>
>>> diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c 
>>> b/BaseTools/Source/C/GenFw/Elf64Convert.c
>>> index 35e96dd05bc2..3173ca9280f4 100644
>>> --- a/BaseTools/Source/C/GenFw/Elf64Convert.c
>>> +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
>>> @@ -1305,6 +1305,22 @@ WriteSections64 (
>>>Elf_Shdr *SymShdr;
>>>UINT8*Targ;
>>>
>>> +//
>>> +// The _GLOBAL_OFFSET_TABLE_ symbol is not actually an absolute 
>>> symbol,
>>> +// but carries the SHN_ABS section index for historical reasons.
>>> +// It must be accompanied by a R_*_GOT_* type relocation on a
>>> +// subsequent instruction, which we handle below, specifically to 
>>> avoid
>>> +// the GOT indirection, and to refer to the symbol directly. This 
>>> means
>>> +// we can simply disregard direct references 

Re: [edk2-devel] [RFC PATCH 16/17] UefiCpuPkg/CpuDxe: Add RISC-V support in CpuDxe module

[Chang, Abner via groups.io]

[AMD Official Use Only - General]



> -Original Message-
> From: Sunil V L 
> Sent: Wednesday, September 7, 2022 7:22 PM
> To: Chang, Abner 
> Cc: devel@edk2.groups.io; Jian J Wang ; Liming Gao
> ; Eric Dong ; Ray Ni
> ; Rahul Kumar ; Debkumar De
> ; Catharine West ;
> Daniel Schaefer ; Leif Lindholm
> ; Ard Biesheuvel ; Heinrich
> Schuchardt ; Anup Patel
> 
> Subject: Re: [RFC PATCH 16/17] UefiCpuPkg/CpuDxe: Add RISC-V support in
> CpuDxe module
> 
> [CAUTION: External Email]
> 
> On Wed, Sep 07, 2022 at 09:32:12AM +, Chang, Abner wrote:
> > [AMD Official Use Only - General]
> >
> > Hi Sunil and UefiCpuPkg maintainers,
> > For CpuDxe case, I think we should abstract CpuDxe to accommodate all
> processor architectures instead of having copy for each archs.
> CpuDxeCommon.c can have the generic protocol structure and the
> installation functions, and CpuDxeCommon.h has the general definitions. So
> does CpuMp related files. Move processor architecture dependent files to
> under arch folders. AMD may have some differences with Intel so we will
> have CpuDxeAmd.inf under CpuDxe\. AMD is revising SmmFeatureCpuLib
> base on the similar concept.  I think this makes the module looks simple and
> architectural. Furthermore, the similar concept should apply to all modules 
> (if
> necessary) under UefiCpuPkg.
> > I think we should revise CpuDxe before adding new arch such as RISC-V
> and Loongson64 to this module.
> Thanks Abner!. I have sent V2 in the current form itself since I had to move
> DSC to OvmfPkg instead of edk2-platforms.
> 
> I am not sure whether we really need this level of restructuring since I 
> didn't
> find much to share between architectures. Thats why, I just made current
> sources as x86 speicifc and added RISC-V sources.
> Anyway, let me wait for maintainers feedback.
I was also struggled with UefiCpuPkg when I tried to move RISC-V stuff over 
here. Some modules are easy to be abstracted but some are not. Some as you 
mentioned have not much to share among processor archs. For these cases we can 
use folder or a separate module for the abstraction. Having X86 source code on 
the module root and other processor archs in the folder look weird though.

>Do you have a patch already
> for this restructuring? If so, I can rebase RISC-V changes on top of it if
> maintainers accept the approach.
No,  I don't have that yet. But I am willing to help on restructuring this 
module and others if maintainers agree with this.
Thanks
Abner
> 
> Thanks
> Sunil
> >
> > Here is a BZ for UefiCpuPkg rearchitecture,
> >
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> >
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D3860data=05%7C01%7CA
> bner
> > .Chang%40amd.com%7Cc9bca42bd85c489c38ff08da90c33618%7C3dd8961fe
> 4884e60
> >
> 8e11a82d994e183d%7C0%7C0%7C637981465382450232%7CUnknown%7CTW
> FpbGZsb3d8
> >
> eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> D%7C3
> >
> 000%7C%7C%7Csdata=iDjOPZCMAH6BSBhR2kx567ibVHza2ZfhjzLHC77
> cfI8%3D&
> > amp;reserved=0
> >
> > Abner
> >
> > Something looks like below,
> > CpuDxe\X86\Ia32\
> >\IA32\CpuAsm.asm
> >\IA32\PageAttribute.c
> >   \X86\X64\
> >\X64\CpuAsm.asm
> >\X64\PageAttribute.c
> >   \X86\CpuGdt.c
> >\CpuGdt.h
> >\CpuPageTable.C
> >\CpuPageTableh.h
> >\CpuDxe.c
> >   \RISCV\RISCV64\
> >   \RISCV64\CpuDxe.h
> >   \CpuDxe.c
> >   \ARM\ARM\
> > \AARCH64\
> > \CpuDxe.c
> >   \CpuDxeCommon.c
> >   \CpuMpCommon.c
> >   \CpuDxeCommon.h
> >   \CpuMpCommon.h
> >   \CpuDxe.inf
> >
> >
> > > -Original Message-
> > > From: Sunil V L 
> > > Sent: Wednesday, September 7, 2022 1:09 AM
> > > To: devel@edk2.groups.io
> > > Cc: Jian J Wang ; Liming Gao
> > > ; Eric Dong ; Ray Ni
> > > ; Rahul Kumar ; Debkumar
> > > De ; Catharine West
> > > ; Daniel Schaefer ;
> > > Chang, Abner ; Leif Lindholm
> > > ; Ard Biesheuvel ;
> > > Heinrich Schuchardt ; Anup Patel
> > > ; Sunil V L 
> > > Subject: [RFC PATCH 16/17] UefiCpuPkg/CpuDxe: Add RISC-V support in
> > > CpuDxe module
> > >
> > > [CAUTION: External Email]
> > >
> > > This DXE module initializes the RISC-V CPU by installing the CPU
> > > specific ARCH protocol handlers. This also initializes the
> > > RISCV_EFI_BOOT_PROTOCOL which is required on RISC-V platforms.
> > >
> > > Signed-off-by: Sunil V L 
> > > ---
> > >  UefiCpuPkg/CpuDxe/CpuDxe.inf   |  16 +-
> > >  UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c | 337
> > > +
> > > UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h | 200 +
> > >  3 files changed, 552 insertions(+), 1 deletion(-)  create mode
> > >