Re: [edk2-devel][PATCH v1] IntelFsp2Pkg: NvsBufferPtr is missing in Fsp24ApiEntryM.nasm

[Zeng, Star]

Reviewed-by: Star Zeng 

-Original Message-
From: Kuo, Ted  
Sent: Thursday, September 15, 2022 9:16 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star ; S, Ashraf 
Ali ; Duggapu, Chinni B 
Subject: [edk2-devel][PATCH v1] IntelFsp2Pkg: NvsBufferPtr is missing in 
Fsp24ApiEntryM.nasm

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4063
Added NvsBufferPtr to FSPM_UPD_COMMON_FSP24 in Fsp24ApiEntryM.nasm to align 
with FSP 2.4 SPEC.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Cc: Ashraf Ali S 
Cc: Chinni B Duggapu 
Signed-off-by: Ted Kuo 
---
 IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm 
b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
index 8880721f29..a3b38e4585 100644
--- a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
+++ b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
@@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24
 .Revision:  resb  1

 .Reserved:  resb  3

 .Length resd  1

+.NvsBufferPtr   resq  1

 .StackBase: resq  1

 .StackSize: resq  1

 .BootLoaderTolumSize:   resd  1

 .BootMode:  resd  1

 .FspEventHandlerresq  1

-.Reserved1: resb 24

+.Reserved1: resb 16

 ; }

 .size:

 endstruc

--
2.35.3.windows.1



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[edk2-devel] [edk2-platforms][PATCH V2 13/16] Platform/Loongson: Add Reset System Lib.

[xianglai]

This library provides interfaces related to restart and shutdown.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../BaseResetSystemAcpiGed.c  | 155 ++
 .../BaseResetSystemAcpiGedLib.inf |  42 +++
 .../DxeResetSystemAcpiGed.c   | 270 ++
 .../DxeResetSystemAcpiGedLib.inf  |  47 +++
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.c   | 128 +
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.h   |  20 ++
 6 files changed, 662 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGedLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGed.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGedLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.h

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
new file mode 100644
index 00..a50672410b
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
@@ -0,0 +1,155 @@
+/** @file
+  Base ResetSystem library implementation.
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include "ResetSystemAcpiGed.h"
+#include 
+
+/**
+  Get configuration item data by the firmware configuration file name.
+
+  @param[in]  Name - Name of file to look up.
+
+  @returnVOID*   The Pointer of Value of Firmware Configuration item 
read.
+
+**/
+VOID *
+GetFwCfgData(
+CONST CHAR8   *Name
+)
+{
+  FIRMWARE_CONFIG_ITEM FwCfgItem;
+  EFI_STATUS   Status;
+  UINTNFwCfgSize;
+  VOID *Data;
+
+  Status = QemuFwCfgFindFile (Name, &FwCfgItem, &FwCfgSize);
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "%a %d read  %s error Status %d \n", __func__, 
__LINE__, Name, Status));
+return NULL;
+  }
+
+  Data = AllocatePool (FwCfgSize);
+  if (Data == NULL) {
+return NULL;
+  }
+
+  QemuFwCfgSelectItem (FwCfgItem);
+  QemuFwCfgReadBytes (FwCfgSize, Data);
+
+  return Data;
+}
+
+/**
+  Find the power manager related info from ACPI table
+
+
+  @retval RETURN_SUCCESS Successfully find out all the required 
information.
+  @retval RETURN_NOT_FOUND   Failed to find the required info.
+
+**/
+STATIC EFI_STATUS
+GetPowerManagerByParseAcpiInfo (VOID)
+{
+  EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE*Fadt = NULL;
+  EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp = NULL;
+  EFI_ACPI_DESCRIPTION_HEADER  *Xsdt = NULL;
+  EFI_ACPI_DESCRIPTION_HEADER  *Rsdt = NULL;
+  VOID *AcpiTables = NULL;
+  UINT32   *Entry32 = NULL;
+  UINTN Entry32Num;
+  UINT32   *Signature = NULL;
+  UINTN Idx;
+
+  Rsdp = GetFwCfgData ("etc/acpi/rsdp");
+  if (Rsdp == NULL) {
+DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/rsdp error \n", __func__, 
__LINE__));
+return RETURN_NOT_FOUND;
+  }
+
+  AcpiTables = GetFwCfgData ("etc/acpi/tables");
+  if (AcpiTables == NULL) {
+DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/tables error \n", __func__, 
__LINE__));
+FreePool (Rsdp);
+return RETURN_NOT_FOUND;
+  }
+
+  Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables +  
Rsdp->RsdtAddress);
+  Entry32= (UINT32 *)(Rsdt + 1);
+  Entry32Num = (Rsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
+  for (Idx = 0; Idx < Entry32Num; Idx++) {
+Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
+if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
+  Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)Signature;
+  DEBUG ((DEBUG_INFO, "Found Fadt in Rsdt\n"));
+  goto Done;
+}
+  }
+
+
+  Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables +  
Rsdp->XsdtAddress);
+  Entry32= (UINT32 *)(Xsdt + 1);
+  Entry32Num = (Xsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
+  for (Idx = 0; Idx < Entry32Num; Idx++) {
+Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
+if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
+  Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)Signature;
+  DEBUG ((DEBUG_INFO, "Found Fadt in Xsdt\n"))

[edk2-devel] [edk2-platforms][PATCH V2 09/16] Platform/Loongson: Add PciCpuIoDxe driver.

[xianglai]

Add PCI CpuIo protocol.there is no fix translation
offset between I/O port accesses and MMIO accesses.
Add PciCpuIo2Dxe driver to implement EFI_CPU_IO2_PROTOCOL
to add the translation for IO access.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c   | 548 ++
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h   | 219 +++
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf |  40 ++
 3 files changed, 807 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
new file mode 100644
index 00..f5154eea7a
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
@@ -0,0 +1,548 @@
+/** @file
+  Produces the CPU I/O 2 Protocol.
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "PciCpuIo2Dxe.h"
+
+//
+// Handle for the CPU I/O 2 Protocol
+//
+STATIC EFI_HANDLE  mHandle = NULL;
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mInStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  0, // EfiCpuIoWidthFifoUint8
+  0, // EfiCpuIoWidthFifoUint16
+  0, // EfiCpuIoWidthFifoUint32
+  0, // EfiCpuIoWidthFifoUint64
+  1, // EfiCpuIoWidthFillUint8
+  2, // EfiCpuIoWidthFillUint16
+  4, // EfiCpuIoWidthFillUint32
+  8  // EfiCpuIoWidthFillUint64
+};
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mOutStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  1, // EfiCpuIoWidthFifoUint8
+  2, // EfiCpuIoWidthFifoUint16
+  4, // EfiCpuIoWidthFifoUint32
+  8, // EfiCpuIoWidthFifoUint64
+  0, // EfiCpuIoWidthFillUint8
+  0, // EfiCpuIoWidthFillUint16
+  0, // EfiCpuIoWidthFillUint32
+  0  // EfiCpuIoWidthFillUint64
+};
+
+/**
+  Check parameters to a CPU I/O 2 Protocol service request.
+
+  The I/O operations are carried out exactly as requested. The caller is 
responsible
+  for satisfying any alignment and I/O width restrictions that a PI System on a
+  platform might require. For example on some platforms, width requests of
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+  be handled by the driver.
+
+  @param[in] MmioOperation  TRUE for an MMIO operation, FALSE for I/O Port 
operation.
+  @param[in] Width  Signifies the width of the I/O or Memory operation.
+  @param[in] AddressThe base address of the I/O operation.
+  @param[in] Count  The number of I/O operations to perform. The 
number of
+bytes moved is Width size * Count, starting at 
Address.
+  @param[in] Buffer For read operations, the destination buffer to 
store the results.
+For write operations, the source buffer from which 
to write data.
+
+  @retval EFI_SUCCESSThe parameters for this request pass the 
checks.
+  @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
+  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
+  @retval EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
+  @retval EFI_UNSUPPORTEDThe address range specified by Address, Width,
+ and Count is not valid for this PI system.
+
+**/
+EFI_STATUS
+CpuIoCheckParameter (
+  IN BOOLEANMmioOperation,
+  IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
+  IN UINT64 Address,
+  IN UINTN  Count,
+  IN VOID   *Buffer
+  )
+{
+  UINT64  MaxCount;
+  UINT64  Limit;
+
+  //
+  // Check to see if Buffer is NULL
+  //
+  if (Buffer == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // Check to see if Width is in the valid range
+  //
+  if ((UINT32)Width >= EfiCpuIoWidthMaximum) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // For FIFO type, the target address won't increase during the access,
+  // so treat Count as 1
+  //
+  if ((Width >= EfiCpuIoWidthFifoUint8)
+&& (Width <= EfiCpuIoWidthFifoUint64))
+  {
+Count = 1;
+  }
+
+  //
+  // Check to see if Width is in the valid range for I/O Port operations
+  //
+  Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+  if ((!MmioOperation)
+&& (Width == EfiCpuIoWidthUint64))
+  {
+return EFI_INVALID_PARAMETER;
+  }
+
+  

[edk2-devel] [edk2-platforms][PATCH V2 16/16] Platform/Loongson: Support for saving variables to flash.

[xianglai]

Added the function of saving non-volatile variables.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 Platform/Loongson/LoongArchQemuPkg/Loongson.dec|  6 ++
 Platform/Loongson/LoongArchQemuPkg/Loongson.dsc|  2 +-
 Platform/Loongson/LoongArchQemuPkg/Loongson.fdf| 14 ++
 .../Loongson/LoongArchQemuPkg/Loongson.fdf.inc | 11 +++
 .../Loongson/LoongArchQemuPkg/VarStore.fdf.inc | 10 +-
 5 files changed, 37 insertions(+), 6 deletions(-)

diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
index 508a770a22..c3e523b39b 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -32,6 +32,8 @@
 [Protocols]
 
 [PcdsFixedAtBuild, PcdsDynamic]
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashFdBase|0x0|UINT64|0
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashBlockSize|0x0|UINT32|2
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x0003
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0004
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvOffset|0x0|UINT64|0x0007
@@ -50,6 +52,10 @@
   gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x001d
   gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop|0x0|UINT64|0x001e
   gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom|0x0|UINT64|0x0022
+  
gLoongArchQemuPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT64|0x0024
+  gLoongArchQemuPkgTokenSpaceGuid.PcdAllVarSize|0x0|UINT32|0x0025
+  
gLoongArchQemuPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwSpareBase|0x0|UINT64|0x0026
+  
gLoongArchQemuPkgTokenSpaceGuid.PcdOvmfFlashNvStorageFtwWorkingBase|0x0|UINT64|0x0027
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x0028
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x0029
 
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
index ed06558f18..ec6234a26e 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -447,7 +447,7 @@
   #
   # Variable
   #
-#  
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
+  
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
   OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf {
 
   PlatformFvbLib|OvmfPkg/Library/EmuVariableFvbLib/EmuVariableFvbLib.inf
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
index ba2942e455..12920a0833 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
@@ -31,6 +31,19 @@ 
gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|gLoongArchQemuPkgTokenSpaceGui
 FV = FVMAIN_COMPACT
 
 !include VarStore.fdf.inc
+
+#
+[FD.QEMU_EFI_VARS]
+BaseAddress   = $(VARIABLE_BASE_ADDRESS)
+Size  = $(VAR_ALL_SIZE)
+ErasePolarity = 1
+BlockSize = $(BLOCK_SIZE)
+NumBlocks = $(VAR_ALL_BLOCKS)
+
+DEFINE VARIABLE_OFFSET = 0
+!include VarStore.fdf.inc
+DEFINE VARIABLE_OFFSET = 0x003a
+
 
#
 [FV.SECFV]
 FvNameGuid = 587d4265-5e71-41da-9c35-4258551f1e22
@@ -87,6 +100,7 @@ INF  MdeModulePkg/Core/Pei/PeiMain.inf
 INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 INF  Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf
+
 
#
 [FV.DXEFV]
 FvNameGuid = 5d19a5b3-130f-459b-a292-9270a9e6bc62
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf.inc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf.inc
index 964d69ed44..4b926a85ff 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf.inc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.fdf.inc
@@ -34,6 +34,7 @@ DEFINE VAR_ALL_SIZE   = 0x6
 
 
 #Set Var Flash layout
+DEFINE VARIABLE_BASE_ADDRESS  = 0x1c3a
 DEFINE VARIABLE_SIZE  = 0x0001
 DEFINE VAR_ALL_BLOCKS = 0x60
 
@@ -53,11 +54,21 @@ DEFINE EVENT_LOG_OFFSET   = $(FWTWORKING_OFFSET) + 
$(FWTWORKING_SIZE)
 DEFINE EVENT_LOG_SIZE = 0x8000
 
 # Set Variable
+SET gLoongArchQemuPkgTokenSpaceGuid.PcdFlashFdBase = $(FD_BASE_ADDRESS)
+
+SET gLoongArchQemuPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase = 
$(FD_BASE_ADDRESS) + $(VARIABLE_OFFSET)
+SET gLoongArchQemuPkgTokenSpaceGuid.PcdAllVarSize = $(VAR_ALL_SIZE)
+
+SET gLoongArchQemuPkgTokenSpaceGuid.PcdFlashBlockSiz

[edk2-devel] [edk2-platforms][PATCH V2 01/16] Platform/Loongson: Add Serial Port library

[xianglai]

Serial Port library for LoongarchQemuPkg

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../LoongArchQemuPkg/Include/Library/Cpu.h| 387 +++
 .../Include/LoongArchQemuPlatform.h   |  97 +++
 .../Library/SerialPortLib/SerialPortLib.c | 612 ++
 .../Library/SerialPortLib/SerialPortLib.inf   |  36 ++
 4 files changed, 1132 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
new file mode 100644
index 00..8c3c21bd96
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
@@ -0,0 +1,387 @@
+/** @file
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- EXC - Exception
+- INT - Interrupt
+- FPU - Floating Point Unit
+- CSR - CPU Status Register
+- READQ   - Read Quad Word
+**/
+#ifndef LOONGARCH_CPU_H_
+#define LOONGARCH_CPU_H_
+
+/* Exception types decoded by machdep exception decoder */
+#define EXC_INT 0   /* HW interrupt */
+#define EXC_TLBL1   /* TLB miss on a load */
+#define EXC_TLBS2   /* TLB miss on a store */
+#define EXC_TLBI3   /* TLB miss on a ifetch */
+#define EXC_TLBM4   /* TLB modified fault */
+#define EXC_TLBRI   5   /* TLB Read-Inhibit exception */
+#define EXC_TLBXI   6   /* TLB Execution-Inhibit exception 
*/
+#define EXC_TLBPE   7   /* TLB Privilege Error */
+#define EXC_ADE 8   /* Address Error */
+#define EXC_ALE 9   /* Unalign Access */
+#define EXC_OOB 10  /* Out of bounds */
+#define EXC_SYS 11  /* System call */
+#define EXC_BP  12  /* Breakpoint */
+#define EXC_INE 13  /* Inst. Not Exist */
+#define EXC_IPE 14  /* Inst. Privileged Error */
+#define EXC_FPDIS   15  /* FPU Disabled */
+#define EXC_LSXDIS  16  /* LSX Disabled */
+#define EXC_LASXDIS 17  /* LASX Disabled */
+#define EXC_FPE 18  /* Floating Point Exception */
+#define EXC_WATCH   19  /* Watch address reference */
+#define EXC_BAD 255 /* Undecodeable */
+
+#define COPY_SIGCODE// copy sigcode above user stack in exec
+#define ZERO$r0 /* wired zero */
+#define RA  $r1 /* return address */
+#define GP  $r2 /* global pointer - caller saved for 
PIC */
+#define SP  $r3 /* stack pointer */
+#define V0  $r4 /* return value - caller saved */
+#define V1  $r5
+#define A0  $r4 /* argument registers */
+#define A1  $r5
+#define A2  $r6
+#define A3  $r7
+#define A4  $r8 /* arg reg 64 bit; caller saved in 32 
bit */
+#define A5  $r9
+#define A6  $r10
+#define A7  $r11
+#define T0  $r12 /* caller saved */
+#define T1  $r13
+#define T2  $r14
+#define T3  $r15
+#define T4  $r16 /* callee saved */
+#define T5  $r17
+#define T6  $r18
+#define T7  $r19
+#define T8  $r20 /* caller saved */
+#define TP  $r21 /* TLS */
+#define FP  $r22 /* frame pointer */
+#define S0  $r23 /* callee saved */
+#define S1  $r24
+#define S2  $r25
+#define S3  $r26
+#define S4  $r27
+#define S5  $r28
+#define S6  $r29
+#define S7  $r30
+#define S8  $r31 /* callee saved */
+
+#define FCSR0   $r0
+
+//
+// Location of the saved registers relative to ZERO.
+// Usage is p->p_regs[XX].
+//
+#define RA_NUM  1
+#define GP_NUM  2
+#define SP_NUM   

[edk2-devel] [edk2-platforms][PATCH V2 14/16] Platform/Loongson: Support Dxe

[xianglai]

Support Dxe for LoogArch.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../Loongson/LoongArchQemuPkg/Loongson.dec|  14 +-
 .../Loongson/LoongArchQemuPkg/Loongson.dsc| 420 +-
 .../Loongson/LoongArchQemuPkg/Loongson.fdf| 243 ++
 .../LoongArchQemuPkg/Loongson.fdf.inc |  42 ++
 .../LoongArchQemuPkg/VarStore.fdf.inc |  64 +++
 5 files changed, 778 insertions(+), 5 deletions(-)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/VarStore.fdf.inc

diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
index aca53583f1..508a770a22 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -18,7 +18,8 @@
 #   Comments are used for Keywords and Module Types.
 #
 # Supported Module Types:
-#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER 
DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER
+#  DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
 #
 

 [Includes.common]
@@ -26,12 +27,20 @@
 
 [Guids]
   gLoongArchQemuPkgTokenSpaceGuid  = { 0x0e0383ce, 0x0151, 0x4d01, { 0x80, 
0x0e, 0x3f, 0xef, 0x8b, 0x27, 0x6d, 0x52 } }
+  gEfiLoongsonBootparamsTableGuid  = { 0x4660f721, 0x2ec5, 0x416a, { 0x89, 
0x9a, 0x43, 0x18, 0x02, 0x50, 0xa0, 0xc9 } }
+
+[Protocols]
 
 [PcdsFixedAtBuild, PcdsDynamic]
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x0003
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0004
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvOffset|0x0|UINT64|0x0007
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|0x0|UINT64|0x0008
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize|0x0|UINT32|0x0009
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecModuleBase|0x0|UINT64|0x000a
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecModuleSize|0x0|UINT32|0x000b
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashEventLogBase|0x0|UINT64|0x000c
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashEventLogSize|0x0|UINT32|0x000d
   
gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0|UINT32|0x0016
   
gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|0|UINT32|0x0017
   gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase|0x0|UINT64|0x0018
@@ -47,6 +56,8 @@
 [PcdsFixedAtBuild.LOONGARCH64]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32|UINT8|0x0010
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x0011
+   
gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceSpaceStartAddress|0x1000|UINT32|0x0012
+   
gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceSpaceLength|0x8000|UINT32|0x0013
 
 [PcdsDynamic]
   gLoongArchQemuPkgTokenSpaceGuid.PcdRamSize|0x4000|UINT64|0x0041
@@ -58,3 +69,4 @@
   gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd|0x0|UINT64|0x0047
   gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte|0x0|UINT64|0x0048
 
+[PcdsFeatureFlag]
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
index 09b324c3f7..578b80b7b0 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -24,6 +24,25 @@
   FLASH_DEFINITION   = 
Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
   TTY_TERMINAL   = FALSE
 
+  #
+  # Defines for default states.  These can be changed on the command line.
+  # -D FLAG=VALUE
+  DEFINE TTY_TERMINAL= FALSE
+  DEFINE SECURE_BOOT_ENABLE  = FALSE
+  DEFINE TPM2_ENABLE = FALSE
+  DEFINE TPM2_CONFIG_ENABLE  = FALSE
+
+  #
+  # Network definition
+  #
+  DEFINE NETWORK_IP6_ENABLE  = FALSE
+  DEFINE NETWORK_HTTP_BOOT_ENABLE= FALSE
+  DEFINE NETWORK_SNP_ENABLE  = FALSE
+  DEFINE NETWORK_TLS_ENABLE  = FALSE
+  DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS  = TRUE
+  DEFINE NETWORK_ISCSI_ENABLE= FALSE
+
+!include NetworkPkg/NetworkDefines.dsc.inc
 
 #
 # Defines for default states.  These can be changed on the command line.
@@ -37,16 +56,25 @@
   #
   GCC:*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
 
+!include NetworkPkg/NetworkBuildOptions.dsc.inc
 
 [BuildOptions.LOONGARCH64.EDKII.SEC]
   *_*_*_CC_FLAGS =
 
-#[BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
-#  GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
+[BuildOptions.common.EDKII.DXE_CORE,BuildOptions.common.EDKII.DXE_DRIVER,BuildOptions.common.EDKII.UEFI_DRIVER,BuildOptions.common.EDKII.UEFI_APPLICATION]
+  GCC:*_*_*_DLIN

[edk2-devel] [edk2-platforms][PATCH V2 06/16] Platform/Loongson: Add StableTimerLib.

[xianglai]

This library provides a delay interface and a timing interface.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../Include/Library/StableTimer.h |  43 
 .../Library/StableTimerLib/Count.S|  35 +++
 .../Library/StableTimerLib/TimerLib.c | 242 ++
 .../Library/StableTimerLib/TimerLib.inf   |  28 ++
 4 files changed, 348 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
new file mode 100644
index 00..09a2d07404
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
@@ -0,0 +1,43 @@
+/** @file
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Csr- Cpu Status Register
+- Calc   - Calculation
+- Freq   - frequency
+**/
+
+#ifndef STABLE_TIMER_H_
+#define STABLE_TIMER_H_
+#include "Library/Cpu.h"
+
+/**
+  Gets the timer count value.
+
+  @param[] VOID
+
+  @retval  timer count value.
+**/
+extern
+UINTN
+EFIAPI
+LoongArchReadTime (
+  VOID
+  );
+
+/**
+  Calculate the timer frequency.
+
+  @param[] VOID
+
+  @retval  Timer frequency.
+**/
+UINT32
+EFIAPI
+CalcConstFreq (
+  VOID
+  );
+#endif
diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S 
b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
new file mode 100644
index 00..f22635712c
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
@@ -0,0 +1,35 @@
+#--
+#
+# Count for LoongArch
+#
+# Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+#ifndef __ASSEMBLY__
+#define  __ASSEMBLY__
+#endif
+
+#include "Library/Cpu.h"
+#include "LoongArchAsmMacro.h"
+#
+# Set cpu interrupts
+# @param A0 The interrupt number
+#
+ASM_FUNC(CpuSetIP)
+csrrd   T0, LOONGARCH_CSR_ECFG
+or  T0, T0, A0
+csrwr   T0, LOONGARCH_CSR_ECFG
+jirlZERO, RA,0
+
+#
+#Gets the timer count value.
+#
+#@param[] VOID
+#
+#@retval  timer count value.
+ASM_FUNC(LoongArchReadTime)
+rdtime.d   A0, ZERO
+jirlZERO, RA,0
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c 
b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
new file mode 100644
index 00..e758ae9d35
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
@@ -0,0 +1,242 @@
+/** @file
+  Generic LoongArch implementation of TimerLib.h
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Freq - Frequency
+- Csr  - Cpu Status Register
+- calc - calculate
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include "Library/StableTimer.h"
+#include "Library/Cpu.h"
+
+UINT32 StableTimerFreq = 0;
+
+/**
+  Calculate the timer frequency.
+
+  @param[] VOID
+
+  @retval  Timer frequency.
+**/
+UINT32
+EFIAPI
+CalcConstFreq (
+  VOID
+  )
+{
+  UINT32 Result;
+  UINT32 BaseFreq;
+  UINT32 ClockMultiplier;
+  UINT32 ClockDivide;
+
+  LOONGARCH_GET_CPUCFG (BaseFreq, LOONGARCH_CPUCFG4);
+  LOONGARCH_GET_CPUCFG (Result, LOONGARCH_CPUCFG5);
+  ClockMultiplier = Result & 0x;
+  ClockDivide = (Result >> 16) & 0x;
+
+  if ((!BaseFreq)
+|| (!ClockMultiplier)
+|| (!ClockDivide))
+  {
+return 0;
+  }
+  else {
+return (BaseFreq * ClockMultiplier / ClockDivide);
+  }
+}
+/**
+  Get the timer frequency.
+
+  @param[] VOID
+
+  @retval  Timer frequency.
+**/
+UINT32
+EFIAPI
+GetFreq (
+  VOID
+  )
+{
+  if (StableTimerFreq) {
+  } else {
+StableTimerFreq = CalcConstFreq ();
+  }
+
+  return StableTimerFreq;
+}
+
+/**
+  Stalls the CPU for at least the given number of microseconds.
+
+  Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+  @param  MicroSeconds  The minimum number of microseconds to delay.
+
+  @return MicroSeconds
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+  IN  UINTN MicroSeconds
+  )
+{
+
+  UINTN Count;
+  UINTN Ticks;
+  UINTN Start;
+  UINTN End;
+
+  Count = GetFreq ();
+  Count = (Count * MicroSeconds) / 100;
+  Start = CsrReadTime ();
+  End = Start + Count;
+
+  do {
+Ticks = CsrReadTime ();
+  } while

[edk2-devel] [edk2-platforms][PATCH V2 11/16] Platform/Loongson: Add RealTime Clock lib.

[xianglai]

This library provides interfaces such as
real-time clock initialization
to get time and setting time.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../LsRealTimeClockLib/LsRealTimeClock.h  |  41 +++
 .../LsRealTimeClockLib/LsRealTimeClockLib.c   | 343 ++
 .../LsRealTimeClockLib/LsRealTimeClockLib.inf |  41 +++
 3 files changed, 425 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
new file mode 100644
index 00..c98881e5d0
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
@@ -0,0 +1,41 @@
+/** @file
+  Implement EFI RealTimeClock runtime services via RTC Lib.
+
+  Copyright (c) 2021, Loongson Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#ifndef LS_REAL_TIME_CLOCK_H_
+#define LS_REAL_TIME_CLOCK_H_
+
+#define TOY_WRITE0_REG0x24
+#define TOY_WRITE1_REG0x28
+#define TOY_READ0_REG 0x2c
+#define TOY_READ1_REG 0x30
+#define RTC_CTRL_REG  0x40
+
+/* TOY Enable bits */
+#define RTC_ENABLE_BIT(1UL << 13)
+#define TOY_ENABLE_BIT(1UL << 11)
+#define OSC_ENABLE_BIT(1UL << 8)
+
+/*
+ * shift bits and filed mask
+ */
+#define TOY_MON_MASK  0x3f
+#define TOY_DAY_MASK  0x1f
+#define TOY_HOUR_MASK 0x1f
+#define TOY_MIN_MASK  0x3f
+#define TOY_SEC_MASK  0x3f
+#define TOY_MSEC_MASK 0xf
+
+#define TOY_MON_SHIFT 26
+#define TOY_DAY_SHIFT 21
+#define TOY_HOUR_SHIFT16
+#define TOY_MIN_SHIFT 10
+#define TOY_SEC_SHIFT 4
+
+#endif //__LS_REAL_TIME_CLOCK_H__
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
new file mode 100644
index 00..78420ddfab
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
@@ -0,0 +1,343 @@
+/** @file
+  Implement EFI RealTimeClock runtime services via RTC Lib.
+
+  Copyright (c) 2021, Loongson Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "LsRealTimeClock.h"
+
+STATIC BOOLEANmInitialized = FALSE;
+STATIC EFI_EVENT  mRtcVirtualAddrChangeEvent;
+STATIC UINTN  mRtcBase = 0X100d0100;
+/*
+  Enable Real-time clock.
+
+  @param VOID
+
+  @retval  VOID
+ */
+VOID
+InitRtc (
+  VOID
+  )
+{
+ UINTN  Val;
+
+  if (!mInitialized) {
+/* enable rtc */
+Val  = MmioRead32 (mRtcBase + RTC_CTRL_REG);
+Val |= TOY_ENABLE_BIT | OSC_ENABLE_BIT;
+MmioWrite32 (mRtcBase + RTC_CTRL_REG, Val);
+mInitialized = TRUE;
+  }
+}
+
+/**
+  Returns the current time and date information, and the time-keeping 
capabilities
+  of the hardware platform.
+
+  @param  Time   A pointer to storage to receive a snapshot of 
the current time.
+  @param  Capabilities   An optional pointer to a buffer to receive 
the real time clock
+ device's capabilities.
+
+  @retval EFI_SUCCESSThe operation completed successfully.
+  @retval EFI_INVALID_PARAMETER  Time is NULL.
+  @retval EFI_DEVICE_ERROR   The time could not be retrieved due to 
hardware error.
+  @retval EFI_SECURITY_VIOLATION The time could not be retrieved due to an 
authentication failure.
+
+**/
+EFI_STATUS
+EFIAPI
+LibGetTime (
+  OUT EFI_TIME*Time,
+  OUT EFI_TIME_CAPABILITIES   *Capabilities
+  )
+{
+  UINT32  Val;
+
+  // Ensure Time is a valid pointer
+  if (Time == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  InitRtc ();
+  Val = MmioRead32 (mRtcBase + TOY_READ1_REG);
+  Time->Year = Val + 1900;
+
+  Val = MmioRead32 (mRtcBase + TOY_READ0_REG);
+  Time->Month =  (Val >> TOY_MON_SHIFT) & TOY_MON_MASK;
+  Time->Day   =  (Val >> TOY_DAY_SHIFT) & TOY_DAY_MASK;
+  Time->Hour  =  (Val >> TOY_HOUR_SHIFT) & TOY_HOUR_MASK;
+  Time->Minute = (Val >> TOY_MIN_SHIFT) & TOY_MIN_MASK;
+  Time->Second = (Val >> TOY_SEC_SHIFT) & TOY_SEC_MASK;
+  Time->Nanosecond  = 0;
+  return EFI_SUCCESS;
+}
+
+
+/**
+  Sets the current local time and date information.
+
+  @param  Time  A pointer to the current time.
+
+  @retval EFI_SUCCESS   The o

[edk2-devel] [edk2-platforms][PATCH V2 15/16] Platform/Loongson: Add QemuFlashFvbServicesRuntimeDxe driver.

[xianglai]

This library provides flash read and write functionality
and supports writing variables to flash.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../QemuFlashFvbServicesRuntimeDxe/FvbInfo.c  |  115 ++
 .../FvbServicesRuntimeDxe.inf |   73 ++
 .../FwBlockService.c  | 1158 +
 .../FwBlockService.h  |  178 +++
 .../FwBlockServiceDxe.c   |  152 +++
 .../QemuFlash.c   |  251 
 .../QemuFlash.h   |   86 ++
 .../QemuFlashDxe.c|   21 +
 .../Loongson/LoongArchQemuPkg/Loongson.dsc|4 +-
 9 files changed, 2036 insertions(+), 2 deletions(-)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FvbInfo.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FwBlockService.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FwBlockService.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FwBlockServiceDxe.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/QemuFlash.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/QemuFlash.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FvbInfo.c
 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FvbInfo.c
new file mode 100644
index 00..df772f72be
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/QemuFlashFvbServicesRuntimeDxe/FvbInfo.c
@@ -0,0 +1,115 @@
+/** @file
+  Defines data structure that is the volume header found.These data is intent
+  to decouple FVB driver with FV header.
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// The package level header files this module uses
+//
+#include 
+
+//
+// The protocols, PPI and GUID definitions for this module
+//
+#include 
+//
+// The Library classes this module consumes
+//
+#include 
+#include 
+
+typedef struct {
+  UINT64FvLength;
+  EFI_FIRMWARE_VOLUME_HEADERFvbInfo;
+  //
+  // EFI_FV_BLOCK_MAP_ENTRYExtraBlockMap[n];//n=0
+  //
+  EFI_FV_BLOCK_MAP_ENTRYEnd[1];
+} EFI_FVB_MEDIA_INFO;
+
+EFI_FVB_MEDIA_INFO  mPlatformFvbMediaInfo[] = {
+  //
+  // System NvStorage FVB
+  //
+  {
+FixedPcdGet32 (PcdAllVarSize),
+{
+  {
+0,
+  },  // ZeroVector[16]
+  EFI_SYSTEM_NV_DATA_FV_GUID,
+  FixedPcdGet32 (PcdAllVarSize),
+  EFI_FVH_SIGNATURE,
+  EFI_FVB2_MEMORY_MAPPED |
+  EFI_FVB2_READ_ENABLED_CAP |
+  EFI_FVB2_READ_STATUS |
+  EFI_FVB2_WRITE_ENABLED_CAP |
+  EFI_FVB2_WRITE_STATUS |
+  EFI_FVB2_ERASE_POLARITY |
+  EFI_FVB2_ALIGNMENT_16,
+  sizeof (EFI_FIRMWARE_VOLUME_HEADER) + sizeof (EFI_FV_BLOCK_MAP_ENTRY),
+  0,  // CheckSum
+  0,  // ExtHeaderOffset
+  {
+0,
+  },  // Reserved[1]
+  2,  // Revision
+  {
+{
+  (FixedPcdGet32 (PcdAllVarSize))/
+  FixedPcdGet32 (PcdFlashBlockSize),
+  FixedPcdGet32 (PcdFlashBlockSize),
+}
+  } // BlockMap[1]
+},
+{
+  {
+0,
+0
+  }
+}  // End[1]
+  }
+};
+
+EFI_STATUS
+GetFvbInfo (
+  IN  UINT64  FvLength,
+  OUT EFI_FIRMWARE_VOLUME_HEADER  **FvbInfo
+  )
+{
+  STATIC BOOLEAN  Checksummed = FALSE;
+  UINTN   Index;
+
+  if (!Checksummed) {
+for (Index = 0;
+ Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI_FVB_MEDIA_INFO);
+ Index += 1)
+{
+  UINT16  Checksum;
+  mPlatformFvbMediaInfo[Index].FvbInfo.Checksum = 0;
+  Checksum  = CalculateCheckSum16 (
+(UINT16 
*)&mPlatformFvbMediaInfo[Index].FvbInfo,
+
mPlatformFvbMediaInfo[Index].FvbInfo.HeaderLength
+);
+  mPlatformFvbMediaInfo[Index].FvbInfo.Checksum = Checksum;
+}
+Checksummed = TRUE;
+  }
+
+  for (Index = 0;
+   Index < sizeof (mPlatformFvbMediaInfo) / sizeof (EFI_FVB_MEDIA_INFO);
+   Index += 1)
+  {
+if (mPlatformFvbMediaInfo[Index].FvLength == FvLength) {
+  *FvbInfo = &mPlatformFvbMediaInfo[Index].FvbInfo;
+  return EFI_SUCCESS;
+}
+  }
+
+  return EFI_NOT_FOUND;
+}
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Dr

[edk2-devel] [edk2-platforms][PATCH V2 12/16] Platform/Loongson: Add Platform Boot Manager Lib.

[xianglai]

The Library provides Boot Manager interfaces.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../PlatformBootManagerLib/PlatformBm.c   | 760 ++
 .../PlatformBootManagerLib/PlatformBm.h   | 112 +++
 .../PlatformBootManagerLib.inf|  78 ++
 .../PlatformBootManagerLib/QemuKernel.c   |  81 ++
 4 files changed, 1031 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/QemuKernel.c

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
new file mode 100644
index 00..f58c43fa89
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
@@ -0,0 +1,760 @@
+/** @file
+  Implementation for PlatformBootManagerLib library class interfaces.
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "PlatformBm.h"
+
+STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
+//
+// VENDOR_DEVICE_PATH SerialDxe
+//
+{
+{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) 
},
+SERIAL_DXE_FILE_GUID
+},
+
+//
+// UART_DEVICE_PATH Uart
+//
+{
+{ MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
+0,  // Reserved
+FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
+FixedPcdGet8 (PcdUartDefaultDataBits),  // DataBits
+FixedPcdGet8 (PcdUartDefaultParity),// Parity
+FixedPcdGet8 (PcdUartDefaultStopBits)   // StopBits
+  },
+
+  //
+  // VENDOR_DEFINED_DEVICE_PATH TermType
+  //
+  {
+{
+  MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
+  DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
+}
+//
+// Guid to be filled in dynamically
+//
+  },
+
+  //
+  // EFI_DEVICE_PATH_PROTOCOL End
+  //
+  {
+END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+  }
+};
+
+STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
+  //
+  // USB_CLASS_DEVICE_PATH Keyboard
+  //
+  {
+{
+  MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
+  DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
+},
+0x, // VendorId: any
+0x, // ProductId: any
+3,  // DeviceClass: HID
+1,  // DeviceSubClass: boot
+1   // DeviceProtocol: keyboard
+  },
+
+  //
+  // EFI_DEVICE_PATH_PROTOCOL End
+  //
+  {
+END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+  }
+};
+
+/**
+  Locate all handles that carry the specified protocol, filter them with a
+  callback function, and pass each handle that passes the filter to another
+  callback.
+
+  @param[in] ProtocolGuid  The protocol to look for.
+
+  @param[in] FilterThe filter function to pass each handle to. If this
+   parameter is NULL, then all handles are processed.
+
+  @param[in] Process   The callback function to pass each handle to that
+   clears the filter.
+**/
+VOID
+FilterAndProcess (
+  IN EFI_GUID  *ProtocolGuid,
+  IN FILTER_FUNCTION   Filter OPTIONAL,
+  IN CALLBACK_FUNCTION Process
+  )
+{
+  EFI_STATUS Status;
+  EFI_HANDLE *Handles;
+  UINTN  NoHandles;
+  UINTN  Idx;
+
+  Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
+  NULL /* SearchKey */, &NoHandles, &Handles);
+  if (EFI_ERROR (Status)) {
+//
+// This is not an error, just an informative condition.
+//
+DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
+  Status));
+return;
+  }
+
+  ASSERT (NoHandles > 0);
+  for (Idx = 0; Idx < NoHandles; ++Idx) {
+CHAR16*DevicePathText;
+STATIC CHAR16 Fallback[] = L"";
+
+//
+// The ConvertDevicePathToText () function handles NULL input 
transparently.
+//
+DevicePathText = ConvertDevicePathToText (
+   DevicePathFromHandle (Handles[Idx]),
+   FALSE, // DisplayOnly
+   FALSE  // AllowShortcuts
+   );
+if (DevicePathText == NULL) {
+  DevicePathText = Fallback;
+}
+
+if ((Filter == NULL)
+  || (Filter (Handles[Idx], DevicePathText)))
+{
+  Process (Handles[Idx], DevicePathText);
+}
+
+if (DeviceP

[edk2-devel] [edk2-platforms][PATCH V2 03/16] Platform/Loongson: Add PeiServicesTablePointerLib.

[xianglai]

Use a register to save PeiServicesTable pointer,
This lib Provides PeiServicesTable pointer saving
and retrieval services.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../PeiServicesTablePointer.c | 78 +++
 .../PeiServicesTablePointerLib.inf| 32 
 2 files changed, 110 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
new file mode 100644
index 00..068960d4ce
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
@@ -0,0 +1,78 @@
+/** @file
+  PEI Services Table Pointer Library.
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include "Library/Cpu.h"
+
+/**
+  Caches a pointer PEI Services Table.
+
+  Caches the pointer to the PEI Services Table specified by 
PeiServicesTablePointer
+  in a platform specific manner.
+
+  If PeiServicesTablePointer is NULL, then ASSERT ().
+
+  @paramPeiServicesTablePointer   The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+  IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
+  )
+{
+  LOONGARCH_CSR_WRITEQ ((UINTN)PeiServicesTablePointer, LOONGARCH_CSR_KS0);
+}
+
+/**
+  Retrieves the cached value of the PEI Services Table pointer.
+
+  Returns the cached value of the PEI Services Table pointer in a CPU specific 
manner
+  as specified in the CPU binding section of the Platform Initialization 
Pre-EFI
+  Initialization Core Interface Specification.
+
+  If the cached PEI Services Table pointer is NULL, then ASSERT ().
+
+  @return  The pointer to PeiServices.
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+  VOID
+  )
+{
+  UINTN  val;
+
+  LOONGARCH_CSR_READQ (val, LOONGARCH_CSR_KS0);
+  return (CONST EFI_PEI_SERVICES **)val;
+}
+
+/**
+Perform CPU specific actions required to migrate the PEI Services Table
+pointer from temporary RAM to permanent RAM.
+
+For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+a dedicated CPU register.  This means that there is no memory storage
+associated with storing the PEI Services Table pointer, so no additional
+migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+VOID
+)
+{
+  return;
+}
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
new file mode 100644
index 00..6fe76d1351
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
@@ -0,0 +1,32 @@
+## @file
+#  PEI Services Table Pointer Library.
+#
+#  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = PeiServicesTablePointerLib
+  FILE_GUID  = C3C9C4ED-EB8A-4548-BE1B-ABB0B6F35B1E
+  MODULE_TYPE= PEIM
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PeiServicesTablePointerLib|PEIM PEI_CORE SEC
+
+#
+#  VALID_ARCHITECTURES   = LOONGARCH64
+#
+
+[Sources]
+  PeiServicesTablePointer.c
+
+[Packages]
+  Platform/Loongson/LoongArchQemuPkg/Loongson.dec
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
+
+[Pcd]
+
-- 
2.31.1



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[edk2-devel] [edk2-platforms][PATCH V2 02/16] Platform/Loongson: Support SEC And Add Readme.md

[xianglai]

Add SEC Code And Readme.md for LoongArchQemu

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li  
Signed-off-by: xianglai li 
---
 Maintainers.txt   |   4 +
 .../Include/LoongArchAsmMacro.h   |  23 +
 .../Loongson/LoongArchQemuPkg/Loongson.dec|  38 ++
 .../Loongson/LoongArchQemuPkg/Loongson.dsc| 133 +
 .../Loongson/LoongArchQemuPkg/Loongson.fdf|  53 ++
 .../LoongArchQemuPkg/Loongson.fdf.inc |  21 +
 Platform/Loongson/LoongArchQemuPkg/Readme.md  |  59 ++
 .../LoongArchQemuPkg/Sec/LoongArch64/Start.S  |  76 +++
 .../Loongson/LoongArchQemuPkg/Sec/SecMain.c   | 510 ++
 .../Loongson/LoongArchQemuPkg/Sec/SecMain.inf |  49 ++
 Readme.md |   9 +
 11 files changed, 975 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/LoongArchAsmMacro.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.dec
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.fdf.inc
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Readme.md
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/LoongArch64/Start.S
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.inf

diff --git a/Maintainers.txt b/Maintainers.txt
index 700ca0af60..8921d6b4e1 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -329,6 +329,10 @@ M: Bob Feng 
 M: Liming Gao 
 R: Yuwei Chen 
 
+Loongson platforms
+F: Platform/Loongson/
+M: xianglai li 
+
 Marvell platforms and silicon
 F: Platform/Marvell/
 F: Platform/SolidRun/Armada80x0McBin/
diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchAsmMacro.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchAsmMacro.h
new file mode 100644
index 00..366d4308e8
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchAsmMacro.h
@@ -0,0 +1,23 @@
+/** @file
+   LoongArch ASM macro definition.
+
+   Copyright (c) 2021, Loongson Limited. All rights reserved.
+
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ **/
+
+#ifndef LOONGARCH_ASM_MACRO_H_
+#define LOONGARCH_ASM_MACRO_H_
+
+#include 
+
+#define _ASM_FUNC(Name, Section)\
+  .global   Name  ; \
+  .section  #Section, "ax"; \
+  .type Name, %function   ; \
+  Name:
+
+#define ASM_FUNC(Name)_ASM_FUNC(ASM_PFX(Name), .text. ## Name)
+
+#endif // __LOONGARCH_ASM_MACRO_H__
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
new file mode 100644
index 00..248b668fd1
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -0,0 +1,38 @@
+## @file
+#
+#  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  DEC_SPECIFICATION  = 0x00010005
+  PACKAGE_NAME   = LoongArchQemuPkg
+  PACKAGE_GUID   = b51d765a-41da-45fc-a537-de3ee785c0f6
+  PACKAGE_VERSION= 0.1
+
+
+#
+# Include Section - list of Include Paths that are provided by this package.
+#   Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER 
DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+
+[Includes.common]
+  Include# Root include for the package
+
+[Guids]
+  gLoongArchQemuPkgTokenSpaceGuid  = { 0x0e0383ce, 0x0151, 0x4d01, { 0x80, 
0x0e, 0x3f, 0xef, 0x8b, 0x27, 0x6d, 0x52 } }
+
+[PcdsFixedAtBuild, PcdsDynamic]
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x0003
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0004
+  
gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0|UINT32|0x0016
+  
gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|0|UINT32|0x0017
+  gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT64|0x001c
+  gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x001d
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x0028
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x0029
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
new file mode 100644
index 00..f23fed77e6
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -0,0 +1,133 @@
+## @file
+#
+#  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# 

[edk2-devel] [edk2-platforms][PATCH V2 05/16] Platform/Loongson: Add MmuLib.

[xianglai]

Read the memory map information through the QemuFwCfg interface,
then build the page table through the memory map information,
and finally enable Mmu.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../LoongArchQemuPkg/Include/Library/MmuLib.h |  85 ++
 .../LoongArchQemuPkg/Library/MmuLib/Mmu.S |  35 +
 .../Library/MmuLib/MmuBaseLib.inf |  35 +
 .../Library/MmuLib/MmuBaseLibPei.inf  |  45 +
 .../Library/MmuLib/MmuLibCore.c   | 908 ++
 .../Library/MmuLib/MmuLibCore.h   |  39 +
 .../Library/MmuLib/MmuLibCorePei.c| 236 +
 .../LoongArchQemuPkg/Library/MmuLib/mmu.h | 104 ++
 .../LoongArchQemuPkg/Library/MmuLib/page.h| 267 +
 .../LoongArchQemuPkg/Library/MmuLib/pte.h |  57 ++
 10 files changed, 1811 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseLibPei.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCorePei.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/mmu.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/page.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/pte.h

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
new file mode 100644
index 00..6c501eca07
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
@@ -0,0 +1,85 @@
+/** @file
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- EXC - execute
+**/
+#ifndef MMU_LIB_H_
+#define MMU_LIB_H_
+/**
+  write operation is performed Count times from the first element of Buffer.
+Convert EFI Attributes to Loongarch Attributes.
+  @param[in]  EfiAttributes Efi Attributes.
+
+  @retval  LoongArch Attributes.
+**/
+UINTN
+EfiAttributeToLoongArchAttribute (
+  IN UINTN  EfiAttributes
+  );
+
+/**
+  Finds the length and memory properties of the memory region corresponding to 
the specified base address.
+
+  @param[in]  BaseAddressTo find the base address of the memory region.
+  @param[in]  EndAddress To find the end address of the memory region.
+  @param[out]  RegionLengthThe length of the memory region found.
+  @param[out]  RegionAttributesProperties of the memory region found.
+
+  @retval  EFI_SUCCESSThe corresponding memory area was successfully found
+   EFI_NOT_FOUNDNo memory area found
+**/
+EFI_STATUS
+GetLoongArchMemoryRegion (
+  IN UINTN  BaseAddress,
+  IN UINTN  EndAddress,
+  OUTUINTN  *RegionLength,
+  OUTUINTN  *RegionAttributes
+  );
+
+/**
+  Sets the Attributes  of the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to set the 
Attributes.
+  @param[in]  Length   The length of the memory region to set the 
Attributes.
+  @param[in]  Attributes   The Attributes to be set.
+
+  @retval  EFI_SUCCESSThe Attributes was set successfully
+
+**/
+EFI_STATUS
+LoongArchSetMemoryAttributes (
+  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN UINTN Length,
+  IN UINTN Attributes
+  );
+
+/**
+  Sets the non-executable Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to set the 
Attributes.
+  @param[in]  Length   The length of the memory region to set the 
Attributes.
+
+  @retval  EFI_SUCCESSThe Attributes was set successfully
+**/
+EFI_STATUS
+LoongArchSetMemoryRegionNoExec (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINTNLength
+  );
+/**
+  Create a page table and initialize the MMU.
+
+  @param[] VOID
+
+  @retval  VOID
+**/
+VOID
+EFIAPI
+ConfigureMmu (
+  VOID
+  );
+#endif
diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S 
b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
new file mode 100644
index 00..a697b54e65
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
@@ -0,0 +1,35 @@
+#--
+#
+# LoongArch for LoongArch
+#
+# Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#-
+
+#ifndef _KERNEL
+#define _KERNEL
+#endif
+
+

[edk2-devel] [edk2-platforms][PATCH V2 10/16] Platform/Loongson: Add timer Dxe driver.

[xianglai]

This driver produces Timer Architectural Protocol,
Registers a timer interrupt and initializes the timer.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../Drivers/StableTimerDxe/Timer.c| 405 ++
 .../Drivers/StableTimerDxe/Timer.h| 165 +++
 .../Drivers/StableTimerDxe/TimerDxe.inf   |  40 ++
 3 files changed, 610 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/TimerDxe.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
new file mode 100644
index 00..29e10566b5
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
@@ -0,0 +1,405 @@
+/** @file
+  Timer Architectural Protocol as defined in the DXE CIS
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include "Library/Cpu.h"
+#include 
+#include 
+#include "Timer.h"
+#include 
+#include 
+
+//
+// The handle onto which the Timer Architectural Protocol will be installed
+//
+EFI_HANDLEmTimerHandle = NULL;
+EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+//
+// The Timer Architectural Protocol that this driver produces
+//
+EFI_TIMER_ARCH_PROTOCOL   mTimer = {
+  TimerDriverRegisterHandler,
+  TimerDriverSetTimerPeriod,
+  TimerDriverGetTimerPeriod,
+  TimerDriverGenerateSoftInterrupt
+};
+
+//
+// Pointer to the CPU Architectural Protocol instance
+//
+EFI_CPU_ARCH_PROTOCOL *mCpu;
+
+//
+// The notification function to call on every timer interrupt.
+// A bug in the compiler prevents us from initializing this here.
+//
+EFI_TIMER_NOTIFY mTimerNotifyFunction;
+
+//
+// The current period of the timer interrupt
+//
+volatile UINT64   mTimerPeriod = 0;
+volatile UINT64   mTimerTicks = 0;
+
+//
+// Const frequence in Hz
+//
+extern UINT32 StableTimerFreq;
+
+/**
+  Sets the counter value for timer.
+
+  @param CountThe 16-bit counter value to program into stable timer.
+
+  @retval VOID
+**/
+VOID
+SetPitCount (
+  IN UINT64  Count
+  )
+{
+  if (Count <= 4) {
+return;
+  }
+
+  Count &= LOONGARCH_CSR_TMCFG_TIMEVAL;
+  Count |= LOONGARCH_CSR_TMCFG_EN | LOONGARCH_CSR_TMCFG_PERIOD;
+  LOONGARCH_CSR_WRITEQ (Count, LOONGARCH_CSR_TMCFG);
+}
+
+/**
+  Timer Interrupt Handler.
+
+  @param InterruptTypeThe type of interrupt that occurred
+  @param SystemContextA pointer to the system context when the interrupt 
occurred
+
+  @retval VOID
+**/
+VOID
+EFIAPI
+TimerInterruptHandler (
+  IN EFI_EXCEPTION_TYPE   InterruptType,
+  IN EFI_SYSTEM_CONTEXT   SystemContext
+  )
+{
+  EFI_TPL OriginalTPL;
+
+  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+  //
+  // Clear interrupt.
+  //
+  LOONGARCH_CSR_WRITEQ (0x1, LOONGARCH_CSR_TINTCLR);
+
+  if (mTimerNotifyFunction != NULL) {
+//
+// @bug : This does not handle missed timer interrupts
+//
+mTimerNotifyFunction (mTimerPeriod);
+  }
+
+  gBS->RestoreTPL (OriginalTPL);
+}
+
+/**
+
+  This function registers the handler NotifyFunction so it is called every time
+  the timer interrupt fires.  It also passes the amount of time since the last
+  handler call to the NotifyFunction.  If NotifyFunction is NULL, then the
+  handler is unregistered.  If the handler is registered, then EFI_SUCCESS is
+  returned.  If the CPU does not support registering a timer interrupt handler,
+  then EFI_UNSUPPORTED is returned.  If an attempt is made to register a 
handler
+  when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+  If an attempt is made to unregister a handler when a handler is not 
registered,
+  then EFI_INVALID_PARAMETER is returned.  If an error occurs attempting to
+  register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+  is returned.
+
+
+  @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param NotifyFunction   The function to call when a timer interrupt fires.  
This
+  function executes at TPL_HIGH_LEVEL.  The DXE Core 
will
+  register a handler for the timer interrupt, so it 
can know
+  how much time has passed.  This information is used 
to
+  signal timer based events.  NULL will unregister the 
handler.
+
+  @retvalEFI_SUCCESSThe timer handler was registered.
+  @retvalEFI_UNSUPPORTEDThe platform does not support timer 
interrupts.
+  @retvalEFI_ALREADY_STARTEDNotifyFunction is not NULL, and a 
handler is already
+registered.
+  @retval  

[edk2-devel] [edk2-platforms][PATCH V2 07/16] Platform/Loongson: Support PEI phase.

[xianglai]

Platform PEI module for LoongArch platform initialization.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../Library/StableTimerLib/TimerLib.c |   6 +-
 .../Loongson/LoongArchQemuPkg/Loongson.dec|  22 ++
 .../Loongson/LoongArchQemuPkg/Loongson.dsc|  66 -
 .../Loongson/LoongArchQemuPkg/Loongson.fdf|  51 
 .../LoongArchQemuPkg/PlatformPei/Fv.c |  61 
 .../LoongArchQemuPkg/PlatformPei/MemDetect.c  | 125 +
 .../LoongArchQemuPkg/PlatformPei/Platform.c   | 264 ++
 .../LoongArchQemuPkg/PlatformPei/Platform.h   |  87 ++
 .../PlatformPei/PlatformPei.inf   |  73 +
 9 files changed, 751 insertions(+), 4 deletions(-)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Fv.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c 
b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
index e758ae9d35..660a5d8b0b 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
@@ -98,11 +98,11 @@ MicroSecondDelay (
 
   Count = GetFreq ();
   Count = (Count * MicroSeconds) / 100;
-  Start = CsrReadTime ();
+  Start = LoongArchReadTime ();
   End = Start + Count;
 
   do {
-Ticks = CsrReadTime ();
+Ticks = LoongArchReadTime ();
   } while (Ticks < End);
 
   return MicroSeconds;
@@ -154,7 +154,7 @@ GetPerformanceCounter (
   VOID
   )
 {
-  return CsrReadTime ();
+  return LoongArchReadTime ();
 }
 /**
   Retrieves the 64-bit frequency in Hz and the range of performance counter
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
index 248b668fd1..aca53583f1 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -30,9 +30,31 @@
 [PcdsFixedAtBuild, PcdsDynamic]
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x0003
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0004
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|0x0|UINT64|0x0008
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize|0x0|UINT32|0x0009
   
gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0|UINT32|0x0016
   
gLoongArchQemuPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|0|UINT32|0x0017
+  gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase|0x0|UINT64|0x0018
+  gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding|256|UINT32|0x0019
+
   gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT64|0x001c
   gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x001d
+  gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop|0x0|UINT64|0x001e
+  gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom|0x0|UINT64|0x0022
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x0028
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x0029
+
+[PcdsFixedAtBuild.LOONGARCH64]
+   gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32|UINT8|0x0010
+   gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x0011
+
+[PcdsDynamic]
+  gLoongArchQemuPkgTokenSpaceGuid.PcdRamSize|0x4000|UINT64|0x0041
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x0042
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x0043
+  gLoongArchQemuPkgTokenSpaceGuid.PcdSwapPageDir|0x0|UINT64|0x0044
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPgd|0x0|UINT64|0x0045
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud|0x0|UINT64|0x0046
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd|0x0|UINT64|0x0047
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte|0x0|UINT64|0x0048
+
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
index f23fed77e6..09b324c3f7 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -57,22 +57,58 @@
 
 [LibraryClasses.common]
   PcdLib   | 
MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  TimerLib | 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf
   PrintLib | 
MdePkg/Library/BasePrintLib/BasePrintLib.inf
   BaseMemoryLib| 
MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
 
 
   BaseLib  | MdePkg/Library/BaseLib/BaseLib.inf
+  PerformanceLib   | 
MdePkg/Library/BasePerformanceLibNull/BaseP

[edk2-devel] [edk2-platforms][PATCH V2 08/16] Platform/Loongson: Add CPU DXE driver.

[xianglai]

The driver produces EFI_CPU_ARCH_PROTOCOL,
Initialize the exception entry address.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c  | 382 ++
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h  | 153 +++
 .../Drivers/CpuDxe/CpuDxe.inf |  56 +++
 .../Drivers/CpuDxe/LoongArch64/Exception.c| 336 +++
 .../Drivers/CpuDxe/LoongArch64/Fpu.S  |  67 +++
 .../Drivers/CpuDxe/LoongArch64/LoongArch.S| 292 +
 6 files changed, 1286 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Exception.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Fpu.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/LoongArch.S

diff --git a/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
new file mode 100644
index 00..bff2bd0c0a
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
@@ -0,0 +1,382 @@
+/** @file
+  CPU DXE Module to produce CPU ARCH Protocol
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "CpuDxe.h"
+
+BOOLEAN mInterruptState   = FALSE;
+
+/*
+  This function flushes the range of addresses from Start to Start+Length
+  from the processor's data cache. If Start is not aligned to a cache line
+  boundary, then the bytes before Start to the preceding cache line boundary
+  are also flushed. If Start+Length is not aligned to a cache line boundary,
+  then the bytes past Start+Length to the end of the next cache line boundary
+  are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
+  supported. If the data cache is fully coherent with all DMA operations, then
+  this function can just return EFI_SUCCESS. If the processor does not support
+  flushing a range of the data cache, then the entire data cache can be 
flushed.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+  @param  StartThe beginning physical address to flush from the 
processor's data
+   cache.
+  @param  Length   The number of bytes to flush from the processor's 
data cache. This
+   function may flush more bytes than Length specifies 
depending upon
+   the granularity of the flush operation that the 
processor supports.
+  @param  FlushTypeSpecifies the type of flush operation to perform.
+
+  @retval EFI_SUCCESS   The address range from Start to Start+Length 
was flushed from
+the processor's data cache.
+  @retval EFI_UNSUPPORTEDT  The processor does not support the cache flush 
type specified
+by FlushType.
+  @retval EFI_DEVICE_ERROR  The address range from Start to Start+Length 
could not be flushed
+from the processor's data cache.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuFlushCpuDataCache (
+  IN EFI_CPU_ARCH_PROTOCOL   *This,
+  IN EFI_PHYSICAL_ADDRESSStart,
+  IN UINT64  Length,
+  IN EFI_CPU_FLUSH_TYPE  FlushType
+  )
+{
+
+  switch (FlushType) {
+case EfiCpuFlushTypeWriteBack:
+  WriteBackDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
+  break;
+case EfiCpuFlushTypeInvalidate:
+  InvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
+  break;
+case EfiCpuFlushTypeWriteBackInvalidate:
+  WriteBackInvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
+  break;
+default:
+  return EFI_INVALID_PARAMETER;
+  }
+
+  return EFI_SUCCESS;
+}
+
+
+/**
+  This function enables interrupt processing by the processor.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+
+  @retval EFI_SUCCESS   Interrupts are enabled on the processor.
+  @retval EFI_DEVICE_ERROR  Interrupts could not be enabled on the 
processor.
+
+**/
+EFI_STATUS
+EFIAPI
+CpuEnableInterrupt (
+  IN EFI_CPU_ARCH_PROTOCOL  *This
+  )
+{
+  EnableInterrupts ();
+
+  mInterruptState  = TRUE;
+  return EFI_SUCCESS;
+}
+
+
+/**
+  This function disables interrupt processing by the processor.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+
+  @retval EFI_SUCCESS   Interrupts are disabled on the processor.
+  @retval EFI_DEVICE_ERROR  Interrupts could not be disabled on th

[edk2-devel] [edk2-platforms][PATCH V2 04/16] Platform/Loongson: Add QemuFwCfgLib.

[xianglai]

QemuFwCfgLib for PEI phase.
This library obtains the QemuFWCfg base address by
directly parsing the fdt, and reads and writes the data
in the QemuFWCfg by operating on the QemuFWCfg base address.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Signed-off-by: xianglai li 
---
 .../Include/IndustryStandard/QemuFwCfg.h  |  95 
 .../Include/Library/QemuFwCfgLib.h| 193 +++
 .../QemuFwCfgLib/QemuFwCfgLibInternal.h   |  64 +++
 .../Library/QemuFwCfgLib/QemuFwCfgPei.c   | 119 +
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.c| 477 ++
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf  |  44 ++
 6 files changed, 992 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/IndustryStandard/QemuFwCfg.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgLibInternal.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPei.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Include/IndustryStandard/QemuFwCfg.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/IndustryStandard/QemuFwCfg.h
new file mode 100644
index 00..a028ca1124
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/IndustryStandard/QemuFwCfg.h
@@ -0,0 +1,95 @@
+/** @file
+  Macro and type definitions corresponding to the QEMU fw_cfg interface.
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- FW - FireWare
+- CFG- Configure
+- FNAME- File Name
+- CTL- Contorl
+**/
+
+#ifndef QEMU_FW_CFG_H_
+#define QEMU_FW_CFG_H_
+
+#include 
+
+//
+// The size, in bytes, of names of firmware configuration files, including at
+// least one terminating NUL byte.
+//
+#define QEMU_FW_CFG_FNAME_SIZE  56
+
+//
+// If the following bit is set in the UINT32 fw_cfg revision / feature bitmap
+// -- read from key 0x0001 with the basic IO Port or MMIO method --, then the
+// DMA interface is available.
+//
+#define FW_CFG_F_DMA BIT1
+
+//
+// Macros for the FW_CFG_DMA_ACCESS.Control bitmap (in native encoding).
+//
+#define FW_CFG_DMA_CTL_ERROR BIT0
+#define FW_CFG_DMA_CTL_READ  BIT1
+#define FW_CFG_DMA_CTL_SKIP  BIT2
+#define FW_CFG_DMA_CTL_SELECTBIT3
+#define FW_CFG_DMA_CTL_WRITE BIT4
+
+//
+// The fw_cfg registers can be found at these IO Ports, on the IO-mapped
+// platforms (Ia32 and X64).
+//
+#define FW_CFG_IO_SELECTOR  0x510
+#define FW_CFG_IO_DATA  0x511
+#define FW_CFG_IO_DMA_ADDRESS   0x514
+
+//
+// Numerically defined keys.
+//
+typedef enum {
+  QemuFwCfgItemSignature= 0x,
+  QemuFwCfgItemInterfaceVersion = 0x0001,
+  QemuFwCfgItemSystemUuid   = 0x0002,
+  QemuFwCfgItemRamSize  = 0x0003,
+  QemuFwCfgItemGraphicsEnabled  = 0x0004,
+  QemuFwCfgItemSmpCpuCount  = 0x0005,
+  QemuFwCfgItemMachineId= 0x0006,
+  QemuFwCfgItemKernelAddress= 0x0007,
+  QemuFwCfgItemKernelSize   = 0x0008,
+  QemuFwCfgItemKernelCommandLine= 0x0009,
+  QemuFwCfgItemInitrdAddress= 0x000a,
+  QemuFwCfgItemInitrdSize   = 0x000b,
+  QemuFwCfgItemBootDevice   = 0x000c,
+  QemuFwCfgItemNumaData = 0x000d,
+  QemuFwCfgItemBootMenu = 0x000e,
+  QemuFwCfgItemMaximumCpuCount  = 0x000f,
+  QemuFwCfgItemKernelEntry  = 0x0010,
+  QemuFwCfgItemKernelData   = 0x0011,
+  QemuFwCfgItemInitrdData   = 0x0012,
+  QemuFwCfgItemCommandLineAddress   = 0x0013,
+  QemuFwCfgItemCommandLineSize  = 0x0014,
+  QemuFwCfgItemCommandLineData  = 0x0015,
+  QemuFwCfgItemKernelSetupAddress   = 0x0016,
+  QemuFwCfgItemKernelSetupSize  = 0x0017,
+  QemuFwCfgItemKernelSetupData  = 0x0018,
+  QemuFwCfgItemFileDir  = 0x0019,
+
+} FIRMWARE_CONFIG_ITEM;
+
+//
+// Communication structure for the DMA access method. All fields are encoded in
+// big endian.
+//
+#pragma pack (1)
+typedef struct {
+  UINT32 Control;
+  UINT32 Length;
+  UINT64 Address;
+} FW_CFG_DMA_ACCESS;
+#pragma pack ()
+
+#endif
diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
new file mode 100644
index 00..6b42cf3073
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
@@ -0,0 +1,193 @@
+/** @file
+  QEMU/KVM Firmware Configuration access
+
+  Copyright (c) 2021 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- FW or Fw 

[edk2-devel] [edk2-platforms][PATCH V2 00/16] Platform: Add Loongson support.

[xianglai]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

The uploaded code generates firmware to support Linux launching on the 
LoongArch platform under qemu,
So it will run in a virtual machine.

LoongArch is the general processor architecture of Loongson.
You can get the latest LoongArch documents or LoongArch tools at 
https://github.com/loongson/.

You can also view the code through the Loongson community.
The edk2 code in Loongson community:
https://github.com/loongson/edk2/tree/LoongArch
The edk2-platform code in Loonson community:
https://github.com/loongson/edk2-platforms
The qemu code in Loongson community:
https://gitlab.com/qemu-project/qemu.git
The LoongArch Documentation in Loongson community:
https://github.com/loongson/LoongArch-Documentation/tree/main/docs
The all patches at:
https://github.com/loongson/edk2-platforms/tree/devel-LoongArch-patch

v2 changes:
 - Remove the inline assembly from StableTimerLib.
 - troubleshoot TAB strings, convert TAB characters to spaces.
 - remove smm related code, loongarch has no smm mode.

xianglai li (16):
  Platform/Loongson: Add Serial Port library
  Platform/Loongson: Support SEC And Add Readme.md
  Platform/Loongson: Add PeiServicesTablePointerLib.
  Platform/Loongson: Add QemuFwCfgLib.
  Platform/Loongson: Add MmuLib.
  Platform/Loongson: Add StableTimerLib.
  Platform/Loongson: Support PEI phase.
  Platform/Loongson: Add CPU DXE driver.
  Platform/Loongson: Add PciCpuIoDxe driver.
  Platform/Loongson:  Add timer Dxe driver.
  Platform/Loongson: Add RealTime Clock lib.
  Platform/Loongson: Add Platform Boot Manager Lib.
  Platform/Loongson: Add Reset System Lib.
  Platform/Loongson: Support Dxe
  Platform/Loongson: Add QemuFlashFvbServicesRuntimeDxe driver.
  Platform/Loongson: Support for saving variables to flash.

 Maintainers.txt   |4 +
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c  |  382 ++
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h  |  153 +++
 .../Drivers/CpuDxe/CpuDxe.inf |   56 +
 .../Drivers/CpuDxe/LoongArch64/Exception.c|  336 +
 .../Drivers/CpuDxe/LoongArch64/Fpu.S  |   67 +
 .../Drivers/CpuDxe/LoongArch64/LoongArch.S|  292 +
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c   |  548 
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h   |  219 
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf |   40 +
 .../QemuFlashFvbServicesRuntimeDxe/FvbInfo.c  |  115 ++
 .../FvbServicesRuntimeDxe.inf |   73 ++
 .../FwBlockService.c  | 1158 +
 .../FwBlockService.h  |  178 +++
 .../FwBlockServiceDxe.c   |  152 +++
 .../QemuFlash.c   |  251 
 .../QemuFlash.h   |   86 ++
 .../QemuFlashDxe.c|   21 +
 .../Drivers/StableTimerDxe/Timer.c|  405 ++
 .../Drivers/StableTimerDxe/Timer.h|  165 +++
 .../Drivers/StableTimerDxe/TimerDxe.inf   |   40 +
 .../Include/IndustryStandard/QemuFwCfg.h  |   95 ++
 .../LoongArchQemuPkg/Include/Library/Cpu.h|  387 ++
 .../LoongArchQemuPkg/Include/Library/MmuLib.h |   85 ++
 .../Include/Library/QemuFwCfgLib.h|  193 +++
 .../Include/Library/StableTimer.h |   43 +
 .../Include/LoongArchAsmMacro.h   |   23 +
 .../Include/LoongArchQemuPlatform.h   |   97 ++
 .../LsRealTimeClockLib/LsRealTimeClock.h  |   41 +
 .../LsRealTimeClockLib/LsRealTimeClockLib.c   |  343 +
 .../LsRealTimeClockLib/LsRealTimeClockLib.inf |   41 +
 .../LoongArchQemuPkg/Library/MmuLib/Mmu.S |   35 +
 .../Library/MmuLib/MmuBaseLib.inf |   35 +
 .../Library/MmuLib/MmuBaseLibPei.inf  |   45 +
 .../Library/MmuLib/MmuLibCore.c   |  908 +
 .../Library/MmuLib/MmuLibCore.h   |   39 +
 .../Library/MmuLib/MmuLibCorePei.c|  236 
 .../LoongArchQemuPkg/Library/MmuLib/mmu.h |  104 ++
 .../LoongArchQemuPkg/Library/MmuLib/page.h|  267 
 .../LoongArchQemuPkg/Library/MmuLib/pte.h |   57 +
 .../PeiServicesTablePointer.c |   78 ++
 .../PeiServicesTablePointerLib.inf|   32 +
 .../PlatformBootManagerLib/PlatformBm.c   |  760 +++
 .../PlatformBootManagerLib/PlatformBm.h   |  112 ++
 .../PlatformBootManagerLib.inf|   78 ++
 .../PlatformBootManagerLib/QemuKernel.c   |   81 ++
 .../QemuFwCfgLib/QemuFwCfgLibInternal.h   |   64 +
 .../Library/QemuFwCfgLib/QemuFwCfgPei.c   |  119 ++
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.c|  477 +++
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf  |   44 +
 .../BaseResetSystemAcpiGed.c  |  155 +++
 .../BaseResetSystemAcpiGedLib.inf |   42 +
 .../DxeResetSystemAcpiGed.c   |  270 
 .../DxeResetSystemAcpiGedLib.inf  |   47 +
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.c   |  12

[edk2-devel] [PATCH 3/3] CloudHv:arm: add kernel load driver into dsc/fdf

[Jianyong Wu]

As CloudHv kernel load fs driver is implemented, add it into dsc/fdf.

Signed-off-by: Jianyong Wu 
---
 ArmVirtPkg/ArmVirtCloudHv.dsc | 8 +++-
 ArmVirtPkg/ArmVirtCloudHv.fdf | 1 +
 .../CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.inf | 1 -
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtCloudHv.dsc b/ArmVirtPkg/ArmVirtCloudHv.dsc
index 7ca7a391d9..92ccd4ef12 100644
--- a/ArmVirtPkg/ArmVirtCloudHv.dsc
+++ b/ArmVirtPkg/ArmVirtCloudHv.dsc
@@ -37,13 +37,15 @@
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
 
   
ArmPlatformLib|ArmPlatformPkg/Library/ArmPlatformLibNull/ArmPlatformLibNull.inf
 
   TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf
   CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
   BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
-  
PlatformBootManagerLib|ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+  
PlatformBootManagerLib|ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
   
PlatformBmPrintScLib|OvmfPkg/Library/PlatformBmPrintScLib/PlatformBmPrintScLib.inf
   
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
   
FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
@@ -330,6 +332,10 @@
   NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
   
NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
   }
+  ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.inf {
+
+  NULL|OvmfPkg/Library/BlobVerifierLibNull/BlobVerifierLibNull.inf
+  }
 
   #
   # SCSI Bus and Disk Driver
diff --git a/ArmVirtPkg/ArmVirtCloudHv.fdf b/ArmVirtPkg/ArmVirtCloudHv.fdf
index 81c539590a..15b9c13c59 100644
--- a/ArmVirtPkg/ArmVirtCloudHv.fdf
+++ b/ArmVirtPkg/ArmVirtCloudHv.fdf
@@ -180,6 +180,7 @@ READ_LOCK_STATUS   = TRUE
   INF MdeModulePkg/Universal/DriverHealthManagerDxe/DriverHealthManagerDxe.inf
   INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
   INF MdeModulePkg/Application/UiApp/UiApp.inf
+  INF ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.inf
 
   #
   # SCSI Bus and Disk Driver
diff --git a/ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.inf 
b/ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.inf
index b7aa6ebb4e..f7b53d0747 100644
--- a/ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.inf
+++ b/ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.inf
@@ -24,7 +24,6 @@
   EmbeddedPkg/EmbeddedPkg.dec
   MdePkg/MdePkg.dec
   OvmfPkg/OvmfPkg.dec
-  UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec
 
 [LibraryClasses]
   BaseLib
-- 
2.17.1



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[edk2-devel] [PATCH 2/3] CloudHv:arm: build hob for kernel image memory as read-only

[Jianyong Wu]

As we use memory to pass kernel image, the memory region where kernel
image locates should be added into hob as read-only.

Signed-off-by: Jianyong Wu 
---
 .../CloudHvVirtMemInfoLib.c   | 66 +--
 1 file changed, 62 insertions(+), 4 deletions(-)

diff --git a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c 
b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
index 28a0c0b078..d9b7d51a16 100644
--- a/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
+++ b/ArmVirtPkg/Library/CloudHvVirtMemInfoLib/CloudHvVirtMemInfoLib.c
@@ -37,13 +37,14 @@ CloudHvVirtMemInfoPeiLibConstructor (
   )
 {
   VOID *DeviceTreeBase;
-  EFI_RESOURCE_ATTRIBUTE_TYPE  ResourceAttributes;
+  EFI_RESOURCE_ATTRIBUTE_TYPE  ResourceAttributes, ReadOnlyResourceAttributes;
   INT32Node, Prev;
   UINT64   FirMemNodeBase, FirMemNodeSize;
-  UINT64   CurBase, MemBase;
+  UINT64   CurBase, MemBase, CurSizeOff;
   UINT64   CurSize;
+  UINT64   KernelStart, KernelSize;
   CONST CHAR8  *Type;
-  INT32Len;
+  INT32Len, ChosenNode;
   CONST UINT64 *RegProp;
   RETURN_STATUSPcdStatus;
   UINT8Index;
@@ -53,6 +54,8 @@ CloudHvVirtMemInfoPeiLibConstructor (
   FirMemNodeBase = 0;
   FirMemNodeSize = 0;
   Index  = 0;
+  CurSizeOff = 0;
+  KernelSize = 0;
   MemBase= FixedPcdGet64 (PcdSystemMemoryBase);
   ResourceAttributes = (
 EFI_RESOURCE_ATTRIBUTE_PRESENT |
@@ -60,6 +63,12 @@ CloudHvVirtMemInfoPeiLibConstructor (
 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |
 EFI_RESOURCE_ATTRIBUTE_TESTED
 );
+  ReadOnlyResourceAttributes = (
+EFI_RESOURCE_ATTRIBUTE_PRESENT |
+EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+EFI_RESOURCE_ATTRIBUTE_TESTED |
+EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTED
+);
   DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
   if (DeviceTreeBase == NULL) {
 return EFI_NOT_FOUND;
@@ -72,6 +81,21 @@ CloudHvVirtMemInfoPeiLibConstructor (
 return EFI_NOT_FOUND;
   }
 
+  //
+  // Try to get kernel image info from DT
+  //
+  ChosenNode = fdt_path_offset (DeviceTreeBase, "/chosen");
+  if (ChosenNode >= 0) {
+RegProp = fdt_getprop (DeviceTreeBase, ChosenNode, "linux,kernel-start", 
&Len);
+if ((RegProp != NULL) && (Len > 0)) {
+  KernelStart = (UINT64)fdt64_to_cpu (ReadUnaligned64 (RegProp));
+  RegProp = fdt_getprop (DeviceTreeBase, ChosenNode, 
"linux,kernel-size", &Len);
+  if ((RegProp != NULL) && (Len > 0)) {
+KernelSize = (UINT64)fdt64_to_cpu (ReadUnaligned64 (RegProp));
+  }
+}
+  }
+
   //
   // Look for the lowest memory node
   //
@@ -105,11 +129,26 @@ CloudHvVirtMemInfoPeiLibConstructor (
 
 // We should build Hob seperately for the memory node except the first 
one
 if (CurBase != MemBase) {
+  // If kernel image resides in current memory node, build hob from 
CurBase to the beginning of kernel image.
+  if ((KernelSize != 0) && (KernelStart >= CurBase) && (KernelStart + 
KernelSize <= CurBase + CurSize)) {
+CurSizeOff =  CurBase + CurSize - KernelStart;
+// align up with 0x1000
+CurSizeOff = (CurSizeOff + 0xfff) & ~0xfffUL;
+  }
+
   BuildResourceDescriptorHob (
 EFI_RESOURCE_SYSTEM_MEMORY,
 ResourceAttributes,
 CurBase,
-CurSize
+CurSize - CurSizeOff
+);
+
+  // Add kernel image memory region to hob as read only
+  BuildResourceDescriptorHob (
+EFI_RESOURCE_SYSTEM_MEMORY,
+ReadOnlyResourceAttributes,
+CurBase + CurSize - CurSizeOff,
+CurSizeOff
 );
 } else {
   FirMemNodeBase = CurBase;
@@ -146,8 +185,27 @@ CloudHvVirtMemInfoPeiLibConstructor (
 return EFI_NOT_FOUND;
   }
 
+  CurSizeOff = 0;
+  // Build hob for the lowest memory node from its base to the beginning of 
kernel image once the kernel image reside here
+  if ((KernelSize != 0) && (KernelStart >= FirMemNodeBase) && (KernelStart + 
KernelSize <= FirMemNodeBase + FirMemNodeSize)) {
+CurSizeOff = FirMemNodeBase + FirMemNodeSize - KernelStart;
+// Caution the alignment
+CurSizeOff = (CurSizeOff + 0xfff) & ~0xfffUL;
+
+// Add kernel image memory region to hob as read only
+BuildResourceDescriptorHob (
+  EFI_RESOURCE_SYSTEM_MEMORY,
+  ReadOnlyResourceAttributes,
+  FirMemNodeBase + FirMemNod

[edk2-devel] [PATCH 1/3] CloudHv:arm: add kernel load fs driver

[Jianyong Wu]

This is used for supporting direct kernel boot in CloudHv. CloudHv
will store kernel image in system ram and pass kernel info through
DT. It's firmware's responsibility to fetch the kernel data and
create a file device to feed for loadImage

Signed-off-by: Jianyong Wu 
---
 .../CloudHvKernelLoaderFsDxe.c| 969 ++
 .../CloudHvKernelLoaderFsDxe.inf  |  56 +
 2 files changed, 1025 insertions(+)
 create mode 100644 
ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.c
 create mode 100644 
ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.inf

diff --git a/ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.c 
b/ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.c
new file mode 100644
index 00..e4cfcfab72
--- /dev/null
+++ b/ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.c
@@ -0,0 +1,969 @@
+/** @file
+  DXE driver to expose the 'kernel', 'initrd' and 'cmdline' blobs
+  provided by Cloud Hypervisor as files in an abstract file system
+
+  Copyright (C) 2022, Arm, Limited.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+//
+// Static data that hosts the data blobs and serves file requests.
+//
+typedef enum {
+  KernelBlobTypeKernel,
+  KernelBlobTypeInitrd,
+  KernelBlobTypeCommandLine,
+  KernelBlobTypeMax
+} KERNEL_BLOB_TYPE;
+
+typedef struct {
+  CONST CHAR16Name[8];
+  UINT32  Size;
+  UINT8   *Data;
+} KERNEL_BLOB;
+
+STATIC KERNEL_BLOB  mKernelBlob[KernelBlobTypeMax] = {
+  {
+L"kernel",
+  },{
+L"initrd",
+  },{
+L"cmdline",
+  }
+};
+
+//
+// Device path for the handle that incorporates our "EFI stub filesystem".
+//
+#pragma pack (1)
+typedef struct {
+  VENDOR_DEVICE_PATH  VenMediaNode;
+  EFI_DEVICE_PATH_PROTOCOLEndNode;
+} SINGLE_VENMEDIA_NODE_DEVPATH;
+#pragma pack ()
+
+STATIC CONST SINGLE_VENMEDIA_NODE_DEVPATH  mFileSystemDevicePath = {
+  {
+{
+  MEDIA_DEVICE_PATH, MEDIA_VENDOR_DP,
+  { sizeof (VENDOR_DEVICE_PATH)   }
+},
+QEMU_KERNEL_LOADER_FS_MEDIA_GUID
+  },  {
+END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+{ sizeof (EFI_DEVICE_PATH_PROTOCOL) }
+  }
+};
+
+STATIC CONST SINGLE_VENMEDIA_NODE_DEVPATH  mInitrdDevicePath = {
+  {
+{
+  MEDIA_DEVICE_PATH, MEDIA_VENDOR_DP,
+  { sizeof (VENDOR_DEVICE_PATH)   }
+},
+LINUX_EFI_INITRD_MEDIA_GUID
+  },  {
+END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+{ sizeof (EFI_DEVICE_PATH_PROTOCOL) }
+  }
+};
+
+//
+// The "file in the EFI stub filesystem" abstraction.
+//
+STATIC EFI_TIME  mInitTime;
+STATIC UINT64mTotalBlobBytes;
+
+#define STUB_FILE_SIG  SIGNATURE_64 ('S', 'T', 'U', 'B', 'F', 'I', 'L', 'E')
+
+typedef struct {
+  UINT64   Signature; // Carries STUB_FILE_SIG.
+
+  KERNEL_BLOB_TYPE BlobType; // Index into mKernelBlob. KernelBlobTypeMax
+ // denotes the root directory of the 
filesystem.
+
+  UINT64   Position; // Byte position for regular files;
+ // next directory entry to return for the root
+ // directory.
+
+  EFI_FILE_PROTOCOLFile;   // Standard protocol interface.
+} STUB_FILE;
+
+#define STUB_FILE_FROM_FILE(FilePointer) \
+CR (FilePointer, STUB_FILE, File, STUB_FILE_SIG)
+
+/**
+  Helper function that formats an EFI_FILE_INFO structure into the
+  user-allocated buffer, for any valid KERNEL_BLOB_TYPE value (including
+  KernelBlobTypeMax, which stands for the root directory).
+
+  The interface follows the EFI_FILE_GET_INFO -- and for directories, the
+  EFI_FILE_READ -- interfaces.
+
+  @param[in] BlobType The KERNEL_BLOB_TYPE value identifying the fw_cfg
+  blob backing the STUB_FILE that information is
+  being requested about. If BlobType equals
+  KernelBlobTypeMax, then information will be
+  provided about the root directory of the
+  filesystem.
+
+  @param[in,out] BufferSize  On input, the size of Buffer. On output, the
+ amount of data returned in Buffer. In both cases,
+ the size is measured in bytes.
+
+  @param[out]Buffer  A pointer to the data buffer to return. The
+ buffer's type is EFI_FILE_INFO.
+
+  @retval EFI_SUCCESS   The information was returned.
+  @retval EFI_BUFFER_TOO_SMALL  BufferSize is too small to store the
+EFI_FILE_INFO structure. BufferSize has been
+updated with the size needed to complete the
+  

[edk2-devel] [PATCH 0/3] CloudHv:arm: Enable direct kernel boot

[Jianyong Wu]

Direct kernel boot removes the dependency of retrieving kernel image
from block device. For Cloud Hypervisor, we use the following way to
support it.

1. Cloud Hypervisor store kernel image into memory and put kernel info,
   including the memory base and size, into DT;
2. When init memory in edk2, the kernel memory region is retrieved from
   DT and set it as read only memory region;
3. Edk2 fetches kernel from memory and prepare a image handle;
4. Load kernel using LoadImage in the end.

1 is done in Cloud Hypervisor, 2 and 3 is done in this patch set, 4 is
not affected.

github PR link: https://github.com/tianocore/edk2/pull/3339

Signed-off-by: Jianyong Wu 

Jianyong Wu (3):
  CloudHv:arm: add kernel load fs driver
  CloudHv:arm: build hob for kernel image memory as read-only
  CloudHv:arm: add kernel loader lib dsc/fdf

 ArmVirtPkg/ArmVirtCloudHv.dsc |   8 +-
 ArmVirtPkg/ArmVirtCloudHv.fdf |   1 +
 .../CloudHvKernelLoaderFsDxe.c| 969 ++
 .../CloudHvKernelLoaderFsDxe.inf  |  55 +
 .../CloudHvVirtMemInfoLib.c   |  66 +-
 5 files changed, 1094 insertions(+), 5 deletions(-)
 create mode 100644 
ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.c
 create mode 100644 
ArmVirtPkg/CloudHvKernelLoaderFsDxe/CloudHvKernelLoaderFsDxe.inf

-- 
2.17.1



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[edk2-devel] Event: TianoCore Community Meeting - APAC/NAMO - 09/15/2022 #cal-reminder

[Group Notification]

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[edk2-devel] [PATCH 2/2] BaseTools/FMMT: Add Shrink Fv function

[Yuwei Chen]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3938

This function is used to remove the useless FV free space.
Usage: FMMT -s Inputfile Outputfile

Cc: Bob Feng 
Cc: Liming Gao 
Signed-off-by: Yuwei Chen 
---
 BaseTools/Source/Python/FMMT/FMMT.py  |  7 +
 .../Source/Python/FMMT/core/FMMTOperation.py  | 26 +
 .../Source/Python/FMMT/core/FvHandler.py  | 28 ++-
 3 files changed, 60 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Source/Python/FMMT/FMMT.py 
b/BaseTools/Source/Python/FMMT/FMMT.py
index 3590f3340ec3..bf580b3843a8 100644
--- a/BaseTools/Source/Python/FMMT/FMMT.py
+++ b/BaseTools/Source/Python/FMMT/FMMT.py
@@ -41,6 +41,8 @@ parser.add_argument("-c", "--ConfigFilePath", 
dest="ConfigFilePath", nargs='+',
 FmmtConf file saves the target guidtool used in 
compress/uncompress process.\
 If do not provide, FMMT tool will search the inputfile 
folder for FmmtConf.ini firstly, if not found,\
 the FmmtConf.ini saved in FMMT tool's folder will be 
used as default.")
+parser.add_argument("-s", "--ShrinkFv", dest="ShrinkFv", nargs='+',
+help="Shrink the Fv file: '-s InputFvfile OutputFvfile")
 
 def print_banner():
 print("")
@@ -111,6 +113,9 @@ class FMMT():
 else:
 ReplaceFfs(inputfile, self.CheckFfsName(Ffs_name), newffsfile, 
outputfile)
 
+def Shrink(self,inputfile: str, outputfile: str) -> None:
+self.SetDestPath(inputfile)
+ShrinkFv(inputfile, outputfile)
 
 def main():
 args=parser.parse_args()
@@ -142,6 +147,8 @@ def main():
 
fmmt.Replace(args.Replace[0],args.Replace[2],args.Replace[3],args.Replace[4],args.Replace[1])
 else:
 
fmmt.Replace(args.Replace[0],args.Replace[1],args.Replace[2],args.Replace[3])
+elif args.ShrinkFv:
+fmmt.Shrink(args.ShrinkFv[0], args.ShrinkFv[1])
 else:
 parser.print_help()
 except Exception as e:
diff --git a/BaseTools/Source/Python/FMMT/core/FMMTOperation.py 
b/BaseTools/Source/Python/FMMT/core/FMMTOperation.py
index 4e58c91b5c41..a86f8dda9a1a 100644
--- a/BaseTools/Source/Python/FMMT/core/FMMTOperation.py
+++ b/BaseTools/Source/Python/FMMT/core/FMMTOperation.py
@@ -204,3 +204,29 @@ def ExtractFfs(inputfile: str, Ffs_name: str, outputfile: 
str, Fv_name: str=None
 logger.debug('Extract ffs data is saved in {}.'.format(outputfile))
 else:
 logger.error('Target Ffs/Fv not found!!!')
+
+def ShrinkFv(inputfile: str, outputfile: str) -> None:
+if not os.path.exists(inputfile):
+logger.error("Invalid inputfile, can not open {}.".format(inputfile))
+raise Exception("Process Failed: Invalid inputfile!")
+# 1. Data Prepare
+with open(inputfile, "rb") as f:
+whole_data = f.read()
+FmmtParser = FMMTParser(inputfile, ROOT_TREE)
+# 2. DataTree Create
+logger.debug('Parsing inputfile data..')
+FmmtParser.ParserFromRoot(FmmtParser.WholeFvTree, whole_data)
+logger.debug('Done!')
+TargetFv = FmmtParser.WholeFvTree.Child[0]
+if TargetFv:
+FvMod = FvHandler(TargetFv)
+Status = FvMod.ShrinkFv()
+else:
+logger.error('Target Fv not found!!!')
+# 4. Data Encapsulation
+if Status:
+logger.debug('Start encapsulating data..')
+FmmtParser.Encapsulation(FmmtParser.WholeFvTree, False)
+with open(outputfile, "wb") as f:
+f.write(FmmtParser.FinalData)
+logger.debug('Encapsulated data is saved in {}.'.format(outputfile))
diff --git a/BaseTools/Source/Python/FMMT/core/FvHandler.py 
b/BaseTools/Source/Python/FMMT/core/FvHandler.py
index e8b848009878..ff3d637623f8 100644
--- a/BaseTools/Source/Python/FMMT/core/FvHandler.py
+++ b/BaseTools/Source/Python/FMMT/core/FvHandler.py
@@ -145,7 +145,7 @@ def ModifyFvSystemGuid(TargetFv) -> None:
 TargetFv.Data.Data += struct2stream(item.Data.Header)+ 
item.Data.Data + item.Data.PadData
 
 class FvHandler:
-def __init__(self, NewFfs, TargetFfs) -> None:
+def __init__(self, NewFfs, TargetFfs=None) -> None:
 self.NewFfs = NewFfs
 self.TargetFfs = TargetFfs
 self.Status = False
@@ -638,3 +638,29 @@ class FvHandler:
 self.Status = True
 logger.debug('Done!')
 return self.Status
+
+def ShrinkFv(self) -> bool:
+TargetFv = self.NewFfs
+TargetFv.Data.Data = b''
+if not TargetFv.Data.Free_Space:
+self.Status = True
+else:
+BlockSize = TargetFv.Data.Header.BlockMap[0].Length
+New_Free_Space = TargetFv.Data.Free_Space%BlockSize
+Removed_Space = TargetFv.Data.Free_Space - New_Free_Space
+TargetFv.Child[-1].Data.Data = b'\xff' * New_Free_Space
+TargetFv.Data.Size -= Removed_Space
+TargetFv.Data.Header.Fvlength = TargetFv.Data.Size
+

[edk2-devel] [PATCH 1/2] BaseTools/FMMT: Add Extract FV function

[Yuwei Chen]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3938

With this patch "-e" parameter supports extract FV function.
Usage: FMMT -e Inputfile TargetFv Outputfile

Cc: Bob Feng 
Cc: Liming Gao 
Signed-off-by: Yuwei Chen 
---
 BaseTools/Source/Python/FMMT/FMMT.py  |  3 +-
 .../Source/Python/FMMT/core/FMMTOperation.py  | 45 +++
 .../Source/Python/FMMT/core/FvHandler.py  |  5 +--
 3 files changed, 31 insertions(+), 22 deletions(-)

diff --git a/BaseTools/Source/Python/FMMT/FMMT.py 
b/BaseTools/Source/Python/FMMT/FMMT.py
index 10800e776a72..3590f3340ec3 100644
--- a/BaseTools/Source/Python/FMMT/FMMT.py
+++ b/BaseTools/Source/Python/FMMT/FMMT.py
@@ -24,7 +24,8 @@ parser.add_argument("-d", "--Delete", dest="Delete", 
nargs='+',
 If not given TargetFvName, all the existed target Ffs 
will be deleted'")
 parser.add_argument("-e", "--Extract", dest="Extract", nargs='+',
 help="Extract a Ffs Info: '-e inputfile 
TargetFvName(Optional) TargetFfsName outputfile\
-If not given TargetFvName, the first found target Ffs 
will be extracted'")
+If not given TargetFvName, the first found target Ffs 
will be extracted.\
+If only given TargetFvName, not given TargetFfsName, 
the TargetFv will be extracted to output file'")
 parser.add_argument("-a", "--Add", dest="Add", nargs='+',
 help="Add a Ffs into a FV:'-a inputfile TargetFvName 
newffsfile outputfile'")
 parser.add_argument("-r", "--Replace", dest="Replace", nargs='+',
diff --git a/BaseTools/Source/Python/FMMT/core/FMMTOperation.py 
b/BaseTools/Source/Python/FMMT/core/FMMTOperation.py
index c2cc2e246740..4e58c91b5c41 100644
--- a/BaseTools/Source/Python/FMMT/core/FMMTOperation.py
+++ b/BaseTools/Source/Python/FMMT/core/FMMTOperation.py
@@ -63,9 +63,10 @@ def DeleteFfs(inputfile: str, TargetFfs_name: str, 
outputfile: str, Fv_name: str
 FmmtParser.WholeFvTree.FindNode(TargetFfs_name, 
FmmtParser.WholeFvTree.Findlist)
 # Choose the Specfic DeleteFfs with Fv info
 if Fv_name:
-for item in FmmtParser.WholeFvTree.Findlist:
-if item.Parent.key != Fv_name and item.Parent.Data.Name != Fv_name:
-FmmtParser.WholeFvTree.Findlist.remove(item)
+FindNum = len(FmmtParser.WholeFvTree.Findlist)
+for index in range(FindNum-1, -1, -1):
+if FmmtParser.WholeFvTree.Findlist[index].Parent.key != Fv_name 
and FmmtParser.WholeFvTree.Findlist[index].Parent.Data.Name != Fv_name:
+
FmmtParser.WholeFvTree.Findlist.remove(FmmtParser.WholeFvTree.Findlist[index])
 Status = False
 if FmmtParser.WholeFvTree.Findlist != []:
 for Delete_Ffs in FmmtParser.WholeFvTree.Findlist:
@@ -149,9 +150,10 @@ def ReplaceFfs(inputfile: str, Ffs_name: str, newffsfile: 
str, outputfile: str,
 new_ffs.Data.PadData = GetPadSize(new_ffs.Data.Size, FFS_COMMON_ALIGNMENT) 
* b'\xff'
 FmmtParser.WholeFvTree.FindNode(Ffs_name, FmmtParser.WholeFvTree.Findlist)
 if Fv_name:
-for item in FmmtParser.WholeFvTree.Findlist:
-if item.Parent.key != Fv_name and item.Parent.Data.Name != Fv_name:
-FmmtParser.WholeFvTree.Findlist.remove(item)
+FindNum = len(FmmtParser.WholeFvTree.Findlist)
+for index in range(FindNum-1, -1, -1):
+if FmmtParser.WholeFvTree.Findlist[index].Parent.key != Fv_name 
and FmmtParser.WholeFvTree.Findlist[index].Parent.Data.Name != Fv_name:
+
FmmtParser.WholeFvTree.Findlist.remove(FmmtParser.WholeFvTree.Findlist[index])
 if FmmtParser.WholeFvTree.Findlist != []:
 for TargetFfs in FmmtParser.WholeFvTree.Findlist:
 FfsMod = FvHandler(newFmmtParser.WholeFvTree.Child[0], TargetFfs)
@@ -180,18 +182,25 @@ def ExtractFfs(inputfile: str, Ffs_name: str, outputfile: 
str, Fv_name: str=None
 logger.debug('Done!')
 FmmtParser.WholeFvTree.FindNode(Ffs_name, FmmtParser.WholeFvTree.Findlist)
 if Fv_name:
-for item in FmmtParser.WholeFvTree.Findlist:
-if item.Parent.key != Fv_name and item.Parent.Data.Name != Fv_name:
-FmmtParser.WholeFvTree.Findlist.remove(item)
+FindNum = len(FmmtParser.WholeFvTree.Findlist)
+for index in range(FindNum-1, -1, -1):
+if FmmtParser.WholeFvTree.Findlist[index].Parent.key != Fv_name 
and FmmtParser.WholeFvTree.Findlist[index].Parent.Data.Name != Fv_name:
+
FmmtParser.WholeFvTree.Findlist.remove(FmmtParser.WholeFvTree.Findlist[index])
 if FmmtParser.WholeFvTree.Findlist != []:
 TargetNode = FmmtParser.WholeFvTree.Findlist[0]
-TargetFv = TargetNode.Parent
-if TargetFv.Data.Header.Attributes & EFI_FVB2_ERASE_POLARITY:
-TargetNode.Data.Header.State = c_uint8(
-~TargetNode.Data.Header.State)
-FinalData = struct2stream(TargetNode.Data.Header) + 
TargetNode.Data.Data
-

Re: [edk2-devel] [PATCH v2 1/1] BoardModulePkg/BoardBdsHookLib: Fix F7 overwrites Boot0000

[Isaac Oram]

Pushed as 76fc44fecb..801d003703

Note I fixed two nearby comments and my editor cleaned up trailing whitespace 
automatically.
-  // [F2]/[F7]
+  // [F2]

And
-  // Register F7 only when the mBootMenuOptionNumber is valid
+  // Register [F7] only when the mBootMenuOptionNumber is valid

Regards,
Isaac

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Isaac Oram
Sent: Thursday, September 15, 2022 5:06 PM
To: JamesWang [王家明] ; devel@edk2.groups.io
Cc: Dong, Eric ; Gao, Liming 
Subject: Re: [edk2-devel] [PATCH v2 1/1] BoardModulePkg/BoardBdsHookLib: Fix F7 
overwrites Boot

Reviewed-by: Isaac Oram 

James,

I cannot apply the patch.  I can fix it up to push though, so I don't need you 
to resolve.  But for a bigger patch, I would need help resolving.

I note that you have special characters in your name.  I doubt that matters, 
but I would probably try to keep it normal 8 bit ASCII.  I think that the 
script many maintainers use will lose those characters in favor of "?".
I note that you are using an old version of git.  Also probably not the issue.

I note that you seem to have LF line endings and I have CRLF when I generate 
and send patches.  Maybe try configuring: 
git config --global am.keepcr true
git config --global core.autocrlf  false​

These are my notes on config.  I am not sure if they are relevant still.  
Especially the second one.  I don't seem to have that set anymore.  Setting 
keepcr false caused an error applying patch for me.

Regards,
Isaac

-Original Message-
From: JamesWang [王家明] 
Sent: Tuesday, September 13, 2022 2:36 AM
To: devel@edk2.groups.io
Cc: Dong, Eric ; Oram, Isaac W ; 
Gao, Liming 
Subject: [PATCH v2 1/1] BoardModulePkg/BoardBdsHookLib: Fix F7 overwrites 
Boot

Check if mBootMenuOptionNumber is valid or not before calling 
RegisterBootOptionHotkey to avoid overwriting Boot

Cc: Eric Dong 
Cc: Isaac Oram 
Cc: Liming Gao 
Signed-off-by: James Wang 
---
 Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOption.c | 17 
+++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git 
a/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOption.c 
b/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOption.c
index 6e3c21f4f052..34c971f3780b 100644
--- a/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOption.c
+++ b/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOpt
+++ ion.c
@@ -461,12 +461,17 @@ RegisterStaticHotkey (
 RegisterBootOptionHotkey ((UINT16) mSetupOptionNumber, &F2.Key, TRUE);
   }

-  F7.Key.ScanCode= SCAN_F7;
-  F7.Key.UnicodeChar = CHAR_NULL;
-  F7.KeyState.KeyShiftState = EFI_SHIFT_STATE_VALID;
-  F7.KeyState.KeyToggleState = 0;
-  mBootMenuBoot  = !EnterSetup;
-  RegisterBootOptionHotkey ((UINT16) mBootMenuOptionNumber, &F7.Key, 
mBootMenuBoot);
+  //
+  // Register F7 only when the mBootMenuOptionNumber is valid  //  if 
+ (mBootMenuOptionNumber != LoadOptionNumberUnassigned) {
+F7.Key.ScanCode= SCAN_F7;
+F7.Key.UnicodeChar = CHAR_NULL;
+F7.KeyState.KeyShiftState = EFI_SHIFT_STATE_VALID;
+F7.KeyState.KeyToggleState = 0;
+mBootMenuBoot  = !EnterSetup;
+RegisterBootOptionHotkey ((UINT16) mBootMenuOptionNumber, &F7.Key, 
+ mBootMenuBoot);  }

 }

--
2.13.2.windows.1
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to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
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then delete or destroy all copies of the transmission.







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Re: [edk2-devel] [PATCH v2 1/1] BoardModulePkg/BoardBdsHookLib: Fix F7 overwrites Boot0000

[Isaac Oram]

Reviewed-by: Isaac Oram 

James,

I cannot apply the patch.  I can fix it up to push though, so I don't need you 
to resolve.  But for a bigger patch, I would need help resolving.

I note that you have special characters in your name.  I doubt that matters, 
but I would probably try to keep it normal 8 bit ASCII.  I think that the 
script many maintainers use will lose those characters in favor of "?".
I note that you are using an old version of git.  Also probably not the issue.

I note that you seem to have LF line endings and I have CRLF when I generate 
and send patches.  Maybe try configuring: 
git config --global am.keepcr true
git config --global core.autocrlf  false​

These are my notes on config.  I am not sure if they are relevant still.  
Especially the second one.  I don't seem to have that set anymore.  Setting 
keepcr false caused an error applying patch for me.

Regards,
Isaac

-Original Message-
From: JamesWang [王家明]  
Sent: Tuesday, September 13, 2022 2:36 AM
To: devel@edk2.groups.io
Cc: Dong, Eric ; Oram, Isaac W ; 
Gao, Liming 
Subject: [PATCH v2 1/1] BoardModulePkg/BoardBdsHookLib: Fix F7 overwrites 
Boot

Check if mBootMenuOptionNumber is valid or not before calling 
RegisterBootOptionHotkey to avoid overwriting Boot

Cc: Eric Dong 
Cc: Isaac Oram 
Cc: Liming Gao 
Signed-off-by: James Wang 
---
 Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOption.c | 17 
+++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git 
a/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOption.c 
b/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOption.c
index 6e3c21f4f052..34c971f3780b 100644
--- a/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOption.c
+++ b/Platform/Intel/BoardModulePkg/Library/BoardBdsHookLib/BoardBootOpt
+++ ion.c
@@ -461,12 +461,17 @@ RegisterStaticHotkey (
 RegisterBootOptionHotkey ((UINT16) mSetupOptionNumber, &F2.Key, TRUE);
   }

-  F7.Key.ScanCode= SCAN_F7;
-  F7.Key.UnicodeChar = CHAR_NULL;
-  F7.KeyState.KeyShiftState = EFI_SHIFT_STATE_VALID;
-  F7.KeyState.KeyToggleState = 0;
-  mBootMenuBoot  = !EnterSetup;
-  RegisterBootOptionHotkey ((UINT16) mBootMenuOptionNumber, &F7.Key, 
mBootMenuBoot);
+  //
+  // Register F7 only when the mBootMenuOptionNumber is valid  //  if 
+ (mBootMenuOptionNumber != LoadOptionNumberUnassigned) {
+F7.Key.ScanCode= SCAN_F7;
+F7.Key.UnicodeChar = CHAR_NULL;
+F7.KeyState.KeyShiftState = EFI_SHIFT_STATE_VALID;
+F7.KeyState.KeyToggleState = 0;
+mBootMenuBoot  = !EnterSetup;
+RegisterBootOptionHotkey ((UINT16) mBootMenuOptionNumber, &F7.Key, 
+ mBootMenuBoot);  }

 }

--
2.13.2.windows.1
-The information contained in this message may be confidential and proprietary 
to American Megatrends (AMI). This communication is intended to be read only by 
the individual or entity to whom it is addressed or by their designee. If the 
reader of this message is not the intended recipient, you are on notice that 
any distribution of this message, in any form, is strictly prohibited. Please 
promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and 
then delete or destroy all copies of the transmission.


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Re: [edk2-devel] [PATCH 1/1] Ext4Pkg: Fix broken stack protector-enabled builds

[Rebecca Cran]

Reviewed-by: Rebecca Cran 

On 9/15/22 17:06, Pedro Falcato wrote:

As reported by Rebecca Cran, there was some build breakage when
compiling with stack-protector-on-by-default toolchains. Adding the
proper library to the DSC should fix it.

Cc: Rebecca Cran 
Cc: Marvin Häuser 
Signed-off-by: Pedro Falcato 
---
  Features/Ext4Pkg/Ext4Pkg.dsc | 5 +
  1 file changed, 5 insertions(+)

diff --git a/Features/Ext4Pkg/Ext4Pkg.dsc b/Features/Ext4Pkg/Ext4Pkg.dsc
index 57f279a4d918..59bc327ebf6e 100644
--- a/Features/Ext4Pkg/Ext4Pkg.dsc
+++ b/Features/Ext4Pkg/Ext4Pkg.dsc
@@ -46,6 +46,11 @@
DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
BaseUcs2Utf8Lib|RedfishPkg/Library/BaseUcs2Utf8Lib/BaseUcs2Utf8Lib.inf
+
+  #
+  # Required for stack protector support
+  #
+  NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
  
  ###

  #




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[edk2-devel] [PATCH 1/1] Ext4Pkg: Fix broken stack protector-enabled builds

[Pedro Falcato]

As reported by Rebecca Cran, there was some build breakage when
compiling with stack-protector-on-by-default toolchains. Adding the
proper library to the DSC should fix it.

Cc: Rebecca Cran 
Cc: Marvin Häuser 
Signed-off-by: Pedro Falcato 
---
 Features/Ext4Pkg/Ext4Pkg.dsc | 5 +
 1 file changed, 5 insertions(+)

diff --git a/Features/Ext4Pkg/Ext4Pkg.dsc b/Features/Ext4Pkg/Ext4Pkg.dsc
index 57f279a4d918..59bc327ebf6e 100644
--- a/Features/Ext4Pkg/Ext4Pkg.dsc
+++ b/Features/Ext4Pkg/Ext4Pkg.dsc
@@ -46,6 +46,11 @@
   DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
   
OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
   BaseUcs2Utf8Lib|RedfishPkg/Library/BaseUcs2Utf8Lib/BaseUcs2Utf8Lib.inf
+  
+  #
+  # Required for stack protector support
+  #
+  NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
 
 
###
 #
-- 
2.37.3



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Re: [edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI

[Michael D Kinney]

Hi Ard,

If there is content you do not think needs to follow the min quality criteria, 
perhaps it can be moved out of edk2 repo?  Maybe to edk2-staging or 
edk2-archive?

Thanks,

Mike

> -Original Message-
> From: Ard Biesheuvel 
> Sent: Thursday, September 15, 2022 2:03 PM
> To: Kinney, Michael D 
> Cc: Michael Kubacki ; devel@edk2.groups.io; 
> Leif Lindholm ; Ard
> Biesheuvel ; Abner Chang ; 
> Daniel Schaefer 
> Subject: Re: [edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI
> 
> On Thu, 15 Sept 2022 at 22:52, Kinney, Michael D
>  wrote:
> >
> > Ard,
> >
> > Why would you want to do that?  The whole point of CI is to establish a 
> > minimum quality level for all code in the project.
> >
> > They can be disabled with updates to the YAML file.  Checks can be disabled 
> > completely and may of the checks support
> exception lists.
> >
> 
> If the only way to prevent this from happening is to turn it off again
> in the YAML file, I'd prefer not to turn it on to begin with.
> 
> I agree that code quality is important, but IMO the checks we have at
> the moment are way too strict, and 90% of the time I spend on
> reviewing and merging patches is on crustify and patchcheck errors.
> This is simply not worth my time.


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Re: [edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI

[Ard Biesheuvel]

On Thu, 15 Sept 2022 at 22:52, Kinney, Michael D
 wrote:
>
> Ard,
>
> Why would you want to do that?  The whole point of CI is to establish a 
> minimum quality level for all code in the project.
>
> They can be disabled with updates to the YAML file.  Checks can be disabled 
> completely and may of the checks support exception lists.
>

If the only way to prevent this from happening is to turn it off again
in the YAML file, I'd prefer not to turn it on to begin with.

I agree that code quality is important, but IMO the checks we have at
the moment are way too strict, and 90% of the time I spend on
reviewing and merging patches is on crustify and patchcheck errors.
This is simply not worth my time.


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Re: [edk2-devel] [edk2-platforms][PATCH v5 0/2] Ext4Pkg: Add Symbolic Links support

[Pedro Falcato]

Pushed as e81432f and 76fc44f.
Thanks!

On Thu, Sep 15, 2022 at 10:00 PM Pedro Falcato 
wrote:

> Series-Reviewed-by: Pedro Falcato 
>
> On Wed, Sep 7, 2022 at 3:02 PM Savva Mitrofanov 
> wrote:
>
>> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3677
>>
>> Hi all,
>>
>> In the fifth version I corrected remarks from Pedro Falcato and Marvin
>> Häuser.
>> I moved symlink procedures into independent C file, corrected code style
>> like
>> debug messages macros and etc.
>>
>> This patchset adds symbolic links support with simple recursion
>> protection based
>> on symbolic link nest level limitation, also I included patch which adds
>> BASE_CR
>> to extract EXT4_FILE private structure to prevent possible code
>> corruption caused
>> by structure changes and rearrangements in future.
>>
>> REF:
>> https://github.com/savvamitrofanov/edk2-platforms/tree/ext4pkg_symlink_support
>>
>> Cc: Marvin Häuser 
>> Cc: Pedro Falcato 
>> Cc: Vitaly Cheptsov 
>>
>> Savva Mitrofanov (2):
>>   Ext4Pkg: Add symbolic links support
>>   Ext4Pkg: Add base containing record macro for EXT4_FILE
>>
>>  Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.inf |   1 +
>>  Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h  |  13 +-
>>  Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h   |  74 +-
>>  Features/Ext4Pkg/Ext4Dxe/File.c  | 179 +++---
>>  Features/Ext4Pkg/Ext4Dxe/Inode.c |  15 ++
>>  Features/Ext4Pkg/Ext4Dxe/Symlink.c   | 261 
>>  6 files changed, 499 insertions(+), 44 deletions(-)
>>  create mode 100644 Features/Ext4Pkg/Ext4Dxe/Symlink.c
>>
>> --
>> 2.37.3
>>
>>
>
> --
> Pedro Falcato
>


-- 
Pedro Falcato


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Re: [edk2-devel] [edk2-platforms][PATCH v5 0/2] Ext4Pkg: Add Symbolic Links support

[Pedro Falcato]

Series-Reviewed-by: Pedro Falcato 

On Wed, Sep 7, 2022 at 3:02 PM Savva Mitrofanov  wrote:

> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3677
>
> Hi all,
>
> In the fifth version I corrected remarks from Pedro Falcato and Marvin
> Häuser.
> I moved symlink procedures into independent C file, corrected code style
> like
> debug messages macros and etc.
>
> This patchset adds symbolic links support with simple recursion protection
> based
> on symbolic link nest level limitation, also I included patch which adds
> BASE_CR
> to extract EXT4_FILE private structure to prevent possible code corruption
> caused
> by structure changes and rearrangements in future.
>
> REF:
> https://github.com/savvamitrofanov/edk2-platforms/tree/ext4pkg_symlink_support
>
> Cc: Marvin Häuser 
> Cc: Pedro Falcato 
> Cc: Vitaly Cheptsov 
>
> Savva Mitrofanov (2):
>   Ext4Pkg: Add symbolic links support
>   Ext4Pkg: Add base containing record macro for EXT4_FILE
>
>  Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.inf |   1 +
>  Features/Ext4Pkg/Ext4Dxe/Ext4Disk.h  |  13 +-
>  Features/Ext4Pkg/Ext4Dxe/Ext4Dxe.h   |  74 +-
>  Features/Ext4Pkg/Ext4Dxe/File.c  | 179 +++---
>  Features/Ext4Pkg/Ext4Dxe/Inode.c |  15 ++
>  Features/Ext4Pkg/Ext4Dxe/Symlink.c   | 261 
>  6 files changed, 499 insertions(+), 44 deletions(-)
>  create mode 100644 Features/Ext4Pkg/Ext4Dxe/Symlink.c
>
> --
> 2.37.3
>
>

-- 
Pedro Falcato


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Re: [edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI

[Michael D Kinney]

Ard,

Why would you want to do that?  The whole point of CI is to establish a minimum 
quality level for all code in the project.

They can be disabled with updates to the YAML file.  Checks can be disabled 
completely and may of the checks support exception lists.

Mike

> -Original Message-
> From: Ard Biesheuvel 
> Sent: Thursday, September 15, 2022 1:47 PM
> To: Michael Kubacki 
> Cc: devel@edk2.groups.io; Leif Lindholm ; Ard 
> Biesheuvel ; Abner Chang
> ; Daniel Schaefer ; Kinney, 
> Michael D 
> Subject: Re: [edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI
> 
> On Thu, 15 Sept 2022 at 21:46, Michael Kubacki
>  wrote:
> >
> > Hi Ard,
> >
> > I haven't seen any action items for the v1 series.
> >
> > Can you please check the series again and let me know if you have any
> > further concerns?
> >
> 
> The only thing I'd like to know is how I can override the CI and merge
> a PR that was rejected by the checks you are enabling here.
> 
> 
> 
> 
> > On 9/7/2022 11:16 AM, Ard Biesheuvel wrote:
> > > On Wed, 7 Sept 2022 at 17:00, Michael Kubacki
> > >  wrote:
> > >>
> > >> When would you like to have that discussion?
> > >>
> > >> The Tianocore Tool, CI, Codebase meeting is every week. In that meeting
> > >> we've discussed getting all edk2 packages to at least run CI.
> > >>
> > >> https://github.com/tianocore/edk2/discussions/2614
> > >>
> > >> If you prefer to have it here, that's fine as well.
> > >>
> > >
> > > In a nutshell, I am fine with enabling this, as long as I can override
> > > the CI and merge PRs that the CI thinks have issues.
> > >
> > >
> > > 
> > >


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Re: [edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI

[Ard Biesheuvel]

On Thu, 15 Sept 2022 at 21:46, Michael Kubacki
 wrote:
>
> Hi Ard,
>
> I haven't seen any action items for the v1 series.
>
> Can you please check the series again and let me know if you have any
> further concerns?
>

The only thing I'd like to know is how I can override the CI and merge
a PR that was rejected by the checks you are enabling here.




> On 9/7/2022 11:16 AM, Ard Biesheuvel wrote:
> > On Wed, 7 Sept 2022 at 17:00, Michael Kubacki
> >  wrote:
> >>
> >> When would you like to have that discussion?
> >>
> >> The Tianocore Tool, CI, Codebase meeting is every week. In that meeting
> >> we've discussed getting all edk2 packages to at least run CI.
> >>
> >> https://github.com/tianocore/edk2/discussions/2614
> >>
> >> If you prefer to have it here, that's fine as well.
> >>
> >
> > In a nutshell, I am fine with enabling this, as long as I can override
> > the CI and merge PRs that the CI thinks have issues.
> >
> >
> > 
> >


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Re: [edk2-devel] [PATCH v1 0/3] EmbeddedPkg: Enable CI

[Michael Kubacki]

Hi Ard,

I haven't seen any action items for the v1 series.

Can you please check the series again and let me know if you have any 
further concerns?


Thanks,
Michael

On 9/7/2022 11:16 AM, Ard Biesheuvel wrote:

On Wed, 7 Sept 2022 at 17:00, Michael Kubacki
 wrote:


When would you like to have that discussion?

The Tianocore Tool, CI, Codebase meeting is every week. In that meeting
we've discussed getting all edk2 packages to at least run CI.

https://github.com/tianocore/edk2/discussions/2614

If you prefer to have it here, that's fine as well.



In a nutshell, I am fine with enabling this, as long as I can override
the CI and merge PRs that the CI thinks have issues.







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Re: [edk2-devel] [PATCH v2 3/6] IntelFsp2Pkg: Add CI YAML file

[Michael Kubacki]

Hi Chasel,

Your CI YAML file feedback in v1 is addressed now in v2.

Can you please provide your review on this patch and [PATCH v2 5/6]?

Note that I updated the commit message for this patch to remove the info 
about the build being broken since that was recently fixed. That update 
is in the branch:


https://github.com/makubacki/edk2/commit/c37e6dfa482ed075cd4ab6712e6d17b3cf17786a

With these reviews, the series will be covered.

Thanks,
Michael

On 9/15/2022 2:55 PM, Michael Kubacki wrote:

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

Adds IntelFsp2Pkg to the list of supported build packages for edk2
CI and defines an initial set of CI configuration options.

The compiler plugin is disabled as the package currently does not
build due to some changes in the FSP 2.4 interface addition.

Specifically, in commit df25a54 "Fsp24SecCore.inf" files were
added to IntelFspPkg.dsc but the actual files were not added.

Simply removing these files from the DSC exposes a linker failure.

Recommendation:

1. Enable package CI (accept this change)
2. Add IntelFsp2Pkg.dsc to the "CompilerPlugin" "DscPath" in
IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml to enable compilation
3. Verify compilation and all currently enabled package CI checks
pass
4. Check-in fixes in (3) with change in (2)

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
  .pytool/CISettings.py |  1 +
  IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml | 90 
  2 files changed, 91 insertions(+)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index cf9e0d77b19b..0205c26a58f8 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -54,6 +54,7 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
  "ArmVirtPkg",
  "DynamicTablesPkg",
  "EmulatorPkg",
+"IntelFsp2Pkg",
  "MdePkg",
  "MdeModulePkg",
  "NetworkPkg",
diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml 
b/IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml
new file mode 100644
index ..9ce401b20164
--- /dev/null
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml
@@ -0,0 +1,90 @@
+## @file
+# Core CI configuration for IntelFsp2Pkg
+#
+# Copyright (c) Microsoft Corporation
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+## options defined .pytool/Plugin/LicenseCheck
+"LicenseCheck": {
+"IgnoreFiles": []
+},
+
+"EccCheck": {
+## Exception sample looks like below:
+## "ExceptionList": [
+## "", ""
+## ]
+"ExceptionList": [
+],
+## Both file path and directory path are accepted.
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/CompilerPlugin
+"CompilerPlugin": {
+"DscPath": "IntelFsp2Pkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+"HostUnitTestCompilerPlugin": {
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/CharEncodingCheck
+"CharEncodingCheck": {
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/DependencyCheck
+"DependencyCheck": {
+"AcceptableDependencies": [
+  "IntelFsp2Pkg/IntelFsp2Pkg.dec",
+  "MdeModulePkg/MdeModulePkg.dec",
+  "MdePkg/MdePkg.dec",
+  "UefiCpuPkg/UefiCpuPkg.dec"
+],
+# For host based unit tests
+"AcceptableDependencies-HOST_APPLICATION":[
+  "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+],
+# For UEFI shell based apps
+"AcceptableDependencies-UEFI_APPLICATION":[],
+"IgnoreInf": []
+},
+
+## options defined .pytool/Plugin/DscCompleteCheck
+"DscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "IntelFsp2Pkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+"HostUnitTestDscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/GuidCheck
+"GuidCheck": {
+"IgnoreGuidName": [],
+"IgnoreGuidValue": [],
+"IgnoreFoldersAndFiles": [],
+"IgnoreDuplicates": [],
+},
+
+## options defined .pytool/Plugin/LibraryClassCheck
+"LibraryClassCheck": {
+"IgnoreHeaderFile": []
+},
+
+## options defined .pytool/Plugin/SpellCheck
+"SpellCheck": {
+"AuditOnly": True,   # Fails right now with over 270 errors
+"IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
+"ExtendWords": [],   # words to extend to the dictionary for 
this package
+"IgnoreStandardPaths": [],   # Standard Plugin defined paths that 
should be ignore
+"AdditionalIncludePaths": [] # Additional paths to spell check 
(wildcards supported)
+

Re: [edk2-devel] [PATCH v1 1/2] SignedCapsulePkg: Add package CI YAML file

[Michael Kubacki]

Hi Jian,

Can you please provide a review for this patch?

Mike Kinney has already given an R-b for [PATCH v1 2/2] so the series 
will be ready once this patch is reviewed.


Thanks,
Michael

On 9/7/2022 1:05 AM, Michael Kubacki wrote:

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4050

Adds the package as a supported package to .pytool/CISettings.py
and adds a CI YAML for the package so it can be run in CI.

Cc: Jian J Wang 
Signed-off-by: Michael Kubacki 
---
  .pytool/CISettings.py |  1 +
  SignedCapsulePkg/SignedCapsulePkg.ci.yaml | 90 
  2 files changed, 91 insertions(+)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index cf9e0d77b19b..306e27893e58 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -62,6 +62,7 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
  "UefiCpuPkg",
  "FmpDevicePkg",
  "ShellPkg",
+"SignedCapsulePkg",
  "StandaloneMmPkg",
  "FatPkg",
  "CryptoPkg",
diff --git a/SignedCapsulePkg/SignedCapsulePkg.ci.yaml 
b/SignedCapsulePkg/SignedCapsulePkg.ci.yaml
new file mode 100644
index ..5f48613bd79f
--- /dev/null
+++ b/SignedCapsulePkg/SignedCapsulePkg.ci.yaml
@@ -0,0 +1,90 @@
+## @file
+# Core CI configuration for SignedCapsulePkg
+#
+# Copyright (c) Microsoft Corporation
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+## options defined .pytool/Plugin/LicenseCheck
+"LicenseCheck": {
+"IgnoreFiles": []
+},
+
+"EccCheck": {
+## Exception sample looks like below:
+## "ExceptionList": [
+## "", ""
+## ]
+"ExceptionList": [
+],
+## Both file path and directory path are accepted.
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/CompilerPlugin
+"CompilerPlugin": {
+"DscPath": "SignedCapsulePkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+"HostUnitTestCompilerPlugin": {
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/CharEncodingCheck
+"CharEncodingCheck": {
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/DependencyCheck
+"DependencyCheck": {
+"AcceptableDependencies": [
+  "MdeModulePkg/MdeModulePkg.dec",
+  "MdePkg/MdePkg.dec",
+  "SecurityPkg/SecurityPkg.dec",
+  "SignedCapsulePkg/SignedCapsulePkg.dec"
+],
+# For host based unit tests
+"AcceptableDependencies-HOST_APPLICATION":[
+  "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+],
+# For UEFI shell based apps
+"AcceptableDependencies-UEFI_APPLICATION":[],
+"IgnoreInf": []
+},
+
+## options defined .pytool/Plugin/DscCompleteCheck
+"DscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "SignedCapsulePkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+"HostUnitTestDscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/GuidCheck
+"GuidCheck": {
+"IgnoreGuidName": [],
+"IgnoreGuidValue": [],
+"IgnoreFoldersAndFiles": [],
+"IgnoreDuplicates": [],
+},
+
+## options defined .pytool/Plugin/LibraryClassCheck
+"LibraryClassCheck": {
+"IgnoreHeaderFile": []
+},
+
+## options defined .pytool/Plugin/SpellCheck
+"SpellCheck": {
+"AuditOnly": True,   # Failures need to be reviewed and 
resolved in the future
+"IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
+"ExtendWords": [],   # words to extend to the dictionary for 
this package
+"IgnoreStandardPaths": [],   # Standard Plugin defined paths that 
should be ignore
+"AdditionalIncludePaths": [] # Additional paths to spell check 
(wildcards supported)
+}
+}



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[edk2-devel] [PATCH v2 6/6] .azurepipelines: Add IntelFsp2Pkg and IntelFsp2WrapperPkg to CI

[Michael Kubacki]

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

Adds these packages to a new edk2 matrix job so they can be validated
in edk2 CI.

Cc: Bret Barkelew 
Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Nate DeSimone 
Cc: Sean Brogan 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
Reviewed-by: Michael D Kinney 
---
 .azurepipelines/templates/pr-gate-build-job.yml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.azurepipelines/templates/pr-gate-build-job.yml 
b/.azurepipelines/templates/pr-gate-build-job.yml
index 0e4ad019bf03..759d7e9b4005 100644
--- a/.azurepipelines/templates/pr-gate-build-job.yml
+++ b/.azurepipelines/templates/pr-gate-build-job.yml
@@ -45,6 +45,9 @@ jobs:
   TARGET_CRYPTO:
 Build.Pkgs: 'CryptoPkg'
 Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
+  TARGET_FSP:
+Build.Pkgs: 'IntelFsp2Pkg,IntelFsp2WrapperPkg'
+Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
   TARGET_SECURITY:
 Build.Pkgs: 'SecurityPkg'
 Build.Targets: 'DEBUG,RELEASE,NO-TARGET,NOOPT'
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v2 4/6] IntelFsp2WrapperPkg: Fix code formatting errors

[Michael Kubacki]

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

This package did not have CI enabled so code changes were merged
that fail uncrustify formatting. This change updates those files
to include uncustify formatting.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
Reviewed-by: Chasel Chiu 
---
 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
| 4 
 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
| 1 -
 IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c 
| 8 
 3 files changed, 8 insertions(+), 5 deletions(-)

diff --git 
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c 
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
index 5b5beb5c6557..2e82a0c1b59a 100644
--- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
+++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
@@ -115,6 +115,7 @@ CallFspNotifyPhase (
   } else {
 Status = Execute64BitCode ((UINTN)NotifyPhaseApi, 
(UINTN)NotifyPhaseParams, (UINTN)NULL);
   }
+
   SetInterruptState (InterruptState);
 
   return Status;
@@ -152,6 +153,7 @@ CallFspMemoryInit (
   } else {
 Status = Execute64BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, 
(UINTN)HobListPtr);
   }
+
   SetInterruptState (InterruptState);
 
   return Status;
@@ -187,6 +189,7 @@ CallTempRamExit (
   } else {
 Status = Execute64BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, 
(UINTN)NULL);
   }
+
   SetInterruptState (InterruptState);
 
   return Status;
@@ -222,6 +225,7 @@ CallFspSiliconInit (
   } else {
 Status = Execute64BitCode ((UINTN)FspSiliconInitApi, 
(UINTN)FspsUpdDataPtr, (UINTN)NULL);
   }
+
   SetInterruptState (InterruptState);
 
   return Status;
diff --git 
a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c 
b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
index a17ca7dcabe8..c8248eb88851 100644
--- a/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
+++ b/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
@@ -69,4 +69,3 @@ Execute64BitCode (
 {
   return EFI_UNSUPPORTED;
 }
-
diff --git 
a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
 
b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
index d2acb2fd46cd..fb0d9a8683a9 100644
--- 
a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
+++ 
b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c
@@ -10,10 +10,10 @@
 #include 
 
 typedef struct {
-  EFI_PHYSICAL_ADDRESS  MicrocodeRegionBase;
-  UINT64MicrocodeRegionSize;
-  EFI_PHYSICAL_ADDRESS  CodeRegionBase;
-  UINT64CodeRegionSize;
+  EFI_PHYSICAL_ADDRESSMicrocodeRegionBase;
+  UINT64  MicrocodeRegionSize;
+  EFI_PHYSICAL_ADDRESSCodeRegionBase;
+  UINT64  CodeRegionSize;
 } FSPT_CORE_UPD;
 
 typedef struct {
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v2 5/6] IntelFsp2WrapperPkg: Add CI YAML file

[Michael Kubacki]

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

Adds IntelFsp2WrapperPkg to the list of supported build packages
for edk2 CI and defines an initial set of CI configuration options.

Adds a special case for the Library Class check CI plugin to ignore
FspWrapperPlatformMultiPhaseLib with an explanatory comment.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
 .pytool/CISettings.py   |  1 +
 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml | 96 
 2 files changed, 97 insertions(+)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index 0205c26a58f8..d9a260784e59 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -55,6 +55,7 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
 "DynamicTablesPkg",
 "EmulatorPkg",
 "IntelFsp2Pkg",
+"IntelFsp2WrapperPkg",
 "MdePkg",
 "MdeModulePkg",
 "NetworkPkg",
diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml 
b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
new file mode 100644
index ..55f28d90870c
--- /dev/null
+++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
@@ -0,0 +1,96 @@
+## @file
+# Core CI configuration for IntelFsp2WrapperPkg
+#
+# Copyright (c) Microsoft Corporation
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+## options defined .pytool/Plugin/LicenseCheck
+"LicenseCheck": {
+"IgnoreFiles": []
+},
+
+"EccCheck": {
+## Exception sample looks like below:
+## "ExceptionList": [
+## "", ""
+## ]
+"ExceptionList": [
+],
+## Both file path and directory path are accepted.
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/CompilerPlugin
+"CompilerPlugin": {
+"DscPath": "IntelFsp2WrapperPkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+"HostUnitTestCompilerPlugin": {
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/CharEncodingCheck
+"CharEncodingCheck": {
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/DependencyCheck
+"DependencyCheck": {
+"AcceptableDependencies": [
+  "IntelFsp2Pkg/IntelFsp2Pkg.dec",
+  "IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec",
+  "MdeModulePkg/MdeModulePkg.dec",
+  "MdePkg/MdePkg.dec",
+  "SecurityPkg/SecurityPkg.dec",
+  "UefiCpuPkg/UefiCpuPkg.dec"
+],
+# For host based unit tests
+"AcceptableDependencies-HOST_APPLICATION":[
+  "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+],
+# For UEFI shell based apps
+"AcceptableDependencies-UEFI_APPLICATION":[],
+"IgnoreInf": []
+},
+
+## options defined .pytool/Plugin/DscCompleteCheck
+"DscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "IntelFsp2WrapperPkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+"HostUnitTestDscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/GuidCheck
+"GuidCheck": {
+"IgnoreGuidName": [],
+"IgnoreGuidValue": [],
+"IgnoreFoldersAndFiles": [],
+"IgnoreDuplicates": [],
+},
+
+## options defined .pytool/Plugin/LibraryClassCheck
+"LibraryClassCheck": {
+"IgnoreLibraryClass": [
+  # This header file contains a small function in a separate library 
so platforms
+  # do not have to override the whole main library instance.
+  "FspWrapperPlatformMultiPhaseLib"
+]
+},
+
+## options defined .pytool/Plugin/SpellCheck
+"SpellCheck": {
+"AuditOnly": True,   # Fails right now with over 270 errors
+"IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
+"ExtendWords": [],   # words to extend to the dictionary for 
this package
+"IgnoreStandardPaths": [],   # Standard Plugin defined paths that 
should be ignore
+"AdditionalIncludePaths": [] # Additional paths to spell check 
(wildcards supported)
+}
+}
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v2 3/6] IntelFsp2Pkg: Add CI YAML file

[Michael Kubacki]

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

Adds IntelFsp2Pkg to the list of supported build packages for edk2
CI and defines an initial set of CI configuration options.

The compiler plugin is disabled as the package currently does not
build due to some changes in the FSP 2.4 interface addition.

Specifically, in commit df25a54 "Fsp24SecCore.inf" files were
added to IntelFspPkg.dsc but the actual files were not added.

Simply removing these files from the DSC exposes a linker failure.

Recommendation:

1. Enable package CI (accept this change)
2. Add IntelFsp2Pkg.dsc to the "CompilerPlugin" "DscPath" in
   IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml to enable compilation
3. Verify compilation and all currently enabled package CI checks
   pass
4. Check-in fixes in (3) with change in (2)

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
---
 .pytool/CISettings.py |  1 +
 IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml | 90 
 2 files changed, 91 insertions(+)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index cf9e0d77b19b..0205c26a58f8 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -54,6 +54,7 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
 "ArmVirtPkg",
 "DynamicTablesPkg",
 "EmulatorPkg",
+"IntelFsp2Pkg",
 "MdePkg",
 "MdeModulePkg",
 "NetworkPkg",
diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml 
b/IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml
new file mode 100644
index ..9ce401b20164
--- /dev/null
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml
@@ -0,0 +1,90 @@
+## @file
+# Core CI configuration for IntelFsp2Pkg
+#
+# Copyright (c) Microsoft Corporation
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+## options defined .pytool/Plugin/LicenseCheck
+"LicenseCheck": {
+"IgnoreFiles": []
+},
+
+"EccCheck": {
+## Exception sample looks like below:
+## "ExceptionList": [
+## "", ""
+## ]
+"ExceptionList": [
+],
+## Both file path and directory path are accepted.
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/CompilerPlugin
+"CompilerPlugin": {
+"DscPath": "IntelFsp2Pkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestCompilerPlugin
+"HostUnitTestCompilerPlugin": {
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/CharEncodingCheck
+"CharEncodingCheck": {
+"IgnoreFiles": []
+},
+
+## options defined .pytool/Plugin/DependencyCheck
+"DependencyCheck": {
+"AcceptableDependencies": [
+  "IntelFsp2Pkg/IntelFsp2Pkg.dec",
+  "MdeModulePkg/MdeModulePkg.dec",
+  "MdePkg/MdePkg.dec",
+  "UefiCpuPkg/UefiCpuPkg.dec"
+],
+# For host based unit tests
+"AcceptableDependencies-HOST_APPLICATION":[
+  "UnitTestFrameworkPkg/UnitTestFrameworkPkg.dec"
+],
+# For UEFI shell based apps
+"AcceptableDependencies-UEFI_APPLICATION":[],
+"IgnoreInf": []
+},
+
+## options defined .pytool/Plugin/DscCompleteCheck
+"DscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "IntelFsp2Pkg.dsc"
+},
+
+## options defined .pytool/Plugin/HostUnitTestDscCompleteCheck
+"HostUnitTestDscCompleteCheck": {
+"IgnoreInf": [""],
+"DscPath": "" # Don't support this test
+},
+
+## options defined .pytool/Plugin/GuidCheck
+"GuidCheck": {
+"IgnoreGuidName": [],
+"IgnoreGuidValue": [],
+"IgnoreFoldersAndFiles": [],
+"IgnoreDuplicates": [],
+},
+
+## options defined .pytool/Plugin/LibraryClassCheck
+"LibraryClassCheck": {
+"IgnoreHeaderFile": []
+},
+
+## options defined .pytool/Plugin/SpellCheck
+"SpellCheck": {
+"AuditOnly": True,   # Fails right now with over 270 errors
+"IgnoreFiles": [],   # use gitignore syntax to ignore errors 
in matching files
+"ExtendWords": [],   # words to extend to the dictionary for 
this package
+"IgnoreStandardPaths": [],   # Standard Plugin defined paths that 
should be ignore
+"AdditionalIncludePaths": [] # Additional paths to spell check 
(wildcards supported)
+}
+}
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v2 2/6] IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate GUID

[Michael Kubacki]

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

The FILE_GUID for this library instance file is a duplicate of
Library/SecFspSecPlatformLibNull/SecFspSecPlatformLibNull.inf.

This change replaces the duplicated GUID value with a unique GUID.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
Reviewed-by: Chasel Chiu 
---
 IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf 
b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
index a79f6aecda6d..b9dd132ea863 100644
--- a/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
+++ b/IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf
@@ -15,7 +15,7 @@
 [Defines]
   INF_VERSION= 0x00010005
   BASE_NAME  = BaseFspMultiPhaseLib
-  FILE_GUID  = C128CADC-623E-4E41-97CB-A7138E627460
+  FILE_GUID  = 74C14477-E742-4A0A-9787-27B1CF34F698
   MODULE_TYPE= SEC
   VERSION_STRING = 1.0
   LIBRARY_CLASS  = FspMultiPhaseLib
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v2 1/6] IntelFsp2Pkg: Fix code formatting errors

[Michael Kubacki]

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

This package did not have CI enabled so code changes were merged
that fail uncrustify formatting. This change updates those files
to include uncustify formatting.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 
Reviewed-by: Chasel Chiu 
---
 IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c  | 9 +
 IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c | 2 +-
 IntelFsp2Pkg/Include/Ppi/Variable.h| 8 
 3 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c 
b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
index cb2317bfb240..8e24b946cd88 100644
--- a/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
@@ -193,8 +193,8 @@ DebugBPrint (
 **/
 VOID
 FillHex (
-  UINTN   Value,
-  CHAR8   *Buffer
+  UINTN  Value,
+  CHAR8  *Buffer
   )
 {
   INTN  Idx;
@@ -227,8 +227,8 @@ DebugAssertInternal (
   VOID
   )
 {
-  CHAR8   Buffer[MAX_DEBUG_MESSAGE_LENGTH];
-  UINTN   *Frame;
+  CHAR8  Buffer[MAX_DEBUG_MESSAGE_LENGTH];
+  UINTN  *Frame;
 
   Frame = (UINTN *)GetStackFramePointer ();
 
@@ -250,6 +250,7 @@ DebugAssertInternal (
   sizeof (Buffer) / sizeof (CHAR8) - 1
   );
   }
+
   SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13);
   while (Frame != NULL) {
 FillHex ((UINTN)Frame, Buffer + 9);
diff --git a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c 
b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
index 69a021f42b39..a0b2193bdeab 100644
--- a/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
+++ b/IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
@@ -31,6 +31,6 @@ SwapStack (
 
   FspData= GetFspGlobalDataPointer ();
   OldStack   = FspData->CoreStack;
-  FspData->CoreStack = (UINTN) NewStack;
+  FspData->CoreStack = (UINTN)NewStack;
   return OldStack;
 }
diff --git a/IntelFsp2Pkg/Include/Ppi/Variable.h 
b/IntelFsp2Pkg/Include/Ppi/Variable.h
index 3e1f4b98a999..581f14880813 100644
--- a/IntelFsp2Pkg/Include/Ppi/Variable.h
+++ b/IntelFsp2Pkg/Include/Ppi/Variable.h
@@ -184,10 +184,10 @@ EFI_STATUS
 /// to store data in the PEI environment.
 ///
 struct _EDKII_PEI_VARIABLE_PPI {
-  EDKII_PEI_GET_VARIABLEGetVariable;
-  EDKII_PEI_GET_NEXT_VARIABLE_NAME  GetNextVariableName;
-  EDKII_PEI_SET_VARIABLESetVariable;
-  EDKII_PEI_QUERY_VARIABLE_INFO QueryVariableInfo;
+  EDKII_PEI_GET_VARIABLE  GetVariable;
+  EDKII_PEI_GET_NEXT_VARIABLE_NAMEGetNextVariableName;
+  EDKII_PEI_SET_VARIABLE  SetVariable;
+  EDKII_PEI_QUERY_VARIABLE_INFO   QueryVariableInfo;
 };
 
 extern EFI_GUID  gEdkiiPeiVariablePpiGuid;
-- 
2.28.0.windows.1



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[edk2-devel] [PATCH v2 0/6] Enable CI in Intel FSP Packages

[Michael Kubacki]

From: Michael Kubacki 

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4048

- Enables CI in IntelFsp2Pkg and IntelFsp2WrapperPkg.
- Fixes several pre-existing issues that impact common CI checks.

You can find the CI results for the packages with this change
in the following edk2 PR:
https://github.com/tianocore/edk2/pull/3347

V2 Changes:

  1. The pre-existing compilation issue in IntelFsp2Pkg that caused
  the following BZ to be filed in v1 is now resolved. Therefore,
  the compiler CI plugin is enabled in IntelFsp2Pkg now.

  https://bugzilla.tianocore.org/show_bug.cgi?id=4049

  2. The following patch is dropped from v2:

  [PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove duplicate
  LibraryClasses entry

  Chasel indicated this is an intentional design decision so
  platforms do not have to override the entire library instance
  during platform integration.

  Consequently, "FspWrapperPlatformMultiPhaseLib" was added to the
  ignore list for the "LibraryClassCheck" CI plugin in
  IntelFspWrapperPkg.ci.yaml.

  Rebased series on f46c7d1e36c9 and added v1 R-b tags.

Cc: Chasel Chiu 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Nate DeSimone 
Cc: Sean Brogan 
Cc: Star Zeng 
Signed-off-by: Michael Kubacki 

Michael Kubacki (6):
  IntelFsp2Pkg: Fix code formatting errors
  IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate GUID
  IntelFsp2Pkg: Add CI YAML file
  IntelFsp2WrapperPkg: Fix code formatting errors
  IntelFsp2WrapperPkg: Add CI YAML file
  .azurepipelines: Add IntelFsp2Pkg and IntelFsp2WrapperPkg to CI

 IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c  
|  9 +-
 IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c 
|  2 +-
 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c
|  4 +
 IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c
|  1 -
 IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInitData.c 
|  8 +-
 .azurepipelines/templates/pr-gate-build-job.yml
|  3 +
 .pytool/CISettings.py  
|  2 +
 IntelFsp2Pkg/Include/Ppi/Variable.h
|  8 +-
 IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml  
| 90 ++
 IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf 
|  2 +-
 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml
| 96 
 11 files changed, 210 insertions(+), 15 deletions(-)
 create mode 100644 IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml
 create mode 100644 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml

-- 
2.28.0.windows.1



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Re: [edk2-devel] [PATCH v3 6/6] ArmPkg/SmbiosMiscDxe: Get SMBIOS information from OemMiscLib

[Nhi Pham via groups.io]

Thanks Leif. I will fix as your suggestion.

-Nhi

On 9/15/2022 5:54 PM, Leif Lindholm wrote:

On Tue, Sep 13, 2022 at 13:19:47 +0700, Nhi Pham wrote:

From: Minh Nguyen 

In some scenarios, the information of Bios Version, Bios Release
and Embedded Controller Firmware Release are fetched during UEFI
booting. This patch supports updating those fields dynamically
when the PCDs are empty.

Signed-off-by: Nhi Pham 
Reviewed-by: Rebecca Cran 
Reviewed-by: Sami Mujawar 
Acked-by: Ard Biesheuvel 
---
  ArmPkg/Include/Library/OemMiscLib.h   | 21 
+
  ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c   | 28 
+
  ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c | 32 
+---
  3 files changed, 70 insertions(+), 11 deletions(-)

diff --git a/ArmPkg/Include/Library/OemMiscLib.h 
b/ArmPkg/Include/Library/OemMiscLib.h
index 1936619d9b5b..541274999e5c 100644
--- a/ArmPkg/Include/Library/OemMiscLib.h
+++ b/ArmPkg/Include/Library/OemMiscLib.h
@@ -37,6 +37,7 @@ typedef struct {
  } OEM_MISC_PROCESSOR_DATA;
  
  typedef enum {

+  BiosVersionType00,
ProductNameType01,
SerialNumType01,
UuidType01,
@@ -247,4 +248,24 @@ OemGetSystemUuid (
OUT GUID  *SystemUuid
);
  
+/** Fetches the BIOS release.

+
+  @return The BIOS release.
+**/
+UINT16
+EFIAPI
+OemGetBiosRelease (
+  VOID
+  );
+
+/** Fetches the embedded controller firmware release.
+
+  @return The embedded controller firmware release.
+**/
+UINT16
+EFIAPI
+OemGetEmbeddedControllerFirmwareRelease (
+  VOID
+  );
+
  #endif // OEM_MISC_LIB_H_
diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c 
b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
index 32f6d55c1a9a..788ccab9e8c1 100644
--- a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
+++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
@@ -254,3 +254,31 @@ OemGetSystemUuid (
ASSERT (FALSE);
CopyGuid (SystemUuid, &gZeroGuid);
  }
+
+/** Fetches the BIOS release.
+
+  @return The BIOS release.
+**/
+UINT16
+EFIAPI
+OemGetBiosRelease (
+  VOID
+  )
+{
+  ASSERT (FALSE);
+  return 0x;

This is a change in behaviour.
The pre-existing behaviour would be preserved by returning the value
of PcdGet16 (PcdSystemBiosRelease), which defaults to 0x.


+}
+
+/** Fetches the embedded controller firmware release.
+
+  @return The embedded controller firmware release.
+**/
+UINT16
+EFIAPI
+OemGetEmbeddedControllerFirmwareRelease (
+  VOID
+  )
+{
+  ASSERT (FALSE);
+  return 0x;

Same as above, but PcdEmbeddedControllerFirmwareRelease.

No other comments on this set.
(Feel free to see that as Acked-by: Leif Lindholm 
for 1-5/6, but you already have the tags you need for those.)

/
 Leif


+}
diff --git 
a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c 
b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c
index b49c4b754cab..e9106a8a2fec 100644
--- a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c
+++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c
@@ -1,5 +1,6 @@
  /** @file
  
+  Copyright (c) 2022, Ampere Computing LLC. All rights reserved.

Copyright (c) 2021, NUVIA Inc. All rights reserved.
Copyright (c) 2009, Intel Corporation. All rights reserved.
Copyright (c) 2015, Hisilicon Limited. All rights reserved.
@@ -13,6 +14,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  
@@ -191,11 +193,11 @@ SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor) {

  TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
  HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Version, NULL);
} else {
-Version = (CHAR16 *)PcdGetPtr (PcdFirmwareVersionString);
-if (StrLen (Version) > 0) {
-  TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
-  HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Version, NULL);
-}
+  OemUpdateSmbiosInfo (
+mSmbiosMiscHiiHandle,
+STRING_TOKEN (STR_MISC_BIOS_VERSION),
+BiosVersionType00
+);
}
  
Char16String = GetBiosReleaseDate ();

@@ -251,13 +253,21 @@ SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor) {
  }
}
  
-  SmbiosRecord->SystemBiosMajorRelease = (UINT8)(PcdGet16 (PcdSystemBiosRelease) >> 8);

-  SmbiosRecord->SystemBiosMinorRelease = (UINT8)(PcdGet16 (PcdSystemBiosRelease) 
& 0xFF);
+  if (PcdGet16 (PcdSystemBiosRelease) != 0x) {
+SmbiosRecord->SystemBiosMajorRelease = (UINT8)(PcdGet16 (PcdSystemBiosRelease) 
>> 8);
+SmbiosRecord->SystemBiosMinorRelease = (UINT8)(PcdGet16 (PcdSystemBiosRelease) 
& 0xFF);
+  } else {
+SmbiosRecord->SystemBiosMajorRelease = (UINT8)(OemGetBiosRelease () >> 8);
+SmbiosRecord->SystemBiosMinorRelease = (UINT8)(OemGetBiosRelease () & 
0xFF);
+  }
  
-  SmbiosRecord->EmbeddedControllerFirmwareMajorRelease = (UINT16)

- (PcdGet16 
(PcdEmbe

Re: [edk2-devel][edk2-platforms][PATCH V1 1/1] Maintainers.txt: Add QemuOpenBoardPkg maintainers

[Isaac Oram]

Pushed as 8d8bb28d2c..17a682058c

-Original Message-
From: Kinney, Michael D  
Sent: Thursday, September 15, 2022 9:57 AM
To: Oram, Isaac W ; devel@edk2.groups.io; Kinney, 
Michael D 
Cc: Leif Lindholm ; Pedro Falcato 
; Theo Jehl 
Subject: RE: [edk2-devel][edk2-platforms][PATCH V1 1/1] Maintainers.txt: Add 
QemuOpenBoardPkg maintainers

Reviewed-by: Michael D Kinney 


> -Original Message-
> From: Oram, Isaac W 
> Sent: Thursday, September 15, 2022 8:48 AM
> To: devel@edk2.groups.io
> Cc: Oram, Isaac W ; Leif Lindholm 
> ; Kinney, Michael D 
> ; Pedro Falcato ; 
> Theo Jehl 
> Subject: [edk2-devel][edk2-platforms][PATCH V1 1/1] Maintainers.txt: 
> Add QemuOpenBoardPkg maintainers
> 
> Enable maintainers for Platform/Qemu/QemuOpenBoardPkg MinPlatformPkg 
> based board port.
> https://edk2-docs.gitbook.io/edk-ii-minimum-platform-specification/
> 
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> Cc: Pedro Falcato 
> Cc: Theo Jehl 
> Signed-off-by: Isaac Oram 
> ---
>  Maintainers.txt | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt index 
> a4a0e4b907..3fb9fb544d 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -348,6 +348,12 @@ F: Silicon/NXP/
>  M: Leif Lindholm 
>  R: Meenakshi Aggarwal 
> 
> +QEMU EDK II Minimum Platform Specification implementation
> +F: Platform/Qemu/QemuOpenBoardPkg/
> +M: Isaac Oram 
> +M: Pedro Falcato 
> +R: Theo Jehl 
> +
>  QEMU sbsa-ref platform
>  F: Platform/Qemu/SbsaQemu/
>  F: Silicon/Qemu/SbsaQemu/
> --
> 2.36.1.windows.1



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Re: [edk2-devel][edk2-platforms][PATCH V1 1/1] Maintainers.txt: Add QemuOpenBoardPkg maintainers

[Leif Lindholm]

Thanks for this.

On Thu, Sep 15, 2022 at 08:47:34 -0700, Isaac Oram wrote:
> Enable maintainers for Platform/Qemu/QemuOpenBoardPkg MinPlatformPkg
> based board port.
> https://edk2-docs.gitbook.io/edk-ii-minimum-platform-specification/
> 
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> Cc: Pedro Falcato 
> Cc: Theo Jehl 
> Signed-off-by: Isaac Oram 

Reviewed-by: Leif Lindholm 

> ---
>  Maintainers.txt | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt
> index a4a0e4b907..3fb9fb544d 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -348,6 +348,12 @@ F: Silicon/NXP/
>  M: Leif Lindholm 
>  R: Meenakshi Aggarwal 
>  
> +QEMU EDK II Minimum Platform Specification implementation
> +F: Platform/Qemu/QemuOpenBoardPkg/
> +M: Isaac Oram 
> +M: Pedro Falcato 
> +R: Theo Jehl 
> +
>  QEMU sbsa-ref platform
>  F: Platform/Qemu/SbsaQemu/
>  F: Silicon/Qemu/SbsaQemu/
> -- 
> 2.36.1.windows.1
> 
> 
> 
> 
> 
> 


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Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Fix FspSecCoreI build failure.

[Chiu, Chasel]

Patch merged:
https://github.com/tianocore/edk2/commit/f46c7d1e36c901e72cc0daee8429275bcb319eb9

Thanks,
Chasel


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Chiu, Chasel
> Sent: Wednesday, September 7, 2022 12:43 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star 
> Subject: [edk2-devel] [PATCH] IntelFsp2Pkg: Fix FspSecCoreI build failure.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4049
> 
> Link error occurred in certain compiling environment when building
> FspSecCoreI: unresolved external symbol _TempRamInitApi.
> 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Signed-off-by: Chasel Chiu 
> ---
>  IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm | 11 +++
> IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm  | 11 +++
>  2 files changed, 22 insertions(+)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
> index e9365d6832..e392ebed58 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
> @@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue)
>  ASM_PFX(FspApiCommonContinue):   jmp $ 
> +;-
> ---+; TempRamInit API+;+; Empty function for
> WHOLEARCHIVE build 
> option+;+;--
> --+global ASM_PFX(TempRamInitApi)+ASM_PFX(TempRamInitApi):+
> jmp $+  ret+ 
> ; 
> ;
> FspSmmInit API ;diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
> b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
> index e74bf0a26b..5c9ffbd569 100644
> --- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
> @@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue)
>  ASM_PFX(FspApiCommonContinue):   jmp $ 
> +;-
> ---+; TempRamInit API+;+; Empty function for
> WHOLEARCHIVE build 
> option+;+;--
> --+global ASM_PFX(TempRamInitApi)+ASM_PFX(TempRamInitApi):+
> jmp $+  ret+ 
> ; 
> ;
> FspSmmInit API ;--
> 2.35.0.windows.1
> 
> 
> 
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> 



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Re: [edk2-devel] [PATCH] Maintainers.txt: Update email address

[Andrew Fish via groups.io]

Reviewed-by: Andrew Fish 

> On Sep 15, 2022, at 9:58 AM, Michael D Kinney  
> wrote:
> 
> Reviewed-by: Michael D Kinney  >
> 
> 
>> -Original Message-
>> From: Nickle Wang mailto:nick...@nvidia.com>>
>> Sent: Wednesday, September 14, 2022 7:20 PM
>> To: devel@edk2.groups.io 
>> Cc: Andrew Fish mailto:af...@apple.com>>; Leif Lindholm 
>> mailto:quic_llind...@quicinc.com>>; Kinney, 
>> Michael D mailto:michael.d.kin...@intel.com>>;
>> Abner Chang mailto:abner.ch...@amd.com>>
>> Subject: [PATCH] Maintainers.txt: Update email address
>> 
>> Update Nickle's email address from csie.io to nvidia.com for those
>> packages which are reviewed by Nickle. Per suggestion from Abner,
>> change Nickle from reviewer to maintainer for RedfishPkg.
>> 
>> Cc: Andrew Fish 
>> Cc: Leif Lindholm 
>> Cc: Michael D Kinney 
>> Cc: Abner Chang 
>> Signed-off-by: Nickle Wang 
>> ---
>> Maintainers.txt | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>> 
>> diff --git a/Maintainers.txt b/Maintainers.txt
>> index 73ce13126b..390f084c03 100644
>> --- a/Maintainers.txt
>> +++ b/Maintainers.txt
>> @@ -197,7 +197,7 @@ S: Maintained
>> EmulatorPkg: Redfish-related modules
>> F: EmulatorPkg/*Redfish*
>> M: Abner Chang  [changab]
>> -R: Nickle Wang  [nicklela]
>> +M: Nickle Wang  [nicklela]
>> 
>> FatPkg
>> F: FatPkg/
>> @@ -544,7 +544,7 @@ R: Ankit Sinha  [ankit13s]
>> RedfishPkg: Redfish related modules
>> F: RedfishPkg/
>> M: Abner Chang  [changab]
>> -R: Nickle Wang  [nicklela]
>> +M: Nickle Wang  [nicklela]
>> 
>> SecurityPkg
>> F: SecurityPkg/
>> --
>> 2.34.1
> 
> 
> 
> 



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Re: [edk2-devel] [edk2-platforms][PATCH 0/2] Platform/Sgi: Update serial port usage

[Sami Mujawar]

Apologies for the delay.

Merged as f4679715a40d..8d8bb28d2c4b

Regards,

Sami Mujawar

On 04/07/2022 05:59 pm, Rohit Mathew wrote:

Patch 433b5b1b0f7f ("Platform/Sgi: Route logs to different sets of
consoles") setup the routing of console messages to a different set
of UART ports. Following up with this change, this patch series updates
the ACPI tables to route the console messages to the console UART and
adds a device entry for the debug UART.

Link to github branch for the patches in this series -
https://github.com/rohit-arm/edk2-platforms/tree/serial_port_acpi

Rohit Mathew (2):
   Platform/Sgi: Update ACPI tables to use console UART
   Platform/Sgi: Add serial debug controller to SSDT

  .../SgiPkg/AcpiTables/RdE1EdgeAcpiTables.inf|  3 +++
  .../SgiPkg/AcpiTables/RdN1EdgeAcpiTables.inf|  3 +++
  .../SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf  |  3 +++
  .../ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf|  3 +++
  .../SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf|  3 +++
  .../ARM/SgiPkg/AcpiTables/RdV1AcpiTables.inf|  3 +++
  .../ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf  |  3 +++
  .../ARM/SgiPkg/AcpiTables/Sgi575AcpiTables.inf  |  3 +++
  Platform/ARM/SgiPkg/AcpiTables/Spcr.aslc|  2 +-
  Platform/ARM/SgiPkg/AcpiTables/SsdtRos.asl  | 17 -
  10 files changed, 41 insertions(+), 2 deletions(-)




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Re: [edk2-devel] [PATCH] Maintainers.txt: Update email address

[Michael D Kinney]

Reviewed-by: Michael D Kinney 


> -Original Message-
> From: Nickle Wang 
> Sent: Wednesday, September 14, 2022 7:20 PM
> To: devel@edk2.groups.io
> Cc: Andrew Fish ; Leif Lindholm ; 
> Kinney, Michael D ;
> Abner Chang 
> Subject: [PATCH] Maintainers.txt: Update email address
> 
> Update Nickle's email address from csie.io to nvidia.com for those
> packages which are reviewed by Nickle. Per suggestion from Abner,
> change Nickle from reviewer to maintainer for RedfishPkg.
> 
> Cc: Andrew Fish 
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> Cc: Abner Chang 
> Signed-off-by: Nickle Wang 
> ---
>  Maintainers.txt | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt
> index 73ce13126b..390f084c03 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -197,7 +197,7 @@ S: Maintained
>  EmulatorPkg: Redfish-related modules
>  F: EmulatorPkg/*Redfish*
>  M: Abner Chang  [changab]
> -R: Nickle Wang  [nicklela]
> +M: Nickle Wang  [nicklela]
> 
>  FatPkg
>  F: FatPkg/
> @@ -544,7 +544,7 @@ R: Ankit Sinha  [ankit13s]
>  RedfishPkg: Redfish related modules
>  F: RedfishPkg/
>  M: Abner Chang  [changab]
> -R: Nickle Wang  [nicklela]
> +M: Nickle Wang  [nicklela]
> 
>  SecurityPkg
>  F: SecurityPkg/
> --
> 2.34.1



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Re: [edk2-devel][PATCH v2] IntelFsp2Pkg: NvsBufferPtr is missing in Fsp24ApiEntryM.nasm

[Chiu, Chasel]

Patch merged:
https://github.com/tianocore/edk2/commit/981bf66d5a7b1a31be5ffccc15fe13b97300e124

Thanks,
Chasel


> -Original Message-
> From: Kuo, Ted 
> Sent: Thursday, September 15, 2022 6:40 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; S, Ashraf
> Ali ; Duggapu, Chinni B 
> Subject: [edk2-devel][PATCH v2] IntelFsp2Pkg: NvsBufferPtr is missing in
> Fsp24ApiEntryM.nasm
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4063
> Added NvsBufferPtr to FSPM_UPD_COMMON_FSP24 in Fsp24ApiEntryM.nasm
> to align with FSP 2.4 SPEC.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Ashraf Ali S 
> Cc: Chinni B Duggapu 
> Signed-off-by: Ted Kuo 
> ---
>  IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm | 3 ++-
> IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm  | 3 ++-
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> index 997b9c0bff..15f8ecea83 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> @@ -40,12 +40,13 @@ struc FSPM_UPD_COMMON_FSP24
>  .Revision:  resb  1 .Reserved:  resb 
>  3 .Length
> resd  1+.NvsBufferPtr   resq  1 .StackBase:   
>   resq
> 1 .StackSize: resq  1 .BootLoaderTolumSize:   resd
> 1 .BootMode:  resd  1 .FspEventHandler
> resq  1-.Reserved1:
> resb 24+.Reserved1: resb 16 ; } .size: 
> endstrucdiff --git
> a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
> b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
> index 8880721f29..a3b38e4585 100644
> --- a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
> @@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24
>  .Revision:  resb  1 .Reserved:  resb 
>  3 .Length
> resd  1+.NvsBufferPtr   resq  1 .StackBase:   
>   resq
> 1 .StackSize: resq  1 .BootLoaderTolumSize:   resd
> 1 .BootMode:  resd  1 .FspEventHandler
> resq  1-.Reserved1:
> resb 24+.Reserved1: resb 16 ; } .size: endstruc--
> 2.35.3.windows.1



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Re: [edk2-devel] [PATCH] IntelFsp2Pkg: Fix FspSecCoreI build failure.

[Nate DeSimone]

Reviewed-by: Nate DeSimone 

-Original Message-
From: Chiu, Chasel  
Sent: Wednesday, September 7, 2022 12:43 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel ; Desimone, Nathaniel L 
; Zeng, Star 
Subject: [PATCH] IntelFsp2Pkg: Fix FspSecCoreI build failure.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4049

Link error occurred in certain compiling environment when building
FspSecCoreI: unresolved external symbol _TempRamInitApi.

Cc: Nate DeSimone 
Cc: Star Zeng 
Signed-off-by: Chasel Chiu 
---
 IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm | 11 +++
 IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm  | 11 +++
 2 files changed, 22 insertions(+)

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm 
b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
index e9365d6832..e392ebed58 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryI.nasm
@@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue)
 ASM_PFX(FspApiCommonContinue):
   jmp $
 
+;
+; TempRamInit API
+;
+; Empty function for WHOLEARCHIVE build option
+;
+;
+global ASM_PFX(TempRamInitApi)
+ASM_PFX(TempRamInitApi):
+  jmp $
+  ret
+
 ;
 ; FspSmmInit API
 ;
diff --git a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm 
b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
index e74bf0a26b..5c9ffbd569 100644
--- a/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
+++ b/IntelFsp2Pkg/FspSecCore/X64/FspApiEntryI.nasm
@@ -22,6 +22,17 @@ global ASM_PFX(FspApiCommonContinue)
 ASM_PFX(FspApiCommonContinue):
   jmp $
 
+;
+; TempRamInit API
+;
+; Empty function for WHOLEARCHIVE build option
+;
+;
+global ASM_PFX(TempRamInitApi)
+ASM_PFX(TempRamInitApi):
+  jmp $
+  ret
+
 ;
 ; FspSmmInit API
 ;
-- 
2.35.0.windows.1


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Re: [edk2-devel][edk2-platforms][PATCH V1 1/1] Maintainers.txt: Add QemuOpenBoardPkg maintainers

[Michael D Kinney]

Reviewed-by: Michael D Kinney 


> -Original Message-
> From: Oram, Isaac W 
> Sent: Thursday, September 15, 2022 8:48 AM
> To: devel@edk2.groups.io
> Cc: Oram, Isaac W ; Leif Lindholm 
> ; Kinney, Michael D
> ; Pedro Falcato ; Theo 
> Jehl 
> Subject: [edk2-devel][edk2-platforms][PATCH V1 1/1] Maintainers.txt: Add 
> QemuOpenBoardPkg maintainers
> 
> Enable maintainers for Platform/Qemu/QemuOpenBoardPkg MinPlatformPkg
> based board port.
> https://edk2-docs.gitbook.io/edk-ii-minimum-platform-specification/
> 
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> Cc: Pedro Falcato 
> Cc: Theo Jehl 
> Signed-off-by: Isaac Oram 
> ---
>  Maintainers.txt | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt
> index a4a0e4b907..3fb9fb544d 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -348,6 +348,12 @@ F: Silicon/NXP/
>  M: Leif Lindholm 
>  R: Meenakshi Aggarwal 
> 
> +QEMU EDK II Minimum Platform Specification implementation
> +F: Platform/Qemu/QemuOpenBoardPkg/
> +M: Isaac Oram 
> +M: Pedro Falcato 
> +R: Theo Jehl 
> +
>  QEMU sbsa-ref platform
>  F: Platform/Qemu/SbsaQemu/
>  F: Silicon/Qemu/SbsaQemu/
> --
> 2.36.1.windows.1



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Re: [edk2-devel] [PATCH] DynamicTablesPkg: AcpiSsdtPcieLibArm: Allow use of segment number as UID

[Sami Mujawar]

Merged as 45297e6c9bd1..8c92a9508e16

Thanks.

Regards,
Sami Mujawar


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Re: [edk2-devel][PATCH v2] IntelFsp2Pkg: NvsBufferPtr is missing in Fsp24ApiEntryM.nasm

[Chiu, Chasel]

Thanks Ted!
Reviewed-by: Chasel Chiu 


> -Original Message-
> From: Kuo, Ted 
> Sent: Thursday, September 15, 2022 6:40 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel ; Desimone, Nathaniel L
> ; Zeng, Star ; S, Ashraf
> Ali ; Duggapu, Chinni B 
> Subject: [edk2-devel][PATCH v2] IntelFsp2Pkg: NvsBufferPtr is missing in
> Fsp24ApiEntryM.nasm
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4063
> Added NvsBufferPtr to FSPM_UPD_COMMON_FSP24 in Fsp24ApiEntryM.nasm
> to align with FSP 2.4 SPEC.
> 
> Cc: Chasel Chiu 
> Cc: Nate DeSimone 
> Cc: Star Zeng 
> Cc: Ashraf Ali S 
> Cc: Chinni B Duggapu 
> Signed-off-by: Ted Kuo 
> ---
>  IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm | 3 ++-
> IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm  | 3 ++-
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> index 997b9c0bff..15f8ecea83 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> @@ -40,12 +40,13 @@ struc FSPM_UPD_COMMON_FSP24
>  .Revision:  resb  1 .Reserved:  resb 
>  3 .Length
> resd  1+.NvsBufferPtr   resq  1 .StackBase:   
>   resq
> 1 .StackSize: resq  1 .BootLoaderTolumSize:   resd
> 1 .BootMode:  resd  1 .FspEventHandler
> resq  1-.Reserved1:
> resb 24+.Reserved1: resb 16 ; } .size: 
> endstrucdiff --git
> a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
> b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
> index 8880721f29..a3b38e4585 100644
> --- a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
> @@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24
>  .Revision:  resb  1 .Reserved:  resb 
>  3 .Length
> resd  1+.NvsBufferPtr   resq  1 .StackBase:   
>   resq
> 1 .StackSize: resq  1 .BootLoaderTolumSize:   resd
> 1 .BootMode:  resd  1 .FspEventHandler
> resq  1-.Reserved1:
> resb 24+.Reserved1: resb 16 ; } .size: endstruc--
> 2.35.3.windows.1



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Re: [edk2-devel] [PATCH v1 1/1] Maintainers.txt: Update maintainers/reviewers for CI and Test

[Michael Kubacki]

Reviewed-by: Michael Kubacki 

On 9/2/2022 8:23 PM, mikub...@linux.microsoft.com wrote:

From: "brbar...@microsoft.com" 

Remove Bret Barkelew from:
- .azurepipelines
- .mergify
- .pytool
- UnitTestFrameworkPkg

Add Michael Kubacki to:
- .azurepipelines
- .pytool

Signed-off-by: Bret Barkelew 
Cc: Sean Brogan 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Michael Kubacki 
---
  Maintainers.txt | 6 ++
  1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt
index 73ce13126b37..d869dc46f0ef 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -107,7 +107,7 @@ EDK II Continuous Integration:
  .azurepipelines/
  F: .azurepipelines/
  M: Sean Brogan  [spbrogan]
-M: Bret Barkelew  [corthon]
+M: Michael Kubacki  [makubacki]
  R: Michael D Kinney  [mdkinney]
  R: Liming Gao  [lgao4]
  
@@ -116,12 +116,11 @@ F: .mergify/

  M: Michael D Kinney  [mdkinney]
  M: Liming Gao  [lgao4]
  R: Sean Brogan  [spbrogan]
-R: Bret Barkelew  [corthon]
  
  .pytool/

  F: .pytool/
  M: Sean Brogan  [spbrogan]
-M: Bret Barkelew  [corthon]
+M: Michael Kubacki  [makubacki]
  R: Michael D Kinney  [mdkinney]
  R: Liming Gao  [lgao4]
  
@@ -614,5 +613,4 @@ F: UnitTestFrameworkPkg/

  M: Michael D Kinney  [mdkinney]
  M: Michael Kubacki  [makubacki]
  R: Sean Brogan  [spbrogan]
-R: Bret Barkelew  [corthon]
  S: Maintained



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Re: [edk2-devel] [PATCH] DynamicTablesPkg: AcpiSsdtPcieLibArm: Allow use of segment number as UID

[Sami Mujawar]

Hi Jeff,

Thank you for this patch.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 06/09/2022 09:33 pm, Jeff Brasen wrote:

Add support for selecting to use index or segment number as UID and name.

This allows the path of the nodes to be well known.

For example, if the PCIe node needs to be notified from by an interrupt

for a Generic Event Device



Signed-off-by: Jeff Brasen 

---

  DynamicTablesPkg/DynamicTablesPkg.dec |  3 +++

  .../AcpiSsdtPcieLibArm/SsdtPcieGenerator.c| 19 ++-

  .../Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf |  3 +++

  3 files changed, 24 insertions(+), 1 deletion(-)



diff --git a/DynamicTablesPkg/DynamicTablesPkg.dec 
b/DynamicTablesPkg/DynamicTablesPkg.dec

index cc34c2bdd6..adc2e67cbf 100644

--- a/DynamicTablesPkg/DynamicTablesPkg.dec

+++ b/DynamicTablesPkg/DynamicTablesPkg.dec

@@ -60,5 +60,8 @@

# Non BSA Compliant 16550 Serial HID


gEdkiiDynamicTablesPkgTokenSpaceGuid.PcdNonBsaCompliant16550SerialHid|""|VOID*|0x4008

  


+  # Use PCI segment numbers as UID

+  
gEdkiiDynamicTablesPkgTokenSpaceGuid.PcdPciUseSegmentAsUid|FALSE|BOOLEAN|0x4009

+

  [Guids]

gEdkiiDynamicTablesPkgTokenSpaceGuid = { 0xab226e66, 0x31d8, 0x4613, { 
0x87, 0x9d, 0xd2, 0xfa, 0xb6, 0x10, 0x26, 0x3c } }

diff --git 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c

index d82f071e85..85098752c6 100644

--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c

+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieGenerator.c

@@ -981,6 +981,7 @@ BuildSsdtPciTableEx (

UINTN Index;

EFI_ACPI_DESCRIPTION_HEADER   **TableList;

ACPI_PCI_GENERATOR*Generator;

+  UINT32Uid;

  


ASSERT (This != NULL);

ASSERT (AcpiTableInfo != NULL);

@@ -1036,13 +1037,29 @@ BuildSsdtPciTableEx (

*Table = TableList;

  


for (Index = 0; Index < PciCount; Index++) {

+if (PcdGetBool (PcdPciUseSegmentAsUid)) {

+  Uid = PciInfo[Index].PciSegmentGroupNumber;

+  if (Uid > MAX_PCI_ROOT_COMPLEXES_SUPPORTED) {

+DEBUG ((

+  DEBUG_ERROR,

+  "ERROR: SSDT-PCI: Pci root complexes segment number: %d."

+  " Greater than maximum number of Pci root complexes supported = 
%d.\n",

+  Uid,

+  MAX_PCI_ROOT_COMPLEXES_SUPPORTED

+  ));

+return EFI_INVALID_PARAMETER;

+  }

+} else {

+  Uid = Index;

+}

+

  // Build a SSDT table describing the Pci devices.

  Status = BuildSsdtPciTable (

 Generator,

 CfgMgrProtocol,

 AcpiTableInfo,

 &PciInfo[Index],

-   Index,

+   Uid,

 &TableList[Index]

 );

  if (EFI_ERROR (Status)) {

diff --git 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf

index b38a4e9d34..c2a1acb570 100644

--- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf

+++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtPcieLibArm/SsdtPcieLibArm.inf

@@ -30,3 +30,6 @@

AmlLib

BaseLib

SsdtPcieSupportLib

+

+[Pcd]

+  gEdkiiDynamicTablesPkgTokenSpaceGuid.PcdPciUseSegmentAsUid




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Re: [edk2-devel][edk2-platforms][PATCH V1 1/1] Maintainers.txt: Add QemuOpenBoardPkg maintainers

[Théo Jehl]

Reviewed-by: Theo Jehl 

Le jeu. 15 sept. 2022 à 17:48, Isaac Oram  a écrit :

> Enable maintainers for Platform/Qemu/QemuOpenBoardPkg MinPlatformPkg
> based board port.
> https://edk2-docs.gitbook.io/edk-ii-minimum-platform-specification/
>
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> Cc: Pedro Falcato 
> Cc: Theo Jehl 
> Signed-off-by: Isaac Oram 
> ---
>  Maintainers.txt | 6 ++
>  1 file changed, 6 insertions(+)
>
> diff --git a/Maintainers.txt b/Maintainers.txt
> index a4a0e4b907..3fb9fb544d 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -348,6 +348,12 @@ F: Silicon/NXP/
>  M: Leif Lindholm 
>  R: Meenakshi Aggarwal 
>
> +QEMU EDK II Minimum Platform Specification implementation
> +F: Platform/Qemu/QemuOpenBoardPkg/
> +M: Isaac Oram 
> +M: Pedro Falcato 
> +R: Theo Jehl 
> +
>  QEMU sbsa-ref platform
>  F: Platform/Qemu/SbsaQemu/
>  F: Silicon/Qemu/SbsaQemu/
> --
> 2.36.1.windows.1
>
>


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Re: [edk2-devel][edk2-platforms][PATCH V3 0/4] QemuOpenBoardPkg: Add QemuOpenBoardPkg

[Isaac Oram]

Done, https://edk2.groups.io/g/devel/message/93841 to cross-reference.

Regards,
Isaac

-Original Message-
From: Leif Lindholm  
Sent: Thursday, September 15, 2022 3:16 AM
To: Oram, Isaac W 
Cc: Kinney, Michael D ; Theo Jehl 
; devel@edk2.groups.io; Pedro Falcato 
; Gerd Hoffmann ; Stefan Hajnoczi 

Subject: Re: [edk2-devel][edk2-platforms][PATCH V3 0/4] QemuOpenBoardPkg: Add 
QemuOpenBoardPkg

We appear to be missing a Maintainers.txt entry for this new package.
Could someone cook one up?

/
Leif

On Wed, Sep 14, 2022 at 20:14:27 +, Oram, Isaac W wrote:
> Series pushed as 9a7234827f..f4679715a4
> 
> -Original Message-
> From: Kinney, Michael D 
> Sent: Tuesday, September 13, 2022 2:51 PM
> To: Oram, Isaac W ; Theo Jehl 
> ; devel@edk2.groups.io; Kinney, Michael D 
> 
> Cc: Leif Lindholm ; Pedro Falcato 
> ; Gerd Hoffmann ; Stefan 
> Hajnoczi 
> Subject: RE: [edk2-devel][edk2-platforms][PATCH V3 0/4] 
> QemuOpenBoardPkg: Add QemuOpenBoardPkg
> 
> Series Acked-by: Michael D Kinney 
> 
> > -Original Message-
> > From: Oram, Isaac W 
> > Sent: Tuesday, September 13, 2022 2:46 PM
> > To: Theo Jehl ; devel@edk2.groups.io
> > Cc: Leif Lindholm ; Kinney, Michael D 
> > ; Pedro Falcato 
> > ; Gerd Hoffmann ; Stefan 
> > Hajnoczi 
> > Subject: RE: [edk2-devel][edk2-platforms][PATCH V3 0/4]
> > QemuOpenBoardPkg: Add QemuOpenBoardPkg
> > 
> > Series Reviewed-by: Isaac Oram 
> > 
> > -Original Message-
> > From: Theo Jehl 
> > Sent: Tuesday, September 13, 2022 2:32 PM
> > To: devel@edk2.groups.io
> > Cc: Leif Lindholm ; Kinney, Michael D 
> > ; Oram, Isaac W 
> > ; Pedro Falcato ; 
> > Gerd Hoffmann ; Stefan Hajnoczi 
> > 
> > Subject: [edk2-devel][edk2-platforms][PATCH V3 0/4] QemuOpenBoardPkg: 
> > Add QemuOpenBoardPkg
> > 
> > QemuOpenBoardPkg adds a MinPlatform port to Qemu x86_64 It can boots 
> > UEFI Linux and Windows, and works on PIIX4 and Q35 This board port provides 
> > a simple starting place for investigating edk2 and MinPlatform Arch.
> > Currently we implement up to stage 4 of the MinPlatform spec and can boot 
> > Windows/Linux.
> > 
> > V2 splits the package into several commits.
> > Each commit corresponding to a MinPlatform architecture stage.
> > 
> > The V3 removes specials characters in "Theo" from file headers.
> > Cleaned up whitespace, punctuation, commenting to better match 
> > coding style and conventions Fixed Visual Studio build issue converting 
> > UINT64 to UINT32.
> > Fixed build issues related to sync with latest master.
> > 
> > Cc: Leif Lindholm 
> > Cc: Michael D Kinney 
> > Cc: Isaac Oram 
> > Cc: Pedro Falcato 
> > Cc: Gerd Hoffmann 
> > Cc: Stefan Hajnoczi 
> > 
> > Signed-off-by: Theo Jehl 
> > 
> > Theo Jehl (4):
> >   QemuOpenBoardPkg: Add QemuOpenBoardPkg
> >   QemuOpenBoardPkg: Enable stage 2
> >   QemuOpenBoardPkg: Enable stage 3
> >   QemuOpenBoardPkg: Enable stage 4
> > 
> >  .../QemuOpenBoardPkg/QemuOpenBoardPkg.dec |  33 ++
> >  .../Include/Dsc/Stage1.dsc.inc|  55 +++
> >  .../Include/Dsc/Stage2.dsc.inc|  31 ++
> >  .../Include/Dsc/Stage3.dsc.inc| 101 ++
> >  .../Include/Dsc/Stage4.dsc.inc|  56 +++
> >  .../QemuOpenBoardPkg/QemuOpenBoardPkg.dsc | 169 +
> >  .../QemuOpenBoardPkg/QemuOpenBoardPkg.fdf | 328 ++
> >  .../BoardBootManagerLib.inf   |  39 +++
> >  .../Library/BoardInitLib/BoardInitLib.inf |  29 ++
> >  .../Library/PeiReportFvLib/PeiReportFvLib.inf |  63   
> > .../Library/PlatformSecLib/PlatformSecLib.inf |  49 +++
> >  .../QemuOpenFwCfgLib/QemuOpenFwCfgLib.inf |  23 ++
> >  .../PlatformInitPei/PlatformInitPei.inf   |  59 
> >  .../Include/Library/QemuOpenFwCfgLib.h| 105 ++
> >  .../PlatformInitPei/PlatformInit.h|  59 
> >  .../BoardBootManagerLib/BoardBootManager.c| 105 ++
> >  .../Library/BoardInitLib/BoardInitLib.c   | 231 
> >  .../Library/PeiReportFvLib/PeiReportFvLib.c   | 285 +++
> >  .../Library/PlatformSecLib/PlatformSecLib.c   | 140 
> >  .../QemuOpenFwCfgLib/QemuOpenFwCfgLib.c   | 136 
> >  .../QemuOpenBoardPkg/PlatformInitPei/Cpu.c|  64 
> >  .../QemuOpenBoardPkg/PlatformInitPei/Memory.c | 254 ++
> >  .../QemuOpenBoardPkg/PlatformInitPei/Pci.c|  70 
> >  .../QemuOpenBoardPkg/PlatformInitPei/Pcie.c   | 106 ++
> >  .../PlatformInitPei/PlatformInit.c|  75 
> >  .../Include/Fdf/FlashMap.fdf.inc  |  94 +
> >  .../Library/PlatformSecLib/Ia32/SecEntry.nasm | 117 +++
> >  Platform/Qemu/QemuOpenBoardPkg/README.md  |  53 +++
> >  28 files changed, 2929 insertions(+)  create mode 100644 
> > Platform/Qemu/QemuOpenBoardPkg/QemuOpenBoardPkg.dec
> >  create mode 100644
> > Platform/Qemu/QemuOpenBoardPkg/Include/Dsc/Stage1.dsc.inc
> >  create mode 100644
> > Platform/Qemu/QemuOpenBoardPkg/Include/Dsc/Stage2.dsc.inc
> >  create mode

Re: [edk2-devel][edk2-platforms][PATCH V1 1/1] Maintainers.txt: Add QemuOpenBoardPkg maintainers

[Pedro Falcato]

Acked-by: Pedro Falcato 

On Thu, Sep 15, 2022 at 4:47 PM Isaac Oram  wrote:

> Enable maintainers for Platform/Qemu/QemuOpenBoardPkg MinPlatformPkg
> based board port.
> https://edk2-docs.gitbook.io/edk-ii-minimum-platform-specification/
>
> Cc: Leif Lindholm 
> Cc: Michael D Kinney 
> Cc: Pedro Falcato 
> Cc: Theo Jehl 
> Signed-off-by: Isaac Oram 
> ---
>  Maintainers.txt | 6 ++
>  1 file changed, 6 insertions(+)
>
> diff --git a/Maintainers.txt b/Maintainers.txt
> index a4a0e4b907..3fb9fb544d 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -348,6 +348,12 @@ F: Silicon/NXP/
>  M: Leif Lindholm 
>  R: Meenakshi Aggarwal 
>
> +QEMU EDK II Minimum Platform Specification implementation
> +F: Platform/Qemu/QemuOpenBoardPkg/
> +M: Isaac Oram 
> +M: Pedro Falcato 
> +R: Theo Jehl 
> +
>  QEMU sbsa-ref platform
>  F: Platform/Qemu/SbsaQemu/
>  F: Silicon/Qemu/SbsaQemu/
> --
> 2.36.1.windows.1
>
>
>
> 
>
>
>

-- 
Pedro Falcato


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[edk2-devel][edk2-platforms][PATCH V1 1/1] Maintainers.txt: Add QemuOpenBoardPkg maintainers

[Isaac Oram]

Enable maintainers for Platform/Qemu/QemuOpenBoardPkg MinPlatformPkg
based board port.
https://edk2-docs.gitbook.io/edk-ii-minimum-platform-specification/

Cc: Leif Lindholm 
Cc: Michael D Kinney 
Cc: Pedro Falcato 
Cc: Theo Jehl 
Signed-off-by: Isaac Oram 
---
 Maintainers.txt | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/Maintainers.txt b/Maintainers.txt
index a4a0e4b907..3fb9fb544d 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -348,6 +348,12 @@ F: Silicon/NXP/
 M: Leif Lindholm 
 R: Meenakshi Aggarwal 
 
+QEMU EDK II Minimum Platform Specification implementation
+F: Platform/Qemu/QemuOpenBoardPkg/
+M: Isaac Oram 
+M: Pedro Falcato 
+R: Theo Jehl 
+
 QEMU sbsa-ref platform
 F: Platform/Qemu/SbsaQemu/
 F: Silicon/Qemu/SbsaQemu/
-- 
2.36.1.windows.1



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Re: [edk2-devel] [PATCH 2/2] DynamicTablesPkg: Add Smbios Type17 Table generator

[Chang, Abner via groups.io]

[AMD Official Use Only - General]



> -Original Message-
> From: Sami Mujawar 
> Sent: Wednesday, September 14, 2022 11:35 PM
> To: Chang, Abner ; devel@edk2.groups.io; Girish
> Mahadevan ; Alexei Fedorov
> 
> Cc: Samer El-Haj-Mahmoud ; Jeff Brasen
> (jbra...@nvidia.com) ; Ashish Singhal
> ; Akanksha Jain ;
> Matteo Carlini ; Hemendra Dassanayake
> ; Nick Ramirez ;
> William Watson ; nd 
> Subject: Re: [edk2-devel] [PATCH 2/2] DynamicTablesPkg: Add Smbios Type17
> Table generator
> 
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
> 
> 
> Hi Abner,
> 
> Please see my response inline marked [SAMI].
> 
> Regards,
> 
> Sami Mujawar
> 
> On 13/09/2022, 04:00, "Chang, Abner"  wrote:
> 
> [AMD Official Use Only - General]
> 
> One question in below with tag [Abner],
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Sami
> > Mujawar via groups.io
> > Sent: Monday, September 12, 2022 10:57 PM
> > To: Girish Mahadevan ; devel@edk2.groups.io;
> > Alexei Fedorov 
> > Cc: Samer El-Haj-Mahmoud ; Jeff
> > Brasen ; Ashish Singhal ;
> > Akanksha Jain ; Matteo Carlini
> > ; Hemendra Dassanayake
> > ; Nick Ramirez
> ;
> > William Watson ; Akanksha Jain
> > ; n...@arm.com
> > Subject: Re: [edk2-devel] [PATCH 2/2] DynamicTablesPkg: Add Smbios
> > Type17 Table generator
> ...
> 
> > > +STATIC
> > > +EFI_STATUS
> > > +EFIAPI
> > > +FreeSmbiosType17TableEx (
> > > +  IN  CONST SMBIOS_TABLE_GENERATOR   *CONST
> This,
> > > +  IN  CONST CM_STD_OBJ_SMBIOS_TABLE_INFO *CONST
> > SmbiosTableInfo,
> > > +  IN  CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST
> > CfgMgrProtocol,
> > > +  IN OUTSMBIOS_STRUCTURE ***CONST  
> Table,
> > > +  IN  CONST UINTN  
> TableCount
> > > +  )
> > > +{
> > > +  return EFI_SUCCESS;
> > > +}
> > > +
> > > +/** Construct SMBIOS Type17 Table describing memory devices.
> > > +
> > > +  If this function allocates any resources then they must be freed
> > > + in the FreeTableResources function.
> > > +
> > > +  @param [in]  ThisPointer to the SMBIOS table generator.
> > > +  @param [in]  SmbiosTableInfo Pointer to the SMBIOS table 
> information.
> > > +  @param [in]  CfgMgrProtocol  Pointer to the Configuration Manager
> > > +   Protocol interface.
> > > +  @param [out] Table   Pointer to the SMBIOS table.
> > > +
> > > +  @retval EFI_SUCCESSTable generated successfully.
> > > +  @retval EFI_BAD_BUFFER_SIZEThe size returned by the 
> Configuration
> > > + Manager is less than the Object 
> size for
> > > + the requested object.
> > > +  @retval EFI_INVALID_PARAMETER  A parameter is invalid.
> > > +  @retval EFI_NOT_FOUND  Could not find information.
> > > +  @retval EFI_OUT_OF_RESOURCES   Could not allocate memory.
> > > +  @retval EFI_UNSUPPORTEDUnsupported configuration.
> > > +**/
> > > +STATIC
> > > +EFI_STATUS
> > > +EFIAPI
> > > +BuildSmbiosType17TableEx (
> > > +  IN  CONST SMBIOS_TABLE_GENERATOR *This,
> > > +  INCM_STD_OBJ_SMBIOS_TABLE_INFO   *CONST
> > SmbiosTableInfo,
> > > +  IN  CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL   *CONST
> > CfgMgrProtocol,
> > > +  OUT   SMBIOS_STRUCTURE   ***Table,
> > > +  OUT   UINTN  *CONST  TableCount
> > > +  )
> > > +{
> > > +  EFI_STATUS Status;
> > > +  UINT32 NumMemDevices;
> > > +  SMBIOS_STRUCTURE   **TableList;
> > > +  CM_ARM_MEMORY_DEVICE_INFO  *MemoryDevicesInfo;
> > > +  UINTN  Index;
> > > +  UINTN  SerialNumLen;
> > > +  CHAR8  *SerialNum;
> > > +  UINTN  AssetTagLen;
> > > +  CHAR8  *AssetTag;
> > > +  UINTN  DeviceLocatorLen;
> > > +  CHAR8  *DeviceLocator;
> > > +  UINTN  BankLocatorLen;
> > > +  CHAR8  *BankLocator;
> > > +  UINTN  FirmwareVersionLen;
> > > +  CHAR8  *FirmwareVersion;
> > > +  CHAR8  *OptionalStrings;
> > > +  SMBIOS_TABLE_TYPE17*SmbiosRecord;
> > > +
> > > +  ASSERT (This != NULL);
> > > +  ASSERT (SmbiosTableInfo != NULL);
> > > +  ASSERT (CfgMgrProtocol != NULL);
> > > +  ASSERT (Table != N

Re: [edk2-devel] [PATCH v3 3/3] DynamicTablesPkg: SSDT CPU _CPC generator

[Sami Mujawar]

Hi Jeff,

Please find my inputs inline marked [SAMI].

Regards,

Sami Mujawar

On 15/09/2022 02:10 pm, Jeff Brasen wrote:

Add code to use a token attached to GICC to generate _CPC object on cpus.



Signed-off-by: Jeff Brasen 

---

  .../SsdtCpuTopologyGenerator.c| 223 +-

  1 file changed, 217 insertions(+), 6 deletions(-)



diff --git 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c

index 8561f48e1f..5d41d57064 100644

--- 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c

+++ 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c

@@ -76,6 +76,16 @@ GET_OBJECT_LIST (

CM_ARM_LPI_INFO

);

  


+/**

+  This macro expands to a function that retrieves the CPC

+  information from the Configuration Manager.

+*/

+GET_OBJECT_LIST (

+  EObjNameSpaceArm,

+  EArmObjCpcInfo,

+  CM_ARM_CPC_INFO

+  );

+

  /** Initialize the TokenTable.

  


One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO

@@ -229,6 +239,183 @@ WriteAslName (

return EFI_SUCCESS;

  }

  


+/** Utility function to check if generic address points to NULL

+

+  @param [in]  Address  Pointer to the Generic address

+

+  @retval TRUE  Address is system memory with an Address of 0.

+  @retval FALSE Address does not point to NULL.

+**/

+STATIC

+BOOLEAN

+EFIAPI

+IsNullGenericAddress (
[SAMI] Move this function to 
DynamicTablesPkg\Library\Common\AmlLib\CodeGen\AmlCodeGen.c


+  IN EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE  *Address

+  )

+{

+  if ((Address == NULL) ||

+  ((Address->AddressSpaceId == EFI_ACPI_6_4_SYSTEM_MEMORY) &&

+   (Address->Address == 0x0)))

+  {

+return TRUE;

+  }

+

+  return FALSE;

+}

+

+/** Create and add an _CPC Node to Cpu Node.

+

+  For instance, transform an AML node from:

+  Device (C002)

+  {

+  Name (_UID, 2)

+  Name (_HID, "ACPI0007")

+  }

+

+  To:

+  Device (C002)

+  {

+  Name (_UID, 2)

+  Name (_HID, "ACPI0007")

+  Name(_CPC, Package()

+  {

+NumEntries,  // Integer

+Revision,// Integer

+HighestPerformance,  // Integer or Buffer 
(Resource Descriptor)

+NominalPerformance,  // Integer or Buffer 
(Resource Descriptor)

+LowestNonlinearPerformance,  // Integer or Buffer 
(Resource Descriptor)

+LowestPerformance,   // Integer or Buffer 
(Resource Descriptor)

+GuaranteedPerformanceRegister,   // Buffer (Resource 
Descriptor)

+DesiredPerformanceRegister , // Buffer (Resource 
Descriptor)

+MinimumPerformanceRegister , // Buffer (Resource 
Descriptor)

+MaximumPerformanceRegister , // Buffer (Resource 
Descriptor)

+PerformanceReductionToleranceRegister,   // Buffer (Resource 
Descriptor)

+TimeWindowRegister,  // Buffer (Resource 
Descriptor)

+CounterWraparoundTime,   // Integer or Buffer 
(Resource Descriptor)

+ReferencePerformanceCounterRegister, // Buffer (Resource 
Descriptor)

+DeliveredPerformanceCounterRegister, // Buffer (Resource 
Descriptor)

+PerformanceLimitedRegister,  // Buffer (Resource 
Descriptor)

+CPPCEnableRegister   // Buffer (Resource 
Descriptor)

+AutonomousSelectionEnable,   // Integer or Buffer 
(Resource Descriptor)

+AutonomousActivityWindowRegister,// Buffer (Resource 
Descriptor)

+EnergyPerformancePreferenceRegister, // Buffer (Resource 
Descriptor)

+ReferencePerformance // Integer or Buffer 
(Resource Descriptor)

+LowestFrequency, // Integer or Buffer 
(Resource Descriptor)

+NominalFrequency // Integer or Buffer 
(Resource Descriptor)

+  })

+  }

+

+  @param [in]  Generator  The SSDT Cpu Topology generator.

+  @param [in]  CfgMgrProtocol Pointer to the Configuration Manager

+  Protocol Interface.

+  @param [in]  ProcHierarchyNodeInfo  CM_ARM_PROC_HIERARCHY_INFO describing

+  the Cpu.

+  @param [in]  Node   CPU Node to which the _CPC node is

+  attached.

+

+  @retval EFI_SUCCESS The function completed successfully.

+  @retval EFI_INVALID_PARAMETER   Invalid parameter.

+  @retval EFI_OUT_OF_RESOURCESFailed to allocate memory.

+**/

+STATIC

+EFI_STATUS

+EFIAPI

+CreateAmlCpcNode (

+  IN  ACPI_CPU_TOPOLOGY_GENERATOR   

Re: [edk2-devel] [PATCH v3 2/3] DynamicTablesPkg: AML Code generation to add _CPC entries

[Sami Mujawar]

Hi Jeff,

Please find my feedback inline marked [SAMI].

Most of my suggestions are with respect to reducing the number of 
parameters in the AmlCreateCpcNod().


Regards,

Sami Mujawar

On 15/09/2022 02:10 pm, Jeff Brasen wrote:

_CPC entries can describe CPU performance information.

The object is described in ACPI 6.4 s8.4.7.1.

"_CPC (Continuous Performance Control)".



Add AmlCreateCpcNode() helper function to add _CPC entries to an

existing CPU object.



Signed-off-by: Jeff Brasen

---

  .../Include/Library/AmlLib/AmlLib.h   | 156 +

  .../Common/AmlLib/CodeGen/AmlCodeGen.c| 543 ++

  2 files changed, 699 insertions(+)



diff --git a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h 
b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h

index 39968660f2..3fafa6b0e8 100644

--- a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h

+++ b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h


[SAMI] Include  to get the definition for 
AML_CPC_INFO.




@@ -1336,6 +1336,162 @@ AmlAddNameIntegerPackage (

IN AML_OBJECT_NODE_HANDLE  PackageNode

);

  


+/** Create a _CPC node.

+

+  Creates and optionally adds the following node

+   Name(_CPC, Package()

+   {

+NumEntries,  // Integer

+Revision,// Integer

+HighestPerformance,  // Integer or Buffer (Resource 
Descriptor)

+NominalPerformance,  // Integer or Buffer (Resource 
Descriptor)

+LowestNonlinearPerformance,  // Integer or Buffer (Resource 
Descriptor)

+LowestPerformance,   // Integer or Buffer (Resource 
Descriptor)

+GuaranteedPerformanceRegister,   // Buffer (Resource Descriptor)

+DesiredPerformanceRegister , // Buffer (Resource Descriptor)

+MinimumPerformanceRegister , // Buffer (Resource Descriptor)

+MaximumPerformanceRegister , // Buffer (Resource Descriptor)

+PerformanceReductionToleranceRegister,   // Buffer (Resource Descriptor)

+TimeWindowRegister,  // Buffer (Resource Descriptor)

+CounterWraparoundTime,   // Integer or Buffer (Resource 
Descriptor)

+ReferencePerformanceCounterRegister, // Buffer (Resource Descriptor)

+DeliveredPerformanceCounterRegister, // Buffer (Resource Descriptor)

+PerformanceLimitedRegister,  // Buffer (Resource Descriptor)

+CPPCEnableRegister   // Buffer (Resource Descriptor)

+AutonomousSelectionEnable,   // Integer or Buffer (Resource 
Descriptor)

+AutonomousActivityWindowRegister,// Buffer (Resource Descriptor)

+EnergyPerformancePreferenceRegister, // Buffer (Resource Descriptor)

+ReferencePerformance // Integer or Buffer (Resource 
Descriptor)

+LowestFrequency, // Integer or Buffer (Resource 
Descriptor)

+NominalFrequency // Integer or Buffer (Resource 
Descriptor)

+  })

+

+  If resource buffer is NULL then integer will be used.

+

+  Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)

+

+  @ingroup CodeGenApis

+

+  @param [in]  HighestPerformanceBuffer   If provided, buffer that 
indicates the highest level

+  of performance the 
processor.

+  @param [in]  HighestPerformanceInteger  Indicates the highest 
level of performance the processor,

+  used if buffer is NULL.

+  @param [in]  NominalPerformanceBuffer   If provided buffer that 
indicates the highest sustained

+  performance level of the 
processor.

+  @param [in]  NominalPerformanceInteger  Indicates the highest 
sustained performance level

+  of the processor, used 
if buffer is NULL.

+  @param [in]  LowestNonlinearPerformanceBuffer   If provided, buffer that 
indicates the lowest performance level

+  of the processor with 
non-linear power savings.

+  @param [in]  LowestNonlinearPerformanceInteger  Indicates the lowest 
performance level of the processor with

+  non-linear power 
savings, used if buffer is NULL.

+  @param [in]  LowestPerformanceBufferIf provided, buffer that 
indicates the

+  lowest performance level 
of the processor.

+  @param [in]  LowestPerformanceInteger   Indicates the lowest 
performance level of the processor,

+  used if buffer is NULL.

+  @param [in]  GuaranteedPerformanceRegister  If provided, Guaranteed 

Re: [edk2-devel] [PATCH v3 1/3] DynamicTablesPkg: Add CM_ARM_CPC_INFO object

[Sami Mujawar]

Hi Jeff,

Please find my feedback inline marked [SAMI].

Regards,

Sami Mujawar

On 15/09/2022 02:10 pm, Jeff Brasen wrote:

Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects.

This allows to describe CPC information, as described in ACPI 6.4,

s8.4.7.1 "_CPC (Continuous Performance Control)".



Signed-off-by: Jeff Brasen

---

  .../Include/ArmNameSpaceObjects.h | 148 --

  .../ConfigurationManagerObjectParser.c|  80 ++

  2 files changed, 211 insertions(+), 17 deletions(-)



diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h 
b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

index 102e0f96be..d76cc08e14 100644

--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

@@ -63,6 +63,7 @@ typedef enum ArmObjectID {

EArmObjPciInterruptMapInfo,  ///< 39 - Pci Interrupt Map Info

EArmObjRmr,  ///< 40 - Reserved Memory Range Node

EArmObjMemoryRangeDescriptor,///< 41 - Memory Range Descriptor

+  EArmObjCpcInfo,  ///< 42 - Continuous Performance 
Control Info

EArmObjMax

  } EARM_OBJECT_ID;

  


@@ -97,99 +98,105 @@ typedef struct CmArmPowerManagementProfileInfo {

  */

  typedef struct CmArmGicCInfo {

/// The GIC CPU Interface number.

-  UINT32CPUInterfaceNumber;

+  UINT32 CPUInterfaceNumber;

  


/** The ACPI Processor UID. This must match the

_UID of the CPU Device object information described

in the DSDT/SSDT for the CPU.

*/

-  UINT32AcpiProcessorUid;

+  UINT32 AcpiProcessorUid;

  


/** The flags field as described by the GICC structure

in the ACPI Specification.

*/

-  UINT32Flags;

+  UINT32 Flags;

  


/** The parking protocol version field as described by

  the GICC structure in the ACPI Specification.

*/

-  UINT32ParkingProtocolVersion;

+  UINT32 ParkingProtocolVersion;

  


/** The Performance Interrupt field as described by

the GICC structure in the ACPI Specification.

*/

-  UINT32PerformanceInterruptGsiv;

+  UINT32 PerformanceInterruptGsiv;

  


/** The CPU Parked address field as described by

the GICC structure in the ACPI Specification.

*/

-  UINT64ParkedAddress;

+  UINT64 ParkedAddress;

  


/** The base address for the GIC CPU Interface

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64PhysicalBaseAddress;

+  UINT64 PhysicalBaseAddress;

  


/** The base address for GICV interface

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64GICV;

+  UINT64 GICV;

  


/** The base address for GICH interface

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64GICH;

+  UINT64 GICH;

  


/** The GICV maintenance interrupt

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT32VGICMaintenanceInterrupt;

+  UINT32 VGICMaintenanceInterrupt;

  


/** The base address for GICR interface

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64GICRBaseAddress;

+  UINT64 GICRBaseAddress;

  


/** The MPIDR for the CPU

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64MPIDR;

+  UINT64 MPIDR;

  


/** The Processor Power Efficiency class

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT8 ProcessorPowerEfficiencyClass;

+  UINT8  ProcessorPowerEfficiencyClass;

  


/** Statistical Profiling Extension buffer overflow GSIV. Zero if

unsupported by this processor. This field was introduced in

ACPI 6.3 (MADT revision 5) and is therefore ignored when

generating MADT revision 4 or lower.

*/

-  UINT16SpeOverflowInterrupt;

+  UINT16 SpeOverflowInterrupt;

  


/** The proximity domain to which the logical processor belongs.

This field is used to populate the GICC affinity structure

in the SRAT table.

*/

-  UINT32ProximityDomain;

+  UINT32 ProximityDomain;

  


/** The clock domain to which the logical processor belongs.

This field is used to populate the GICC affinity structure

in the SRAT table.

*/

-  UINT32ClockDomain;

+  UINT32 ClockDomain;

  


/** The GICC Affinity flags field as described by the GICC Affinity 
structure

in the SRAT table.

*/

-  UINT32AffinityFlags;

+  UINT32 AffinityFlags;

+

+  /** Optional field: Reference Token for the Cpc info of this processor.

+  T

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Re: [edk2-devel] [PATCH v2 1/3] DynamicTablesPkg: Add CM_ARM_CPC_INFO object

[Sami Mujawar]

Hi Jeff,

Apologies for the delay in providing feedback. I was half way through 
your patch series when you sent the v3.


For this patch please fine my feedbakc inline marked [SAMI].  I believe 
some of these still apply for v3.


I will provide review feedback for the v3 series shortly.

Regards,

Sami Mujawar

On 14/09/2022 10:34 pm, Jeff Brasen wrote:

Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects.

This allows to describe CPC information, as described in ACPI 6.4,

s8.4.7.1 "_CPC (Continuous Performance Control)".



Signed-off-by: Jeff Brasen 

---

  .../Include/ArmNameSpaceObjects.h | 148 --

  .../ConfigurationManagerObjectParser.c|  79 ++

  2 files changed, 210 insertions(+), 17 deletions(-)



diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h 
b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

index 102e0f96be..d76cc08e14 100644

--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

@@ -63,6 +63,7 @@ typedef enum ArmObjectID {

EArmObjPciInterruptMapInfo,  ///< 39 - Pci Interrupt Map Info

EArmObjRmr,  ///< 40 - Reserved Memory Range Node

EArmObjMemoryRangeDescriptor,///< 41 - Memory Range Descriptor

+  EArmObjCpcInfo,  ///< 42 - Continuous Performance 
Control Info

EArmObjMax

  } EARM_OBJECT_ID;

  


@@ -97,99 +98,105 @@ typedef struct CmArmPowerManagementProfileInfo {

  */

  typedef struct CmArmGicCInfo {

/// The GIC CPU Interface number.

-  UINT32CPUInterfaceNumber;

+  UINT32 CPUInterfaceNumber;

  


/** The ACPI Processor UID. This must match the

_UID of the CPU Device object information described

in the DSDT/SSDT for the CPU.

*/

-  UINT32AcpiProcessorUid;

+  UINT32 AcpiProcessorUid;

  


/** The flags field as described by the GICC structure

in the ACPI Specification.

*/

-  UINT32Flags;

+  UINT32 Flags;

  


/** The parking protocol version field as described by

  the GICC structure in the ACPI Specification.

*/

-  UINT32ParkingProtocolVersion;

+  UINT32 ParkingProtocolVersion;

  


/** The Performance Interrupt field as described by

the GICC structure in the ACPI Specification.

*/

-  UINT32PerformanceInterruptGsiv;

+  UINT32 PerformanceInterruptGsiv;

  


/** The CPU Parked address field as described by

the GICC structure in the ACPI Specification.

*/

-  UINT64ParkedAddress;

+  UINT64 ParkedAddress;

  


/** The base address for the GIC CPU Interface

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64PhysicalBaseAddress;

+  UINT64 PhysicalBaseAddress;

  


/** The base address for GICV interface

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64GICV;

+  UINT64 GICV;

  


/** The base address for GICH interface

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64GICH;

+  UINT64 GICH;

  


/** The GICV maintenance interrupt

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT32VGICMaintenanceInterrupt;

+  UINT32 VGICMaintenanceInterrupt;

  


/** The base address for GICR interface

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64GICRBaseAddress;

+  UINT64 GICRBaseAddress;

  


/** The MPIDR for the CPU

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT64MPIDR;

+  UINT64 MPIDR;

  


/** The Processor Power Efficiency class

as described by the GICC structure in the

ACPI Specification.

*/

-  UINT8 ProcessorPowerEfficiencyClass;

+  UINT8  ProcessorPowerEfficiencyClass;

  


/** Statistical Profiling Extension buffer overflow GSIV. Zero if

unsupported by this processor. This field was introduced in

ACPI 6.3 (MADT revision 5) and is therefore ignored when

generating MADT revision 4 or lower.

*/

-  UINT16SpeOverflowInterrupt;

+  UINT16 SpeOverflowInterrupt;

  


/** The proximity domain to which the logical processor belongs.

This field is used to populate the GICC affinity structure

in the SRAT table.

*/

-  UINT32ProximityDomain;

+  UINT32 ProximityDomain;

  


/** The clock domain to which the logical processor belongs.

This field is used to populate the GICC affinity structure

in the SRAT table.

*/

-  UINT32ClockDomain;

+  UINT32 ClockDomain;

  


/** The GICC Affinity flags field a

[edk2-devel][PATCH v2] IntelFsp2Pkg: NvsBufferPtr is missing in Fsp24ApiEntryM.nasm

[Kuo, Ted]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4063
Added NvsBufferPtr to FSPM_UPD_COMMON_FSP24 in Fsp24ApiEntryM.nasm to
align with FSP 2.4 SPEC.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Cc: Ashraf Ali S 
Cc: Chinni B Duggapu 
Signed-off-by: Ted Kuo 
---
 IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm | 3 ++-
 IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm  | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm 
b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
index 997b9c0bff..15f8ecea83 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
@@ -40,12 +40,13 @@ struc FSPM_UPD_COMMON_FSP24
 .Revision:  resb  1
 .Reserved:  resb  3
 .Length resd  1
+.NvsBufferPtr   resq  1
 .StackBase: resq  1
 .StackSize: resq  1
 .BootLoaderTolumSize:   resd  1
 .BootMode:  resd  1
 .FspEventHandlerresq  1
-.Reserved1: resb 24
+.Reserved1: resb 16
 ; }
 .size:
 endstruc
diff --git a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm 
b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
index 8880721f29..a3b38e4585 100644
--- a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
+++ b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
@@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24
 .Revision:  resb  1
 .Reserved:  resb  3
 .Length resd  1
+.NvsBufferPtr   resq  1
 .StackBase: resq  1
 .StackSize: resq  1
 .BootLoaderTolumSize:   resd  1
 .BootMode:  resd  1
 .FspEventHandlerresq  1
-.Reserved1: resb 24
+.Reserved1: resb 16
 ; }
 .size:
 endstruc
-- 
2.35.3.windows.1



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[edk2-devel] [PATCH 1/1] BaseTools: Fix RISC-V build failure with binutils 2.38+

[Sunil V L]

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4061

>From version 2.38, binutils adheres to RISC-V ISA spec version
20191213. This means that the csr read/write (csrr*/csrw*)
instructions and fence.i instruction are separated from the
`I` extension, become two standalone extensions: Zicsr and
Zifencei. As the edk2 uses those instructions, this causes the
following build failure:

.../RiscV64/FlushCache.:16: Error: unrecognized opcode `fence.i'

Hence, different -march strings are needed for different versions of
the toolchain. To support both types of the toolchains, detect
the capability of the toolchain while creating tools_def.txt from
the template and update the tools_def.txt with a different -march
string matching the toolchain capabilities.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 
Signed-off-by: Sunil V L 
---
 BaseTools/BuildEnv | 29 +
 1 file changed, 29 insertions(+)

diff --git a/BaseTools/BuildEnv b/BaseTools/BuildEnv
index 275f4c5901aa..08ab28107d89 100755
--- a/BaseTools/BuildEnv
+++ b/BaseTools/BuildEnv
@@ -213,6 +213,26 @@ AddEdkToolsToPath() {
 
 }
 
+UpdateRiscVToolsDefFile() {
+
+  # binutils 2.38+ needs zicsr_zifencei in -march
+  # To support older toolchain, run gcc with latest -march
+  # and check if it succeeds
+  ${GCC5_RISCV64_PREFIX}gcc -march=rv64imafdc_zicsr_zifencei -x c -c /dev/null 
\
+  -o $CONF_PATH/TmpZicsrZifencei > /dev/null 2>&1
+  ZicsrZifenceiNeeded=$?
+
+  if [ $ZicsrZifenceiNeeded -eq 0 ]
+  then
+echo "Updating $CONF_PATH/tools_def.txt"
+sed -i 's/rv64imafdc/rv64imafdc_zicsr_zifencei/g' $CONF_PATH/tools_def.txt
+
+# Remove the temporary file
+rm $CONF_PATH/TmpZicsrZifencei
+  fi
+
+}
+
 CopySingleTemplateFile() {
 
   SRC_FILENAME=Conf/$1.template
@@ -228,6 +248,15 @@ CopySingleTemplateFile() {
   SRC_FILENAME=$EDK_TOOLS_PATH/$SRC_FILENAME
   cp $SRC_FILENAME $DST_FILENAME
 
+  # Update RISC-V definitions based on toolchain capabilities
+  if [ "$1" = "tools_def" ]
+  then
+if ! [ -z ${GCC5_RISCV64_PREFIX} ]
+then
+  UpdateRiscVToolsDefFile
+fi
+  fi
+
 }
 
 CopyTemplateFiles() {
-- 
2.34.1



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[edk2-devel][PATCH v1] IntelFsp2Pkg: NvsBufferPtr is missing in Fsp24ApiEntryM.nasm

[Kuo, Ted]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4063
Added NvsBufferPtr to FSPM_UPD_COMMON_FSP24 in Fsp24ApiEntryM.nasm to
align with FSP 2.4 SPEC.

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Star Zeng 
Cc: Ashraf Ali S 
Cc: Chinni B Duggapu 
Signed-off-by: Ted Kuo 
---
 IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm 
b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
index 8880721f29..a3b38e4585 100644
--- a/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
+++ b/IntelFsp2Pkg/FspSecCore/X64/Fsp24ApiEntryM.nasm
@@ -22,12 +22,13 @@ struc FSPM_UPD_COMMON_FSP24
 .Revision:  resb  1
 .Reserved:  resb  3
 .Length resd  1
+.NvsBufferPtr   resq  1
 .StackBase: resq  1
 .StackSize: resq  1
 .BootLoaderTolumSize:   resd  1
 .BootMode:  resd  1
 .FspEventHandlerresq  1
-.Reserved1: resb 24
+.Reserved1: resb 16
 ; }
 .size:
 endstruc
-- 
2.35.3.windows.1



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[edk2-devel] [PATCH v3 2/3] DynamicTablesPkg: AML Code generation to add _CPC entries

[Jeff Brasen via groups.io]

_CPC entries can describe CPU performance information.

The object is described in ACPI 6.4 s8.4.7.1.

"_CPC (Continuous Performance Control)".



Add AmlCreateCpcNode() helper function to add _CPC entries to an

existing CPU object.



Signed-off-by: Jeff Brasen 

---

 .../Include/Library/AmlLib/AmlLib.h   | 156 +

 .../Common/AmlLib/CodeGen/AmlCodeGen.c| 543 ++

 2 files changed, 699 insertions(+)



diff --git a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h 
b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h

index 39968660f2..3fafa6b0e8 100644

--- a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h

+++ b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h

@@ -1336,6 +1336,162 @@ AmlAddNameIntegerPackage (

   IN AML_OBJECT_NODE_HANDLE  PackageNode

   );

 

+/** Create a _CPC node.

+

+  Creates and optionally adds the following node

+   Name(_CPC, Package()

+   {

+NumEntries,  // Integer

+Revision,// Integer

+HighestPerformance,  // Integer or Buffer (Resource 
Descriptor)

+NominalPerformance,  // Integer or Buffer (Resource 
Descriptor)

+LowestNonlinearPerformance,  // Integer or Buffer (Resource 
Descriptor)

+LowestPerformance,   // Integer or Buffer (Resource 
Descriptor)

+GuaranteedPerformanceRegister,   // Buffer (Resource Descriptor)

+DesiredPerformanceRegister , // Buffer (Resource Descriptor)

+MinimumPerformanceRegister , // Buffer (Resource Descriptor)

+MaximumPerformanceRegister , // Buffer (Resource Descriptor)

+PerformanceReductionToleranceRegister,   // Buffer (Resource Descriptor)

+TimeWindowRegister,  // Buffer (Resource Descriptor)

+CounterWraparoundTime,   // Integer or Buffer (Resource 
Descriptor)

+ReferencePerformanceCounterRegister, // Buffer (Resource Descriptor)

+DeliveredPerformanceCounterRegister, // Buffer (Resource Descriptor)

+PerformanceLimitedRegister,  // Buffer (Resource Descriptor)

+CPPCEnableRegister   // Buffer (Resource Descriptor)

+AutonomousSelectionEnable,   // Integer or Buffer (Resource 
Descriptor)

+AutonomousActivityWindowRegister,// Buffer (Resource Descriptor)

+EnergyPerformancePreferenceRegister, // Buffer (Resource Descriptor)

+ReferencePerformance // Integer or Buffer (Resource 
Descriptor)

+LowestFrequency, // Integer or Buffer (Resource 
Descriptor)

+NominalFrequency // Integer or Buffer (Resource 
Descriptor)

+  })

+

+  If resource buffer is NULL then integer will be used.

+

+  Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)

+

+  @ingroup CodeGenApis

+

+  @param [in]  HighestPerformanceBuffer   If provided, buffer that 
indicates the highest level

+  of performance the 
processor.

+  @param [in]  HighestPerformanceInteger  Indicates the highest 
level of performance the processor,

+  used if buffer is NULL.

+  @param [in]  NominalPerformanceBuffer   If provided buffer that 
indicates the highest sustained

+  performance level of the 
processor.

+  @param [in]  NominalPerformanceInteger  Indicates the highest 
sustained performance level

+  of the processor, used 
if buffer is NULL.

+  @param [in]  LowestNonlinearPerformanceBuffer   If provided, buffer that 
indicates the lowest performance level

+  of the processor with 
non-linear power savings.

+  @param [in]  LowestNonlinearPerformanceInteger  Indicates the lowest 
performance level of the processor with

+  non-linear power 
savings, used if buffer is NULL.

+  @param [in]  LowestPerformanceBufferIf provided, buffer that 
indicates the

+  lowest performance level 
of the processor.

+  @param [in]  LowestPerformanceInteger   Indicates the lowest 
performance level of the processor,

+  used if buffer is NULL.

+  @param [in]  GuaranteedPerformanceRegister  If provided, Guaranteed 
Performance Register Buffer.

+  @param [in]  DesiredPerformanceRegister If provided, Desired 
Performance Register Buffer.

+  @param [in]  MinimumPerformanceRegister If provided, Minimum 
Performance Register Buffer.

+  @param [in]  MaximumPerformanceRegister 

[edk2-devel] [PATCH v3 0/3] DynamicTablesPkg: _CPC support

[Jeff Brasen via groups.io]

Add generator for creating the _CPC object for CPU nodes.

If viewing this review by a pull request is helpful one exists here:
https://github.com/NVIDIA/edk2/pull/12

Change Log:
v1 - Initial Revision
v2 - Added revision to object, improved error handling, changed to ACPI 6.4 
structures.
v3 - Minor review feedback

Jeff Brasen (3):
  DynamicTablesPkg: Add CM_ARM_CPC_INFO object
  DynamicTablesPkg: AML Code generation to add _CPC entries
  DynamicTablesPkg: SSDT CPU _CPC generator

 .../Include/ArmNameSpaceObjects.h | 148 -
 .../Include/Library/AmlLib/AmlLib.h   | 156 +
 .../SsdtCpuTopologyGenerator.c| 223 ++-
 .../Common/AmlLib/CodeGen/AmlCodeGen.c| 543 ++
 .../ConfigurationManagerObjectParser.c|  80 +++
 5 files changed, 1127 insertions(+), 23 deletions(-)

-- 
2.25.1



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[edk2-devel] [PATCH v3 3/3] DynamicTablesPkg: SSDT CPU _CPC generator

[Jeff Brasen via groups.io]

Add code to use a token attached to GICC to generate _CPC object on cpus.



Signed-off-by: Jeff Brasen 

---

 .../SsdtCpuTopologyGenerator.c| 223 +-

 1 file changed, 217 insertions(+), 6 deletions(-)



diff --git 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c

index 8561f48e1f..5d41d57064 100644

--- 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c

+++ 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c

@@ -76,6 +76,16 @@ GET_OBJECT_LIST (

   CM_ARM_LPI_INFO

   );

 

+/**

+  This macro expands to a function that retrieves the CPC

+  information from the Configuration Manager.

+*/

+GET_OBJECT_LIST (

+  EObjNameSpaceArm,

+  EArmObjCpcInfo,

+  CM_ARM_CPC_INFO

+  );

+

 /** Initialize the TokenTable.

 

   One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO

@@ -229,6 +239,183 @@ WriteAslName (

   return EFI_SUCCESS;

 }

 

+/** Utility function to check if generic address points to NULL

+

+  @param [in]  Address  Pointer to the Generic address

+

+  @retval TRUE  Address is system memory with an Address of 0.

+  @retval FALSE Address does not point to NULL.

+**/

+STATIC

+BOOLEAN

+EFIAPI

+IsNullGenericAddress (

+  IN EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE  *Address

+  )

+{

+  if ((Address == NULL) ||

+  ((Address->AddressSpaceId == EFI_ACPI_6_4_SYSTEM_MEMORY) &&

+   (Address->Address == 0x0)))

+  {

+return TRUE;

+  }

+

+  return FALSE;

+}

+

+/** Create and add an _CPC Node to Cpu Node.

+

+  For instance, transform an AML node from:

+  Device (C002)

+  {

+  Name (_UID, 2)

+  Name (_HID, "ACPI0007")

+  }

+

+  To:

+  Device (C002)

+  {

+  Name (_UID, 2)

+  Name (_HID, "ACPI0007")

+  Name(_CPC, Package()

+  {

+NumEntries,  // Integer

+Revision,// Integer

+HighestPerformance,  // Integer or Buffer 
(Resource Descriptor)

+NominalPerformance,  // Integer or Buffer 
(Resource Descriptor)

+LowestNonlinearPerformance,  // Integer or Buffer 
(Resource Descriptor)

+LowestPerformance,   // Integer or Buffer 
(Resource Descriptor)

+GuaranteedPerformanceRegister,   // Buffer (Resource 
Descriptor)

+DesiredPerformanceRegister , // Buffer (Resource 
Descriptor)

+MinimumPerformanceRegister , // Buffer (Resource 
Descriptor)

+MaximumPerformanceRegister , // Buffer (Resource 
Descriptor)

+PerformanceReductionToleranceRegister,   // Buffer (Resource 
Descriptor)

+TimeWindowRegister,  // Buffer (Resource 
Descriptor)

+CounterWraparoundTime,   // Integer or Buffer 
(Resource Descriptor)

+ReferencePerformanceCounterRegister, // Buffer (Resource 
Descriptor)

+DeliveredPerformanceCounterRegister, // Buffer (Resource 
Descriptor)

+PerformanceLimitedRegister,  // Buffer (Resource 
Descriptor)

+CPPCEnableRegister   // Buffer (Resource 
Descriptor)

+AutonomousSelectionEnable,   // Integer or Buffer 
(Resource Descriptor)

+AutonomousActivityWindowRegister,// Buffer (Resource 
Descriptor)

+EnergyPerformancePreferenceRegister, // Buffer (Resource 
Descriptor)

+ReferencePerformance // Integer or Buffer 
(Resource Descriptor)

+LowestFrequency, // Integer or Buffer 
(Resource Descriptor)

+NominalFrequency // Integer or Buffer 
(Resource Descriptor)

+  })

+  }

+

+  @param [in]  Generator  The SSDT Cpu Topology generator.

+  @param [in]  CfgMgrProtocol Pointer to the Configuration Manager

+  Protocol Interface.

+  @param [in]  ProcHierarchyNodeInfo  CM_ARM_PROC_HIERARCHY_INFO describing

+  the Cpu.

+  @param [in]  Node   CPU Node to which the _CPC node is

+  attached.

+

+  @retval EFI_SUCCESS The function completed successfully.

+  @retval EFI_INVALID_PARAMETER   Invalid parameter.

+  @retval EFI_OUT_OF_RESOURCESFailed to allocate memory.

+**/

+STATIC

+EFI_STATUS

+EFIAPI

+CreateAmlCpcNode (

+  IN  ACPI_CPU_TOPOLOGY_GENERATOR *Generator,

+  IN  CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL  *CONST  CfgMgrProtocol,

+  INCM_ARM_GICC_INFO  *GicCInfo,

+  IN  AML_OBJECT_NODE_HANDLE  

[edk2-devel] [PATCH v3 1/3] DynamicTablesPkg: Add CM_ARM_CPC_INFO object

[Jeff Brasen via groups.io]

Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects.

This allows to describe CPC information, as described in ACPI 6.4,

s8.4.7.1 "_CPC (Continuous Performance Control)".



Signed-off-by: Jeff Brasen 

---

 .../Include/ArmNameSpaceObjects.h | 148 --

 .../ConfigurationManagerObjectParser.c|  80 ++

 2 files changed, 211 insertions(+), 17 deletions(-)



diff --git a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h 
b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

index 102e0f96be..d76cc08e14 100644

--- a/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

+++ b/DynamicTablesPkg/Include/ArmNameSpaceObjects.h

@@ -63,6 +63,7 @@ typedef enum ArmObjectID {

   EArmObjPciInterruptMapInfo,  ///< 39 - Pci Interrupt Map Info

   EArmObjRmr,  ///< 40 - Reserved Memory Range Node

   EArmObjMemoryRangeDescriptor,///< 41 - Memory Range Descriptor

+  EArmObjCpcInfo,  ///< 42 - Continuous Performance 
Control Info

   EArmObjMax

 } EARM_OBJECT_ID;

 

@@ -97,99 +98,105 @@ typedef struct CmArmPowerManagementProfileInfo {

 */

 typedef struct CmArmGicCInfo {

   /// The GIC CPU Interface number.

-  UINT32CPUInterfaceNumber;

+  UINT32 CPUInterfaceNumber;

 

   /** The ACPI Processor UID. This must match the

   _UID of the CPU Device object information described

   in the DSDT/SSDT for the CPU.

   */

-  UINT32AcpiProcessorUid;

+  UINT32 AcpiProcessorUid;

 

   /** The flags field as described by the GICC structure

   in the ACPI Specification.

   */

-  UINT32Flags;

+  UINT32 Flags;

 

   /** The parking protocol version field as described by

 the GICC structure in the ACPI Specification.

   */

-  UINT32ParkingProtocolVersion;

+  UINT32 ParkingProtocolVersion;

 

   /** The Performance Interrupt field as described by

   the GICC structure in the ACPI Specification.

   */

-  UINT32PerformanceInterruptGsiv;

+  UINT32 PerformanceInterruptGsiv;

 

   /** The CPU Parked address field as described by

   the GICC structure in the ACPI Specification.

   */

-  UINT64ParkedAddress;

+  UINT64 ParkedAddress;

 

   /** The base address for the GIC CPU Interface

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64PhysicalBaseAddress;

+  UINT64 PhysicalBaseAddress;

 

   /** The base address for GICV interface

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64GICV;

+  UINT64 GICV;

 

   /** The base address for GICH interface

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64GICH;

+  UINT64 GICH;

 

   /** The GICV maintenance interrupt

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT32VGICMaintenanceInterrupt;

+  UINT32 VGICMaintenanceInterrupt;

 

   /** The base address for GICR interface

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64GICRBaseAddress;

+  UINT64 GICRBaseAddress;

 

   /** The MPIDR for the CPU

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT64MPIDR;

+  UINT64 MPIDR;

 

   /** The Processor Power Efficiency class

   as described by the GICC structure in the

   ACPI Specification.

   */

-  UINT8 ProcessorPowerEfficiencyClass;

+  UINT8  ProcessorPowerEfficiencyClass;

 

   /** Statistical Profiling Extension buffer overflow GSIV. Zero if

   unsupported by this processor. This field was introduced in

   ACPI 6.3 (MADT revision 5) and is therefore ignored when

   generating MADT revision 4 or lower.

   */

-  UINT16SpeOverflowInterrupt;

+  UINT16 SpeOverflowInterrupt;

 

   /** The proximity domain to which the logical processor belongs.

   This field is used to populate the GICC affinity structure

   in the SRAT table.

   */

-  UINT32ProximityDomain;

+  UINT32 ProximityDomain;

 

   /** The clock domain to which the logical processor belongs.

   This field is used to populate the GICC affinity structure

   in the SRAT table.

   */

-  UINT32ClockDomain;

+  UINT32 ClockDomain;

 

   /** The GICC Affinity flags field as described by the GICC Affinity structure

   in the SRAT table.

   */

-  UINT32AffinityFlags;

+  UINT32 AffinityFlags;

+

+  /** Optional field: Reference Token for the Cpc info of this processor.

+  Token identifying a CM_ARM_OBJ_REF structure, itself referencing

+  CM_ARM_CPC_INFO objects.

+  */

+  CM_OBJECT_TOKENCpcToken;

 } CM_ARM_GICC_INFO;

 

 /** A structure that describes the

@@ -1070,6 +1077,113 @@ typedef

Re: [edk2-devel] [PATCH] Maintainers.txt: Update reviewers for IntelSiliconPkg

[Ni, Ray]

Reviewed-by: Ray Ni 

> -Original Message-
> From: S, Ashraf Ali 
> Sent: Tuesday, August 23, 2022 3:25 PM
> To: devel@edk2.groups.io
> Cc: S, Ashraf Ali ; Ni, Ray ; 
> Chaganty, Rangasai V
> ; Oram, Isaac W 
> Subject: [PATCH] Maintainers.txt: Update reviewers for IntelSiliconPkg
> 
> Add Ashraf Ali S as IntelSiliconPkg reviewers
> 
> Signed-off-by: Ashraf Ali S 
> Cc: Ray Ni 
> Cc: Rangasai V Chaganty 
> Cc: Isaac Oram 
> ---
>  Maintainers.txt | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt
> index 5e403ce851..e2ca67a0f2 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -277,6 +277,7 @@ F: Silicon/Intel/IntelSiliconPkg/
>  M: Ray Ni 
>  M: Rangasai V Chaganty 
>  M: Isaac Oram 
> +M: Ashraf Ali S 
> 
>  Silicon/Intel/QuarkSocPkg
>  F: Silicon/Intel/QuarkSocPkg/
> --
> 2.30.2.windows.1



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Re: [edk2-devel] [PATCH v2 10/34] ShellPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

Zhichao,
Ok, I will add all of R-B information in the V3. Thanks for reminding. :)

Thanks,
Chao


On 9月 15 2022, at 4:56 下午, "Gao, Zhichao"  wrote:
> Reviewed-by: Zhichao Gao 
>
> Please add Mike's R-B. If the patches are not changed, you can keep the 
> received R-B so the maintainers/reviewers can avoid review the same content 
> again.
> Thanks,
> Zhichao
>
> > -Original Message-
> > From: Chao Li 
> > Sent: Wednesday, September 14, 2022 5:36 PM
> > To: devel@edk2.groups.io
> > Cc: Ni, Ray ; Gao, Zhichao 
> > Subject: [PATCH v2 10/34] ShellPkg: Add LOONGARCH64 architecture for
> > EDK2 CI.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053
> >
> > Add LOONGARCH64 architecture to ShellPkg for EDK2 CI testing.
> >
> > Cc: Ray Ni 
> > Cc: Zhichao Gao 
> >
> > Signed-off-by: Chao Li 
> > ---
> > ShellPkg/ShellPkg.dsc | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc index
> > 38fde3dc71..dd0d88603f 100644
> > --- a/ShellPkg/ShellPkg.dsc
> > +++ b/ShellPkg/ShellPkg.dsc
> > @@ -4,6 +4,7 @@
> > # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved. #
> > Copyright (c) 2018 - 2020, Arm Limited. All rights reserved. # 
> > Copyright (c)
> > 2020, Hewlett Packard Enterprise Development LP. All rights
> > reserved.+# Copyright (c) 2022, Loongson Technology Corporation
> > Limited. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-
> > Patent #@@ -15,7 +16,7 @@
> > PLATFORM_VERSION = 1.02 DSC_SPECIFICATION =
> > 0x00010006 OUTPUT_DIRECTORY = Build/Shell-
> > SUPPORTED_ARCHITECTURES = IA32|X64|EBC|ARM|AARCH64|RISCV64+
> > SUPPORTED_ARCHITECTURES =
> > IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64 BUILD_TARGETS
> > = DEBUG|RELEASE|NOOPT SKUID_IDENTIFIER = DEFAULT --
> > 2.27.0
>
>
>
> 
>



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Re: [edk2-devel] [edk2-platforms][PATCH 1/2] SbsaQemu/OemMiscLib: Update for new OemMiscLib APIs

[Leif Lindholm]

On Tue, Sep 13, 2022 at 13:17:34 +0700, Nhi Pham wrote:
> This is to reflect the new APIs added to edk2/OemMiscLib library.
> 
> Signed-off-by: Nhi Pham 

Matching my comment on OemMiscLibNull - could you use
PcdSystemBiosRelease and PcdEmbeddedControllerFirmwareRelease here?

/
Leif

> ---
>  Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf |  3 ++
>  Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c   | 42 
>  2 files changed, 45 insertions(+)
> 
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf 
> b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> index 04a07a55cee9..94e368e50a3c 100644
> --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.inf
> @@ -34,6 +34,9 @@ [LibraryClasses]
>IoLib
>PcdLib
>  
> +[Guids]
> +  gZeroGuid
> +
>  [Pcd]
>gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress
>  
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c 
> b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> index 326bb56bcfa3..f14c18ef0874 100644
> --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> @@ -9,6 +9,7 @@
>  **/
>  
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -330,3 +331,44 @@ OemGetChassisNumPowerCords (
>  {
>return 1;
>  }
> +
> +/**
> +  Fetches the system UUID.
> +
> +  @param[out] SystemUuid The pointer to the buffer to store the System 
> UUID.
> +
> +**/
> +VOID
> +EFIAPI
> +OemGetSystemUuid (
> +  OUT GUID  *SystemUuid
> +  )
> +{
> +  CopyGuid (SystemUuid, &gZeroGuid);
> +}
> +
> +/** Fetches the BIOS release.
> +
> +  @return The BIOS release.
> +**/
> +UINT16
> +EFIAPI
> +OemGetBiosRelease (
> +  VOID
> +  )
> +{
> +  return 0x;
> +}
> +
> +/** Fetches the embedded controller firmware release.
> +
> +  @return The embedded controller firmware release.
> +**/
> +UINT16
> +EFIAPI
> +OemGetEmbeddedControllerFirmwareRelease (
> +  VOID
> +  )
> +{
> +  return 0x;
> +}
> -- 
> 2.25.1
> 


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Re: [edk2-devel] [edk2-platforms][PATCH 2/2] SbsaQemu/OemMiscLib: Fix typo of "AssetTagType02"

[Leif Lindholm]

On Tue, Sep 13, 2022 at 13:17:35 +0700, Nhi Pham wrote:
> This fixes the typo of AssetTagType02 according to the recent changes
> from OemMiscLib.h in the edk2.
> 
> Signed-off-by: Nhi Pham 

Reviewed-by: Leif Lindholm 

> ---
>  Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c 
> b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> index f14c18ef0874..a4b40bb8c6de 100644
> --- a/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> +++ b/Platform/Qemu/SbsaQemu/OemMiscLib/OemMiscLib.c
> @@ -201,7 +201,7 @@ OemUpdateSmbiosInfo (
>  case FamilyType01:
>String = (CHAR16*)PcdGetPtr (PcdSystemFamily);
>break;
> -case AssertTagType02:
> +case AssetTagType02:
>String = (CHAR16*)PcdGetPtr (PcdBaseBoardAssetTag);
>break;
>  case SerialNumberType02:
> -- 
> 2.25.1
> 


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Re: [edk2-devel] [PATCH v3 6/6] ArmPkg/SmbiosMiscDxe: Get SMBIOS information from OemMiscLib

[Leif Lindholm]

On Tue, Sep 13, 2022 at 13:19:47 +0700, Nhi Pham wrote:
> From: Minh Nguyen 
> 
> In some scenarios, the information of Bios Version, Bios Release
> and Embedded Controller Firmware Release are fetched during UEFI
> booting. This patch supports updating those fields dynamically
> when the PCDs are empty.
> 
> Signed-off-by: Nhi Pham 
> Reviewed-by: Rebecca Cran 
> Reviewed-by: Sami Mujawar 
> Acked-by: Ard Biesheuvel 
> ---
>  ArmPkg/Include/Library/OemMiscLib.h   | 21 
> +
>  ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c   | 28 
> +
>  ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c | 32 
> +---
>  3 files changed, 70 insertions(+), 11 deletions(-)
> 
> diff --git a/ArmPkg/Include/Library/OemMiscLib.h 
> b/ArmPkg/Include/Library/OemMiscLib.h
> index 1936619d9b5b..541274999e5c 100644
> --- a/ArmPkg/Include/Library/OemMiscLib.h
> +++ b/ArmPkg/Include/Library/OemMiscLib.h
> @@ -37,6 +37,7 @@ typedef struct {
>  } OEM_MISC_PROCESSOR_DATA;
>  
>  typedef enum {
> +  BiosVersionType00,
>ProductNameType01,
>SerialNumType01,
>UuidType01,
> @@ -247,4 +248,24 @@ OemGetSystemUuid (
>OUT GUID  *SystemUuid
>);
>  
> +/** Fetches the BIOS release.
> +
> +  @return The BIOS release.
> +**/
> +UINT16
> +EFIAPI
> +OemGetBiosRelease (
> +  VOID
> +  );
> +
> +/** Fetches the embedded controller firmware release.
> +
> +  @return The embedded controller firmware release.
> +**/
> +UINT16
> +EFIAPI
> +OemGetEmbeddedControllerFirmwareRelease (
> +  VOID
> +  );
> +
>  #endif // OEM_MISC_LIB_H_
> diff --git a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c 
> b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
> index 32f6d55c1a9a..788ccab9e8c1 100644
> --- a/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
> +++ b/ArmPkg/Universal/Smbios/OemMiscLibNull/OemMiscLib.c
> @@ -254,3 +254,31 @@ OemGetSystemUuid (
>ASSERT (FALSE);
>CopyGuid (SystemUuid, &gZeroGuid);
>  }
> +
> +/** Fetches the BIOS release.
> +
> +  @return The BIOS release.
> +**/
> +UINT16
> +EFIAPI
> +OemGetBiosRelease (
> +  VOID
> +  )
> +{
> +  ASSERT (FALSE);
> +  return 0x;

This is a change in behaviour.
The pre-existing behaviour would be preserved by returning the value
of PcdGet16 (PcdSystemBiosRelease), which defaults to 0x.

> +}
> +
> +/** Fetches the embedded controller firmware release.
> +
> +  @return The embedded controller firmware release.
> +**/
> +UINT16
> +EFIAPI
> +OemGetEmbeddedControllerFirmwareRelease (
> +  VOID
> +  )
> +{
> +  ASSERT (FALSE);
> +  return 0x;

Same as above, but PcdEmbeddedControllerFirmwareRelease.

No other comments on this set.
(Feel free to see that as Acked-by: Leif Lindholm 
for 1-5/6, but you already have the tags you need for those.)

/
Leif

> +}
> diff --git 
> a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c 
> b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c
> index b49c4b754cab..e9106a8a2fec 100644
> --- a/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c
> +++ b/ArmPkg/Universal/Smbios/SmbiosMiscDxe/Type00/MiscBiosVendorFunction.c
> @@ -1,5 +1,6 @@
>  /** @file
>  
> +  Copyright (c) 2022, Ampere Computing LLC. All rights reserved.
>Copyright (c) 2021, NUVIA Inc. All rights reserved.
>Copyright (c) 2009, Intel Corporation. All rights reserved.
>Copyright (c) 2015, Hisilicon Limited. All rights reserved.
> @@ -13,6 +14,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  
> @@ -191,11 +193,11 @@ SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor) {
>  TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
>  HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Version, NULL);
>} else {
> -Version = (CHAR16 *)PcdGetPtr (PcdFirmwareVersionString);
> -if (StrLen (Version) > 0) {
> -  TokenToUpdate = STRING_TOKEN (STR_MISC_BIOS_VERSION);
> -  HiiSetString (mSmbiosMiscHiiHandle, TokenToUpdate, Version, NULL);
> -}
> +  OemUpdateSmbiosInfo (
> +mSmbiosMiscHiiHandle,
> +STRING_TOKEN (STR_MISC_BIOS_VERSION),
> +BiosVersionType00
> +);
>}
>  
>Char16String = GetBiosReleaseDate ();
> @@ -251,13 +253,21 @@ SMBIOS_MISC_TABLE_FUNCTION (MiscBiosVendor) {
>  }
>}
>  
> -  SmbiosRecord->SystemBiosMajorRelease = (UINT8)(PcdGet16 
> (PcdSystemBiosRelease) >> 8);
> -  SmbiosRecord->SystemBiosMinorRelease = (UINT8)(PcdGet16 
> (PcdSystemBiosRelease) & 0xFF);
> +  if (PcdGet16 (PcdSystemBiosRelease) != 0x) {
> +SmbiosRecord->SystemBiosMajorRelease = (UINT8)(PcdGet16 
> (PcdSystemBiosRelease) >> 8);
> +SmbiosRecord->SystemBiosMinorRelease = (UINT8)(PcdGet16 
> (PcdSystemBiosRelease) & 0xFF);
> +  } else {
> +SmbiosRecord->SystemBiosMajorRelease = (UINT8)(OemGetBiosRelease () >> 
> 8);
> +SmbiosRecord->SystemBiosMinorRelease = (UINT8)(OemGetBiosRelease () & 
>

Re: [edk2-devel][edk2-platforms][PATCH V3 0/4] QemuOpenBoardPkg: Add QemuOpenBoardPkg

[Leif Lindholm]

We appear to be missing a Maintainers.txt entry for this new package.
Could someone cook one up?

/
Leif

On Wed, Sep 14, 2022 at 20:14:27 +, Oram, Isaac W wrote:
> Series pushed as 9a7234827f..f4679715a4
> 
> -Original Message-
> From: Kinney, Michael D  
> Sent: Tuesday, September 13, 2022 2:51 PM
> To: Oram, Isaac W ; Theo Jehl ; 
> devel@edk2.groups.io; Kinney, Michael D 
> Cc: Leif Lindholm ; Pedro Falcato 
> ; Gerd Hoffmann ; Stefan Hajnoczi 
> 
> Subject: RE: [edk2-devel][edk2-platforms][PATCH V3 0/4] QemuOpenBoardPkg: Add 
> QemuOpenBoardPkg
> 
> Series Acked-by: Michael D Kinney 
> 
> > -Original Message-
> > From: Oram, Isaac W 
> > Sent: Tuesday, September 13, 2022 2:46 PM
> > To: Theo Jehl ; devel@edk2.groups.io
> > Cc: Leif Lindholm ; Kinney, Michael D 
> > ; Pedro Falcato ; 
> > Gerd Hoffmann ; Stefan Hajnoczi 
> > 
> > Subject: RE: [edk2-devel][edk2-platforms][PATCH V3 0/4] 
> > QemuOpenBoardPkg: Add QemuOpenBoardPkg
> > 
> > Series Reviewed-by: Isaac Oram 
> > 
> > -Original Message-
> > From: Theo Jehl 
> > Sent: Tuesday, September 13, 2022 2:32 PM
> > To: devel@edk2.groups.io
> > Cc: Leif Lindholm ; Kinney, Michael D 
> > ; Oram, Isaac W ; 
> > Pedro Falcato ; Gerd Hoffmann 
> > ; Stefan Hajnoczi 
> > Subject: [edk2-devel][edk2-platforms][PATCH V3 0/4] QemuOpenBoardPkg: 
> > Add QemuOpenBoardPkg
> > 
> > QemuOpenBoardPkg adds a MinPlatform port to Qemu x86_64 It can boots 
> > UEFI Linux and Windows, and works on PIIX4 and Q35 This board port provides 
> > a simple starting place for investigating edk2 and MinPlatform Arch.
> > Currently we implement up to stage 4 of the MinPlatform spec and can boot 
> > Windows/Linux.
> > 
> > V2 splits the package into several commits.
> > Each commit corresponding to a MinPlatform architecture stage.
> > 
> > The V3 removes specials characters in "Theo" from file headers.
> > Cleaned up whitespace, punctuation, commenting to better match coding 
> > style and conventions Fixed Visual Studio build issue converting UINT64 to 
> > UINT32.
> > Fixed build issues related to sync with latest master.
> > 
> > Cc: Leif Lindholm 
> > Cc: Michael D Kinney 
> > Cc: Isaac Oram 
> > Cc: Pedro Falcato 
> > Cc: Gerd Hoffmann 
> > Cc: Stefan Hajnoczi 
> > 
> > Signed-off-by: Theo Jehl 
> > 
> > Theo Jehl (4):
> >   QemuOpenBoardPkg: Add QemuOpenBoardPkg
> >   QemuOpenBoardPkg: Enable stage 2
> >   QemuOpenBoardPkg: Enable stage 3
> >   QemuOpenBoardPkg: Enable stage 4
> > 
> >  .../QemuOpenBoardPkg/QemuOpenBoardPkg.dec |  33 ++
> >  .../Include/Dsc/Stage1.dsc.inc|  55 +++
> >  .../Include/Dsc/Stage2.dsc.inc|  31 ++
> >  .../Include/Dsc/Stage3.dsc.inc| 101 ++
> >  .../Include/Dsc/Stage4.dsc.inc|  56 +++
> >  .../QemuOpenBoardPkg/QemuOpenBoardPkg.dsc | 169 +
> >  .../QemuOpenBoardPkg/QemuOpenBoardPkg.fdf | 328 ++
> >  .../BoardBootManagerLib.inf   |  39 +++
> >  .../Library/BoardInitLib/BoardInitLib.inf |  29 ++
> >  .../Library/PeiReportFvLib/PeiReportFvLib.inf |  63   
> > .../Library/PlatformSecLib/PlatformSecLib.inf |  49 +++
> >  .../QemuOpenFwCfgLib/QemuOpenFwCfgLib.inf |  23 ++
> >  .../PlatformInitPei/PlatformInitPei.inf   |  59 
> >  .../Include/Library/QemuOpenFwCfgLib.h| 105 ++
> >  .../PlatformInitPei/PlatformInit.h|  59 
> >  .../BoardBootManagerLib/BoardBootManager.c| 105 ++
> >  .../Library/BoardInitLib/BoardInitLib.c   | 231 
> >  .../Library/PeiReportFvLib/PeiReportFvLib.c   | 285 +++
> >  .../Library/PlatformSecLib/PlatformSecLib.c   | 140 
> >  .../QemuOpenFwCfgLib/QemuOpenFwCfgLib.c   | 136 
> >  .../QemuOpenBoardPkg/PlatformInitPei/Cpu.c|  64 
> >  .../QemuOpenBoardPkg/PlatformInitPei/Memory.c | 254 ++
> >  .../QemuOpenBoardPkg/PlatformInitPei/Pci.c|  70 
> >  .../QemuOpenBoardPkg/PlatformInitPei/Pcie.c   | 106 ++
> >  .../PlatformInitPei/PlatformInit.c|  75 
> >  .../Include/Fdf/FlashMap.fdf.inc  |  94 +
> >  .../Library/PlatformSecLib/Ia32/SecEntry.nasm | 117 +++
> >  Platform/Qemu/QemuOpenBoardPkg/README.md  |  53 +++
> >  28 files changed, 2929 insertions(+)
> >  create mode 100644 
> > Platform/Qemu/QemuOpenBoardPkg/QemuOpenBoardPkg.dec
> >  create mode 100644 
> > Platform/Qemu/QemuOpenBoardPkg/Include/Dsc/Stage1.dsc.inc
> >  create mode 100644 
> > Platform/Qemu/QemuOpenBoardPkg/Include/Dsc/Stage2.dsc.inc
> >  create mode 100644 
> > Platform/Qemu/QemuOpenBoardPkg/Include/Dsc/Stage3.dsc.inc
> >  create mode 100644 
> > Platform/Qemu/QemuOpenBoardPkg/Include/Dsc/Stage4.dsc.inc
> >  create mode 100644 
> > Platform/Qemu/QemuOpenBoardPkg/QemuOpenBoardPkg.dsc
> >  create mode 100644 
> > Platform/Qemu/QemuOpenBoardPkg/QemuOpenBoardPkg.fdf
> >  create mode 100644 
> > Platform/Qemu/QemuOpenBoardPkg/Library/BoardBootManagerLi

Re: [edk2-devel] [PATCH EDK2 v1 1/1] CryptoPkg/BaseCryptLib:Remove redundant init

[Xiaoyu Lu]

Reviewed-by: Xiaoyu Lu 

-Original Message-
From: Wenyi Xie  
Sent: Thursday, September 15, 2022 5:26 PM
To: devel@edk2.groups.io; Yao, Jiewen ; Wang, Jian J 
; Lu, Xiaoyu1 ; Jiang, Guomin 

Cc: songdongku...@huawei.com; xiewen...@huawei.com
Subject: [PATCH EDK2 v1 1/1] CryptoPkg/BaseCryptLib:Remove redundant init

CertCtx is used to be defined as a struct and ZeroMem is called to init this 
struct. But now CertCtx is defined as a point, so use ZeroMem (&CertCtx, sizeof 
(CertCtx)) is not correct any more.

Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Xiaoyu Lu 
Cc: Guomin Jiang 
Signed-off-by: Wenyi Xie 
---
 CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c 
b/CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c
index 3336d2f60a6a..f8028181e47f 100644
--- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c
+++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c
@@ -502,8 +502,6 @@ Pkcs7GetCertificatesList (
   OldBuf   = NULL;
   Signers  = NULL;
 
-  ZeroMem (&CertCtx, sizeof (CertCtx));
-
   //
   // Parameter Checking
   //
--
2.20.1.windows.1



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[edk2-devel] [PATCH EDK2 v1 0/1] CryptoPkg/BaseCryptLib:Remove redundant init

[wenyi,xie via groups.io]

Main Changes :
1.Remove redundant memory init.

Wenyi Xie (1):
  CryptoPkg/BaseCryptLib:Remove redundant init

 CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c | 2 --
 1 file changed, 2 deletions(-)

-- 
2.20.1.windows.1



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[edk2-devel] [PATCH EDK2 v1 1/1] CryptoPkg/BaseCryptLib:Remove redundant init

[wenyi,xie via groups.io]

CertCtx is used to be defined as a struct and ZeroMem is called to
init this struct. But now CertCtx is defined as a point, so use
ZeroMem (&CertCtx, sizeof (CertCtx)) is not correct any more.

Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Xiaoyu Lu 
Cc: Guomin Jiang 
Signed-off-by: Wenyi Xie 
---
 CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c 
b/CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c
index 3336d2f60a6a..f8028181e47f 100644
--- a/CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c
+++ b/CryptoPkg/Library/BaseCryptLib/Pk/CryptPkcs7VerifyCommon.c
@@ -502,8 +502,6 @@ Pkcs7GetCertificatesList (
   OldBuf   = NULL;
   Signers  = NULL;
 
-  ZeroMem (&CertCtx, sizeof (CertCtx));
-
   //
   // Parameter Checking
   //
-- 
2.20.1.windows.1



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Re: [edk2-devel] [PATCH v2 30/34] MdeModulePkg/Logo: Add LoongArch64 architecture.

[Gao, Zhichao]

Reviewed-by: Zhichao Gao 

Thanks,
Zhichao

> -Original Message-
> From: Chao Li 
> Sent: Wednesday, September 14, 2022 5:42 PM
> To: devel@edk2.groups.io
> Cc: Gao, Zhichao ; Ni, Ray 
> Subject: [PATCH v2 30/34] MdeModulePkg/Logo: Add LoongArch64
> architecture.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053
> 
> Add LoongArch64 architecture to the Logo.
> 
> Cc: Zhichao Gao 
> Cc: Ray Ni 
> 
> Signed-off-by: Chao Li 
> ---
>  MdeModulePkg/Logo/Logo.inf | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/MdeModulePkg/Logo/Logo.inf b/MdeModulePkg/Logo/Logo.inf
> index 70a66cae98..294482ccdc 100644
> --- a/MdeModulePkg/Logo/Logo.inf
> +++ b/MdeModulePkg/Logo/Logo.inf
> @@ -3,6 +3,7 @@
>  # #  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. #
> Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.+#  Copyright (c) 2022, Loongson Technology Corporation
> Limited. All rights reserved.  # #  SPDX-License-Identifier: BSD-2-Clause-
> Patent@@ -21,7 +22,7 @@
>  # # The following information is for reference only and not required by the
> build tools. #-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64
> RISCV64+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64
> RISCV64 LOONGARCH64 #  [Binaries]--
> 2.27.0



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Re: [edk2-devel] [PATCH v2 10/34] ShellPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Gao, Zhichao]

Reviewed-by: Zhichao Gao  

Please add Mike's R-B. If the patches are not changed, you can keep the 
received R-B so the maintainers/reviewers can avoid review the same content 
again.

Thanks,
Zhichao

> -Original Message-
> From: Chao Li 
> Sent: Wednesday, September 14, 2022 5:36 PM
> To: devel@edk2.groups.io
> Cc: Ni, Ray ; Gao, Zhichao 
> Subject: [PATCH v2 10/34] ShellPkg: Add LOONGARCH64 architecture for
> EDK2 CI.
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053
> 
> Add LOONGARCH64 architecture to ShellPkg for EDK2 CI testing.
> 
> Cc: Ray Ni 
> Cc: Zhichao Gao 
> 
> Signed-off-by: Chao Li 
> ---
>  ShellPkg/ShellPkg.dsc | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc index
> 38fde3dc71..dd0d88603f 100644
> --- a/ShellPkg/ShellPkg.dsc
> +++ b/ShellPkg/ShellPkg.dsc
> @@ -4,6 +4,7 @@
>  # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved. #
> Copyright (c) 2018 - 2020, Arm Limited. All rights reserved. # Copyright 
> (c)
> 2020, Hewlett Packard Enterprise Development LP. All rights
> reserved.+# Copyright (c) 2022, Loongson Technology Corporation
> Limited. All rights reserved. # #SPDX-License-Identifier: 
> BSD-2-Clause-
> Patent #@@ -15,7 +16,7 @@
>PLATFORM_VERSION   = 1.02   DSC_SPECIFICATION  =
> 0x00010006   OUTPUT_DIRECTORY   = Build/Shell-
> SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64+
> SUPPORTED_ARCHITECTURES=
> IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64   BUILD_TARGETS
> = DEBUG|RELEASE|NOOPT   SKUID_IDENTIFIER   = DEFAULT --
> 2.27.0



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[edk2-devel] [PATCH] Maintainers.txt: Update email address

[Nickle Wang via groups.io]

Update Nickle's email address from csie.io to nvidia.com for those
packages which are reviewed by Nickle. Per suggestion from Abner,
change Nickle from reviewer to maintainer for RedfishPkg.

Cc: Andrew Fish 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
Cc: Abner Chang 
Signed-off-by: Nickle Wang 
---
 Maintainers.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt
index 73ce13126b..390f084c03 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -197,7 +197,7 @@ S: Maintained
 EmulatorPkg: Redfish-related modules
 F: EmulatorPkg/*Redfish*
 M: Abner Chang  [changab]
-R: Nickle Wang  [nicklela]
+M: Nickle Wang  [nicklela]
 
 FatPkg
 F: FatPkg/
@@ -544,7 +544,7 @@ R: Ankit Sinha  [ankit13s]
 RedfishPkg: Redfish related modules
 F: RedfishPkg/
 M: Abner Chang  [changab]
-R: Nickle Wang  [nicklela]
+M: Nickle Wang  [nicklela]
 
 SecurityPkg
 F: SecurityPkg/
-- 
2.34.1



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Re: [edk2-devel] [PATCH v2 2/3] DynamicTablesPkg: AML Code generation to add _CPC entries

[PierreGondois]

Hello Jeff,
This patch looks good to me:
Reviewed-by: Pierre Gondois 

On 9/14/22 23:34, Jeff Brasen wrote:

_CPC entries can describe CPU performance information.
The object is described in ACPI 6.4 s8.4.7.1.
"_CPC (Continuous Performance Control)".

Add AmlCreateCpcNode() helper function to add _CPC entries to an
existing CPU object.

Signed-off-by: Jeff Brasen 
---
  .../Include/Library/AmlLib/AmlLib.h   | 156 +
  .../Common/AmlLib/CodeGen/AmlCodeGen.c| 543 ++
  2 files changed, 699 insertions(+)

diff --git a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h 
b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
index 39968660f2..3fafa6b0e8 100644
--- a/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
+++ b/DynamicTablesPkg/Include/Library/AmlLib/AmlLib.h
@@ -1336,6 +1336,162 @@ AmlAddNameIntegerPackage (
IN AML_OBJECT_NODE_HANDLE  PackageNode
);
  
+/** Create a _CPC node.

+
+  Creates and optionally adds the following node
+   Name(_CPC, Package()
+   {
+NumEntries,  // Integer
+Revision,// Integer
+HighestPerformance,  // Integer or Buffer (Resource 
Descriptor)
+NominalPerformance,  // Integer or Buffer (Resource 
Descriptor)
+LowestNonlinearPerformance,  // Integer or Buffer (Resource 
Descriptor)
+LowestPerformance,   // Integer or Buffer (Resource 
Descriptor)
+GuaranteedPerformanceRegister,   // Buffer (Resource Descriptor)
+DesiredPerformanceRegister , // Buffer (Resource Descriptor)
+MinimumPerformanceRegister , // Buffer (Resource Descriptor)
+MaximumPerformanceRegister , // Buffer (Resource Descriptor)
+PerformanceReductionToleranceRegister,   // Buffer (Resource Descriptor)
+TimeWindowRegister,  // Buffer (Resource Descriptor)
+CounterWraparoundTime,   // Integer or Buffer (Resource 
Descriptor)
+ReferencePerformanceCounterRegister, // Buffer (Resource Descriptor)
+DeliveredPerformanceCounterRegister, // Buffer (Resource Descriptor)
+PerformanceLimitedRegister,  // Buffer (Resource Descriptor)
+CPPCEnableRegister   // Buffer (Resource Descriptor)
+AutonomousSelectionEnable,   // Integer or Buffer (Resource 
Descriptor)
+AutonomousActivityWindowRegister,// Buffer (Resource Descriptor)
+EnergyPerformancePreferenceRegister, // Buffer (Resource Descriptor)
+ReferencePerformance // Integer or Buffer (Resource 
Descriptor)
+LowestFrequency, // Integer or Buffer (Resource 
Descriptor)
+NominalFrequency // Integer or Buffer (Resource 
Descriptor)
+  })
+
+  If resource buffer is NULL then integer will be used.
+
+  Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)
+
+  @ingroup CodeGenApis
+
+  @param [in]  HighestPerformanceBuffer   If provided, buffer that 
indicates the highest level
+  of performance the 
processor.
+  @param [in]  HighestPerformanceInteger  Indicates the highest 
level of performance the processor,
+  used if buffer is NULL.
+  @param [in]  NominalPerformanceBuffer   If provided buffer that 
indicates the highest sustained
+  performance level of the 
processor.
+  @param [in]  NominalPerformanceInteger  Indicates the highest 
sustained performance level
+  of the processor, used 
if buffer is NULL.
+  @param [in]  LowestNonlinearPerformanceBuffer   If provided, buffer that 
indicates the lowest performance level
+  of the processor with 
non-linear power savings.
+  @param [in]  LowestNonlinearPerformanceInteger  Indicates the lowest 
performance level of the processor with
+  non-linear power 
savings, used if buffer is NULL.
+  @param [in]  LowestPerformanceBufferIf provided, buffer that 
indicates the
+  lowest performance level 
of the processor.
+  @param [in]  LowestPerformanceInteger   Indicates the lowest 
performance level of the processor,
+  used if buffer is NULL.
+  @param [in]  GuaranteedPerformanceRegister  If provided, Guaranteed 
Performance Register Buffer.
+  @param [in]  DesiredPerformanceRegister If provided, Desired 
Performance Register Buffer.
+  @param [in]  MinimumPerformanceRegister If provided, Minimum 
Performance Register Buffer.
+  @param [in]

Re: [edk2-devel] [PATCH v2 3/3] DynamicTablesPkg: SSDT CPU _CPC generator

[PierreGondois]

Hello Jeff,
Just one remark:

On 9/14/22 23:34, Jeff Brasen wrote:

Add code to use a token attached to GICC to generate _CPC object on cpus.

Signed-off-by: Jeff Brasen 
---
  .../SsdtCpuTopologyGenerator.c| 223 +-
  1 file changed, 217 insertions(+), 6 deletions(-)

diff --git 
a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
 
b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c
index 8561f48e1f..56741e7b58 100644


[snip]


@@ -934,10 +1134,11 @@ CreateTopologyFromGicC (
INAML_OBJECT_NODE_HANDLEScopeNode
)
  {
-  EFI_STATUSStatus;
-  CM_ARM_GICC_INFO  *GicCInfo;
-  UINT32GicCInfoCount;
-  UINT32Index;
+  EFI_STATUS  Status;
+  CM_ARM_GICC_INFO*GicCInfo;
+  UINT32  GicCInfoCount;
+  UINT32  Index;
+  AML_OBJECT_NODE_HANDLE  CpuNode;
  
ASSERT (Generator != NULL);

ASSERT (CfgMgrProtocol != NULL);
@@ -961,12 +1162,22 @@ CreateTopologyFromGicC (
 ScopeNode,
 &GicCInfo[Index],
 Index,
-   NULL
+   &CpuNode
 );
  if (EFI_ERROR (Status)) {
ASSERT (0);
break;
  }
+
+// If a CPC info is associated with the
+// GicCinfo, create an _CPC method returning them.
+if (GicCInfo->CpcToken != CM_NULL_TOKEN) {
+  Status = CreateAmlCpcNode (Generator, CfgMgrProtocol, &GicCInfo[Index], 
CpuNode);
+  if (EFI_ERROR (Status)) {
+ASSERT_EFI_ERROR (Status);
+return Status;


Could it be replaced with a 'break' just to be consistent in the loop ?


+  }
+}
} // for
  
return Status;



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Re: [edk2-devel] [PATCH v2 1/3] DynamicTablesPkg: Add CM_ARM_CPC_INFO object

[PierreGondois]

Hello Jeff,
Just one remark:

On 9/14/22 23:34, Jeff Brasen wrote:

Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects.
This allows to describe CPC information, as described in ACPI 6.4,
s8.4.7.1 "_CPC (Continuous Performance Control)".

Signed-off-by: Jeff Brasen 
---
  .../Include/ArmNameSpaceObjects.h | 148 --
  .../ConfigurationManagerObjectParser.c|  79 ++
  2 files changed, 210 insertions(+), 17 deletions(-)



[snip]


diff --git 
a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
 
b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
index c1b21d24a4..e2c608443b 100644
--- 
a/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
+++ 
b/DynamicTablesPkg/Library/Common/TableHelperLib/ConfigurationManagerObjectParser.c
@@ -423,6 +423,83 @@ STATIC CONST CM_OBJ_PARSER  CmPciInterruptMapInfoParser[] 
= {
  ARRAY_SIZE (CmArmGenericInterruptParser) },
  };
  
+/** A parser for EArmObjCpcInfo.

+*/
+STATIC CONST CM_OBJ_PARSER  CmArmCpcInfoParser[] = {
+  { "HighestPerformanceBuffer",  sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),


Could it be move to 6_4 aswell ?


+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "HighestPerformanceInteger", 4,  
"0x%llx",  NULL },
+  { "NominalPerformanceBuffer",  sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "NominalPerformanceInteger", 4,  
"0x%llx",  NULL },
+  { "LowestNonlinearPerformanceBuffer",  sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "LowestNonlinearPerformanceInteger", 4,  
"0x%llx",  NULL },
+  { "LowestPerformanceBuffer",   sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "LowestPerformanceInteger",  4,  
"0x%llx",  NULL },
+  { "GuaranteedPerformanceRegister", sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "DesiredPerformanceRegister",sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "MinimumPerformanceRegister",sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "MaximumPerformanceRegister",sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "PerformanceReductionToleranceRegister", sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "TimeWindowRegister",sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "CounterWraparoundTimeBuffer",   sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "CounterWraparoundTimeInteger",  4,  
"0x%llx",  NULL },
+  { "ReferencePerformanceCounterRegister",   sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "DeliveredPerformanceCounterRegister",   sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "PerformanceLimitedRegister",sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "CPPCEnableRegister",sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "AutonomousSelectionEnableBuffer",   sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "AutonomousSelectionEnableInteger",  4,  
"0x%llx",  NULL },
+  { "AutonomousActivityWindowRegister",  sizeof 
(EFI_ACPI_6_3_GENERIC_ADDRESS_STRUCTURE),
+NULL, NULL, AcpiGenericAddressParser,
+ARRAY_SIZE (AcpiGenericAddressParser) },
+  { "EnergyPer

Re: [edk2-devel] 回复: edk2-devel] [PATCH v2 34/34] BaseTools: Add LoongArch64 binding.

[Chao Li]

Liming,
Ok, in V3, I will put this patch together with BaseTools changes.

Thanks,
Chao


On 9月 15 2022, at 2:34 下午, "gaoliming"  wrote:
> Chao:
> This change should be placed together with other changes in BaseTools. I
> mean their commits can be placed together.
>
> The code change is good to me. Reviewed-by: Liming Gao  com.cn>
>
> Thanks
> Liming
> > -邮件原件-
> > 发件人: devel@edk2.groups.io  代表 Chao Li
> > 发送时间: 2022年9月14日 17:43
> > 收件人: devel@edk2.groups.io
> > 抄送: Bob Feng ; Liming Gao
> > ; Yuwei Chen ; Baoqi
> > Zhang 
> > 主题: [edk2-devel] [PATCH v2 34/34] BaseTools: Add LoongArch64 binding.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053
> >
> > Add LoongArch64 ProcessorBin.h and add LoongArch to Makefiles.
> >
> > Cc: Bob Feng 
> > Cc: Liming Gao 
> > Cc: Yuwei Chen 
> >
> > Signed-off-by: Chao Li 
> > Co-authored-by: Baoqi Zhang 
> > ---
> > BaseTools/Source/C/GNUmakefile | 3 +
> > .../C/Include/LoongArch64/ProcessorBind.h | 80
> > +++
> > 2 files changed, 83 insertions(+)
> > create mode 100644
> > BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h
> >
> > diff --git a/BaseTools/Source/C/GNUmakefile
> > b/BaseTools/Source/C/GNUmakefile
> > index 8c191e0c38..5275f657ef 100644
> > --- a/BaseTools/Source/C/GNUmakefile
> > +++ b/BaseTools/Source/C/GNUmakefile
> > @@ -29,6 +29,9 @@ ifndef HOST_ARCH
> > ifneq (,$(findstring riscv64,$(uname_m)))
> >
> > HOST_ARCH=RISCV64
> >
> > endif
> >
> > + ifneq (,$(findstring loongarch64,$(uname_m)))
> >
> > + HOST_ARCH=LOONGARCH64
> >
> > + endif
> >
> > ifndef HOST_ARCH
> >
> > $(info Could not detected HOST_ARCH from uname results)
> >
> > $(error HOST_ARCH is not defined!)
> >
> > diff --git a/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h
> > b/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h
> > new file mode 100644
> > index 00..0267859dee
> > --- /dev/null
> > +++ b/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h
> > @@ -0,0 +1,80 @@
> > +/** @file
> >
> > + Processor or Compiler specific defines and types for LoongArch
> >
> > +
> >
> > + Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> > reserved.
> >
> > +
> >
> > + SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > +
> >
> > +**/
> >
> > +#ifndef PROCESSOR_BIND_H_
> >
> > +#define PROCESSOR_BIND_H_
> >
> > +
> >
> > +//
> >
> > +// Define the processor type so other code can make processor based
> > choices
> >
> > +//
> >
> > +#define MDE_CPU_LOONGARCH64
> >
> > +
> >
> > +#define EFIAPI
> >
> > +
> >
> > +//
> >
> > +// Make sure we are using the correct packing rules per EFI specification
> >
> > +//
> >
> > +#ifndef __GNUC__
> >
> > +#pragma pack()
> >
> > +#endif
> >
> > +
> >
> > +//
> >
> > +// Use ANSI C 2000 stdint.h integer width declarations
> >
> > +//
> >
> > +#include 
> >
> > +typedef uint8_t BOOLEAN;
> >
> > +typedef int8_t INT8;
> >
> > +typedef uint8_t UINT8;
> >
> > +typedef int16_t INT16;
> >
> > +typedef uint16_t UINT16;
> >
> > +typedef int32_t INT32;
> >
> > +typedef uint32_t UINT32;
> >
> > +typedef int64_t INT64;
> >
> > +typedef uint64_t UINT64;
> >
> > +typedef char CHAR8;
> >
> > +typedef uint16_t CHAR16;
> >
> > +
> >
> > +//
> >
> > +// Unsigned value of native width. (4 bytes on supported 32-bit
> processor
> > instructions,
> >
> > +// 8 bytes on supported 64-bit processor instructions)
> >
> > +//
> >
> > +typedef UINT64 UINTN;
> >
> > +
> >
> > +//
> >
> > +// Signed value of native width. (4 bytes on supported 32-bit processor
> > instructions,
> >
> > +// 8 bytes on supported 64-bit processor instructions)
> >
> > +//
> >
> > +typedef INT64 INTN;
> >
> > +
> >
> > +//
> >
> > +// Processor specific defines
> >
> > +//
> >
> > +
> >
> > +//
> >
> > +// A value of native width with the highest bit set.
> >
> > +//
> >
> > +#define MAX_BIT 0x8000ULL
> >
> > +//
> >
> > +// A value of native width with the two highest bits set.
> >
> > +//
> >
> > +#define MAX_2_BITS 0xC000ULL
> >
> > +
> >
> > +#if defined (__GNUC__)
> >
> > +//
> >
> > +// For GNU assembly code, .global or .globl can declare global symbols.
> >
> > +// Define this macro to unify the usage.
> >
> > +//
> >
> > +#define ASM_GLOBAL .globl
> >
> > +#endif
> >
> > +
> >
> > +//
> >
> > +// The stack alignment required for LoongArch
> >
> > +//
> >
> > +#define CPU_STACK_ALIGNMENT 16
> >
> > +
> >
> > +#endif
> >
> > --
> > 2.27.0
> >
> >
> >
> > -=-=-=-=-=-=
> > Groups.io Links: You receive all messages sent to this group.
> > View/Reply Online (#93776): https://edk2.groups.io/g/devel/message/93776
> > Mute This Topic: https://groups.io/mt/93674251/4905953
> > Group Owner: devel+ow...@edk2.groups.io
> > Unsubscribe: https://edk2.groups.io/g/devel/unsub
> > [gaolim...@byosoft.com.cn]
> > -=-=-=-=-=-=
> >
>
>
>
>
>
> 
>



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#93810): https://edk2.groups.io/g/devel/message/93810
M

Re: [edk2-devel] 回复: PATCH v2 17/34] BaseTools: BaseTools changes for LoongArch platform.

[Chao Li]

Liming,
Ok, I will change the commit title in the V3.

Thanks,
Chao


On 9月 15 2022, at 2:30 下午, "gaoliming"  wrote:
> Chao:
> This change is to update BaseTools build tool to support new LoongArch.
> Please update commit message title.
>
> The code change is good to me. Reviewed-by: Liming Gao
> 
>
> Thanks
> Liming
> > -邮件原件-
> > 发件人: Chao Li 
> > 发送时间: 2022年9月14日 17:41
> > 收件人: devel@edk2.groups.io
> > 抄送: Bob Feng ; Liming Gao
> > ; Yuwei Chen ; Baoqi
> > Zhang 
> > 主题: [PATCH v2 17/34] BaseTools: BaseTools changes for LoongArch
> > platform.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053
> >
> > Python code changes for building EDK2 LoongArch platform.
> >
> > Cc: Bob Feng 
> > Cc: Liming Gao 
> > Cc: Yuwei Chen 
> >
> > Signed-off-by: Chao Li 
> > Co-authored-by: Baoqi Zhang 
> > ---
> > BaseTools/Source/Python/Common/DataType.py | 21
> > ++--
> > .../Source/Python/UPT/Library/DataType.py | 24
> > ++-
> > BaseTools/Source/Python/build/buildoptions.py | 3 ++-
> > 3 files changed, 44 insertions(+), 4 deletions(-)
> >
> > diff --git a/BaseTools/Source/Python/Common/DataType.py
> > b/BaseTools/Source/Python/Common/DataType.py
> > index dc4962..48dbf16495 100644
> > --- a/BaseTools/Source/Python/Common/DataType.py
> > +++ b/BaseTools/Source/Python/Common/DataType.py
> > @@ -4,6 +4,7 @@
> > # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
> >
> > # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> >
> > # Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP.
> > All rights reserved.
> >
> > +# Portions Copyright (c) 2022, Loongson Technology Corporation Limited.
> All
> > rights reserved.
> >
> > # SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> >
> >
> > ##
> >
> > @@ -52,10 +53,10 @@ TAB_ARCH_X64 = 'X64'
> > TAB_ARCH_ARM = 'ARM'
> >
> > TAB_ARCH_EBC = 'EBC'
> >
> > TAB_ARCH_AARCH64 = 'AARCH64'
> >
> > -
> >
> > TAB_ARCH_RISCV64 = 'RISCV64'
> >
> > +TAB_ARCH_LOONGARCH64 = 'LOONGARCH64'
> >
> >
> >
> > -ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM,
> > TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_RISCV64,
> > TAB_ARCH_COMMON}
> >
> > +ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM,
> > TAB_ARCH_EBC, TAB_ARCH_AARCH64, TAB_ARCH_RISCV64,
> > TAB_ARCH_LOONGARCH64, TAB_ARCH_COMMON}
> >
> >
> >
> > SUP_MODULE_BASE = 'BASE'
> >
> > SUP_MODULE_SEC = 'SEC'
> >
> > @@ -138,6 +139,7 @@ TAB_SOURCES_X64 = TAB_SOURCES + TAB_SPLIT +
> > TAB_ARCH_X64
> > TAB_SOURCES_ARM = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM
> >
> > TAB_SOURCES_EBC = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC
> >
> > TAB_SOURCES_AARCH64 = TAB_SOURCES + TAB_SPLIT +
> > TAB_ARCH_AARCH64
> >
> > +TAB_SOURCES_LOONGARCH64 = TAB_SOURCES + TAB_SPLIT +
> > TAB_ARCH_LOONGARCH64
> >
> >
> >
> > TAB_BINARIES = 'Binaries'
> >
> > TAB_BINARIES_COMMON = TAB_BINARIES + TAB_SPLIT +
> > TAB_ARCH_COMMON
> >
> > @@ -146,6 +148,7 @@ TAB_BINARIES_X64 = TAB_BINARIES + TAB_SPLIT +
> > TAB_ARCH_X64
> > TAB_BINARIES_ARM = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM
> >
> > TAB_BINARIES_EBC = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC
> >
> > TAB_BINARIES_AARCH64 = TAB_BINARIES + TAB_SPLIT +
> > TAB_ARCH_AARCH64
> >
> > +TAB_BINARIES_LOONGARCH64 = TAB_BINARIES + TAB_SPLIT +
> > TAB_ARCH_LOONGARCH64
> >
> >
> >
> > TAB_INCLUDES = 'Includes'
> >
> > TAB_INCLUDES_COMMON = TAB_INCLUDES + TAB_SPLIT +
> > TAB_ARCH_COMMON
> >
> > @@ -154,6 +157,7 @@ TAB_INCLUDES_X64 = TAB_INCLUDES + TAB_SPLIT +
> > TAB_ARCH_X64
> > TAB_INCLUDES_ARM = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM
> >
> > TAB_INCLUDES_EBC = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC
> >
> > TAB_INCLUDES_AARCH64 = TAB_INCLUDES + TAB_SPLIT +
> > TAB_ARCH_AARCH64
> >
> > +TAB_INCLUDES_LOONGARCH64 = TAB_INCLUDES + TAB_SPLIT +
> > TAB_ARCH_LOONGARCH64
> >
> >
> >
> > TAB_GUIDS = 'Guids'
> >
> > TAB_GUIDS_COMMON = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON
> >
> > @@ -162,6 +166,7 @@ TAB_GUIDS_X64 = TAB_GUIDS + TAB_SPLIT +
> > TAB_ARCH_X64
> > TAB_GUIDS_ARM = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM
> >
> > TAB_GUIDS_EBC = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC
> >
> > TAB_GUIDS_AARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_AARCH64
> >
> > +TAB_GUIDS_LOONGARCH64 = TAB_GUIDS + TAB_SPLIT +
> > TAB_ARCH_LOONGARCH64
> >
> >
> >
> > TAB_PROTOCOLS = 'Protocols'
> >
> > TAB_PROTOCOLS_COMMON = TAB_PROTOCOLS + TAB_SPLIT +
> > TAB_ARCH_COMMON
> >
> > @@ -170,6 +175,7 @@ TAB_PROTOCOLS_X64 = TAB_PROTOCOLS +
> > TAB_SPLIT + TAB_ARCH_X64
> > TAB_PROTOCOLS_ARM = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM
> >
> > TAB_PROTOCOLS_EBC = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC
> >
> > TAB_PROTOCOLS_AARCH64 = TAB_PROTOCOLS + TAB_SPLIT +
> > TAB_ARCH_AARCH64
> >
> > +TAB_PROTOCOLS_LOONGARCH64 = TAB_PROTOCOLS + TAB_SPLIT +
> > TAB_ARCH_LOONGARCH64
> >
> >
> >
> > TAB_PPIS = 'Ppis'
> >
> > TAB_PPIS_COMMON = TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON
> >
> > @@ -178,6 +184,7 @@ TAB_PPIS_X64 = TAB_PPIS + TAB_SPLIT +
> > TAB_ARCH_X64
> > TAB_PPIS

Re: [edk2-devel] 回复: PATCH v2 16/34] BaseTools: BaseTools changes for LoongArch platform.

[Chao Li]

Liming,
Ok, I will change the commit message in the V3.

Thanks,
Chao


On 9月 15 2022, at 2:28 下午, "gaoliming"  wrote:
> Chao:
> This change is to update GCC5 tool chain to support LoongArch. So, the
> commit message title should be updated for GCC5 tool chain.
>
> The code change is good to me. Reviewed-by: Liming Gao  com.cn>
>
> Thanks
> Liming
> > -邮件原件-
> > 发件人: Chao Li 
> > 发送时间: 2022年9月14日 17:40
> > 收件人: devel@edk2.groups.io
> > 抄送: Bob Feng ; Liming Gao
> > ; Yuwei Chen ;
> > Dongyan Qian ; Baoqi Zhang
> > 
> > 主题: [PATCH v2 16/34] BaseTools: BaseTools changes for LoongArch
> > platform.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053
> >
> > BaseTools define template files changes for building EDK2 LoongArch
> > platform.
> >
> > Cc: Bob Feng 
> > Cc: Liming Gao 
> > Cc: Yuwei Chen 
> >
> > Signed-off-by: Chao Li 
> > Co-authored-by: Dongyan Qian 
> > Co-authored-by: Baoqi Zhang 
> > ---
> > BaseTools/Conf/tools_def.template | 54
> > +++
> > 1 file changed, 48 insertions(+), 6 deletions(-)
> >
> > diff --git a/BaseTools/Conf/tools_def.template
> > b/BaseTools/Conf/tools_def.template
> > index 5ed19810b7..9ceadeaa59 100755
> > --- a/BaseTools/Conf/tools_def.template
> > +++ b/BaseTools/Conf/tools_def.template
> > @@ -4,6 +4,7 @@
> > # Portions copyright (c) 2011 - 2019, ARM Ltd. All rights reserved.
> >
> > # Copyright (c) 2015, Hewlett-Packard Development Company, L.P.
> >
> > # (C) Copyright 2020, Hewlett Packard Enterprise Development LP
> >
> > +# Copyright (c) 2022, Loongson Technology Corporation Limited. All
> rights
> > reserved.
> >
> > # Copyright (c) Microsoft Corporation
> >
> > #
> >
> > # SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > @@ -267,7 +268,7 @@ DEFINE DTC_BIN =
> > ENV(DTC_PREFIX)dtc
> > # Intel(r) ACPI Compiler from
> >
> > # https://acpica.org/downloads
> >
> > # GCC5 -Linux,Windows- Requires:
> >
> > -# GCC 5 with LTO support, targeting
> > x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnueabi or
> riscv64-linux-gnu
> >
> > +# GCC 5 with LTO support, targeting
> > x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnueabi, riscv64-linux-gnu
> or
> > loongarch64-linux-gnu
> >
> > # Optional:
> >
> > # Required to build platforms or ACPI
> > tables:
> >
> > # Intel(r) ACPI Compiler from
> >
> > @@ -1852,6 +1853,7 @@ DEFINE GCC_ALL_CC_FLAGS = -g
> > -Os -fshort-wchar -fno-builtin -fno-stri
> > DEFINE GCC_IA32_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS)
> > -m32 -malign-double -freorder-blocks -freorder-blocks-and-partition -O2
> > -mno-stack-arg-probe
> >
> > DEFINE GCC_X64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS)
> > -mno-red-zone -Wno-address -mno-stack-arg-probe
> >
> > DEFINE GCC_ARM_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS)
> > -mlittle-endian -mabi=aapcs -fno-short-enums -funsigned-char
> > -ffunction-sections -fdata-sections -fomit-frame-pointer -Wno-address
> > -mthumb -mfloat-abi=soft -fno-pic -fno-pie
> >
> > +DEFINE GCC_LOONGARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS)
> > -mabi=lp64d -fno-asynchronous-unwind-tables -fno-plt -Wno-address
> > -fno-short-enums -fsigned-char -ffunction-sections -fdata-sections
> >
> > DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access
> >
> > DEFINE GCC_AARCH64_CC_FLAGS = DEF(GCC_ALL_CC_FLAGS)
> > -mlittle-endian -fno-short-enums -fverbose-asm -funsigned-char
> > -ffunction-sections -fdata-sections -Wno-address
> > -fno-asynchronous-unwind-tables -fno-unwind-tables -fno-pic -fno-pie
> > -ffixed-x18
> >
> > DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align
> > -mgeneral-regs-only
> >
> > @@ -1859,12 +1861,15 @@ DEFINE GCC_DLINK_FLAGS_COMMON =
> > -nostdlib --pie
> > DEFINE GCC_DLINK2_FLAGS_COMMON =
> > -Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
> >
> > DEFINE GCC_IA32_X64_DLINK_COMMON =
> > DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
> >
> > DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Wl,--emit-relocs
> > -nostdlib -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT)
> > -Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).
> > map
> >
> > +DEFINE GCC_LOONGARCH64_DLINK_COMMON= -Wl,--emit-relocs
> > -nostdlib -Wl,--gc-sections -u $(IMAGE_ENTRY_POINT)
> > -Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).
> > map
> >
> > DEFINE GCC_ARM_DLINK_FLAGS =
> > DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20
> > -Wl,--pic-veneer
> >
> > DEFINE GCC_AARCH64_DLINK_FLAGS =
> > DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z common-page-size=0x20
> >
> > +DEFINE GCC_LOONGARCH64_DLINK_FLAGS =
> > DEF(GCC_LOONGARCH64_DLINK_COMMON) -z common-page-size=0x20
> >
> > DEFINE GCC_ARM_AARCH64_ASLDLINK_FLAGS =
> > -Wl,--defsym=PECOFF_HEADER_SIZE=0 DEF(GCC_DLINK2_FLAGS_COMMON)
> > -z common-page-size=0x20
> >
> > DEFINE GCC_IA32_X64_ASLDLINK_FLAGS =
> > DEF(GCC_IA32_X64_DLINK_COMMON) --entry _ReferenceAcpiTable -u
> > $(IMAGE_ENTRY_POINT)
> >
> > DEFINE GCC_ARM_ASLDLINK_FLAGS = DEF(GCC_ARM_DLINK_FLAGS)
> > -Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT)
> > DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS)
> >
> > DEFINE GCC

Re: [edk2-devel] 回复: PATCH v2 15/34] BaseTools: BaseTools changes for LoongArch platform.

[Chao Li]

Liming,
Ok, I will change the commit message in the V3.

Thanks,
Chao


On 9月 15 2022, at 2:27 下午, "gaoliming via groups.io" 
 wrote:
> Chao:
> This change is for BaseTools C tools . The commit message can be
> BaseTools: Update GenFw/GenFv to support LoongArch platform.
>
> The code change is good to me. Reviewed-by: Liming Gao  com.cn>
>
> Thanks
> Liming
> > -邮件原件-
> > 发件人: Chao Li 
> > 发送时间: 2022年9月14日 17:40
> > 收件人: devel@edk2.groups.io
> > 抄送: Bob Feng ; Liming Gao
> > ; Yuwei Chen ;
> > Dongyan Qian ; Baoqi Zhang
> > ; Yang Zhou ; Xiaotian
> > Wu 
> > 主题: [PATCH v2 15/34] BaseTools: BaseTools changes for LoongArch
> > platform.
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053
> >
> > C code changes for building EDK2 LoongArch platform.
> >
> > For definitions of PE/COFF and LOONGARCH relocation types, see the
> > "Machine Types" and "Basic Relocation Types" sections of this URL for
> > LOONGARCH values:
> > https://docs.microsoft.com/en-us/windows/win32/debug/pe-format
> >
> > Cc: Bob Feng 
> > Cc: Liming Gao 
> > Cc: Yuwei Chen 
> >
> > Signed-off-by: Chao Li 
> > Co-authored-by: Dongyan Qian 
> > Co-authored-by: Baoqi Zhang 
> > Co-authored-by: Yang Zhou 
> > Co-authored-by: Xiaotian Wu 
> > ---
> > BaseTools/Source/C/Common/BasePeCoff.c | 15 +-
> > BaseTools/Source/C/Common/PeCoffLoaderEx.c | 79 +
> > BaseTools/Source/C/GenFv/GenFvInternalLib.c | 125 +++-
> > BaseTools/Source/C/GenFw/Elf64Convert.c | 293
> > +-
> > BaseTools/Source/C/GenFw/elf_common.h | 94 ++
> > .../C/Include/IndustryStandard/PeImage.h | 57 ++--
> > BaseTools/Source/C/Makefiles/header.makefile | 6 +
> > 7 files changed, 636 insertions(+), 33 deletions(-)
> >
> > diff --git a/BaseTools/Source/C/Common/BasePeCoff.c
> > b/BaseTools/Source/C/Common/BasePeCoff.c
> > index 62fbb2985c..30400d1341 100644
> > --- a/BaseTools/Source/C/Common/BasePeCoff.c
> > +++ b/BaseTools/Source/C/Common/BasePeCoff.c
> > @@ -5,6 +5,7 @@
> > Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
> >
> > Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> >
> > Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP.
> All
> > rights reserved.
> >
> > +Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All
> > rights reserved.
> >
> > SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> >
> >
> > **/
> >
> > @@ -68,6 +69,14 @@ PeCoffLoaderRelocateRiscVImage (
> > IN UINT64 Adjust
> >
> > );
> >
> >
> >
> > +RETURN_STATUS
> >
> > +PeCoffLoaderRelocateLoongArch64Image (
> >
> > + IN UINT16 *Reloc,
> >
> > + IN OUT CHAR8 *Fixup,
> >
> > + IN OUT CHAR8 **FixupData,
> >
> > + IN UINT64 Adjust
> >
> > + );
> >
> > +
> >
> > STATIC
> >
> > RETURN_STATUS
> >
> > PeCoffLoaderGetPeHeader (
> >
> > @@ -184,7 +193,8 @@ Returns:
> > ImageContext->Machine != EFI_IMAGE_MACHINE_ARMT && \
> >
> > ImageContext->Machine != EFI_IMAGE_MACHINE_EBC && \
> >
> > ImageContext->Machine != EFI_IMAGE_MACHINE_AARCH64 && \
> >
> > - ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64) {
> >
> > + ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64 && \
> >
> > + ImageContext->Machine != EFI_IMAGE_MACHINE_LOONGARCH64)
> > {
> >
> > if (ImageContext->Machine == IMAGE_FILE_MACHINE_ARM) {
> >
> > //
> >
> > // There are two types of ARM images. Pure ARM and ARM/Thumb.
> >
> > @@ -815,6 +825,9 @@ Returns:
> > case EFI_IMAGE_MACHINE_RISCV64:
> >
> > Status = PeCoffLoaderRelocateRiscVImage (Reloc, Fixup,
> > &FixupData, Adjust);
> >
> > break;
> >
> > + case EFI_IMAGE_MACHINE_LOONGARCH64:
> >
> > + Status = PeCoffLoaderRelocateLoongArch64Image (Reloc, Fixup,
> > &FixupData, Adjust);
> >
> > + break;
> >
> > default:
> >
> > Status = RETURN_UNSUPPORTED;
> >
> > break;
> >
> > diff --git a/BaseTools/Source/C/Common/PeCoffLoaderEx.c
> > b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
> > index 799f282970..2cc428d733 100644
> > --- a/BaseTools/Source/C/Common/PeCoffLoaderEx.c
> > +++ b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
> > @@ -4,6 +4,7 @@ IA32 and X64 Specific relocation fixups
> > Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
> >
> > Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
> >
> > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights
> > reserved.
> >
> > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rights
> > reserved.
> >
> > SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> >
> >
> > --*/
> >
> > @@ -332,3 +333,81 @@ PeCoffLoaderRelocateArmImage (
> >
> >
> > return RETURN_SUCCESS;
> >
> > }
> >
> > +
> >
> > +/**
> >
> > + Performs a LoongArch specific relocation fixup.
> >
> > +
> >
> > + @param[in] Reloc Pointer to the relocation record.
> >
> > + @param[in, out] Fixup Pointer to the address to fix up.
> >
> > + @param[in, out] FixupData Pointer to a buffer to log the fixups.
> >
> > + @param[in] Adjust The offset to adjust the fixup.
> >
> > +
> >
> > + @return Status code.
> >