[edk2-devel] [PATCH EDK2 v1 1/1] NetworkPkg/Dhcp6Dxe:Generate real time stamp

[wenyi,xie via groups.io]

The stamp used to be generated is assumed 30day/month. Now adding a
new function which calculates time stamp with the correct days.

Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Cc: Siyuan Fu 
Signed-off-by: Wenyi Xie 
---
 NetworkPkg/Dhcp6Dxe/Dhcp6Utility.c | 71 +---
 1 file changed, 63 insertions(+), 8 deletions(-)

diff --git a/NetworkPkg/Dhcp6Dxe/Dhcp6Utility.c 
b/NetworkPkg/Dhcp6Dxe/Dhcp6Utility.c
index e6368b5b1c6c..bff8b809090f 100644
--- a/NetworkPkg/Dhcp6Dxe/Dhcp6Utility.c
+++ b/NetworkPkg/Dhcp6Dxe/Dhcp6Utility.c
@@ -10,6 +10,62 @@
 
 #include "Dhcp6Impl.h"
 
+CONST UINT32  MonthDays[] = {
+  0,
+  31,
+  31 + 28,
+  31 + 28 + 31,
+  31 + 28 + 31 + 30,
+  31 + 28 + 31 + 30 + 31,
+  31 + 28 + 31 + 30 + 31 + 30,
+  31 + 28 + 31 + 30 + 31 + 30 + 31,
+  31 + 28 + 31 + 30 + 31 + 30 + 31 + 31,
+  31 + 28 + 31 + 30 + 31 + 30 + 31 + 31 + 30,
+  31 + 28 + 31 + 30 + 31 + 30 + 31 + 31 + 30 + 31,
+  31 + 28 + 31 + 30 + 31 + 30 + 31 + 31 + 30 + 31 + 30
+};
+
+/**
+  Generate time stamp with current system time.
+
+  @param[in]  Time  The pointer to the system time.
+
+  @retval NULL  .
+  @retval others.
+
+**/
+UINT32
+Dhcp6GenerateTimeStamp (
+  IN EFI_TIME  Time
+  )
+{
+  UINT32  Stamp;
+  UINT32  Days;
+
+  if (Time.Year < 2000) {
+DEBUG ((DEBUG_ERROR, "[%a][%dL] Time before 2000!\n", __FUNCTION__, 
__LINE__));
+return (UINT32) ~(0);
+  }
+
+  Days  = 0;
+  Days += ((Time.Year - 2000) * 365) + ((Time.Year - 2000) / 4);
+  Days += MonthDays[(Time.Month - 1)];
+  if (((Time.Year - 2000) % 4 == 0) && (Time.Month >= 3)) {
+Days++;
+  }
+
+  Stamp = (UINT32)Days + Time.Day;
+  Stamp = Stamp * 24 + Time.Hour;
+  Stamp = Stamp * 60 + Time.Minute;
+  if (Time.TimeZone != 0x7ff) {
+Stamp -= Time.TimeZone;
+  }
+
+  Stamp = Stamp * 60 + Time.Second;
+
+  return Stamp;
+}
+
 /**
   Generate client Duid in the format of Duid-llt.
 
@@ -108,15 +164,14 @@ Dhcp6GenerateClientId (
 //
 
 //
-// Generate a time stamp of the seconds from 2000/1/1, assume 30day/month.
+// Generate a time stamp of the seconds from 2000/1/1.
 //
-gRT->GetTime (&Time, NULL);
-Stamp = (UINT32)
-(
- UINT32)(Time.Year - 2000) * 360 + (Time.Month - 1) * 30 + 
(Time.Day - 1)) * 24 + Time.Hour) * 60 + Time.Minute) *
- 60 +
- Time.Second
-);
+Status = gRT->GetTime (&Time, NULL);
+if (EFI_ERROR (Status)) {
+  DEBUG ((DEBUG_ERROR, "[%a][%dL] Get time failed. \n", __FUNCTION__, 
__LINE__));
+}
+
+Stamp = Dhcp6GenerateTimeStamp (Time);
 
 //
 // sizeof (option-len + Duid-type + hardware-type + time) = 10 bytes
-- 
2.20.1.windows.1



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[edk2-devel] [PATCH EDK2 v1 0/1] NetworkPkg/Dhcp6Dxe:Generate real time stamp

[wenyi,xie via groups.io]

Main Changes :
1.Adding a new function to calculate time stamp.

Wenyi Xie (1):
  NetworkPkg/Dhcp6Dxe:Generate real time stamp

 NetworkPkg/Dhcp6Dxe/Dhcp6Utility.c | 71 +---
 1 file changed, 63 insertions(+), 8 deletions(-)

-- 
2.20.1.windows.1



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Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

[Chang, Abner via groups.io]

[AMD Official Use Only - General]



From: Ni, Ray 
Sent: Wednesday, September 28, 2022 1:43 PM
To: devel@edk2.groups.io; Chang, Abner 
Cc: Kinney, Michael D ; Sunil V L 
; lichao ; Kirkendall, Garrett 
; Grimes, Paul ; He, Jiangang 
; Attar, AbdulLateef (Abdul Lateef) 
; Leif Lindholm ; Andrew 
Fish 
Subject: RE: [edk2-devel] The principles of EDK2 module reconstruction for archs

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.

Abner,
I think we Mike’s first email regarding the package structure is a good 
guideline regarding how to place the modules.

What we are discussing is how to organize the module internal contents for 
different archs. Do you agree?
[Chang, Abner] Yes.
I want to clarify this so we have a clear boundary between the two topics.

However, Mike’s proposal also defines the  folder inside a module 
directory.
Maybe we just work together to refine Mike’s proposal and document it in EDKII 
coding standard document.
[Chang, Abner] we can start from that and see how to accommodate the module 
reconstruction principles. I am modifying edk2 C coding standard spec to add 
the section for naming rule Mike proposed. Will send the patch for this later.
Thanks
Abner

Chao, can you check Mike’s proposal and raise if there is anything not captured?

Thanks,
Ray

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Chang, Abner 
via groups.io
Sent: Wednesday, September 28, 2022 12:31 PM
To: devel@edk2.groups.io; Ni, Ray 
mailto:ray...@intel.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>; Sunil V L 
mailto:suni...@ventanamicro.com>>; lichao 
mailto:lic...@loongson.cn>>; Kirkendall, Garrett 
mailto:garrett.kirkend...@amd.com>>; Grimes, Paul 
mailto:paul.gri...@amd.com>>; He, Jiangang 
mailto:jiangang...@amd.com>>; Attar, AbdulLateef (Abdul 
Lateef) mailto:abdullateef.at...@amd.com>>; Leif 
Lindholm mailto:quic_llind...@quicinc.com>>; Andrew 
Fish mailto:af...@apple.com>>
Subject: Re: [edk2-devel] The principles of EDK2 module reconstruction for archs


[AMD Official Use Only - General]



From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Ni, Ray via 
groups.io
Sent: Wednesday, September 28, 2022 11:34 AM
To: devel@edk2.groups.io; Chang, Abner 
mailto:abner.ch...@amd.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>; Sunil V L 
mailto:suni...@ventanamicro.com>>; lichao 
mailto:lic...@loongson.cn>>; Kirkendall, Garrett 
mailto:garrett.kirkend...@amd.com>>; Grimes, Paul 
mailto:paul.gri...@amd.com>>; He, Jiangang 
mailto:jiangang...@amd.com>>; Attar, AbdulLateef (Abdul 
Lateef) mailto:abdullateef.at...@amd.com>>; Leif 
Lindholm mailto:quic_llind...@quicinc.com>>; Andrew 
Fish mailto:af...@apple.com>>
Subject: Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.

The [Arch] refers to the Processor Architecture.
The [Module] refer to the EDK2 module.
The [X86] refers to both IA32 and X64.
The principles to create the X86 folder in the module:

  1.  When X86-vendor’s implementation is introduced to the existing module:

  1.  The folder reconstruction:
A-1. If the module is obviously used by IA32/X64 only

  *   No need to create X86 folder
  *   Create X86-vendor’s stuff under the root directory of module
A-2. If the existing module is expected to accommodate the different archs or 
the module already has multiple archs:

  *   Create X86 folder
  *   Create X86-vendor’s stuff under X86 folder
[Ray] Looks good.


  1.  The files reconstruction:
B-1. The module INF metafile

  *   The existing INF metafile should be kept without relocation. Should not 
have the impacts to the existing DSC/FDF file.
  *   The new introduced INF metafile should be located under the root 
directory of module with the file naming format as below. This keeps the 
consistent module file structure.

 *   .inf
[Ray]  “CpuDxe.inf” and “CpuDxeArm.inf”? is that your intention? New developers 
may be confused that CpuDxe.inf supports only X86 arch.
Do you have an example that one module supporting multiple archs using 
different INF files? MdeModulePkg/DxeIpl is a module supporting different archs 
with the same INF file.
Or shall we leave it to be decided between the patch contributor and 
package/module maintainer?
[Chang, Abner]  Here I mean the library module, for example 
SmmCpuFeatureLib.inf and AmdSmmCpuFeatureLib.inf. Will make the statement 
clear. The file naming above would be changed to .inf 
as Mike suggested.

I am not sure if there is another example having arch-specific INF file. 
Usually the driver module has the abstract interface and the implementation in 
the library module. A newly introd

Re: [edk2-devel] [PATCH] UefiCpuPkg/CpuExceptionHandlerLib: Code optimization to allow bigger stack

[Ni, Ray]

Reviewed-by: Ray Ni 

> -Original Message-
> From: Tan, Dun 
> Sent: Wednesday, September 28, 2022 9:52 AM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Kumar,
> Rahul R 
> Subject: [PATCH] UefiCpuPkg/CpuExceptionHandlerLib: Code optimization to
> allow bigger stack
> 
> This commit is a code optimization to allow bigger seperate stack size in
> ArchSetupExceptionStack. In previous code logic, CPU_STACK_ALIGNMENT
> bytes
> will be wasted if StackTop is already CPU_STACK_ALIGNMENT aligned.
> 
> Signed-off-by: Dun Tan 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> ---
>  UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c |
> 2 +-
>  UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c  |
> 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.
> c
> index 8c398ebc5b..c8fa30a32f 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.
> c
> @@ -215,7 +215,7 @@ ArchSetupExceptionStack (
>// Fixup exception task descriptor and task-state segment
>//
>AsmGetTssTemplateMap (&TemplateMap);
> -  StackTop = StackTop - CPU_STACK_ALIGNMENT;
> +  StackTop = StackTop - CPU_STACK_ALIGNMENT + 1;
>StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
>IdtTable = (IA32_IDT_GATE_DESCRIPTOR  *)Idtr.Base;
>for (Index = 0; Index < CPU_STACK_SWITCH_EXCEPTION_NUMBER;
> ++Index) {
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> index 80e9f08e5b..74b2193cb0 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
> @@ -223,7 +223,7 @@ ArchSetupExceptionStack (
>// Fixup exception task descriptor and task-state segment
>//
>ZeroMem (Tss, sizeof (*Tss));
> -  StackTop = StackTop - CPU_STACK_ALIGNMENT;
> +  StackTop = StackTop - CPU_STACK_ALIGNMENT + 1;
>StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
>IdtTable = (IA32_IDT_GATE_DESCRIPTOR  *)Idtr.Base;
>for (Index = 0; Index < CPU_STACK_SWITCH_EXCEPTION_NUMBER;
> ++Index) {
> --
> 2.31.1.windows.1



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Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

[Ni, Ray]

Abner,
I think we Mike’s first email regarding the package structure is a good 
guideline regarding how to place the modules.

What we are discussing is how to organize the module internal contents for 
different archs. Do you agree?
I want to clarify this so we have a clear boundary between the two topics.

However, Mike’s proposal also defines the  folder inside a module 
directory.
Maybe we just work together to refine Mike’s proposal and document it in EDKII 
coding standard document.

Chao, can you check Mike’s proposal and raise if there is anything not captured?

Thanks,
Ray

From: devel@edk2.groups.io  On Behalf Of Chang, Abner via 
groups.io
Sent: Wednesday, September 28, 2022 12:31 PM
To: devel@edk2.groups.io; Ni, Ray 
Cc: Kinney, Michael D ; Sunil V L 
; lichao ; Kirkendall, Garrett 
; Grimes, Paul ; He, Jiangang 
; Attar, AbdulLateef (Abdul Lateef) 
; Leif Lindholm ; Andrew 
Fish 
Subject: Re: [edk2-devel] The principles of EDK2 module reconstruction for archs


[AMD Official Use Only - General]



From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Ni, Ray via 
groups.io
Sent: Wednesday, September 28, 2022 11:34 AM
To: devel@edk2.groups.io; Chang, Abner 
mailto:abner.ch...@amd.com>>
Cc: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>; Sunil V L 
mailto:suni...@ventanamicro.com>>; lichao 
mailto:lic...@loongson.cn>>; Kirkendall, Garrett 
mailto:garrett.kirkend...@amd.com>>; Grimes, Paul 
mailto:paul.gri...@amd.com>>; He, Jiangang 
mailto:jiangang...@amd.com>>; Attar, AbdulLateef (Abdul 
Lateef) mailto:abdullateef.at...@amd.com>>; Leif 
Lindholm mailto:quic_llind...@quicinc.com>>; Andrew 
Fish mailto:af...@apple.com>>
Subject: Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.

The [Arch] refers to the Processor Architecture.
The [Module] refer to the EDK2 module.
The [X86] refers to both IA32 and X64.
The principles to create the X86 folder in the module:

  1.  When X86-vendor’s implementation is introduced to the existing module:

  1.  The folder reconstruction:
A-1. If the module is obviously used by IA32/X64 only

  *   No need to create X86 folder
  *   Create X86-vendor’s stuff under the root directory of module
A-2. If the existing module is expected to accommodate the different archs or 
the module already has multiple archs:

  *   Create X86 folder
  *   Create X86-vendor’s stuff under X86 folder
[Ray] Looks good.


  1.  The files reconstruction:
B-1. The module INF metafile

  *   The existing INF metafile should be kept without relocation. Should not 
have the impacts to the existing DSC/FDF file.
  *   The new introduced INF metafile should be located under the root 
directory of module with the file naming format as below. This keeps the 
consistent module file structure.

 *   .inf
[Ray]  “CpuDxe.inf” and “CpuDxeArm.inf”? is that your intention? New developers 
may be confused that CpuDxe.inf supports only X86 arch.
Do you have an example that one module supporting multiple archs using 
different INF files? MdeModulePkg/DxeIpl is a module supporting different archs 
with the same INF file.
Or shall we leave it to be decided between the patch contributor and 
package/module maintainer?
[Chang, Abner]  Here I mean the library module, for example 
SmmCpuFeatureLib.inf and AmdSmmCpuFeatureLib.inf. Will make the statement 
clear. The file naming above would be changed to .inf 
as Mike suggested.

I am not sure if there is another example having arch-specific INF file. 
Usually the driver module has the abstract interface and the implementation in 
the library module. A newly introduced processor architecture driver may create 
it’s own module such as ArmCpuDxe if the delta between implementations  is 
huge. However, I would prefer to have arch-specific INF for the module if the 
module implementation can be leveraged. And yes, this requires the discussion 
between contributor and module maintainer if the principles can not perfectly 
identify the case.

 B-2. Source files
  The new arch implementation is introduced to the 
module in order to leverage the source code and the module design architecture, 
so

  *   That is contributor’s responsibility to review the source code and strip 
the arch-dependent code away and put it into the arch-specific file. Leave the 
common code in the original file if there is no arch-specific and 
arch-specific-feature wordings in the file name. Create a common file for the 
common implementation otherwise.

 *   The file naming for the arch-specific file

.*

 *   The file naming for the common implementation

< OriginalFileNaming >Common.*

  *   That is contributor’s responsibility to relocate the arch-specific source 
files to the arch-specific folder.

Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

[Chang, Abner via groups.io]

[AMD Official Use Only - General]

We had the conversation this morning regarding the proper place for the 
file/module naming rule.
The proposal is the naming rule content would be documented in "edk2 C coding 
standard spec", and the "The principles of EDK2 module reconstruction for 
archs" would be on the edk2 Wiki page then refers to the section in "edk2 C 
coding standard spec" for the naming rule.

Abner

From: Ni, Ray 
Sent: Wednesday, September 28, 2022 11:56 AM
To: Kinney, Michael D ; devel@edk2.groups.io; 
Chang, Abner 
Cc: Sunil V L ; lichao ; 
Kirkendall, Garrett ; Grimes, Paul 
; He, Jiangang ; Attar, AbdulLateef 
(Abdul Lateef) ; Leif Lindholm 
; Andrew Fish 
Subject: RE: The principles of EDK2 module reconstruction for archs

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.

Mike,
Has following content already been documented somewhere?
It looks good to me. Very good abstraction of existing cases. Maybe there are 
some lib/modules that don't follow this rule. But the number should be very 
small.

But I didn't check how ARM constructs the pkg. So it's very welcomed to see 
non-X86 people for review.

Thanks,
Ray

From: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Sent: Saturday, September 24, 2022 2:01 AM
To: devel@edk2.groups.io; 
abner.ch...@amd.com; Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Cc: Ni, Ray mailto:ray...@intel.com>>; Sunil V L 
mailto:suni...@ventanamicro.com>>; lichao 
mailto:lic...@loongson.cn>>; Kirkendall, Garrett 
mailto:garrett.kirkend...@amd.com>>; Grimes, Paul 
mailto:paul.gri...@amd.com>>; He, Jiangang 
mailto:jiangang...@amd.com>>; Attar, AbdulLateef (Abdul 
Lateef) mailto:abdullateef.at...@amd.com>>; Leif 
Lindholm mailto:quic_llind...@quicinc.com>>; Andrew 
Fish mailto:af...@apple.com>>
Subject: RE: The principles of EDK2 module reconstruction for archs

Hi Abner,

I think it would be good to clarify when a difference in implementation is due 
to a CPU Arch difference or a Vendor implementation difference.

I would also be good to provide guidelines for directory names and file names 
for all EDK II meta data file types.  Here are some examples to get started:

Package Directory Name:   Pkg
Package DEC File Name: 
Pkg.dec

REQUIRED   *

Module Directory Name:
  < 
Feature >/
Module INF File Name:.inf
  < 
Feature>//.inf

 OPTIONAL   Only used 
if implementation does not have any shared code between phases (e.g. 
MdeModulePkg/Universal/PCD)
REQUIRED   Base, 
Sec, Pei, Dxe, DxeRuntime, Mm, StandaloneMm, Smm, Uefi
 REQUIRED   *

[Ray] Looks good to me. Good abstraction of existing cases.

Library Instance Directory Name:

Library Instance INF File Name:   
.inf

REQUIRED   Base, 
Sec, Pei, Dxe, DxeRuntime, Mm, StandaloneMm, Smm, Uefi
   OPTIONAL   Ia32, X64, 
Arm, AArch64, RiscV64, LoongArch64, Ebc  If 
not provided, then component supports >=2 or all CPU archs
 OPTIONAL   *
 REQUIRED   *
   OPTIONAL   * 
Typically name of PPI, Protocol, LibraryClass that the implementation is 
layered on top of.

Source File Paths within a Library/Module instance
  .c
  .h
  /.c
  /.h
  /.nasm
  /.S

   OPTIONAL   Ia32, X64, 
Arm, AArch64, RiscV64, LoongArch64, Ebc
[Ray] Looks good to me. Good abstraction of existing cases.


I think the point you are raising in the discussion is that sometimes there may 
be shared content between a small subset of CPU archs (e.g. IA32/X64 or 
Arm/AArch64 or RiscV32/RiscV64/RiscV128) and that you are proposing a new 
standard directory name for these combinations.  Your proposal is X86 for a 
directory that contains content for both IA32 and X64.  You are also wanting to 
support vendor specific content in the naming convention.  An example where it 
is already being done is in MdePkg/Include/Registers/.   So an 
enhancement to the above Source File Paths would be:

Source File Paths within a Library/Module instance
  .c
  .h
  /.c
  /.h
  /.nasm
  /.S
  //.

Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

[Chang, Abner via groups.io]

[AMD Official Use Only - General]



From: devel@edk2.groups.io  On Behalf Of Ni, Ray via 
groups.io
Sent: Wednesday, September 28, 2022 11:34 AM
To: devel@edk2.groups.io; Chang, Abner 
Cc: Kinney, Michael D ; Sunil V L 
; lichao ; Kirkendall, Garrett 
; Grimes, Paul ; He, Jiangang 
; Attar, AbdulLateef (Abdul Lateef) 
; Leif Lindholm ; Andrew 
Fish 
Subject: Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.

The [Arch] refers to the Processor Architecture.
The [Module] refer to the EDK2 module.
The [X86] refers to both IA32 and X64.
The principles to create the X86 folder in the module:

  1.  When X86-vendor's implementation is introduced to the existing module:

  1.  The folder reconstruction:
A-1. If the module is obviously used by IA32/X64 only

  *   No need to create X86 folder
  *   Create X86-vendor's stuff under the root directory of module
A-2. If the existing module is expected to accommodate the different archs or 
the module already has multiple archs:

  *   Create X86 folder
  *   Create X86-vendor's stuff under X86 folder
[Ray] Looks good.


  1.  The files reconstruction:
B-1. The module INF metafile

  *   The existing INF metafile should be kept without relocation. Should not 
have the impacts to the existing DSC/FDF file.
  *   The new introduced INF metafile should be located under the root 
directory of module with the file naming format as below. This keeps the 
consistent module file structure.

 *   .inf
[Ray]  "CpuDxe.inf" and "CpuDxeArm.inf"? is that your intention? New developers 
may be confused that CpuDxe.inf supports only X86 arch.
Do you have an example that one module supporting multiple archs using 
different INF files? MdeModulePkg/DxeIpl is a module supporting different archs 
with the same INF file.
Or shall we leave it to be decided between the patch contributor and 
package/module maintainer?
[Chang, Abner]  Here I mean the library module, for example 
SmmCpuFeatureLib.inf and AmdSmmCpuFeatureLib.inf. Will make the statement 
clear. The file naming above would be changed to .inf 
as Mike suggested.

I am not sure if there is another example having arch-specific INF file. 
Usually the driver module has the abstract interface and the implementation in 
the library module. A newly introduced processor architecture driver may create 
it's own module such as ArmCpuDxe if the delta between implementations  is 
huge. However, I would prefer to have arch-specific INF for the module if the 
module implementation can be leveraged. And yes, this requires the discussion 
between contributor and module maintainer if the principles can not perfectly 
identify the case.

 B-2. Source files
  The new arch implementation is introduced to the 
module in order to leverage the source code and the module design architecture, 
so

  *   That is contributor's responsibility to review the source code and strip 
the arch-dependent code away and put it into the arch-specific file. Leave the 
common code in the original file if there is no arch-specific and 
arch-specific-feature wordings in the file name. Create a common file for the 
common implementation otherwise.

 *   The file naming for the arch-specific file

.*

 *   The file naming for the common implementation

< OriginalFileNaming >Common.*

  *   That is contributor's responsibility to relocate the arch-specific source 
files to the arch-specific folder.
  *   That is contributor's responsibility to make sure the original INF 
metafile can properly pull-in the source file from arch-specific folder after 
the source file reconstruction.
  *   The common source files should be located under the root directory of 
module
[Ray] If you check the MpInitLib, most of SEV logic are moved to AmdSev.c. But 
MpLib.c still contains logic to call functions from AmdSev.c based on some AMD 
specific check. In my opinion, that's already good enough.
[Chang, Abner]  I am not quite lean to the If-AMD-else in the source file 
solution. I prefer to separate AMD stuff or vendor feature to a separated file. 
So we can have the reviewer or maintainer for *Amd* files/module/packages 
specifically. This makes the review responsibility clear and efficient.

However, if you check MdeModulePkg/DxeIpl, implementations for different archs 
are in different *folders*.
Can we leave this to the module owner to decide how to place the 
implementations?




  1.  When a new arch's implementation is introduced to the existing module 
which was developed for the specific arch:

  1.  The folder reconstruction:

  *   Create arch folder for the existing arch implementation
[Ray] Do you move existing arch implementation to that arch folder? It will 
break existing platforms a lot.
[Chang, Abner] We will move the arch implementation to the arch folder wit

Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

[Ni, Ray]

Mike,
Has following content already been documented somewhere?
It looks good to me. Very good abstraction of existing cases. Maybe there are 
some lib/modules that don’t follow this rule. But the number should be very 
small.

But I didn’t check how ARM constructs the pkg. So it’s very welcomed to see 
non-X86 people for review.

Thanks,
Ray

From: Kinney, Michael D 
Sent: Saturday, September 24, 2022 2:01 AM
To: devel@edk2.groups.io; abner.ch...@amd.com; Kinney, Michael D 

Cc: Ni, Ray ; Sunil V L ; lichao 
; Kirkendall, Garrett ; Grimes, 
Paul ; He, Jiangang ; Attar, 
AbdulLateef (Abdul Lateef) ; Leif Lindholm 
; Andrew Fish 
Subject: RE: The principles of EDK2 module reconstruction for archs

Hi Abner,

I think it would be good to clarify when a difference in implementation is due 
to a CPU Arch difference or a Vendor implementation difference.

I would also be good to provide guidelines for directory names and file names 
for all EDK II meta data file types.  Here are some examples to get started:

Package Directory Name:   Pkg
Package DEC File Name: 
Pkg.dec

REQUIRED   *

Module Directory Name:
  < 
Feature >/
Module INF File Name:.inf
  < 
Feature>//.inf

 OPTIONAL   Only used 
if implementation does not have any shared code between phases (e.g. 
MdeModulePkg/Universal/PCD)
REQUIRED   Base, 
Sec, Pei, Dxe, DxeRuntime, Mm, StandaloneMm, Smm, Uefi
 REQUIRED   *

[Ray] Looks good to me. Good abstraction of existing cases.

Library Instance Directory Name:

Library Instance INF File Name:   
.inf

REQUIRED   Base, 
Sec, Pei, Dxe, DxeRuntime, Mm, StandaloneMm, Smm, Uefi
   OPTIONAL   Ia32, X64, 
Arm, AArch64, RiscV64, LoongArch64, Ebc  If 
not provided, then component supports >=2 or all CPU archs
 OPTIONAL   *
 REQUIRED   *
   OPTIONAL   * 
Typically name of PPI, Protocol, LibraryClass that the implementation is 
layered on top of.

Source File Paths within a Library/Module instance
  .c
  .h
  /.c
  /.h
  /.nasm
  /.S

   OPTIONAL   Ia32, X64, 
Arm, AArch64, RiscV64, LoongArch64, Ebc
[Ray] Looks good to me. Good abstraction of existing cases.


I think the point you are raising in the discussion is that sometimes there may 
be shared content between a small subset of CPU archs (e.g. IA32/X64 or 
Arm/AArch64 or RiscV32/RiscV64/RiscV128) and that you are proposing a new 
standard directory name for these combinations.  Your proposal is X86 for a 
directory that contains content for both IA32 and X64.  You are also wanting to 
support vendor specific content in the naming convention.  An example where it 
is already being done is in MdePkg/Include/Registers/.   So an 
enhancement to the above Source File Paths would be:

Source File Paths within a Library/Module instance
  .c
  .h
  /.c
  /.h
  /.nasm
  /.S
  //.c
  //.h
  //.nasm
  //.S

   OPTIONAL   Ia32, X64, 
Arm, AArch64, RiscV64, LoongArch64, Ebc, X86
 OPTIONAL   *

I am not sure if we should use “Common” in the naming conventions.  I think by 
default, any content that is not CpuArch or Vendor specific could be considered 
common content.

[Ray] Good to me.

Thanks,

Mike

From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Chang, Abner 
via groups.io
Sent: Friday, September 23, 2022 8:39 AM
To: devel@edk2.groups.io
Cc: Ni, Ray mailto:ray...@intel.com>>; Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>; Sunil V L 
mailto:suni...@ventanamicro.com>>; lichao 
mailto:lic...@loongson.cn>>; Kirkendall, Garrett 
mailto:garrett.kirkend...@amd.com>>; Grimes, Paul 
mailto:paul.gri...@amd.com>>; He, Jiangang 
mailto:jiangang...@amd.com>>; Attar, AbdulLateef (Abdul 
Lateef) mailto:abdullateef.at...@amd.com>>; Leif 
Lindholm mailto:quic_llind...@quicinc.com>>; Andrew 
Fish mailto:af...@apple.com>>
Subject: [edk2-devel] The principles of EDK2 module reconstruction for archs


[AMD Official Use Only - General]

All,
Today in 

Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

[Ni, Ray]

The [Arch] refers to the Processor Architecture.
The [Module] refer to the EDK2 module.
The [X86] refers to both IA32 and X64.
The principles to create the X86 folder in the module:

  1.  When X86-vendor's implementation is introduced to the existing module:

  1.  The folder reconstruction:
A-1. If the module is obviously used by IA32/X64 only

  *   No need to create X86 folder
  *   Create X86-vendor's stuff under the root directory of module
A-2. If the existing module is expected to accommodate the different archs or 
the module already has multiple archs:

  *   Create X86 folder
  *   Create X86-vendor's stuff under X86 folder
[Ray] Looks good.


  1.  The files reconstruction:
B-1. The module INF metafile

  *   The existing INF metafile should be kept without relocation. Should not 
have the impacts to the existing DSC/FDF file.
  *   The new introduced INF metafile should be located under the root 
directory of module with the file naming format as below. This keeps the 
consistent module file structure.
 *   .inf
[Ray]  "CpuDxe.inf" and "CpuDxeArm.inf"? is that your intention? New developers 
may be confused that CpuDxe.inf supports only X86 arch.
Do you have an example that one module supporting multiple archs using 
different INF files? MdeModulePkg/DxeIpl is a module supporting different archs 
with the same INF file.
Or shall we leave it to be decided between the patch contributor and 
package/module maintainer?


 B-2. Source files
  The new arch implementation is introduced to the 
module in order to leverage the source code and the module design architecture, 
so

  *   That is contributor's responsibility to review the source code and strip 
the arch-dependent code away and put it into the arch-specific file. Leave the 
common code in the original file if there is no arch-specific and 
arch-specific-feature wordings in the file name. Create a common file for the 
common implementation otherwise.
 *   The file naming for the arch-specific file

.*

 *   The file naming for the common implementation

< OriginalFileNaming >Common.*

  *   That is contributor's responsibility to relocate the arch-specific source 
files to the arch-specific folder.
  *   That is contributor's responsibility to make sure the original INF 
metafile can properly pull-in the source file from arch-specific folder after 
the source file reconstruction.
  *   The common source files should be located under the root directory of 
module
[Ray] If you check the MpInitLib, most of SEV logic are moved to AmdSev.c. But 
MpLib.c still contains logic to call functions from AmdSev.c based on some AMD 
specific check. In my opinion, that's already good enough.
However, if you check MdeModulePkg/DxeIpl, implementations for different archs 
are in different *folders*.
Can we leave this to the module owner to decide how to place the 
implementations?



  1.  When a new arch's implementation is introduced to the existing module 
which was developed for the specific arch:

  1.  The folder reconstruction:

  *   Create arch folder for the existing arch implementation
[Ray] Do you move existing arch implementation to that arch folder? It will 
break existing platforms a lot.

  *   Create the arch folder for the new introduced arch
[Ray] I agree. But if we don't create arch folder for existing arch 
implementation, the pkg layout will be a mess.

[Ray] Hard for me to understand all the principles here. Maybe we review 
existing code including to-be-upstreamed code and decide how to go.


  1.  The files reconstruction:

B-1. The module INF metafile

  *   The existing INF file should be kept without the relocation. Should not 
have the impacts to the existing DSC/FDF file.
  *   The new introduced INF metafile should be located under the root 
directory of module with the file naming format as below. This keeps the 
consistent module file structure.
 *   < OriginalFileNaming>.inf



B-2. Source files
 The new arch implementation is introduced to this 
module in order to leverage the source code and the module design architecture, 
so

  *   That is contributor's responsibility to review the source code and strip 
the arch-dependent code away and put it into the arch-specific file. Leave the 
common code in the original file if there is no arch-specific wording in the 
file name. Create a common file for the common implementation otherwise.
 *   The file naming for the arch-specific source file

< OriginalFileNaming >.*

 *   The file naming for the common implementation

Common.*

  *   That is contributor's responsibility to relocate the arch-specific source 
files to the arch-specific folder.
  *   That is contributor's responsibility to make sure the original INF 
metafile can properly pull-in the source file from arch-specific folder after 
the source file reconstruction.
  *   The common source files should be located under th

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invite.ics
Description: application/ics

[edk2-devel] [PATCH] MdeModulePkg VariablePei: Add Variable state check when find variable in IndexTable.

[Jiading Zhang]

When read a variable in PEI, it will find it first in the HOB, then find in 
variable store. When find in variable store, it will check the variable state, 
but find in HOB, it doesn't check the state, so if the variable was changed, it 
will find the obsolete variable in the HOB.

Signed-off-by: jdzhang 
---
MdeModulePkg/Universal/Variable/Pei/Variable.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/Pei/Variable.c 
b/MdeModulePkg/Universal/Variable/Pei/Variable.c
index 26a4c73b45..dffbd8cdb1 100644
--- a/MdeModulePkg/Universal/Variable/Pei/Variable.c
+++ b/MdeModulePkg/Universal/Variable/Pei/Variable.c
@@ -866,11 +866,13 @@ FindVariableEx (
Offset  += IndexTable->Index[Index];
MaxIndex = (VARIABLE_HEADER *)((UINT8 *)IndexTable->StartPtr + Offset);
GetVariableHeader (StoreInfo, MaxIndex, &VariableHeader);
-      if (CompareWithValidVariable (StoreInfo, MaxIndex, VariableHeader, 
VariableName, VendorGuid, PtrTrack) == EFI_SUCCESS) {
-        if (VariableHeader->State == (VAR_IN_DELETED_TRANSITION & VAR_ADDED)) {
-          InDeletedVariable = PtrTrack->CurrPtr;
-        } else {
-          return EFI_SUCCESS;
+      if ((VariableHeader->State == VAR_ADDED) || (VariableHeader->State == 
(VAR_IN_DELETED_TRANSITION & VAR_ADDED))) {
+        if (CompareWithValidVariable (StoreInfo, MaxIndex, VariableHeader, 
VariableName, VendorGuid, PtrTrack) == EFI_SUCCESS) {
+          if (VariableHeader->State == (VAR_IN_DELETED_TRANSITION & 
VAR_ADDED)) {
+            InDeletedVariable = PtrTrack->CurrPtr;
+          } else {
+            return EFI_SUCCESS;
+          }
}
}
}
--
2.20.1.windows.1


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From d0a1e384ad04185cab915d2d577ac854169c3921 Mon Sep 17 00:00:00 2001
From: jdzhang 
Date: Wed, 28 Sep 2022 10:57:47 +0800
Subject: [PATCH] MdeModulePkg VariablePei: Add Variable state check when find
 variable in IndexTable.

When read a variable in PEI, it will find it first in the HOB, then find in 
variable store. When find in variable store, it will check the variable state, 
but find in HOB, it doesn't check the state, so if the variable was changed, it 
will find the obsolete variable in the HOB.

Signed-off-by: jdzhang 
---
 MdeModulePkg/Universal/Variable/Pei/Variable.c | 12 +++-
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/MdeModulePkg/Universal/Variable/Pei/Variable.c 
b/MdeModulePkg/Universal/Variable/Pei/Variable.c
index 26a4c73b45..dffbd8cdb1 100644
--- a/MdeModulePkg/Universal/Variable/Pei/Variable.c
+++ b/MdeModulePkg/Universal/Variable/Pei/Variable.c
@@ -866,11 +866,13 @@ FindVariableEx (
   Offset  += IndexTable->Index[Index];
   MaxIndex = (VARIABLE_HEADER *)((UINT8 *)IndexTable->StartPtr + Offset);
   GetVariableHeader (StoreInfo, MaxIndex, &VariableHeader);
-  if (CompareWithValidVariable (StoreInfo, MaxIndex, VariableHeader, 
VariableName, VendorGuid, PtrTrack) == EFI_SUCCESS) {
-if (VariableHeader->State == (VAR_IN_DELETED_TRANSITION & VAR_ADDED)) {
-  InDeletedVariable = PtrTrack->CurrPtr;
-} else {
-  return EFI_SUCCESS;
+  if ((VariableHeader->State == VAR_ADDED) || (VariableHeader->State == 
(VAR_IN_DELETED_TRANSITION & VAR_ADDED))) {
+if (CompareWithValidVariable (StoreInfo, MaxIndex, VariableHeader, 
VariableName, VendorGuid, PtrTrack) == EFI_SUCCESS) {
+  if (VariableHeader->State == (VAR_IN_DELETED_TRANSITION & 
VAR_ADDED)) {
+InDeletedVariable = PtrTrack->CurrPtr;
+  } else {
+return EFI_SUCCESS;
+  }
 }
   }
 }
-- 
2.20.1.windows.1

Re: [edk2-devel] [PATCH V2 1/1] OvmfPkg/PeilessStartupLib: move mPageTablePool to stack

[Yao, Jiewen]

Merged https://github.com/tianocore/edk2/pull/3420

> -Original Message-
> From: Yao, Jiewen
> Sent: Tuesday, September 27, 2022 4:22 PM
> To: Xu, Min M ; devel@edk2.groups.io
> Cc: Aktas, Erdem ; Gerd Hoffmann
> ; James Bottomley 
> Subject: RE: [PATCH V2 1/1] OvmfPkg/PeilessStartupLib: move
> mPageTablePool to stack
> 
> Reviewed-by: Jiewen Yao 
> 
> > -Original Message-
> > From: Xu, Min M 
> > Sent: Tuesday, September 27, 2022 3:08 PM
> > To: devel@edk2.groups.io
> > Cc: Xu, Min M ; Aktas, Erdem
> > ; Gerd Hoffmann ;
> James
> > Bottomley ; Yao, Jiewen 
> > Subject: [PATCH V2 1/1] OvmfPkg/PeilessStartupLib: move
> mPageTablePool
> > to stack
> >
> > From: Min M Xu 
> >
> > PeilessStartupLib is running in SEC phase. In this phase global variable
> > is not allowed to be modified. This patch moves mPageTablePool to stack
> > and pass it as input parameter between functions.
> >
> > Cc: Erdem Aktas 
> > Cc: Gerd Hoffmann 
> > Cc: James Bottomley 
> > Cc: Jiewen Yao 
> > Signed-off-by: Min Xu 
> > ---
> >  .../PeilessStartupLib/X64/VirtualMemory.c | 117 ++
> >  1 file changed, 68 insertions(+), 49 deletions(-)
> >
> > diff --git a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
> > b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
> > index 6877e521e485..b444c052d1bf 100644
> > --- a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
> > +++ b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
> > @@ -21,11 +21,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> >  #include 
> >  #include "PageTables.h"
> >
> > -//
> > -// Global variable to keep track current available memory used as page
> > table.
> > -//
> > -PAGE_TABLE_POOL  *mPageTablePool = NULL;
> > -
> >  UINTN  mLevelShift[5] = {
> >0,
> >PAGING_L1_ADDRESS_SHIFT,
> > @@ -273,14 +268,17 @@ ToSplitPageTable (
> >reserve at least another PAGE_TABLE_POOL_UNIT_PAGES. But usually
> > this won't
> >happen in practice.
> >
> > -  @param PoolPages  The least page number of the pool to be created.
> > +  @param[in]  PoolPages  The least page number of the pool to be
> > created.
> > +  @param[in, out] PageTablePool  Pointer of Pointer to the current
> > available memory
> > +  used as page table.
> >
> >@retval TRUEThe pool is initialized successfully.
> >@retval FALSE   The memory is out of resource.
> >  **/
> >  BOOLEAN
> >  InitializePageTablePool (
> > -  IN UINTN  PoolPages
> > +  IN UINTNPoolPages,
> > +  IN OUT PAGE_TABLE_POOL  **PageTablePool
> >)
> >  {
> >VOID  *Buffer;
> > @@ -303,20 +301,20 @@ InitializePageTablePool (
> >//
> >// Link all pools into a list for easier track later.
> >//
> > -  if (mPageTablePool == NULL) {
> > -mPageTablePool   = Buffer;
> > -mPageTablePool->NextPool = mPageTablePool;
> > +  if (*PageTablePool == NULL) {
> > +*(UINT64 *)(UINTN)PageTablePool = (UINT64)(UINTN)Buffer;
> > +(*PageTablePool)->NextPool  = *PageTablePool;
> >} else {
> > -((PAGE_TABLE_POOL *)Buffer)->NextPool = mPageTablePool-
> >NextPool;
> > -mPageTablePool->NextPool  = Buffer;
> > -mPageTablePool= Buffer;
> > +((PAGE_TABLE_POOL *)Buffer)->NextPool = (*PageTablePool)-
> >NextPool;
> > +(*PageTablePool)->NextPool= Buffer;
> > +*PageTablePool= Buffer;
> >}
> >
> >//
> >// Reserve one page for pool header.
> >//
> > -  mPageTablePool->FreePages = PoolPages - 1;
> > -  mPageTablePool->Offset= EFI_PAGES_TO_SIZE (1);
> > +  (*PageTablePool)->FreePages = PoolPages - 1;
> > +  (*PageTablePool)->Offset= EFI_PAGES_TO_SIZE (1);
> >
> >return TRUE;
> >  }
> > @@ -333,14 +331,17 @@ InitializePageTablePool (
> >If there is not enough memory remaining to satisfy the request, then
> > NULL is
> >returned.
> >
> > -  @param  Pages The number of 4 KB pages to allocate.
> > +  @param[in]  Pages The number of 4 KB pages to 
> > allocate.
> > +  @param[in, out] PageTablePool Pointer of pointer to the current
> > available
> > +memory used as page table.
> >
> >@return A pointer to the allocated buffer or NULL if allocation fails.
> >
> >  **/
> >  VOID *
> >  AllocatePageTableMemory (
> > -  IN UINTN  Pages
> > +  IN UINTNPages,
> > +  IN OUT PAGE_TABLE_POOL  **PageTablePool
> >)
> >  {
> >VOID  *Buffer;
> > @@ -349,30 +350,31 @@ AllocatePageTableMemory (
> >  return NULL;
> >}
> >
> > -  DEBUG ((DEBUG_INFO, "AllocatePageTableMemory.
> mPageTablePool=%p,
> > Pages=%d\n", mPageTablePool, Pages));
> > +  DEBUG ((DEBUG_INFO, "AllocatePageTableMemory. PageTablePool=%p,
> > Pages=%d\n", *PageTablePool, Pages));
> >//
> >// Renew the pool if necessary.
> >//
> > -  if ((mPageTablePool == NULL) ||
> > -  (Pages > mPageTablePoo

[edk2-devel] [PATCH] UefiCpuPkg/CpuExceptionHandlerLib: Code optimization to allow bigger stack

[duntan]

This commit is a code optimization to allow bigger seperate stack size in
ArchSetupExceptionStack. In previous code logic, CPU_STACK_ALIGNMENT bytes
will be wasted if StackTop is already CPU_STACK_ALIGNMENT aligned.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c | 2 +-
 UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
index 8c398ebc5b..c8fa30a32f 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ArchExceptionHandler.c
@@ -215,7 +215,7 @@ ArchSetupExceptionStack (
   // Fixup exception task descriptor and task-state segment
   //
   AsmGetTssTemplateMap (&TemplateMap);
-  StackTop = StackTop - CPU_STACK_ALIGNMENT;
+  StackTop = StackTop - CPU_STACK_ALIGNMENT + 1;
   StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
   IdtTable = (IA32_IDT_GATE_DESCRIPTOR  *)Idtr.Base;
   for (Index = 0; Index < CPU_STACK_SWITCH_EXCEPTION_NUMBER; ++Index) {
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
index 80e9f08e5b..74b2193cb0 100644
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
@@ -223,7 +223,7 @@ ArchSetupExceptionStack (
   // Fixup exception task descriptor and task-state segment
   //
   ZeroMem (Tss, sizeof (*Tss));
-  StackTop = StackTop - CPU_STACK_ALIGNMENT;
+  StackTop = StackTop - CPU_STACK_ALIGNMENT + 1;
   StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);
   IdtTable = (IA32_IDT_GATE_DESCRIPTOR  *)Idtr.Base;
   for (Index = 0; Index < CPU_STACK_SWITCH_EXCEPTION_NUMBER; ++Index) {
-- 
2.31.1.windows.1



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[edk2-devel] Event: TianoCore Bug Triage - APAC / NAMO - 09/27/2022 #cal-reminder

[Group Notification]

*Reminder: TianoCore Bug Triage - APAC / NAMO*

*When:*
09/27/2022
6:30pm to 7:30pm
(UTC-07:00) America/Los Angeles

*Where:*
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTk1YzJhN2UtOGQwNi00NjY4LWEwMTktY2JiODRlYTY1NmY0%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4ed4-8496-4ed7712e255d%22%2c%22Oid%22%3a%226e4ce4c4-1242-431b-9a51-92cd01a5df3c%22%7d

*Organizer:* Liming Gao gaolim...@byosoft.com.cn ( 
gaolim...@byosoft.com.cn?subject=Re:%20Event:%20TianoCore%20Bug%20Triage%20-%20APAC%20%2F%20NAMO
 )

View Event ( https://edk2.groups.io/g/devel/viewevent?eventid=1268275 )

*Description:*

TianoCore Bug Triage - APAC / NAMO

Hosted by Liming Gao



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Re: [edk2-devel] [PATCH v5 09/21] MdePkg/BaseRngLib: Rename ArmReadIdIsar0() to ArmGetFeatRng()

[Rebecca Cran]

On 9/19/2022 12:21 PM, PierreGondois wrote:


  ;/**
@@ -19,11 +19,11 @@
  ;**/
  ;UINT64
  ;EFIAPI
-;ArmReadIdIsar0 (
+;ArmGetFeatRng (
  ;  VOID
  ;  );
  ;
-ArmReadIdIsar0
+ArmGetFeatRng
mrs  x0, id_aa64isar0_el1 // Read ID_AA64ISAR0 Register
ret
  


Should we be masking the register value here instead of in 
BaseRngLibConstructor, to make it more consistent with the new name?



--
Rebecca Cran



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[edk2-devel] version handling for EFI v2.10

[Ard Biesheuvel]

Hello all,

I just noticed the v2.10 of the UEFI spec. It adds the following define

#define EFI_2_100_SYSTEM_TABLE_REVISION ((2<<16) | (100)

However, the revision field is documented as

"""
The revision of the EFI Specification to which this table conforms.
The upper 16 bits of this field contain the major revision value, and
the lower 16 bits contain the minor revision value. The minor revision
values are binary coded decimals and are limited to the range of
00..99.
"""

I'm not sure what 'binary coded decimals' is supposed to mean here,
given that we use ordinary decimals (30 == 30, and 0x30 == 48 not 30).
However, the range 00..99 is obviously decimal, and 100 is obviously
outside of that range, so something is out of whack here.

Not too important, but I was trying to adapt the Linux revision
reporting to the latest update, and the inconsistency makes that a bit
tricky.

Thanks,
Ard.


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Re: [edk2-devel] [PATCH v5 07/21] ArmPkg: Add FID definitions for Firmware TRNG

[Leif Lindholm]

On 2022-09-19 12:21, pierre.gond...@arm.com wrote:

From: Sami Mujawar 

Bugzilla: 3668 (https://bugzilla.tianocore.org/show_bug.cgi?id=3668)

The Arm True Random Number Generator Firmware, Interface 1.0,
Platform Design Document
(https://developer.arm.com/documentation/den0098/latest/)
defines an interface between an Operating System (OS) executing
at EL1 and Firmware (FW) exposing a conditioned entropy source
that is provided by a TRNG back end.

New function IDs have been defined by the specification for
accessing the TRNG services. Therefore, add these definitions
to the Arm standard SMC header.

Signed-off-by: Sami Mujawar 


The patch needs to be signed off by the contributor (you), and no one 
else. You cannot make legal statements on their behalf, and you must 
make the statement on your own behalf.


/
Leif


---
  ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 109 +++-
  1 file changed, 107 insertions(+), 2 deletions(-)

diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h 
b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
index 78ce77cd734d..fa977a03a7ab 100644
--- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
+++ b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h
@@ -1,13 +1,20 @@
  /** @file
  *
  *  Copyright (c) 2020, NUVIA Inc. All rights reserved.
-*  Copyright (c) 2012-2017, ARM Limited. All rights reserved.
+*  Copyright (c) 2012 - 2022, Arm Limited. All rights reserved.
  *
  *  SPDX-License-Identifier: BSD-2-Clause-Patent
  *
  * @par Revision Reference:
-*  - SMC Calling Convention version 1.2
+*  - [1] SMC Calling Convention version 1.2
  *(https://developer.arm.com/documentation/den0028/c/?lang=en)
+*  - [2] Arm True Random Number Generator Firmware, Interface 1.0,
+*Platform Design Document.
+*(https://developer.arm.com/documentation/den0098/latest/)
+*
+*  @par Glossary:
+*- TRNG - True Random Number Generator
+*
  **/
  
  #ifndef ARM_STD_SMC_H_

@@ -139,4 +146,102 @@
  /*0xbf00ff02 is reserved */
  #define ARM_SMC_ID_TOS_REVISION  0xbf00ff03
  
+// Firmware TRNG interface Function IDs

+
+/*
+  SMC/HVC call to get the version of the TRNG backend,
+  Cf. [2], 2.1 TRNG_VERSION
+  Input values:
+W00x8400_0050
+W1-W7 Reserved (MBZ)
+  Return values:
+Success (W0 > 0) W0[31] MBZ
+  W0[30:16] Major revision
+  W0[15:0] Minor revision
+  W1 - W3 Reserved (MBZ)
+Error (W0 < 0)
+  NOT_SUPPORTED Function not implemented
+*/
+#define FID_TRNG_VERSION  0x8450
+
+/*
+  SMC/HVC call to check if a TRNG function ID is implemented by the backend,
+  Cf. [2], Section 2.2 TRNG_FEATURES
+  Input Values
+W00x8400_0051
+W1trng_func_id
+W2-W7 Reserved (MBZ)
+  Return values:
+Success (W0 >= 0):
+  SUCCESS Function is implemented.
+> 0 Function is implemented and
+has specific capabilities,
+see function definition.
+Error (W0 < 0)
+  NOT_SUPPORTED Function with FID=trng_func_id
+  is not implemented
+*/
+#define FID_TRNG_FEATURES  0x8451
+
+/*
+  SMC/HVC call to get the UUID of the TRNG backend,
+  Cf. [2], Section 2.3 TRNG_GET_UUID
+  Input Values:
+W00x8400_0052
+W1-W7 Reserved (MBZ)
+  Return Values:
+Success (W0 != -1)
+W0 UUID[31:0]
+W1 UUID[63:32]
+W2 UUID[95:64]
+W3 UUID[127:96]
+Error (W0 = -1)
+W0 NOT_SUPPORTED
+*/
+#define FID_TRNG_GET_UUID  0x8452
+
+/*
+  AARCH32 SMC/HVC call to get entropy bits, Cf. [2], Section 2.4 TRNG_RND.
+  Input values:
+W00x8400_0053
+W2-W7 Reserved (MBZ)
+  Return values:
+Success (W0 = 0):
+  W0 MBZ
+  W1 Entropy[95:64]
+  W2 Entropy[63:32]
+  W3 Entropy[31:0]
+Error (W0 < 0)
+  W0 NOT_SUPPORTED
+  NO_ENTROPY
+  INVALID_PARAMETERS
+  W1 - W3 Reserved (MBZ)
+*/
+#define FID_TRNG_RND_AARCH32  0x8453
+
+/*
+  AARCH64 SMC/HVC call to get entropy bits, Cf. [2], Section 2.4 TRNG_RND.
+  Input values:
+  X00xC400_0053
+  X2-X7 Reserved (MBZ)
+  Return values:
+Success (X0 = 0):
+  X0 MBZ
+  X1 Entropy[191:128]
+  X2 Entropy[127:64]
+  X3 Entropy[63:0]
+Error (X0 < 0)
+  X0 NOT_SUPPORTED
+  NO_ENTROPY
+  INVALID_PARAMETERS
+  X1 - X3 Reserved (MBZ)
+*/
+#define FID_TRNG_RND_AARCH64  0xC453
+
+// Firmware TRNG status codes
+#define TRNG_STATUS_SUCCESS(INT32)(0)
+#define TRNG_STATUS_NOT_SUPPORTED  (INT32)(-1)
+#define TRNG_STATUS_INVALID_PARAMETER  (INT32)(-2)
+#define TRNG_STATUS_NO_ENTROPY (INT32)(-3)
+
  #endif // ARM_STD_SMC_H_




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Re: [edk2-devel] [PATCH v5 03/21] ArmPkg/ArmMonitorLib: Add ArmMonitorLib

[Rebecca Cran]

On 9/19/2022 12:21 PM, PierreGondois wrote:


+/** Monitor call.
+
+  An HyperVisor Call (HVC) or System Monitor Call (SMC) will be issued
+  depending on the default conduit. PcdMonitorConduitHvc determines the type
+  of the call: if true, do an HVC.
+
+  @param [in, out]  ArgsArguments for the HVC/SMC.
+**/
+VOID
+EFIAPI
+ArmMonitorCall (
+  IN OUT ARM_MONITOR_ARGS  *Args
+  )


Doxygen specifies that there shouldn't be a space between "in" and "out"

From https://doxygen.nl/manual/docblocks.html

"For functions one can use the @param command to document the parameters 
and then use [in], [out], [in,out] to document the direction."



Clang can warn about this mismatch when the various documentation 
commands are used: https://clang.llvm.org/docs/DiagnosticsReference.html



--

Rebecca Cran



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Re: [edk2-devel] [PATCH v5 05/21] MdePkg/TrngLib: Definition for TRNG library class interface

[Leif Lindholm]

On 2022-09-19 12:21, pierre.gond...@arm.com wrote:

From: Sami Mujawar 

Bugzilla: 3668 (https://bugzilla.tianocore.org/show_bug.cgi?id=3668)

The NIST Special Publications 800-90A, 800-90B and 800-90C
provide recommendations for random number generation. The
NIST 800-90C, Recommendation for Random Bit Generator (RBG)
Constructions, defines the GetEntropy() interface that is
used to access the entropy source. The GetEntropy() interface
is further used by Deterministic Random Bit Generators (DRBG)
to generate random numbers.

The True Random Number Generator (TRNG) library defines an
interface to access the entropy source on a platform. Some
platforms/architectures may provide access to the entropy
using a firmware interface. In such cases the TRNG library
shall be used to provide an abstraction.

Signed-off-by: Sami Mujawar 


The patch needs to be signed off by the contributor (you), and no one 
else. You cannot make legal statements on their behalf, and you must 
make the statement on your own behalf.


/
Leif


---
  MdePkg/Include/Library/TrngLib.h | 103 +++
  MdePkg/MdePkg.dec|   5 ++
  2 files changed, 108 insertions(+)
  create mode 100644 MdePkg/Include/Library/TrngLib.h

diff --git a/MdePkg/Include/Library/TrngLib.h b/MdePkg/Include/Library/TrngLib.h
new file mode 100644
index ..535fd53f4305
--- /dev/null
+++ b/MdePkg/Include/Library/TrngLib.h
@@ -0,0 +1,103 @@
+/** @file
+  TRNG interface library definitions.
+
+  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Reference(s):
+  - [1] NIST Special Publication 800-90B, Recommendation for the Entropy
+Sources Used for Random Bit Generation.
+(https://csrc.nist.gov/publications/detail/sp/800-90b/final)
+
+  @par Glossary:
+- TRNG - True Random Number Generator
+**/
+
+#ifndef TRNG_LIB_H_
+#define TRNG_LIB_H_
+
+/** Get the version of the TRNG backend.
+
+  A TRNG may be implemented by the system firmware, in which case this
+  function shall return the version of the TRNG backend.
+  The implementation must return NOT_SUPPORTED if a Back end is not present.
+
+  @param [out]  MajorRevision Major revision.
+  @param [out]  MinorRevision Minor revision.
+
+  @retval  RETURN_SUCCESSThe function completed successfully.
+  @retval  RETURN_INVALID_PARAMETER  Invalid parameter.
+  @retval  RETURN_UNSUPPORTEDBackend not present.
+**/
+RETURN_STATUS
+EFIAPI
+GetTrngVersion (
+  OUT UINT16  *MajorRevision,
+  OUT UINT16  *MinorRevision
+  );
+
+/** Get the UUID of the TRNG backend.
+
+  A TRNG may be implemented by the system firmware, in which case this
+  function shall return the UUID of the TRNG backend.
+  Returning the TRNG UUID is optional and if not implemented, 
RETURN_UNSUPPORTED
+  shall be returned.
+
+  Note: The caller must not rely on the returned UUID as a trustworthy TRNG
+Back end identity
+
+  @param [out]  Guid  UUID of the TRNG backend.
+
+  @retval  RETURN_SUCCESSThe function completed successfully.
+  @retval  RETURN_INVALID_PARAMETER  Invalid parameter.
+  @retval  RETURN_UNSUPPORTEDFunction not implemented.
+**/
+RETURN_STATUS
+EFIAPI
+GetTrngUuid (
+  OUT GUID  *Guid
+  );
+
+/** Returns maximum number of entropy bits that can be returned in a single
+call.
+
+  @return Returns the maximum number of Entropy bits that can be returned
+  in a single call to GetTrngEntropy().
+**/
+UINTN
+EFIAPI
+GetTrngMaxSupportedEntropyBits (
+  VOID
+  );
+
+/** Returns N bits of conditioned entropy.
+
+  See [1] Section 2.3.1 GetEntropy: An Interface to the Entropy Source
+GetEntropy
+  Input:
+bits_of_entropy: the requested amount of entropy
+  Output:
+entropy_bitstring: The string that provides the requested entropy.
+  status: A Boolean value that is TRUE if the request has been satisfied,
+  and is FALSE otherwise.
+
+  @param  [in]   EntropyBits  Number of entropy bits requested.
+  @param  [in]   BufferSize   Size of the Buffer in bytes.
+  @param  [out]  Buffer   Buffer to return the entropy bits.
+
+  @retval  RETURN_SUCCESSThe function completed successfully.
+  @retval  RETURN_INVALID_PARAMETER  Invalid parameter.
+  @retval  RETURN_UNSUPPORTEDFunction not implemented.
+  @retval  RETURN_BAD_BUFFER_SIZEBuffer size is too small.
+  @retval  RETURN_NOT_READY  No Entropy available.
+**/
+RETURN_STATUS
+EFIAPI
+GetTrngEntropy (
+  IN  UINTN  EntropyBits,
+  IN  UINTN  BufferSize,
+  OUT UINT8  *Buffer
+  );
+
+#endif // TRNG_LIB_H_
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index f1ebf9e251c1..7ff26e22f915 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -7,6 +7,7 @@
  # Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
  # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
  # (C) Co

Re: [edk2-devel] [PATCH v5 06/21] MdePkg/TrngLib: Add NULL instance of TRNG Library

[Leif Lindholm]

On 2022-09-19 12:21, pierre.gond...@arm.com wrote:

From: Sami Mujawar 

Bugzilla: 3668 (https://bugzilla.tianocore.org/show_bug.cgi?id=3668)

The True Random Number Generator (TRNG) library defines an
interface to access the entropy source on a platform. On
platforms that do not have access to an entropy source, a
NULL instance of the TRNG library may be useful to satisfy
the build dependency.

Therefore, add a NULL instance of the TRNG library.

Signed-off-by: Sami Mujawar 


The patch needs to be signed off by the contributor (you), and no one 
else. You cannot make legal statements on their behalf, and you must 
make the statement on your own behalf.



---
  .../Library/BaseTrngLibNull/BaseTrngLibNull.c | 117 ++
  .../BaseTrngLibNull/BaseTrngLibNull.inf   |  30 +
  .../BaseTrngLibNull/BaseTrngLibNull.uni   |  12 ++
  MdePkg/MdePkg.dsc |   1 +
  4 files changed, 160 insertions(+)
  create mode 100644 MdePkg/Library/BaseTrngLibNull/BaseTrngLibNull.c
  create mode 100644 MdePkg/Library/BaseTrngLibNull/BaseTrngLibNull.inf
  create mode 100644 MdePkg/Library/BaseTrngLibNull/BaseTrngLibNull.uni

diff --git a/MdePkg/Library/BaseTrngLibNull/BaseTrngLibNull.c 
b/MdePkg/Library/BaseTrngLibNull/BaseTrngLibNull.c
new file mode 100644
index ..60774b33dd58
--- /dev/null
+++ b/MdePkg/Library/BaseTrngLibNull/BaseTrngLibNull.c
@@ -0,0 +1,117 @@
+/** @file
+  Null version of TRNG (True Random Number Generator) services.
+
+  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Reference(s):
+  - [1] NIST Special Publication 800-90B, Recommendation for the Entropy
+Sources Used for Random Bit Generation.
+(https://csrc.nist.gov/publications/detail/sp/800-90b/final)
+
+  @par Glossary:
+- TRNG - True Random Number Generator
+**/
+
+#include 
+#include 
+
+/** Get the version of the TRNG backend.
+
+  A TRNG may be implemented by the system firmware, in which case this
+  function shall return the version of the TRNG backend.
+  The implementation must return NOT_SUPPORTED if a Back end is not present.
+
+  @param [out]  MajorRevision Major revision.
+  @param [out]  MinorRevision Minor revision.
+
+  @retval  RETURN_SUCCESSThe function completed successfully.
+  @retval  RETURN_INVALID_PARAMETER  Invalid parameter.
+  @retval  RETURN_UNSUPPORTEDBackend not present.
+**/
+RETURN_STATUS
+EFIAPI
+GetTrngVersion (
+  OUT UINT16  *MajorRevision,
+  OUT UINT16  *MinorRevision
+  )
+{
+  ASSERT (FALSE);
+  return RETURN_UNSUPPORTED;
+}
+
+/** Get the UUID of the TRNG backend.
+
+  A TRNG may be implemented by the system firmware, in which case this
+  function shall return the UUID of the TRNG backend.
+  Returning the TRNG UUID is optional and if not implemented, 
RETURN_UNSUPPORTED
+  shall be returned.
+
+  Note: The caller must not rely on the returned UUID as a trustworthy TRNG
+Back end identity
+
+  @param [out]  Guid  UUID of the TRNG backend.
+
+  @retval  RETURN_SUCCESSThe function completed successfully.
+  @retval  RETURN_INVALID_PARAMETER  Invalid parameter.
+  @retval  RETURN_UNSUPPORTEDFunction not implemented.
+**/
+RETURN_STATUS
+EFIAPI
+GetTrngUuid (
+  OUT GUID  *Guid
+  )
+{
+  ASSERT (FALSE);
+  return RETURN_UNSUPPORTED;
+}
+
+/** Returns maximum number of entropy bits that can be returned in a single
+call.
+
+  @return Returns the maximum number of Entropy bits that can be returned
+  in a single call to GetTrngEntropy().
+**/
+UINTN
+EFIAPI
+GetTrngMaxSupportedEntropyBits (
+  VOID
+  )
+{
+  ASSERT (FALSE);
+  return 0;
+}
+
+/** Returns N bits of conditioned entropy.
+
+  See [1] Section 2.3.1 GetEntropy: An Interface to the Entropy Source
+GetEntropy
+  Input:
+bits_of_entropy: the requested amount of entropy
+  Output:
+entropy_bitstring: The string that provides the requested entropy.
+  status: A Boolean value that is TRUE if the request has been satisfied,
+  and is FALSE otherwise.
+
+  @param  [in]   EntropyBits  Number of entropy bits requested.
+  @param  [in]   BufferSize   Size of the Buffer in bytes.
+  @param  [out]  Buffer   Buffer to return the entropy bits.
+
+  @retval  RETURN_SUCCESSThe function completed successfully.
+  @retval  RETURN_INVALID_PARAMETER  Invalid parameter.
+  @retval  RETURN_UNSUPPORTEDFunction not implemented.
+  @retval  RETURN_BAD_BUFFER_SIZEBuffer size is too small.
+  @retval  RETURN_NOT_READY  No Entropy available.
+**/
+RETURN_STATUS
+EFIAPI
+GetTrngEntropy (
+  IN  UINTN  EntropyBits,
+  IN  UINTN  BufferSize,
+  OUT UINT8  *Buffer
+  )
+{
+  ASSERT (FALSE);
+  return RETURN_UNSUPPORTED;
+}
diff --git a/MdePkg/Library/BaseTrngLibNull/BaseTrngLibNull.inf 
b/MdePkg/Library/BaseTrngLibNull/BaseTrngLibNull.inf
new file mode 100644
index .

Re: [edk2-devel] [PATCH v5 03/21] ArmPkg/ArmMonitorLib: Add ArmMonitorLib

[Rebecca Cran]

On 9/19/2022 12:21 PM, PierreGondois wrote:


+[Defines]
+  INF_VERSION= 0x0001001B


Should this be 0x0001001D, since 1.29 is the latest revision of the INF 
specification?



--

Rebecca Cran



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Re: [edk2-devel] [PATCH v5 04/21] ArmPkg/ArmHvcNullLib: Add NULL instance of ArmHvcLib

[Leif Lindholm]

On 2022-09-19 12:21, pierre.gond...@arm.com wrote:

From: Pierre Gondois 

Add a Null instance of ArmHvcLib in case of library dependencies.

Signed-off-by: Pierre Gondois 
---
  ArmPkg/ArmPkg.dsc |  1 +
  ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.c  | 29 +++
  .../Library/ArmHvcNullLib/ArmHvcNullLib.inf   | 22 ++
  3 files changed, 52 insertions(+)
  create mode 100644 ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.c
  create mode 100644 ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.inf


I think the name of the library, source files and library class should 
be ArmHvcLibNull rather than ArmHvcNullLib - to match existing code.




diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 3afd212f472b..e33b40f2c215 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -134,6 +134,7 @@ [Components.common]
ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf
ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf
ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
+  ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.inf


Please sort alphabetically.


ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf
ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf
ArmPkg/Library/OpteeLib/OpteeLib.inf
diff --git a/ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.c 
b/ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.c
new file mode 100644
index ..6905631ccb6c
--- /dev/null
+++ b/ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.c
@@ -0,0 +1,29 @@
+/** @file
+  Arm HyperVisor Call (HVC) Null Library.
+
+  Copyright (c) 2022, Arm Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 


Please sort alphabetically.

/
Leif


+
+/**
+  Trigger an HVC call
+
+  HVC calls can take up to 8 arguments and return up to 4 return values.
+  Therefore, the 4 first fields in the ARM_HVC_ARGS structure are used
+  for both input and output values.
+
+  @param [in, out]  ArgsArguments for the HVC call.
+**/
+VOID
+ArmCallHvc (
+  IN OUT ARM_HVC_ARGS  *Args
+  )
+{
+  ASSERT (FALSE);
+  return;
+}
diff --git a/ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.inf 
b/ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.inf
new file mode 100644
index ..c4665d34018b
--- /dev/null
+++ b/ArmPkg/Library/ArmHvcNullLib/ArmHvcNullLib.inf
@@ -0,0 +1,22 @@
+## @file
+#  Arm Hvc Null Library
+#
+#  Copyright (c) 2022, Arm Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = ArmHvcNullLib
+  FILE_GUID  = 02076A46-D6DB-48DD-8E5F-153172DD73A1
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = ArmHvcLib
+
+[Sources]
+  ArmHvcNullLib.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  MdePkg/MdePkg.dec




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Re: [edk2-devel] [PATCH v5 01/21] ArmPkg: PCD to select conduit for monitor calls

[Leif Lindholm]

On 2022-09-19 12:21, pierre.gond...@arm.com wrote:

From: Sami Mujawar 

Define a PCD 'PcdMonitorConduitHvc' to select the conduit to use for
monitor calls. PcdMonitorConduitHvc is defined as FALSE by default,
meaning the SMC conduit is enabled as default.

Adding PcdMonitorConduitHvc allows selection of HVC conduit to be used
by virtual firmware implementations.

Signed-off-by: Sami Mujawar 


Actually, revoke my Reviewed-by for this patch.

The patch needs to be signed off by the contributor (you), and no one 
else. You cannot make legal statements on their behalf, and you must 
make the statement on your own behalf.


/
Leif


---
  ArmPkg/ArmPkg.dec | 7 ++-
  1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index 9da1bbc9f216..bb5cbecbc228 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -2,7 +2,7 @@
  # ARM processor package.
  #
  # Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
-# Copyright (c) 2011 - 2021, ARM Limited. All rights reserved.
+# Copyright (c) 2011 - 2022, ARM Limited. All rights reserved.
  # Copyright (c) 2021, Ampere Computing LLC. All rights reserved.
  #
  #SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -132,6 +132,11 @@ [PcdsFeatureFlag.common]
# Define if the GICv3 controller should use the GICv2 legacy
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x0042
  
+  ## Define the conduit to use for monitor calls.

+  # Default PcdMonitorConduitHvc = FALSE, conduit = SMC
+  # If PcdMonitorConduitHvc = TRUE, conduit = HVC
+  gArmTokenSpaceGuid.PcdMonitorConduitHvc|FALSE|BOOLEAN|0x0047
+
  [PcdsFeatureFlag.ARM]
# Whether to map normal memory as non-shareable. FALSE is the safe choice, 
but
# TRUE may be appropriate to fix performance problems if you don't care 
about




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Re: [edk2-devel] [PATCH v5 03/21] ArmPkg/ArmMonitorLib: Add ArmMonitorLib

[Leif Lindholm]

Hi Pierre,

Apologies for delay in feedback.

On 2022-09-19 12:21, pierre.gond...@arm.com wrote:

From: Pierre Gondois 

The ArmMonitorLib provides an abstract interface to issue
an HyperVisor Call (HVC) or System Monitor Call (SMC) depending
on the default conduit.
The PcdMonitorConduitHvc PCD allows to select the default conduit.

Signed-off-by: Pierre Gondois 


For 1-3/21:
Reviewed-by: Leif Lindholm 

/
Leif


---
  ArmPkg/ArmPkg.dsc |  1 +
  ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c  | 34 +++
  .../Library/ArmMonitorLib/ArmMonitorLib.inf   | 29 
  3 files changed, 64 insertions(+)
  create mode 100644 ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c
  create mode 100644 ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf

diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index 59fd8f295d4f..3afd212f472b 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -135,6 +135,7 @@ [Components.common]
ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf
ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf
ArmPkg/Library/ArmSvcLib/ArmSvcLib.inf
+  ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf
ArmPkg/Library/OpteeLib/OpteeLib.inf
  
ArmPkg/Filesystem/SemihostFs/SemihostFs.inf

diff --git a/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c 
b/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c
new file mode 100644
index ..5e91f2957325
--- /dev/null
+++ b/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.c
@@ -0,0 +1,34 @@
+/** @file
+  Arm Monitor Library.
+
+  Copyright (c) 2022, Arm Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+
+/** Monitor call.
+
+  An HyperVisor Call (HVC) or System Monitor Call (SMC) will be issued
+  depending on the default conduit. PcdMonitorConduitHvc determines the type
+  of the call: if true, do an HVC.
+
+  @param [in, out]  ArgsArguments for the HVC/SMC.
+**/
+VOID
+EFIAPI
+ArmMonitorCall (
+  IN OUT ARM_MONITOR_ARGS  *Args
+  )
+{
+  if (FeaturePcdGet (PcdMonitorConduitHvc)) {
+ArmCallHvc ((ARM_HVC_ARGS *)Args);
+  } else {
+ArmCallSmc ((ARM_SMC_ARGS *)Args);
+  }
+}
diff --git a/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf 
b/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf
new file mode 100644
index ..abaeb556d471
--- /dev/null
+++ b/ArmPkg/Library/ArmMonitorLib/ArmMonitorLib.inf
@@ -0,0 +1,29 @@
+## @file
+#  Arm Monitor Library
+#
+#  Copyright (c) 2022, Arm Limited. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION= 0x0001001B
+  BASE_NAME  = ArmMonitorLib
+  FILE_GUID  = F918DACB-FBB8-4CB6-A61D-08E75AF0E7CD
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = ArmMonitorLib
+
+[Sources]
+  ArmMonitorLib.c
+
+[Packages]
+  ArmPkg/ArmPkg.dec
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  ArmHvcLib
+  ArmSmcLib
+
+[Pcd]
+  gArmTokenSpaceGuid.PcdMonitorConduitHvc




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Re: [edk2-devel] MK BOOT.MXF.1.1.c1-00035-MAKENA-1 compilation is failing

[Michael D Kinney]

Did you recently upgrade to Python 3.9.  Are you using the latest version of 
BaseTools?

I see an issue that was fixed in BaseTools in August 2020 that may be related.

https://edk2.groups.io/g/devel/message/64002
https://github.com/tianocore/edk2/commit/5d8648345cd9ad729837118c731063c59edea192

Mike


From: devel@edk2.groups.io  On Behalf Of Ajinkya Bhavalkar
Sent: Tuesday, September 27, 2022 5:51 AM
To: devel@edk2.groups.io
Cc: Siddalingesh Rajashekhar ; Shiv Kumar 

Subject: [edk2-devel] MK BOOT.MXF.1.1.c1-00035-MAKENA-1 compilation is failing

Can someone please help with this.
This issue is observed on all our machines.

Command to compile:
python -u boot_images/boot_tools/buildex.py -t Makena -v WP -r DEBUG

Logs:
testSurrogatePairUnicodeCharInUtf8FileWithBom (CheckUnicodeSourceFiles.Tests) 
... ok
testUtf16InUniFile (CheckUnicodeSourceFiles.Tests) ... FAIL
testValidUtf8File (CheckUnicodeSourceFiles.Tests) ... FAIL
testValidUtf8FileWithBom (CheckUnicodeSourceFiles.Tests) ... FAIL

==
FAIL: testUtf16InUniFile (CheckUnicodeSourceFiles.Tests)
--
Traceback (most recent call last):
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 375, in PreProcess
FileIn = UniFileClassObject.OpenUniFile(LongFilePath(File.Path))
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 303, in OpenUniFile
UniFileClassObject.VerifyUcs2Data(FileIn, FileName, Encoding)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 312, in VerifyUcs2Data
Ucs2Info = codecs.lookup('ucs-2')
LookupError: unknown encoding: ucs-2

During handling of the above exception, another exception occurred:

Traceback (most recent call last):
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 60, in CheckFile
BtUni.UniFileClassObject([path])
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 230, in __init__
self.LoadUniFiles(FileList)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 542, in LoadUniFiles
self.LoadUniFile(File)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 456, in LoadUniFile
Lines = self.PreProcess(File)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 381, in PreProcess
EdkLogger.error("build", FILE_OPEN_FAILURE, ExtraData=File.Path);
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/Common/EdkLogger.py",
 line 284, in error
raise FatalError(ErrorCode)
Common.BuildToolError.FatalError: 1

During handling of the above exception, another exception occurred:

Traceback (most recent call last):
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 79, in testUtf16InUniFile
self.CheckFile('utf_16', shouldPass=True)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 72, in CheckFile
self.EdkErrorFailure(encoding, shouldPass)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 55, in EdkErrorFailure
self.ErrorFailure('EdkLogger.FatalError', encoding, shouldPass)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 49, in ErrorFailure
self.fail(msg)
AssertionError: EdkLogger.FatalError should not be generated for utf_16 data in 
a .uni file

==
FAIL: testValidUtf8File (CheckUnicodeSourceFiles.Tests)
--
Traceback (most recent call last):
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 375, in PreProcess
FileIn = UniFileClassObject.OpenUniFile(LongFilePath(File.Path))
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 303, in OpenUniFile
UniFileClassObject.VerifyUcs2Data(FileIn, FileName, Encoding)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 312, in VerifyUcs2Data
Ucs2Info = codecs.lookup('ucs-2')
LookupError: unknown encoding: ucs-2

During handling of the above exception, another exception occurred:

Traceback (most recent cal

[edk2-devel] MK BOOT.MXF.1.1.c1-00035-MAKENA-1 compilation is failing

[Ajinkya Bhavalkar]

Can someone please help with this.
This issue is observed on all our machines.

Command to compile:
python -u boot_images/boot_tools/buildex.py -t Makena -v WP -r DEBUG

Logs:
testSurrogatePairUnicodeCharInUtf8FileWithBom (CheckUnicodeSourceFiles.Tests) 
... ok
testUtf16InUniFile (CheckUnicodeSourceFiles.Tests) ... FAIL
testValidUtf8File (CheckUnicodeSourceFiles.Tests) ... FAIL
testValidUtf8FileWithBom (CheckUnicodeSourceFiles.Tests) ... FAIL

==
FAIL: testUtf16InUniFile (CheckUnicodeSourceFiles.Tests)
--
Traceback (most recent call last):
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 375, in PreProcess
FileIn = UniFileClassObject.OpenUniFile(LongFilePath(File.Path))
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 303, in OpenUniFile
UniFileClassObject.VerifyUcs2Data(FileIn, FileName, Encoding)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 312, in VerifyUcs2Data
Ucs2Info = codecs.lookup('ucs-2')
LookupError: unknown encoding: ucs-2

During handling of the above exception, another exception occurred:

Traceback (most recent call last):
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 60, in CheckFile
BtUni.UniFileClassObject([path])
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 230, in __init__
self.LoadUniFiles(FileList)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 542, in LoadUniFiles
self.LoadUniFile(File)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 456, in LoadUniFile
Lines = self.PreProcess(File)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 381, in PreProcess
EdkLogger.error("build", FILE_OPEN_FAILURE, ExtraData=File.Path);
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/Common/EdkLogger.py",
 line 284, in error
raise FatalError(ErrorCode)
Common.BuildToolError.FatalError: 1

During handling of the above exception, another exception occurred:

Traceback (most recent call last):
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 79, in testUtf16InUniFile
self.CheckFile('utf_16', shouldPass=True)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 72, in CheckFile
self.EdkErrorFailure(encoding, shouldPass)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 55, in EdkErrorFailure
self.ErrorFailure('EdkLogger.FatalError', encoding, shouldPass)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 49, in ErrorFailure
self.fail(msg)
AssertionError: EdkLogger.FatalError should not be generated for utf_16 data in 
a .uni file

==
FAIL: testValidUtf8File (CheckUnicodeSourceFiles.Tests)
--
Traceback (most recent call last):
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 375, in PreProcess
FileIn = UniFileClassObject.OpenUniFile(LongFilePath(File.Path))
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 303, in OpenUniFile
UniFileClassObject.VerifyUcs2Data(FileIn, FileName, Encoding)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 312, in VerifyUcs2Data
Ucs2Info = codecs.lookup('ucs-2')
LookupError: unknown encoding: ucs-2

During handling of the above exception, another exception occurred:

Traceback (most recent call last):
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Tests/CheckUnicodeSourceFiles.py",
 line 60, in CheckFile
BtUni.UniFileClassObject([path])
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 230, in __init__
self.LoadUniFiles(FileList)
  File 
"/local/mnt/workspace/Ajinkya/LPI_MK_XBL/boot_images/edk2/BaseTools/Source/Python/AutoGen/UniClassObject.py",
 line 542, in LoadUniFiles
self.LoadUniFile(File)
  File 
"/local/mnt/workspace/

[edk2-devel] [PATCH v1 1/1] UefiCpuPkg: Reset a parameter when BSP Exit in CPU relaxed mode.

[Li, Zhihao]

From: Zhihao Li 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4083

In CPU relaxed mode, it doesn't reset the value of
mSmmMpSyncData->AllApArrivedWithException when BSP exit smm mode.
So this patch will reset this variable.

Cc: Eric Dong 
Cc: Ray Ni 

Signed-off-by: Zhihao Li 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 13c2cb8da4c3..c79da418e37c 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -696,8 +696,9 @@ BSPHandler (
   //
   // Allow APs to check in from this point on
   //
-  *mSmmMpSyncData->Counter   = 0;
-  *mSmmMpSyncData->AllCpusInSync = FALSE;
+  *mSmmMpSyncData->Counter  = 0;
+  *mSmmMpSyncData->AllCpusInSync= FALSE;
+  mSmmMpSyncData->AllApArrivedWithException = FALSE;
 }
 
 /**
-- 
2.26.2.windows.1



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[edk2-devel] [PATCH v3 32/34] MdeModulePkg/CapsuleRuntimeDxe: Add LoongArch64 architecture.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch in INF for building CapsuleRuntimeDxe LoongArch64 image.

Cc: Liming Gao 
Cc: Guomin Jiang 

Sigend-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 .../Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf| 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf 
b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
index 8bf5035a69..601eada170 100644
--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
@@ -6,6 +6,7 @@
 #
 #  Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -22,20 +23,20 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
   CapsuleService.c
   CapsuleService.h
 
-[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64]
+[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64, 
Sources.LOONGARCH64]
   SaveLongModeContext.c
 
-[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64, Sources.RISCV64]
+[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64, Sources.RISCV64, 
Sources.LOONGARCH64]
   CapsuleCache.c
 
-[Sources.Ia32, Sources.X64, Sources.EBC, Sources.RISCV64]
+[Sources.Ia32, Sources.X64, Sources.EBC, Sources.RISCV64, Sources.LOONGARCH64]
   CapsuleReset.c
 
 [Sources.ARM, Sources.AARCH64]
-- 
2.27.0



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Re: [edk2-devel] [PATCH v3 29/34] MdePkg/BaseSynchronizationLib: LoongArch cache related code.

[Chao Li]

Hi Mike,
I have converted the inline assembly code to ASM code, please review this patch 
again, thanks!

Thanks,
Chao


On 9月 27 2022, at 7:13 晚上, Chao Li  wrote:
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053
>
> Support LoongArch cache related functions.
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Zhiguang Liu 
>
> Signed-off-by: Chao Li 
> Co-authored-by: Baoqi Zhang 
> ---
> .../BaseSynchronizationLib.inf | 6 +
> .../LoongArch64/AsmSynchronization.S | 122 +
> .../LoongArch64/Synchronization.c | 233 ++
> 3 files changed, 361 insertions(+)
> create mode 100644 
> MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S
> create mode 100644 
> MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
>
> diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf 
> b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
> index 02ba12961a..dd66ec1d03 100755
> --- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
> +++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
> @@ -4,6 +4,7 @@
> # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
>
> # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
> # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
> reserved.
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
> reserved.
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -82,6 +83,11 @@
> Synchronization.c
>
> RiscV64/Synchronization.S
>
>
> +[Sources.LOONGARCH64]
> + Synchronization.c
> + LoongArch64/Synchronization.c | GCC
> + LoongArch64/AsmSynchronization.S | GCC
> +
> [Packages]
> MdePkg/MdePkg.dec
>
>
> diff --git 
> a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S 
> b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S
> new file mode 100644
> index 00..3f1b06172d
> --- /dev/null
> +++ b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S
> @@ -0,0 +1,122 @@
> +#--
> +#
> +# LoongArch synchronization ASM functions.
> +#
> +# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
> reserved.
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#--
> +
> +ASM_GLOBAL ASM_PFX(AsmInternalSyncCompareExchange16)
> +ASM_GLOBAL ASM_PFX(AsmInternalSyncCompareExchange32)
> +ASM_GLOBAL ASM_PFX(AsmInternalSyncCompareExchange64)
> +ASM_GLOBAL ASM_PFX(AsmInternalSyncIncrement)
> +ASM_GLOBAL ASM_PFX(AsmInternalSyncDecrement)
> +
> +/**
> +UINT32
> +EFIAPI
> +AsmInternalSyncCompareExchange16 (
> + IN volatile UINT32 *Ptr32,
> + IN UINT64 Mask,
> + IN UINT64 LocalCompareValue,
> + IN UINT64 LocalExchangeValue
> + )
> +**/
> +ASM_PFX(AsmInternalSyncCompareExchange16):
> +1:
> + ll.w $t0, $a0, 0x0
> + and $t1, $t0, $a1
> + bne $t1, $a2, 2f
> + andn $t1, $t0, $a1
> + or $t1, $t1, $a3
> + sc.w $t1, $a0, 0x0
> + beqz $t1, 1b
> + b 3f
> +2:
> + dbar 0
> +3:
> + move $a0, $t0
> + jirl $zero, $ra, 0
> +
> +/**
> +UINT32
> +EFIAPI
> +AsmInternalSyncCompareExchange32 (
> + IN volatile UINT32 *Value,
> + IN UINT64 CompareValue,
> + IN UINT64 ExchangeValue
> + )
> +**/
> +ASM_PFX(AsmInternalSyncCompareExchange32):
> +1:
> + ll.w $t0, $a0, 0x0
> + bne $t0, $a1, 2f
> + move $t0, $a2
> + sc.w $t0, $a0, 0x0
> + beqz $t0, 1b
> + b 3f
> +2:
> + dbar 0
> +3:
> + move $a0, $t0
> + jirl $zero, $ra, 0
> +
> +/**
> +UINT64
> +EFIAPI
> +AsmInternalSyncCompareExchange64 (
> + IN volatile UINT64 *Value,
> + IN UINT64 CompareValue,
> + IN UINT64 ExchangeValue
> + )
> +**/
> +ASM_PFX(AsmInternalSyncCompareExchange64):
> +1:
> + ll.d $t0, $a0, 0x0
> + bne $t0, $a1, 2f
> + move $t0, $a2
> + sc.d $t0, $a0, 0x0
> + beqz $t0, 1b
> + b 3f
> +2:
> + dbar 0
> +3:
> + move $a0, $t0
> + jirl $zero, $ra, 0
> +
> +/**
> +UINT32
> +EFIAPI
> +AsmInternalSyncIncrement (
> + IN volatile UINT32 *Value
> + )
> +**/
> +ASM_PFX(AsmInternalSyncIncrement):
> + move $t0, $a0
> + dbar 0
> + ld.w $t1, $t0, 0x0
> + li.w $t2, 1
> + amadd.w $t1, $t2, $t0
> +
> + ld.w $a0, $t0, 0x0
> + jirl $zero, $ra, 0
> +
> +/**
> +UINT32
> +EFIAPI
> +AsmInternalSyncDecrement (
> + IN volatile UINT32 *Value
> + )
> +**/
> +ASM_PFX(AsmInternalSyncDecrement):
> + move $t0, $a0
> + dbar 0
> + ld.w $t1, $t0, 0x0
> + li.w $t2, -1
> + amadd.w $t1, $t2, $t0
> +
> + ld.w $a0, $t0, 0x0
> + jirl $zero, $ra, 0
> +.end
> diff --git 
> a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c 
> b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
> new file mode 100644
> index 00..d696c8ce10
> --- /dev/null
> +++ b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
> @@ -0,0 +1,233 @@
> +/** @file
>
> + LoongArch synchronization functions.
> +
> + Copyright (c) 2022, Lo

[edk2-devel] [PATCH v3 02/34] MdePkg: Added LoongArch jump buffer register definition to MdePkg.ci.yaml

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

If the new Arch register is defined in BaseLib.h when running
the CI tests, it will give an ECC check error. Add the
LoongArch register defined in the IgnoreFiles field to make
the CI ECC check pass.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 MdePkg/MdePkg.ci.yaml | 12 
 1 file changed, 12 insertions(+)

diff --git a/MdePkg/MdePkg.ci.yaml b/MdePkg/MdePkg.ci.yaml
index 9d141aa3cb..19bc0138cb 100644
--- a/MdePkg/MdePkg.ci.yaml
+++ b/MdePkg/MdePkg.ci.yaml
@@ -27,6 +27,18 @@
 "8005", "void",
 "8005", "va_list.__ap",
 "8005", "__stack_chk_guard",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S0",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S1",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S2",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S3",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S4",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S5",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S6",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S7",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.S8",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.SP",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.FP",
+"8005", "BASE_LIBRARY_JUMP_BUFFER.RA",
 "8001", "MSG_IPv6_DP",
 "8001", "MSG_IPv4_DP",
 "8001", "DEFAULT_ToS",
-- 
2.27.0



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[edk2-devel] [PATCH v3 34/34] NetworkPkg: Add LoongArch64 architecture.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch64 architecture in to NetworkPkg.

Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Cc: Siyuan Fu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 NetworkPkg/Network.dsc.inc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/NetworkPkg/Network.dsc.inc b/NetworkPkg/Network.dsc.inc
index 99fad885bf..04b515a0bb 100644
--- a/NetworkPkg/Network.dsc.inc
+++ b/NetworkPkg/Network.dsc.inc
@@ -9,6 +9,7 @@
 #
 # Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -38,7 +39,7 @@
 !include NetworkPkg/NetworkComponents.dsc.inc
 
 !else
-[Components.IA32, Components.X64, Components.ARM, Components.AARCH64, 
Components.RISCV64]
+[Components.IA32, Components.X64, Components.ARM, Components.AARCH64, 
Components.RISCV64, Components.LOONGARCH64]
 !include NetworkPkg/NetworkComponents.dsc.inc
 
 !endif
-- 
2.27.0



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[edk2-devel] [PATCH v3 33/34] MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Implement LoongArch DxeIPL instance.

Cc: Liming Gao 
Cc: Guomin Jiang 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 

Reviewed-by: Liming Gao 
---
 MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf   |  6 +-
 .../Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c | 63 +++
 2 files changed, 68 insertions(+), 1 deletion(-)
 create mode 100644 MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c

diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf 
b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
index 19b8a4c8ae..052ea0ec1a 100644
--- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
@@ -8,6 +8,7 @@
 #  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -26,7 +27,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC (EBC is for build only) 
AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC (EBC is for build only) 
AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
@@ -53,6 +54,9 @@
 [Sources.RISCV64]
   RiscV64/DxeLoadFunc.c
 
+[Sources.LOONGARCH64]
+  LoongArch64/DxeLoadFunc.c
+
 [Packages]
   MdePkg/MdePkg.dec
   MdeModulePkg/MdeModulePkg.dec
diff --git a/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c 
b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
new file mode 100644
index 00..95d3af19ea
--- /dev/null
+++ b/MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c
@@ -0,0 +1,63 @@
+/** @file
+  LoongArch specifc functionality for DxeLoad.
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "DxeIpl.h"
+
+/**
+   Transfers control to DxeCore.
+
+   This function performs a CPU architecture specific operations to execute
+   the entry point of DxeCore with the parameters of HobList.
+   It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.
+
+   @param[in] DxeCoreEntryPoint The entry point of DxeCore.
+   @param[in] HobList   The start of HobList passed to DxeCore.
+
+**/
+VOID
+HandOffToDxeCore (
+  IN EFI_PHYSICAL_ADDRESS  DxeCoreEntryPoint,
+  IN EFI_PEI_HOB_POINTERS  HobList
+  )
+{
+  VOID*BaseOfStack;
+  VOID*TopOfStack;
+  EFI_STATUS  Status;
+
+  //
+  // Allocate 128KB for the Stack
+  //
+  BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));
+  ASSERT (BaseOfStack != NULL);
+
+  //
+  // Compute the top of the stack we were allocated. Pre-allocate a UINTN
+  // for safety.
+  //
+  TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * 
EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);
+  TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);
+
+  //
+  // End of PEI phase signal
+  //
+  Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);
+  ASSERT_EFI_ERROR (Status);
+
+  //
+  // Update the contents of BSP stack HOB to reflect the real stack info 
passed to DxeCore.
+  //
+  UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);
+
+  SwitchStack (
+(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,
+HobList.Raw,
+NULL,
+TopOfStack
+);
+}
-- 
2.27.0



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[edk2-devel] [PATCH v3 31/34] MdeModulePkg/Logo: Add LoongArch64 architecture.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch64 architecture to the Logo.

Cc: Zhichao Gao 
Cc: Ray Ni 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
Reviewed-by: Zhichao Gao 
---
 MdeModulePkg/Logo/Logo.inf | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Logo/Logo.inf b/MdeModulePkg/Logo/Logo.inf
index 70a66cae98..294482ccdc 100644
--- a/MdeModulePkg/Logo/Logo.inf
+++ b/MdeModulePkg/Logo/Logo.inf
@@ -3,6 +3,7 @@
 #
 #  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -21,7 +22,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Binaries]
-- 
2.27.0



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[edk2-devel] [PATCH v3 29/34] MdePkg/BaseSynchronizationLib: LoongArch cache related code.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Support LoongArch cache related functions.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
---
 .../BaseSynchronizationLib.inf|   6 +
 .../LoongArch64/AsmSynchronization.S  | 122 +
 .../LoongArch64/Synchronization.c | 233 ++
 3 files changed, 361 insertions(+)
 create mode 100644 
MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S
 create mode 100644 
MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c

diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf 
b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
index 02ba12961a..dd66ec1d03 100755
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -4,6 +4,7 @@
 #  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -82,6 +83,11 @@
   Synchronization.c
   RiscV64/Synchronization.S
 
+[Sources.LOONGARCH64]
+  Synchronization.c
+  LoongArch64/Synchronization.c| GCC
+  LoongArch64/AsmSynchronization.S | GCC
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git 
a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S 
b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S
new file mode 100644
index 00..3f1b06172d
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/AsmSynchronization.S
@@ -0,0 +1,122 @@
+#--
+#
+# LoongArch synchronization ASM functions.
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+ASM_GLOBAL ASM_PFX(AsmInternalSyncCompareExchange16)
+ASM_GLOBAL ASM_PFX(AsmInternalSyncCompareExchange32)
+ASM_GLOBAL ASM_PFX(AsmInternalSyncCompareExchange64)
+ASM_GLOBAL ASM_PFX(AsmInternalSyncIncrement)
+ASM_GLOBAL ASM_PFX(AsmInternalSyncDecrement)
+
+/**
+UINT32
+EFIAPI
+AsmInternalSyncCompareExchange16 (
+  IN volatile UINT32 *Ptr32,
+  IN UINT64  Mask,
+  IN UINT64  LocalCompareValue,
+  IN UINT64  LocalExchangeValue
+  )
+**/
+ASM_PFX(AsmInternalSyncCompareExchange16):
+1:
+  ll.w  $t0, $a0, 0x0
+  and   $t1, $t0, $a1
+  bne   $t1, $a2, 2f
+  andn  $t1, $t0, $a1
+  or$t1, $t1, $a3
+  sc.w  $t1, $a0, 0x0
+  beqz  $t1, 1b
+  b 3f
+2:
+  dbar  0
+3:
+  move   $a0, $t0
+  jirl   $zero, $ra, 0
+
+/**
+UINT32
+EFIAPI
+AsmInternalSyncCompareExchange32 (
+  IN volatile UINT32 *Value,
+  IN UINT64  CompareValue,
+  IN UINT64  ExchangeValue
+  )
+**/
+ASM_PFX(AsmInternalSyncCompareExchange32):
+1:
+  ll.w  $t0, $a0, 0x0
+  bne   $t0, $a1, 2f
+  move  $t0, $a2
+  sc.w  $t0, $a0, 0x0
+  beqz  $t0, 1b
+  b 3f
+2:
+  dbar  0
+3:
+  move   $a0, $t0
+  jirl   $zero, $ra, 0
+
+/**
+UINT64
+EFIAPI
+AsmInternalSyncCompareExchange64 (
+  IN volatile UINT64 *Value,
+  IN UINT64  CompareValue,
+  IN UINT64  ExchangeValue
+  )
+**/
+ASM_PFX(AsmInternalSyncCompareExchange64):
+1:
+  ll.d  $t0, $a0, 0x0
+  bne   $t0, $a1, 2f
+  move  $t0, $a2
+  sc.d  $t0, $a0, 0x0
+  beqz  $t0, 1b
+  b 3f
+2:
+  dbar  0
+3:
+  move   $a0, $t0
+  jirl   $zero, $ra, 0
+
+/**
+UINT32
+EFIAPI
+AsmInternalSyncIncrement (
+  IN  volatile UINT32  *Value
+  )
+**/
+ASM_PFX(AsmInternalSyncIncrement):
+  move $t0, $a0
+  dbar 0
+  ld.w $t1, $t0, 0x0
+  li.w $t2, 1
+  amadd.w  $t1, $t2, $t0
+
+  ld.w $a0, $t0, 0x0
+  jirl $zero, $ra, 0
+
+/**
+UINT32
+EFIAPI
+AsmInternalSyncDecrement (
+  IN  volatile UINT32  *Value
+  )
+**/
+ASM_PFX(AsmInternalSyncDecrement):
+  move $t0, $a0
+  dbar 0
+  ld.w $t1, $t0, 0x0
+  li.w $t2, -1
+  amadd.w  $t1, $t2, $t0
+
+  ld.w $a0, $t0, 0x0
+  jirl $zero, $ra, 0
+.end
diff --git 
a/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c 
b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
new file mode 100644
index 00..d696c8ce10
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/LoongArch64/Synchronization.c
@@ -0,0 +1,233 @@
+/** @file
+  LoongArch synchronization functions.
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
+UINT32
+EFIAPI
+AsmInternalSyncCompareExchange16 (
+  IN volatile UINT32 *,
+  IN UINT64,
+  IN UINT64,
+  IN 

[edk2-devel] [PATCH v3 30/34] MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for BaseSafeIntLib.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch64 architecture for BaseSafeIntLib library.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf 
b/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
index 40017ec88b..9d039f2e5b 100644
--- a/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
+++ b/MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf
@@ -4,9 +4,10 @@
 # This library provides helper functions to prevent integer overflow during
 # type conversion, addition, subtraction, and multiplication.
 #
-#  Copyright (c) 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2018, Intel Corporation. All rights reserved.
 # Copyright (c) 2017, Microsoft Corporation
-#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 
 #
 # All rights reserved.
@@ -25,7 +26,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
@@ -34,7 +35,7 @@
 [Sources.Ia32, Sources.ARM]
   SafeIntLib32.c
 
-[Sources.X64, Sources.AARCH64, Sources.RISCV64]
+[Sources.X64, Sources.AARCH64, Sources.RISCV64, Sources.LOONGARCH64]
   SafeIntLib64.c
 
 [Sources.EBC]
-- 
2.27.0



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[edk2-devel] [PATCH v3 28/34] MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Implement LoongArch CPU related functions in BaseCpuLib.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 MdePkg/Library/BaseCpuLib/BaseCpuLib.inf  |  7 ++-
 MdePkg/Library/BaseCpuLib/BaseCpuLib.uni  |  5 +++--
 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S | 15 +++
 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S| 15 +++
 4 files changed, 39 insertions(+), 3 deletions(-)
 create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
 create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S

diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf 
b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index c4cd29a783..6b230f6e6d 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -8,6 +8,7 @@
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -25,7 +26,7 @@
 
 
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources.IA32]
@@ -61,6 +62,10 @@
 [Sources.RISCV64]
   RiscV/Cpu.S
 
+[Sources.LOONGARCH64]
+  LoongArch/CpuFlushTlb.S | GCC
+  LoongArch/CpuSleep.S| GCC
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni 
b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
index 80dc495786..7c5c8dfb37 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
@@ -1,13 +1,14 @@
 // /** @file
 // Instance of CPU Library for various architecture.
 //
-// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
+// CPU Library implemented using ASM functions for IA-32, X64, RISCV64 and 
LoongArch64,
 // PAL CALLs for IPF, and empty functions for EBC.
 //
 // Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.
 // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 // Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 // Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
@@ -16,5 +17,5 @@
 
 #string STR_MODULE_ABSTRACT #language en-US "Instance of CPU 
Library for various architectures"
 
-#string STR_MODULE_DESCRIPTION  #language en-US "CPU Library 
implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, 
and empty functions for EBC."
+#string STR_MODULE_DESCRIPTION  #language en-US "CPU Library 
implemented using ASM functions for IA-32, X64, RISCV64 and LoongArch64, PAL 
CALLs for IPF, and empty functions for EBC."
 
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S 
b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
new file mode 100644
index 00..8b792f0a37
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuFlushTlb.S
@@ -0,0 +1,15 @@
+#--
+#
+# CpuFlushTlb() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+ASM_GLOBAL ASM_PFX(CpuFlushTlb)
+
+ASM_PFX(CpuFlushTlb):
+  tlbflush
+  jirl $zero, $ra, 0
+  .end
diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S 
b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
new file mode 100644
index 00..eb31b10714
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/LoongArch/CpuSleep.S
@@ -0,0 +1,15 @@
+#--
+#
+# CpuSleep() for LoongArch64
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+ASM_GLOBAL ASM_PFX(CpuSleep)
+
+ASM_PFX(CpuSleep):
+  idle 0
+  jirl $zero, $ra, 0
+  .end
-- 
2.27.0



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[edk2-devel] [PATCH v3 27/34] MdePkg/BasePeCoff: Add LoongArch PE/Coff related code.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch image relocation.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 

Reviewed-by: Michael D Kinney 
---
 MdePkg/Library/BasePeCoffLib/BasePeCoff.c |   3 +-
 .../Library/BasePeCoffLib/BasePeCoffLib.inf   |   5 +
 .../Library/BasePeCoffLib/BasePeCoffLib.uni   |   2 +
 .../BasePeCoffLib/LoongArch/PeCoffLoaderEx.c  | 137 ++
 4 files changed, 146 insertions(+), 1 deletion(-)
 create mode 100644 MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c

diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c 
b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c
index 6d8d9faeb8..97a8aaf8c7 100644
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoff.c
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoff.c
@@ -1,6 +1,6 @@
 /** @file
   Base PE/COFF loader supports loading any PE32/PE32+ or TE image, but
-  only supports relocating IA32, x64, IPF, ARM, RISC-V and EBC images.
+  only supports relocating IA32, x64, IPF, ARM, RISC-V, LoongArch and EBC 
images.
 
   Caution: This file requires additional review when modified.
   This library will have external input - PE/COFF image.
@@ -18,6 +18,7 @@
   Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
   Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+  Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf 
b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
index 110b6d5a09..3b8b8eb191 100644
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
@@ -4,6 +4,7 @@
 #  The IA32 version library support loading IA32, X64 and EBC PE/COFF images.
 #  The X64 version library support loading IA32, X64 and EBC PE/COFF images.
 #  The RISC-V version library support loading RISC-V images.
+#  The LoongArch version library support loading LoongArch images.
 #
 #  Caution: This module requires additional review when modified.
 #  This library will have external input - PE/COFF image.
@@ -13,6 +14,7 @@
 #  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+#  Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -46,6 +48,9 @@
 [Sources.RISCV64]
   RiscV/PeCoffLoaderEx.c
 
+[Sources.LOONGARCH64]
+  LoongArch/PeCoffLoaderEx.c
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni 
b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni
index 55417029f2..1f731344e1 100644
--- a/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni
+++ b/MdePkg/Library/BasePeCoffLib/BasePeCoffLib.uni
@@ -5,6 +5,7 @@
 // The IA32 version library support loading IA32, X64 and EBC PE/COFF images.
 // The X64 version library support loading IA32, X64 and EBC PE/COFF images.
 // The RISC-V version library support loading RISC-V32 and RISC-V64 PE/COFF 
images.
+// The LoongArch version library support loading LoongArch32 and LoongArch64 
PE/COFF images.
 //
 // Caution: This module requires additional review when modified.
 // This library will have external input - PE/COFF image.
@@ -14,6 +15,7 @@
 // Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
 // Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 // Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+// Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 //
 // SPDX-License-Identifier: BSD-2-Clause-Patent
 //
diff --git a/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c 
b/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c
new file mode 100644
index 00..417096f334
--- /dev/null
+++ b/MdePkg/Library/BasePeCoffLib/LoongArch/PeCoffLoaderEx.c
@@ -0,0 +1,137 @@
+/** @file
+  PE/Coff loader for LoongArch PE image
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "BasePeCoffLibInternals.h"
+#include 
+
+/**
+  Performs an LoongArch specific relocation fixup and is a no-op on other
+  instruction sets.
+
+  @param[in]   Reloc   Pointer to the relocation record.
+  @param[in, out]  Fixup   Pointer to the address to fix up.
+  @param[in, out]  FixupData   Pointer to a buffer to log the fixups.
+  @param[in]   Adjust  The offset to adjust the fixup.
+
+  @return Status code.
+
+**/
+RETURN_STATUS
+PeCoffLoaderRelocateImageEx (
+  IN UINT16  

[edk2-devel] [PATCH v3 26/34] MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

LoongArch MMIO library instance, use the IoLibNoIo.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 .../Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf  | 10 +++---
 MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c  |  3 ++-
 2 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf 
b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
index 27b15d9ae2..aeb072ee95 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -4,13 +4,14 @@
 #  I/O Library that uses compiler intrinsics to perform IN and OUT instructions
 #  for IA-32 and x64.  On IPF, I/O port requests are translated into MMIO 
requests.
 #  MMIO requests are forwarded directly to memory.  For EBC, I/O port requests
-#  ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides non 
I/O
-#  read and write.
+#  ASSERT(). For ARM, AARCH64, RISCV64 and LoongArch, this I/O library only 
provides
+#  non I/O read and write.
 #
 #  Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Copyright (c) 2017, AMD Incorporated. All rights reserved.
 #  Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+#  Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -27,7 +28,7 @@
 
 
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
@@ -62,6 +63,9 @@
 [Sources.RISCV64]
   IoLibNoIo.c
 
+[Sources.LOONGARCH64]
+  IoLibNoIo.c
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c 
b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
index c71f45b22e..c51e5da39b 100644
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
@@ -1,11 +1,12 @@
 /** @file
   I/O library for non I/O read and write access (memory map I/O read and
-  write only) architecture, such as ARM and RISC-V processor.
+  write only) architecture, such as ARM, RISC-V and LoongArch processor.
 
   Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
   Copyright (c) 2017, AMD Incorporated. All rights reserved.
   Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
-- 
2.27.0



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[edk2-devel] [PATCH v3 24/34] MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch LOONGARCH64 BaseLib functions.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 

Reviewed-by: Michael D Kinney 
---
 MdePkg/Include/Library/BaseLib.h  | 24 
 MdePkg/Library/BaseLib/BaseLib.inf| 16 -
 MdePkg/Library/BaseLib/LoongArch64/Barrier.S  | 28 +
 .../BaseLib/LoongArch64/CpuBreakpoint.S   | 24 
 MdePkg/Library/BaseLib/LoongArch64/CpuPause.S | 31 ++
 .../BaseLib/LoongArch64/DisableInterrupts.S   | 21 +++
 .../BaseLib/LoongArch64/EnableInterrupts.S| 21 +++
 .../BaseLib/LoongArch64/GetInterruptState.S   | 35 +++
 .../BaseLib/LoongArch64/InternalSwitchStack.c | 58 +++
 .../Library/BaseLib/LoongArch64/MemoryFence.S | 18 ++
 .../BaseLib/LoongArch64/SetJumpLongJump.S | 49 
 .../Library/BaseLib/LoongArch64/SwitchStack.S | 39 +
 12 files changed, 363 insertions(+), 1 deletion(-)
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/Barrier.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/CpuBreakpoint.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/CpuPause.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/DisableInterrupts.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/EnableInterrupts.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/GetInterruptState.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/InternalSwitchStack.c
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/MemoryFence.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/SetJumpLongJump.S
 create mode 100644 MdePkg/Library/BaseLib/LoongArch64/SwitchStack.S

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index a6f9a194ef..f3f59f21c2 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -6,6 +6,7 @@ Copyright (c) 2006 - 2021, Intel Corporation. All rights 
reserved.
 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 Copyright (c) Microsoft Corporation.
 Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -152,6 +153,29 @@ typedef struct {
 
 #endif // defined (MDE_CPU_RISCV64)
 
+#if defined (MDE_CPU_LOONGARCH64)
+///
+/// The LoongArch architecture context buffer used by SetJump() and LongJump()
+///
+typedef struct {
+  UINT64S0;
+  UINT64S1;
+  UINT64S2;
+  UINT64S3;
+  UINT64S4;
+  UINT64S5;
+  UINT64S6;
+  UINT64S7;
+  UINT64S8;
+  UINT64SP;
+  UINT64FP;
+  UINT64RA;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT  8
+
+#endif // defined (MDE_CPU_LOONGARCH64)
+
 //
 // String Services
 //
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf 
b/MdePkg/Library/BaseLib/BaseLib.inf
index 6be5be9428..9ed46a584a 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -21,7 +21,7 @@
   LIBRARY_CLASS  = BaseLib
 
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
@@ -402,6 +402,20 @@
   RiscV64/RiscVInterrupt.S  | GCC
   RiscV64/FlushCache.S  | GCC
 
+[Sources.LOONGARCH64]
+  Math64.c
+  Unaligned.c
+  LoongArch64/InternalSwitchStack.c
+  LoongArch64/GetInterruptState.S   | GCC
+  LoongArch64/EnableInterrupts.S| GCC
+  LoongArch64/DisableInterrupts.S   | GCC
+  LoongArch64/Barrier.S | GCC
+  LoongArch64/MemoryFence.S | GCC
+  LoongArch64/CpuBreakpoint.S   | GCC
+  LoongArch64/CpuPause.S| GCC
+  LoongArch64/SetJumpLongJump.S | GCC
+  LoongArch64/SwitchStack.S | GCC
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BaseLib/LoongArch64/Barrier.S 
b/MdePkg/Library/BaseLib/LoongArch64/Barrier.S
new file mode 100644
index 00..58f21ad725
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LoongArch64/Barrier.S
@@ -0,0 +1,28 @@
+#--
+#
+# LoongArch Barrier Operations
+#
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+ASM_GLOBAL ASM_PFX(AsmDataBarrierLoongArch)
+ASM_GLOBAL ASM_PFX(AsmInstructionBarrierLoongArch)
+
+#
+# Data barrier operation for LoongArch.
+#
+ASM_PFX(AsmDataBarrierLoongArch):
+  dbar 0
+  jirl $zero, $ra, 0
+
+#
+# Instruction barrier operation for LoongArch.
+#
+ASM_PFX(AsmInstructionBarrierLoongArch):
+  ibar 0
+  jirl $zero, $ra, 0
+
+  .end
diff --git a/MdePkg/Library/BaseLib/

[edk2-devel] [PATCH v3 25/34] MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance implementation.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Implement LoongArch cache maintenance functions in
BaseCacheMaintenanceLib.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 .../BaseCacheMaintenanceLib.inf   |   6 +-
 .../BaseCacheMaintenanceLib/LoongArchCache.c  | 254 ++
 2 files changed, 259 insertions(+), 1 deletion(-)
 create mode 100644 MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf 
b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
index 33114243d5..6fd9cbe5f6 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
@@ -7,6 +7,7 @@
 #  Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -24,7 +25,7 @@
 
 
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources.IA32]
@@ -45,6 +46,9 @@
 [Sources.RISCV64]
   RiscVCache.c
 
+[Sources.LOONGARCH64]
+  LoongArchCache.c
+
 [Packages]
   MdePkg/MdePkg.dec
 
diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c 
b/MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c
new file mode 100644
index 00..4c8773278c
--- /dev/null
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/LoongArchCache.c
@@ -0,0 +1,254 @@
+/** @file
+  Cache Maintenance Functions for LoongArch.
+  LoongArch cache maintenance functions has not yet been completed, and will 
added in later.
+  Functions are null functions now.
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+//
+// Include common header file for this module.
+//
+#include 
+#include 
+#include 
+
+/**
+  LoongArch data barrier operation.
+**/
+VOID
+EFIAPI
+AsmDataBarrierLoongArch (
+  VOID
+  );
+
+/**
+  LoongArch instruction barrier operation.
+**/
+VOID
+EFIAPI
+AsmInstructionBarrierLoongArch (
+  VOID
+  );
+
+/**
+  Invalidates the entire instruction cache in cache coherency domain of the
+  calling CPU.
+
+**/
+VOID
+EFIAPI
+InvalidateInstructionCache (
+  VOID
+  )
+{
+  AsmInstructionBarrierLoongArch ();
+}
+
+/**
+  Invalidates a range of instruction cache lines in the cache coherency domain
+  of the calling CPU.
+
+  Invalidates the instruction cache lines specified by Address and Length. If
+  Address is not aligned on a cache line boundary, then entire instruction
+  cache line containing Address is invalidated. If Address + Length is not
+  aligned on a cache line boundary, then the entire instruction cache line
+  containing Address + Length -1 is invalidated. This function may choose to
+  invalidate the entire instruction cache if that is more efficient than
+  invalidating the specified range. If Length is 0, the no instruction cache
+  lines are invalidated. Address is returned.
+
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
+
+  @param[in]  Address The base address of the instruction cache lines to
+  invalidate. If the CPU is in a physical addressing mode, then
+  Address is a physical address. If the CPU is in a virtual
+  addressing mode, then Address is a virtual address.
+
+  @param[in]  Length  The number of bytes to invalidate from the instruction 
cache.
+
+  @return Address.
+
+**/
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+  IN   VOID   *Address,
+  IN   UINTN  Length
+  )
+{
+  AsmInstructionBarrierLoongArch ();
+  return Address;
+}
+
+/**
+  Writes Back and Invalidates the entire data cache in cache coherency domain
+  of the calling CPU.
+
+  Writes Back and Invalidates the entire data cache in cache coherency domain
+  of the calling CPU. This function guarantees that all dirty cache lines are
+  written back to system memory, and also invalidates all the data cache lines
+  in the cache coherency domain of the calling CPU.
+
+**/
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+  VOID
+  )
+{
+  DEBUG ((DEBUG_ERROR, "%a: Not currently implemented on LoongArch.\n", 
__FUNCTION__));
+}
+
+/**
+  Writes Back and Invalidates a range of data cache lines in the cache
+  coherency domain of the calling CPU.
+
+  Writes Back and Invalidate the data cache lines specified by Address and
+  Length. If Address is not aligned on a cache line boundary, then entire data
+  cache line containing Address is written back and invalidated. If Address +
+  Length is not aligned on a ca

[edk2-devel] [PATCH v3 22/34] MdePkg: Add LoongArch LOONGARCH64 binding

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH64 sections in MdePkg.dec and LOONGARCH64 ProcessorBind.h

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Dongyan Qian 

Reviewed-by: Michael D Kinney 
---
 MdePkg/Include/LoongArch64/ProcessorBind.h | 120 +
 MdePkg/MdePkg.dec  |   4 +
 MdePkg/MdePkg.dsc  |   3 +-
 3 files changed, 126 insertions(+), 1 deletion(-)
 create mode 100644 MdePkg/Include/LoongArch64/ProcessorBind.h

diff --git a/MdePkg/Include/LoongArch64/ProcessorBind.h 
b/MdePkg/Include/LoongArch64/ProcessorBind.h
new file mode 100644
index 00..502d479099
--- /dev/null
+++ b/MdePkg/Include/LoongArch64/ProcessorBind.h
@@ -0,0 +1,120 @@
+/** @file
+  Processor or Compiler specific defines and types for LoongArch
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef PROCESSOR_BIND_H_
+#define PROCESSOR_BIND_H_
+
+//
+// Define the processor type so other code can make processor based choices
+//
+#define MDE_CPU_LOONGARCH64
+
+#define EFIAPI
+
+//
+// Make sure we are using the correct packing rules per EFI specification
+//
+#ifndef __GNUC__
+  #pragma pack()
+#endif
+
+//
+// Assume standard LoongArch 64-bit alignment.
+// Need to check portability of long long
+//
+typedef unsigned long   UINT64;
+typedef longINT64;
+typedef unsigned intUINT32;
+typedef int INT32;
+typedef unsigned short  UINT16;
+typedef unsigned short  CHAR16;
+typedef short   INT16;
+typedef unsigned char   BOOLEAN;
+typedef unsigned char   UINT8;
+typedef charCHAR8;
+typedef charINT8;
+
+//
+// Unsigned value of native width.  (4 bytes on supported 32-bit processor 
instructions,
+// 8 bytes on supported 64-bit processor instructions)
+//
+
+typedef UINT64 UINTN;
+
+//
+// Signed value of native width.  (4 bytes on supported 32-bit processor 
instructions,
+// 8 bytes on supported 64-bit processor instructions)
+//
+typedef INT64 INTN;
+
+//
+// Processor specific defines
+//
+
+//
+// A value of native width with the highest bit set.
+//
+#define MAX_BIT  0x8000ULL
+//
+// A value of native width with the two highest bits set.
+//
+#define MAX_2_BITS  0xC000ULL
+
+//
+// Maximum legal LoongArch 64-bit address
+//
+#define MAX_ADDRESS  0xULL
+
+//
+// Maximum usable address at boot time (48 bits using 4KB pages)
+//
+#define MAX_ALLOC_ADDRESS  0xULL
+
+//
+// Maximum legal LoongArch  64-bit INTN and UINTN values.
+//
+#define MAX_INTN   ((INTN)0x7FFFULL)
+#define MAX_UINTN  ((UINTN)0xULL)
+
+//
+// Page allocation granularity for LoongArch
+//
+#define DEFAULT_PAGE_ALLOCATION_GRANULARITY  (0x1000)
+#define RUNTIME_PAGE_ALLOCATION_GRANULARITY  (0x1)
+
+#if defined (__GNUC__)
+//
+// For GNU assembly code, .global or .globl can declare global symbols.
+// Define this macro to unify the usage.
+//
+#define ASM_GLOBAL  .globl
+#endif
+
+//
+// The stack alignment required for LoongArch
+//
+#define CPU_STACK_ALIGNMENT  16
+
+/**
+  Return the pointer to the first instruction of a function given a function 
pointer.
+  On LOONGARCH CPU architectures, these two pointer values are the same,
+  so the implementation of this macro is very simple.
+
+  @param  FunctionPointer   A pointer to a function.
+
+  @return The pointer to the first instruction of a function given a function 
pointer.
+
+**/
+#define FUNCTION_ENTRY_POINT(FunctionPointer)  (VOID *)(UINTN)(FunctionPointer)
+
+#ifndef __USER_LABEL_PREFIX__
+#define __USER_LABEL_PREFIX__
+#endif
+
+#endif
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index f1ebf9e251..4c81cbd75a 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -7,6 +7,7 @@
 # Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
 # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 # (C) Copyright 2016 - 2021 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -43,6 +44,9 @@
 [Includes.RISCV64]
   Include/RiscV64
 
+[Includes.LOONGARCH64]
+  Include/LoongArch64
+
 [LibraryClasses]
   ##  @libraryclass  Provides most usb APIs to support the Hid requests 
defined in Usb Hid 1.1 spec
   #  and the standard requests defined in Usb 1.1 spec.
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index cc1ac196a9..493a13ec91 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -4,6 +4,7 @@
 # Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
 # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 # (C) Copyright 2020 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2022, L

[edk2-devel] [PATCH v3 23/34] MdePkg/Include: LoongArch definitions.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch processor related definitions.

For the Http boot and PXE boot types seeing this URL section "Processor
Architecture Type" for the LOONGARCH values:
https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml

For definitions of PE/COFF and LOONGARCH relocation types, see the
"Machine Types" and "Basic Relocation Types" sections of this URL for
LOONGARCH values:
https://docs.microsoft.com/en-us/windows/win32/debug/pe-format

For the register definitions of exceptions context, see the UEFI V2.10
18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH
definitions:
https://uefi.org/specs/UEFI/2.10/18_Protocols_Debugger_Support.html

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
Reviewed-by: Liming Gao 
---
 MdePkg/Include/IndustryStandard/PeImage.h |   9 ++
 MdePkg/Include/Protocol/DebugSupport.h| 107 --
 MdePkg/Include/Protocol/PxeBaseCode.h |   3 +
 MdePkg/Include/Uefi/UefiBaseType.h|  14 +++
 MdePkg/Include/Uefi/UefiSpec.h|  16 ++--
 5 files changed, 136 insertions(+), 13 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/PeImage.h 
b/MdePkg/Include/IndustryStandard/PeImage.h
index 3109dc20f8..dd4cc25483 100644
--- a/MdePkg/Include/IndustryStandard/PeImage.h
+++ b/MdePkg/Include/IndustryStandard/PeImage.h
@@ -10,6 +10,7 @@
 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
 Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. 
All rights reserved.
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -38,6 +39,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define IMAGE_FILE_MACHINE_RISCV32 0x5032
 #define IMAGE_FILE_MACHINE_RISCV64 0x5064
 #define IMAGE_FILE_MACHINE_RISCV1280x5128
+#define IMAGE_FILE_MACHINE_LOONGARCH32 0x6232
+#define IMAGE_FILE_MACHINE_LOONGARCH64 0x6264
 
 //
 // EXE file formats
@@ -503,6 +506,12 @@ typedef struct {
 #define EFI_IMAGE_REL_BASED_RISCV_LOW12I  7
 #define EFI_IMAGE_REL_BASED_RISCV_LOW12S  8
 
+//
+// Relocation types of LoongArch processor.
+//
+#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA  8
+#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA  8
+
 ///
 /// Line number format.
 ///
diff --git a/MdePkg/Include/Protocol/DebugSupport.h 
b/MdePkg/Include/Protocol/DebugSupport.h
index ec5b92a5c5..2b0ae2d157 100644
--- a/MdePkg/Include/Protocol/DebugSupport.h
+++ b/MdePkg/Include/Protocol/DebugSupport.h
@@ -654,17 +654,110 @@ typedef struct {
   UINT64X31;
 } EFI_SYSTEM_CONTEXT_RISCV64;
 
+//
+// LoongArch processor exception types.
+//
+#define EXCEPT_LOONGARCH_INT   0
+#define EXCEPT_LOONGARCH_PIL   1
+#define EXCEPT_LOONGARCH_PIS   2
+#define EXCEPT_LOONGARCH_PIF   3
+#define EXCEPT_LOONGARCH_PME   4
+#define EXCEPT_LOONGARCH_PNR   5
+#define EXCEPT_LOONGARCH_PNX   6
+#define EXCEPT_LOONGARCH_PPI   7
+#define EXCEPT_LOONGARCH_ADE   8
+#define EXCEPT_LOONGARCH_ALE   9
+#define EXCEPT_LOONGARCH_BCE   10
+#define EXCEPT_LOONGARCH_SYS   11
+#define EXCEPT_LOONGARCH_BRK   12
+#define EXCEPT_LOONGARCH_INE   13
+#define EXCEPT_LOONGARCH_IPE   14
+#define EXCEPT_LOONGARCH_FPD   15
+#define EXCEPT_LOONGARCH_SXD   16
+#define EXCEPT_LOONGARCH_ASXD  17
+#define EXCEPT_LOONGARCH_FPE   18
+#define EXCEPT_LOONGARCH_TBR   64 // For code only, there is no such type in 
the ISA spec, the TLB refill is defined for an independent exception.
+
+//
+// LoongArch processor Interrupt types.
+//
+#define EXCEPT_LOONGARCH_INT_SIP0   0
+#define EXCEPT_LOONGARCH_INT_SIP1   1
+#define EXCEPT_LOONGARCH_INT_IP02
+#define EXCEPT_LOONGARCH_INT_IP13
+#define EXCEPT_LOONGARCH_INT_IP24
+#define EXCEPT_LOONGARCH_INT_IP35
+#define EXCEPT_LOONGARCH_INT_IP46
+#define EXCEPT_LOONGARCH_INT_IP57
+#define EXCEPT_LOONGARCH_INT_IP68
+#define EXCEPT_LOONGARCH_INT_IP79
+#define EXCEPT_LOONGARCH_INT_PMC10
+#define EXCEPT_LOONGARCH_INT_TIMER  11
+#define EXCEPT_LOONGARCH_INT_IPI12
+
+//
+// For coding convenience, define the maximum valid
+// LoongArch interrupt.
+//
+#define MAX_LOONGARCH_INTERRUPT  14
+
+typedef struct {
+  UINT64R0;
+  UINT64R1;
+  UINT64R2;
+  UINT64R3;
+  UINT64R4;
+  UINT64R5;
+  UINT64R6;
+  UINT64R7;
+  UINT64R8;
+  UINT64R9;
+  UINT64R10;
+  UINT64R11;
+  UINT64R12;
+  UINT64R13;
+  UINT64R14;
+  UINT64R15;
+  UINT64R16;
+  UINT64R17;
+  UINT64R18;
+  UINT64R19;
+  UINT64R20;
+  UINT64R21;
+  UINT64R22;
+  UINT64R23;
+  UINT64R24;
+  UINT64R25;
+  UINT64R26;
+  UINT64R27;
+  UINT64R28;
+  UINT64R29;
+  UINT64R30;
+  UINT64R31;
+
+  UINT64CRMD;  // CuRrent MoDe information
+  U

[edk2-devel] [PATCH v3 21/34] .pytool: Add LoongArch64 architecture on LoongArch64 EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch64 architecture on LoongArch64 EDK2 CI testing.

Cc: Michael D Kinney 
Cc: Liming Gao 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 .pytool/CISettings.py | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/.pytool/CISettings.py b/.pytool/CISettings.py
index cf9e0d77b1..7ebec0ba0a 100644
--- a/.pytool/CISettings.py
+++ b/.pytool/CISettings.py
@@ -79,7 +79,8 @@ class Settings(CiBuildSettingsManager, UpdateSettingsManager, 
SetupSettingsManag
 "X64",
 "ARM",
 "AARCH64",
-"RISCV64")
+"RISCV64",
+"LOONGARCH64")
 
 def GetTargetsSupported(self):
 ''' return iterable of edk2 target tags supported by this build '''
@@ -170,6 +171,8 @@ class Settings(CiBuildSettingsManager, 
UpdateSettingsManager, SetupSettingsManag
 scopes += ("gcc_arm_linux",)
 if "RISCV64" in self.ActualArchitectures:
 scopes += ("gcc_riscv64_unknown",)
+if "LOONGARCH64" in self.ActualArchitectures:
+scopes += ("gcc_loongarch64_unknown_linux",)
 self.ActualScopes = scopes
 return self.ActualScopes
 
-- 
2.27.0



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[edk2-devel] [PATCH v3 19/34] BaseTools: Enable LoongArch64 architecture for LoongArch64 EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

EDK CI for LoongArch64 architecture

Enable LoongArch64 architecture for LoongArch64 EDK2 CI testing.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 ...gcc_loongarch64_unknown_linux_ext_dep.yaml | 22 +
 .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py  | 31 +++
 2 files changed, 53 insertions(+)
 create mode 100644 BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml

diff --git a/BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml 
b/BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml
new file mode 100644
index 00..ac18438080
--- /dev/null
+++ b/BaseTools/Bin/gcc_loongarch64_unknown_linux_ext_dep.yaml
@@ -0,0 +1,22 @@
+## @file
+# Download GCC LoongArch64 compiler from LoongArch GitHub release site
+# Set shell variable GCC5_LOONGARCH64_INSTALL to this folder
+#
+# This is only downloaded when a build activates scope 
gcc_loongarch64_unknown_linux
+#
+# Copyright (c) Microsoft Corporation.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+{
+  "scope": "gcc_loongarch64_unknown_linux",
+  "type": "web",
+  "name": "gcc_loongarch64_unknown_linux",
+  
"source":"https://github.com/loongson/build-tools/releases/download/2022.09.06/loongarch64-clfs-6.3-cross-tools-gcc-full.tar.xz";,
+  "version": "13.0.0",
+  "sha256":"27a43c5bb127794f091d0e75da0003c4d0eec28a958d8f2cc7cd290a6e6133ab",
+  "compression_type": "tar",
+  "internal_path": "/cross-tools/",
+  "flags": ["set_shell_var", ],
+  "var_name": "GCC5_LOONGARCH64_INSTALL"
+}
diff --git a/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py 
b/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
index f0685d8040..dab7a87997 100644
--- a/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
+++ b/BaseTools/Plugin/LinuxGcc5ToolChain/LinuxGcc5ToolChain.py
@@ -5,6 +5,7 @@
 #
 # Copyright (c) Microsoft Corporation
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 ##
 import os
@@ -43,6 +44,12 @@ class LinuxGcc5ToolChain(IUefiBuildPlugin):
 self.Logger.critical("Failed in check riscv64")
 return ret
 
+# Check LoongArch64 compiler
+ret = self._check_loongarch64()
+if ret != 0:
+self.Logger.critical("Failed in check loongarch64")
+return ret
+
 return 0
 
 def _check_arm(self):
@@ -121,3 +128,27 @@ class LinuxGcc5ToolChain(IUefiBuildPlugin):
 shell_environment.GetEnvironment().set_shell_var("LD_LIBRARY_PATH", 
prefix)
 
 return 0
+
+def _check_loongarch64(self):
+# check to see if full path already configured
+if 
shell_environment.GetEnvironment().get_shell_var("GCC5_LOONGARCH64_PREFIX") is 
not None:
+self.Logger.info("GCC5_LOONGARCH64_PREFIX is already set.")
+
+else:
+# now check for install dir.  If set then set the Prefix
+install_path = shell_environment.GetEnvironment(
+).get_shell_var("GCC5_LOONGARCH64_INSTALL")
+if install_path is None:
+return 0
+
+# make GCC5_LOONGARCH64_PREFIX to align with tools_def.txt
+prefix = os.path.join(install_path, "bin", 
"loongarch64-unknown-linux-gnu-")
+
shell_environment.GetEnvironment().set_shell_var("GCC5_LOONGARCH64_PREFIX", 
prefix)
+
+# now confirm it exists
+if not 
os.path.exists(shell_environment.GetEnvironment().get_shell_var("GCC5_LOONGARCH64_PREFIX")
 + "gcc"):
+self.Logger.error(
+"Path for GCC5_LOONGARCH64_PREFIX toolchain is invalid")
+return -2
+
+return 0
-- 
2.27.0



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[edk2-devel] [PATCH v3 20/34] .azurepipelines: Add LoongArch64 architecture on LoongArch64 EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch64 architecture on LoongArch64 EDK2 CI.

Cc: Michael D Kinney 
Cc: Liming Gao 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 .azurepipelines/Ubuntu-GCC5.yml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/.azurepipelines/Ubuntu-GCC5.yml b/.azurepipelines/Ubuntu-GCC5.yml
index 3760c6efe1..1acd8d2a46 100644
--- a/.azurepipelines/Ubuntu-GCC5.yml
+++ b/.azurepipelines/Ubuntu-GCC5.yml
@@ -3,6 +3,7 @@
 #
 # Copyright (c) Microsoft Corporation.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 ##
 trigger:
@@ -17,5 +18,5 @@ jobs:
   parameters:
 tool_chain_tag: 'GCC5'
 vm_image: 'ubuntu-latest'
-arch_list: "IA32,X64,ARM,AARCH64,RISCV64"
+arch_list: "IA32,X64,ARM,AARCH64,RISCV64,LOONGARCH64"
 
-- 
2.27.0



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[edk2-devel] [PATCH v3 17/34] BaseTools: Updated build tools to support new LoongArch.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Python code changes for building EDK2 LoongArch platform.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 

Reviewed-by: Liming Gao 
---
 BaseTools/Source/Python/Common/DataType.py| 21 ++--
 .../Source/Python/UPT/Library/DataType.py | 24 ++-
 BaseTools/Source/Python/build/buildoptions.py |  3 ++-
 3 files changed, 44 insertions(+), 4 deletions(-)

diff --git a/BaseTools/Source/Python/Common/DataType.py 
b/BaseTools/Source/Python/Common/DataType.py
index dc4962..48dbf16495 100644
--- a/BaseTools/Source/Python/Common/DataType.py
+++ b/BaseTools/Source/Python/Common/DataType.py
@@ -4,6 +4,7 @@
 # Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
 # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 # Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 
 ##
@@ -52,10 +53,10 @@ TAB_ARCH_X64 = 'X64'
 TAB_ARCH_ARM = 'ARM'
 TAB_ARCH_EBC = 'EBC'
 TAB_ARCH_AARCH64 = 'AARCH64'
-
 TAB_ARCH_RISCV64 = 'RISCV64'
+TAB_ARCH_LOONGARCH64 = 'LOONGARCH64'
 
-ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC, 
TAB_ARCH_AARCH64, TAB_ARCH_RISCV64, TAB_ARCH_COMMON}
+ARCH_SET_FULL = {TAB_ARCH_IA32, TAB_ARCH_X64, TAB_ARCH_ARM, TAB_ARCH_EBC, 
TAB_ARCH_AARCH64, TAB_ARCH_RISCV64, TAB_ARCH_LOONGARCH64, TAB_ARCH_COMMON}
 
 SUP_MODULE_BASE = 'BASE'
 SUP_MODULE_SEC = 'SEC'
@@ -138,6 +139,7 @@ TAB_SOURCES_X64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_X64
 TAB_SOURCES_ARM = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_SOURCES_EBC = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_SOURCES_AARCH64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_SOURCES_LOONGARCH64 = TAB_SOURCES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_BINARIES = 'Binaries'
 TAB_BINARIES_COMMON = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_COMMON
@@ -146,6 +148,7 @@ TAB_BINARIES_X64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_X64
 TAB_BINARIES_ARM = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_BINARIES_EBC = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_BINARIES_AARCH64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_BINARIES_LOONGARCH64 = TAB_BINARIES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_INCLUDES = 'Includes'
 TAB_INCLUDES_COMMON = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_COMMON
@@ -154,6 +157,7 @@ TAB_INCLUDES_X64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_X64
 TAB_INCLUDES_ARM = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_INCLUDES_EBC = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_INCLUDES_AARCH64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_INCLUDES_LOONGARCH64 = TAB_INCLUDES + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_GUIDS = 'Guids'
 TAB_GUIDS_COMMON = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_COMMON
@@ -162,6 +166,7 @@ TAB_GUIDS_X64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_X64
 TAB_GUIDS_ARM = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_ARM
 TAB_GUIDS_EBC = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_EBC
 TAB_GUIDS_AARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_GUIDS_LOONGARCH64 = TAB_GUIDS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_PROTOCOLS = 'Protocols'
 TAB_PROTOCOLS_COMMON = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_COMMON
@@ -170,6 +175,7 @@ TAB_PROTOCOLS_X64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_X64
 TAB_PROTOCOLS_ARM = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_ARM
 TAB_PROTOCOLS_EBC = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_EBC
 TAB_PROTOCOLS_AARCH64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_PROTOCOLS_LOONGARCH64 = TAB_PROTOCOLS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_PPIS = 'Ppis'
 TAB_PPIS_COMMON = TAB_PPIS + TAB_SPLIT + TAB_ARCH_COMMON
@@ -178,6 +184,7 @@ TAB_PPIS_X64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_X64
 TAB_PPIS_ARM = TAB_PPIS + TAB_SPLIT + TAB_ARCH_ARM
 TAB_PPIS_EBC = TAB_PPIS + TAB_SPLIT + TAB_ARCH_EBC
 TAB_PPIS_AARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_PPIS_LOONGARCH64 = TAB_PPIS + TAB_SPLIT + TAB_ARCH_LOONGARCH64
 
 TAB_LIBRARY_CLASSES = 'LibraryClasses'
 TAB_LIBRARY_CLASSES_COMMON = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_COMMON
@@ -186,6 +193,7 @@ TAB_LIBRARY_CLASSES_X64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + 
TAB_ARCH_X64
 TAB_LIBRARY_CLASSES_ARM = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_LIBRARY_CLASSES_EBC = TAB_LIBRARY_CLASSES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_LIBRARY_CLASSES_AARCH64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + 
TAB_ARCH_AARCH64
+TAB_LIBRARY_CLASSES_LOONGARCH64 = TAB_LIBRARY_CLASSES + TAB_SPLIT + 
TAB_ARCH_LOONGARCH64
 
 TAB_PACKAGES = 'Packages'
 TAB_PACKAGES_COMMON = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_COMMON
@@ -194,6 +202,7 @@ TAB_PACKAGES_X64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_X64
 TAB_PACKAGES_ARM = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_ARM
 TAB_PACKAGES_EBC = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_EBC
 TAB_PACKAGES_AARCH64 = TAB_PACKAGES + TAB_SPLIT + TAB_ARCH_AARCH64
+TAB_PAC

[edk2-devel] [PATCH v3 18/34] BaseTools: Add LoongArch64 binding.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LoongArch64 ProcessorBin.h and add LoongArch to Makefiles.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 
Co-authored-by: Baoqi Zhang 

Reviewed-by: Liming Gao 
---
 BaseTools/Source/C/GNUmakefile|  3 +
 .../C/Include/LoongArch64/ProcessorBind.h | 80 +++
 2 files changed, 83 insertions(+)
 create mode 100644 BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h

diff --git a/BaseTools/Source/C/GNUmakefile b/BaseTools/Source/C/GNUmakefile
index 8c191e0c38..5275f657ef 100644
--- a/BaseTools/Source/C/GNUmakefile
+++ b/BaseTools/Source/C/GNUmakefile
@@ -29,6 +29,9 @@ ifndef HOST_ARCH
   ifneq (,$(findstring riscv64,$(uname_m)))
 HOST_ARCH=RISCV64
   endif
+  ifneq (,$(findstring loongarch64,$(uname_m)))
+HOST_ARCH=LOONGARCH64
+  endif
   ifndef HOST_ARCH
 $(info Could not detected HOST_ARCH from uname results)
 $(error HOST_ARCH is not defined!)
diff --git a/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h 
b/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h
new file mode 100644
index 00..0267859dee
--- /dev/null
+++ b/BaseTools/Source/C/Include/LoongArch64/ProcessorBind.h
@@ -0,0 +1,80 @@
+/** @file
+  Processor or Compiler specific defines and types for LoongArch
+
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef PROCESSOR_BIND_H_
+#define PROCESSOR_BIND_H_
+
+//
+// Define the processor type so other code can make processor based choices
+//
+#define MDE_CPU_LOONGARCH64
+
+#define EFIAPI
+
+//
+// Make sure we are using the correct packing rules per EFI specification
+//
+#ifndef __GNUC__
+#pragma pack()
+#endif
+
+//
+// Use ANSI C 2000 stdint.h integer width declarations
+//
+#include 
+typedef uint8_t   BOOLEAN;
+typedef int8_tINT8;
+typedef uint8_t   UINT8;
+typedef int16_t   INT16;
+typedef uint16_t  UINT16;
+typedef int32_t   INT32;
+typedef uint32_t  UINT32;
+typedef int64_t   INT64;
+typedef uint64_t  UINT64;
+typedef char  CHAR8;
+typedef uint16_t  CHAR16;
+
+//
+// Unsigned value of native width.  (4 bytes on supported 32-bit processor 
instructions,
+// 8 bytes on supported 64-bit processor instructions)
+//
+typedef UINT64 UINTN;
+
+//
+// Signed value of native width.  (4 bytes on supported 32-bit processor 
instructions,
+// 8 bytes on supported 64-bit processor instructions)
+//
+typedef INT64 INTN;
+
+//
+// Processor specific defines
+//
+
+//
+// A value of native width with the highest bit set.
+//
+#define MAX_BIT  0x8000ULL
+//
+// A value of native width with the two highest bits set.
+//
+#define MAX_2_BITS  0xC000ULL
+
+#if defined (__GNUC__)
+//
+// For GNU assembly code, .global or .globl can declare global symbols.
+// Define this macro to unify the usage.
+//
+#define ASM_GLOBAL  .globl
+#endif
+
+//
+// The stack alignment required for LoongArch
+//
+#define CPU_STACK_ALIGNMENT  16
+
+#endif
-- 
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[edk2-devel] [PATCH v3 15/34] BaseTools: Update GenFw/GenFv to support LoongArch platform.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

C code changes for building EDK2 LoongArch platform.

For definitions of PE/COFF and LOONGARCH relocation types, see the
"Machine Types" and "Basic Relocation Types" sections of this URL for
LOONGARCH values:
https://docs.microsoft.com/en-us/windows/win32/debug/pe-format

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 
Co-authored-by: Dongyan Qian 
Co-authored-by: Baoqi Zhang 
Co-authored-by: Yang Zhou 
Co-authored-by: Xiaotian Wu 

Reviewed-by: Liming Gao 
---
 BaseTools/Source/C/Common/BasePeCoff.c|  15 +-
 BaseTools/Source/C/Common/PeCoffLoaderEx.c|  79 +
 BaseTools/Source/C/GenFv/GenFvInternalLib.c   | 125 +++-
 BaseTools/Source/C/GenFw/Elf64Convert.c   | 293 +-
 BaseTools/Source/C/GenFw/elf_common.h |  94 ++
 .../C/Include/IndustryStandard/PeImage.h  |  57 ++--
 BaseTools/Source/C/Makefiles/header.makefile  |   6 +
 7 files changed, 636 insertions(+), 33 deletions(-)

diff --git a/BaseTools/Source/C/Common/BasePeCoff.c 
b/BaseTools/Source/C/Common/BasePeCoff.c
index 62fbb2985c..30400d1341 100644
--- a/BaseTools/Source/C/Common/BasePeCoff.c
+++ b/BaseTools/Source/C/Common/BasePeCoff.c
@@ -5,6 +5,7 @@
 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All 
rights reserved.
+Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All 
rights reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -68,6 +69,14 @@ PeCoffLoaderRelocateRiscVImage (
   IN UINT64  Adjust
   );
 
+RETURN_STATUS
+PeCoffLoaderRelocateLoongArch64Image (
+  IN UINT16  *Reloc,
+  IN OUT CHAR8   *Fixup,
+  IN OUT CHAR8   **FixupData,
+  IN UINT64  Adjust
+  );
+
 STATIC
 RETURN_STATUS
 PeCoffLoaderGetPeHeader (
@@ -184,7 +193,8 @@ Returns:
   ImageContext->Machine != EFI_IMAGE_MACHINE_ARMT && \
   ImageContext->Machine != EFI_IMAGE_MACHINE_EBC  && \
   ImageContext->Machine != EFI_IMAGE_MACHINE_AARCH64 && \
-  ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64) {
+  ImageContext->Machine != EFI_IMAGE_MACHINE_RISCV64 && \
+  ImageContext->Machine != EFI_IMAGE_MACHINE_LOONGARCH64) {
 if (ImageContext->Machine == IMAGE_FILE_MACHINE_ARM) {
   //
   // There are two types of ARM images. Pure ARM and ARM/Thumb.
@@ -815,6 +825,9 @@ Returns:
 case EFI_IMAGE_MACHINE_RISCV64:
   Status = PeCoffLoaderRelocateRiscVImage (Reloc, Fixup, &FixupData, 
Adjust);
   break;
+case EFI_IMAGE_MACHINE_LOONGARCH64:
+  Status = PeCoffLoaderRelocateLoongArch64Image (Reloc, Fixup, 
&FixupData, Adjust);
+  break;
 default:
   Status = RETURN_UNSUPPORTED;
   break;
diff --git a/BaseTools/Source/C/Common/PeCoffLoaderEx.c 
b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
index 799f282970..2cc428d733 100644
--- a/BaseTools/Source/C/Common/PeCoffLoaderEx.c
+++ b/BaseTools/Source/C/Common/PeCoffLoaderEx.c
@@ -4,6 +4,7 @@ IA32 and X64 Specific relocation fixups
 Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.
 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
 Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 --*/
@@ -332,3 +333,81 @@ PeCoffLoaderRelocateArmImage (
 
   return RETURN_SUCCESS;
 }
+
+/**
+  Performs a LoongArch specific relocation fixup.
+
+  @param[in]   Reloc   Pointer to the relocation record.
+  @param[in, out]  Fixup   Pointer to the address to fix up.
+  @param[in, out]  FixupData   Pointer to a buffer to log the fixups.
+  @param[in]   Adjust  The offset to adjust the fixup.
+
+  @return Status code.
+**/
+RETURN_STATUS
+PeCoffLoaderRelocateLoongArch64Image (
+  IN UINT16 *Reloc,
+  IN OUT CHAR8  *Fixup,
+  IN OUT CHAR8  **FixupData,
+  IN UINT64 Adjust
+  )
+{
+  UINT8  RelocType;
+  UINT64 Value;
+  UINT64 Tmp1;
+  UINT64 Tmp2;
+
+  RelocType = ((*Reloc) >> 12);
+  Value = 0;
+  Tmp1  = 0;
+  Tmp2  = 0;
+
+  switch (RelocType) {
+case EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA:
+  // The next four instructions are used to load a 64 bit address, 
relocate all of them
+  Value = (*(UINT32 *)Fixup & 0x1e0) << 7 |   // lu12i.w 20bits 
from bit5
+  (*((UINT32 *)Fixup + 1) & 0x3ffc00) >> 10;  // ori 12bits 
from bit10
+  Tmp1   = *((UINT32 *)Fixup + 2) & 0x1e0;// lu32i.d 20bits 
from bit5
+  Tmp2   = *((UINT32 *)Fixup + 3) & 0x3ffc00; // lu52i.d 12bits 
from bit10
+  Value  = Value | (Tmp1 << 27) | (Tmp2 << 42);
+  Value += Adjust;
+
+  *(UINT32 *)Fixup = (*(UINT32 *)Fixup & ~0x1e0) | (((Value >> 12) & 
0xf)

[edk2-devel] [PATCH v3 16/34] BaseTools: Updated for GCC5 tool chain for LoongArch platfrom.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

BaseTools define template files changes for building EDK2 LoongArch
platform.

Cc: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 

Signed-off-by: Chao Li 
Co-authored-by: Dongyan Qian 
Co-authored-by: Baoqi Zhang 

Reviewed-by: Liming Gao 
---
 BaseTools/Conf/tools_def.template | 54 +++
 1 file changed, 48 insertions(+), 6 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template 
b/BaseTools/Conf/tools_def.template
index 5ed19810b7..9ceadeaa59 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -4,6 +4,7 @@
 #  Portions copyright (c) 2011 - 2019, ARM Ltd. All rights reserved.
 #  Copyright (c) 2015, Hewlett-Packard Development Company, L.P.
 #  (C) Copyright 2020, Hewlett Packard Enterprise Development LP
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  Copyright (c) Microsoft Corporation
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -267,7 +268,7 @@ DEFINE DTC_BIN = ENV(DTC_PREFIX)dtc
 #   Intel(r) ACPI Compiler from
 #   https://acpica.org/downloads
 #   GCC5-Linux,Windows-  Requires:
-# GCC 5 with LTO support, targeting 
x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnueabi or riscv64-linux-gnu
+# GCC 5 with LTO support, targeting 
x86_64-linux-gnu, aarch64-linux-gnu, arm-linux-gnueabi, riscv64-linux-gnu or 
loongarch64-linux-gnu
 #Optional:
 # Required to build platforms or ACPI tables:
 #   Intel(r) ACPI Compiler from
@@ -1852,6 +1853,7 @@ DEFINE GCC_ALL_CC_FLAGS= -g -Os -fshort-wchar 
-fno-builtin -fno-stri
 DEFINE GCC_IA32_CC_FLAGS   = DEF(GCC_ALL_CC_FLAGS) -m32 -malign-double 
-freorder-blocks -freorder-blocks-and-partition -O2 -mno-stack-arg-probe
 DEFINE GCC_X64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mno-red-zone 
-Wno-address -mno-stack-arg-probe
 DEFINE GCC_ARM_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-mabi=aapcs -fno-short-enums -funsigned-char -ffunction-sections 
-fdata-sections -fomit-frame-pointer -Wno-address -mthumb -mfloat-abi=soft 
-fno-pic -fno-pie
+DEFINE GCC_LOONGARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mabi=lp64d 
-fno-asynchronous-unwind-tables -fno-plt -Wno-address -fno-short-enums 
-fsigned-char -ffunction-sections -fdata-sections
 DEFINE GCC_ARM_CC_XIPFLAGS = -mno-unaligned-access
 DEFINE GCC_AARCH64_CC_FLAGS= DEF(GCC_ALL_CC_FLAGS) -mlittle-endian 
-fno-short-enums -fverbose-asm -funsigned-char  -ffunction-sections 
-fdata-sections -Wno-address -fno-asynchronous-unwind-tables -fno-unwind-tables 
-fno-pic -fno-pie -ffixed-x18
 DEFINE GCC_AARCH64_CC_XIPFLAGS = -mstrict-align -mgeneral-regs-only
@@ -1859,12 +1861,15 @@ DEFINE GCC_DLINK_FLAGS_COMMON  = -nostdlib --pie
 DEFINE GCC_DLINK2_FLAGS_COMMON = 
-Wl,--script=$(EDK_TOOLS_PATH)/Scripts/GccBase.lds
 DEFINE GCC_IA32_X64_DLINK_COMMON   = DEF(GCC_DLINK_FLAGS_COMMON) --gc-sections
 DEFINE GCC_ARM_AARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib 
-Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) 
-Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
+DEFINE GCC_LOONGARCH64_DLINK_COMMON= -Wl,--emit-relocs -nostdlib 
-Wl,--gc-sections -u $(IMAGE_ENTRY_POINT) 
-Wl,-e,$(IMAGE_ENTRY_POINT),-Map,$(DEST_DIR_DEBUG)/$(BASE_NAME).map
 DEFINE GCC_ARM_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z 
common-page-size=0x20 -Wl,--pic-veneer
 DEFINE GCC_AARCH64_DLINK_FLAGS = DEF(GCC_ARM_AARCH64_DLINK_COMMON) -z 
common-page-size=0x20
+DEFINE GCC_LOONGARCH64_DLINK_FLAGS = DEF(GCC_LOONGARCH64_DLINK_COMMON) -z 
common-page-size=0x20
 DEFINE GCC_ARM_AARCH64_ASLDLINK_FLAGS = -Wl,--defsym=PECOFF_HEADER_SIZE=0 
DEF(GCC_DLINK2_FLAGS_COMMON) -z common-page-size=0x20
 DEFINE GCC_IA32_X64_ASLDLINK_FLAGS = DEF(GCC_IA32_X64_DLINK_COMMON) --entry 
_ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT)
 DEFINE GCC_ARM_ASLDLINK_FLAGS  = DEF(GCC_ARM_DLINK_FLAGS) 
-Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) 
DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS)
 DEFINE GCC_AARCH64_ASLDLINK_FLAGS  = DEF(GCC_AARCH64_DLINK_FLAGS) 
-Wl,--entry,ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT) 
DEF(GCC_ARM_AARCH64_ASLDLINK_FLAGS)
+DEFINE GCC_LOONGARCH64_ASLDLINK_FLAGS = DEF(GCC_LOONGARCH64_DLINK_FLAGS) 
--entry ReferenceAcpiTable -u $(IMAGE_ENTRY_POINT)
 DEFINE GCC_IA32_X64_DLINK_FLAGS= DEF(GCC_IA32_X64_DLINK_COMMON) --entry 
_$(IMAGE_ENTRY_POINT) --file-alignment 0x20 --section-alignment 0x20 -Map 
$(DEST_DIR_DEBUG)/$(BASE_NAME).map
 DEFINE GCC_ASM_FLAGS   = -c -x assembler -imacros AutoGen.h
 DEFINE GCC_PP_FLAGS= -E -x assembler-with-cpp -include 
AutoGen.h
@@ -1873,11 +1878,12 @@ DEFINE GCC_ASLPP_FLAGS = -x c -E -include 
AutoGen.h
 DEFINE GCC_ASLCC_FLAGS  

[edk2-devel] [PATCH v3 14/34] .python/SpellCheck: Add "Loongson" and "LOONGARCH" to "words" section

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add Loongson and LOONGARCH to "words" section in cspell.base.yaml file
to avoid spelling check error.

Cc: Michael D Kinney 
Cc: Liming Gao 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 .pytool/Plugin/SpellCheck/cspell.base.yaml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/.pytool/Plugin/SpellCheck/cspell.base.yaml 
b/.pytool/Plugin/SpellCheck/cspell.base.yaml
index f0d5791876..92e65ec6f6 100644
--- a/.pytool/Plugin/SpellCheck/cspell.base.yaml
+++ b/.pytool/Plugin/SpellCheck/cspell.base.yaml
@@ -289,6 +289,8 @@
 "unrecovered",
 "cmocka",
 "unenrolling",
-"unconfigure"
+"unconfigure",
+"Loongson",
+"LOONGARCH"
 ]
 }
-- 
2.27.0



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[edk2-devel] [PATCH v3 13/34] MdeModulePkg: Use LockBoxNullLib for LOONGARCH64

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

LoongArch doesn't have SMM by now.

Cc: Jian J Wang 
Cc: Liming Gao 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 MdeModulePkg/MdeModulePkg.dsc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index 45a8ec84ad..659482ab73 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -15,7 +15,7 @@
   PLATFORM_VERSION   = 0.98
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/MdeModule
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
@@ -193,7 +193,7 @@
   #
   NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf
 
-[LibraryClasses.EBC, LibraryClasses.RISCV64]
+[LibraryClasses.EBC, LibraryClasses.RISCV64, LibraryClasses.LOONGARCH64]
   LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf
 
 [PcdsFeatureFlag]
-- 
2.27.0



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[edk2-devel] [PATCH v3 12/34] MdePkg/DxeServicesLib: Add LOONGARCH64 architecture

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH64 architecture to MdePkg/DxeServiceLib.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 MdePkg/Library/DxeServicesLib/DxeServicesLib.inf | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf 
b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
index ec3e8711c2..a93541847f 100644
--- a/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+++ b/MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
@@ -22,13 +22,13 @@
   LIBRARY_CLASS  = DxeServicesLib|DXE_CORE DXE_DRIVER 
DXE_RUNTIME_DRIVER DXE_SMM_DRIVER SMM_CORE UEFI_APPLICATION UEFI_DRIVER
 
 #
-#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
   DxeServicesLib.c
 
-[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64]
+[Sources.IA32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64, 
Sources.LOONGARCH64]
   Allocate.c
 
 [Sources.X64]
-- 
2.27.0



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[edk2-devel] [PATCH v3 11/34] UnitTestFrameworkPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH64 architecture to UnitTestFramworkPkg for LOONGARCH64 EDK2
CI.

Cc: Michael D Kinney 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc 
b/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
index 23baef87d6..e4f9fb6eb6 100644
--- a/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
+++ b/UnitTestFrameworkPkg/UnitTestFrameworkPkg.dsc
@@ -3,6 +3,7 @@
 #
 # Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -14,7 +15,7 @@
   PLATFORM_VERSION= 1.00
   DSC_SPECIFICATION   = 0x00010005
   OUTPUT_DIRECTORY= Build/UnitTestFrameworkPkg
-  SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES = IA32|X64|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS   = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER= DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v3 10/34] ShellPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH64 architecture to ShellPkg for EDK2 CI testing.

Cc: Ray Ni 
Cc: Zhichao Gao 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
Reviewed-by: Zhichao Gao 
---
 ShellPkg/ShellPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc
index 38fde3dc71..dd0d88603f 100644
--- a/ShellPkg/ShellPkg.dsc
+++ b/ShellPkg/ShellPkg.dsc
@@ -4,6 +4,7 @@
 # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) 2018 - 2020, Arm Limited. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -15,7 +16,7 @@
   PLATFORM_VERSION   = 1.02
   DSC_SPECIFICATION  = 0x00010006
   OUTPUT_DIRECTORY   = Build/Shell
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v3 09/34] SecurityPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH64 architecture to SecurityPkg for EDK2 CI testing.

Cc: Jiewen Yao 
Cc: Jian J Wang 

Signed-off-by: Chao Li 

Reviewed-by: Jiewen Yao 
---
 SecurityPkg/SecurityPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/SecurityPkg/SecurityPkg.dsc b/SecurityPkg/SecurityPkg.dsc
index f48187650f..6bf53c5658 100644
--- a/SecurityPkg/SecurityPkg.dsc
+++ b/SecurityPkg/SecurityPkg.dsc
@@ -3,6 +3,7 @@
 #
 # Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved.
 # (C) Copyright 2015-2020 Hewlett Packard Enterprise Development LP
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -13,7 +14,7 @@
   PLATFORM_VERSION   = 0.98
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/SecurityPkg
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v3 08/34] MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

HTTP/PXE boot LOONGARCH64 related definitions for EDK2 CI.

For the LOONGARCH values, please seeing following URL section
"Processor Architecture Types":
https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 MdePkg/Include/IndustryStandard/Dhcp.h | 45 ++
 1 file changed, 25 insertions(+), 20 deletions(-)

diff --git a/MdePkg/Include/IndustryStandard/Dhcp.h 
b/MdePkg/Include/IndustryStandard/Dhcp.h
index f209f1b2eb..46ab4f8e75 100644
--- a/MdePkg/Include/IndustryStandard/Dhcp.h
+++ b/MdePkg/Include/IndustryStandard/Dhcp.h
@@ -4,6 +4,7 @@
 
   Copyright (c) 2016, Intel Corporation. All rights reserved.
   Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
@@ -256,27 +257,31 @@ typedef enum {
 
 ///
 /// Processor Architecture Types
-/// These identifiers are defined by IETF:
-/// http://www.ietf.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xml
+/// These identifiers are defined by IANA:
+/// https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.xhtml
 ///
-#define PXE_CLIENT_ARCH_X86_BIOS  0x   /// x86 BIOS for PXE
-#define PXE_CLIENT_ARCH_IPF   0x0002   /// Itanium for PXE
-#define PXE_CLIENT_ARCH_IA32  0x0006   /// x86 uefi for PXE
-#define PXE_CLIENT_ARCH_X64   0x0007   /// x64 uefi for PXE
-#define PXE_CLIENT_ARCH_EBC   0x0009   /// EBC for PXE
-#define PXE_CLIENT_ARCH_ARM   0x000A   /// Arm uefi 32 for PXE
-#define PXE_CLIENT_ARCH_AARCH64   0x000B   /// Arm uefi 64 for PXE
-#define PXE_CLIENT_ARCH_RISCV32   0x0019   /// RISC-V uefi 32 for PXE
-#define PXE_CLIENT_ARCH_RISCV64   0x001B   /// RISC-V uefi 64 for PXE
-#define PXE_CLIENT_ARCH_RISCV128  0x001D   /// RISC-V uefi 128 for PXE
+#define PXE_CLIENT_ARCH_X86_BIOS 0x  /// x86 BIOS for PXE
+#define PXE_CLIENT_ARCH_IPF  0x0002  /// Itanium for PXE
+#define PXE_CLIENT_ARCH_IA32 0x0006  /// x86 uefi for PXE
+#define PXE_CLIENT_ARCH_X64  0x0007  /// x64 uefi for PXE
+#define PXE_CLIENT_ARCH_EBC  0x0009  /// EBC for PXE
+#define PXE_CLIENT_ARCH_ARM  0x000A  /// Arm uefi 32 for PXE
+#define PXE_CLIENT_ARCH_AARCH64  0x000B  /// Arm uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV32  0x0019  /// RISC-V uefi 32 for PXE
+#define PXE_CLIENT_ARCH_RISCV64  0x001B  /// RISC-V uefi 64 for PXE
+#define PXE_CLIENT_ARCH_RISCV128 0x001D  /// RISC-V uefi 128 for 
PXE
+#define PXE_CLIENT_ARCH_LOONGARCH32  0x0025  /// LoongArch uefi 32 for 
PXE
+#define PXE_CLIENT_ARCH_LOONGARCH64  0x0027  /// LoongArch uefi 64 for 
PXE
 
-#define HTTP_CLIENT_ARCH_IA32  0x000F  /// x86 uefi boot from http
-#define HTTP_CLIENT_ARCH_X64   0x0010  /// x64 uefi boot from http
-#define HTTP_CLIENT_ARCH_EBC   0x0011  /// EBC boot from http
-#define HTTP_CLIENT_ARCH_ARM   0x0012  /// Arm uefi 32 boot from 
http
-#define HTTP_CLIENT_ARCH_AARCH64   0x0013  /// Arm uefi 64 boot from 
http
-#define HTTP_CLIENT_ARCH_RISCV32   0x001A  /// RISC-V uefi 32 boot 
from http
-#define HTTP_CLIENT_ARCH_RISCV64   0x001C  /// RISC-V uefi 64 boot 
from http
-#define HTTP_CLIENT_ARCH_RISCV128  0x001E  /// RISC-V uefi 128 boot 
from http
+#define HTTP_CLIENT_ARCH_IA32 0x000F  /// x86 uefi boot from 
http
+#define HTTP_CLIENT_ARCH_X64  0x0010  /// x64 uefi boot from 
http
+#define HTTP_CLIENT_ARCH_EBC  0x0011  /// EBC boot from http
+#define HTTP_CLIENT_ARCH_ARM  0x0012  /// Arm uefi 32 boot 
from http
+#define HTTP_CLIENT_ARCH_AARCH64  0x0013  /// Arm uefi 64 boot 
from http
+#define HTTP_CLIENT_ARCH_RISCV32  0x001A  /// RISC-V uefi 32 boot 
from http
+#define HTTP_CLIENT_ARCH_RISCV64  0x001C  /// RISC-V uefi 64 boot 
from http
+#define HTTP_CLIENT_ARCH_RISCV128 0x001E  /// RISC-V uefi 128 boot 
from http
+#define HTTP_CLIENT_ARCH_LOONGARCH32  0x0026  /// LoongArch uefi 32 
boot from http
+#define HTTP_CLIENT_ARCH_LOONGARCH64  0x0028  /// LoongArch uefi 64 
boot from http
 
 #endif
-- 
2.27.0



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[edk2-devel] [PATCH v3 07/34] CryptoPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH64 architecture for EDK2 CI testing.

Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Xiaoyu Lu 
Cc: Guomin Jiang 

Signed-off-by: Chao Li 

Reviewed-by: Jiewen Yao 
---
 CryptoPkg/CryptoPkg.dsc | 3 ++-
 CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf | 6 +-
 CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf  | 4 
 CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf | 3 ++-
 CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf | 3 ++-
 CryptoPkg/Library/BaseCryptLibOnProtocolPpi/PeiCryptLib.inf | 3 ++-
 CryptoPkg/Library/Include/CrtLibSupport.h   | 3 ++-
 CryptoPkg/Library/OpensslLib/OpensslLib.inf | 2 ++
 CryptoPkg/Library/OpensslLib/OpensslLibCrypto.inf   | 2 ++
 CryptoPkg/Library/TlsLib/TlsLib.inf | 3 ++-
 CryptoPkg/Library/TlsLibNull/TlsLibNull.inf | 3 ++-
 11 files changed, 27 insertions(+), 8 deletions(-)

diff --git a/CryptoPkg/CryptoPkg.dsc b/CryptoPkg/CryptoPkg.dsc
index e4e7bc0dbf..8c6906acf0 100644
--- a/CryptoPkg/CryptoPkg.dsc
+++ b/CryptoPkg/CryptoPkg.dsc
@@ -4,6 +4,7 @@
 #
 #  Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -19,7 +20,7 @@
   PLATFORM_VERSION   = 0.98
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/CryptoPkg
-  SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
diff --git a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
index 9634bd5fea..8896e47095 100644
--- a/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
@@ -8,6 +8,7 @@
 #
 #  Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -24,7 +25,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
@@ -78,6 +79,9 @@
 [Sources.RISCV64]
   Rand/CryptRand.c
 
+[Sources.LOONGARCH64]
+  Rand/CryptRand.c
+
 [Packages]
   MdePkg/MdePkg.dec
   CryptoPkg/CryptoPkg.dec
diff --git a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
index 845708bf1a..bb66604e32 100644
--- a/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
@@ -13,6 +13,7 @@
 #
 #  Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.
 #  Copyright (c) 2021, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -80,6 +81,9 @@
 [Sources.RISCV64]
   Rand/CryptRand.c
 
+[Sources.LOONGARCH64]
+  Rand/CryptRand.c
+
 [Packages]
   MdePkg/MdePkg.dec
   CryptoPkg/CryptoPkg.dec
diff --git a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf 
b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
index 9cb8d42ff4..80afb62f76 100644
--- a/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
+++ b/CryptoPkg/Library/BaseCryptLibNull/BaseCryptLibNull.inf
@@ -8,6 +8,7 @@
 #
 #  Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -24,7 +25,7 @@
 #
 # The following information is for reference only and not required by the 
build tools.
 #
-#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64
+#  VALID_ARCHITECTURES   = IA32 X64 ARM AARCH64 RISCV64 LOONGARCH64
 #
 
 [Sources]
diff --git a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf 
b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
index baa4433cbe..b4945de336 100644
--- a/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
+++ b/CryptoPkg/Library/BaseCryptLibOnProtocolPpi/DxeCryptLib.inf
@@ -4,6 +4,7 @@
 #
 # Copyright (C) Microsoft Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard

[edk2-devel] [PATCH v3 06/34] NetworkPkg/HttpBootDxe: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH architecture for EDK2 CI testing.

Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Cc: Siyuan Fu 

Signed-off-by: Chao Li 

Reviewed-by: Jiaxin Wu 
---
 NetworkPkg/HttpBootDxe/HttpBootDhcp4.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h 
b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
index d76f0e84d6..f00fabead2 100644
--- a/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
+++ b/NetworkPkg/HttpBootDxe/HttpBootDhcp4.h
@@ -3,6 +3,7 @@
 
 Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.
 Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -40,6 +41,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE  HTTP_CLIENT_ARCH_RISCV64
 #elif defined (MDE_CPU_EBC)
 #define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE  HTTP_CLIENT_ARCH_EBC
+#elif defined (MDE_CPU_LOONGARCH64)
+#define EFI_HTTP_BOOT_CLIENT_SYSTEM_ARCHITECTURE  HTTP_CLIENT_ARCH_LOONGARCH64
 #endif
 
 /// DHCP offer types among HTTP boot.
-- 
2.27.0



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[edk2-devel] [PATCH v3 05/34] NetworkPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH64 architecture for EDK2 CI testing.

Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Cc: Siyuan Fu 

Signed-off-by: Chao Li 

Reviewed-by: Jiaxin Wu 
---
 NetworkPkg/NetworkPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/NetworkPkg/NetworkPkg.dsc b/NetworkPkg/NetworkPkg.dsc
index 762134023d..6c231c97b5 100644
--- a/NetworkPkg/NetworkPkg.dsc
+++ b/NetworkPkg/NetworkPkg.dsc
@@ -4,6 +4,7 @@
 # (C) Copyright 2014 Hewlett-Packard Development Company, L.P.
 # Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -14,7 +15,7 @@
   PLATFORM_VERSION   = 0.98
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/NetworkPkg
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v3 04/34] FmpDevicePkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH64 architecture for EDK2 CI testing.

Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Guomin Jiang 
Cc: Wei6 Xu 

Signed-off-by: Chao Li 

Reviewed-by: Liming Gao 
---
 FmpDevicePkg/FmpDevicePkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/FmpDevicePkg/FmpDevicePkg.dsc b/FmpDevicePkg/FmpDevicePkg.dsc
index 7b1af285dd..f9f26c54bb 100644
--- a/FmpDevicePkg/FmpDevicePkg.dsc
+++ b/FmpDevicePkg/FmpDevicePkg.dsc
@@ -9,6 +9,7 @@
 # Copyright (c) Microsoft Corporation.
 # Copyright (c) 2018 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+# Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -20,7 +21,7 @@
   PLATFORM_VERSION   = 0.1
   DSC_SPECIFICATION  = 0x00010005
   OUTPUT_DIRECTORY   = Build/FmpDevicePkg
-  SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|ARM|AARCH64|RISCV64|LOONGARCH64
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
 
-- 
2.27.0



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[edk2-devel] [PATCH v3 03/34] FatPkg: Add LOONGARCH64 architecture for EDK2 CI.

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

Add LOONGARCH64 architecture for EDK2 CI testing.

Cc: Ray Ni 

Signed-off-by: Chao Li  

Reviewed-by: Liming Gao 
---
 FatPkg/FatPkg.dsc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/FatPkg/FatPkg.dsc b/FatPkg/FatPkg.dsc
index 6fa439e440..076b577972 100644
--- a/FatPkg/FatPkg.dsc
+++ b/FatPkg/FatPkg.dsc
@@ -5,6 +5,7 @@
 #  for EDK II Prime release.
 #  Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
 #  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights 
reserved.
+#  Copyright (c) 2022, Loongson Technology Corporation Limited. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -15,7 +16,7 @@
   PLATFORM_GUID  = 25b55dbc-9d0b-4a32-80da-46e1273d622c
   PLATFORM_VERSION   = 0.3
   DSC_SPECIFICATION  = 0x00010005
-  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64
+  SUPPORTED_ARCHITECTURES= IA32|X64|EBC|ARM|AARCH64|RISCV64|LOONGARCH64
   OUTPUT_DIRECTORY   = Build/Fat
   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
   SKUID_IDENTIFIER   = DEFAULT
-- 
2.27.0



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[edk2-devel] [PATCH v3 01/34] MdePkg: Added file of DebugSupport.h to MdePkg.ci.yaml

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

DebugSupport.h is all defined by UEFI Spec, most of the code
doesn't fit EDKII coding style, add it to IgnoreFiles field to
make CI ECC check pass.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Chao Li 

Reviewed-by: Michael D Kinney 
---
 MdePkg/MdePkg.ci.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MdePkg/MdePkg.ci.yaml b/MdePkg/MdePkg.ci.yaml
index 054233ebc7..9d141aa3cb 100644
--- a/MdePkg/MdePkg.ci.yaml
+++ b/MdePkg/MdePkg.ci.yaml
@@ -52,6 +52,7 @@
 "Include/IndustryStandard/UefiTcgPlatform.h",
 "Include/Library/PcdLib.h",
 "Include/Library/SafeIntLib.h",
+"Include/Protocol/DebugSupport.h",
 "Test/UnitTest/Library/BaseSafeIntLib/TestBaseSafeIntLib.c"
 ]
 },
-- 
2.27.0



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[edk2-devel] [PATCH v3 00/34] Add a new architecture called LoongArch in EDK II

[Chao Li]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

UEFI Spec V2.10 already supports LoongArch and all changes of this
commit passwed Azure CI testing, so let's enable it in EDK2. This commit
contains 35 patches, with patch 0 is the cover and the rest being the
LoongArch base code.

Changes from v1 to v2:
1. For patch 0008, added IANA website link in the commit message and
Dhcp.h.
2. Added IANA, Microsft and UEFI specification links in every patch
commit message that uses them.
3. For patch 0023, LoongArch64 supports unaligned access operations, so
use the unaligned read/write generic implementation. Added Barrier.S
file to provide barrier operations for LoongArch.
4. For patch 0024, convert inline assembly code to ASM code.
5. Added the BZ link in every patch commit message.

Changes from v2 to v3:
1. Added all reviewer in the correspondings patches.
2. For patch 0029, converted LoongArch synchronization operations from
inline assembly code to ASM code.
3. For patch 0015, 0016, 0017, changed the commit message for more
clarity.
4. For patch 0034, move it to patch 0018, as it also changes the BaseTools.

Please refer to this URL for the code repo of LoongArch64:
https://github.com/loongson/edk2/tree/LoongArch

Fore more documents of LoongArch please refer to following URL:
https://loongson.github.io/LoongArch-Documentation/README-EN.html

Modified modules: FatPkg, FmpDevicePkg, NetworkPkg,
NetworkPkg/HttpBootDxe, CryptoPkg, MdePkg/Include, SecurityPkg,
ShellPkg, UnitTestFrameworkPkg, MdePkg/DxeServicesLib, MdeModulePkg,
.python/SpellCheck, BaseTools, .azurepipelines, .pytool, MdePkg,
MdeModulePkg and MdePkg/MdePkg.ci.yaml.

Cc: Ray Ni 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Guomin Jiang 
Cc: Wei6 Xu 
Cc: Maciej Rabeda 
Cc: Jiaxin Wu 
Cc: Siyuan Fu 
Cc: Jiewen Yao 
Cc: Jian J Wang 
Cc: Xiaoyu Lu 
Cc: Zhiguang Liu 
Cc: Zhichao Gao 
Cc: Bob Feng 
Cc: Yuwei Chen 

Chao Li (34):
  MdePkg: Added file of DebugSupport.h to MdePkg.ci.yaml
  MdePkg: Added LoongArch jump buffer register definition to
MdePkg.ci.yaml
  FatPkg: Add LOONGARCH64 architecture for EDK2 CI.
  FmpDevicePkg: Add LOONGARCH64 architecture for EDK2 CI.
  NetworkPkg: Add LOONGARCH64 architecture for EDK2 CI.
  NetworkPkg/HttpBootDxe: Add LOONGARCH64 architecture for EDK2 CI.
  CryptoPkg: Add LOONGARCH64 architecture for EDK2 CI.
  MdePkg/Include: Add LOONGARCH related definitions EDK2 CI.
  SecurityPkg: Add LOONGARCH64 architecture for EDK2 CI.
  ShellPkg: Add LOONGARCH64 architecture for EDK2 CI.
  UnitTestFrameworkPkg: Add LOONGARCH64 architecture for EDK2 CI.
  MdePkg/DxeServicesLib: Add LOONGARCH64 architecture
  MdeModulePkg: Use LockBoxNullLib for LOONGARCH64
  .python/SpellCheck: Add "Loongson" and "LOONGARCH" to "words" section
  BaseTools: Update GenFw/GenFv to support LoongArch platform.
  BaseTools: Updated for GCC5 tool chain for LoongArch platfrom.
  BaseTools: Updated build tools to support new LoongArch.
  BaseTools: Add LoongArch64 binding.
  BaseTools: Enable LoongArch64 architecture for LoongArch64 EDK2 CI.
  .azurepipelines: Add LoongArch64 architecture on LoongArch64 EDK2 CI.
  .pytool: Add LoongArch64 architecture on LoongArch64 EDK2 CI.
  MdePkg: Add LoongArch LOONGARCH64 binding
  MdePkg/Include: LoongArch definitions.
  MdePkg/BaseLib: BaseLib for LOONGARCH64 architecture.
  MdePkg/BaseCacheMaintenanceLib: LoongArch cache maintenance
implementation.
  MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture.
  MdePkg/BasePeCoff: Add LoongArch PE/Coff related code.
  MdePkg/BaseCpuLib: LoongArch Base CPU library implementation.
  MdePkg/BaseSynchronizationLib: LoongArch cache related code.
  MdePkg/BaseSafeIntLib: Add LoongArch64 architecture for
BaseSafeIntLib.
  MdeModulePkg/Logo: Add LoongArch64 architecture.
  MdeModulePkg/CapsuleRuntimeDxe: Add LoongArch64 architecture.
  MdeModulePkg/DxeIplPeim : LoongArch DxeIPL implementation.
  NetworkPkg: Add LoongArch64 architecture.

 .azurepipelines/Ubuntu-GCC5.yml   |   3 +-
 .pytool/CISettings.py |   5 +-
 .pytool/Plugin/SpellCheck/cspell.base.yaml|   4 +-
 ...gcc_loongarch64_unknown_linux_ext_dep.yaml |  22 ++
 BaseTools/Conf/tools_def.template |  54 +++-
 .../LinuxGcc5ToolChain/LinuxGcc5ToolChain.py  |  31 ++
 BaseTools/Source/C/Common/BasePeCoff.c|  15 +-
 BaseTools/Source/C/Common/PeCoffLoaderEx.c|  79 +
 BaseTools/Source/C/GNUmakefile|   3 +
 BaseTools/Source/C/GenFv/GenFvInternalLib.c   | 125 +++-
 BaseTools/Source/C/GenFw/Elf64Convert.c   | 293 +-
 BaseTools/Source/C/GenFw/elf_common.h |  94 ++
 .../C/Include/IndustryStandard/PeImage.h  |  57 ++--
 .../C/Include/LoongArch64/ProcessorBind.h |  80 +
 BaseTools/Source/C/Makefiles/header.makefile  |   6 +
 BaseTools/Source/Python/Common/DataType.py|  21 +-
 .../Source/Python/UPT/Library/DataType.py |  24 +-
 BaseTools/Source/Python/build/buildoptions.py |   3

Re: [edk2-devel] The principles of EDK2 module reconstruction for archs

[Chang, Abner via groups.io]

[AMD Official Use Only - General]

Mike how about we take this way,

  *   Add a section in EDK II C Coding standard spec for the module naming rule 
(you listed above). The naming rule covers the modules under edk2 and 
edk2-platforms.
  *   Add a EDKII Wiki page for "The Principles of EDK2 Module Reconstruction 
for the Processor Architecture"

Refer to the Module Naming Rule section in "EDK II C Coding standard spec" for 
the module reconstruction mentioned in "The Principles of EDK2 Module 
Reconstruction for the Processor Architecture" doc.
Abner

From: Kinney, Michael D 
Sent: Monday, September 26, 2022 11:45 PM
To: devel@edk2.groups.io; Chang, Abner ; Kinney, Michael D 

Cc: Ni, Ray ; Sunil V L ; lichao 
; Kirkendall, Garrett ; Grimes, 
Paul ; He, Jiangang ; Attar, 
AbdulLateef (Abdul Lateef) ; Leif Lindholm 
; Andrew Fish ; Kinney, Michael D 

Subject: RE: [edk2-devel] The principles of EDK2 module reconstruction for archs

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.

As far as where this type documentation can go there are a couple options.


  1.  The EDK II C Coding Standard Specification does provide some rules for 
directory names and file names.
  2.  We could add a EDKII Wiki page that covers this topic
  3.  If we want a new published document, we have the tianocore-docs org with 
support for GitBook syntax documents.

Mike


From: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>> On Behalf Of Chang, Abner 
via groups.io
Sent: Monday, September 26, 2022 12:34 AM
To: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>; 
devel@edk2.groups.io
Cc: Ni, Ray mailto:ray...@intel.com>>; Sunil V L 
mailto:suni...@ventanamicro.com>>; lichao 
mailto:lic...@loongson.cn>>; Kirkendall, Garrett 
mailto:garrett.kirkend...@amd.com>>; Grimes, Paul 
mailto:paul.gri...@amd.com>>; He, Jiangang 
mailto:jiangang...@amd.com>>; Attar, AbdulLateef (Abdul 
Lateef) mailto:abdullateef.at...@amd.com>>; Leif 
Lindholm mailto:quic_llind...@quicinc.com>>; Andrew 
Fish mailto:af...@apple.com>>
Subject: Re: [edk2-devel] The principles of EDK2 module reconstruction for archs


[AMD Official Use Only - General]

Thanks for the reply Mike,
>>> I think it would be good to clarify when a difference in implementation is 
>>> due to a CPU Arch difference or a Vendor implementation difference.
Right, we can have a paragraph to clarify the difference of CPU Arch or a 
vendor implementation of the same CPU Arch.

If the difference of CPU Arch or a vendor implementation triggers the module 
reconstruction; and it is a new module or the delta is huge to share the same 
module, then the file/module name should follow the naming rule you listed 
above.
It the difference could be added to the existing module, then I think we just 
keep the existing naming of the file/module to prevent from introducing the 
impacts on the existing platform or projects meta files.

>>>I am not sure if we should use "Common" in the naming conventions.  I think 
>>>by default, any content that is not CpuArch or Vendor specific could be 
>>>considered common content.
Yes agree. The existing file could be a common file if there is no CpuArch or 
Vendor tag in the file/module name. However, there would be four scenarios,

  1.  CpuArch or vendor specific tag in the existing module/file name and some 
of the code could be leverage by other arch/vendor:

Strip away the share code and put it into new file and name it without 
arch/vendor tag. We don't need "common" in the file name.

  1.  No CpuArch or vendor specific tag in the existing module/file name and 
some of the code could be leverage by other arch/vendor:

Strip away the arch/vendor specific code and put it into new file named with 
arch/vendor tag.

  1.  No CpuArch or vendor specific tag in the existing module/file name and 
the code can be fully leveraged.

Keep it without any change on file/module name.

  1.  If the existing file has the "Common" tag, then just keep it as it.

How is it?

I will revise the doc. I don't see the good place to create this doc and PR for 
the review online. I would just create a markdown file under 
tianocore.github.io/docs just for the temporary. Any other suggestions?

Thanks
Abner



From: Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Sent: Saturday, September 24, 2022 2:01 AM
To: devel@edk2.groups.io; Chang, Abner 
mailto:abner.ch...@amd.com>>; Kinney, Michael D 
mailto:michael.d.kin...@intel.com>>
Cc: Ni, Ray mailto:ray...@intel.com>>; Sunil V L 
mailto:suni...@ventanamicro.com>>; lichao 
mailto:lic...@loongson.cn>>; Kirkendall, Garrett 
mailto:garrett.kirkend...@amd.com>>; Grimes, Paul 
mailto:paul.gri...@amd.com>>; He, Jiangang 
mailto:jiangang...@amd.com>>; Attar, AbdulLateef (Abdul 
Lateef) mailto:abdullateef.at...@amd.com>>; Leif 
Lindholm mailto:quic_llind...@quicinc.com>>

Re: [edk2-devel] [PATCH V2 1/1] OvmfPkg/PeilessStartupLib: move mPageTablePool to stack

[Yao, Jiewen]

Reviewed-by: Jiewen Yao 

> -Original Message-
> From: Xu, Min M 
> Sent: Tuesday, September 27, 2022 3:08 PM
> To: devel@edk2.groups.io
> Cc: Xu, Min M ; Aktas, Erdem
> ; Gerd Hoffmann ; James
> Bottomley ; Yao, Jiewen 
> Subject: [PATCH V2 1/1] OvmfPkg/PeilessStartupLib: move mPageTablePool
> to stack
> 
> From: Min M Xu 
> 
> PeilessStartupLib is running in SEC phase. In this phase global variable
> is not allowed to be modified. This patch moves mPageTablePool to stack
> and pass it as input parameter between functions.
> 
> Cc: Erdem Aktas 
> Cc: Gerd Hoffmann 
> Cc: James Bottomley 
> Cc: Jiewen Yao 
> Signed-off-by: Min Xu 
> ---
>  .../PeilessStartupLib/X64/VirtualMemory.c | 117 ++
>  1 file changed, 68 insertions(+), 49 deletions(-)
> 
> diff --git a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
> b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
> index 6877e521e485..b444c052d1bf 100644
> --- a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
> +++ b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
> @@ -21,11 +21,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>  #include 
>  #include "PageTables.h"
> 
> -//
> -// Global variable to keep track current available memory used as page
> table.
> -//
> -PAGE_TABLE_POOL  *mPageTablePool = NULL;
> -
>  UINTN  mLevelShift[5] = {
>0,
>PAGING_L1_ADDRESS_SHIFT,
> @@ -273,14 +268,17 @@ ToSplitPageTable (
>reserve at least another PAGE_TABLE_POOL_UNIT_PAGES. But usually
> this won't
>happen in practice.
> 
> -  @param PoolPages  The least page number of the pool to be created.
> +  @param[in]  PoolPages  The least page number of the pool to be
> created.
> +  @param[in, out] PageTablePool  Pointer of Pointer to the current
> available memory
> +  used as page table.
> 
>@retval TRUEThe pool is initialized successfully.
>@retval FALSE   The memory is out of resource.
>  **/
>  BOOLEAN
>  InitializePageTablePool (
> -  IN UINTN  PoolPages
> +  IN UINTNPoolPages,
> +  IN OUT PAGE_TABLE_POOL  **PageTablePool
>)
>  {
>VOID  *Buffer;
> @@ -303,20 +301,20 @@ InitializePageTablePool (
>//
>// Link all pools into a list for easier track later.
>//
> -  if (mPageTablePool == NULL) {
> -mPageTablePool   = Buffer;
> -mPageTablePool->NextPool = mPageTablePool;
> +  if (*PageTablePool == NULL) {
> +*(UINT64 *)(UINTN)PageTablePool = (UINT64)(UINTN)Buffer;
> +(*PageTablePool)->NextPool  = *PageTablePool;
>} else {
> -((PAGE_TABLE_POOL *)Buffer)->NextPool = mPageTablePool->NextPool;
> -mPageTablePool->NextPool  = Buffer;
> -mPageTablePool= Buffer;
> +((PAGE_TABLE_POOL *)Buffer)->NextPool = (*PageTablePool)->NextPool;
> +(*PageTablePool)->NextPool= Buffer;
> +*PageTablePool= Buffer;
>}
> 
>//
>// Reserve one page for pool header.
>//
> -  mPageTablePool->FreePages = PoolPages - 1;
> -  mPageTablePool->Offset= EFI_PAGES_TO_SIZE (1);
> +  (*PageTablePool)->FreePages = PoolPages - 1;
> +  (*PageTablePool)->Offset= EFI_PAGES_TO_SIZE (1);
> 
>return TRUE;
>  }
> @@ -333,14 +331,17 @@ InitializePageTablePool (
>If there is not enough memory remaining to satisfy the request, then
> NULL is
>returned.
> 
> -  @param  Pages The number of 4 KB pages to allocate.
> +  @param[in]  Pages The number of 4 KB pages to allocate.
> +  @param[in, out] PageTablePool Pointer of pointer to the current
> available
> +memory used as page table.
> 
>@return A pointer to the allocated buffer or NULL if allocation fails.
> 
>  **/
>  VOID *
>  AllocatePageTableMemory (
> -  IN UINTN  Pages
> +  IN UINTNPages,
> +  IN OUT PAGE_TABLE_POOL  **PageTablePool
>)
>  {
>VOID  *Buffer;
> @@ -349,30 +350,31 @@ AllocatePageTableMemory (
>  return NULL;
>}
> 
> -  DEBUG ((DEBUG_INFO, "AllocatePageTableMemory. mPageTablePool=%p,
> Pages=%d\n", mPageTablePool, Pages));
> +  DEBUG ((DEBUG_INFO, "AllocatePageTableMemory. PageTablePool=%p,
> Pages=%d\n", *PageTablePool, Pages));
>//
>// Renew the pool if necessary.
>//
> -  if ((mPageTablePool == NULL) ||
> -  (Pages > mPageTablePool->FreePages))
> +  if ((*PageTablePool == NULL) ||
> +  (Pages > (*PageTablePool)->FreePages))
>{
> -if (!InitializePageTablePool (Pages)) {
> +if (!InitializePageTablePool (Pages, PageTablePool)) {
>return NULL;
>  }
>}
> 
> -  Buffer = (UINT8 *)mPageTablePool + mPageTablePool->Offset;
> +  Buffer = (UINT8 *)(*PageTablePool) + (*PageTablePool)->Offset;
> 
> -  mPageTablePool->Offset+= EFI_PAGES_TO_SIZE (Pages);
> -  mPageTablePool->FreePages -= Pages;
> +  (*PageTablePool)->Offset+= EFI_PAGES_TO_SIZE (Pages);
> +  (*PageTablePool)->FreePages -= Pages;

Re: [edk2-devel] [PATCH V2 2/2] NetworkPkg: Add WiFi profile sync protocol support

[Heng Luo]

Hi Zack,

1.
> +  Status = UnicodeStrToAsciiStrS (Profile->Password, (CHAR8
> + *)AsciiPassword, ((StrLen (Profile->Password) + 1) * sizeof (CHAR8)));  

I think we should remove '* sizeof (CHAR8)' because the third parameter is the 
length of string but not size of the memory:
Status = UnicodeStrToAsciiStrS (Profile->Password, (CHAR8 
*)AsciiPassword, ((StrLen (Profile->Password) + 1)));  

2. 
> +  if (StrLen (Profile->Password) > PASSWORD_STORAGE_SIZE) {
> +ASSERT (EFI_INVALID_PARAMETER);
> +return EFI_INVALID_PARAMETER;
> +  }

Need null terminator at end of password, so I think the conditional should be:
if (StrLen (Profile->Password) >= PASSWORD_STORAGE_SIZE)
in order to support 32 bytes PSK passwords with null terminator. Maybe need to 
change PASSWORD_STORAGE_SIZE  to 65? But PASSWORD_MAX_LEN should still be 63, 
because according to the 802.11i specification:
A pass-phrase is a sequence of between 8 and 63 ASCII-encoded characters. The 
limit of 63 comes from the desire to distinguish between a pass-phrase and a 
PSK displayed as 64 hexadecimal characters.

3. 
Suggest to add maintainers in Cc of the commit msg to speed up review.
Fox example:
  WifiProfileSyncProtocol and if found will operate on the premise of a One
  Click Recovery, or KVM flow with a Wifi profile provided by AMT.
 
  Cc: Maciej Rabeda 
  Cc: Fu Siyuan 
  Cc: Wu Jiaxin 
 Signed-off-by: Zachary Clark-Williams 


Thanks,
Heng

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Clark-
> williams, Zachary
> Sent: Tuesday, September 27, 2022 2:20 AM
> To: devel@edk2.groups.io
> Cc: Zachary Clark-Williams ; Clark-williams, Zachary
> 
> Subject: [edk2-devel] [PATCH V2 2/2] NetworkPkg: Add WiFi profile sync
> protocol support
> 
> From: Zachary Clark-Williams 
> 
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3845
> 
> Enables KVM and One Click Recovery WLAN capability with WiFi Profile Sync
> feature and protocol. Adding WiFiProfileSyncProtocol, which supports the
> profilesync driver operations for transferring WiFi profiles from AMT to the
> Supplicant. WiFiConnectionManager will check for the
> WifiProfileSyncProtocol and if found will operate on the premise of a One
> Click Recovery, or KVM flow with a Wifi profile provided by AMT.
> 
> Signed-off-by: Zachary Clark-Williams 
> ---
>  .../Protocol/WiFiProfileSyncProtocol.h|  83 
>  NetworkPkg/NetworkPkg.dec |   3 +
>  .../WifiConnectionManagerDxe.inf  |   3 +-
>  .../WifiConnectionMgrDriver.c | 126 
>  .../WifiConnectionMgrDxe.h|   4 +-
>  .../WifiConnectionMgrImpl.c   | 193 --
>  .../WifiConnectionMgrMisc.c   |  13 ++
>  7 files changed, 366 insertions(+), 59 deletions(-)  create mode 100644
> NetworkPkg/Include/Protocol/WiFiProfileSyncProtocol.h
> 
> diff --git a/NetworkPkg/Include/Protocol/WiFiProfileSyncProtocol.h
> b/NetworkPkg/Include/Protocol/WiFiProfileSyncProtocol.h
> new file mode 100644
> index 00..e36daceabf
> --- /dev/null
> +++ b/NetworkPkg/Include/Protocol/WiFiProfileSyncProtocol.h
> @@ -0,0 +1,83 @@
> +/** @file
> +  WiFi profile sync protocol. Supports One Click Recovery or KVM OS
> +recovery
> +  boot flow over WiFi.
> +
> +  Copyright (c) 2022, Intel Corporation. All rights reserved.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent **/
> +
> +#ifndef WIFI_PROFILE_SYNC_PROTOCOL_H_
> +#define WIFI_PROFILE_SYNC_PROTOCOL_H_
> +
> +#include 
> +
> +//
> +//  WiFi Profile Sync Protocol GUID variable.
> +//
> +extern EFI_GUID  gEfiWiFiProfileSyncProtocolGuid;
> +
> +/**
> +  Used by the WiFi connection manager to get the WiFi profile that AMT
> +shared
> +  and was stored in WiFi profile protocol. Aligns the AMT WiFi profile
> +data to
> +  the WiFi connection manager profile structure fo connection use.
> +
> +  @param[in, out]  WcmProfile   WiFi Connection Manager profile
> structure
> +  @param[in, out]  MacAddress   MAC address from AMT saved to NiC
> MAC address
> +
> +  @retval EFI_SUCCESS   Stored WiFi profile converted and 
> returned
> succefully
> +  @retval EFI_UNSUPPORTED   Profile protocol sharing not supported or
> enabled
> +  @retval EFI_NOT_FOUND No profiles to returned
> +  @retval OthersError Occurred
> +**/
> +typedef
> +EFI_STATUS
> +(EFIAPI *WIFI_PROFILE_GET)(
> +  IN OUT  WIFI_MGR_NETWORK_PROFILE  *Profile,
> +  IN OUT  EFI_80211_MAC_ADDRESS MacAddress
> +  );
> +
> +/**
> +  Saves the WiFi connection status recieved by the
> +WiFiConnectionManager when
> +  in a KVM OR One Click Recovery WLAN recovery flow. Input as
> +  EFI_80211_CONNECT_NETWORK_RESULT_CODE then converted and
> stored as EFI_STATUS type.
> +
> +  @param[in] ConnectionStatus WiFi connection attempt results
> +**/
> +typedef
> +VOID
> +(EFIAPI *WIFI_SET_CONNECT_STATE)(
> +  IN  EFI_80211_CONNECT_NETWORK_RESUL

[edk2-devel] [PATCH V2 1/1] OvmfPkg/PeilessStartupLib: move mPageTablePool to stack

[Min Xu]

From: Min M Xu 

PeilessStartupLib is running in SEC phase. In this phase global variable
is not allowed to be modified. This patch moves mPageTablePool to stack
and pass it as input parameter between functions.

Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: James Bottomley 
Cc: Jiewen Yao 
Signed-off-by: Min Xu 
---
 .../PeilessStartupLib/X64/VirtualMemory.c | 117 ++
 1 file changed, 68 insertions(+), 49 deletions(-)

diff --git a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c 
b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
index 6877e521e485..b444c052d1bf 100644
--- a/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
+++ b/OvmfPkg/Library/PeilessStartupLib/X64/VirtualMemory.c
@@ -21,11 +21,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include 
 #include "PageTables.h"
 
-//
-// Global variable to keep track current available memory used as page table.
-//
-PAGE_TABLE_POOL  *mPageTablePool = NULL;
-
 UINTN  mLevelShift[5] = {
   0,
   PAGING_L1_ADDRESS_SHIFT,
@@ -273,14 +268,17 @@ ToSplitPageTable (
   reserve at least another PAGE_TABLE_POOL_UNIT_PAGES. But usually this won't
   happen in practice.
 
-  @param PoolPages  The least page number of the pool to be created.
+  @param[in]  PoolPages  The least page number of the pool to be 
created.
+  @param[in, out] PageTablePool  Pointer of Pointer to the current available 
memory
+  used as page table.
 
   @retval TRUEThe pool is initialized successfully.
   @retval FALSE   The memory is out of resource.
 **/
 BOOLEAN
 InitializePageTablePool (
-  IN UINTN  PoolPages
+  IN UINTNPoolPages,
+  IN OUT PAGE_TABLE_POOL  **PageTablePool
   )
 {
   VOID  *Buffer;
@@ -303,20 +301,20 @@ InitializePageTablePool (
   //
   // Link all pools into a list for easier track later.
   //
-  if (mPageTablePool == NULL) {
-mPageTablePool   = Buffer;
-mPageTablePool->NextPool = mPageTablePool;
+  if (*PageTablePool == NULL) {
+*(UINT64 *)(UINTN)PageTablePool = (UINT64)(UINTN)Buffer;
+(*PageTablePool)->NextPool  = *PageTablePool;
   } else {
-((PAGE_TABLE_POOL *)Buffer)->NextPool = mPageTablePool->NextPool;
-mPageTablePool->NextPool  = Buffer;
-mPageTablePool= Buffer;
+((PAGE_TABLE_POOL *)Buffer)->NextPool = (*PageTablePool)->NextPool;
+(*PageTablePool)->NextPool= Buffer;
+*PageTablePool= Buffer;
   }
 
   //
   // Reserve one page for pool header.
   //
-  mPageTablePool->FreePages = PoolPages - 1;
-  mPageTablePool->Offset= EFI_PAGES_TO_SIZE (1);
+  (*PageTablePool)->FreePages = PoolPages - 1;
+  (*PageTablePool)->Offset= EFI_PAGES_TO_SIZE (1);
 
   return TRUE;
 }
@@ -333,14 +331,17 @@ InitializePageTablePool (
   If there is not enough memory remaining to satisfy the request, then NULL is
   returned.
 
-  @param  Pages The number of 4 KB pages to allocate.
+  @param[in]  Pages The number of 4 KB pages to allocate.
+  @param[in, out] PageTablePool Pointer of pointer to the current 
available
+memory used as page table.
 
   @return A pointer to the allocated buffer or NULL if allocation fails.
 
 **/
 VOID *
 AllocatePageTableMemory (
-  IN UINTN  Pages
+  IN UINTNPages,
+  IN OUT PAGE_TABLE_POOL  **PageTablePool
   )
 {
   VOID  *Buffer;
@@ -349,30 +350,31 @@ AllocatePageTableMemory (
 return NULL;
   }
 
-  DEBUG ((DEBUG_INFO, "AllocatePageTableMemory. mPageTablePool=%p, 
Pages=%d\n", mPageTablePool, Pages));
+  DEBUG ((DEBUG_INFO, "AllocatePageTableMemory. PageTablePool=%p, Pages=%d\n", 
*PageTablePool, Pages));
   //
   // Renew the pool if necessary.
   //
-  if ((mPageTablePool == NULL) ||
-  (Pages > mPageTablePool->FreePages))
+  if ((*PageTablePool == NULL) ||
+  (Pages > (*PageTablePool)->FreePages))
   {
-if (!InitializePageTablePool (Pages)) {
+if (!InitializePageTablePool (Pages, PageTablePool)) {
   return NULL;
 }
   }
 
-  Buffer = (UINT8 *)mPageTablePool + mPageTablePool->Offset;
+  Buffer = (UINT8 *)(*PageTablePool) + (*PageTablePool)->Offset;
 
-  mPageTablePool->Offset+= EFI_PAGES_TO_SIZE (Pages);
-  mPageTablePool->FreePages -= Pages;
+  (*PageTablePool)->Offset+= EFI_PAGES_TO_SIZE (Pages);
+  (*PageTablePool)->FreePages -= Pages;
 
   DEBUG ((
 DEBUG_INFO,
-"%a:%a: Buffer=0x%Lx Pages=%ld\n",
+"%a:%a: Buffer=0x%Lx Pages=%ld, PageTablePool=%p\n",
 gEfiCallerBaseName,
 __FUNCTION__,
 Buffer,
-Pages
+Pages,
+*PageTablePool
 ));
 
   return Buffer;
@@ -385,6 +387,8 @@ AllocatePageTableMemory (
   @param[in, out] PageEntry2M   Pointer to 2M page entry.
   @param[in]  StackBase Stack base address.
   @param[in]  StackSize Stack size.
+  @param[in, out] PageTablePool Pointer to the current available 
memory use