Re: [edk2-devel] [PATCH] Pkg-Module: Remove Non-ASCII Characters

[SteveX Li]

Hi Ardb,

The environment is
Windows: Traditional Chinese WIN10
VS15: Visual Studio Professional 2015, Version 14.0.23107.178 Update 3 (have 
visual C++ tools selected during installation)
Python: Python 3.6.6
Nasm: 2.15.05
LLVM: 11.0.0.0

The error message is " error F000: TrimPreprocessedFile: Error while processing 
file".
The system could pass the building process after removing non-ascii characters.

This issue might be related with the certain Windows language specific 
compilers.


Best Regards,

SteveX Li

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Ard Biesheuvel
Sent: Friday, October 14, 2022 4:43 PM
To: Li, SteveX 
Cc: devel@edk2.groups.io; Leif Lindholm ; Abner 
Chang ; Daniel Schaefer 
Subject: Re: [edk2-devel] [PATCH] Pkg-Module: Remove Non-ASCII Characters

On Fri, 14 Oct 2022 at 04:14, SteveX Li  wrote:
>
> It would cause compiler error.
>

Which compiler and which error?

> Signed-off-by: SteveX Li 
> Cc: Leif Lindholm 
> Cc: Ard Biesheuvel 
> Cc: Abner Chang 
> Cc: Daniel Schaefer 
> ---
>  EmbeddedPkg/GdbStub/GdbStubInternal.h| 32 
>  EmbeddedPkg/Include/Protocol/UsbDevice.h |  2 +-
>  2 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/EmbeddedPkg/GdbStub/GdbStubInternal.h 
> b/EmbeddedPkg/GdbStub/GdbStubInternal.h
> index 9c3929c812..5eaff61d83 100644
> --- a/EmbeddedPkg/GdbStub/GdbStubInternal.h
> +++ b/EmbeddedPkg/GdbStub/GdbStubInternal.h
> @@ -322,7 +322,7 @@ SendNotSupported (
>VOID
>);
>
> -/** ‘p n’
> +/** 'p n'
>   Reads the n-th register's value into an output buffer and sends it as a 
> packet
>   @param SystemContext   Register content at time of the exception
>   @param InBufferThis is the input buffer received from gdb 
> server
> @@ -333,7 +333,7 @@ ReadNthRegister (
>INCHAR8   *InBuffer
>);
>
> -/** ‘g’
> +/** 'g'
>   Reads the general registers into an output buffer  and sends it as a packet
>   @param SystemContext   Register content at time of the exception
>   **/
> @@ -343,7 +343,7 @@ ReadGeneralRegisters (
>INEFI_SYSTEM_CONTEXT  SystemContext
>);
>
> -/** ‘P n...=r...’
> +/** 'P n...=r...'
>   Writes the new value of n-th register received into the input buffer to the 
> n-th register
>   @param SystemContext   Register content at time of the exception
>   @param InBufferThis is the input buffer received from gdb 
> server
> @@ -355,7 +355,7 @@ WriteNthRegister (
>INCHAR8   *InBuffer
>);
>
> -/** ‘G XX...’
> +/** 'G XX...'
>   Writes the new values received into the input buffer to the general 
> registers
>   @param SystemContext   Register content at time of the 
> exception
>   @param InBufferPointer to the input buffer received 
> from gdb server
> @@ -368,7 +368,7 @@ WriteGeneralRegisters (
>INCHAR8   *InBuffer
>);
>
> -/** ‘m addr,length ’
> +/** 'm addr,length '
>   Find the Length of the area to read and the start address. Finally, pass 
> them to
>   another function, TransferFromMemToOutBufAndSend, that will read from that 
> memory space and
>   send it as a packet.
> @@ -381,7 +381,7 @@ ReadFromMemory (
>IN  CHAR8  *PacketData
>);
>
> -/** ‘M addr,length :XX...’
> +/** 'M addr,length :XX...'
>   Find the Length of the area in bytes to write and the start address. 
> Finally, pass them to
>   another function, TransferFromInBufToMem, that will write to that memory 
> space the info in
>   the input buffer.
> @@ -394,7 +394,7 @@ WriteToMemory (
>IN CHAR8  *PacketData
>);
>
> -/** ‘c [addr ]’
> +/** 'c [addr ]'
>   Continue. addr is Address to resume. If addr is omitted, resume at current
>   Address.
>
> @@ -409,7 +409,7 @@ ContinueAtAddress (
>IN  CHAR8   *PacketData
>);
>
> -/** ‘s [addr ]’
> +/** 's [addr ]'
>   Single step. addr is the Address at which to resume. If addr is omitted, 
> resume
>   at same Address.
>
> @@ -444,10 +444,10 @@ RemoveSingleStep (
>);
>
>  /**
> -  ‘Z1, [addr], [length]’
> -  ‘Z2, [addr], [length]’
> -  ‘Z3, [addr], [length]’
> -  ‘Z4, [addr], [length]’
> +  'Z1, [addr], [length]'
> +  'Z2, [addr], [length]'
> +  'Z3, [addr], [length]'
> +  'Z4, [addr], [length]'
>
>Insert hardware breakpoint/watchpoint at address addr of size length
>
> @@ -463,10 +463,10 @@ InsertBreakPoint (
>);
>
>  /**
> -  ‘z1, [addr], [length]’
> -  ‘z2, [addr], [length]’
> -  ‘z3, [addr], [length]’
> -  ‘z4, [addr], [length]’
> +  'z1, [addr], [length]'
> +  'z2, [addr], [length]'
> +  'z3, [addr], [length]'
> +  'z4, [addr], [length]'
>
>Remove hardware breakpoint/watchpoint at address addr of size length
>
> diff --git a/EmbeddedPkg/Include/Protocol/UsbDevice.h 
> b/EmbeddedPkg/Include/Protocol/UsbDevice.h
> index b299ee10a7..b07f459afa 100644
> --- a/EmbeddedPkg/Include/Protocol/UsbDevice.h
> +++ b/EmbeddedPkg/Include/Protocol/UsbDevice.h
> 

[edk2-devel] [Patch V5 4/4] UefiCpuPkg: Add R8/R9 etc in EccCheck ExceptionList

[duntan]

Add GENERAL_REGISTER.R8/R9 etc in EccCheck ExceptionList
of UefiCpuPkg/UefiCpuPkg.ci.yaml to pass CI EccCheck.R8/R9
in structure GENERAL_REGISTER of CpuExceptionHandlerTest.h
lead to EccCheck failure since no lower case characters in
R8/R9/R10 etc.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Reviewed-by: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/UefiCpuPkg.ci.yaml | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml
index bbdc44a45b..a377366798 100644
--- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
+++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
@@ -15,7 +15,15 @@
 ## "", ""
 ## ]
 "ExceptionList": [
-  "8006", "main"
+  "8006", "main",
+  "8005", "GENERAL_REGISTER.R8",
+  "8005", "GENERAL_REGISTER.R9",
+  "8005", "GENERAL_REGISTER.R10",
+  "8005", "GENERAL_REGISTER.R11",
+  "8005", "GENERAL_REGISTER.R12",
+  "8005", "GENERAL_REGISTER.R13",
+  "8005", "GENERAL_REGISTER.R14",
+  "8005", "GENERAL_REGISTER.R15"
 ],
 ## Both file path and directory path are accepted.
 "IgnoreFiles": [
-- 
2.31.1.windows.1



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[edk2-devel] [Patch V5 1/4] UefiCpuPkg: Add Unit tests for DxeCpuExceptionHandlerLib

[duntan]

Add target based unit tests for the DxeCpuExceptionHandlerLib.
A DXE driver is created to test DxeCpuExceptionHandlerLib.

Four test cases are created in this Unit Test module:
a.Test if exception handler can be registered/unregistered
for no error code exception.In the test case, only no error
code exception is triggered and tested by INTn instruction.

b.Test if exception handler can be registered/unregistered
for GP and PF. In the test case, GP exception is triggered
and tested by setting CR4_RESERVED_BIT to 1. PF exception
is triggered by writting to not-present or RO address.

c.Test if CpuContext is consistent before and after exception.
In this test case:
1.Set Cpu register to mExpectedContextInHandler before
exception. 2.Trigger exception specified by ExceptionType.
3.Store SystemContext in mActualContextInHandler and set
SystemContext to mExpectedContextAfterException in handler.
4.After return from exception, store Cpu registers in
mActualContextAfterException.
The expectation is:
1.Register values in mActualContextInHandler are the same
with register values in mExpectedContextInHandler.
2.Register values in mActualContextAfterException are the
same with register values mActualContextAfterException.

d.Test if stack overflow can be captured by CpuStackGuard
in both Bsp and AP. In this test case, stack overflow is
triggered by a funtion which calls itself continuously.
This test case triggers stack overflow in both BSP and AP.
All AP use same Idt with Bsp. The expectation is:
1. PF exception is triggered (leading to a DF if sepereated
stack is not prepared for PF) when Rsp<=StackBase+SIZE_4KB
since [StackBase, StackBase + SIZE_4KB] is marked as not
present in page table when PcdCpuStackGuard is TRUE.
2. Stack for PF/DF exception handler in both Bsp and AP is
succussfully switched by InitializeSeparateExceptionStacks.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Reviewed-by: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h   
  | 336 

 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTestCommon.c
   | 852 

 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHandlerLibUnitTest.inf
 |  58 ++
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHandlerUnitTest.c
  | 196 

 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/X64/ArchExceptionHandlerTest.c
| 166 
++
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/X64/ArchExceptionHandlerTestAsm.nasm
  | 256 

 6 files changed, 1864 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h
new file mode 100644
index 00..936098fde8
--- /dev/null
+++ 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h
@@ -0,0 +1,336 @@
+/** @file
+
+  Copyright (c) 2022, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  Four test cases are created in this Unit Test module.
+  a.Test if exception handler can be r

[edk2-devel] [Patch V5 3/4] UefiCpuPkg: Add Pei/DxeCpuExceptionHandlerLibUnitTest in dsc

[duntan]

Add Pei/DxeCpuExceptionHandlerLibUnitTest module in UefiCpuPkg.dsc

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Reviewed-by: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/UefiCpuPkg.dsc | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index f694b3a77c..6d89458ecb 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -63,6 +63,9 @@
   MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
   
SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
   CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
+  UnitTestLib|UnitTestFrameworkPkg/Library/UnitTestLib/UnitTestLib.inf
+  
UnitTestPersistenceLib|UnitTestFrameworkPkg/Library/UnitTestPersistenceLibNull/UnitTestPersistenceLibNull.inf
+  
UnitTestResultReportLib|UnitTestFrameworkPkg/Library/UnitTestResultReportLib/UnitTestResultReportLibDebugLib.inf
 
 [LibraryClasses.common.SEC]
   PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
@@ -177,6 +180,10 @@
   UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
   UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
   UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
+  
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/PeiCpuExceptionHandlerLibUnitTest.inf
+
+[Components.X64]
+  
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHandlerLibUnitTest.inf
 
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
-- 
2.31.1.windows.1



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[edk2-devel] [Patch V5 2/4] UefiCpuPkg: Add Unit tests for PeiCpuExceptionHandlerLib

[duntan]

The previous change adds unit test for DxeCpuExeptionHandlerLib
in 64bit mode. This change create a PEIM to add unit test for
PeiCpuExceptionHandlerLib based on previous change.It can run
in both 32bit and 64bit modes.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Reviewed-by: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h   
  |   9 +
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/Ia32/ArchExceptionHandlerTest.c
   | 135 
+++
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/Ia32/ArchExceptionHandlerTestAsm.nasm
 | 208 

 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/PeiCpuExceptionHandlerLibUnitTest.inf
 |  61 +
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/PeiCpuExceptionHandlerUnitTest.c
  | 204 

 5 files changed, 617 insertions(+)

diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h
index 936098fde8..bad3387db5 100644
--- 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h
+++ 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h
@@ -93,6 +93,15 @@ typedef struct {
   UINT64R15;
 } GENERAL_REGISTER;
 
+typedef struct {
+  UINT32Edi;
+  UINT32Esi;
+  UINT32Ebx;
+  UINT32Edx;
+  UINT32Ecx;
+  UINT32Eax;
+} GENERAL_REGISTER_IA32;
+
 extern UINTN   mFaultInstructionLength;
 extern EFI_EXCEPTION_TYPE  mExceptionType;
 extern UINTN   mRspAddress[];
diff --git 
a/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/Ia32/ArchExceptionHandlerTest.c
 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/Ia32/ArchExceptionHandlerTest.c
new file mode 100644
index 00..8bb27249dc
--- /dev/null
+++ 
b/UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/Ia32/ArchExceptionHandlerTest.c
@@ -0,0 +1,135 @@
+/** @file
+  Unit tests of the CpuExceptionHandlerLib.
+
+  Copyright (c) 2022, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "CpuExceptionHandlerTest.h"
+
+GENERAL_REGISTER_IA32  mActualContextInHandler;
+GENERAL_REGISTER_IA32  mActualContextAfterException;
+
+//
+// In TestCpuContextConsistency, Cpu registers will be set to 
mExpectedContextInHandler/mExpectedContextAfterException.
+// Ecx in mExpectedContextInHandler is set runtime since Ecx is needed in 
assembly code.
+// For GP and PF, Ecx is set to FaultParameter. For other exception triggered 
by INTn, Ecx is set to ExceptionType.
+//
+GENERAL_REGISTER_IA32  mExpectedContextInHandler  = { 1, 2, 3, 4, 5, 0 };
+GENERAL_REGISTER_IA32  mExpectedContextAfterException = { 11, 12, 13, 14, 15, 
16 };
+
+/**
+  Special handler for fault exception.
+  Rip/Eip in SystemContext will be modified to the instruction after the 
exception instruction.
+
+  @param ExceptionType  Exception type.
+  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
+
+**/
+VOID
+EFIAPI
+AdjustRipForFaultHandler (
+  IN EFI_EXCEPTION_TYPE  ExceptionType,
+  IN EFI_SYSTEM_CONTEXT  SystemContext
+  )
+{
+  mExceptionType= ExceptionType;
+  SystemContext.SystemContextIa32->Eip += mFaultInstructionLength;
+}
+
+/**
+  Special handler for ConsistencyOfCpuContext test case.
+
+  @param ExceptionType  Exception type.
+  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
+**/
+VOID
+EFIAPI
+AdjustCpuContextHandler (
+  IN EFI_EXCEPTION_TYPE  ExceptionType,
+  IN EFI_SYSTEM_CONTEXT  SystemContext
+  )
+{
+  //
+  // Store SystemContext in exception handler.
+  //
+  mActualContextInHandler.Edi = SystemContext.SystemContextIa32->Edi;
+  mActualContextInHandler.Esi = SystemContext.SystemContextIa32->Esi;
+  mActualContextInHandler.Ebx = SystemContext.SystemContextIa32->Ebx;
+  mActualContextInHandler.Edx = SystemContext.SystemContextIa32->Edx;
+  mActualContextInHandler.Ecx = SystemContext.SystemContextIa32->Ecx;
+  mActualContextInHandler.Eax = SystemContext.SystemContextIa32->Eax;
+
+  //
+  // Modify cpu context. These registers will be stored in 
mActualContextAfterException.
+  // Do not handle Esp and Ebp in SystemContext. CpuExceptionHandlerLib 
doesn't set Esp and
+  // Esp register to the value in SystemContext.
+  //
+  SystemContext.SystemContextIa32->Edi = mExpectedContextAfterException.

[edk2-devel] [Patch V5 0/4] Add Unit tests for Pei/DxeCpuExceptionHandlerLib

[duntan]

In the V5 patches:
Only move all files of Pei/DxeCpuExceptionHandlerLibUnitTest module to
UefiCpuPkg\Library\CpuExceptionHandlerLib\UnitTest folder.

Dun Tan (4):
  UefiCpuPkg: Add Unit tests for DxeCpuExceptionHandlerLib
  UefiCpuPkg: Add Unit tests for PeiCpuExceptionHandlerLib
  UefiCpuPkg: Add Pei/DxeCpuExceptionHandlerLibUnitTest in dsc
  UefiCpuPkg: Add R8/R9 etc in EccCheck ExceptionList

 UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h   
  | 345 
+
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTestCommon.c
   | 852 

 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHandlerLibUnitTest.inf
 |  58 ++
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHandlerUnitTest.c
  | 196 

 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/Ia32/ArchExceptionHandlerTest.c
   | 135 
+++
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/Ia32/ArchExceptionHandlerTestAsm.nasm
 | 208 

 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/PeiCpuExceptionHandlerLibUnitTest.inf
 |  61 +
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/PeiCpuExceptionHandlerUnitTest.c
  | 204 

 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/X64/ArchExceptionHandlerTest.c
| 166 
++
 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/X64/ArchExceptionHandlerTestAsm.nasm
  | 256 

 UefiCpuPkg/UefiCpuPkg.ci.yaml  
  |  10 +-
 UefiCpuPkg/UefiCpuPkg.dsc  
  |   7 +++
 12 files changed, 2497 insertions(+), 1 deletion(-)
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTest.h
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/CpuExceptionHandlerTestCommon.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHandlerLibUnitTest.inf
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/DxeCpuExceptionHandlerUnitTest.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/Ia32/ArchExceptionHandlerTest.c
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/Ia32/ArchExceptionHandlerTestAsm.nasm
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/PeiCpuExceptionHandlerLibUnitTest.inf
 create mode 100644 
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/PeiCpuExceptionHandlerUnitTest.c
 create mo

回复: [edk2-devel] 回复: [edk2-devel] 回复: [edk2-devel] [PATCH] [PATCH]MdeModulePkg/Ufs: Coverity scan flags multiple issues in edk2-stable202205 Signed-off-by: sivaparvat...@ami.com

[gaoliming via groups.io]

Sivaparvathi:

 You can check this wiki 
https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Code-Formatting to 
know how to check edk2 CI failures. 

 

Thanks

Liming

发件人: sivaparvathic via groups.io  
发送时间: 2022年10月13日 19:18
收件人: gaoliming ; devel@edk2.groups.io
主题: Re: [edk2-devel] 回复: [edk2-devel] 回复: [edk2-devel] [PATCH] 
[PATCH]MdeModulePkg/Ufs: Coverity scan flags multiple issues in 
edk2-stable202205 Signed-off-by: sivaparvat...@ami.com

 

Hi   mikub...@linux.microsoft.com,  
 gaolim...@byosoft.com.cn, 
 michael.d.kin...@intel.com


Created PULL request for edk2_stable202205 coverity issue changes for Ufs 
driver.
https://github.com/tianocore/edk2/pull/3472

Thanks,
Sivaparvathi C 



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[edk2-devel] [Patch V4 0/4] Add Unit tests for Pei/DxeCpuExceptionHandlerLib

[duntan]

In V4 4/4 patch:
Add GENERAL_REGISTER.R8/R9 etc in EccCheck ExceptionList
of UefiCpuPkg/UefiCpuPkg.ci.yaml to pass CI EccCheck, instead of
adding the whole CpuExceptionHandlerTest.h file.

Dun Tan (4):
  UefiCpuPkg: Add Unit tests for DxeCpuExceptionHandlerLib
  UefiCpuPkg: Add Unit tests for PeiCpuExceptionHandlerLib
  UefiCpuPkg: Add Pei/DxeCpuExceptionHandlerLibUnitTest in dsc
  UefiCpuPkg: Add R8/R9 etc in EccCheck ExceptionList

 UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h | 
345 
+
 UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTestCommon.c   | 
852 

 UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerLibUnitTest.inf | 
 58 ++
 UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerUnitTest.c  | 
196 

 UefiCpuPkg/CpuExceptionHandlerUnitTest/Ia32/ArchExceptionHandlerTest.c   | 
135 
+++
 UefiCpuPkg/CpuExceptionHandlerUnitTest/Ia32/ArchExceptionHandlerTestAsm.nasm | 
208 

 UefiCpuPkg/CpuExceptionHandlerUnitTest/PeiCpuExceptionHandlerLibUnitTest.inf | 
 61 +
 UefiCpuPkg/CpuExceptionHandlerUnitTest/PeiCpuExceptionHandlerUnitTest.c  | 
204 

 UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTest.c| 
166 
++
 UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTestAsm.nasm  | 
256 

 UefiCpuPkg/UefiCpuPkg.ci.yaml| 
 10 +-
 UefiCpuPkg/UefiCpuPkg.dsc| 
  7 +++
 12 files changed, 2497 insertions(+), 1 deletion(-)
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTestCommon.c
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerLibUnitTest.inf
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerUnitTest.c
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/Ia32/ArchExceptionHandlerTest.c
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/Ia32/ArchExceptionHandlerTestAsm.nasm
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/PeiCpuExceptionHandlerLibUnitTest.inf
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/PeiCpuExceptionHandlerUnitTest.c
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTest.c
 create mode 100644 
UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTestAsm.nasm

-- 
2.31.1.windows.1



-=-=-=-

[edk2-devel] [Patch V4 2/4] UefiCpuPkg: Add Unit tests for PeiCpuExceptionHandlerLib

[duntan]

The previous change adds unit test for DxeCpuExeptionHandlerLib
in 64bit mode. This change create a PEIM to add unit test for
PeiCpuExceptionHandlerLib based on previous change.It can run
in both 32bit and 64bit modes.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Reviewed-by: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h | 
  9 +
 UefiCpuPkg/CpuExceptionHandlerUnitTest/Ia32/ArchExceptionHandlerTest.c   | 
135 
+++
 UefiCpuPkg/CpuExceptionHandlerUnitTest/Ia32/ArchExceptionHandlerTestAsm.nasm | 
208 

 UefiCpuPkg/CpuExceptionHandlerUnitTest/PeiCpuExceptionHandlerLibUnitTest.inf | 
 61 +
 UefiCpuPkg/CpuExceptionHandlerUnitTest/PeiCpuExceptionHandlerUnitTest.c  | 
204 

 5 files changed, 617 insertions(+)

diff --git a/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h 
b/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h
index 936098fde8..bad3387db5 100644
--- a/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h
+++ b/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h
@@ -93,6 +93,15 @@ typedef struct {
   UINT64R15;
 } GENERAL_REGISTER;
 
+typedef struct {
+  UINT32Edi;
+  UINT32Esi;
+  UINT32Ebx;
+  UINT32Edx;
+  UINT32Ecx;
+  UINT32Eax;
+} GENERAL_REGISTER_IA32;
+
 extern UINTN   mFaultInstructionLength;
 extern EFI_EXCEPTION_TYPE  mExceptionType;
 extern UINTN   mRspAddress[];
diff --git 
a/UefiCpuPkg/CpuExceptionHandlerUnitTest/Ia32/ArchExceptionHandlerTest.c 
b/UefiCpuPkg/CpuExceptionHandlerUnitTest/Ia32/ArchExceptionHandlerTest.c
new file mode 100644
index 00..8bb27249dc
--- /dev/null
+++ b/UefiCpuPkg/CpuExceptionHandlerUnitTest/Ia32/ArchExceptionHandlerTest.c
@@ -0,0 +1,135 @@
+/** @file
+  Unit tests of the CpuExceptionHandlerLib.
+
+  Copyright (c) 2022, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "CpuExceptionHandlerTest.h"
+
+GENERAL_REGISTER_IA32  mActualContextInHandler;
+GENERAL_REGISTER_IA32  mActualContextAfterException;
+
+//
+// In TestCpuContextConsistency, Cpu registers will be set to 
mExpectedContextInHandler/mExpectedContextAfterException.
+// Ecx in mExpectedContextInHandler is set runtime since Ecx is needed in 
assembly code.
+// For GP and PF, Ecx is set to FaultParameter. For other exception triggered 
by INTn, Ecx is set to ExceptionType.
+//
+GENERAL_REGISTER_IA32  mExpectedContextInHandler  = { 1, 2, 3, 4, 5, 0 };
+GENERAL_REGISTER_IA32  mExpectedContextAfterException = { 11, 12, 13, 14, 15, 
16 };
+
+/**
+  Special handler for fault exception.
+  Rip/Eip in SystemContext will be modified to the instruction after the 
exception instruction.
+
+  @param ExceptionType  Exception type.
+  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
+
+**/
+VOID
+EFIAPI
+AdjustRipForFaultHandler (
+  IN EFI_EXCEPTION_TYPE  ExceptionType,
+  IN EFI_SYSTEM_CONTEXT  SystemContext
+  )
+{
+  mExceptionType= ExceptionType;
+  SystemContext.SystemContextIa32->Eip += mFaultInstructionLength;
+}
+
+/**
+  Special handler for ConsistencyOfCpuContext test case.
+
+  @param ExceptionType  Exception type.
+  @param SystemContext  Pointer to EFI_SYSTEM_CONTEXT.
+**/
+VOID
+EFIAPI
+AdjustCpuContextHandler (
+  IN EFI_EXCEPTION_TYPE  ExceptionType,
+  IN EFI_SYSTEM_CONTEXT  SystemContext
+  )
+{
+  //
+  // Store SystemContext in exception handler.
+  //
+  mActualContextInHandler.Edi = SystemContext.SystemContextIa32->Edi;
+  mActualContextInHandler.Esi = SystemContext.SystemContextIa32->Esi;
+  mActualContextInHandler.Ebx = SystemContext.SystemContextIa32->Ebx;
+  mActualContextInHandler.Edx = SystemContext.SystemContextIa32->Edx;
+  mActualContextInHandler.Ecx = SystemContext.SystemContextIa32->Ecx;
+  mActualContextInHandler.Eax = SystemContext.SystemContextIa32->Eax;
+
+  //
+  // Modify cpu context. These registers will be stored in 
mActualContextAfterException.
+  // Do not handle Esp and Ebp in SystemContext. CpuExceptionHandlerLib 
doesn't set Esp and
+  // Esp register to the value in SystemContext.
+  //
+  SystemContext.SystemContextIa32->Edi = mExpectedContextAfterException.Edi;
+  SystemContext.SystemContextIa32->Esi = mExpectedContextAfterException.Esi;
+  SystemContext.SystemContextIa32->Ebx = mExpectedContextAfterExcepti

[edk2-devel] [Patch V4 1/4] UefiCpuPkg: Add Unit tests for DxeCpuExceptionHandlerLib

[duntan]

Add target based unit tests for the DxeCpuExceptionHandlerLib.
A DXE driver is created to test DxeCpuExceptionHandlerLib.

Four test cases are created in this Unit Test module:
a.Test if exception handler can be registered/unregistered
for no error code exception.In the test case, only no error
code exception is triggered and tested by INTn instruction.

b.Test if exception handler can be registered/unregistered
for GP and PF. In the test case, GP exception is triggered
and tested by setting CR4_RESERVED_BIT to 1. PF exception
is triggered by writting to not-present or RO address.

c.Test if CpuContext is consistent before and after exception.
In this test case:
1.Set Cpu register to mExpectedContextInHandler before
exception. 2.Trigger exception specified by ExceptionType.
3.Store SystemContext in mActualContextInHandler and set
SystemContext to mExpectedContextAfterException in handler.
4.After return from exception, store Cpu registers in
mActualContextAfterException.
The expectation is:
1.Register values in mActualContextInHandler are the same
with register values in mExpectedContextInHandler.
2.Register values in mActualContextAfterException are the
same with register values mActualContextAfterException.

d.Test if stack overflow can be captured by CpuStackGuard
in both Bsp and AP. In this test case, stack overflow is
triggered by a funtion which calls itself continuously.
This test case triggers stack overflow in both BSP and AP.
All AP use same Idt with Bsp. The expectation is:
1. PF exception is triggered (leading to a DF if sepereated
stack is not prepared for PF) when Rsp<=StackBase+SIZE_4KB
since [StackBase, StackBase + SIZE_4KB] is marked as not
present in page table when PcdCpuStackGuard is TRUE.
2. Stack for PF/DF exception handler in both Bsp and AP is
succussfully switched by InitializeSeparateExceptionStacks.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Reviewed-by: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h | 
336 

 UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTestCommon.c   | 
852 

 UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerLibUnitTest.inf | 
 58 ++
 UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerUnitTest.c  | 
196 

 UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTest.c| 
166 
++
 UefiCpuPkg/CpuExceptionHandlerUnitTest/X64/ArchExceptionHandlerTestAsm.nasm  | 
256 

 6 files changed, 1864 insertions(+)

diff --git a/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h 
b/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h
new file mode 100644
index 00..936098fde8
--- /dev/null
+++ b/UefiCpuPkg/CpuExceptionHandlerUnitTest/CpuExceptionHandlerTest.h
@@ -0,0 +1,336 @@
+/** @file
+
+  Copyright (c) 2022, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  Four test cases are created in this Unit Test module.
+  a.Test if exception handler can be registered/unregistered for no error code 
exception
+In this test case, only no error code exception is trigger

[edk2-devel] [Patch V4 4/4] UefiCpuPkg: Add R8/R9 etc in EccCheck ExceptionList

[duntan]

Add GENERAL_REGISTER.R8/R9 etc in EccCheck ExceptionList
of UefiCpuPkg/UefiCpuPkg.ci.yaml to pass CI EccCheck.R8/R9
in structure GENERAL_REGISTER of CpuExceptionHandlerTest.h
lead to EccCheck failure since no lower case characters in
R8/R9/R10 etc.

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Cc: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/UefiCpuPkg.ci.yaml | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml b/UefiCpuPkg/UefiCpuPkg.ci.yaml
index bbdc44a45b..a377366798 100644
--- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
+++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
@@ -15,7 +15,15 @@
 ## "", ""
 ## ]
 "ExceptionList": [
-  "8006", "main"
+  "8006", "main",
+  "8005", "GENERAL_REGISTER.R8",
+  "8005", "GENERAL_REGISTER.R9",
+  "8005", "GENERAL_REGISTER.R10",
+  "8005", "GENERAL_REGISTER.R11",
+  "8005", "GENERAL_REGISTER.R12",
+  "8005", "GENERAL_REGISTER.R13",
+  "8005", "GENERAL_REGISTER.R14",
+  "8005", "GENERAL_REGISTER.R15"
 ],
 ## Both file path and directory path are accepted.
 "IgnoreFiles": [
-- 
2.31.1.windows.1



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[edk2-devel] [Patch V4 3/4] UefiCpuPkg: Add Pei/DxeCpuExceptionHandlerLibUnitTest in dsc

[duntan]

Add Pei/DxeCpuExceptionHandlerLibUnitTest module in UefiCpuPkg.dsc

Signed-off-by: Dun Tan 
Cc: Eric Dong 
Reviewed-by: Ray Ni 
Cc: Rahul Kumar 
---
 UefiCpuPkg/UefiCpuPkg.dsc | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index f694b3a77c..31145dbe7e 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -63,6 +63,9 @@
   MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
   
SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
   CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
+  UnitTestLib|UnitTestFrameworkPkg/Library/UnitTestLib/UnitTestLib.inf
+  
UnitTestPersistenceLib|UnitTestFrameworkPkg/Library/UnitTestPersistenceLibNull/UnitTestPersistenceLibNull.inf
+  
UnitTestResultReportLib|UnitTestFrameworkPkg/Library/UnitTestResultReportLib/UnitTestResultReportLibDebugLib.inf
 
 [LibraryClasses.common.SEC]
   PlatformSecLib|UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
@@ -177,6 +180,10 @@
   UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
   UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
   UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
+  UefiCpuPkg/CpuExceptionHandlerUnitTest/PeiCpuExceptionHandlerLibUnitTest.inf
+
+[Components.X64]
+  UefiCpuPkg/CpuExceptionHandlerUnitTest/DxeCpuExceptionHandlerLibUnitTest.inf
 
 [BuildOptions]
   *_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
-- 
2.31.1.windows.1



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Re: [edk2-devel] [Patch V4 4/4] UefiCpuPkg: Add R8/R9 etc in EccCheck ExceptionList

[Ni, Ray]

Reviewed-by: Ray Ni 

> -Original Message-
> From: Tan, Dun 
> Sent: Monday, October 17, 2022 1:11 PM
> To: devel@edk2.groups.io
> Cc: Dong, Eric ; Ni, Ray ; Kumar,
> Rahul R 
> Subject: [Patch V4 4/4] UefiCpuPkg: Add R8/R9 etc in EccCheck ExceptionList
> 
> Add GENERAL_REGISTER.R8/R9 etc in EccCheck ExceptionList
> of UefiCpuPkg/UefiCpuPkg.ci.yaml to pass CI EccCheck.R8/R9
> in structure GENERAL_REGISTER of CpuExceptionHandlerTest.h
> lead to EccCheck failure since no lower case characters in
> R8/R9/R10 etc.
> 
> Signed-off-by: Dun Tan 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> ---
>  UefiCpuPkg/UefiCpuPkg.ci.yaml | 10 +-
>  1 file changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/UefiCpuPkg/UefiCpuPkg.ci.yaml
> b/UefiCpuPkg/UefiCpuPkg.ci.yaml
> index bbdc44a45b..a377366798 100644
> --- a/UefiCpuPkg/UefiCpuPkg.ci.yaml
> +++ b/UefiCpuPkg/UefiCpuPkg.ci.yaml
> @@ -15,7 +15,15 @@
>  ## "", ""
>  ## ]
>  "ExceptionList": [
> -  "8006", "main"
> +  "8006", "main",
> +  "8005", "GENERAL_REGISTER.R8",
> +  "8005", "GENERAL_REGISTER.R9",
> +  "8005", "GENERAL_REGISTER.R10",
> +  "8005", "GENERAL_REGISTER.R11",
> +  "8005", "GENERAL_REGISTER.R12",
> +  "8005", "GENERAL_REGISTER.R13",
> +  "8005", "GENERAL_REGISTER.R14",
> +  "8005", "GENERAL_REGISTER.R15"
>  ],
>  ## Both file path and directory path are accepted.
>  "IgnoreFiles": [
> --
> 2.31.1.windows.1



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Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 10/34] OvmfPkg/Sec: Add RISC-V support

[Sunil V L]

On Sat, Oct 15, 2022 at 03:50:02PM +, Chang, Abner wrote:
> [AMD Official Use Only - General]
> 
> Hi Sunil, this is my comment for both 9/34 and 10/34.
> The original RISC-V SecCore implementation can be used by RiscVVirt and the 
> RISC-V platforms under edk2-platform. So my plan back to half year ago was to 
> have SecCore under UefiCpuPkg, that would be Riscv64SecCore because current 
> the SecCore under UeficpuPkg is hard to be leveraged. With this, one RISC-V 
> SecCore driver can be used by RiscVVirt and RISC-V platforms. Of course we 
> have to move some Pcds to under PCD Riscv64 arch section in UEfiCpuPkg.dec. 
> Even through having PcdRiscVDbtFvBase(Size) for Riscv64 in UefiCpuPkg.dec 
> makes sense to me because Device Tree is part of RISC-V processor 
> initialization.
> Could you please take some time having this change? I think that is doable 
> and also an ideal implementation for RISC-V.
> 
Hi Abner,

Having SEC as part of SecCoreNative in UefiCpuPkg was my original
proposal when I had sent the RFC series to discuss in the design
meeting. But if you remember, Mike provided 2 major feedbacks in the
meeting which made me to move to OvmfPkg.

1) We should not add FDF related PCD variables in common packges like
UefiCpuPkg/MdeModulePkg. OvmfPkg is the only package (ofcourse ArmVirtPkg
also currently) which is an exception to this since it actually has
platform implementation useful for CI coverage.

2) Avoid new circular dependencies. We will have to use EmbeddedPkg in
UefiCpuPkg/MdeModulePkg for FDT if we use SecCore in UefiCpuPkg.

It made sense to me and OvmfPkg already had the required PCD variables
and modules. Also, qemu virt can support different features (boot from
flash vs memory, number of flash devices etc) compared to real platforms.
So, it will be hard to use the same design for both virt machine and real
platforms. The original SecCore in edk2-platforms can be continued to be
used by real platforms. Like Ray suggested, I plan to look at
MinPlatformPkg design for real platforms in edk2-platforms repo which
will make the design flexible.

Thanks
Sunil

> Thanks
> Abner


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[edk2-devel] [edk2-platforms][PATCH V3 00/16] Platform: Add Loongson support.

[xianglai]

Hello everyone:

  I'm sorry to bother you all.loongson cpu related code has merged to 
edk2 mainline.


Please take some time out of your busy schedules to review the 
platform-related code.


If there are any problems with the process, please let me know.


Tanks

xianglai

 Forwarded Message 
Subject: 	[edk2-devel] [edk2-platforms][PATCH V3 00/16] Platform: Add 
Loongson support.

Date:   Fri, 14 Oct 2022 12:01:13 +0800
From:   xianglai 
Reply-To:   devel@edk2.groups.io, lixiang...@loongson.cn
To: devel@edk2.groups.io
CC: 	quic_llind...@quicinc.com, michael.d.kin...@intel.com, 
kra...@redhat.com, a...@kernel.org, maob...@loongson.cn




REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

The uploaded code generates firmware to support Linux launching on the 
LoongArch platform under qemu,

So it will run in a virtual machine.

LoongArch is the general processor architecture of Loongson.
You can get the latest LoongArch documents or LoongArch tools at 
https://github.com/loongson/.


You can also view the code through the Loongson community.
The edk2 code in Loongson community:
https://github.com/loongson/edk2/tree/LoongArch
The edk2-platform code in Loonson community:
https://github.com/loongson/edk2-platforms
The qemu code in Loongson community:
https://gitlab.com/qemu-project/qemu.git
The LoongArch Documentation in Loongson community:
https://github.com/loongson/LoongArch-Documentation/tree/main/docs
The all patches at:
https://github.com/loongson/edk2-platforms/tree/devel-LoongArch-patch

v2 changes:
- Remove the inline assembly from StableTimerLib.
- troubleshoot TAB strings, convert TAB characters to spaces.
- remove smm related code, loongarch has no smm mode.

v3 changes:
- delete ExtractHandler related code.
- Boot UEFI with low 256M memory.
- Modify common interrupt handling.

xianglai li (16):
Platform/Loongson: Add Serial Port library
Platform/Loongson: Support SEC And Add Readme.md
Platform/Loongson: Add PeiServicesTablePointerLib.
Platform/Loongson: Add QemuFwCfgLib.
Platform/Loongson: Add MmuLib.
Platform/Loongson: Add StableTimerLib.
Platform/Loongson: Support PEI phase.
Platform/Loongson: Add CPU DXE driver.
Platform/Loongson: Add PciCpuIoDxe driver.
Platform/Loongson: Add timer Dxe driver.
Platform/Loongson: Add RealTime Clock lib.
Platform/Loongson: Add Platform Boot Manager Lib.
Platform/Loongson: Add Reset System Lib.
Platform/Loongson: Support Dxe
Platform/Loongson: Add QemuFlashFvbServicesRuntimeDxe driver.
Platform/Loongson: Support for saving variables to flash.

Maintainers.txt | 4 +
.../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c | 382 ++
.../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h | 151 +++
.../Drivers/CpuDxe/CpuDxe.inf | 56 +
.../Drivers/CpuDxe/LoongArch64/Exception.c | 338 +
.../Drivers/CpuDxe/LoongArch64/Fpu.S | 67 +
.../Drivers/CpuDxe/LoongArch64/LoongArch.S | 292 +
.../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 548 
.../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h | 219 
.../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 40 +
.../QemuFlashFvbServicesRuntimeDxe/FvbInfo.c | 115 ++
.../FvbServicesRuntimeDxe.inf | 73 ++
.../FwBlockService.c | 1158 +
.../FwBlockService.h | 178 +++
.../FwBlockServiceDxe.c | 152 +++
.../QemuFlash.c | 251 
.../QemuFlash.h | 86 ++
.../QemuFlashDxe.c | 21 +
.../Drivers/StableTimerDxe/Timer.c | 405 ++
.../Drivers/StableTimerDxe/Timer.h | 165 +++
.../Drivers/StableTimerDxe/TimerDxe.inf | 40 +
.../Include/IndustryStandard/QemuFwCfg.h | 95 ++
.../LoongArchQemuPkg/Include/Library/Cpu.h | 387 ++
.../LoongArchQemuPkg/Include/Library/MmuLib.h | 85 ++
.../Include/Library/QemuFwCfgLib.h | 193 +++
.../Include/Library/StableTimer.h | 43 +
.../Include/LoongArchAsmMacro.h | 23 +
.../Include/LoongArchQemuPlatform.h | 97 ++
.../LsRealTimeClockLib/LsRealTimeClock.h | 41 +
.../LsRealTimeClockLib/LsRealTimeClockLib.c | 343 +
.../LsRealTimeClockLib/LsRealTimeClockLib.inf | 41 +
.../LoongArchQemuPkg/Library/MmuLib/Mmu.S | 35 +
.../Library/MmuLib/MmuBaseLib.inf | 35 +
.../Library/MmuLib/MmuBaseLibPei.inf | 42 +
.../Library/MmuLib/MmuLibCore.c | 908 +
.../Library/MmuLib/MmuLibCore.h | 39 +
.../Library/MmuLib/MmuLibCorePei.c | 236 
.../LoongArchQemuPkg/Library/MmuLib/mmu.h | 104 ++
.../LoongArchQemuPkg/Library/MmuLib/page.h | 267 
.../LoongArchQemuPkg/Library/MmuLib/pte.h | 57 +
.../PeiServicesTablePointer.c | 78 ++
.../PeiServicesTablePointerLib.inf | 32 +
.../PlatformBootManagerLib/PlatformBm.c | 760 +++
.../PlatformBootManagerLib/PlatformBm.h | 112 ++
.../PlatformBootManagerLib.inf | 78 ++
.../PlatformBootManagerLib/QemuKernel.c | 81 ++
.../QemuFwCfgLib/QemuFwCfgLibInternal.h | 64 +
.../Library/QemuFwCfgLib/QemuFwCfgPei.c | 119 ++
.../Library/QemuFwCfgLib/QemuFwCfgPeiLib.c | 477 +++
.../Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf | 44 +
.../BaseResetSystemAcpiGed.c | 155 +++
.../BaseResetSystemAcpiGedLib.inf | 42 +
.../DxeResetSystemAcpiGed.c | 270 
.../DxeResetSystemAcpiGe

[edk2-devel] Event: Tools, CI, Code base construction meeting series - 10/17/2022 #cal-reminder

[Group Notification]

*Reminder: Tools, CI, Code base construction meeting series*

*When:*
10/17/2022
4:30pm to 5:30pm
(UTC-07:00) America/Los Angeles

*Where:*
https://github.com/tianocore/edk2/discussions/2614

View Event ( https://edk2.groups.io/g/devel/viewevent?eventid=1610035 )

*Description:*

TianoCore community,

Microsoft and Intel will be hosting a series of open meetings to discuss build, 
CI, tools, and other related topics. If you are interested, have ideas/opinions 
please join us. These meetings will be Monday 4:30pm Pacific Time on Microsoft 
Teams.

MS Teams Link in following discussion: * 
https://github.com/tianocore/edk2/discussions/2614

Anyone is welcome to join.

* tianocore/edk2: EDK II (github.com)
* tianocore/edk2-basetools: EDK II BaseTools Python tools as a PIP module 
(github.com) https://github.com/tianocore/edk2-basetools
* tianocore/edk2-pytool-extensions: Extensions to the edk2 build system 
allowing for a more robust and plugin based build system and tool execution 
environment (github.com) https://github.com/tianocore/edk2-pytool-extensions
* tianocore/edk2-pytool-library: Python library package that supports UEFI 
development (github.com) https://github.com/tianocore/edk2-pytool-library

MS Teams Browser Clients * 
https://docs.microsoft.com/en-us/microsoftteams/get-clients?tabs=Windows#browser-client


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Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 20/34] UefiCpuPkg: Add CpuTimerDxe module

[Chang, Abner via groups.io]

[AMD Official Use Only - General]

Acked-by: Abner Chang 

Need maintainer's agreement.
Abner

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Sunil V L
> via groups.io
> Sent: Saturday, October 15, 2022 12:48 AM
> To: devel@edk2.groups.io
> Cc: Eric Dong ; Ray Ni ; Rahul
> Kumar ; Daniel Schaefer
> 
> Subject: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 20/34]
> UefiCpuPkg: Add CpuTimerDxe module
> 
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
> 
> 
> REF:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D4076&data=05%7C01%7Ca
> bner.chang%40amd.com%7Cb8b27a5b30864359da3408daae045448%7C3dd89
> 61fe4884e608e11a82d994e183d%7C0%7C0%7C638013630881288660%7CUnkn
> own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik
> 1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=Tuh%2BRGCWd
> YvjFXMWH%2FfEYRBoND5OhLWWk2VHINqUhb4%3D&reserved=0
> 
> This DXE module initializes the timer interrupt handler and installs the Arch
> Timer protocol.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> Cc: Daniel Schaefer 
> Signed-off-by: Sunil V L 
> ---
>  UefiCpuPkg/UefiCpuPkg.dsc|   3 +
>  UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf   |  51 
>  UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h   | 177 
>  UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.c   | 294 
>  UefiCpuPkg/CpuTimerDxe/CpuTimer.uni  |  14 +
>  UefiCpuPkg/CpuTimerDxe/CpuTimerExtra.uni |  12 +
>  6 files changed, 551 insertions(+)
> 
> diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index
> 6ea90507e36f..54ef5edd6eae 100644
> --- a/UefiCpuPkg/UefiCpuPkg.dsc
> +++ b/UefiCpuPkg/UefiCpuPkg.dsc
> @@ -178,5 +178,8 @@ [Components.IA32, Components.X64]
>UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
>UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
> 
> +[Components.RISCV64]
> +  UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
> +
>  [BuildOptions]
>*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES diff --git
> a/UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
> b/UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
> new file mode 100644
> index ..d7706328b591
> --- /dev/null
> +++ b/UefiCpuPkg/CpuTimerDxe/CpuTimerDxe.inf
> @@ -0,0 +1,51 @@
> +## @file
> +# Timer Arch protocol module
> +#
> +# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All
> +rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent #
> +##
> +
> +[Defines]
> +  INF_VERSION= 0x0001001b
> +  BASE_NAME  = CpuTimerDxe
> +  MODULE_UNI_FILE= CpuTimer.uni
> +  FILE_GUID  = 055DDAC6-9142-4013-BF20-FC2E5BC325C9
> +  MODULE_TYPE= DXE_DRIVER
> +  VERSION_STRING = 1.0
> +  ENTRY_POINT= TimerDriverInitialize
> +#
> +# The following information is for reference only and not required by
> +the build # tools.
> +#
> +#  VALID_ARCHITECTURES   = RISCV64
> +#
> +[Packages]
> +  MdePkg/MdePkg.dec
> +  UefiCpuPkg/UefiCpuPkg.dec
> +
> +[LibraryClasses]
> +  BaseLib
> +  DebugLib
> +  IoLib
> +  CpuLib
> +  UefiBootServicesTableLib
> +  UefiDriverEntryPoint
> +
> +[LibraryClasses.RISCV64]
> +  RiscVSbiLib
> +
> +[Sources.RISCV64]
> +  RiscV64/Timer.h
> +  RiscV64/Timer.c
> +
> +[Protocols]
> +  gEfiCpuArchProtocolGuid   ## CONSUMES
> +  gEfiTimerArchProtocolGuid ## PRODUCES
> +
> +[Depex]
> +  gEfiCpuArchProtocolGuid
> +
> +[UserExtensions.TianoCore."ExtraFiles"]
> +  CpuTimerExtra.uni
> diff --git a/UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h
> b/UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h
> new file mode 100644
> index ..586eb0cfadb4
> --- /dev/null
> +++ b/UefiCpuPkg/CpuTimerDxe/RiscV64/Timer.h
> @@ -0,0 +1,177 @@
> +/** @file
> +  RISC-V Timer Architectural Protocol definitions
> +
> +  Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All
> + rights reserved.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef TIMER_H_
> +#define TIMER_H_
> +
> +#include 
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +//
> +// RISC-V use 100us timer.
> +// The default timer tick duration is set to 10 ms = 10 * 1000 * 10 100
> +ns units // #define DEFAULT_TIMER_TICK_DURATION  10
> +
> +extern VOID
> +RiscvSetTimerPeriod (
> +  UINT32  TimerPeriod
> +  );
> +
> +//
> +// Function Prototypes
> +//
> +
> +/**
> +  Initialize the Timer Architectural Protocol driver
> +
> +  @param ImageHandle ImageHandle of the loaded driver
> +  @param SystemTable Pointer to the System Table
> +
> +  @retval EFI_SUCCESSTimer Architectural Protocol created
> +  @retval EFI_OUT_OF_RESOURCES   Not enough resources available to
> initialize driver.
> +  @retval EFI_DEVICE_ERROR   A device error occured attempt

Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 19/34] UefiCpuPkg/CpuDxe: Add RISCV_EFI_BOOT_PROTOCOL support

[Chang, Abner via groups.io]

[AMD Official Use Only - General]

The implementation of RISCV_EFI_BOOT_PROTOCOL looks good and the copyright is 
clear. Thanks
Acked-by: Abner Chang 

Abner

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Sunil V L
> via groups.io
> Sent: Saturday, October 15, 2022 12:48 AM
> To: devel@edk2.groups.io
> Cc: Eric Dong ; Ray Ni ; Rahul
> Kumar ; Daniel Schaefer
> 
> Subject: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 19/34]
> UefiCpuPkg/CpuDxe: Add RISCV_EFI_BOOT_PROTOCOL support
> 
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
> 
> 
> REF:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D4076&data=05%7C01%7Ca
> bner.chang%40amd.com%7C1585e32f06574b8131ef08daae046155%7C3dd89
> 61fe4884e608e11a82d994e183d%7C0%7C0%7C638013631208922591%7CUnkn
> own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik
> 1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=Zm3JNrM1BG0z
> o33Qpj1oCzgn6JcEgIB5gb40q2dUyZk%3D&reserved=0
> 
> RISC-V UEFI platforms need to support RISCV_EFI_BOOT_PROTOCOL.
> Add the support for this protocol which is defined in the spec:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgith
> ub.com%2Friscv-non-isa%2Friscv-
> uefi%2Freleases%2Fdownload%2F1.0.0%2FRISCV_UEFI_PROTOCOL-
> spec.pdf&data=05%7C01%7Cabner.chang%40amd.com%7C1585e32f065
> 74b8131ef08daae046155%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C
> 0%7C638013631208922591%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLj
> AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%
> 7C%7C&sdata=5CB%2F89Lz5OTmFZQaoCk17VbEiXu5ggPSgL0PVeuFPTM
> %3D&reserved=0
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> Cc: Daniel Schaefer 
> Signed-off-by: Sunil V L 
> ---
>  UefiCpuPkg/UefiCpuPkg.dsc  | 12 ++--
>  UefiCpuPkg/CpuDxe/CpuDxe.inf   |  3 +
>  UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c | 60 +++-
>  3 files changed, 68 insertions(+), 7 deletions(-)
> 
> diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc index
> f694b3a77c2e..6ea90507e36f 100644
> --- a/UefiCpuPkg/UefiCpuPkg.dsc
> +++ b/UefiCpuPkg/UefiCpuPkg.dsc
> @@ -122,9 +122,13 @@ [Components]
>UefiCpuPkg/Library/CpuCacheInfoLib/PeiCpuCacheInfoLib.inf
>UefiCpuPkg/Library/CpuCacheInfoLib/DxeCpuCacheInfoLib.inf
>UefiCpuPkg/MicrocodeMeasurementDxe/MicrocodeMeasurementDxe.inf
> -
> -[Components.IA32, Components.X64]
>UefiCpuPkg/CpuDxe/CpuDxe.inf
> +
> +UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.i
> nf
> +!if $(TOOL_CHAIN_TAG) != "XCODE5"
> +
> +UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLi
> b.
> +inf
> +!endif
> +
> +[Components.IA32, Components.X64]
>UefiCpuPkg/CpuFeatures/CpuFeaturesPei.inf {
>  
> 
> NULL|UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLi
> b.inf
> @@ -141,10 +145,6 @@ [Components.IA32, Components.X64]
>UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.inf
>UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.inf
>UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf
> -
> UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.in
> f
> -!if $(TOOL_CHAIN_TAG) != "XCODE5"
> -
> UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib
> .inf
> -!endif
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.i
> nf
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHa
> ndlerLib.inf
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf
> b/UefiCpuPkg/CpuDxe/CpuDxe.inf index 235100d86274..b16b640946c6
> 100644
> --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
> +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
> @@ -74,6 +74,9 @@ [Protocols]
>gEfiMpServiceProtocolGuid ## PRODUCES
>gEfiSmmBase2ProtocolGuid  ## SOMETIMES_CONSUMES
> 
> +[Protocols.RISCV64]
> +  gRiscVEfiBootProtocolGuid ## PRODUCES
> +
>  [Guids]
>gIdleLoopEventGuid## CONSUMES   ## 
> Event
>gEfiVectorHandoffTableGuid## SOMETIMES_CONSUMES ##
> SystemTable
> diff --git a/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c
> b/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c
> index 9f557b776a09..7551e0653603 100644
> --- a/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c
> +++ b/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c
> @@ -2,6 +2,7 @@
>RISC-V CPU DXE driver.
> 
>Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP. All
> rights reserved.
> +  Copyright (c) 2022, Ventana Micro Systems Inc. All rights
> + reserved.
> 
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> @@ -14,6 +15,39 @@
>  //
>  STATIC BOOLEAN   mInterruptState = FALSE;
>  STATIC EFI_HANDLEmCpuHandle  = NULL;
> +STATIC UINTN mBootHartId;
> +RISCV_EFI_BOOT_PROTOCOL  gRisc

Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 17/34] UefiCpuPkg/CpuDxe: Refactor to allow other architectures

[Chang, Abner via groups.io]

[AMD Official Use Only - General]



> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Sunil V L
> via groups.io
> Sent: Saturday, October 15, 2022 12:48 AM
> To: devel@edk2.groups.io
> Cc: Eric Dong ; Ray Ni ; Rahul
> Kumar 
> Subject: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 17/34]
> UefiCpuPkg/CpuDxe: Refactor to allow other architectures
> 
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
> 
> 
> REF:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D4076&data=05%7C01%7Ca
> bner.chang%40amd.com%7C41895629d015414ff9bd08daae044add%7C3dd89
> 61fe4884e608e11a82d994e183d%7C0%7C0%7C638013630708017518%7CUnkn
> own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik
> 1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=aO5v%2Fc7HtU
> h9CkdqJniJ6tIMS4cV3RX48EiCRhN%2F3pY%3D&reserved=0
> 
> Currently, CpuDxe supports only X86 architecture. To add support for other
> architectures like RISC-V, this need to be refactored.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> Signed-off-by: Sunil V L 
> ---
>  UefiCpuPkg/CpuDxe/CpuDxe.inf   | 28 +++-
>  UefiCpuPkg/CpuDxe/{ => Ia32X64}/CpuDxe.h   |  0
>  UefiCpuPkg/CpuDxe/{ => Ia32X64}/CpuGdt.h   |  0
>  UefiCpuPkg/CpuDxe/{ => Ia32X64}/CpuMp.h|  0
>  UefiCpuPkg/CpuDxe/{ => Ia32X64}/CpuPageTable.h |  0
>  UefiCpuPkg/CpuDxe/{ => Ia32X64}/CpuDxe.c   |  0
>  UefiCpuPkg/CpuDxe/{ => Ia32X64}/CpuGdt.c   |  0
>  UefiCpuPkg/CpuDxe/{ => Ia32X64}/CpuMp.c|  0
>  UefiCpuPkg/CpuDxe/{ => Ia32X64}/CpuPageTable.c |  0
>  9 files changed, 15 insertions(+), 13 deletions(-)
> 
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf
> b/UefiCpuPkg/CpuDxe/CpuDxe.inf index 235241899222..65961813f74b
> 100644
> --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
> +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
> @@ -29,28 +29,30 @@ [LibraryClasses]
>DebugLib
>DxeServicesTableLib
>MemoryAllocationLib
> -  MtrrLib
>UefiBootServicesTableLib
>UefiDriverEntryPoint
> -  LocalApicLib
> -  UefiCpuLib
>UefiLib
>CpuExceptionHandlerLib
>HobLib
>ReportStatusCodeLib
> -  MpInitLib
>TimerLib
>PeCoffGetEntryPointLib
> 
> -[Sources]
> -  CpuDxe.c
> -  CpuDxe.h
> -  CpuGdt.c
> -  CpuGdt.h
> -  CpuMp.c
> -  CpuMp.h
> -  CpuPageTable.h
> -  CpuPageTable.c
> +[LibraryClasses.IA32, LibraryClasses.X64]
> +  LocalApicLib
> +  MpInitLib
> +  MtrrLib
> +  UefiCpuLib

I think we also need to refactor UefiCpuLib and MpInitLib when other archs have 
their own implementations.
This patch needs maintainer's review. However, same comment as I gave earlier. 
We will have to wait until the File Naming and Directory naming sections are 
firmed and published in edk2 coding standard spec.
Abner
> +
> +[Sources.IA32, Sources.X64]
> +  Ia32X64/CpuDxe.c
> +  Ia32X64/CpuDxe.h
> +  Ia32X64/CpuGdt.c
> +  Ia32X64/CpuGdt.h
> +  Ia32X64/CpuMp.c
> +  Ia32X64/CpuMp.h
> +  Ia32X64/CpuPageTable.h
> +  Ia32X64/CpuPageTable.c
> 
>  [Sources.IA32]
>Ia32/CpuAsm.nasm
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h
> b/UefiCpuPkg/CpuDxe/Ia32X64/CpuDxe.h
> similarity index 100%
> rename from UefiCpuPkg/CpuDxe/CpuDxe.h
> rename to UefiCpuPkg/CpuDxe/Ia32X64/CpuDxe.h
> diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.h
> b/UefiCpuPkg/CpuDxe/Ia32X64/CpuGdt.h
> similarity index 100%
> rename from UefiCpuPkg/CpuDxe/CpuGdt.h
> rename to UefiCpuPkg/CpuDxe/Ia32X64/CpuGdt.h
> diff --git a/UefiCpuPkg/CpuDxe/CpuMp.h
> b/UefiCpuPkg/CpuDxe/Ia32X64/CpuMp.h
> similarity index 100%
> rename from UefiCpuPkg/CpuDxe/CpuMp.h
> rename to UefiCpuPkg/CpuDxe/Ia32X64/CpuMp.h diff --git
> a/UefiCpuPkg/CpuDxe/CpuPageTable.h
> b/UefiCpuPkg/CpuDxe/Ia32X64/CpuPageTable.h
> similarity index 100%
> rename from UefiCpuPkg/CpuDxe/CpuPageTable.h rename to
> UefiCpuPkg/CpuDxe/Ia32X64/CpuPageTable.h
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c
> b/UefiCpuPkg/CpuDxe/Ia32X64/CpuDxe.c
> similarity index 100%
> rename from UefiCpuPkg/CpuDxe/CpuDxe.c
> rename to UefiCpuPkg/CpuDxe/Ia32X64/CpuDxe.c
> diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.c
> b/UefiCpuPkg/CpuDxe/Ia32X64/CpuGdt.c
> similarity index 100%
> rename from UefiCpuPkg/CpuDxe/CpuGdt.c
> rename to UefiCpuPkg/CpuDxe/Ia32X64/CpuGdt.c
> diff --git a/UefiCpuPkg/CpuDxe/CpuMp.c
> b/UefiCpuPkg/CpuDxe/Ia32X64/CpuMp.c
> similarity index 100%
> rename from UefiCpuPkg/CpuDxe/CpuMp.c
> rename to UefiCpuPkg/CpuDxe/Ia32X64/CpuMp.c diff --git
> a/UefiCpuPkg/CpuDxe/CpuPageTable.c
> b/UefiCpuPkg/CpuDxe/Ia32X64/CpuPageTable.c
> similarity index 100%
> rename from UefiCpuPkg/CpuDxe/CpuPageTable.c rename to
> UefiCpuPkg/CpuDxe/Ia32X64/CpuPageTable.c
> --
> 2.38.0
> 
> 
> 
> 
> 


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Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 18/34] UefiCpuPkg/CpuDxe: Add support for RISC-V

[Chang, Abner via groups.io]

[AMD Official Use Only - General]



> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Sunil V L
> via groups.io
> Sent: Saturday, October 15, 2022 12:48 AM
> To: devel@edk2.groups.io
> Cc: Eric Dong ; Ray Ni ; Rahul
> Kumar ; Daniel Schaefer
> 
> Subject: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 18/34]
> UefiCpuPkg/CpuDxe: Add support for RISC-V
> 
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
> 
> 
> REF:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D4076&data=05%7C01%7Ca
> bner.chang%40amd.com%7Ceb4589a31d3b420814db08daae044fb3%7C3dd8
> 961fe4884e608e11a82d994e183d%7C0%7C0%7C638013630809261619%7CUnk
> nown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6I
> k1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=77CfuRkFYIZvo
> WRgZOTnEmENWkJ7936XGgi18k%2FcIi0%3D&reserved=0
> 
> This is copied from
> edk2-platforms/Silicon/RISC-V/ProcessorPkg/Universal/CpuDxe
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> Cc: Daniel Schaefer 
> Signed-off-by: Sunil V L 
> ---
>  UefiCpuPkg/CpuDxe/CpuDxe.inf   |   8 +
>  UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h | 199 +
> UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.c | 307 
>  3 files changed, 514 insertions(+)
> 
> diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.inf
> b/UefiCpuPkg/CpuDxe/CpuDxe.inf index 65961813f74b..235100d86274
> 100644
> --- a/UefiCpuPkg/CpuDxe/CpuDxe.inf
> +++ b/UefiCpuPkg/CpuDxe/CpuDxe.inf
> @@ -44,6 +44,9 @@ [LibraryClasses.IA32, LibraryClasses.X64]
>MtrrLib
>UefiCpuLib
> 
> +[LibraryClasses.RISCV64]
> +  RiscVSbiLib
> +
>  [Sources.IA32, Sources.X64]
>Ia32X64/CpuDxe.c
>Ia32X64/CpuDxe.h
> @@ -62,6 +65,10 @@ [Sources.X64]
>X64/CpuAsm.nasm
>X64/PagingAttribute.c
> 
> +[Sources.RISCV64]
> +  RiscV64/CpuDxe.c
> +  RiscV64/CpuDxe.h
> +
>  [Protocols]
>gEfiCpuArchProtocolGuid   ## PRODUCES
>gEfiMpServiceProtocolGuid ## PRODUCES
> @@ -83,6 +90,7 @@ [Pcd]
>gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList  ##
> CONSUMES
>gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize##
> CONSUMES
>gEfiMdeModulePkgTokenSpaceGuid.PcdTdxSharedBitMask##
> CONSUMES
> +  gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ##
> CONSUMES
We can move this to [Pcd.RISCV64] if this PCD is only used by RISC-V.
Abner
> 
>  [Depex]
>TRUE
> diff --git a/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h
> b/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h
> new file mode 100644
> index ..49f4e119665a
> --- /dev/null
> +++ b/UefiCpuPkg/CpuDxe/RiscV64/CpuDxe.h
> @@ -0,0 +1,199 @@
> +/** @file
> +  RISC-V CPU DXE module header file.
> +
> +  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP.
> + All rights reserved.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef CPU_DXE_H_
> +#define CPU_DXE_H_
> +
> +#include 
> +
> +#include 
> +#include  #include
> + #include  #include
> +
> +#include 
> +#include 
> +#include 
> +
> +/**
> +  Flush CPU data cache. If the instruction cache is fully coherent
> +  with all DMA operations then function can just return EFI_SUCCESS.
> +
> +  @param  This  Protocol instance structure
> +  @param  Start Physical address to start flushing from.
> +  @param  LengthNumber of bytes to flush. Round up to chipset
> +granularity.
> +  @param  FlushType Specifies the type of flush operation to perform.
> +
> +  @retval EFI_SUCCESS   If cache was flushed
> +  @retval EFI_UNSUPPORTED   If flush type is not supported.
> +  @retval EFI_DEVICE_ERROR  If requested range could not be flushed.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +CpuFlushCpuDataCache (
> +  IN EFI_CPU_ARCH_PROTOCOL  *This,
> +  IN EFI_PHYSICAL_ADDRESS   Start,
> +  IN UINT64 Length,
> +  IN EFI_CPU_FLUSH_TYPE FlushType
> +  );
> +
> +/**
> +  Enables CPU interrupts.
> +
> +  @param  This  Protocol instance structure
> +
> +  @retval EFI_SUCCESS   If interrupts were enabled in the CPU
> +  @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +CpuEnableInterrupt (
> +  IN EFI_CPU_ARCH_PROTOCOL  *This
> +  );
> +
> +/**
> +  Disables CPU interrupts.
> +
> +  @param  This  Protocol instance structure
> +
> +  @retval EFI_SUCCESS   If interrupts were disabled in the CPU.
> +  @retval EFI_DEVICE_ERROR  If interrupts could not be disabled on the CPU.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +CpuDisableInterrupt (
> +  IN EFI_CPU_ARCH_PROTOCOL  *This
> +  );
> +
> +/**
> +  Return the state of interrupts.
> +
> +  @param  This   Protocol instance structure
> +  @param  State  Pointer to the CPU's curre

Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 16/34] UefiCpuPkg/CpuExceptionHandlerLib: Add support for RISC-V

[Chang, Abner via groups.io]

[AMD Official Use Only - General]

Acked-by: Abner Chang 

However, this one has the dependency with 15/34.

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Sunil V L
> via groups.io
> Sent: Saturday, October 15, 2022 12:48 AM
> To: devel@edk2.groups.io
> Cc: Eric Dong ; Ray Ni ; Rahul
> Kumar ; Daniel Schaefer
> 
> Subject: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 16/34]
> UefiCpuPkg/CpuExceptionHandlerLib: Add support for RISC-V
> 
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
> 
> 
> REF:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D4076&data=05%7C01%7Ca
> bner.chang%40amd.com%7C5f84890c5ca74c00184608daae044414%7C3dd896
> 1fe4884e608e11a82d994e183d%7C0%7C0%7C638013630593336705%7CUnkn
> own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik
> 1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=Y4Sz1pulv2MG
> WHhlTIKf1w88MZR1d%2Bub5DPMksFV1Nc%3D&reserved=0
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> Cc: Daniel Schaefer 
> Signed-off-by: Sunil V L 
> ---
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.in
> f|   7 +-
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib
> .inf |   7 +-
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerL
> ib.h | 116 +
> UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandlerL
> ib.c | 133 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/SupervisorTrapHandle
> r.S  | 105 
>  5 files changed, 366 insertions(+), 2 deletions(-)
> 
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.
> inf
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib
> .inf
> index 8fdf2b756c2c..b24140d1f26b 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.
> inf
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLi
> +++ b.inf
> @@ -18,7 +18,7 @@ [Defines]
>  #
>  # The following information is for reference only and not required by the
> build tools.
>  #
> -#  VALID_ARCHITECTURES   = IA32 X64
> +#  VALID_ARCHITECTURES   = IA32 X64 RISCV64
>  #
> 
>  [Sources.Ia32]
> @@ -38,6 +38,11 @@ [Sources.IA32, Sources.X64]
>Ia32X64/PeiDxeSmmCpuException.c
>Ia32X64/DxeException.c
> 
> +[Sources.RISCV64]
> +  RiscV64/SupervisorTrapHandler.S
> +  RiscV64/CpuExceptionHandlerLib.c
> +  RiscV64/CpuExceptionHandlerLib.h
> +
>  [Pcd]
>gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
>gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandler
> Lib.inf
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandler
> Lib.inf
> index 79911b21f62d..60c92ecf65bf 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandler
> Lib.inf
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandle
> +++ rLib.inf
> @@ -18,7 +18,7 @@ [Defines]
>  #
>  # The following information is for reference only and not required by the
> build tools.
>  #
> -#  VALID_ARCHITECTURES   = IA32 X64
> +#  VALID_ARCHITECTURES   = IA32 X64 RISCV64
>  #
> 
>  [Sources.Ia32]
> @@ -37,6 +37,11 @@ [Sources.IA32, Sources.X64]
>Ia32X64/CpuExceptionCommon.c
>Ia32X64/SecPeiCpuException.c
> 
> +[Sources.RISCV64]
> +  RiscV64/SupervisorTrapHandler.S
> +  RiscV64/CpuExceptionHandlerLib.c
> +  RiscV64/CpuExceptionHandlerLib.h
> +
>  [Packages]
>MdePkg/MdePkg.dec
>MdeModulePkg/MdeModulePkg.dec
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandl
> erLib.h
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHandl
> erLib.h
> new file mode 100644
> index ..30f47e87552b
> --- /dev/null
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/RiscV64/CpuExceptionHand
> +++ lerLib.h
> @@ -0,0 +1,116 @@
> +/** @file
> +
> +  RISC-V Exception Handler library definition file.
> +
> +  Copyright (c) 2019-2022, Hewlett Packard Enterprise Development LP.
> + All rights reserved.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef RISCV_CPU_EXECPTION_HANDLER_LIB_H_
> +#define RISCV_CPU_EXECPTION_HANDLER_LIB_H_
> +
> +#include 
> +
> +/**
> +  Trap Handler for S-mode
> +
> +**/
> +VOID
> +SupervisorModeTrap (
> +  VOID
> +  );
> +
> +//
> +// Index of SMode trap register
> +//
> +#define SMODE_TRAP_REGS_zero 0
> +#define SMODE_TRAP_REGS_ra   1
> +#define SMODE_TRAP_REGS_sp   2
> +#define SMODE_TRAP_REGS_gp   3
> +#define SMODE_TRAP_REGS_tp   4
> +#define SMODE_TRAP_REGS_t0   5
> +#define SMODE_TRAP_REGS_t1   6
> +#define SMODE_TRAP_REGS_t2   7
> +#define SMODE_TRAP_REGS_s0   8
> +#define SMODE_TRAP_REGS_s1   9

Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 15/34] UefiCpuPkg/CpuExceptionHandlerLib: Refactor to allow other architectures

[Chang, Abner via groups.io]

[AMD Official Use Only - General]

Need maintainer to review this changes. However, same comment as I gave 
earlier. We will have to wait until the File Naming and Directory naming 
sections are firmed and published in edk2 coding standard spec.
Abner

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Sunil V L
> via groups.io
> Sent: Saturday, October 15, 2022 12:48 AM
> To: devel@edk2.groups.io
> Cc: Eric Dong ; Ray Ni ; Rahul
> Kumar 
> Subject: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 15/34]
> UefiCpuPkg/CpuExceptionHandlerLib: Refactor to allow other architectures
> 
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
> 
> 
> REF:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D4076&data=05%7C01%7Ca
> bner.chang%40amd.com%7C59e63a7db04e464f5c3208daae043c0a%7C3dd89
> 61fe4884e608e11a82d994e183d%7C0%7C0%7C638013630462875566%7CUnkn
> own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik
> 1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=93oEfG8e%2FDl
> va3yL1aAnvHKm6ZbO17Rxgoo%2FL7JM3No%3D&reserved=0
> 
> Currently, the CpuExceptionHandlerLib library supports only X86.
> Refactor the library to allow adding other CPU architectures.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> Signed-off-by: Sunil V L 
> ---
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.in
> f  | 14 --
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
> |  8 
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib
> .inf   | 12 +++-
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.i
> nf  |  8 
> 
> UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHa
> ndlerLib.inf |  6 +++---
>  UefiCpuPkg/Library/CpuExceptionHandlerLib/{ =>
> Ia32X64}/CpuExceptionCommon.h |  0
>  UefiCpuPkg/Library/CpuExceptionHandlerLib/{ =>
> Ia32X64}/CpuExceptionCommon.c |  0
>  UefiCpuPkg/Library/CpuExceptionHandlerLib/{ => Ia32X64}/DxeException.c
> |  0
>  UefiCpuPkg/Library/CpuExceptionHandlerLib/{ =>
> Ia32X64}/PeiCpuException.c|  0
>  UefiCpuPkg/Library/CpuExceptionHandlerLib/{ =>
> Ia32X64}/PeiDxeSmmCpuException.c  |  0
>  UefiCpuPkg/Library/CpuExceptionHandlerLib/{ =>
> Ia32X64}/SecPeiCpuException.c |  0
>  UefiCpuPkg/Library/CpuExceptionHandlerLib/{ => Ia32X64}/SmmException.c
> |  0
>  12 files changed, 26 insertions(+), 22 deletions(-)
> 
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.
> inf
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib
> .inf
> index e7a81bebdb13..8fdf2b756c2c 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.
> inf
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib
> .inf
> @@ -32,11 +32,11 @@ [Sources.X64]
>X64/ArchExceptionHandler.c
>X64/ArchInterruptDefs.h
> 
> -[Sources.common]
> -  CpuExceptionCommon.h
> -  CpuExceptionCommon.c
> -  PeiDxeSmmCpuException.c
> -  DxeException.c
> +[Sources.IA32, Sources.X64]
> +  Ia32X64/CpuExceptionCommon.h
> +  Ia32X64/CpuExceptionCommon.c
> +  Ia32X64/PeiDxeSmmCpuException.c
> +  Ia32X64/DxeException.c
> 
>  [Pcd]
>gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard
> @@ -56,8 +56,10 @@ [LibraryClasses]
>SerialPortLib
>PrintLib
>SynchronizationLib
> -  LocalApicLib
>PeCoffGetEntryPointLib
>MemoryAllocationLib
>DebugLib
> +
> +[LibraryClasses.IA32, LibraryClasses.X64]
> +  LocalApicLib
>VmgExitLib
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i
> nf
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i
> nf
> index 7c2ec3b2db4c..af4899e6885e 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i
> nf
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.i
> nf
> @@ -33,10 +33,10 @@ [Sources.X64]
>X64/ArchInterruptDefs.h
> 
>  [Sources.common]
> -  CpuExceptionCommon.h
> -  CpuExceptionCommon.c
> -  PeiCpuException.c
> -  PeiDxeSmmCpuException.c
> +  Ia32X64/CpuExceptionCommon.h
> +  Ia32X64/CpuExceptionCommon.c
> +  Ia32X64/PeiCpuException.c
> +  Ia32X64/PeiDxeSmmCpuException.c
> 
>  [Packages]
>MdePkg/MdePkg.dec
> diff --git
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandler
> Lib.inf
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandler
> Lib.inf
> index 6a170286c8fc..79911b21f62d 100644
> ---
> a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandler
> Lib.inf
> +++
> b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandler
> Lib.inf
> @@ -32,10 +32,10 @@ [Sources.X64]
>X64/ArchExceptionHandler.c
>X64/ArchInterruptDefs.h
> 
> -[Sources.common]
> -  CpuExceptionC

Re: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 14/34] UefiCpuPkg/CpuTimerLib: Add support for RISC-V

[Chang, Abner via groups.io]

[AMD Official Use Only - General]

Acked-by: Abner Chang 

However, this one has the dependency with 13/34.

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Sunil V L
> via groups.io
> Sent: Saturday, October 15, 2022 12:48 AM
> To: devel@edk2.groups.io
> Cc: Eric Dong ; Ray Ni ; Rahul
> Kumar ; Daniel Schaefer
> 
> Subject: [edk2-devel] [edk2-staging/RiscV64QemuVirt PATCH V4 14/34]
> UefiCpuPkg/CpuTimerLib: Add support for RISC-V
> 
> Caution: This message originated from an External Source. Use proper
> caution when opening attachments, clicking links, or responding.
> 
> 
> REF:
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugz
> illa.tianocore.org%2Fshow_bug.cgi%3Fid%3D4076&data=05%7C01%7Ca
> bner.chang%40amd.com%7Ceaf8b2b498184b9f539908daae0436c0%7C3dd89
> 61fe4884e608e11a82d994e183d%7C0%7C0%7C638013630372412102%7CUnkn
> own%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik
> 1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=MisyEM5LX8ruF
> SvIl%2FjeyVABYXm2GwS2qN8VITTbeE4%3D&reserved=0
> 
> This is mostly copied from
> edk2-platforms/Silicon/RISC-V/ProcessorPkg/Library/RiscVTimerLib
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Rahul Kumar 
> Cc: Daniel Schaefer 
> Signed-off-by: Sunil V L 
> ---
>  UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf   |   3 +
>  UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c | 199
> 
>  2 files changed, 202 insertions(+)
> 
> diff --git a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> index 4b263965ed90..4492ee26caae 100644
> --- a/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> +++ b/UefiCpuPkg/Library/CpuTimerLib/BaseCpuTimerLib.inf
> @@ -22,6 +22,9 @@ [Sources.IA32, Sources.X64]
>Ia32X64/CpuTimerLib.c
>Ia32X64/BaseCpuTimerLib.c
> 
> +[Sources.RISCV64]
> +  RiscV64/CpuTimerLib.c
> +
>  [Packages]
>MdePkg/MdePkg.dec
>UefiCpuPkg/UefiCpuPkg.dec
> diff --git a/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
> b/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
> new file mode 100644
> index ..9c8efc0f3530
> --- /dev/null
> +++ b/UefiCpuPkg/Library/CpuTimerLib/RiscV64/CpuTimerLib.c
> @@ -0,0 +1,199 @@
> +/** @file
> +  RISC-V instance of Timer Library.
> +
> +  Copyright (c) 2016 - 2022, Hewlett Packard Enterprise Development LP.
> + All rights reserved.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/**
> +  Stalls the CPU for at least the given number of ticks.
> +
> +  Stalls the CPU for at least the given number of ticks. It's invoked
> + by
> +  MicroSecondDelay() and NanoSecondDelay().
> +
> +  @param  Delay A period of time to delay in ticks.
> +
> +**/
> +VOID
> +InternalRiscVTimerDelay (
> +  IN UINT32  Delay
> +  )
> +{
> +  UINT32  Ticks;
> +  UINT32  Times;
> +
> +  Times  = Delay >> (RISCV_TIMER_COMPARE_BITS - 2);
> +  Delay &= ((1 << (RISCV_TIMER_COMPARE_BITS - 2)) - 1);
> +  do {
> +//
> +// The target timer count is calculated here
> +//
> +Ticks = RiscVReadTimer () + Delay;
> +Delay = 1 << (RISCV_TIMER_COMPARE_BITS - 2);
> +while (((Ticks - RiscVReadTimer ()) & (1 << (RISCV_TIMER_COMPARE_BITS
> - 1))) == 0) {
> +  CpuPause ();
> +}
> +  } while (Times-- > 0);
> +}
> +
> +/**
> +  Stalls the CPU for at least the given number of microseconds.
> +
> +  Stalls the CPU for the number of microseconds specified by MicroSeconds.
> +
> +  @param  MicroSeconds  The minimum number of microseconds to delay.
> +
> +  @return MicroSeconds
> +
> +**/
> +UINTN
> +EFIAPI
> +MicroSecondDelay (
> +  IN UINTN  MicroSeconds
> +  )
> +{
> +  InternalRiscVTimerDelay (
> +(UINT32)DivU64x32 (
> +  MultU64x32 (
> +MicroSeconds,
> +PcdGet64 (PcdCpuCoreCrystalClockFrequency)
> +),
> +  100u
> +  )
> +);
> +  return MicroSeconds;
> +}
> +
> +/**
> +  Stalls the CPU for at least the given number of nanoseconds.
> +
> +  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
> +
> +  @param  NanoSeconds The minimum number of nanoseconds to delay.
> +
> +  @return NanoSeconds
> +
> +**/
> +UINTN
> +EFIAPI
> +NanoSecondDelay (
> +  IN UINTN  NanoSeconds
> +  )
> +{
> +  InternalRiscVTimerDelay (
> +(UINT32)DivU64x32 (
> +  MultU64x32 (
> +NanoSeconds,
> +PcdGet64 (PcdCpuCoreCrystalClockFrequency)
> +),
> +  10u
> +  )
> +);
> +  return NanoSeconds;
> +}
> +
> +/**
> +  Retrieves the current value of a 64-bit free running performance counter.
> +
> +  Retrieves the current value of a 64-bit free running performance
> + counter. The  counter can either count up by 1 or count down by 1. If
> + the physical  performance counter counts by a larger increment, then
> + the counter values

[edk2-devel] [PATCH 1/1] pip-requirement: Upgrade the edk2-basetools version from 0.1.29 to 0.1.39

[Bob Feng]

features and bug fixes:
1. Revert "BaseTools: Fix DSC LibraryClass precedence rule"
2. BaseTools: Correct BPDG tool error prints
3. BaseTools: Remove duplicated words in Python tools
4. BaseTools/FMMT: Add Extract FV function
5. BaseTools/FMMT: Add Shrink Fv function
6. BaseTools: Add support for SUBTYPE_GUID section generation
7. BaseTools: Support COMPAT16 section generation
8. BaseTools/GenFds: Correct file type set for the PIC section
9. BaseTools: Correct initialization data size check for array PCDs
10. BaseTools: Add missing spaces for PCD expression values in AutoGenC

Signed-off-by: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 
---
 pip-requirements.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/pip-requirements.txt b/pip-requirements.txt
index 967da7cb3783..40e9ad72ee4f 100644
--- a/pip-requirements.txt
+++ b/pip-requirements.txt
@@ -14,5 +14,5 @@
 
 edk2-pytool-library==0.11.2
 edk2-pytool-extensions~=0.16.0
-edk2-basetools==0.1.29
+edk2-basetools==0.1.39
 antlr4-python3-runtime==4.7.1
-- 
2.37.0.windows.1



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[edk2-devel] [PATCH 1/1] pip-requirement: Upgrade the edk2-basetools version from 0.1.29 to 0.1.39

[Bob Feng]

features and bug fixes:
1. Revert "BaseTools: Fix DSC LibraryClass precedence rule"
2. BaseTools: Correct BPDG tool error prints
3. BaseTools: Remove duplicated words in Python tools
4. BaseTools/FMMT: Add Extract FV function
5. BaseTools/FMMT: Add Shrink Fv function
6. BaseTools: Add support for SUBTYPE_GUID section generation
7. BaseTools: Support COMPAT16 section generation
8. BaseTools/GenFds: Correct file type set for the PIC section
9. BaseTools: Correct initialization data size check for array PCDs
10. BaseTools: Add missing spaces for PCD expression values in AutoGenC

Signed-off-by: Bob Feng 
Cc: Liming Gao 
Cc: Yuwei Chen 
---
 pip-requirements.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/pip-requirements.txt b/pip-requirements.txt
index 967da7cb3783..40e9ad72ee4f 100644
--- a/pip-requirements.txt
+++ b/pip-requirements.txt
@@ -14,5 +14,5 @@
 
 edk2-pytool-library==0.11.2
 edk2-pytool-extensions~=0.16.0
-edk2-basetools==0.1.29
+edk2-basetools==0.1.39
 antlr4-python3-runtime==4.7.1
-- 
2.37.0.windows.1



-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
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Mute This Topic: https://groups.io/mt/94360785/21656
Group Owner: devel+ow...@edk2.groups.io
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