[edk2-devel] [PATCH 2/3] EmulatorPkg/WinHost: XIP for SEC and PEI_CORE

[Ni, Ray]

In EmulatorPkg/Win, SEC and PEI_CORE are loaded to memory allocated
through VirtualAlloc. Though the corresponding DLL files are loaded
and the entry points in DLL files are executed. The loading to memory
allocated through VirtualAlloc is for the case when the DLL files can
not be loaded.

Actually some PEIMs like PcdPeim which are loaded before
"physical" RAM is discovered, they are executing in the original
location (FV) like XIP module in real platform.

The SEC and PEI_CORE can follow the same mechanism.
So, the VirtualAlloc call is removed.

This is to prepare the "reset" support to avoid additional OS memory
consumption when reset happens.

Signed-off-by: Ray Ni 
Cc: Zhiguang Liu 
Cc: Andrew Fish https://edk2.groups.io/g/devel/message/96319
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[edk2-devel] [PATCH 1/3] EmulatorPkg/WinHost: pre-allocate "physical" RAM

[Ni, Ray]

Move the "physical" RAM allocation from WinPeiAutoScan
to main() entrypoint.

This is to prepare the changes for "reset" support.

Signed-off-by: Ray Ni 
Cc: Andrew Fish 
Cc: Zhiguang Liu 
---
 EmulatorPkg/Win/Host/WinHost.c | 60 ++
 1 file changed, 25 insertions(+), 35 deletions(-)

diff --git a/EmulatorPkg/Win/Host/WinHost.c b/EmulatorPkg/Win/Host/WinHost.c
index 93247c5043..5b780ca8af 100644
--- a/EmulatorPkg/Win/Host/WinHost.c
+++ b/EmulatorPkg/Win/Host/WinHost.c
@@ -8,7 +8,7 @@
   This code produces 128 K of temporary memory for the SEC stack by directly
   allocate memory space with ReadWrite and Execute attribute.
 
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
 (C) Copyright 2016-2020 Hewlett Packard Enterprise Development LP
 SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
@@ -87,14 +87,6 @@ WinPeiAutoScan (
 return EFI_UNSUPPORTED;
   }
 
-  //
-  // Allocate enough memory space for emulator
-  //
-  gSystemMemory[Index].Memory = (EFI_PHYSICAL_ADDRESS)(UINTN)VirtualAlloc 
(NULL, (SIZE_T)(gSystemMemory[Index].Size), MEM_COMMIT, PAGE_EXECUTE_READWRITE);
-  if (gSystemMemory[Index].Memory == 0) {
-return EFI_OUT_OF_RESOURCES;
-  }
-
   *MemoryBase = gSystemMemory[Index].Memory;
   *MemorySize = gSystemMemory[Index].Size;
 
@@ -457,6 +449,30 @@ Returns:
 exit (1);
   }
 
+  //
+  // Allocate "physical" memory space for emulator. It will be reported out 
later throuth MemoryAutoScan()
+  //
+  for (Index = 0, Done = FALSE; !Done; Index++) {
+ASSERT (Index < gSystemMemoryCount);
+gSystemMemory[Index].Size   = ((UINT64)_wtoi (MemorySizeStr)) * 
((UINT64)SIZE_1MB);
+gSystemMemory[Index].Memory = (EFI_PHYSICAL_ADDRESS)(UINTN)VirtualAlloc 
(NULL, (SIZE_T)(gSystemMemory[Index].Size), MEM_COMMIT, PAGE_EXECUTE_READWRITE);
+if (gSystemMemory[Index].Memory == 0) {
+  return EFI_OUT_OF_RESOURCES;
+}
+
+//
+// Find the next region
+//
+for (Index1 = 0; MemorySizeStr[Index1] != '!' && MemorySizeStr[Index1] != 
0; Index1++) {
+}
+
+if (MemorySizeStr[Index1] == 0) {
+  Done = TRUE;
+}
+
+MemorySizeStr = MemorySizeStr + Index1 + 1;
+  }
+
   //
   // Allocate space for gSystemMemory Array
   //
@@ -575,32 +591,6 @@ Returns:
 SecPrint ("\n\r");
   }
 
-  //
-  // Calculate memory regions and store the information in the gSystemMemory
-  //  global for later use. The autosizing code will use this data to
-  //  map this memory into the SEC process memory space.
-  //
-  for (Index = 0, Done = FALSE; !Done; Index++) {
-//
-// Save the size of the memory and make a Unicode filename SystemMemory00, 
...
-//
-gSystemMemory[Index].Size = ((UINT64)_wtoi (MemorySizeStr)) * 
((UINT64)SIZE_1MB);
-
-//
-// Find the next region
-//
-for (Index1 = 0; MemorySizeStr[Index1] != '!' && MemorySizeStr[Index1] != 
0; Index1++) {
-}
-
-if (MemorySizeStr[Index1] == 0) {
-  Done = TRUE;
-}
-
-MemorySizeStr = MemorySizeStr + Index1 + 1;
-  }
-
-  SecPrint ("\n\r");
-
   //
   // Hand off to SEC Core
   //
-- 
2.37.2.windows.2



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[edk2-devel] [PATCH 0/3] Add reset support in Emulator/WinHost PEI

[Ni, Ray]

Ray Ni (3):
  EmulatorPkg/WinHost: pre-allocate "physical" RAM
  EmulatorPkg/WinHost: XIP for SEC and PEI_CORE
  EmulatorPkg/WinHost: Add Reset2 PPI

 EmulatorPkg/Win/Host/WinHost.c   | 139 ---
 EmulatorPkg/Win/Host/WinHost.h   |   3 +-
 EmulatorPkg/Win/Host/WinHost.inf |   3 +-
 3 files changed, 93 insertions(+), 52 deletions(-)

-- 
2.37.2.windows.2



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[edk2-devel] [PATCH 3/3] EmulatorPkg/WinHost: Add Reset2 PPI

[Ni, Ray]

When shutdown is requested, WinHost exits.
Otherwise, WinHost re-runs from SEC.
Tested no extra memory consumption with multiple resets in PEI.

Signed-off-by: Ray Ni 
Cc: Andrew Fish 
Cc: Zhiguang Liu 
---
 EmulatorPkg/Win/Host/WinHost.c   | 75 
 EmulatorPkg/Win/Host/WinHost.h   |  3 +-
 EmulatorPkg/Win/Host/WinHost.inf |  3 +-
 3 files changed, 71 insertions(+), 10 deletions(-)

diff --git a/EmulatorPkg/Win/Host/WinHost.c b/EmulatorPkg/Win/Host/WinHost.c
index 9b10290ff3..32b6922307 100644
--- a/EmulatorPkg/Win/Host/WinHost.c
+++ b/EmulatorPkg/Win/Host/WinHost.c
@@ -56,6 +56,14 @@ NT_FD_INFO  *gFdInfo;
 UINTN gSystemMemoryCount = 0;
 NT_SYSTEM_MEMORY  *gSystemMemory;
 
+BASE_LIBRARY_JUMP_BUFFER  mResetJumpBuffer;
+CHAR8 *mResetTypeStr[] = {
+  "EfiResetCold",
+  "EfiResetWarm",
+  "EfiResetShutdown",
+  "EfiResetPlatformSpecific"
+};
+
 /*++
 
 Routine Description:
@@ -196,6 +204,45 @@ SecPrint (
 );
 }
 
+/**
+  Resets the entire platform.
+
+  @param[in] ResetType  The type of reset to perform.
+  @param[in] ResetStatusThe status code for the reset.
+  @param[in] DataSize   The size, in bytes, of ResetData.
+  @param[in] ResetData  For a ResetType of EfiResetCold, EfiResetWarm, or 
EfiResetShutdown
+the data buffer starts with a Null-terminated 
string, optionally
+followed by additional binary data. The string is 
a description
+that the caller may use to further indicate the 
reason for the
+system reset.
+
+**/
+VOID
+EFIAPI
+WinReset (
+  IN EFI_RESET_TYPE  ResetType,
+  IN EFI_STATUS  ResetStatus,
+  IN UINTN   DataSize,
+  IN VOID*ResetData OPTIONAL
+  )
+{
+  ASSERT (ResetType <= EfiResetPlatformSpecific);
+  SecPrint ("  Emu ResetSystem is called: ResetType = %s\n", 
mResetTypeStr[ResetType]);
+
+  if (ResetType == EfiResetShutdown) {
+exit (0);
+  } else {
+//
+// Jump back to SetJump with jump code = ResetType + 1
+//
+LongJump (&mResetJumpBuffer, ResetType + 1);
+  }
+}
+
+EFI_PEI_RESET2_PPI  mEmuReset2Ppi = {
+  WinReset
+};
+
 /*++
 
 Routine Description:
@@ -388,6 +435,7 @@ Returns:
   UINTNProcessAffinityMask;
   UINTNSystemAffinityMask;
   INT32LowBit;
+  UINTNResetJumpCode;
 
   //
   // Enable the privilege so that RTC driver can successfully run SetTime()
@@ -430,6 +478,7 @@ Returns:
   // PPIs pased into PEI_CORE
   //
   AddThunkPpi (EFI_PEI_PPI_DESCRIPTOR_PPI, &gEmuThunkPpiGuid, 
&mSecEmuThunkPpi);
+  AddThunkPpi (EFI_PEI_PPI_DESCRIPTOR_PPI, &gEfiPeiReset2PpiGuid, 
&mEmuReset2Ppi);
 
   //
   // Emulator Bus Driver Thunks
@@ -500,14 +549,6 @@ Returns:
 exit (1);
   }
 
-  SetMem32 (TemporaryRam, TemporaryRamSize, PcdGet32 
(PcdInitValueInTempStack));
-
-  SecPrint (
-"  OS Emulator passing in %u KB of temp RAM at 0x%08lx to SEC\n\r",
-TemporaryRamSize / SIZE_1KB,
-TemporaryRam
-);
-
   //
   // If enabled use the magic page to communicate between modules
   // This replaces the PI PeiServicesTable pointer mechanism that
@@ -591,6 +632,24 @@ Returns:
 SecPrint ("\n\r");
   }
 
+  ResetJumpCode = SetJump (&mResetJumpBuffer);
+
+  //
+  // Do not clear memory content for warm reset.
+  //
+  if (ResetJumpCode != EfiResetWarm + 1) {
+SecPrint ("  OS Emulator clearing temp RAM and physical RAM (to be 
discovered later)..\n\r");
+SetMem32 (TemporaryRam, TemporaryRamSize, PcdGet32 
(PcdInitValueInTempStack));
+for (Index = 0; Index < gSystemMemoryCount; Index++) {
+  SetMem32 ((VOID *)(UINTN)gSystemMemory[Index].Memory, 
gSystemMemory[Index].Size, PcdGet32 (PcdInitValueInTempStack));
+}
+  }
+
+  SecPrint (
+"  OS Emulator passing in %u KB of temp RAM at 0x%08lx to SEC\n\r",
+TemporaryRamSize / SIZE_1KB,
+TemporaryRam
+);
   //
   // Hand off to SEC Core
   //
diff --git a/EmulatorPkg/Win/Host/WinHost.h b/EmulatorPkg/Win/Host/WinHost.h
index 49d42d1ad8..a9a21007e3 100644
--- a/EmulatorPkg/Win/Host/WinHost.h
+++ b/EmulatorPkg/Win/Host/WinHost.h
@@ -1,6 +1,6 @@
 /**@file
 
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.
 (C) Copyright 2020 Hewlett Packard Enterprise Development LP
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -26,6 +26,7 @@ Abstract:
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/EmulatorPkg/Win/Host/WinHost.inf b/EmulatorPkg/Win/Host/WinHost.inf
index 2030ac0847..b61901fae2 100644
--- a/EmulatorPkg/Win/Host/WinHost.inf
+++ b/EmulatorPkg/Win/Host/WinHost.inf
@@ -2,7 +2,7 @@
 # Entry Point of Win Emulator
 #
 # Main executable file of Win Emulator that loads Sec core after 
initialization finished.
-# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2008

[edk2-devel] [edk2-stable202211] [PATCH V6 0/3] Rename VmgExitLib to CcExitLib

[Yao, Jiewen]

Reviewed by: Jiewen Yao 

Hi Mike/Liming
I suggest this be in edk2-stable202211.

Thank you
Yao, Jiewen

> -Original Message-
> From: Xu, Min M 
> Sent: Friday, November 11, 2022 3:17 PM
> To: devel@edk2.groups.io
> Cc: Xu, Min M ; Dong, Eric ;
> Ni, Ray ; Brijesh Singh ; Aktas,
> Erdem ; Gerd Hoffmann ;
> James Bottomley ; Yao, Jiewen
> ; Tom Lendacky ;
> Dong, Guo ; Rhodes, Sean ;
> Lu, James ; Guo, Gua ; Kinney,
> Michael D ; Gao, Liming
> 
> Subject: [PATCH V6 0/3] Rename VmgExitLib to CcExitLib
> 
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4123
> 
> VmgExitLib once was designed to provide interfaces to support #VC handler
> and issue VMGEXIT instruction. After TDVF (enable TDX feature in OVMF) is
> introduced, this library is updated to support #VE as well. Now the name
> of VmgExitLib cannot reflect what the lib does.
> 
> This patch-set renames VmgExitLib to CcExitLib (Cc means Confidential
> Computing). This is simple renaming and there is no logic changes. Then
> APIs defined in CcExitLib.h are added with a CcExit prefix. This is to
> make the name more meaningful.
> 
> Please to be noted, changing the name of VmgExitLib to CcExitLib is a
> non-backwards compatible change from a platform DSC file perspective for
> downstream consumers. So for downstream platform below changes
> should
> be applied:
> 1. For DSC files:
> - VmgExitLib|OvmfPkg/Library/VmgExitLib/SecVmgExitLib.inf =>
>   CcExitLib|OvmfPkg/Library/CcExitLib/SecCcExitLib.inf
> 
> - VmgExitLib|UefiCpuPkg/Library/VmgExitLibNull/VmgExitLibNull.inf =>
>   CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
> 
> - VmgExitLib|OvmfPkg/Library/VmgExitLib/VmgExitLib.inf =>
>   CcExitLib|OvmfPkg/Library/CcExitLib/CcExitLib.inf
> 
> 2. For INF files:
> - VmgExitLib => CcExitLib
> 
> 3. For Header files
> - #include  => #include 
> 
> 4. For C files
> - Replace the APIs defined in the VmgExitLib.h with the ones defined in
>   CcExitLib.h. The old name is renamed by adding a prefix (CcExit).
>   For example VmgInit is renamed as CcExitVmgInit.
> 
> Code: https://github.com/mxu9/edk2/tree/CcExitLib.v5
> 
> v6 changes:
>  - Fix a typo in patch0@v5.
>  - No other changes from v5. So the code is same as v5.
> 
> v5 changes:
>  - Rebased the code base to c17c3c24d8.
>  - Add instructions in patch#0 on what updates to a downstream
>platform DSC.
> 
> v4 changes:
>  - The previous versions of the patch-set are to first duplicate a new
>CcExitLib then delete the old VmgExitLib. According to this comments
>https://edk2.groups.io/g/devel/message/96019 it suggests renaming in
>a single patch is better.
>  - Lib APIs are added with CcExit prefix, not CcExitLib prefix.
> 
> v3 changes:
>  - Rename CcExitHandleVc / CcExitHandleVe to
>CcExitLibHandleVc / CcExitLibHandleVe to make the nameing consistent.
>  - Update the CcExitLib to merge the patch eff44c008d99
>   (OvmfPkg/VmgExitLig: HALT on #VE when access to private memory).
> 
> v2 changes:
>  - Patch #3 is added to import CcExitLib in OvmfPkg's *.dsc. This is to
>prevent the building from being broken in the following patches.
> 
> Cc: Eric Dong 
> Cc: Ray Ni 
> Cc: Brijesh Singh 
> Cc: Erdem Aktas 
> Cc: Gerd Hoffmann 
> Cc: James Bottomley 
> Cc: Jiewen Yao 
> Cc: Tom Lendacky 
> Cc: Guo Dong 
> Cc: Sean Rhodes 
> Cc: James Lu 
> Cc: Gua Guo 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Signed-off-by: Min Xu 
> 
> Min M Xu (3):
>   OvmfPkg/UefiCpuPkg/UefiPayloadPkg: Rename VmgExitLib to CcExitLib
>   OvmfPkg/UefiCpuPkg: Add CcExit prefix to the APIs of CcExitLib
>   Maintainers: Update the VmgExitLib to CcExitLib
> 
>  Maintainers.txt   |   2 +-
>  OvmfPkg/AmdSev/AmdSevX64.dsc  |   4 +-
>  OvmfPkg/Bhyve/BhyveX64.dsc|   2 +-
>  OvmfPkg/CloudHv/CloudHvX64.dsc|   6 +-
>  OvmfPkg/IntelTdx/IntelTdxX64.dsc  |   4 +-
>  .../DxeMemEncryptSevLib.inf   |   2 +-
>  .../PeiMemEncryptSevLib.inf   |   2 +-
>  .../SecMemEncryptSevLib.inf   |   2 +-
>  .../X64/SnpPageStateChangeInternal.c  |  10 +-
>  .../VmgExitLib.c => CcExitLib/CcExitLib.c}|  23 ++--
>  .../CcExitLib.inf}|  17 +--
>  .../CcExitTd.h}   |   4 +-
>  .../CcExitVcHandler.c}| 129 +-
>  .../CcExitVcHandler.h}|   6 +-
>  .../CcExitVeHandler.c}|   6 +-
>  .../PeiDxeCcExitVcHandler.c}  |   6 +-
>  .../SecCcExitLib.inf} |  14 +-
>  .../SecCcExitVcHandler.c} |   6 +-
>  .../X64/TdVmcallCpuid.nasm|   0
>  OvmfPkg/Microvm/MicrovmX64.dsc|   4 +-
>  OvmfPkg/OvmfPkgIa32.dsc   |   4 +-
>  OvmfPkg/OvmfPkgIa32X64.dsc|   4 +-
>  OvmfPkg/OvmfPkgX64.dsc|   6 +-
>  OvmfPkg/OvmfXen

Re: [edk2-devel] [PATCH v1 1/1] .github/dependabot.yml: Enable dependabot

[Michael Kubacki]

I think that process is reasonable and we can discuss further in the 
upcoming Tools & CI meeting.


For now, I will leave the v1 patch on the mailing list and keep those 
other commits up for reference.


Thanks,
Michael

On 11/11/2022 1:44 PM, Michael D Kinney wrote:

Hi Michael,

Thanks for the quick investigation.I have reviewed some of the PRs 
generated in your fork by dependabot.The detailed information it 
collects and adds to the PR is really good.


I do notice that some dependencies (such as cmocka) are picking up the 
wrong content.I think this is an issue with the cmocka mirror that needs 
to be fixed.We need to review all the dependencies in edk2 repo and make 
sure all those dependencies are compatible with dependabot before 
activating it.


Given that any developer can submit a PR to run EDK II CI, perhaps we do 
not need to treat dependabot any different.Just keep its default labels 
and do not add a do-not-merge label or special comments from mergify.


Instead, we can depend on EDK II Maintainers to periodically monitor 
dependabot PRs and if there is one edk2 should pick up, the EDK II 
Maintainer that owns the package with the dependency can pull the 
dependebot PR into their fork and update the commit message with 
Signed-off-by and Cc tags for EDK II review and resubmit the PR and send 
email patch reviews.If you think this process is reasonable, then we can 
update the EDK II Development Process for this case for Maintainers.


I think this means your V1 is closer to what we need.

I recommend you bring this topic along with Maintainer process options 
and know edk2 dependabot compatibility issues to the TianoCore Tools/CI 
meeting.


Thanks,

Mike

*From:*devel@edk2.groups.io  *On Behalf Of 
*Michael Kubacki

*Sent:* Friday, November 11, 2022 7:30 AM
*To:* Kinney, Michael D ; devel@edk2.groups.io
*Subject:* Re: [edk2-devel] [PATCH v1 1/1] .github/dependabot.yml: 
Enable dependabot


Hi Mike,

It looks like the ability to open draft PRs is not possible at the moment:
Configure dependabot to create draft PRs · Issue #1291 · 
dependabot/dependabot-core · GitHub 



I could not find an ability for dependabot to leave that comment. Though 
I intentionally tried to keep it very similar in the mergify config file 
to the merge conflict comment action to reduce complexity.


Thanks for the feedback. Please let me know, if we can proceed with v2 
based on these changes.


Regards,
Michael





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Re: [edk2-devel] [PATCH v1 1/1] .github/dependabot.yml: Enable dependabot

[Michael D Kinney]

Hi Michael,

Thanks for the quick investigation.  I have reviewed some of the PRs generated 
in your fork by dependabot.  The detailed information it collects and adds to 
the PR is really good.

I do notice that some dependencies (such as cmocka) are picking up the wrong 
content.  I think this is an issue with the cmocka mirror that needs to be 
fixed.  We need to review all the dependencies in edk2 repo and make sure all 
those dependencies are compatible with dependabot before activating it.

Given that any developer can submit a PR to run EDK II CI, perhaps we do not 
need to treat dependabot any different.  Just keep its default labels and do 
not add a do-not-merge label or special comments from mergify.

Instead, we can depend on EDK II Maintainers to periodically monitor dependabot 
PRs and if there is one edk2 should pick up, the EDK II Maintainer that owns 
the package with the dependency can pull the dependebot PR into their fork and 
update the commit message with Signed-off-by and Cc tags for EDK II review and 
resubmit the PR and send email patch reviews.  If you think this process is 
reasonable, then we can update the EDK II Development Process for this case for 
Maintainers.

I think this means your V1 is closer to what we need.

I recommend you bring this topic along with Maintainer process options and know 
edk2 dependabot compatibility issues to the TianoCore Tools/CI meeting.

Thanks,

Mike

From: devel@edk2.groups.io  On Behalf Of Michael Kubacki
Sent: Friday, November 11, 2022 7:30 AM
To: Kinney, Michael D ; devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH v1 1/1] .github/dependabot.yml: Enable 
dependabot

Hi Mike,

It looks like the ability to open draft PRs is not possible at the moment:
Configure dependabot to create draft PRs · Issue #1291 · 
dependabot/dependabot-core · 
GitHub

I could not find an ability for dependabot to leave that comment. Though I 
intentionally tried to keep it very similar in the mergify config file to the 
merge conflict comment action to reduce complexity.

Thanks for the feedback. Please let me know, if we can proceed with v2 based on 
these changes.

Regards,
Michael



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Re: [edk2-devel] dek2 setup build failed

[Michael D Kinney]

Please try Python 3.9 or higher.

What is actual failure in the log?

Thanks,

Mike

From: devel@edk2.groups.io  On Behalf Of 
tdmaha...@gmail.com
Sent: Thursday, November 10, 2022 9:44 PM
To: devel@edk2.groups.io
Subject: [edk2-devel] dek2 setup build failed

Hi,
I'm facing an issues to build edk2 setup

C:\edk2>build
Build environment: Windows-post2008Server-6.2.9200
Build start time: 11:07:27, Nov.11 2022

WORKSPACE= c:\edk2
EDK_TOOLS_PATH   = c:\edk2\basetools
EDK_TOOLS_BIN= c:\edk2\basetools\bin\win32
CONF_PATH= c:\edk2\conf
PYTHON_COMMAND   = C:\Python27\Tools\Scripts\python.exe


Architecture(s)  = X64

Processing meta-data Build target = DEBUG
.Toolchain= VS2015x86

Active Platform  = c:\edk2\MdeModulePkg\MdeModulePkg.dsc


- Failed -
Build end time: 11:07:32, Nov.11 2022
Build total time: 00:00:05



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[edk2-devel] dek2 setup build failed

[tdmahawar]

Hi,
I'm facing an issues to build edk2 setup


C:\edk2>build
Build environment: Windows-post2008Server-6.2.9200
Build start time: 11:07:27, Nov.11 2022

WORKSPACE        = c:\edk2
EDK_TOOLS_PATH   = c:\edk2\basetools
EDK_TOOLS_BIN    = c:\edk2\basetools\bin\win32
CONF_PATH        = c:\edk2\conf
PYTHON_COMMAND   = C:\Python27\Tools\Scripts\python.exe

Architecture(s)  = X64

Processing meta-data Build target     = DEBUG
.Toolchain        = VS2015x86

Active Platform          = c:\edk2\MdeModulePkg\MdeModulePkg.dsc


- Failed -
Build end time: 11:07:32, Nov.11 2022
Build total time: 00:00:05


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Re: [edk2-devel] [PATCH 0/3] OVMF: support EFI_RNG_PROTOCOL without virtio-rng

[Jason A. Donenfeld via groups.io]

Hi Ard,

On Thu, Nov 10, 2022 at 2:48 PM Ard Biesheuvel  wrote:
>
> Currently, we only expose EFI_RNG_PROTOCOL when running under QEMU if it
> exposes a virtio-rng device. This means that generic EFI apps or
> loaders have no access to an entropy source if this device is
> unavailable, unless they implement their own arch-specific handling to
> figure out whether any CPU instructions or monitor calls can be used
> instead.
>
> So let's wire those up as EFI_RNG_PROTOCOL implementations as well,
> using the existing drivers and libraries.

I tested this series on x86 and it appears to work as expected. Thanks
for putting this together. So,

Tested-by: Jason A. Donenfeld 

On very brief inspection, this also looks good, though I'm not really
an EDK2 expert and my review isn't very thorough. But in case it
helps, which you can take or leave,

Reviewed-by: Jason A. Donenfeld 

My only question is how it chooses which RNG source to use in the
event that multiple are available. I would think preferring virtio-rng
if available is the right thing there. If it's based on the order of
the items in the .dsc file, then it looks like this series is doing
the right thing.

Jason


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Re: [edk2-devel] [PATCH 0/3] OVMF: support EFI_RNG_PROTOCOL without virtio-rng

[Jason A. Donenfeld via groups.io]

Hi Ard,

On Fri, Nov 11, 2022 at 8:47 AM Ard Biesheuvel  wrote:
>
> On Fri, 11 Nov 2022 at 03:41, Jason A. Donenfeld  wrote:
> >
> > Hi Ard,
> >
> > On Thu, Nov 10, 2022 at 2:48 PM Ard Biesheuvel  wrote:
> > >
> > > Currently, we only expose EFI_RNG_PROTOCOL when running under QEMU if it
> > > exposes a virtio-rng device. This means that generic EFI apps or
> > > loaders have no access to an entropy source if this device is
> > > unavailable, unless they implement their own arch-specific handling to
> > > figure out whether any CPU instructions or monitor calls can be used
> > > instead.
> > >
> > > So let's wire those up as EFI_RNG_PROTOCOL implementations as well,
> > > using the existing drivers and libraries.
> >
> > I tested this series on x86 and it appears to work as expected. Thanks
> > for putting this together. So,
> >
> > Tested-by: Jason A. Donenfeld 
> >
> > On very brief inspection, this also looks good, though I'm not really
> > an EDK2 expert and my review isn't very thorough. But in case it
> > helps, which you can take or leave,
> >
> > Reviewed-by: Jason A. Donenfeld 
> >
>
> Thanks.
>
> > My only question is how it chooses which RNG source to use in the
> > event that multiple are available. I would think preferring virtio-rng
> > if available is the right thing there. If it's based on the order of
> > the items in the .dsc file, then it looks like this series is doing
> > the right thing.
> >
>
> No, it is essentially arbitrary (but not random :-))
>
> We already have special handling for the virtio RNG device in the BDS
> code, because normally, EFI only dispatches drivers for devices that
> it needs to boot (i..e, it walks the device path of the boot entry and
> only connects a device to its driver at each stage if it needs to do
> so to get to the next one)
>
> So connecting the virtio-rng device to its driver needs to be done
> explicitly, or it may not be connected at all. We handle this in
> ConnectVirtioPciRng() for x86 and some similar code exists in
> ArmVirtPkg/Library/PlatformBootManagerLib/PlatformBm.c
>
> On ARM, the RngDxe wired up by this patch is backed by a hypervisor or
> secure world firmware service, rather than by the VMM, so in the ARM
> case, I think this one is the preferred one given that the VMM is
> generally less trusted (although that distinction really only matters
> for confidential compute).
>
> On x86, we use the RdRand instruction, which is also independent from
> the VMM, so I'd assume this is the preferred choice, no? Or do you
> have concerns about broken implementations?
>
> Another distinction is that the ARM version only implements
> EFI_RNG_ALGORITHM_RAW, whereas x86 also implements
> EFI_RNG_ALGORITHM_SP800_90_CTR_256_GUID. (virtio-rng also only
> implements EFI_RNG_ALGORITHM_RAW). This likely does not matter at all,
> but it is nevertheless good to call out while we decide which driver
> to give precedence.
>
> Another thing to note is that we generally try very hard to do as
> little as possible at boot time (although you might get a different
> impression when looking at the code :-)). So simply skipping the
> virtio-rng driver dispatch if some implementation of EFI_RNG_PROTOCOL
> is already available seems appropriate from that angle as well.

That all seems reasonable to me, your arguments about secure world
etc. So in case there's another rng dxe available, we can just skip
the (more expensive) virtio initialization, and this will make things
generally simpler too. Sounds alright.

Jason


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Re: [edk2-devel] [PATCH v1 1/1] MiscBootServices: Stall_Func: Reduces the stall interval for Stall_Func

[G Edhaya Chandran]

Hi Robert,

Thank you for the confirmation.
The patch is upstreamed through the below commit: 
https://github.com/tianocore/edk2-test/commit/1d181ad0d82520c099435ff08a8e829b44f493cc

With Warm Regards,
Edhay


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Re: [edk2-devel] [PATCH v1 1/1] .github/dependabot.yml: Enable dependabot

[Michael Kubacki]

Hi Mike,

It looks like the ability to open draft PRs is not possible at the moment:
Configure dependabot to create draft PRs · Issue #1291 · 
dependabot/dependabot-core · GitHub ( 
https://github.com/dependabot/dependabot-core/issues/1291 )

I could not find an ability for dependabot to leave that comment. Though I 
intentionally tried to keep it very similar in the mergify config file to the 
merge conflict comment action to reduce complexity.

Thanks for the feedback. Please let me know, if we can proceed with v2 based on 
these changes.

Regards,
Michael


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[edk2-devel] [PATCH 3/3] OvmfPkg/OvmfXen: Introduce Xen's ResetSystemLib, to use xen hypercall

[Anthony PERARD via groups.io]

From: Anthony PERARD 

When booting OvmfXen, the ACPI interface for shutdown/reset might not
be available, instead use the hypercall interface.

While it's probably possible to use the hypercall in all cases, we
keep using the same interface while it still possible. That is ACPI on
HVM guest, and fallback to hypercall on PVH guest.

Signed-off-by: Anthony PERARD 
---
 OvmfPkg/OvmfXen.dsc   | 10 +++
 ...ystemLib.inf => BaseResetSystemLibXen.inf} |  9 ---
 ...SystemLib.inf => DxeResetSystemLibXen.inf} | 11 +---
 ...ResetShutdown.c => BaseResetShutdownXen.c} | 19 +++---
 ...eResetShutdown.c => DxeResetShutdownXen.c} | 26 ---
 5 files changed, 49 insertions(+), 26 deletions(-)
 copy OvmfPkg/Library/ResetSystemLib/{BaseResetSystemLib.inf => 
BaseResetSystemLibXen.inf} (73%)
 copy OvmfPkg/Library/ResetSystemLib/{DxeResetSystemLib.inf => 
DxeResetSystemLibXen.inf} (73%)
 copy OvmfPkg/Library/ResetSystemLib/{BaseResetShutdown.c => 
BaseResetShutdownXen.c} (72%)
 copy OvmfPkg/Library/ResetSystemLib/{DxeResetShutdown.c => 
DxeResetShutdownXen.c} (72%)

diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc
index 8df173a0ee84..18f7c0d76643 100644
--- a/OvmfPkg/OvmfXen.dsc
+++ b/OvmfPkg/OvmfXen.dsc
@@ -118,7 +118,7 @@ [SkuIds]
 [LibraryClasses]
   PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
   TimerLib|MdePkg/Library/SecPeiDxeTimerLibCpu/SecPeiDxeTimerLibCpu.inf
-  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
+  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibXen.inf
   PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
   BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
   BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
@@ -302,7 +302,7 @@ [LibraryClasses.common.DXE_CORE]
 
 [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
-  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibXen.inf
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
   DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
   
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
@@ -316,7 +316,7 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER]
 
 [LibraryClasses.common.UEFI_DRIVER]
   PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
-  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibXen.inf
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
   DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
   
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
@@ -326,7 +326,7 @@ [LibraryClasses.common.UEFI_DRIVER]
 
 [LibraryClasses.common.DXE_DRIVER]
   PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
-  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibXen.inf
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
   
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
   
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
@@ -345,7 +345,7 @@ [LibraryClasses.common.DXE_DRIVER]
 
 [LibraryClasses.common.UEFI_APPLICATION]
   PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
-  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLib.inf
+  ResetSystemLib|OvmfPkg/Library/ResetSystemLib/DxeResetSystemLibXen.inf
   HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
   
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
   
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
diff --git a/OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf 
b/OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibXen.inf
similarity index 73%
copy from OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
copy to OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibXen.inf
index 35d317f1e0b3..8d75dd565365 100644
--- a/OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
+++ b/OvmfPkg/Library/ResetSystemLib/BaseResetSystemLibXen.inf
@@ -1,7 +1,9 @@
 ## @file
-#  Base library instance for ResetSystem library class for OVMF
+#  Base library instance for ResetSystem library class for Xen
 #
 #  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+#  Copyright (c) 2022, Citrix Systems, Inc.
+#
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -9,7 +11,7 @@
 [Defines]
   INF_VERSION= 0x00010005
   BASE_NAME  = BaseResetSystemLib
-  FILE_GUID  = 66564872-21d4-4d2a-a68b-1e844f980820
+  FILE_GUID  = 9ef32aa1-9e82-4fb1-9c49-0eff538601f8
   MODULE_TYPE= BASE
   VERSION_STRING = 1.0
   LIBRARY_CLASS  

[edk2-devel] [PATCH 2/3] OvmfPkg/XenHypercallLib: Add SchedOp hypercall

[Anthony PERARD via groups.io]

From: Anthony PERARD 

Add a new function to allow to make an hypercall to shutdown the
machine.

This import "sched.h" public header from Xen Project's repo. Some
changes have been made to be closer to EDK2's coding style.

Signed-off-by: Anthony PERARD 
---
 OvmfPkg/Include/IndustryStandard/Xen/sched.h  | 50 +++
 OvmfPkg/Include/Library/XenHypercallLib.h |  7 +++
 .../Library/XenHypercallLib/XenHypercall.c| 14 ++
 3 files changed, 71 insertions(+)
 create mode 100644 OvmfPkg/Include/IndustryStandard/Xen/sched.h

diff --git a/OvmfPkg/Include/IndustryStandard/Xen/sched.h 
b/OvmfPkg/Include/IndustryStandard/Xen/sched.h
new file mode 100644
index ..b050354efe8d
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/Xen/sched.h
@@ -0,0 +1,50 @@
+/**
+ * sched.h
+ *
+ * Scheduler state interactions
+ *
+ * SPDX-License-Identifier: MIT
+ *
+ * Copyright (c) 2005, Keir Fraser 
+ */
+
+#ifndef __XEN_PUBLIC_SCHED_H__
+#define __XEN_PUBLIC_SCHED_H__
+
+#include "event_channel.h"
+
+/*
+ * Halt execution of this domain (all VCPUs) and notify the system controller.
+ * @arg == pointer to sched_shutdown_t structure.
+ *
+ * If the sched_shutdown_t reason is SHUTDOWN_suspend then
+ * x86 PV guests must also set RDX (EDX for 32-bit guests) to the MFN
+ * of the guest's start info page.  RDX/EDX is the third hypercall
+ * argument.
+ *
+ * In addition, which reason is SHUTDOWN_suspend this hypercall
+ * returns 1 if suspend was cancelled or the domain was merely
+ * checkpointed, and 0 if it is resuming in a new domain.
+ */
+#define XEN_SCHEDOP_SHUTDOWN  2
+
+struct _XEN_SCHED_SHUTDOWN {
+  unsigned intReason; /* SHUTDOWN_* => enum sched_shutdown_reason */
+};
+
+typedef struct _XEN_SCHED_SHUTDOWN XEN_SCHED_SHUTDOWN;
+DEFINE_XEN_GUEST_HANDLE (XEN_SCHED_SHUTDOWN);
+
+/*
+ * Reason codes for SCHEDOP_shutdown. These may be interpreted by control
+ * software to determine the appropriate action. For the most part, Xen does
+ * not care about the shutdown code.
+ */
+/* ` enum sched_shutdown_reason { */
+#define XEN_SHED_SHUTDOWN_POWEROFF  0  /* Domain exited normally. Clean up and 
kill. */
+#define XEN_SHED_SHUTDOWN_REBOOT1  /* Clean up, kill, and then restart.
  */
+#define XEN_SHED_SHUTDOWN_SUSPEND   2  /* Clean up, save suspend info, kill.   
  */
+#define XEN_SHED_SHUTDOWN_CRASH 3  /* Tell controller we've crashed.   
  */
+#define XEN_SHED_SHUTDOWN_WATCHDOG  4  /* Restart because watchdog time 
expired. */
+
+#endif /* __XEN_PUBLIC_SCHED_H__ */
diff --git a/OvmfPkg/Include/Library/XenHypercallLib.h 
b/OvmfPkg/Include/Library/XenHypercallLib.h
index 28eee8ccac85..d7cf2c0c505b 100644
--- a/OvmfPkg/Include/Library/XenHypercallLib.h
+++ b/OvmfPkg/Include/Library/XenHypercallLib.h
@@ -101,4 +101,11 @@ XenHypercallEventChannelOp (
   IN OUT VOID  *Arguments
   );
 
+INTN
+EFIAPI
+XenHypercallSchedOp (
+  IN INTN  Operation,
+  IN OUT VOID  *Arguments
+  );
+
 #endif
diff --git a/OvmfPkg/Library/XenHypercallLib/XenHypercall.c 
b/OvmfPkg/Library/XenHypercallLib/XenHypercall.c
index 65b14a11f402..b1a129998fdc 100644
--- a/OvmfPkg/Library/XenHypercallLib/XenHypercall.c
+++ b/OvmfPkg/Library/XenHypercallLib/XenHypercall.c
@@ -87,3 +87,17 @@ XenHypercallEventChannelOp (
(INTN)Arguments
);
 }
+
+INTN
+EFIAPI
+XenHypercallSchedOp (
+  IN INTN  Operation,
+  IN OUT VOID  *Arguments
+  )
+{
+  return XenHypercall2 (
+   __HYPERVISOR_sched_op,
+   Operation,
+   (INTN)Arguments
+   );
+}
-- 
Anthony PERARD



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[edk2-devel] [PATCH 1/3] OvmfPkg: Introduce runtime XenHypercallLib

[Anthony PERARD via groups.io]

From: Anthony PERARD 

We need a way to execute instruction "generated" at runtime from the
runtime library.

This patch introduce XenHypercallRuntimeLib, which is mostly a copy of
XenHypercallLib with a few changes.

We reserved some code space with "XenHypercallPage", which we will
overwrite to put the xen hypercall code. Then we ask Xen to overwrite
the reserved space with the hypercall page via `wrmsr`.

Allocation doesn't work, because the memory allocated at run time is
always considered to be data instead of code, so once Linux takes
over, we can't execute from it.

Signed-off-by: Anthony PERARD 
---

Notes:
I've been told that we don't need to ask Xen on how to make hypercall
on x86, and that was just an helper to not have to figure out which
instruction to use. That would mean that instead of doing write_msr,
we would need a way to distinguish between AMD and Intel in order to
find out which instruction to use. So if this patch is too weird, that
another way to have hypercall in a runtime service.

 OvmfPkg/OvmfXen.dsc   |   1 +
 .../XenHypercallRuntimeLib.inf|  46 
 .../XenHypercallLib/X86RuntimeXenHypercall.c  | 210 ++
 .../X64/RuntimeHypercallPage.nasm |  24 ++
 4 files changed, 281 insertions(+)
 create mode 100644 OvmfPkg/Library/XenHypercallLib/XenHypercallRuntimeLib.inf
 create mode 100644 OvmfPkg/Library/XenHypercallLib/X86RuntimeXenHypercall.c
 create mode 100644 
OvmfPkg/Library/XenHypercallLib/X64/RuntimeHypercallPage.nasm

diff --git a/OvmfPkg/OvmfXen.dsc b/OvmfPkg/OvmfXen.dsc
index 58a7c97cddf7..8df173a0ee84 100644
--- a/OvmfPkg/OvmfXen.dsc
+++ b/OvmfPkg/OvmfXen.dsc
@@ -312,6 +312,7 @@ [LibraryClasses.common.DXE_RUNTIME_DRIVER]
   PciLib|OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/DxeQemuFwCfgS3LibFwCfg.inf
   
VariablePolicyLib|MdeModulePkg/Library/VariablePolicyLib/VariablePolicyLibRuntimeDxe.inf
+  XenHypercallLib|OvmfPkg/Library/XenHypercallLib/XenHypercallRuntimeLib.inf
 
 [LibraryClasses.common.UEFI_DRIVER]
   PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
diff --git a/OvmfPkg/Library/XenHypercallLib/XenHypercallRuntimeLib.inf 
b/OvmfPkg/Library/XenHypercallLib/XenHypercallRuntimeLib.inf
new file mode 100644
index ..07fdeb612760
--- /dev/null
+++ b/OvmfPkg/Library/XenHypercallLib/XenHypercallRuntimeLib.inf
@@ -0,0 +1,46 @@
+## @file
+#  Xen Hypercall abstraction lib for Intel for runtime services
+#
+#  Copyright (c) 2014, Linaro Ltd. All rights reserved.
+#  Copyright (c) 2022, Citrix Systems, Inc.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = XenHypercallRuntimeLib
+  FILE_GUID  = f657a395-1d2c-40b5-bd34-eedc203899ab
+  MODULE_TYPE= DXE_RUNTIME_DRIVER
+  VERSION_STRING = 1.0
+  CONSTRUCTOR= XenHypercallRuntimeLibConstruct
+
+[Defines.IA32, Defines.X64]
+  LIBRARY_CLASS  = XenHypercallLib|DXE_RUNTIME_DRIVER
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = X64
+#
+
+[Sources.X64]
+  X86RuntimeXenHypercall.c
+  X64/hypercall.nasm
+  X64/RuntimeHypercallPage.nasm
+
+[Sources]
+  XenHypercall.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  DebugLib
+  UefiRuntimeLib
+
+[Guids.X64]
+  gEfiEventVirtualAddressChangeGuid   # ALWAYS_CONSUMED
diff --git a/OvmfPkg/Library/XenHypercallLib/X86RuntimeXenHypercall.c 
b/OvmfPkg/Library/XenHypercallLib/X86RuntimeXenHypercall.c
new file mode 100644
index ..d1c097e00f3a
--- /dev/null
+++ b/OvmfPkg/Library/XenHypercallLib/X86RuntimeXenHypercall.c
@@ -0,0 +1,210 @@
+/** @file
+  Xen Hypercall Library implementation for Intel architecture
+
+  Copyright (c) 2014, Linaro Ltd. All rights reserved.
+  Copyright (c) 2022, Citrix Systems, Inc.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+STATIC VOID  *mHyperPage;
+
+//
+// Pointer to reserved page for Xen's hypercall page.
+//
+extern VOID  *XenHypercallPage;
+
+//
+// Virtual Address Change Event
+//
+// This is needed for runtime variable access.
+//
+EFI_EVENT  mXenHypercallLibAddrChangeEvent = NULL;
+
+RETURN_STATUS
+EFIAPI
+XenHypercallRuntimeLibConstruct (
+  IN EFI_HANDLEImageHandle,
+  IN EFI_SYSTEM_TABLE  *SystemTable
+  )
+{
+  XenHypercallLibInit ();
+
+  //
+  // We don't fail library construction, since that has catastrophic
+  // consequences for client modules (whereas those modules may easily be
+  // running on a non-Xen platform). Instead, XenHypercallIsAvailable()
+  // will return FALSE.
+  //
+  return RETURN_SUCCESS;
+}
+
+/**
+  Check if the Xen Hypercall library is

[edk2-devel] [PATCH 0/3] OvmfXen: Fix machine shutdown in PVH guest

[Anthony PERARD via groups.io]

From: Anthony PERARD 

Patch series available in this git branch:
https://xenbits.xen.org/git-http/people/aperard/ovmf.git 
br.fix-pvh-shutdown-v2-v1

From: Anthony PERARD 

Hi,

This series instroduce a XenHypercallLib that can be used at runtime by a EFI
service. And then it introduce a modified ResetSystemLib for Xen so we can use
the hypercall interface to shutdown a machine when the ACPI interface isn't
available.

Thanks,

Anthony PERARD (3):
  OvmfPkg: Introduce runtime XenHypercallLib
  OvmfPkg/XenHypercallLib: Add SchedOp hypercall
  OvmfPkg/OvmfXen: Introduce Xen's ResetSystemLib, to use xen hypercall

 OvmfPkg/OvmfXen.dsc   |  11 +-
 ...ystemLib.inf => BaseResetSystemLibXen.inf} |   9 +-
 ...SystemLib.inf => DxeResetSystemLibXen.inf} |  11 +-
 .../XenHypercallRuntimeLib.inf|  46 
 OvmfPkg/Include/IndustryStandard/Xen/sched.h  |  50 +
 OvmfPkg/Include/Library/XenHypercallLib.h |   7 +
 ...ResetShutdown.c => BaseResetShutdownXen.c} |  19 +-
 ...eResetShutdown.c => DxeResetShutdownXen.c} |  26 ++-
 .../XenHypercallLib/X86RuntimeXenHypercall.c  | 210 ++
 .../Library/XenHypercallLib/XenHypercall.c|  14 ++
 .../X64/RuntimeHypercallPage.nasm |  24 ++
 11 files changed, 401 insertions(+), 26 deletions(-)
 copy OvmfPkg/Library/ResetSystemLib/{BaseResetSystemLib.inf => 
BaseResetSystemLibXen.inf} (73%)
 copy OvmfPkg/Library/ResetSystemLib/{DxeResetSystemLib.inf => 
DxeResetSystemLibXen.inf} (73%)
 create mode 100644 OvmfPkg/Library/XenHypercallLib/XenHypercallRuntimeLib.inf
 create mode 100644 OvmfPkg/Include/IndustryStandard/Xen/sched.h
 copy OvmfPkg/Library/ResetSystemLib/{BaseResetShutdown.c => 
BaseResetShutdownXen.c} (72%)
 copy OvmfPkg/Library/ResetSystemLib/{DxeResetShutdown.c => 
DxeResetShutdownXen.c} (72%)
 create mode 100644 OvmfPkg/Library/XenHypercallLib/X86RuntimeXenHypercall.c
 create mode 100644 
OvmfPkg/Library/XenHypercallLib/X64/RuntimeHypercallPage.nasm

-- 
Anthony PERARD



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[edk2-devel] [PATCH 1/1] BaseSynchronizationLib: Fix RISC-V helper name

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4143

Fix the name of InternalSyncCompareExchange64() function.

Signed-off-by: Sunil V L 
Reported-by: Zhihao Li 
Tested-by: Zhihao Li 

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Daniel Schaefer 
---
 .../Library/BaseSynchronizationLib/BaseSynchronizationLib.inf | 2 +-
 .../Library/BaseSynchronizationLib/RiscV64/Synchronization.S  | 4 +---
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf 
b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
index dd66ec1d0370..88dfb880fea9 100755
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -81,7 +81,7 @@ [Sources.AARCH64]
 
 [Sources.RISCV64]
   Synchronization.c
-  RiscV64/Synchronization.S
+  RiscV64/Synchronization.S | GCC
 
 [Sources.LOONGARCH64]
   Synchronization.c
diff --git a/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S 
b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S
index bac80d687168..f287ef38f651 100644
--- a/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S
+++ b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S
@@ -36,8 +36,6 @@ exit:
 mva0, a3
 ret
 
-.global ASM_PFX(InternalSyncCompareExchange64)
-
 //
 // Compare and xchange a 64-bit value.
 //
@@ -45,7 +43,7 @@ exit:
 // @param a1 : Compare value.
 // @param a2 : Exchange value.
 //
-ASM_PFX (SyncCompareExchange64):
+ASM_PFX (InternalSyncCompareExchange64):
 lr.d  a3, (a0)   // Load the value from a0 and make
  // the reservation of address.
 bne   a3, a1, exit
-- 
2.38.0



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Re: [edk2-devel] [edk2-platforms][PATCH V5 14/15] Platform/Loongson: Support Dxe

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> Support Dxe for LoogArch.
>
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../Loongson/LoongArchQemuPkg/Loongson.dec | 13 +
> .../Loongson/LoongArchQemuPkg/Loongson.dsc | 421 ++
> .../Loongson/LoongArchQemuPkg/Loongson.fdf | 245 ++
> .../LoongArchQemuPkg/Loongson.fdf.inc | 42 ++
> 4 files changed, 721 insertions(+)
>
>
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
> b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
> index aeae75a678..54a50738ec 100644
> --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
> +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
> @@ -27,13 +27,21 @@
>
>
> [Guids]
> gLoongArchQemuPkgTokenSpaceGuid = { 0x0e0383ce, 0x0151, 0x4d01, { 0x80, 0x0e, 
> 0x3f, 0xef, 0x8b, 0x27, 0x6d, 0x52 } }
> + gEfiLoongsonBootparamsTableGuid = { 0x4660f721, 0x2ec5, 0x416a, { 0x89, 
> 0x9a, 0x43, 0x18, 0x02, 0x50, 0xa0, 0xc9 } }
> +
> +[Protocols]
>
>
> ## In the PcdsFixedAtBuild and PcdsDynamic areas, numbers start at 0x0.
> [PcdsFixedAtBuild, PcdsDynamic]
> gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x
> gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0001
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvOffset|0x0|UINT64|0x0002
> gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|0x0|UINT64|0x0003
> gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize|0x0|UINT32|0x0004
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecModuleBase|0x0|UINT64|0x0005
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecModuleSize|0x0|UINT32|0x0006
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashEventLogBase|0x0|UINT64|0x0007
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashEventLogSize|0x0|UINT32|0x0008
> gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase|0x0|UINT64|0x0009
> gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding|256|UINT32|0x000a
>
>
> @@ -48,6 +56,8 @@
> [PcdsFixedAtBuild.LOONGARCH64]
> gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32|UINT8|0x0001
> gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x00010001
> + 
> gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceSpaceStartAddress|0x1000|UINT32|0x00010002
> + 
> gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceSpaceLength|0x8000|UINT32|0x00010003
>
>
> ## In the PcdsDynamic area, numbers start at 0x2.
> [PcdsDynamic]
> @@ -59,3 +69,6 @@
> gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud|0x0|UINT64|0x00020005
> gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd|0x0|UINT64|0x00020006
> gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte|0x0|UINT64|0x00020007
> +
> +## In the PcdsFeatureFlag area, numbers start at 0x3.
> +[PcdsFeatureFlag]
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
> b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
> index b78a7e3b49..6f71280c4d 100644
> --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
> +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
> @@ -24,6 +24,25 @@
> FLASH_DEFINITION = Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
> TTY_TERMINAL = FALSE
>
>
> + #
> + # Defines for default states. These can be changed on the command line.
> + # -D FLAG=VALUE
> + DEFINE TTY_TERMINAL = FALSE
> + DEFINE SECURE_BOOT_ENABLE = FALSE
> + DEFINE TPM2_ENABLE = FALSE
> + DEFINE TPM2_CONFIG_ENABLE = FALSE
> +
> + #
> + # Network definition
> + #
> + DEFINE NETWORK_IP6_ENABLE = FALSE
> + DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
> + DEFINE NETWORK_SNP_ENABLE = FALSE
> + DEFINE NETWORK_TLS_ENABLE = FALSE
> + DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE
> + DEFINE NETWORK_ISCSI_ENABLE = FALSE
> +
> +!include NetworkPkg/NetworkDefines.dsc.inc
> 
> #
> # Defines for default states. These can be changed on the command line.
> @@ -37,6 +56,8 @@
> #
> GCC:*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
>
>
> +!include NetworkPkg/NetworkBuildOptions.dsc.inc
> +
> [BuildOptions.LOONGARCH64.EDKII.SEC]
> *_*_*_CC_FLAGS =
>
>
> @@ -46,6 +67,14 @@
> [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
> GCC:*_*_LOONGARCH64_DLINK_FLAGS = -z common-page-size=0x1
>
>
> +
> +#
> +# SKU Identification section - list of all SKU IDs supported by this 
> Platform.
> +#
> +
> +[SkuIds]
> + 0|DEFAULT
> +
> 
> #
> # Library Class section - list of all Library Classes needed by this Platform.
> @@ -59,19 +88,93 @@
> TimerLib | 
> Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf
> PrintLib | MdePkg/Library/BasePrintLib/BasePrintLib.inf
> BaseMemoryLib | MdePkg/Libr

Re: [edk2-devel] [edk2-platforms][PATCH V5 13/15] Platform/Loongson: Add Reset System Lib.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> This library provides interfaces related to restart and shutdown.
>
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../BaseResetSystemAcpiGed.c | 146 ++
> .../BaseResetSystemAcpiGedLib.inf | 37 +++
> .../DxeResetSystemAcpiGed.c | 257 ++
> .../DxeResetSystemAcpiGedLib.inf | 41 +++
> .../ResetSystemAcpiLib/ResetSystemAcpiGed.c | 128 +
> .../ResetSystemAcpiLib/ResetSystemAcpiGed.h | 23 ++
> 6 files changed, 632 insertions(+)
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGedLib.inf
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGed.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGedLib.inf
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.h
>
>
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
>  
> b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
> new file mode 100644
> index 00..0df629ffcd
> --- /dev/null
> +++ 
> b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
> @@ -0,0 +1,146 @@
> +/** @file
> + Base ResetSystem library implementation.
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "ResetSystemAcpiGed.h"
> +#include 
> +
> +/**
> + Get configuration item data by the firmware configuration file name.
> +
> + @param[in] Name - Name of file to look up.
> +
> + @return VOID* The Pointer of Value of Firmware Configuration item read.
> +**/
> +VOID *
> +GetFwCfgData(
> +CONST CHAR8 *Name
> +)
> +{
> + FIRMWARE_CONFIG_ITEM FwCfgItem;
> + EFI_STATUS Status;
> + UINTN FwCfgSize;
> + VOID *Data;
> +
> + Status = QemuFwCfgFindFile (Name, &FwCfgItem, &FwCfgSize);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a %d read %s error Status %d \n", __func__, 
> __LINE__, Name, Status));
> + return NULL;
> + }
> +
> + Data = AllocatePool (FwCfgSize);
> + if (Data == NULL) {
> + return NULL;
> + }
> +
> + QemuFwCfgSelectItem (FwCfgItem);
> + QemuFwCfgReadBytes (FwCfgSize, Data);
> +
> + return Data;
> +}
> +
> +/**
> + Find the power manager related info from ACPI table
> +
> + @retval RETURN_SUCCESS Successfully find out all the required information.
> + @retval RETURN_NOT_FOUND Failed to find the required info.
> +**/
> +STATIC EFI_STATUS
> +GetPowerManagerByParseAcpiInfo (VOID)
> +{
> + EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt = NULL;
> + EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp = NULL;
> + EFI_ACPI_DESCRIPTION_HEADER *Xsdt = NULL;
> + EFI_ACPI_DESCRIPTION_HEADER *Rsdt = NULL;
> + VOID *AcpiTables = NULL;
> + UINT32 *Entry32 = NULL;
> + UINTN Entry32Num;
> + UINT32 *Signature = NULL;
> + UINTN Idx;
> +
> + Rsdp = GetFwCfgData ("etc/acpi/rsdp");
> + if (Rsdp == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/rsdp error \n", __func__, 
> __LINE__));
> + return RETURN_NOT_FOUND;
> + }
> +
> + AcpiTables = GetFwCfgData ("etc/acpi/tables");
> + if (AcpiTables == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/tables error \n", __func__, 
> __LINE__));
> + FreePool (Rsdp);
> + return RETURN_NOT_FOUND;
> + }
> +
> + Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables + 
> Rsdp->RsdtAddress);
> + Entry32 = (UINT32 *)(Rsdt + 1);
> + Entry32Num = (Rsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
> + for (Idx = 0; Idx < Entry32Num; Idx++) {
> + Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
> + if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
> + Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)Signature;
> + DEBUG ((DEBUG_INFO, "Found Fadt in Rsdt\n"));
> + goto Done;
> + }
> + }
> +
> + Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables + 
> Rsdp->XsdtAddress);
> + Entry32 = (UINT32 *)(Xsdt + 1);
> + Entry32Num = (Xsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
> + for (Idx = 0; Idx < Entry32Num; Idx++) {
> + Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
> + if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
> + Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)Signature;
> + DEBUG ((DEBUG_INFO, "Found Fadt in Xsdt\n"));
> + goto Done;
> + }
> + }

Re: [edk2-devel] [edk2-platforms][PATCH V5 12/15] Platform/Loongson: Add Platform Boot Manager Lib.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> The Library provides Boot Manager interfaces.
>
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../PlatformBootManagerLib/PlatformBm.c | 742 ++
> .../PlatformBootManagerLib/PlatformBm.h | 112 +++
> .../PlatformBootManagerLib.inf | 75 ++
> .../PlatformBootManagerLib/QemuKernel.c | 81 ++
> 4 files changed, 1010 insertions(+)
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/QemuKernel.c
>
>
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
>  
> b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
> new file mode 100644
> index 00..eb7f4241f0
> --- /dev/null
> +++ 
> b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
> @@ -0,0 +1,742 @@
> +/** @file
> + Implementation for PlatformBootManagerLib library class interfaces.
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "PlatformBm.h"
> +
> +STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
> + //
> + // VENDOR_DEVICE_PATH SerialDxe
> + //
> + {
> + { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
> + SERIAL_DXE_FILE_GUID
> + },
> +
> + //
> + // UART_DEVICE_PATH Uart
> + //
> + {
> + { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
> + 0, // Reserved
> + FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
> + FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits
> + FixedPcdGet8 (PcdUartDefaultParity), // Parity
> + FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits
> + },
> +
> + //
> + // VENDOR_DEFINED_DEVICE_PATH TermType
> + //
> + {
> + {
> + MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
> + DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
> + }
> + //
> + // Guid to be filled in dynamically
> + //
> + },
> +
> + //
> + // EFI_DEVICE_PATH_PROTOCOL End
> + //
> + {
> + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
> + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
> + }
> +};
> +
> +STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
> + //
> + // USB_CLASS_DEVICE_PATH Keyboard
> + //
> + {
> + {
> + MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
> + DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
> + },
> + 0x, // VendorId: any
> + 0x, // ProductId: any
> + 3, // DeviceClass: HID
> + 1, // DeviceSubClass: boot
> + 1 // DeviceProtocol: keyboard
> + },
> +
> + //
> + // EFI_DEVICE_PATH_PROTOCOL End
> + //
> + {
> + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
> + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
> + }
> +};
> +
> +/**
> + Locate all handles that carry the specified protocol, filter them with a
> + callback function, and pass each handle that passes the filter to another
> + callback.
> +
> + @param[in] ProtocolGuid The protocol to look for.
> +
> + @param[in] Filter The filter function to pass each handle to. If this
> + parameter is NULL, then all handles are processed.
> +
> + @param[in] Process The callback function to pass each handle to that
> + clears the filter.
> +**/
> +VOID
> +FilterAndProcess (
> + IN EFI_GUID *ProtocolGuid,
> + IN FILTER_FUNCTION Filter OPTIONAL,
> + IN CALLBACK_FUNCTION Process
> + )
> +{
> + EFI_STATUS Status;
> + EFI_HANDLE *Handles;
> + UINTN NoHandles;
> + UINTN Idx;
> +
> + Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
> + NULL /* SearchKey */, &NoHandles, &Handles);
> + if (EFI_ERROR (Status)) {
> + //
> + // This is not an error, just an informative condition.
> + //
> + DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
> + Status));
> + return;
> + }
> +
> + ASSERT (NoHandles > 0);
> + for (Idx = 0; Idx < NoHandles; ++Idx) {
> + CHAR16 *DevicePathText;
> + STATIC CHAR16 Fallback[] = L"";
> +
> + //
> + // The ConvertDevicePathToText () function handles NULL input transparently.
> + //
> + DevicePathText = ConvertDevicePathToText (
> + DevicePathFromHandle (Handles[Idx]),
> + FALSE, // DisplayOnly
> + FALSE // AllowShortcuts
> + );
> + if (DevicePathText == NULL) {
> + DevicePathText = Fallback;
> + }
> +
> + if ((Filter == NULL)
> + || (Filter (Handles[Idx], DevicePathText)))
> + {
> + Process (Handles[Idx], DevicePathText);
> + }
> +
> + if (Device

Re: [edk2-devel] [edk2-platforms][PATCH V5 11/15] Platform/Loongson: Add RealTime Clock lib.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> This library provides interfaces such as
>
> real-time clock initialization
> to get time and setting time.
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../LsRealTimeClockLib/LsRealTimeClock.h | 40 +++
> .../LsRealTimeClockLib/LsRealTimeClockLib.c | 335 ++
> .../LsRealTimeClockLib/LsRealTimeClockLib.inf | 44 +++
> 3 files changed, 419 insertions(+)
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.inf
>
>
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
>  
> b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
> new file mode 100644
> index 00..6567ec80db
> --- /dev/null
> +++ 
> b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
> @@ -0,0 +1,40 @@
> +/** @file
> + Implement EFI RealTimeClock runtime services via RTC Lib.
> +
> + Copyright (c) 2022, Loongson Limited. All rights reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef LS_REAL_TIME_CLOCK_H_
> +#define LS_REAL_TIME_CLOCK_H_
> +
> +#define TOY_WRITE0_REG 0x24
> +#define TOY_WRITE1_REG 0x28
> +#define TOY_READ0_REG 0x2c
> +#define TOY_READ1_REG 0x30
> +#define RTC_CTRL_REG 0x40
> +
> +/* TOY Enable bits */
> +#define RTC_ENABLE_BIT (1UL << 13)
> +#define TOY_ENABLE_BIT (1UL << 11)
> +#define OSC_ENABLE_BIT (1UL << 8)
> +
> +/*
> + * shift bits and filed mask
> + */
> +#define TOY_MON_MASK 0x3f
> +#define TOY_DAY_MASK 0x1f
> +#define TOY_HOUR_MASK 0x1f
> +#define TOY_MIN_MASK 0x3f
> +#define TOY_SEC_MASK 0x3f
> +#define TOY_MSEC_MASK 0xf
> +
> +#define TOY_MON_SHIFT 26
> +#define TOY_DAY_SHIFT 21
> +#define TOY_HOUR_SHIFT 16
> +#define TOY_MIN_SHIFT 10
> +#define TOY_SEC_SHIFT 4
> +
> +#endif // LS_REAL_TIME_CLOCK_H_
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
>  
> b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
> new file mode 100644
> index 00..dc651ccaaf
> --- /dev/null
> +++ 
> b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
> @@ -0,0 +1,335 @@
> +/** @file
> + Implement EFI RealTimeClock runtime services via RTC Lib.
> +
> + Copyright (c) 2022, Loongson Limited. All rights reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "LsRealTimeClock.h"
> +
> +STATIC BOOLEAN mInitialized = FALSE;
> +STATIC EFI_EVENT mRtcVirtualAddrChangeEvent;
> +STATIC UINTN mRtcBase = 0x100d0100;
> +/*
> + Enable Real-time clock.
> +
> + @param VOID
> +
> + @retval VOID
> + */
> +VOID
> +InitRtc (
> + VOID
> + )
> +{
> + UINTN Val;
> +
> + if (!mInitialized) {
> + /* enable rtc */
> + Val = MmioRead32 (mRtcBase + RTC_CTRL_REG);
> + Val |= TOY_ENABLE_BIT | OSC_ENABLE_BIT;
> + MmioWrite32 (mRtcBase + RTC_CTRL_REG, Val);
> + mInitialized = TRUE;
> + }
> +}
> +
> +/**
> + Returns the current time and date information, and the time-keeping 
> capabilities
> + of the hardware platform.
> +
> + @param Time A pointer to storage to receive a snapshot of the current time.
> + @param Capabilities An optional pointer to a buffer to receive the real 
> time clock
> + device's capabilities.
> +
> + @retval EFI_SUCCESS The operation completed successfully.
> + @retval EFI_INVALID_PARAMETER Time is NULL.
> + @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware 
> error.
> + @retval EFI_SECURITY_VIOLATION The time could not be retrieved due to an 
> authentication failure.
> +**/
> +EFI_STATUS
> +EFIAPI
> +LibGetTime (
> + OUT EFI_TIME *Time,
> + OUT EFI_TIME_CAPABILITIES *Capabilities
> + )
> +{
> + UINT32 Val;
> +
> + // Ensure Time is a valid pointer
> + if (Time == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + InitRtc ();
> + Val = MmioRead32 (mRtcBase + TOY_READ1_REG);
> + Time->Year = Val + 1900;
> +
> + Val = MmioRead32 (mRtcBase + TOY_READ0_REG);
> + Time->Month = (Val >> TOY_MON_SHIFT) & TOY_MON_MASK;
> + Time->Day = (Val >> TOY_DAY_SHIFT) & TOY_DAY_MASK;
> + Time->Hour = (Val >> TOY_HOUR_SHIFT) & TOY_HOUR_MASK;
> + Time->Minute = (Val >> TOY_MIN_SHIFT) & TOY_MIN_MASK;
> + Time->Second = (Val >> TOY_SEC_SHIFT) & TOY_SEC_MASK;
> + Time->Nanosecond = 0;
> + return EFI_SUCCESS;
> +}
> +
> +

Re: [edk2-devel] [edk2-platforms][PATCH V5 10/15] Platform/Loongson: Add timer Dxe driver.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> This driver produces Timer Architectural Protocol,
>
> Registers a timer interrupt and initializes the timer.
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../Drivers/StableTimerDxe/Timer.c | 388 ++
> .../Drivers/StableTimerDxe/Timer.h | 172 
> .../Drivers/StableTimerDxe/TimerConfig.S | 38 ++
> .../Drivers/StableTimerDxe/TimerDxe.inf | 44 ++
> 4 files changed, 642 insertions(+)
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/TimerConfig.S
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/TimerDxe.inf
>
>
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c 
> b/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
> new file mode 100644
> index 00..e09da71272
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
> @@ -0,0 +1,388 @@
> +/** @file
> + Timer Architectural Protocol as defined in the DXE CIS
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include "Library/Cpu.h"
> +#include 
> +#include 
> +#include "Timer.h"
> +#include 
> +#include 
> +
> +//
> +// The handle onto which the Timer Architectural Protocol will be installed
> +//
> +EFI_HANDLE mTimerHandle = NULL;
> +EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
> +
> +//
> +// The Timer Architectural Protocol that this driver produces
> +//
> +EFI_TIMER_ARCH_PROTOCOL mTimer = {
> + TimerDriverRegisterHandler,
> + TimerDriverSetTimerPeriod,
> + TimerDriverGetTimerPeriod,
> + TimerDriverGenerateSoftInterrupt
> +};
> +
> +//
> +// Pointer to the CPU Architectural Protocol instance
> +//
> +EFI_CPU_ARCH_PROTOCOL *mCpu;
> +
> +//
> +// The notification function to call on every timer interrupt.
> +// A bug in the compiler prevents us from initializing this here.
> +//
> +EFI_TIMER_NOTIFY mTimerNotifyFunction;
> +
> +//
> +// The current period of the timer interrupt
> +//
> +volatile UINT64 mTimerPeriod = 0;
> +volatile UINT64 mTimerTicks = 0;
> +
> +//
> +// Const frequence in Hz
> +//
> +extern UINT32 StableTimerFreq;
> +
> +/**
> + Sets the counter value for timer.
> +
> + @param Count The 16-bit counter value to program into stable timer.
> +
> + @retval VOID
> +**/
> +VOID
> +SetPitCount (
> + IN UINT64 Count
> + )
> +{
> + if (Count <= 4) {
> + return;
> + }
> +
> + Count &= LOONGARCH_CSR_TMCFG_TIMEVAL;
> + Count |= LOONGARCH_CSR_TMCFG_EN | LOONGARCH_CSR_TMCFG_PERIOD;
> + LoongarchWriteqTmcfg (Count);
> +}
> +
> +/**
> + Timer Interrupt Handler.
> +
> + @param InterruptType The type of interrupt that occurred
> + @param SystemContext A pointer to the system context when the interrupt 
> occurred
> +
> + @retval VOID
> +**/
> +VOID
> +EFIAPI
> +TimerInterruptHandler (
> + IN EFI_EXCEPTION_TYPE InterruptType,
> + IN EFI_SYSTEM_CONTEXT SystemContext
> + )
> +{
> + EFI_TPL OriginalTPL;
> +
> + OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
> +
> + //
> + // Clear interrupt.
> + //
> + LoongarchWriteqTintclr (0x1);
> +
> + if (mTimerNotifyFunction != NULL) {
> + //
> + // @bug : This does not handle missed timer interrupts
> + //
> + mTimerNotifyFunction (mTimerPeriod);
> + }
> +
> + gBS->RestoreTPL (OriginalTPL);
> +}
> +
> +/**
> + This function registers the handler NotifyFunction so it is called every 
> time
> + the timer interrupt fires. It also passes the amount of time since the last
> + handler call to the NotifyFunction. If NotifyFunction is NULL, then the
> + handler is unregistered. If the handler is registered, then EFI_SUCCESS is
> + returned. If the CPU does not support registering a timer interrupt handler,
> + then EFI_UNSUPPORTED is returned. If an attempt is made to register a 
> handler
> + when a handler is already registered, then EFI_ALREADY_STARTED is returned.
> + If an attempt is made to unregister a handler when a handler is not 
> registered,
> + then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
> + register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
> + is returned.
> +
> + @param This The EFI_TIMER_ARCH_PROTOCOL instance.
> + @param NotifyFunction The function to call when a timer interrupt fires. 
> This
> + function executes at TPL_HIGH_LEVEL. The DXE Core will
> + register a handler for the timer interrupt, so it can know
> + how much time has passed. This information is used to
> + signal timer based events. NULL will unregister the handler.

Re: [edk2-devel] [edk2-platforms][PATCH V5 09/15] Platform/Loongson: Add PciCpuIoDxe driver.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> Add PCI CpuIo protocol.there is no fix translation
>
> offset between I/O port accesses and MMIO accesses.
> Add PciCpuIo2Dxe driver to implement EFI_CPU_IO2_PROTOCOL
> to add the translation for IO access.
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c | 538 ++
> .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h | 207 +++
> .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf | 44 ++
> 3 files changed, 789 insertions(+)
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf
>
>
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c 
> b/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
> new file mode 100644
> index 00..25417ff101
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
> @@ -0,0 +1,538 @@
> +/** @file
> + Produces the CPU I/O 2 Protocol.
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "PciCpuIo2Dxe.h"
> +
> +//
> +// Handle for the CPU I/O 2 Protocol
> +//
> +STATIC EFI_HANDLE mHandle = NULL;
> +
> +//
> +// Lookup table for increment values based on transfer widths
> +//
> +STATIC CONST UINT8 mInStride[] = {
> + 1, // EfiCpuIoWidthUint8
> + 2, // EfiCpuIoWidthUint16
> + 4, // EfiCpuIoWidthUint32
> + 8, // EfiCpuIoWidthUint64
> + 0, // EfiCpuIoWidthFifoUint8
> + 0, // EfiCpuIoWidthFifoUint16
> + 0, // EfiCpuIoWidthFifoUint32
> + 0, // EfiCpuIoWidthFifoUint64
> + 1, // EfiCpuIoWidthFillUint8
> + 2, // EfiCpuIoWidthFillUint16
> + 4, // EfiCpuIoWidthFillUint32
> + 8 // EfiCpuIoWidthFillUint64
> +};
> +
> +//
> +// Lookup table for increment values based on transfer widths
> +//
> +STATIC CONST UINT8 mOutStride[] = {
> + 1, // EfiCpuIoWidthUint8
> + 2, // EfiCpuIoWidthUint16
> + 4, // EfiCpuIoWidthUint32
> + 8, // EfiCpuIoWidthUint64
> + 1, // EfiCpuIoWidthFifoUint8
> + 2, // EfiCpuIoWidthFifoUint16
> + 4, // EfiCpuIoWidthFifoUint32
> + 8, // EfiCpuIoWidthFifoUint64
> + 0, // EfiCpuIoWidthFillUint8
> + 0, // EfiCpuIoWidthFillUint16
> + 0, // EfiCpuIoWidthFillUint32
> + 0 // EfiCpuIoWidthFillUint64
> +};
> +
> +/**
> + Check parameters to a CPU I/O 2 Protocol service request.
> +
> + The I/O operations are carried out exactly as requested. The caller is 
> responsible
> + for satisfying any alignment and I/O width restrictions that a PI System on 
> a
> + platform might require. For example on some platforms, width requests of
> + EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
> + be handled by the driver.
> +
> + @param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O Port 
> operation.
> + @param[in] Width Signifies the width of the I/O or Memory operation.
> + @param[in] Address The base address of the I/O operation.
> + @param[in] Count The number of I/O operations to perform. The number of
> + bytes moved is Width size * Count, starting at Address.
> + @param[in] Buffer For read operations, the destination buffer to store the 
> results.
> + For write operations, the source buffer from which to write data.
> +
> + @retval EFI_SUCCESS The parameters for this request pass the checks.
> + @retval EFI_INVALID_PARAMETER Width is invalid for this PI system.
> + @retval EFI_INVALID_PARAMETER Buffer is NULL.
> + @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
> + @retval EFI_UNSUPPORTED The address range specified by Address, Width,
> + and Count is not valid for this PI system.
> +**/
> +EFI_STATUS
> +CpuIoCheckParameter (
> + IN BOOLEAN MmioOperation,
> + IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
> + IN UINT64 Address,
> + IN UINTN Count,
> + IN VOID *Buffer
> + )
> +{
> + UINT64 MaxCount;
> + UINT64 Limit;
> +
> + //
> + // Check to see if Buffer is NULL
> + //
> + if (Buffer == NULL) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // Check to see if Width is in the valid range
> + //
> + if ((UINT32)Width >= EfiCpuIoWidthMaximum) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // For FIFO type, the target address won't increase during the access,
> + // so treat Count as 1
> + //
> + if ((Width >= EfiCpuIoWidthFifoUint8)
> + && (Width <= EfiCpuIoWidthFifoUint64))
> + {
> + Count = 1;
> + }
> +
> + //
> + // Check to see if Width is in the valid range for I/O Port operations
> + //
> + Width

Re: [edk2-devel] [edk2-platforms][PATCH V5 08/15] Platform/Loongson: Add CPU DXE driver.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> The driver produces EFI_CPU_ARCH_PROTOCOL,
>
> Initialize the exception entry address.
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c | 367 ++
> .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h | 199 ++
> .../Drivers/CpuDxe/CpuDxe.inf | 59 +++
> .../Drivers/CpuDxe/LoongArch64/Exception.c | 335 
> .../Drivers/CpuDxe/LoongArch64/Fpu.S | 97 +
> .../Drivers/CpuDxe/LoongArch64/LoongArch.S | 321 +++
> 6 files changed, 1378 insertions(+)
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.inf
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Exception.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Fpu.S
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/LoongArch.S
>
>
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c 
> b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
> new file mode 100644
> index 00..23f824d82b
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
> @@ -0,0 +1,367 @@
> +/** @file
> + CPU DXE Module to produce CPU ARCH Protocol
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "CpuDxe.h"
> +
> +BOOLEAN mInterruptState = FALSE;
> +
> +/*
> + This function flushes the range of addresses from Start to Start+Length
> + from the processor's data cache. If Start is not aligned to a cache line
> + boundary, then the bytes before Start to the preceding cache line boundary
> + are also flushed. If Start+Length is not aligned to a cache line boundary,
> + then the bytes past Start+Length to the end of the next cache line boundary
> + are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must 
> be
> + supported. If the data cache is fully coherent with all DMA operations, then
> + this function can just return EFI_SUCCESS. If the processor does not support
> + flushing a range of the data cache, then the entire data cache can be 
> flushed.
> +
> + @param This The EFI_CPU_ARCH_PROTOCOL instance.
> + @param Start The beginning physical address to flush from the processor's 
> data
> + cache.
> + @param Length The number of bytes to flush from the processor's data cache. 
> This
> + function may flush more bytes than Length specifies depending upon
> + the granularity of the flush operation that the processor supports.
> + @param FlushType Specifies the type of flush operation to perform.
> +
> + @retval EFI_SUCCESS The address range from Start to Start+Length was 
> flushed from
> + the processor's data cache.
> + @retval EFI_UNSUPPORTEDT The processor does not support the cache flush 
> type specified
> + by FlushType.
> + @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could 
> not be flushed
> + from the processor's data cache.
> +**/
> +EFI_STATUS
> +EFIAPI
> +CpuFlushCpuDataCache (
> + IN EFI_CPU_ARCH_PROTOCOL *This,
> + IN EFI_PHYSICAL_ADDRESS Start,
> + IN UINT64 Length,
> + IN EFI_CPU_FLUSH_TYPE FlushType
> + )
> +{
> + switch (FlushType) {
> + case EfiCpuFlushTypeWriteBack:
> + WriteBackDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
> + break;
> + case EfiCpuFlushTypeInvalidate:
> + InvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
> + break;
> + case EfiCpuFlushTypeWriteBackInvalidate:
> + WriteBackInvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
> + break;
> + default:
> + return EFI_INVALID_PARAMETER;
> + }
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + This function enables interrupt processing by the processor.
> +
> + @param This The EFI_CPU_ARCH_PROTOCOL instance.
> +
> + @retval EFI_SUCCESS Interrupts are enabled on the processor.
> + @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
> +**/
> +EFI_STATUS
> +EFIAPI
> +CpuEnableInterrupt (
> + IN EFI_CPU_ARCH_PROTOCOL *This
> + )
> +{
> + EnableInterrupts ();
> +
> + mInterruptState = TRUE;
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + This function disables interrupt processing by the processor.
> +
> + @param This The EFI_CPU_ARCH_PROTOCOL instance.
> +
> + @retval EFI_SUCCESS Interrupts are disabled on the processor.
> + @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
> +**/
> +EFI_STATUS

Re: [edk2-devel] [edk2-platforms][PATCH V5 08/15] Platform/Loongson: Add CPU DXE driver.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> The driver produces EFI_CPU_ARCH_PROTOCOL,
>
> Initialize the exception entry address.
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c | 367 ++
> .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h | 199 ++
> .../Drivers/CpuDxe/CpuDxe.inf | 59 +++
> .../Drivers/CpuDxe/LoongArch64/Exception.c | 335 
> .../Drivers/CpuDxe/LoongArch64/Fpu.S | 97 +
> .../Drivers/CpuDxe/LoongArch64/LoongArch.S | 321 +++
> 6 files changed, 1378 insertions(+)
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.inf
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Exception.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Fpu.S
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/LoongArch.S
>
>
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c 
> b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
> new file mode 100644
> index 00..23f824d82b
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
> @@ -0,0 +1,367 @@
> +/** @file
> + CPU DXE Module to produce CPU ARCH Protocol
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "CpuDxe.h"
> +
> +BOOLEAN mInterruptState = FALSE;
> +
> +/*
> + This function flushes the range of addresses from Start to Start+Length
> + from the processor's data cache. If Start is not aligned to a cache line
> + boundary, then the bytes before Start to the preceding cache line boundary
> + are also flushed. If Start+Length is not aligned to a cache line boundary,
> + then the bytes past Start+Length to the end of the next cache line boundary
> + are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must 
> be
> + supported. If the data cache is fully coherent with all DMA operations, then
> + this function can just return EFI_SUCCESS. If the processor does not support
> + flushing a range of the data cache, then the entire data cache can be 
> flushed.
> +
> + @param This The EFI_CPU_ARCH_PROTOCOL instance.
> + @param Start The beginning physical address to flush from the processor's 
> data
> + cache.
> + @param Length The number of bytes to flush from the processor's data cache. 
> This
> + function may flush more bytes than Length specifies depending upon
> + the granularity of the flush operation that the processor supports.
> + @param FlushType Specifies the type of flush operation to perform.
> +
> + @retval EFI_SUCCESS The address range from Start to Start+Length was 
> flushed from
> + the processor's data cache.
> + @retval EFI_UNSUPPORTEDT The processor does not support the cache flush 
> type specified
> + by FlushType.
> + @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could 
> not be flushed
> + from the processor's data cache.
> +**/
> +EFI_STATUS
> +EFIAPI
> +CpuFlushCpuDataCache (
> + IN EFI_CPU_ARCH_PROTOCOL *This,
> + IN EFI_PHYSICAL_ADDRESS Start,
> + IN UINT64 Length,
> + IN EFI_CPU_FLUSH_TYPE FlushType
> + )
> +{
> + switch (FlushType) {
> + case EfiCpuFlushTypeWriteBack:
> + WriteBackDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
> + break;
> + case EfiCpuFlushTypeInvalidate:
> + InvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
> + break;
> + case EfiCpuFlushTypeWriteBackInvalidate:
> + WriteBackInvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
> + break;
> + default:
> + return EFI_INVALID_PARAMETER;
> + }
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + This function enables interrupt processing by the processor.
> +
> + @param This The EFI_CPU_ARCH_PROTOCOL instance.
> +
> + @retval EFI_SUCCESS Interrupts are enabled on the processor.
> + @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
> +**/
> +EFI_STATUS
> +EFIAPI
> +CpuEnableInterrupt (
> + IN EFI_CPU_ARCH_PROTOCOL *This
> + )
> +{
> + EnableInterrupts ();
> +
> + mInterruptState = TRUE;
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + This function disables interrupt processing by the processor.
> +
> + @param This The EFI_CPU_ARCH_PROTOCOL instance.
> +
> + @retval EFI_SUCCESS Interrupts are disabled on the processor.
> + @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
> +**/
> +EFI_STATUS

Re: [edk2-devel] [edk2-platforms][PATCH V5 07/15] Platform/Loongson: Support PEI phase.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, "xianglai"  wrote:
> Platform PEI module for LoongArch platform initialization.
>
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../Loongson/LoongArchQemuPkg/Loongson.dec | 23 ++
> .../Loongson/LoongArchQemuPkg/Loongson.dsc | 64 +
> .../Loongson/LoongArchQemuPkg/Loongson.fdf | 51 
> .../LoongArchQemuPkg/PlatformPei/Fv.c | 58 
> .../LoongArchQemuPkg/PlatformPei/MemDetect.c | 104 +++
> .../LoongArchQemuPkg/PlatformPei/Platform.c | 261 ++
> .../LoongArchQemuPkg/PlatformPei/Platform.h | 86 ++
> .../PlatformPei/PlatformPei.inf | 72 +
> 8 files changed, 719 insertions(+)
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Fv.c
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf
>
>
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
> b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
> index 61f600b20d..aeae75a678 100644
> --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
> +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
> @@ -32,7 +32,30 @@
> [PcdsFixedAtBuild, PcdsDynamic]
> gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x
> gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0001
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|0x0|UINT64|0x0003
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize|0x0|UINT32|0x0004
> + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase|0x0|UINT64|0x0009
> + gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding|256|UINT32|0x000a
> +
> gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT64|0x000b
> gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x000c
> + gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop|0x0|UINT64|0x000d
> + gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom|0x0|UINT64|0x000e
> gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x000f
> gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x0010
> +
> +## In the PcdsFixedAtBuild.LOONGARCH64 area, numbers start at 0x1.
> +[PcdsFixedAtBuild.LOONGARCH64]
> + gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32|UINT8|0x0001
> + gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x00010001
> +
> +## In the PcdsDynamic area, numbers start at 0x2.
> +[PcdsDynamic]
> + gLoongArchQemuPkgTokenSpaceGuid.PcdRamSize|0x4000|UINT64|0x0002
> + 
> gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x00020001
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x00020002
> + gLoongArchQemuPkgTokenSpaceGuid.PcdSwapPageDir|0x0|UINT64|0x00020003
> + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPgd|0x0|UINT64|0x00020004
> + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud|0x0|UINT64|0x00020005
> + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd|0x0|UINT64|0x00020006
> + gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte|0x0|UINT64|0x00020007
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
> b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
> index b506f70625..b78a7e3b49 100644
> --- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
> +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
> @@ -56,16 +56,53 @@
>
>
> [LibraryClasses.common]
> PcdLib | MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
> + TimerLib | 
> Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf
> PrintLib | MdePkg/Library/BasePrintLib/BasePrintLib.inf
> BaseMemoryLib | MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
> BaseLib | MdePkg/Library/BaseLib/BaseLib.inf
> + PerformanceLib | 
> MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
> PeCoffLib | MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
> + CacheMaintenanceLib | 
> MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
> + UefiDecompressLib | 
> MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
> PeCoffGetEntryPointLib | 
> MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
> IoLib | MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
> SerialPortLib | 
> Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.inf
> DebugPrintErrorLevelLib | 
> MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
> + FdtLib | EmbeddedPkg/Library/FdtLib/FdtLib.inf
> PeCoffExtraActionLib | 
> MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
> DebugAgentLib | MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
> + PeiServicesLib | MdeP

Re: [edk2-devel] [edk2-platforms][PATCH V5 06/15] Platform/Loongson: Add StableTimerLib.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> This library provides a delay interface and a timing interface.
>
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../Include/Library/StableTimer.h | 59 +
> .../Library/StableTimerLib/Count.S | 52 
> .../Library/StableTimerLib/TimerLib.c | 236 ++
> .../Library/StableTimerLib/TimerLib.inf | 32 +++
> 4 files changed, 379 insertions(+)
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf
>
>
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h 
> b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
> new file mode 100644
> index 00..93f5b66c34
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
> @@ -0,0 +1,59 @@
> +/** @file
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> + @par Glossary:
> + - Csr - Cpu Status Register
> + - Calc - Calculation
> + - Freq - frequency
> +**/
> +
> +#ifndef STABLE_TIMER_H_
> +#define STABLE_TIMER_H_
> +#include "Library/Cpu.h"
> +
> +/**
> + Gets the timer count value.
> +
> + @param[] VOID
> +
> + @retval timer count value.
> +**/
> +extern
> +UINTN
> +EFIAPI
> +LoongArchReadTime (
> + VOID
> + );
> +
> +/**
> + Calculate the timer frequency.
> +
> + @param[] VOID
> +
> + @retval Timer frequency.
> +**/
> +UINT32
> +EFIAPI
> +CalcConstFreq (
> + VOID
> + );
> +
> +/*
> + Reads data from the specified CPUCFG register.
> +
> + @param[OUT] Val Pointer to the variable used to store the CPUCFG register 
> value.
> + @param[IN] reg Specifies the register number of the CPUCFG to read the data.
> +
> + @retval none
> + */
> +extern
> +VOID
> +LoongArchReadCpuCfg (
> + UINT64 *Val,
> + UINT64 reg
> + );
> +
> +#endif // STABLE_TIMER_H_
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S 
> b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
> new file mode 100644
> index 00..4e0e718381
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
> @@ -0,0 +1,52 @@
> +#--
> +#
> +# Count for LoongArch
> +#
> +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +#--
> +
> +#ifndef __ASSEMBLY__
> +#define __ASSEMBLY__
> +#endif
> +
> +#include "Library/Cpu.h"
> +
> +ASM_GLOBAL ASM_PFX(CpuSetIP)
> +ASM_GLOBAL ASM_PFX(LoongArchReadTime)
> +ASM_GLOBAL ASM_PFX(LoongArchReadCpuCfg)
> +
> +#
> +# Set cpu interrupts
> +# @param A0 The interrupt number
> +#
> +
> +ASM_PFX(CpuSetIP):
> + csrrd T0, LOONGARCH_CSR_ECFG
> + or T0, T0, A0
> + csrwr T0, LOONGARCH_CSR_ECFG
> + jirl ZERO, RA, 0
> +
> +#
> +#Gets the timer count value.
> +#@param[] VOID
> +#@retval timer count value.
> +#
> +
> +ASM_PFX(LoongArchReadTime):
> + rdtime.d A0, ZERO
> + jirl ZERO, RA, 0
> +
> +#
> +# Read Csr CPUCFG register.
> +# @param A0 Pointer to the variable used to store the CPUCFG register value.
> +# @param A1 Specifies the register number of the CPUCFG to read the data.
> +# @retval none
> +#
> +
> +ASM_PFX(LoongArchReadCpuCfg):
> + cpucfg T0, A1
> + stptr.d T0, A0, 0
> + jirl ZERO, RA, 0
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c 
> b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
> new file mode 100644
> index 00..135fb22611
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
> @@ -0,0 +1,236 @@
> +/** @file
> + Generic LoongArch implementation of TimerLib.h
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> + @par Glossary:
> + - Freq - Frequency
> + - Csr - Cpu Status Register
> + - calc - calculate
> +**/
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "Library/StableTimer.h"
> +#include "Library/Cpu.h"
> +
> +UINT32 StableTimerFreq = 0;
> +
> +/**
> + Calculate the timer frequency.
> +
> + @param[] VOID
> +
> + @retval Timer frequency.
> +**/
> +UINT32
> +EFIAPI
> +CalcConstFreq (
> + VOID
> + )
> +{
> + UINT32 Result;
> + UINT32 BaseFreq;
> + UINT32 ClockMultiplier;
> + UINT32 ClockDivide;
> + 

Re: [edk2-devel] [edk2-platforms][PATCH V5 05/15] Platform/Loongson: Add MmuLib.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> Read the memory map information through the QemuFwCfg interface,
>
> then build the page table through the memory map information,
> and finally enable Mmu.
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../LoongArchQemuPkg/Include/Library/MmuLib.h | 85 ++
> .../LoongArchQemuPkg/Library/MmuLib/Mmu.S | 155 
> .../Library/MmuLib/MmuBaseLib.inf | 40 +
> .../Library/MmuLib/MmuBaseLibPei.inf | 47 +
> .../Library/MmuLib/MmuLibCore.c | 831 ++
> .../Library/MmuLib/MmuLibCore.h | 40 +
> .../Library/MmuLib/MmuLibCorePei.c | 231 +
> .../LoongArchQemuPkg/Library/MmuLib/mmu.h | 190 
> .../LoongArchQemuPkg/Library/MmuLib/page.h | 280 ++
> .../LoongArchQemuPkg/Library/MmuLib/pte.h | 57 ++
> 10 files changed, 1956 insertions(+)
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseLib.inf
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseLibPei.inf
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCorePei.c
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/mmu.h
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/page.h
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/pte.h
>
>
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h 
> b/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
> new file mode 100644
> index 00..9880fc385c
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
> @@ -0,0 +1,85 @@
> +/** @file
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> + @par Glossary:
> + - EXC - execute
> +**/
> +#ifndef MMU_LIB_H_
> +#define MMU_LIB_H_
> +/**
> + write operation is performed Count times from the first element of Buffer.
> + Convert EFI Attributes to Loongarch Attributes.
> + @param[in] EfiAttributes Efi Attributes.
> +
> + @retval LoongArch Attributes.
> +**/
> +UINTN
> +EfiAttributeToLoongArchAttribute (
> + IN UINTN EfiAttributes
> + );
> +
> +/**
> + Finds the length and memory properties of the memory region corresponding 
> to the specified base address.
> +
> + @param[in] BaseAddress To find the base address of the memory region.
> + @param[in] EndAddress To find the end address of the memory region.
> + @param[out] RegionLength The length of the memory region found.
> + @param[out] RegionAttributes Properties of the memory region found.
> +
> + @retval EFI_SUCCESS The corresponding memory area was successfully found
> + EFI_NOT_FOUND No memory area found
> +**/
> +EFI_STATUS
> +GetLoongArchMemoryRegion (
> + IN UINTN BaseAddress,
> + IN UINTN EndAddress,
> + OUT UINTN *RegionLength,
> + OUT UINTN *RegionAttributes
> + );
> +
> +/**
> + Sets the Attributes of the specified memory region
> +
> + @param[in] BaseAddress The base address of the memory region to set the 
> Attributes.
> + @param[in] Length The length of the memory region to set the Attributes.
> + @param[in] Attributes The Attributes to be set.
> +
> + @retval EFI_SUCCESS The Attributes was set successfully
> +**/
> +EFI_STATUS
> +LoongArchSetMemoryAttributes (
> + IN EFI_PHYSICAL_ADDRESS BaseAddress,
> + IN UINTN Length,
> + IN UINTN Attributes
> + );
> +
> +/**
> + Sets the non-executable Attributes for the specified memory region
> +
> + @param[in] BaseAddress The base address of the memory region to set the 
> Attributes.
> + @param[in] Length The length of the memory region to set the Attributes.
> +
> + @retval EFI_SUCCESS The Attributes was set successfully
> +**/
> +EFI_STATUS
> +LoongArchSetMemoryRegionNoExec (
> + IN EFI_PHYSICAL_ADDRESS BaseAddress,
> + IN UINTN Length
> + );
> +
> +/**
> + Create a page table and initialize the MMU.
> +
> + @param[] VOID
> +
> + @retval VOID
> +**/
> +VOID
> +EFIAPI
> +ConfigureMmu (
> + VOID
> + );
> +#endif // MMU_LIB_H_
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S 
> b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
> new file mode 100644
> index 00..d5863de072
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
> @@ -0,0 +1,155 @@
> +#--
> +#
> +# LoongArch for LoongArch
> +#
> +# Copyright (c) 2022 Loongson Technology Corporation Li

Re: [edk2-devel] [edk2-platforms][PATCH V5 04/15] Platform/Loongson: Add QemuFwCfgLib.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> QemuFwCfgLib for PEI phase.
>
> This library obtains the QemuFWCfg base address by
> directly parsing the fdt, and reads and writes the data
> in the QemuFWCfg by operating on the QemuFWCfg base address.
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../Include/Library/QemuFwCfgLib.h | 174 +++
> .../QemuFwCfgLib/QemuFwCfgLibInternal.h | 63 +++
> .../Library/QemuFwCfgLib/QemuFwCfgPei.c | 117 +
> .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.c | 463 ++
> .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf | 46 ++
> 5 files changed, 863 insertions(+)
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgLibInternal.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPei.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf
>
>
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h 
> b/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
> new file mode 100644
> index 00..11da4d0b8a
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
> @@ -0,0 +1,174 @@
> +/** @file
> + QEMU/KVM Firmware Configuration access
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> + @par Glossary:
> + - FW or Fw - Firmware
> + - Cfg - Configure
> +**/
> +
> +#ifndef QEMU_FW_CFG_LIB_
> +#define QEMU_FW_CFG_LIB_
> +
> +#include 
> +
> +typedef enum {
> + EfiAcpiAddressRangeMemory = 1,
> + EfiAcpiAddressRangeReserved = 2,
> + EfiAcpiAddressRangeACPI = 3,
> + EfiAcpiAddressRangeNVS = 4
> +} EFI_ACPI_MEMORY_TYPE;
> +
> +typedef struct {
> + UINT64 BaseAddr;
> + UINT64 Length;
> + UINT32 Type;
> + UINT32 Reserved;
> +} LOONGARCH_MEMMAP_ENTRY;
> +
> +/**
> + Returns a boolean indicating if the firmware configuration interface
> + is available or not.
> +
> + This function may change fw_cfg state.
> +
> + @retval TRUE The interface is available
> + @retval FALSE The interface is not available
> +**/
> +BOOLEAN
> +EFIAPI
> +QemuFwCfgIsAvailable (
> + VOID
> + );
> +
> +/**
> + Selects a firmware configuration item for reading.
> +
> + Following this call, any data read from this item will start from
> + the beginning of the configuration item's data.
> +
> + @param[in] QemuFwCfgItem - Firmware Configuration item to read
> +**/
> +VOID
> +EFIAPI
> +QemuFwCfgSelectItem (
> + IN FIRMWARE_CONFIG_ITEM QemuFwCfgItem
> + );
> +
> +/**
> + Reads firmware configuration bytes into a buffer
> +
> + If called multiple times, then the data read will
> + continue at the offset of the firmware configuration
> + item where the previous read ended.
> +
> + @param[in] Size - Size in bytes to read
> + @param[in] Buffer - Buffer to store data into
> +**/
> +VOID
> +EFIAPI
> +QemuFwCfgReadBytes (
> + IN UINTN Size,
> + IN VOID *Buffer OPTIONAL
> + );
> +
> +/**
> + Writes firmware configuration bytes from a buffer
> +
> + If called multiple times, then the data written will
> + continue at the offset of the firmware configuration
> + item where the previous write ended.
> +
> + @param[in] Size - Size in bytes to write
> + @param[in] Buffer - Buffer to read data from
> +**/
> +VOID
> +EFIAPI
> +QemuFwCfgWriteBytes (
> + IN UINTN Size,
> + IN VOID *Buffer
> + );
> +
> +/**
> + Skip bytes in the firmware configuration item.
> +
> + Increase the offset of the firmware configuration item without transferring
> + bytes between the item and a caller-provided buffer. Subsequent read, write
> + or skip operations will commence at the increased offset.
> +
> + @param[in] Size Number of bytes to skip.
> +**/
> +VOID
> +EFIAPI
> +QemuFwCfgSkipBytes (
> + IN UINTN Size
> + );
> +
> +/**
> + Reads a UINT8 firmware configuration value
> +
> + @retval Value of Firmware Configuration item read
> +**/
> +UINT8
> +EFIAPI
> +QemuFwCfgRead8 (
> + VOID
> + );
> +
> +/**
> + Reads a UINT16 firmware configuration value
> +
> + @retval Value of Firmware Configuration item read
> +**/
> +UINT16
> +EFIAPI
> +QemuFwCfgRead16 (
> + VOID
> + );
> +
> +/**
> + Reads a UINT32 firmware configuration value
> +
> + @retval Value of Firmware Configuration item read
> +**/
> +UINT32
> +EFIAPI
> +QemuFwCfgRead32 (
> + VOID
> + );
> +
> +/**
> + Reads a UINT64 firmware configuration value
> +
> + @retval Value of Firmware Configuration item read
> +**/
> +UINT64
> +EFIAPI
> +QemuFwCfgRead64 (
> + VOID
> + );
> +
> +/**
> + Find the configuration item corr

Re: [edk2-devel] [edk2-platforms][PATCH V5 03/15] Platform/Loongson: Add PeiServicesTablePointerLib.

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> Use a register to save PeiServicesTable pointer,
>
> This lib Provides PeiServicesTable pointer saving
> and retrieval services.
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../PeiServicesTablePointer.c | 79 +++
> .../PeiServicesTablePointer.h | 39 +
> .../PeiServicesTablePointerLib.S | 40 ++
> .../PeiServicesTablePointerLib.inf | 32 
> 4 files changed, 190 insertions(+)
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf
>
>
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
>  
> b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
> new file mode 100644
> index 00..204def3bde
> --- /dev/null
> +++ 
> b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
> @@ -0,0 +1,79 @@
> +/** @file
> + PEI Services Table Pointer Library.
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include 
> +#include 
> +#include 
> +#include "Library/Cpu.h"
> +#include "PeiServicesTablePointer.h"
> +
> +/**
> + Caches a pointer PEI Services Table.
> +
> + Caches the pointer to the PEI Services Table specified by 
> PeiServicesTablePointer
> + in a platform specific manner.
> +
> + If PeiServicesTablePointer is NULL, then ASSERT ().
> +
> + @param PeiServicesTablePointer The address of PeiServices pointer.
> +**/
> +VOID
> +EFIAPI
> +SetPeiServicesTablePointer (
> + IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
> + )
> +{
> + LoongarchWriteqKs0 ((UINTN)PeiServicesTablePointer);
> +}
> +
> +/**
> + Retrieves the cached value of the PEI Services Table pointer.
> +
> + Returns the cached value of the PEI Services Table pointer in a CPU 
> specific manner
> + as specified in the CPU binding section of the Platform Initialization 
> Pre-EFI
> + Initialization Core Interface Specification.
> +
> + If the cached PEI Services Table pointer is NULL, then ASSERT ().
> +
> + @return The pointer to PeiServices.
> +**/
> +CONST EFI_PEI_SERVICES **
> +EFIAPI
> +GetPeiServicesTablePointer (
> + VOID
> + )
> +{
> + UINTN val;
> +
> + LoongarchReadqKs0 (&val);
> +
> + return (CONST EFI_PEI_SERVICES **)val;
> +}
> +
> +/**
> +Perform CPU specific actions required to migrate the PEI Services Table
> +pointer from temporary RAM to permanent RAM.
> +
> +For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
> +immediately preceding the Interrupt Descriptor Table (IDT) in memory.
> +For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
> +immediately preceding the Interrupt Descriptor Table (IDT) in memory.
> +For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
> +a dedicated CPU register. This means that there is no memory storage
> +associated with storing the PEI Services Table pointer, so no additional
> +migration actions are required for Itanium or ARM CPUs.
> +*/
> +VOID
> +EFIAPI
> +MigratePeiServicesTablePointer (
> +VOID
> +)
> +{
> + return;
> +}
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
>  
> b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
> new file mode 100644
> index 00..5bcbc810d0
> --- /dev/null
> +++ 
> b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
> @@ -0,0 +1,39 @@
> +/** @file
> + PeiServicesTablePointer
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#ifndef PEISERVICESTABLEPOINTER_H_
> +#define PEISERVICESTABLEPOINTER_H_
> +
> +/**
> + Write Csr KS0 register.
> +
> + @param A0 The value used to write to the KS0 register
> +
> + @retval none
> +**/
> +extern
> +VOID
> +LoongarchWriteqKs0 (
> + IN UINT64 Val
> + );
> +
> +/**
> + Read Csr KS0 register.
> +
> + @param Val Pointer to the variable used to store the KS0 register value
> +
> + @retval none
> +**/
> +extern
> +VOID
> +LoongarchReadqKs0 (
> + IN UINT64 *Val
> + );
> +
> +#endif // PEISERVICESTABLEPOINTER_H_
> diff --git 
> a/Platform/Loo

Re: [edk2-devel] [edk2-platforms][PATCH V5 02/15] Platform/Loongson: Support SEC

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> Add SEC Code And Readme.md for LoongArchQemu
>
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> Signed-off-by: xianglai li 
> ---
> .../Include/LoongArchQemuPlatform.h | 2 +-
> .../Loongson/LoongArchQemuPkg/Loongson.dec | 38 ++
> .../Loongson/LoongArchQemuPkg/Loongson.dsc | 122 +
> .../Loongson/LoongArchQemuPkg/Loongson.fdf | 53 ++
> .../LoongArchQemuPkg/Loongson.fdf.inc | 21 +
> .../LoongArchQemuPkg/Sec/LoongArch64/Start.S | 84 +++
> .../Loongson/LoongArchQemuPkg/Sec/SecMain.c | 494 ++
> .../Loongson/LoongArchQemuPkg/Sec/SecMain.inf | 51 ++
> 8 files changed, 864 insertions(+), 1 deletion(-)
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.dec
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.fdf.inc
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/LoongArch64/Start.S
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.c
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.inf
>
>
> diff --git 
> a/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h 
> b/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
> index e942e6a994..d003b9013d 100644
> --- a/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
> +++ b/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
> @@ -92,4 +92,4 @@
> #define UART_BASE_ADDRESS (0x1fe001e0)
> #define UART_BPS (115200)
> #define UART_WAIT_TIMOUT (100)
> -#endif
> +#endif // LOONGARCH_QEMU_PLATFORM_H_
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
> b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
> new file mode 100644
> index 00..61f600b20d
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
> @@ -0,0 +1,38 @@
> +## @file
> +#
> +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> + DEC_SPECIFICATION = 0x00010005
> + PACKAGE_NAME = LoongArchQemuPkg
> + PACKAGE_GUID = b51d765a-41da-45fc-a537-de3ee785c0f6
> + PACKAGE_VERSION = 0.1
> +
> +
> +#
> +# Include Section - list of Include Paths that are provided by this package.
> +# Comments are used for Keywords and Module Types.
> +#
> +# Supported Module Types:
> +# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER 
> DXE_SMM_DRIVER
> +# DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
> +#
> +
> +[Includes.common]
> + Include # Root include for the package
> +
> +[Guids]
> + gLoongArchQemuPkgTokenSpaceGuid = { 0x0e0383ce, 0x0151, 0x4d01, { 0x80, 
> 0x0e, 0x3f, 0xef, 0x8b, 0x27, 0x6d, 0x52 } }
> +
> +## In the PcdsFixedAtBuild and PcdsDynamic areas, numbers start at 0x0.
> +[PcdsFixedAtBuild, PcdsDynamic]
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0001
> + gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT64|0x000b
> + gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x000c
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x000f
> + gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x0010
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
> b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
> new file mode 100644
> index 00..b506f70625
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
> @@ -0,0 +1,122 @@
> +## @file
> +#
> +# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +
> +#
> +# Defines Section - statements that will be processed to create a Makefile.
> +#
> +###
> +[Defines]
> + PLATFORM_NAME = LoongArchQemu
> + PLATFORMPKG_NAME = LoongArchQemu
> + PLATFORM_GUID = 7926ea52-b0dc-4ee8-ac63-341eebd84ed4
> + PLATFORM_VERSION = 0.1
> + DSC_SPECIFICATION = 0x00010005
> + OUTPUT_DIRECTORY = Build/$(PLATFORM_NAME)
> + SUPPORTED_ARCHITECTURES = LOONGARCH64
> + BUILD_TARGETS = DEBUG|RELEASE
> + SKUID_IDENTIFIER = DEFAULT
> + FLASH_DEFINITION = Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
> + TTY_TERMINAL = FALSE
> +
> +
> +#
> +# Defines fo

Re: [edk2-devel] [edk2-platforms][PATCH V5 01/15] Platform/Loongson: Add Serial Port library

[Chao Li]

Reviewed-by: Chao Li 

Thanks,
Chao


On 11月 11 2022, at 5:12 下午, xianglai li  wrote:
> Serial Port library for LoongarchQemuPkg
>
>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054
>
>
> Cc: Bibo Mao 
> Cc: Chao Li 
> Cc: Leif Lindholm 
> Cc: Liming Gao 
> Cc: Michael D Kinney 
> Signed-off-by: xianglai li 
> ---
> .../LoongArchQemuPkg/Include/Library/Cpu.h | 237 +++
> .../Include/LoongArchQemuPlatform.h | 95 +++
> .../Library/SerialPortLib/SerialPortLib.c | 593 ++
> .../Library/SerialPortLib/SerialPortLib.inf | 39 ++
> 4 files changed, 964 insertions(+)
> create mode 100644 Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.c
> create mode 100644 
> Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.inf
>
>
> diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h 
> b/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
> new file mode 100644
> index 00..c6599c6ed7
> --- /dev/null
> +++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
> @@ -0,0 +1,237 @@
> +/** @file
> +
> + Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
> reserved.
> +
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> + @par Glossary:
> + - EXC - Exception
> + - INT - Interrupt
> + - FPU - Floating Point Unit
> + - CSR - CPU Status Register
> + - READQ - Read Quad Word
> +**/
> +#ifndef LOONGARCH_CPU_H_
> +#define LOONGARCH_CPU_H_
> +
> +/* Exception types decoded by machdep exception decoder */
> +#define EXC_INT 0 /* HW interrupt */
> +#define EXC_TLBL 1 /* TLB miss on a load */
> +#define EXC_TLBS 2 /* TLB miss on a store */
> +#define EXC_TLBI 3 /* TLB miss on a ifetch */
> +#define EXC_TLBM 4 /* TLB modified fault */
> +#define EXC_TLBRI 5 /* TLB Read-Inhibit exception */
> +#define EXC_TLBXI 6 /* TLB Execution-Inhibit exception */
> +#define EXC_TLBPE 7 /* TLB Privilege Error */
> +#define EXC_ADE 8 /* Address Error */
> +#define EXC_ALE 9 /* Unalign Access */
> +#define EXC_OOB 10 /* Out of bounds */
> +#define EXC_SYS 11 /* System call */
> +#define EXC_BP 12 /* Breakpoint */
> +#define EXC_INE 13 /* Inst. Not Exist */
> +#define EXC_IPE 14 /* Inst. Privileged Error */
> +#define EXC_FPDIS 15 /* FPU Disabled */
> +#define EXC_LSXDIS 16 /* LSX Disabled */
> +#define EXC_LASXDIS 17 /* LASX Disabled */
> +#define EXC_FPE 18 /* Floating Point Exception */
> +#define EXC_WATCH 19 /* Watch address reference */
> +#define EXC_BAD 255 /* Undecodeable */
> +
> +#define COPY_SIGCODE // copy sigcode above user stack in exec
> +#define ZERO $r0 /* wired zero */
> +#define RA $r1 /* return address */
> +#define GP $r2 /* global pointer - caller saved for PIC */
> +#define SP $r3 /* stack pointer */
> +#define V0 $r4 /* return value - caller saved */
> +#define V1 $r5
> +#define A0 $r4 /* argument registers */
> +#define A1 $r5
> +#define A2 $r6
> +#define A3 $r7
> +#define A4 $r8 /* arg reg 64 bit; caller saved in 32 bit */
> +#define A5 $r9
> +#define A6 $r10
> +#define A7 $r11
> +#define T0 $r12 /* caller saved */
> +#define T1 $r13
> +#define T2 $r14
> +#define T3 $r15
> +#define T4 $r16 /* callee saved */
> +#define T5 $r17
> +#define T6 $r18
> +#define T7 $r19
> +#define T8 $r20 /* caller saved */
> +#define TP $r21 /* TLS */
> +#define FP $r22 /* frame pointer */
> +#define S0 $r23 /* callee saved */
> +#define S1 $r24
> +#define S2 $r25
> +#define S3 $r26
> +#define S4 $r27
> +#define S5 $r28
> +#define S6 $r29
> +#define S7 $r30
> +#define S8 $r31 /* callee saved */
> +
> +#define FCSR0 $r0
> +
> +//
> +// Location of the saved registers relative to ZERO.
> +// Usage is p->p_regs[XX].
> +//
> +#define RA_NUM 1
> +#define GP_NUM 2
> +#define SP_NUM 3
> +#define A0_NUM 4
> +#define A1_NUM 5
> +#define A2_NUM 6
> +#define A3_NUM 7
> +#define A4_NUM 8
> +#define A5_NUM 9
> +#define A6_NUM 10
> +#define A7_NUM 11
> +#define T0_NUM 12
> +#define T1_NUM 13
> +#define T2_NUM 14
> +#define T3_NUM 15
> +#define T4_NUM 16
> +#define T5_NUM 17
> +#define T6_NUM 18
> +#define T7_NUM 19
> +#define T8_NUM 20
> +#define TP_NUM 21
> +#define FP_NUM 22
> +#define S0_NUM 23
> +#define S1_NUM 24
> +#define S2_NUM 25
> +#define S3_NUM 26
> +#define S4_NUM 27
> +#define S5_NUM 28
> +#define S6_NUM 29
> +#define S7_NUM 30
> +#define S8_NUM 31
> +
> +#define FP0_NUM 0
> +#define FP1_NUM 1
> +#define FP2_NUM 2
> +#define FP3_NUM 3
> +#define FP4_NUM 4
> +#define FP5_NUM 5
> +#define FP6_NUM 6
> +#define FP7_NUM 7
> +#define FP8_NUM 8
> +#define FP9_NUM 9
> +#define FP10_NUM 10
> +#define FP11_NUM 11
> +#define FP12_NUM 12
> +#define FP13_NUM 13
> +#define FP14_NUM 14
> +#define FP15_NUM 15
> +#define FP16_NUM 16
> +#define FP17_NUM 17
> +#define FP18_NUM 18
> +#define FP19_NUM 19
> +#define FP20_NUM 20
> +#define FP21_NUM 21
> +#define FP22_NUM 

[edk2-devel] [edk2-platforms][PATCH V5 14/15] Platform/Loongson: Support Dxe

[xianglai]

Support Dxe for LoogArch.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Loongson/LoongArchQemuPkg/Loongson.dec|  13 +
 .../Loongson/LoongArchQemuPkg/Loongson.dsc| 421 ++
 .../Loongson/LoongArchQemuPkg/Loongson.fdf| 245 ++
 .../LoongArchQemuPkg/Loongson.fdf.inc |  42 ++
 4 files changed, 721 insertions(+)

diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
index aeae75a678..54a50738ec 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -27,13 +27,21 @@
 
 [Guids]
   gLoongArchQemuPkgTokenSpaceGuid  = { 0x0e0383ce, 0x0151, 0x4d01, { 0x80, 
0x0e, 0x3f, 0xef, 0x8b, 0x27, 0x6d, 0x52 } }
+  gEfiLoongsonBootparamsTableGuid  = { 0x4660f721, 0x2ec5, 0x416a, { 0x89, 
0x9a, 0x43, 0x18, 0x02, 0x50, 0xa0, 0xc9 } }
+
+[Protocols]
 
 ## In the PcdsFixedAtBuild and PcdsDynamic areas, numbers start at 0x0.
 [PcdsFixedAtBuild, PcdsDynamic]
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0001
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvOffset|0x0|UINT64|0x0002
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|0x0|UINT64|0x0003
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize|0x0|UINT32|0x0004
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecModuleBase|0x0|UINT64|0x0005
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecModuleSize|0x0|UINT32|0x0006
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashEventLogBase|0x0|UINT64|0x0007
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashEventLogSize|0x0|UINT32|0x0008
   gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase|0x0|UINT64|0x0009
   gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding|256|UINT32|0x000a
 
@@ -48,6 +56,8 @@
 [PcdsFixedAtBuild.LOONGARCH64]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32|UINT8|0x0001
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x00010001
+   
gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceSpaceStartAddress|0x1000|UINT32|0x00010002
+   
gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceSpaceLength|0x8000|UINT32|0x00010003
 
 ## In the PcdsDynamic area, numbers start at 0x2.
 [PcdsDynamic]
@@ -59,3 +69,6 @@
   gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud|0x0|UINT64|0x00020005
   gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd|0x0|UINT64|0x00020006
   gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte|0x0|UINT64|0x00020007
+
+## In the PcdsFeatureFlag area, numbers start at 0x3.
+[PcdsFeatureFlag]
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
index b78a7e3b49..6f71280c4d 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -24,6 +24,25 @@
   FLASH_DEFINITION   = 
Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
   TTY_TERMINAL   = FALSE
 
+  #
+  # Defines for default states.  These can be changed on the command line.
+  # -D FLAG=VALUE
+  DEFINE TTY_TERMINAL= FALSE
+  DEFINE SECURE_BOOT_ENABLE  = FALSE
+  DEFINE TPM2_ENABLE = FALSE
+  DEFINE TPM2_CONFIG_ENABLE  = FALSE
+
+  #
+  # Network definition
+  #
+  DEFINE NETWORK_IP6_ENABLE  = FALSE
+  DEFINE NETWORK_HTTP_BOOT_ENABLE= FALSE
+  DEFINE NETWORK_SNP_ENABLE  = FALSE
+  DEFINE NETWORK_TLS_ENABLE  = FALSE
+  DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS  = TRUE
+  DEFINE NETWORK_ISCSI_ENABLE= FALSE
+
+!include NetworkPkg/NetworkDefines.dsc.inc
 
 #
 # Defines for default states.  These can be changed on the command line.
@@ -37,6 +56,8 @@
   #
   GCC:*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
 
+!include NetworkPkg/NetworkBuildOptions.dsc.inc
+
 [BuildOptions.LOONGARCH64.EDKII.SEC]
   *_*_*_CC_FLAGS =
 
@@ -46,6 +67,14 @@
 [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
   GCC:*_*_LOONGARCH64_DLINK_FLAGS = -z common-page-size=0x1
 
+
+#
+# SKU Identification section - list of all SKU IDs supported by this Platform.
+#
+
+[SkuIds]
+  0|DEFAULT
+
 

 #
 # Library Class section - list of all Library Classes needed by this Platform.
@@ -59,19 +88,93 @@
   TimerLib | 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf
   PrintLib | 
MdePkg/Library/BasePrintLib/BasePrintLib.inf
   BaseMemoryLib| 
MdePkg/Library/Ba

[edk2-devel] [edk2-platforms][PATCH V5 15/15] Platform/Loongson: Add Readme.

[xianglai]

Add Readme for LoogArch and Modify the Readme in the root directory.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 Platform/Loongson/LoongArchQemuPkg/Readme.md | 60 
 Readme.md|  9 +++
 2 files changed, 69 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Readme.md

diff --git a/Platform/Loongson/LoongArchQemuPkg/Readme.md 
b/Platform/Loongson/LoongArchQemuPkg/Readme.md
new file mode 100644
index 00..7b11905f14
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Readme.md
@@ -0,0 +1,60 @@
+# Introduction
+
+  This document provides the guideline to build UEFI firmware for Qemu of 
LoongArch.
+
+  LoongArch is the general processor architecture of Loongson.
+
+  We can get the latest LoongArch documents or LoongArch tools at 
https://github.com/loongson/.
+
+# How to build (X86 Linux Environment)
+
+  1. Install LoongArch cross-tools on X86 machines.
+Download cross-tools from https://github.com/loongson/build-tools ,Then 
config cross-tools env.
+For Example:
+
+$ wget 
https://github.com/loongson/build-tools/releases/download/2022.09.06/loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz
+$ tar -vxf loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz  -C /opt
+$ export PATH=/opt/cross-tools/bin:$PATH
+
+Note: Please obtain the latest cross-compilation tools from 
https://github.com/loongson/build-tools .
+
+  2. Follow edk2-platforms/Readme.md to obtaining source code,And config build 
env.
+For Example:
+
+$ export WORKSPACE=/work/git/tianocore
+$ mkdir -p $WORKSPACE
+$ cd $WORKSPACE
+$ git clone https://github.com/tianocore/edk2.git
+$ git submodule update --init
+$ git clone https://github.com/tianocore/edk2-platforms.git
+$ git submodule update --init
+$ git clone https://github.com/tianocore/edk2-non-osi.git
+$ export PACKAGES_PATH=$PWD/edk2:$PWD/edk2-platforms:$PWD/edk2-non-osi
+
+  3. Config  cross compiler prefix.
+For Example:
+
+$ export GCC5_LOONGARCH64_PREFIX=loongarch64-unknown-linux-gnu-
+
+  4.Set up the build environment And  build BaseTool.
+For Example:
+
+$. edk2/edksetup.sh
+$make -C edk2/BaseTools
+
+  5.Build  platform.
+For Exmaple:
+
+$build --buildtarget=DEBUG --tagname=GCC5 --arch=LOONGARCH64  
--platform=Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+
+  After a successful build, the resulting images can be found in 
`Build/{Platform Name}/{TARGET}_{TOOL_CHAIN_TAG}/FV/QEMU_EFI.fd`.
+
+  A compile script is provided here:
+
+#!/bin/bash
+export WORKSPACE=/work/git/tianocore
+export PACKAGES_PATH=$WORKSPACE/edk2:$WORKSPACE/edk2-platforms
+export GCC5_LOONGARCH64_PREFIX=loongarch64-unknown-linux-gnu-
+. edk2/edksetup.sh
+make -C edk2/BaseTools
+build --buildtarget=DEBUG --tagname=GCC5 --arch=LOONGARCH64  
--platform=Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
diff --git a/Readme.md b/Readme.md
index 62876b4b7d..93e4dc5255 100644
--- a/Readme.md
+++ b/Readme.md
@@ -57,6 +57,7 @@ IA32| i?86-linux-gnu-* _or_ x86_64-linux-gnu-
 IPF | ia64-linux-gnu
 X64 | x86_64-linux-gnu-
 RISCV64 | riscv64-unknown-elf-
+LOONGARCH64 | loongarch64-unknown-linux-
 
 \* i386, i486, i586 or i686
 
@@ -71,6 +72,11 @@ RISC-V open source community provides GCC toolchains for
 [riscv64-unknown-elf](https://github.com/riscv/riscv-gnu-toolchain)
 compiled to run on x86 Linux.
 
+### GCC for LoongArch
+Loonson open source community provides GCC toolchains for
+[loongarch64-unknown-elf](https://github.com/loongson/build-tools)
+compiled to run on x86 Linux
+
 ### clang
 Clang does not require separate cross compilers, but it does need a
 target-specific binutils. These are included with any prepackaged GCC toolchain
@@ -257,6 +263,9 @@ For more information, see the
 # Minnowboard Max/Turbot based on Intel Valleyview2 SoC
 * [Minnowboard Max](Platform/Intel/Vlv2TbltDevicePkg)
 
+## Loongson
+* [LoongArchQemu](Platform/Loongson/LoongArchQemuPkg)
+
 ## Marvell
 * [Armada 70x0](Platform/Marvell/Armada70x0Db)
 * [Armada 80x0](Platform/Marvell/Armada80x0Db)
-- 
2.31.1




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[edk2-devel] [edk2-platforms][PATCH V5 13/15] Platform/Loongson: Add Reset System Lib.

[xianglai]

This library provides interfaces related to restart and shutdown.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../BaseResetSystemAcpiGed.c  | 146 ++
 .../BaseResetSystemAcpiGedLib.inf |  37 +++
 .../DxeResetSystemAcpiGed.c   | 257 ++
 .../DxeResetSystemAcpiGedLib.inf  |  41 +++
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.c   | 128 +
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.h   |  23 ++
 6 files changed, 632 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGedLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGed.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGedLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.h

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
new file mode 100644
index 00..0df629ffcd
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
@@ -0,0 +1,146 @@
+/** @file
+  Base ResetSystem library implementation.
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include "ResetSystemAcpiGed.h"
+#include 
+
+/**
+  Get configuration item data by the firmware configuration file name.
+
+  @param[in]  Name - Name of file to look up.
+
+  @returnVOID*   The Pointer of Value of Firmware Configuration item 
read.
+**/
+VOID *
+GetFwCfgData(
+CONST CHAR8   *Name
+)
+{
+  FIRMWARE_CONFIG_ITEM FwCfgItem;
+  EFI_STATUS   Status;
+  UINTNFwCfgSize;
+  VOID *Data;
+
+  Status = QemuFwCfgFindFile (Name, &FwCfgItem, &FwCfgSize);
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "%a %d read  %s error Status %d \n", __func__, 
__LINE__, Name, Status));
+return NULL;
+  }
+
+  Data = AllocatePool (FwCfgSize);
+  if (Data == NULL) {
+return NULL;
+  }
+
+  QemuFwCfgSelectItem (FwCfgItem);
+  QemuFwCfgReadBytes (FwCfgSize, Data);
+
+  return Data;
+}
+
+/**
+  Find the power manager related info from ACPI table
+
+  @retval RETURN_SUCCESS Successfully find out all the required 
information.
+  @retval RETURN_NOT_FOUND   Failed to find the required info.
+**/
+STATIC EFI_STATUS
+GetPowerManagerByParseAcpiInfo (VOID)
+{
+  EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE*Fadt = NULL;
+  EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp = NULL;
+  EFI_ACPI_DESCRIPTION_HEADER  *Xsdt = NULL;
+  EFI_ACPI_DESCRIPTION_HEADER  *Rsdt = NULL;
+  VOID *AcpiTables = NULL;
+  UINT32   *Entry32 = NULL;
+  UINTN Entry32Num;
+  UINT32   *Signature = NULL;
+  UINTN Idx;
+
+  Rsdp = GetFwCfgData ("etc/acpi/rsdp");
+  if (Rsdp == NULL) {
+DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/rsdp error \n", __func__, 
__LINE__));
+return RETURN_NOT_FOUND;
+  }
+
+  AcpiTables = GetFwCfgData ("etc/acpi/tables");
+  if (AcpiTables == NULL) {
+DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/tables error \n", __func__, 
__LINE__));
+FreePool (Rsdp);
+return RETURN_NOT_FOUND;
+  }
+
+  Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables +  
Rsdp->RsdtAddress);
+  Entry32= (UINT32 *)(Rsdt + 1);
+  Entry32Num = (Rsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
+  for (Idx = 0; Idx < Entry32Num; Idx++) {
+Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
+if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
+  Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)Signature;
+  DEBUG ((DEBUG_INFO, "Found Fadt in Rsdt\n"));
+  goto Done;
+}
+  }
+
+  Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables +  
Rsdp->XsdtAddress);
+  Entry32= (UINT32 *)(Xsdt + 1);
+  Entry32Num = (Xsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
+  for (Idx = 0; Idx < Entry32Num; Idx++) {
+Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
+if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
+  Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRI

[edk2-devel] [edk2-platforms][PATCH V5 12/15] Platform/Loongson: Add Platform Boot Manager Lib.

[xianglai]

The Library provides Boot Manager interfaces.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../PlatformBootManagerLib/PlatformBm.c   | 742 ++
 .../PlatformBootManagerLib/PlatformBm.h   | 112 +++
 .../PlatformBootManagerLib.inf|  75 ++
 .../PlatformBootManagerLib/QemuKernel.c   |  81 ++
 4 files changed, 1010 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/QemuKernel.c

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
new file mode 100644
index 00..eb7f4241f0
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
@@ -0,0 +1,742 @@
+/** @file
+  Implementation for PlatformBootManagerLib library class interfaces.
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "PlatformBm.h"
+
+STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
+//
+// VENDOR_DEVICE_PATH SerialDxe
+//
+{
+{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) 
},
+SERIAL_DXE_FILE_GUID
+},
+
+//
+// UART_DEVICE_PATH Uart
+//
+{
+{ MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
+0,  // Reserved
+FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
+FixedPcdGet8 (PcdUartDefaultDataBits),  // DataBits
+FixedPcdGet8 (PcdUartDefaultParity),// Parity
+FixedPcdGet8 (PcdUartDefaultStopBits)   // StopBits
+  },
+
+  //
+  // VENDOR_DEFINED_DEVICE_PATH TermType
+  //
+  {
+{
+  MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
+  DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
+}
+//
+// Guid to be filled in dynamically
+//
+  },
+
+  //
+  // EFI_DEVICE_PATH_PROTOCOL End
+  //
+  {
+END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+  }
+};
+
+STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
+  //
+  // USB_CLASS_DEVICE_PATH Keyboard
+  //
+  {
+{
+  MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
+  DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
+},
+0x, // VendorId: any
+0x, // ProductId: any
+3,  // DeviceClass: HID
+1,  // DeviceSubClass: boot
+1   // DeviceProtocol: keyboard
+  },
+
+  //
+  // EFI_DEVICE_PATH_PROTOCOL End
+  //
+  {
+END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+  }
+};
+
+/**
+  Locate all handles that carry the specified protocol, filter them with a
+  callback function, and pass each handle that passes the filter to another
+  callback.
+
+  @param[in] ProtocolGuid  The protocol to look for.
+
+  @param[in] FilterThe filter function to pass each handle to. If this
+   parameter is NULL, then all handles are processed.
+
+  @param[in] Process   The callback function to pass each handle to that
+   clears the filter.
+**/
+VOID
+FilterAndProcess (
+  IN EFI_GUID  *ProtocolGuid,
+  IN FILTER_FUNCTION   Filter OPTIONAL,
+  IN CALLBACK_FUNCTION Process
+  )
+{
+  EFI_STATUS Status;
+  EFI_HANDLE *Handles;
+  UINTN  NoHandles;
+  UINTN  Idx;
+
+  Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
+  NULL /* SearchKey */, &NoHandles, &Handles);
+  if (EFI_ERROR (Status)) {
+//
+// This is not an error, just an informative condition.
+//
+DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
+  Status));
+return;
+  }
+
+  ASSERT (NoHandles > 0);
+  for (Idx = 0; Idx < NoHandles; ++Idx) {
+CHAR16*DevicePathText;
+STATIC CHAR16 Fallback[] = L"";
+
+//
+// The ConvertDevicePathToText () function handles NULL input 
transparently.
+//
+DevicePathText = ConvertDevicePathToText (
+   DevicePathFromHandle (Handles[Idx]),
+   FALSE, // DisplayOnly
+   FALSE  // AllowShortcuts
+   );
+if (DevicePathText == NULL) {
+  DevicePathText = Fallback;
+}
+
+if ((Filter == NULL)
+  || (Filter (Handles[Idx], DevicePathTex

[edk2-devel] [edk2-platforms][PATCH V5 11/15] Platform/Loongson: Add RealTime Clock lib.

[xianglai]

This library provides interfaces such as
real-time clock initialization
to get time and setting time.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../LsRealTimeClockLib/LsRealTimeClock.h  |  40 +++
 .../LsRealTimeClockLib/LsRealTimeClockLib.c   | 335 ++
 .../LsRealTimeClockLib/LsRealTimeClockLib.inf |  44 +++
 3 files changed, 419 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
new file mode 100644
index 00..6567ec80db
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
@@ -0,0 +1,40 @@
+/** @file
+  Implement EFI RealTimeClock runtime services via RTC Lib.
+
+  Copyright (c) 2022, Loongson Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef LS_REAL_TIME_CLOCK_H_
+#define LS_REAL_TIME_CLOCK_H_
+
+#define TOY_WRITE0_REG0x24
+#define TOY_WRITE1_REG0x28
+#define TOY_READ0_REG 0x2c
+#define TOY_READ1_REG 0x30
+#define RTC_CTRL_REG  0x40
+
+/* TOY Enable bits */
+#define RTC_ENABLE_BIT(1UL << 13)
+#define TOY_ENABLE_BIT(1UL << 11)
+#define OSC_ENABLE_BIT(1UL << 8)
+
+/*
+ * shift bits and filed mask
+ */
+#define TOY_MON_MASK  0x3f
+#define TOY_DAY_MASK  0x1f
+#define TOY_HOUR_MASK 0x1f
+#define TOY_MIN_MASK  0x3f
+#define TOY_SEC_MASK  0x3f
+#define TOY_MSEC_MASK 0xf
+
+#define TOY_MON_SHIFT 26
+#define TOY_DAY_SHIFT 21
+#define TOY_HOUR_SHIFT16
+#define TOY_MIN_SHIFT 10
+#define TOY_SEC_SHIFT 4
+
+#endif // LS_REAL_TIME_CLOCK_H_
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
new file mode 100644
index 00..dc651ccaaf
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
@@ -0,0 +1,335 @@
+/** @file
+  Implement EFI RealTimeClock runtime services via RTC Lib.
+
+  Copyright (c) 2022, Loongson Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "LsRealTimeClock.h"
+
+STATIC BOOLEANmInitialized = FALSE;
+STATIC EFI_EVENT  mRtcVirtualAddrChangeEvent;
+STATIC UINTN  mRtcBase = 0x100d0100;
+/*
+  Enable Real-time clock.
+
+  @param VOID
+
+  @retval  VOID
+ */
+VOID
+InitRtc (
+  VOID
+  )
+{
+ UINTN  Val;
+
+  if (!mInitialized) {
+/* enable rtc */
+Val  = MmioRead32 (mRtcBase + RTC_CTRL_REG);
+Val |= TOY_ENABLE_BIT | OSC_ENABLE_BIT;
+MmioWrite32 (mRtcBase + RTC_CTRL_REG, Val);
+mInitialized = TRUE;
+  }
+}
+
+/**
+  Returns the current time and date information, and the time-keeping 
capabilities
+  of the hardware platform.
+
+  @param  Time   A pointer to storage to receive a snapshot of 
the current time.
+  @param  Capabilities   An optional pointer to a buffer to receive 
the real time clock
+ device's capabilities.
+
+  @retval EFI_SUCCESSThe operation completed successfully.
+  @retval EFI_INVALID_PARAMETER  Time is NULL.
+  @retval EFI_DEVICE_ERROR   The time could not be retrieved due to 
hardware error.
+  @retval EFI_SECURITY_VIOLATION The time could not be retrieved due to an 
authentication failure.
+**/
+EFI_STATUS
+EFIAPI
+LibGetTime (
+  OUT EFI_TIME*Time,
+  OUT EFI_TIME_CAPABILITIES   *Capabilities
+  )
+{
+  UINT32  Val;
+
+  // Ensure Time is a valid pointer
+  if (Time == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  InitRtc ();
+  Val = MmioRead32 (mRtcBase + TOY_READ1_REG);
+  Time->Year = Val + 1900;
+
+  Val = MmioRead32 (mRtcBase + TOY_READ0_REG);
+  Time->Month =  (Val >> TOY_MON_SHIFT) & TOY_MON_MASK;
+  Time->Day   =  (Val >> TOY_DAY_SHIFT) & TOY_DAY_MASK;
+  Time->Hour  =  (Val >> TOY_HOUR_SHIFT) & TOY_HOUR_MASK;
+  Time->Minute = (Val >> TOY_MIN_SHIFT) & TOY_MIN_MASK;
+  Time->Second = (Val >> TOY_SEC_SHIFT) & TOY_SEC_MASK;
+  Time->Nanosecond  = 0;
+  return EFI_SUCCESS;
+}
+
+/**
+  Sets the current local time and date information.
+
+  @param  Time 

[edk2-devel] [edk2-platforms][PATCH V5 08/15] Platform/Loongson: Add CPU DXE driver.

[xianglai]

The driver produces EFI_CPU_ARCH_PROTOCOL,
Initialize the exception entry address.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c  | 367 ++
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h  | 199 ++
 .../Drivers/CpuDxe/CpuDxe.inf |  59 +++
 .../Drivers/CpuDxe/LoongArch64/Exception.c| 335 
 .../Drivers/CpuDxe/LoongArch64/Fpu.S  |  97 +
 .../Drivers/CpuDxe/LoongArch64/LoongArch.S| 321 +++
 6 files changed, 1378 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Exception.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Fpu.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/LoongArch.S

diff --git a/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
new file mode 100644
index 00..23f824d82b
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
@@ -0,0 +1,367 @@
+/** @file
+  CPU DXE Module to produce CPU ARCH Protocol
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "CpuDxe.h"
+
+BOOLEAN mInterruptState   = FALSE;
+
+/*
+  This function flushes the range of addresses from Start to Start+Length
+  from the processor's data cache. If Start is not aligned to a cache line
+  boundary, then the bytes before Start to the preceding cache line boundary
+  are also flushed. If Start+Length is not aligned to a cache line boundary,
+  then the bytes past Start+Length to the end of the next cache line boundary
+  are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
+  supported. If the data cache is fully coherent with all DMA operations, then
+  this function can just return EFI_SUCCESS. If the processor does not support
+  flushing a range of the data cache, then the entire data cache can be 
flushed.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+  @param  StartThe beginning physical address to flush from the 
processor's data
+   cache.
+  @param  Length   The number of bytes to flush from the processor's 
data cache. This
+   function may flush more bytes than Length specifies 
depending upon
+   the granularity of the flush operation that the 
processor supports.
+  @param  FlushTypeSpecifies the type of flush operation to perform.
+
+  @retval EFI_SUCCESS   The address range from Start to Start+Length 
was flushed from
+the processor's data cache.
+  @retval EFI_UNSUPPORTEDT  The processor does not support the cache flush 
type specified
+by FlushType.
+  @retval EFI_DEVICE_ERROR  The address range from Start to Start+Length 
could not be flushed
+from the processor's data cache.
+**/
+EFI_STATUS
+EFIAPI
+CpuFlushCpuDataCache (
+  IN EFI_CPU_ARCH_PROTOCOL   *This,
+  IN EFI_PHYSICAL_ADDRESSStart,
+  IN UINT64  Length,
+  IN EFI_CPU_FLUSH_TYPE  FlushType
+  )
+{
+  switch (FlushType) {
+case EfiCpuFlushTypeWriteBack:
+  WriteBackDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
+  break;
+case EfiCpuFlushTypeInvalidate:
+  InvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
+  break;
+case EfiCpuFlushTypeWriteBackInvalidate:
+  WriteBackInvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
+  break;
+default:
+  return EFI_INVALID_PARAMETER;
+  }
+  return EFI_SUCCESS;
+}
+
+/**
+  This function enables interrupt processing by the processor.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+
+  @retval EFI_SUCCESS   Interrupts are enabled on the processor.
+  @retval EFI_DEVICE_ERROR  Interrupts could not be enabled on the 
processor.
+**/
+EFI_STATUS
+EFIAPI
+CpuEnableInterrupt (
+  IN EFI_CPU_ARCH_PROTOCOL  *This
+  )
+{
+  EnableInterrupts ();
+
+  mInterruptState  = TRUE;
+  return EFI_SUCCESS;
+}
+
+/**
+  This function disables interrupt processing by the processor.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+
+  @retval EFI_SUCCESS   Interrupts are disabled on the proc

[edk2-devel] [edk2-platforms][PATCH V5 09/15] Platform/Loongson: Add PciCpuIoDxe driver.

[xianglai]

Add PCI CpuIo protocol.there is no fix translation
offset between I/O port accesses and MMIO accesses.
Add PciCpuIo2Dxe driver to implement EFI_CPU_IO2_PROTOCOL
to add the translation for IO access.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c   | 538 ++
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h   | 207 +++
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf |  44 ++
 3 files changed, 789 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
new file mode 100644
index 00..25417ff101
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
@@ -0,0 +1,538 @@
+/** @file
+  Produces the CPU I/O 2 Protocol.
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "PciCpuIo2Dxe.h"
+
+//
+// Handle for the CPU I/O 2 Protocol
+//
+STATIC EFI_HANDLE  mHandle = NULL;
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mInStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  0, // EfiCpuIoWidthFifoUint8
+  0, // EfiCpuIoWidthFifoUint16
+  0, // EfiCpuIoWidthFifoUint32
+  0, // EfiCpuIoWidthFifoUint64
+  1, // EfiCpuIoWidthFillUint8
+  2, // EfiCpuIoWidthFillUint16
+  4, // EfiCpuIoWidthFillUint32
+  8  // EfiCpuIoWidthFillUint64
+};
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mOutStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  1, // EfiCpuIoWidthFifoUint8
+  2, // EfiCpuIoWidthFifoUint16
+  4, // EfiCpuIoWidthFifoUint32
+  8, // EfiCpuIoWidthFifoUint64
+  0, // EfiCpuIoWidthFillUint8
+  0, // EfiCpuIoWidthFillUint16
+  0, // EfiCpuIoWidthFillUint32
+  0  // EfiCpuIoWidthFillUint64
+};
+
+/**
+  Check parameters to a CPU I/O 2 Protocol service request.
+
+  The I/O operations are carried out exactly as requested. The caller is 
responsible
+  for satisfying any alignment and I/O width restrictions that a PI System on a
+  platform might require. For example on some platforms, width requests of
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+  be handled by the driver.
+
+  @param[in] MmioOperation  TRUE for an MMIO operation, FALSE for I/O Port 
operation.
+  @param[in] Width  Signifies the width of the I/O or Memory operation.
+  @param[in] AddressThe base address of the I/O operation.
+  @param[in] Count  The number of I/O operations to perform. The 
number of
+bytes moved is Width size * Count, starting at 
Address.
+  @param[in] Buffer For read operations, the destination buffer to 
store the results.
+For write operations, the source buffer from which 
to write data.
+
+  @retval EFI_SUCCESSThe parameters for this request pass the 
checks.
+  @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
+  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
+  @retval EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
+  @retval EFI_UNSUPPORTEDThe address range specified by Address, Width,
+ and Count is not valid for this PI system.
+**/
+EFI_STATUS
+CpuIoCheckParameter (
+  IN BOOLEANMmioOperation,
+  IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
+  IN UINT64 Address,
+  IN UINTN  Count,
+  IN VOID   *Buffer
+  )
+{
+  UINT64  MaxCount;
+  UINT64  Limit;
+
+  //
+  // Check to see if Buffer is NULL
+  //
+  if (Buffer == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // Check to see if Width is in the valid range
+  //
+  if ((UINT32)Width >= EfiCpuIoWidthMaximum) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // For FIFO type, the target address won't increase during the access,
+  // so treat Count as 1
+  //
+  if ((Width >= EfiCpuIoWidthFifoUint8)
+&& (Width <= EfiCpuIoWidthFifoUint64))
+  {
+Count = 1;
+  }
+
+  //
+  // Check to see if Width is in the valid range for I/O Port operations
+  //
+  Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+  if ((!MmioOperation)
+&& 

[edk2-devel] [edk2-platforms][PATCH V5 10/15] Platform/Loongson: Add timer Dxe driver.

[xianglai]

This driver produces Timer Architectural Protocol,
Registers a timer interrupt and initializes the timer.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Drivers/StableTimerDxe/Timer.c| 388 ++
 .../Drivers/StableTimerDxe/Timer.h| 172 
 .../Drivers/StableTimerDxe/TimerConfig.S  |  38 ++
 .../Drivers/StableTimerDxe/TimerDxe.inf   |  44 ++
 4 files changed, 642 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/TimerConfig.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/TimerDxe.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
new file mode 100644
index 00..e09da71272
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
@@ -0,0 +1,388 @@
+/** @file
+  Timer Architectural Protocol as defined in the DXE CIS
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include "Library/Cpu.h"
+#include 
+#include 
+#include "Timer.h"
+#include 
+#include 
+
+//
+// The handle onto which the Timer Architectural Protocol will be installed
+//
+EFI_HANDLEmTimerHandle = NULL;
+EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+//
+// The Timer Architectural Protocol that this driver produces
+//
+EFI_TIMER_ARCH_PROTOCOL   mTimer = {
+  TimerDriverRegisterHandler,
+  TimerDriverSetTimerPeriod,
+  TimerDriverGetTimerPeriod,
+  TimerDriverGenerateSoftInterrupt
+};
+
+//
+// Pointer to the CPU Architectural Protocol instance
+//
+EFI_CPU_ARCH_PROTOCOL *mCpu;
+
+//
+// The notification function to call on every timer interrupt.
+// A bug in the compiler prevents us from initializing this here.
+//
+EFI_TIMER_NOTIFY mTimerNotifyFunction;
+
+//
+// The current period of the timer interrupt
+//
+volatile UINT64   mTimerPeriod = 0;
+volatile UINT64   mTimerTicks = 0;
+
+//
+// Const frequence in Hz
+//
+extern UINT32 StableTimerFreq;
+
+/**
+  Sets the counter value for timer.
+
+  @param CountThe 16-bit counter value to program into stable timer.
+
+  @retval VOID
+**/
+VOID
+SetPitCount (
+  IN UINT64  Count
+  )
+{
+  if (Count <= 4) {
+return;
+  }
+
+  Count &= LOONGARCH_CSR_TMCFG_TIMEVAL;
+  Count |= LOONGARCH_CSR_TMCFG_EN | LOONGARCH_CSR_TMCFG_PERIOD;
+  LoongarchWriteqTmcfg (Count);
+}
+
+/**
+  Timer Interrupt Handler.
+
+  @param InterruptTypeThe type of interrupt that occurred
+  @param SystemContextA pointer to the system context when the interrupt 
occurred
+
+  @retval VOID
+**/
+VOID
+EFIAPI
+TimerInterruptHandler (
+  IN EFI_EXCEPTION_TYPE   InterruptType,
+  IN EFI_SYSTEM_CONTEXT   SystemContext
+  )
+{
+  EFI_TPL OriginalTPL;
+
+  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+  //
+  // Clear interrupt.
+  //
+  LoongarchWriteqTintclr (0x1);
+
+  if (mTimerNotifyFunction != NULL) {
+//
+// @bug : This does not handle missed timer interrupts
+//
+mTimerNotifyFunction (mTimerPeriod);
+  }
+
+  gBS->RestoreTPL (OriginalTPL);
+}
+
+/**
+  This function registers the handler NotifyFunction so it is called every time
+  the timer interrupt fires.  It also passes the amount of time since the last
+  handler call to the NotifyFunction.  If NotifyFunction is NULL, then the
+  handler is unregistered.  If the handler is registered, then EFI_SUCCESS is
+  returned.  If the CPU does not support registering a timer interrupt handler,
+  then EFI_UNSUPPORTED is returned.  If an attempt is made to register a 
handler
+  when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+  If an attempt is made to unregister a handler when a handler is not 
registered,
+  then EFI_INVALID_PARAMETER is returned.  If an error occurs attempting to
+  register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+  is returned.
+
+  @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param NotifyFunction   The function to call when a timer interrupt fires.  
This
+  function executes at TPL_HIGH_LEVEL.  The DXE Core 
will
+  register a handler for the timer interrupt, so it 
can know
+  how much time has passed.  This information is used 
to
+  signal timer based events.  NULL will unregister the 
handler.
+
+  @retvalEFI_SUCCESSThe timer handler was registered.
+  @retvalEFI_UNSUPPORTEDThe platform does not sup

[edk2-devel] [edk2-platforms][PATCH V5 05/15] Platform/Loongson: Add MmuLib.

[xianglai]

Read the memory map information through the QemuFwCfg interface,
then build the page table through the memory map information,
and finally enable Mmu.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../LoongArchQemuPkg/Include/Library/MmuLib.h |  85 ++
 .../LoongArchQemuPkg/Library/MmuLib/Mmu.S | 155 
 .../Library/MmuLib/MmuBaseLib.inf |  40 +
 .../Library/MmuLib/MmuBaseLibPei.inf  |  47 +
 .../Library/MmuLib/MmuLibCore.c   | 831 ++
 .../Library/MmuLib/MmuLibCore.h   |  40 +
 .../Library/MmuLib/MmuLibCorePei.c| 231 +
 .../LoongArchQemuPkg/Library/MmuLib/mmu.h | 190 
 .../LoongArchQemuPkg/Library/MmuLib/page.h| 280 ++
 .../LoongArchQemuPkg/Library/MmuLib/pte.h |  57 ++
 10 files changed, 1956 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseLibPei.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCorePei.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/mmu.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/page.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/pte.h

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
new file mode 100644
index 00..9880fc385c
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
@@ -0,0 +1,85 @@
+/** @file
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- EXC - execute
+**/
+#ifndef MMU_LIB_H_
+#define MMU_LIB_H_
+/**
+  write operation is performed Count times from the first element of Buffer.
+  Convert EFI Attributes to Loongarch Attributes.
+  @param[in]  EfiAttributes Efi Attributes.
+
+  @retval  LoongArch Attributes.
+**/
+UINTN
+EfiAttributeToLoongArchAttribute (
+  IN UINTN  EfiAttributes
+  );
+
+/**
+  Finds the length and memory properties of the memory region corresponding to 
the specified base address.
+
+  @param[in]  BaseAddressTo find the base address of the memory region.
+  @param[in]  EndAddress To find the end address of the memory region.
+  @param[out]  RegionLengthThe length of the memory region found.
+  @param[out]  RegionAttributesProperties of the memory region found.
+
+  @retval  EFI_SUCCESSThe corresponding memory area was successfully found
+   EFI_NOT_FOUNDNo memory area found
+**/
+EFI_STATUS
+GetLoongArchMemoryRegion (
+  IN UINTN  BaseAddress,
+  IN UINTN  EndAddress,
+  OUTUINTN  *RegionLength,
+  OUTUINTN  *RegionAttributes
+  );
+
+/**
+  Sets the Attributes  of the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to set the 
Attributes.
+  @param[in]  Length   The length of the memory region to set the 
Attributes.
+  @param[in]  Attributes   The Attributes to be set.
+
+  @retval  EFI_SUCCESSThe Attributes was set successfully
+**/
+EFI_STATUS
+LoongArchSetMemoryAttributes (
+  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN UINTN Length,
+  IN UINTN Attributes
+  );
+
+/**
+  Sets the non-executable Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to set the 
Attributes.
+  @param[in]  Length   The length of the memory region to set the 
Attributes.
+
+  @retval  EFI_SUCCESSThe Attributes was set successfully
+**/
+EFI_STATUS
+LoongArchSetMemoryRegionNoExec (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINTNLength
+  );
+
+/**
+  Create a page table and initialize the MMU.
+
+  @param[] VOID
+
+  @retval  VOID
+**/
+VOID
+EFIAPI
+ConfigureMmu (
+  VOID
+  );
+#endif // MMU_LIB_H_
diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S 
b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
new file mode 100644
index 00..d5863de072
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
@@ -0,0 +1,155 @@
+#--
+#
+# LoongArch for LoongArch
+#
+# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--

[edk2-devel] [edk2-platforms][PATCH V5 07/15] Platform/Loongson: Support PEI phase.

[xianglai]

Platform PEI module for LoongArch platform initialization.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Loongson/LoongArchQemuPkg/Loongson.dec|  23 ++
 .../Loongson/LoongArchQemuPkg/Loongson.dsc|  64 +
 .../Loongson/LoongArchQemuPkg/Loongson.fdf|  51 
 .../LoongArchQemuPkg/PlatformPei/Fv.c |  58 
 .../LoongArchQemuPkg/PlatformPei/MemDetect.c  | 104 +++
 .../LoongArchQemuPkg/PlatformPei/Platform.c   | 261 ++
 .../LoongArchQemuPkg/PlatformPei/Platform.h   |  86 ++
 .../PlatformPei/PlatformPei.inf   |  72 +
 8 files changed, 719 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Fv.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
index 61f600b20d..aeae75a678 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -32,7 +32,30 @@
 [PcdsFixedAtBuild, PcdsDynamic]
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0001
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|0x0|UINT64|0x0003
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize|0x0|UINT32|0x0004
+  gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase|0x0|UINT64|0x0009
+  gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding|256|UINT32|0x000a
+
   gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT64|0x000b
   gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x000c
+  gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop|0x0|UINT64|0x000d
+  gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom|0x0|UINT64|0x000e
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x000f
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x0010
+
+## In the PcdsFixedAtBuild.LOONGARCH64 area, numbers start at 0x1.
+[PcdsFixedAtBuild.LOONGARCH64]
+   gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32|UINT8|0x0001
+   gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x00010001
+
+## In the PcdsDynamic area, numbers start at 0x2.
+[PcdsDynamic]
+  gLoongArchQemuPkgTokenSpaceGuid.PcdRamSize|0x4000|UINT64|0x0002
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x00020001
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x00020002
+  gLoongArchQemuPkgTokenSpaceGuid.PcdSwapPageDir|0x0|UINT64|0x00020003
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPgd|0x0|UINT64|0x00020004
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud|0x0|UINT64|0x00020005
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd|0x0|UINT64|0x00020006
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte|0x0|UINT64|0x00020007
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
index b506f70625..b78a7e3b49 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -56,16 +56,53 @@
 
 [LibraryClasses.common]
   PcdLib   | 
MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  TimerLib | 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf
   PrintLib | 
MdePkg/Library/BasePrintLib/BasePrintLib.inf
   BaseMemoryLib| 
MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   BaseLib  | MdePkg/Library/BaseLib/BaseLib.inf
+  PerformanceLib   | 
MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
   PeCoffLib| 
MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+  CacheMaintenanceLib  | 
MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+  UefiDecompressLib| 
MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
   PeCoffGetEntryPointLib   | 
MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
   IoLib| 
MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
   SerialPortLib| 
Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.inf
   DebugPrintErrorLevelLib  | 
MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+  FdtLib   | EmbeddedPkg/Library/FdtLib/FdtLib.inf
   PeCoffExtraActionLib | 
MdePkg/Library/BasePeCoffExtraActionLibNull/Ba

[edk2-devel] [edk2-platforms][PATCH V5 00/15] Platform: Add Loongson support.

[xianglai]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

The uploaded code generates firmware to support Linux launching on the 
LoongArch platform under qemu,
So it will run in a virtual machine.

LoongArch is the general processor architecture of Loongson.
You can get the latest LoongArch documents or LoongArch tools at 
https://github.com/loongson/.

You can also view the code through the Loongson community.
The edk2 code in Loongson community:
https://github.com/loongson/edk2/tree/LoongArch
The edk2-platform code in Loonson community:
https://github.com/loongson/edk2-platforms
The qemu code in Loongson community:
https://gitlab.com/qemu-project/qemu.git
The LoongArch Documentation in Loongson community:
https://github.com/loongson/LoongArch-Documentation/tree/main/docs
The all patches at:
https://github.com/loongson/edk2-platforms/tree/devel-LoongArch-patch

v2 changes:
 - Remove the inline assembly from StableTimerLib.
 - troubleshoot TAB strings, convert TAB characters to spaces.
 - remove smm related code, loongarch has no smm mode.

v3 changes:
 - delete ExtractHandler related code.
 - Boot UEFI with low 256M memory.
 - Modify common interrupt handling.

v4 changes:
 - Remove qemu flash related code.
 - Modify fdt base address.

v5 changes:
 - Add Udf driver support.
 - Split readme file into a separate patch.
 - Modify the code style
   - delete extra blank lines
   - use the assembly function definition macros in MdePkg
   - sort out the PCD variable Token value.

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 

xianglai li (15):
  Platform/Loongson: Add Serial Port library
  Platform/Loongson: Support SEC
  Platform/Loongson: Add PeiServicesTablePointerLib.
  Platform/Loongson: Add QemuFwCfgLib.
  Platform/Loongson: Add MmuLib.
  Platform/Loongson: Add StableTimerLib.
  Platform/Loongson: Support PEI phase.
  Platform/Loongson: Add CPU DXE driver.
  Platform/Loongson: Add PciCpuIoDxe driver.
  Platform/Loongson:  Add timer Dxe driver.
  Platform/Loongson: Add RealTime Clock lib.
  Platform/Loongson: Add Platform Boot Manager Lib.
  Platform/Loongson: Add Reset System Lib.
  Platform/Loongson: Support Dxe
  Platform/Loongson: Add Readme.

 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c  | 367 
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h  | 199 +
 .../Drivers/CpuDxe/CpuDxe.inf |  59 ++
 .../Drivers/CpuDxe/LoongArch64/Exception.c| 335 +++
 .../Drivers/CpuDxe/LoongArch64/Fpu.S  |  97 ++
 .../Drivers/CpuDxe/LoongArch64/LoongArch.S| 321 +++
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c   | 538 
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h   | 207 +
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf |  44 +
 .../Drivers/StableTimerDxe/Timer.c| 388 
 .../Drivers/StableTimerDxe/Timer.h| 172 
 .../Drivers/StableTimerDxe/TimerConfig.S  |  38 +
 .../Drivers/StableTimerDxe/TimerDxe.inf   |  44 +
 .../LoongArchQemuPkg/Include/Library/Cpu.h| 237 +
 .../LoongArchQemuPkg/Include/Library/MmuLib.h |  85 ++
 .../Include/Library/QemuFwCfgLib.h| 174 
 .../Include/Library/StableTimer.h |  59 ++
 .../Include/LoongArchQemuPlatform.h   |  95 ++
 .../LsRealTimeClockLib/LsRealTimeClock.h  |  40 +
 .../LsRealTimeClockLib/LsRealTimeClockLib.c   | 335 +++
 .../LsRealTimeClockLib/LsRealTimeClockLib.inf |  44 +
 .../LoongArchQemuPkg/Library/MmuLib/Mmu.S | 155 
 .../Library/MmuLib/MmuBaseLib.inf |  40 +
 .../Library/MmuLib/MmuBaseLibPei.inf  |  47 +
 .../Library/MmuLib/MmuLibCore.c   | 831 ++
 .../Library/MmuLib/MmuLibCore.h   |  40 +
 .../Library/MmuLib/MmuLibCorePei.c| 231 +
 .../LoongArchQemuPkg/Library/MmuLib/mmu.h | 190 
 .../LoongArchQemuPkg/Library/MmuLib/page.h| 280 ++
 .../LoongArchQemuPkg/Library/MmuLib/pte.h |  57 ++
 .../PeiServicesTablePointer.c |  79 ++
 .../PeiServicesTablePointer.h |  39 +
 .../PeiServicesTablePointerLib.S  |  40 +
 .../PeiServicesTablePointerLib.inf|  32 +
 .../PlatformBootManagerLib/PlatformBm.c   | 742 
 .../PlatformBootManagerLib/PlatformBm.h   | 112 +++
 .../PlatformBootManagerLib.inf|  75 ++
 .../PlatformBootManagerLib/QemuKernel.c   |  81 ++
 .../QemuFwCfgLib/QemuFwCfgLibInternal.h   |  63 ++
 .../Library/QemuFwCfgLib/QemuFwCfgPei.c   | 117 +++
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.c| 463 ++
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf  |  46 +
 .../BaseResetSystemAcpiGed.c  | 146 +++
 .../BaseResetSystemAcpiGedLib.inf |  37 +
 .../DxeResetSystemAcpiGed.c   | 257 ++
 .../DxeResetSystemAcpiGedLib.inf  |  41 +
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.c   | 128 +++
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.h   |  

[edk2-devel] [edk2-platforms][PATCH V5 02/15] Platform/Loongson: Support SEC

[xianglai]

Add SEC Code And Readme.md for LoongArchQemu

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li  
Signed-off-by: xianglai li 
---
 .../Include/LoongArchQemuPlatform.h   |   2 +-
 .../Loongson/LoongArchQemuPkg/Loongson.dec|  38 ++
 .../Loongson/LoongArchQemuPkg/Loongson.dsc| 122 +
 .../Loongson/LoongArchQemuPkg/Loongson.fdf|  53 ++
 .../LoongArchQemuPkg/Loongson.fdf.inc |  21 +
 .../LoongArchQemuPkg/Sec/LoongArch64/Start.S  |  84 +++
 .../Loongson/LoongArchQemuPkg/Sec/SecMain.c   | 494 ++
 .../Loongson/LoongArchQemuPkg/Sec/SecMain.inf |  51 ++
 8 files changed, 864 insertions(+), 1 deletion(-)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.dec
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.fdf.inc
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/LoongArch64/Start.S
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
index e942e6a994..d003b9013d 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
@@ -92,4 +92,4 @@
 #define UART_BASE_ADDRESS (0x1fe001e0)
 #define UART_BPS  (115200)
 #define UART_WAIT_TIMOUT  (100)
-#endif
+#endif // LOONGARCH_QEMU_PLATFORM_H_
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
new file mode 100644
index 00..61f600b20d
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -0,0 +1,38 @@
+## @file
+#
+#  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  DEC_SPECIFICATION  = 0x00010005
+  PACKAGE_NAME   = LoongArchQemuPkg
+  PACKAGE_GUID   = b51d765a-41da-45fc-a537-de3ee785c0f6
+  PACKAGE_VERSION= 0.1
+
+
+#
+# Include Section - list of Include Paths that are provided by this package.
+#   Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER
+#  DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+
+[Includes.common]
+  Include# Root include for the package
+
+[Guids]
+  gLoongArchQemuPkgTokenSpaceGuid  = { 0x0e0383ce, 0x0151, 0x4d01, { 0x80, 
0x0e, 0x3f, 0xef, 0x8b, 0x27, 0x6d, 0x52 } }
+
+## In the PcdsFixedAtBuild and PcdsDynamic areas, numbers start at 0x0.
+[PcdsFixedAtBuild, PcdsDynamic]
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0001
+  gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT64|0x000b
+  gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x000c
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x000f
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x0010
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
new file mode 100644
index 00..b506f70625
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -0,0 +1,122 @@
+## @file
+#
+#  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+###
+[Defines]
+  PLATFORM_NAME  = LoongArchQemu
+  PLATFORMPKG_NAME   = LoongArchQemu
+  PLATFORM_GUID  = 7926ea52-b0dc-4ee8-ac63-341eebd84ed4
+  PLATFORM_VERSION   = 0.1
+  DSC_SPECIFICATION  = 0x00010005
+  OUTPUT_DIRECTORY   = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES= LOONGARCH64
+  BUILD_TARGETS  = DEBUG|RELEASE
+  SKUID_IDENTIFIER   = DEFAULT
+  FLASH_DEFINITION   = 
Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
+  TTY_TERMINAL   = FALSE
+
+

[edk2-devel] [edk2-platforms][PATCH V5 03/15] Platform/Loongson: Add PeiServicesTablePointerLib.

[xianglai]

Use a register to save PeiServicesTable pointer,
This lib Provides PeiServicesTable pointer saving
and retrieval services.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../PeiServicesTablePointer.c | 79 +++
 .../PeiServicesTablePointer.h | 39 +
 .../PeiServicesTablePointerLib.S  | 40 ++
 .../PeiServicesTablePointerLib.inf| 32 
 4 files changed, 190 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
new file mode 100644
index 00..204def3bde
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
@@ -0,0 +1,79 @@
+/** @file
+  PEI Services Table Pointer Library.
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include "Library/Cpu.h"
+#include "PeiServicesTablePointer.h"
+
+/**
+  Caches a pointer PEI Services Table.
+
+  Caches the pointer to the PEI Services Table specified by 
PeiServicesTablePointer
+  in a platform specific manner.
+
+  If PeiServicesTablePointer is NULL, then ASSERT ().
+
+  @paramPeiServicesTablePointer   The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+  IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
+  )
+{
+  LoongarchWriteqKs0 ((UINTN)PeiServicesTablePointer);
+}
+
+/**
+  Retrieves the cached value of the PEI Services Table pointer.
+
+  Returns the cached value of the PEI Services Table pointer in a CPU specific 
manner
+  as specified in the CPU binding section of the Platform Initialization 
Pre-EFI
+  Initialization Core Interface Specification.
+
+  If the cached PEI Services Table pointer is NULL, then ASSERT ().
+
+  @return  The pointer to PeiServices.
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+  VOID
+  )
+{
+  UINTN  val;
+
+  LoongarchReadqKs0 (&val);
+
+  return (CONST EFI_PEI_SERVICES **)val;
+}
+
+/**
+Perform CPU specific actions required to migrate the PEI Services Table
+pointer from temporary RAM to permanent RAM.
+
+For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+a dedicated CPU register.  This means that there is no memory storage
+associated with storing the PEI Services Table pointer, so no additional
+migration actions are required for Itanium or ARM CPUs.
+*/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+VOID
+)
+{
+  return;
+}
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
new file mode 100644
index 00..5bcbc810d0
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
@@ -0,0 +1,39 @@
+/** @file
+  PeiServicesTablePointer
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef PEISERVICESTABLEPOINTER_H_
+#define PEISERVICESTABLEPOINTER_H_
+
+/**
+  Write Csr KS0 register.
+
+ @param A0 The value used to write to the KS0 register
+
+  @retval none
+**/
+extern
+VOID
+LoongarchWriteqKs0 (
+  IN UINT64  Val
+  );
+
+/**
+  Read Csr KS0 register.
+
+ @param  Val Pointer to the variable used to store the KS0 register value
+
+  @retval none
+**/
+extern
+VOID
+LoongarchReadqKs0 (
+  IN UINT64  *Val
+  );
+
+#endif // PEISERVICESTABLEPOINTER_H_
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S
new file mode 100644
index 00..7c6170c5d6
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/Pe

[edk2-devel] [edk2-platforms][PATCH V5 04/15] Platform/Loongson: Add QemuFwCfgLib.

[xianglai]

QemuFwCfgLib for PEI phase.
This library obtains the QemuFWCfg base address by
directly parsing the fdt, and reads and writes the data
in the QemuFWCfg by operating on the QemuFWCfg base address.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Include/Library/QemuFwCfgLib.h| 174 +++
 .../QemuFwCfgLib/QemuFwCfgLibInternal.h   |  63 +++
 .../Library/QemuFwCfgLib/QemuFwCfgPei.c   | 117 +
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.c| 463 ++
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf  |  46 ++
 5 files changed, 863 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgLibInternal.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPei.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
new file mode 100644
index 00..11da4d0b8a
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
@@ -0,0 +1,174 @@
+/** @file
+  QEMU/KVM Firmware Configuration access
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- FW or Fw- Firmware
+- Cfg - Configure
+**/
+
+#ifndef QEMU_FW_CFG_LIB_
+#define QEMU_FW_CFG_LIB_
+
+#include 
+
+typedef enum {
+  EfiAcpiAddressRangeMemory   = 1,
+  EfiAcpiAddressRangeReserved = 2,
+  EfiAcpiAddressRangeACPI = 3,
+  EfiAcpiAddressRangeNVS  = 4
+} EFI_ACPI_MEMORY_TYPE;
+
+typedef struct {
+  UINT64  BaseAddr;
+  UINT64  Length;
+  UINT32  Type;
+  UINT32  Reserved;
+} LOONGARCH_MEMMAP_ENTRY;
+
+/**
+  Returns a boolean indicating if the firmware configuration interface
+  is available or not.
+
+  This function may change fw_cfg state.
+
+  @retvalTRUE   The interface is available
+  @retvalFALSE  The interface is not available
+**/
+BOOLEAN
+EFIAPI
+QemuFwCfgIsAvailable (
+  VOID
+  );
+
+/**
+  Selects a firmware configuration item for reading.
+
+  Following this call, any data read from this item will start from
+  the beginning of the configuration item's data.
+
+  @param[in] QemuFwCfgItem - Firmware Configuration item to read
+**/
+VOID
+EFIAPI
+QemuFwCfgSelectItem (
+  IN FIRMWARE_CONFIG_ITEM   QemuFwCfgItem
+  );
+
+/**
+  Reads firmware configuration bytes into a buffer
+
+  If called multiple times, then the data read will
+  continue at the offset of the firmware configuration
+  item where the previous read ended.
+
+  @param[in] Size - Size in bytes to read
+  @param[in] Buffer - Buffer to store data into
+**/
+VOID
+EFIAPI
+QemuFwCfgReadBytes (
+  IN UINTN  Size,
+  IN VOID   *Buffer  OPTIONAL
+  );
+
+/**
+  Writes firmware configuration bytes from a buffer
+
+  If called multiple times, then the data written will
+  continue at the offset of the firmware configuration
+  item where the previous write ended.
+
+  @param[in] Size - Size in bytes to write
+  @param[in] Buffer - Buffer to read data from
+**/
+VOID
+EFIAPI
+QemuFwCfgWriteBytes (
+  IN UINTN  Size,
+  IN VOID   *Buffer
+  );
+
+/**
+  Skip bytes in the firmware configuration item.
+
+  Increase the offset of the firmware configuration item without transferring
+  bytes between the item and a caller-provided buffer. Subsequent read, write
+  or skip operations will commence at the increased offset.
+
+  @param[in] Size  Number of bytes to skip.
+**/
+VOID
+EFIAPI
+QemuFwCfgSkipBytes (
+  IN UINTN  Size
+  );
+
+/**
+  Reads a UINT8 firmware configuration value
+
+  @retvalValue of Firmware Configuration item read
+**/
+UINT8
+EFIAPI
+QemuFwCfgRead8 (
+  VOID
+  );
+
+/**
+  Reads a UINT16 firmware configuration value
+
+  @retvalValue of Firmware Configuration item read
+**/
+UINT16
+EFIAPI
+QemuFwCfgRead16 (
+  VOID
+  );
+
+/**
+  Reads a UINT32 firmware configuration value
+
+  @retvalValue of Firmware Configuration item read
+**/
+UINT32
+EFIAPI
+QemuFwCfgRead32 (
+  VOID
+  );
+
+/**
+  Reads a UINT64 firmware configuration value
+
+  @retvalValue of Firmware Configuration item read
+**/
+UINT64
+EFIAPI
+QemuFwCfgRead64 (
+  VOID
+  );
+
+/**
+  Find the configuration item corresponding to the firmware configuration file.
+
+  @param[in]  Name - Name of file to look up.
+  @param[out] Item - Configuration item corresponding to the file, to be passed
+ to QemuFwCfgSelectItem ().
+  @param[out]

[edk2-devel] [edk2-platforms][PATCH V5 01/15] Platform/Loongson: Add Serial Port library

[xianglai]

Serial Port library for LoongarchQemuPkg

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../LoongArchQemuPkg/Include/Library/Cpu.h| 237 +++
 .../Include/LoongArchQemuPlatform.h   |  95 +++
 .../Library/SerialPortLib/SerialPortLib.c | 593 ++
 .../Library/SerialPortLib/SerialPortLib.inf   |  39 ++
 4 files changed, 964 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
new file mode 100644
index 00..c6599c6ed7
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
@@ -0,0 +1,237 @@
+/** @file
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- EXC - Exception
+- INT - Interrupt
+- FPU - Floating Point Unit
+- CSR - CPU Status Register
+- READQ   - Read Quad Word
+**/
+#ifndef LOONGARCH_CPU_H_
+#define LOONGARCH_CPU_H_
+
+/* Exception types decoded by machdep exception decoder */
+#define EXC_INT 0   /* HW interrupt */
+#define EXC_TLBL1   /* TLB miss on a load */
+#define EXC_TLBS2   /* TLB miss on a store */
+#define EXC_TLBI3   /* TLB miss on a ifetch */
+#define EXC_TLBM4   /* TLB modified fault */
+#define EXC_TLBRI   5   /* TLB Read-Inhibit exception */
+#define EXC_TLBXI   6   /* TLB Execution-Inhibit exception 
*/
+#define EXC_TLBPE   7   /* TLB Privilege Error */
+#define EXC_ADE 8   /* Address Error */
+#define EXC_ALE 9   /* Unalign Access */
+#define EXC_OOB 10  /* Out of bounds */
+#define EXC_SYS 11  /* System call */
+#define EXC_BP  12  /* Breakpoint */
+#define EXC_INE 13  /* Inst. Not Exist */
+#define EXC_IPE 14  /* Inst. Privileged Error */
+#define EXC_FPDIS   15  /* FPU Disabled */
+#define EXC_LSXDIS  16  /* LSX Disabled */
+#define EXC_LASXDIS 17  /* LASX Disabled */
+#define EXC_FPE 18  /* Floating Point Exception */
+#define EXC_WATCH   19  /* Watch address reference */
+#define EXC_BAD 255 /* Undecodeable */
+
+#define COPY_SIGCODE// copy sigcode above user stack in exec
+#define ZERO$r0 /* wired zero */
+#define RA  $r1 /* return address */
+#define GP  $r2 /* global pointer - caller saved for 
PIC */
+#define SP  $r3 /* stack pointer */
+#define V0  $r4 /* return value - caller saved */
+#define V1  $r5
+#define A0  $r4 /* argument registers */
+#define A1  $r5
+#define A2  $r6
+#define A3  $r7
+#define A4  $r8 /* arg reg 64 bit; caller saved in 32 
bit */
+#define A5  $r9
+#define A6  $r10
+#define A7  $r11
+#define T0  $r12 /* caller saved */
+#define T1  $r13
+#define T2  $r14
+#define T3  $r15
+#define T4  $r16 /* callee saved */
+#define T5  $r17
+#define T6  $r18
+#define T7  $r19
+#define T8  $r20 /* caller saved */
+#define TP  $r21 /* TLS */
+#define FP  $r22 /* frame pointer */
+#define S0  $r23 /* callee saved */
+#define S1  $r24
+#define S2  $r25
+#define S3  $r26
+#define S4  $r27
+#define S5  $r28
+#define S6  $r29
+#define S7  $r30
+#define S8  $r31 /* callee saved */
+
+#define FCSR0   $r0
+
+//
+// Location of the saved registers relative to ZERO.
+// Usage is p->p_regs[XX].
+//
+#define RA_NUM  

[edk2-devel] [edk2-platforms][PATCH V5 06/15] Platform/Loongson: Add StableTimerLib.

[xianglai]

This library provides a delay interface and a timing interface.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Include/Library/StableTimer.h |  59 +
 .../Library/StableTimerLib/Count.S|  52 
 .../Library/StableTimerLib/TimerLib.c | 236 ++
 .../Library/StableTimerLib/TimerLib.inf   |  32 +++
 4 files changed, 379 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
new file mode 100644
index 00..93f5b66c34
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
@@ -0,0 +1,59 @@
+/** @file
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Csr- Cpu Status Register
+- Calc   - Calculation
+- Freq   - frequency
+**/
+
+#ifndef STABLE_TIMER_H_
+#define STABLE_TIMER_H_
+#include "Library/Cpu.h"
+
+/**
+  Gets the timer count value.
+
+  @param[] VOID
+
+  @retval  timer count value.
+**/
+extern
+UINTN
+EFIAPI
+LoongArchReadTime (
+  VOID
+  );
+
+/**
+  Calculate the timer frequency.
+
+  @param[] VOID
+
+  @retval  Timer frequency.
+**/
+UINT32
+EFIAPI
+CalcConstFreq (
+  VOID
+  );
+
+/*
+  Reads data from the specified CPUCFG register.
+
+  @param[OUT]  Val   Pointer to the variable used to store the CPUCFG register 
value.
+  @param[IN]  regSpecifies the register number of the CPUCFG to read the 
data.
+
+  @retval  none
+ */
+extern
+VOID
+LoongArchReadCpuCfg (
+  UINT64   *Val,
+  UINT64   reg
+  );
+
+#endif // STABLE_TIMER_H_
diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S 
b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
new file mode 100644
index 00..4e0e718381
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
@@ -0,0 +1,52 @@
+#--
+#
+# Count for LoongArch
+#
+# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+#ifndef __ASSEMBLY__
+#define __ASSEMBLY__
+#endif
+
+#include "Library/Cpu.h"
+
+ASM_GLOBAL ASM_PFX(CpuSetIP)
+ASM_GLOBAL ASM_PFX(LoongArchReadTime)
+ASM_GLOBAL ASM_PFX(LoongArchReadCpuCfg)
+
+#
+# Set cpu interrupts
+# @param A0 The interrupt number
+#
+
+ASM_PFX(CpuSetIP):
+csrrd   T0, LOONGARCH_CSR_ECFG
+or  T0, T0, A0
+csrwr   T0, LOONGARCH_CSR_ECFG
+jirlZERO, RA, 0
+
+#
+#Gets the timer count value.
+#@param[] VOID
+#@retval  timer count value.
+#
+
+ASM_PFX(LoongArchReadTime):
+rdtime.d   A0, ZERO
+jirlZERO, RA, 0
+
+#
+#   Read Csr CPUCFG register.
+#   @param   A0 Pointer to the variable used to store the CPUCFG register 
value.
+#   @param   A1 Specifies the register number of the CPUCFG to read the data.
+#   @retval  none
+#
+
+ASM_PFX(LoongArchReadCpuCfg):
+cpucfg T0, A1
+stptr.d T0, A0, 0
+jirlZERO, RA, 0
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c 
b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
new file mode 100644
index 00..135fb22611
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
@@ -0,0 +1,236 @@
+/** @file
+  Generic LoongArch implementation of TimerLib.h
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Freq - Frequency
+- Csr  - Cpu Status Register
+- calc - calculate
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include "Library/StableTimer.h"
+#include "Library/Cpu.h"
+
+UINT32 StableTimerFreq = 0;
+
+/**
+  Calculate the timer frequency.
+
+  @param[] VOID
+
+  @retval  Timer frequency.
+**/
+UINT32
+EFIAPI
+CalcConstFreq (
+  VOID
+  )
+{
+  UINT32 Result;
+  UINT32 BaseFreq;
+  UINT32 ClockMultiplier;
+  UINT32 ClockDivide;
+  UINT64 Val;
+
+  LoongArchReadCpuCfg (&Val, LOONGARCH_CPUCFG4);
+  BaseFreq = (UINT32)Val;
+  LoongArchReadCpuCfg (&Val, LOONGARCH_CPUCFG5);
+  Result = (UINT32)Val;
+  ClockMultiplier = Result & 0x;
+  ClockDivide = (Result >> 16) & 0x;
+
+  if ((!BaseFreq) || (!ClockMultiplier) || (!ClockDivide)) {
+retu

[edk2-devel] [edk2-platforms][PATCH V5 14/15] Platform/Loongson: Support Dxe

[xianglai]

Support Dxe for LoogArch.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Loongson/LoongArchQemuPkg/Loongson.dec|  13 +
 .../Loongson/LoongArchQemuPkg/Loongson.dsc| 421 ++
 .../Loongson/LoongArchQemuPkg/Loongson.fdf| 245 ++
 .../LoongArchQemuPkg/Loongson.fdf.inc |  42 ++
 4 files changed, 721 insertions(+)

diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
index aeae75a678..54a50738ec 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -27,13 +27,21 @@
 
 [Guids]
   gLoongArchQemuPkgTokenSpaceGuid  = { 0x0e0383ce, 0x0151, 0x4d01, { 0x80, 
0x0e, 0x3f, 0xef, 0x8b, 0x27, 0x6d, 0x52 } }
+  gEfiLoongsonBootparamsTableGuid  = { 0x4660f721, 0x2ec5, 0x416a, { 0x89, 
0x9a, 0x43, 0x18, 0x02, 0x50, 0xa0, 0xc9 } }
+
+[Protocols]
 
 ## In the PcdsFixedAtBuild and PcdsDynamic areas, numbers start at 0x0.
 [PcdsFixedAtBuild, PcdsDynamic]
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0001
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvOffset|0x0|UINT64|0x0002
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|0x0|UINT64|0x0003
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize|0x0|UINT32|0x0004
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecModuleBase|0x0|UINT64|0x0005
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecModuleSize|0x0|UINT32|0x0006
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashEventLogBase|0x0|UINT64|0x0007
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashEventLogSize|0x0|UINT32|0x0008
   gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase|0x0|UINT64|0x0009
   gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding|256|UINT32|0x000a
 
@@ -48,6 +56,8 @@
 [PcdsFixedAtBuild.LOONGARCH64]
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32|UINT8|0x0001
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x00010001
+   
gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceSpaceStartAddress|0x1000|UINT32|0x00010002
+   
gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceSpaceLength|0x8000|UINT32|0x00010003
 
 ## In the PcdsDynamic area, numbers start at 0x2.
 [PcdsDynamic]
@@ -59,3 +69,6 @@
   gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud|0x0|UINT64|0x00020005
   gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd|0x0|UINT64|0x00020006
   gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte|0x0|UINT64|0x00020007
+
+## In the PcdsFeatureFlag area, numbers start at 0x3.
+[PcdsFeatureFlag]
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
index b78a7e3b49..6f71280c4d 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -24,6 +24,25 @@
   FLASH_DEFINITION   = 
Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
   TTY_TERMINAL   = FALSE
 
+  #
+  # Defines for default states.  These can be changed on the command line.
+  # -D FLAG=VALUE
+  DEFINE TTY_TERMINAL= FALSE
+  DEFINE SECURE_BOOT_ENABLE  = FALSE
+  DEFINE TPM2_ENABLE = FALSE
+  DEFINE TPM2_CONFIG_ENABLE  = FALSE
+
+  #
+  # Network definition
+  #
+  DEFINE NETWORK_IP6_ENABLE  = FALSE
+  DEFINE NETWORK_HTTP_BOOT_ENABLE= FALSE
+  DEFINE NETWORK_SNP_ENABLE  = FALSE
+  DEFINE NETWORK_TLS_ENABLE  = FALSE
+  DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS  = TRUE
+  DEFINE NETWORK_ISCSI_ENABLE= FALSE
+
+!include NetworkPkg/NetworkDefines.dsc.inc
 
 #
 # Defines for default states.  These can be changed on the command line.
@@ -37,6 +56,8 @@
   #
   GCC:*_*_*_CC_FLAGS = -D DISABLE_NEW_DEPRECATED_INTERFACES
 
+!include NetworkPkg/NetworkBuildOptions.dsc.inc
+
 [BuildOptions.LOONGARCH64.EDKII.SEC]
   *_*_*_CC_FLAGS =
 
@@ -46,6 +67,14 @@
 [BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
   GCC:*_*_LOONGARCH64_DLINK_FLAGS = -z common-page-size=0x1
 
+
+#
+# SKU Identification section - list of all SKU IDs supported by this Platform.
+#
+
+[SkuIds]
+  0|DEFAULT
+
 

 #
 # Library Class section - list of all Library Classes needed by this Platform.
@@ -59,19 +88,93 @@
   TimerLib | 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf
   PrintLib | 
MdePkg/Library/BasePrintLib/BasePrintLib.inf
   BaseMemoryLib| 
MdePkg/Library/Ba

[edk2-devel] [edk2-platforms][PATCH V5 15/15] Platform/Loongson: Add Readme.

[xianglai]

Add Readme for LoogArch and Modify the Readme in the root directory.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 Platform/Loongson/LoongArchQemuPkg/Readme.md | 60 
 Readme.md|  9 +++
 2 files changed, 69 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Readme.md

diff --git a/Platform/Loongson/LoongArchQemuPkg/Readme.md 
b/Platform/Loongson/LoongArchQemuPkg/Readme.md
new file mode 100644
index 00..7b11905f14
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Readme.md
@@ -0,0 +1,60 @@
+# Introduction
+
+  This document provides the guideline to build UEFI firmware for Qemu of 
LoongArch.
+
+  LoongArch is the general processor architecture of Loongson.
+
+  We can get the latest LoongArch documents or LoongArch tools at 
https://github.com/loongson/.
+
+# How to build (X86 Linux Environment)
+
+  1. Install LoongArch cross-tools on X86 machines.
+Download cross-tools from https://github.com/loongson/build-tools ,Then 
config cross-tools env.
+For Example:
+
+$ wget 
https://github.com/loongson/build-tools/releases/download/2022.09.06/loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz
+$ tar -vxf loongarch64-clfs-6.3-cross-tools-gcc-glibc.tar.xz  -C /opt
+$ export PATH=/opt/cross-tools/bin:$PATH
+
+Note: Please obtain the latest cross-compilation tools from 
https://github.com/loongson/build-tools .
+
+  2. Follow edk2-platforms/Readme.md to obtaining source code,And config build 
env.
+For Example:
+
+$ export WORKSPACE=/work/git/tianocore
+$ mkdir -p $WORKSPACE
+$ cd $WORKSPACE
+$ git clone https://github.com/tianocore/edk2.git
+$ git submodule update --init
+$ git clone https://github.com/tianocore/edk2-platforms.git
+$ git submodule update --init
+$ git clone https://github.com/tianocore/edk2-non-osi.git
+$ export PACKAGES_PATH=$PWD/edk2:$PWD/edk2-platforms:$PWD/edk2-non-osi
+
+  3. Config  cross compiler prefix.
+For Example:
+
+$ export GCC5_LOONGARCH64_PREFIX=loongarch64-unknown-linux-gnu-
+
+  4.Set up the build environment And  build BaseTool.
+For Example:
+
+$. edk2/edksetup.sh
+$make -C edk2/BaseTools
+
+  5.Build  platform.
+For Exmaple:
+
+$build --buildtarget=DEBUG --tagname=GCC5 --arch=LOONGARCH64  
--platform=Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+
+  After a successful build, the resulting images can be found in 
`Build/{Platform Name}/{TARGET}_{TOOL_CHAIN_TAG}/FV/QEMU_EFI.fd`.
+
+  A compile script is provided here:
+
+#!/bin/bash
+export WORKSPACE=/work/git/tianocore
+export PACKAGES_PATH=$WORKSPACE/edk2:$WORKSPACE/edk2-platforms
+export GCC5_LOONGARCH64_PREFIX=loongarch64-unknown-linux-gnu-
+. edk2/edksetup.sh
+make -C edk2/BaseTools
+build --buildtarget=DEBUG --tagname=GCC5 --arch=LOONGARCH64  
--platform=Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
diff --git a/Readme.md b/Readme.md
index 62876b4b7d..93e4dc5255 100644
--- a/Readme.md
+++ b/Readme.md
@@ -57,6 +57,7 @@ IA32| i?86-linux-gnu-* _or_ x86_64-linux-gnu-
 IPF | ia64-linux-gnu
 X64 | x86_64-linux-gnu-
 RISCV64 | riscv64-unknown-elf-
+LOONGARCH64 | loongarch64-unknown-linux-
 
 \* i386, i486, i586 or i686
 
@@ -71,6 +72,11 @@ RISC-V open source community provides GCC toolchains for
 [riscv64-unknown-elf](https://github.com/riscv/riscv-gnu-toolchain)
 compiled to run on x86 Linux.
 
+### GCC for LoongArch
+Loonson open source community provides GCC toolchains for
+[loongarch64-unknown-elf](https://github.com/loongson/build-tools)
+compiled to run on x86 Linux
+
 ### clang
 Clang does not require separate cross compilers, but it does need a
 target-specific binutils. These are included with any prepackaged GCC toolchain
@@ -257,6 +263,9 @@ For more information, see the
 # Minnowboard Max/Turbot based on Intel Valleyview2 SoC
 * [Minnowboard Max](Platform/Intel/Vlv2TbltDevicePkg)
 
+## Loongson
+* [LoongArchQemu](Platform/Loongson/LoongArchQemuPkg)
+
 ## Marvell
 * [Armada 70x0](Platform/Marvell/Armada70x0Db)
 * [Armada 80x0](Platform/Marvell/Armada80x0Db)
-- 
2.31.1



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[edk2-devel] [edk2-platforms][PATCH V5 12/15] Platform/Loongson: Add Platform Boot Manager Lib.

[xianglai]

The Library provides Boot Manager interfaces.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../PlatformBootManagerLib/PlatformBm.c   | 742 ++
 .../PlatformBootManagerLib/PlatformBm.h   | 112 +++
 .../PlatformBootManagerLib.inf|  75 ++
 .../PlatformBootManagerLib/QemuKernel.c   |  81 ++
 4 files changed, 1010 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/QemuKernel.c

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
new file mode 100644
index 00..eb7f4241f0
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PlatformBootManagerLib/PlatformBm.c
@@ -0,0 +1,742 @@
+/** @file
+  Implementation for PlatformBootManagerLib library class interfaces.
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "PlatformBm.h"
+
+STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
+//
+// VENDOR_DEVICE_PATH SerialDxe
+//
+{
+{ HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) 
},
+SERIAL_DXE_FILE_GUID
+},
+
+//
+// UART_DEVICE_PATH Uart
+//
+{
+{ MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
+0,  // Reserved
+FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
+FixedPcdGet8 (PcdUartDefaultDataBits),  // DataBits
+FixedPcdGet8 (PcdUartDefaultParity),// Parity
+FixedPcdGet8 (PcdUartDefaultStopBits)   // StopBits
+  },
+
+  //
+  // VENDOR_DEFINED_DEVICE_PATH TermType
+  //
+  {
+{
+  MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
+  DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
+}
+//
+// Guid to be filled in dynamically
+//
+  },
+
+  //
+  // EFI_DEVICE_PATH_PROTOCOL End
+  //
+  {
+END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+  }
+};
+
+STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
+  //
+  // USB_CLASS_DEVICE_PATH Keyboard
+  //
+  {
+{
+  MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
+  DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
+},
+0x, // VendorId: any
+0x, // ProductId: any
+3,  // DeviceClass: HID
+1,  // DeviceSubClass: boot
+1   // DeviceProtocol: keyboard
+  },
+
+  //
+  // EFI_DEVICE_PATH_PROTOCOL End
+  //
+  {
+END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+  }
+};
+
+/**
+  Locate all handles that carry the specified protocol, filter them with a
+  callback function, and pass each handle that passes the filter to another
+  callback.
+
+  @param[in] ProtocolGuid  The protocol to look for.
+
+  @param[in] FilterThe filter function to pass each handle to. If this
+   parameter is NULL, then all handles are processed.
+
+  @param[in] Process   The callback function to pass each handle to that
+   clears the filter.
+**/
+VOID
+FilterAndProcess (
+  IN EFI_GUID  *ProtocolGuid,
+  IN FILTER_FUNCTION   Filter OPTIONAL,
+  IN CALLBACK_FUNCTION Process
+  )
+{
+  EFI_STATUS Status;
+  EFI_HANDLE *Handles;
+  UINTN  NoHandles;
+  UINTN  Idx;
+
+  Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
+  NULL /* SearchKey */, &NoHandles, &Handles);
+  if (EFI_ERROR (Status)) {
+//
+// This is not an error, just an informative condition.
+//
+DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
+  Status));
+return;
+  }
+
+  ASSERT (NoHandles > 0);
+  for (Idx = 0; Idx < NoHandles; ++Idx) {
+CHAR16*DevicePathText;
+STATIC CHAR16 Fallback[] = L"";
+
+//
+// The ConvertDevicePathToText () function handles NULL input 
transparently.
+//
+DevicePathText = ConvertDevicePathToText (
+   DevicePathFromHandle (Handles[Idx]),
+   FALSE, // DisplayOnly
+   FALSE  // AllowShortcuts
+   );
+if (DevicePathText == NULL) {
+  DevicePathText = Fallback;
+}
+
+if ((Filter == NULL)
+  || (Filter (Handles[Idx], DevicePathTex

[edk2-devel] [edk2-platforms][PATCH V5 09/15] Platform/Loongson: Add PciCpuIoDxe driver.

[xianglai]

Add PCI CpuIo protocol.there is no fix translation
offset between I/O port accesses and MMIO accesses.
Add PciCpuIo2Dxe driver to implement EFI_CPU_IO2_PROTOCOL
to add the translation for IO access.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c   | 538 ++
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h   | 207 +++
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf |  44 ++
 3 files changed, 789 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
new file mode 100644
index 00..25417ff101
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c
@@ -0,0 +1,538 @@
+/** @file
+  Produces the CPU I/O 2 Protocol.
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "PciCpuIo2Dxe.h"
+
+//
+// Handle for the CPU I/O 2 Protocol
+//
+STATIC EFI_HANDLE  mHandle = NULL;
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mInStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  0, // EfiCpuIoWidthFifoUint8
+  0, // EfiCpuIoWidthFifoUint16
+  0, // EfiCpuIoWidthFifoUint32
+  0, // EfiCpuIoWidthFifoUint64
+  1, // EfiCpuIoWidthFillUint8
+  2, // EfiCpuIoWidthFillUint16
+  4, // EfiCpuIoWidthFillUint32
+  8  // EfiCpuIoWidthFillUint64
+};
+
+//
+// Lookup table for increment values based on transfer widths
+//
+STATIC CONST UINT8 mOutStride[] = {
+  1, // EfiCpuIoWidthUint8
+  2, // EfiCpuIoWidthUint16
+  4, // EfiCpuIoWidthUint32
+  8, // EfiCpuIoWidthUint64
+  1, // EfiCpuIoWidthFifoUint8
+  2, // EfiCpuIoWidthFifoUint16
+  4, // EfiCpuIoWidthFifoUint32
+  8, // EfiCpuIoWidthFifoUint64
+  0, // EfiCpuIoWidthFillUint8
+  0, // EfiCpuIoWidthFillUint16
+  0, // EfiCpuIoWidthFillUint32
+  0  // EfiCpuIoWidthFillUint64
+};
+
+/**
+  Check parameters to a CPU I/O 2 Protocol service request.
+
+  The I/O operations are carried out exactly as requested. The caller is 
responsible
+  for satisfying any alignment and I/O width restrictions that a PI System on a
+  platform might require. For example on some platforms, width requests of
+  EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will
+  be handled by the driver.
+
+  @param[in] MmioOperation  TRUE for an MMIO operation, FALSE for I/O Port 
operation.
+  @param[in] Width  Signifies the width of the I/O or Memory operation.
+  @param[in] AddressThe base address of the I/O operation.
+  @param[in] Count  The number of I/O operations to perform. The 
number of
+bytes moved is Width size * Count, starting at 
Address.
+  @param[in] Buffer For read operations, the destination buffer to 
store the results.
+For write operations, the source buffer from which 
to write data.
+
+  @retval EFI_SUCCESSThe parameters for this request pass the 
checks.
+  @retval EFI_INVALID_PARAMETER  Width is invalid for this PI system.
+  @retval EFI_INVALID_PARAMETER  Buffer is NULL.
+  @retval EFI_UNSUPPORTEDThe Buffer is not aligned for the given Width.
+  @retval EFI_UNSUPPORTEDThe address range specified by Address, Width,
+ and Count is not valid for this PI system.
+**/
+EFI_STATUS
+CpuIoCheckParameter (
+  IN BOOLEANMmioOperation,
+  IN EFI_CPU_IO_PROTOCOL_WIDTH  Width,
+  IN UINT64 Address,
+  IN UINTN  Count,
+  IN VOID   *Buffer
+  )
+{
+  UINT64  MaxCount;
+  UINT64  Limit;
+
+  //
+  // Check to see if Buffer is NULL
+  //
+  if (Buffer == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // Check to see if Width is in the valid range
+  //
+  if ((UINT32)Width >= EfiCpuIoWidthMaximum) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  //
+  // For FIFO type, the target address won't increase during the access,
+  // so treat Count as 1
+  //
+  if ((Width >= EfiCpuIoWidthFifoUint8)
+&& (Width <= EfiCpuIoWidthFifoUint64))
+  {
+Count = 1;
+  }
+
+  //
+  // Check to see if Width is in the valid range for I/O Port operations
+  //
+  Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03);
+  if ((!MmioOperation)
+&& 

[edk2-devel] [edk2-platforms][PATCH V5 13/15] Platform/Loongson: Add Reset System Lib.

[xianglai]

This library provides interfaces related to restart and shutdown.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../BaseResetSystemAcpiGed.c  | 146 ++
 .../BaseResetSystemAcpiGedLib.inf |  37 +++
 .../DxeResetSystemAcpiGed.c   | 257 ++
 .../DxeResetSystemAcpiGedLib.inf  |  41 +++
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.c   | 128 +
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.h   |  23 ++
 6 files changed, 632 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGedLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGed.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/DxeResetSystemAcpiGedLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/ResetSystemAcpiGed.h

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
new file mode 100644
index 00..0df629ffcd
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/ResetSystemAcpiLib/BaseResetSystemAcpiGed.c
@@ -0,0 +1,146 @@
+/** @file
+  Base ResetSystem library implementation.
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include "ResetSystemAcpiGed.h"
+#include 
+
+/**
+  Get configuration item data by the firmware configuration file name.
+
+  @param[in]  Name - Name of file to look up.
+
+  @returnVOID*   The Pointer of Value of Firmware Configuration item 
read.
+**/
+VOID *
+GetFwCfgData(
+CONST CHAR8   *Name
+)
+{
+  FIRMWARE_CONFIG_ITEM FwCfgItem;
+  EFI_STATUS   Status;
+  UINTNFwCfgSize;
+  VOID *Data;
+
+  Status = QemuFwCfgFindFile (Name, &FwCfgItem, &FwCfgSize);
+  if (EFI_ERROR (Status)) {
+DEBUG ((DEBUG_ERROR, "%a %d read  %s error Status %d \n", __func__, 
__LINE__, Name, Status));
+return NULL;
+  }
+
+  Data = AllocatePool (FwCfgSize);
+  if (Data == NULL) {
+return NULL;
+  }
+
+  QemuFwCfgSelectItem (FwCfgItem);
+  QemuFwCfgReadBytes (FwCfgSize, Data);
+
+  return Data;
+}
+
+/**
+  Find the power manager related info from ACPI table
+
+  @retval RETURN_SUCCESS Successfully find out all the required 
information.
+  @retval RETURN_NOT_FOUND   Failed to find the required info.
+**/
+STATIC EFI_STATUS
+GetPowerManagerByParseAcpiInfo (VOID)
+{
+  EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE*Fadt = NULL;
+  EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp = NULL;
+  EFI_ACPI_DESCRIPTION_HEADER  *Xsdt = NULL;
+  EFI_ACPI_DESCRIPTION_HEADER  *Rsdt = NULL;
+  VOID *AcpiTables = NULL;
+  UINT32   *Entry32 = NULL;
+  UINTN Entry32Num;
+  UINT32   *Signature = NULL;
+  UINTN Idx;
+
+  Rsdp = GetFwCfgData ("etc/acpi/rsdp");
+  if (Rsdp == NULL) {
+DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/rsdp error \n", __func__, 
__LINE__));
+return RETURN_NOT_FOUND;
+  }
+
+  AcpiTables = GetFwCfgData ("etc/acpi/tables");
+  if (AcpiTables == NULL) {
+DEBUG ((DEBUG_ERROR, "%a %d read etc/acpi/tables error \n", __func__, 
__LINE__));
+FreePool (Rsdp);
+return RETURN_NOT_FOUND;
+  }
+
+  Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables +  
Rsdp->RsdtAddress);
+  Entry32= (UINT32 *)(Rsdt + 1);
+  Entry32Num = (Rsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
+  for (Idx = 0; Idx < Entry32Num; Idx++) {
+Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
+if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
+  Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE *)Signature;
+  DEBUG ((DEBUG_INFO, "Found Fadt in Rsdt\n"));
+  goto Done;
+}
+  }
+
+  Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)AcpiTables +  
Rsdp->XsdtAddress);
+  Entry32= (UINT32 *)(Xsdt + 1);
+  Entry32Num = (Xsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
+  for (Idx = 0; Idx < Entry32Num; Idx++) {
+Signature = (UINT32 *)((UINTN)Entry32[Idx] + (UINTN)AcpiTables);
+if (*Signature == EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
+  Fadt = (EFI_ACPI_5_0_FIXED_ACPI_DESCRI

[edk2-devel] [edk2-platforms][PATCH V5 08/15] Platform/Loongson: Add CPU DXE driver.

[xianglai]

The driver produces EFI_CPU_ARCH_PROTOCOL,
Initialize the exception entry address.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c  | 367 ++
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h  | 199 ++
 .../Drivers/CpuDxe/CpuDxe.inf |  59 +++
 .../Drivers/CpuDxe/LoongArch64/Exception.c| 335 
 .../Drivers/CpuDxe/LoongArch64/Fpu.S  |  97 +
 .../Drivers/CpuDxe/LoongArch64/LoongArch.S| 321 +++
 6 files changed, 1378 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Exception.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/Fpu.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/LoongArch64/LoongArch.S

diff --git a/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
new file mode 100644
index 00..23f824d82b
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c
@@ -0,0 +1,367 @@
+/** @file
+  CPU DXE Module to produce CPU ARCH Protocol
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "CpuDxe.h"
+
+BOOLEAN mInterruptState   = FALSE;
+
+/*
+  This function flushes the range of addresses from Start to Start+Length
+  from the processor's data cache. If Start is not aligned to a cache line
+  boundary, then the bytes before Start to the preceding cache line boundary
+  are also flushed. If Start+Length is not aligned to a cache line boundary,
+  then the bytes past Start+Length to the end of the next cache line boundary
+  are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
+  supported. If the data cache is fully coherent with all DMA operations, then
+  this function can just return EFI_SUCCESS. If the processor does not support
+  flushing a range of the data cache, then the entire data cache can be 
flushed.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+  @param  StartThe beginning physical address to flush from the 
processor's data
+   cache.
+  @param  Length   The number of bytes to flush from the processor's 
data cache. This
+   function may flush more bytes than Length specifies 
depending upon
+   the granularity of the flush operation that the 
processor supports.
+  @param  FlushTypeSpecifies the type of flush operation to perform.
+
+  @retval EFI_SUCCESS   The address range from Start to Start+Length 
was flushed from
+the processor's data cache.
+  @retval EFI_UNSUPPORTEDT  The processor does not support the cache flush 
type specified
+by FlushType.
+  @retval EFI_DEVICE_ERROR  The address range from Start to Start+Length 
could not be flushed
+from the processor's data cache.
+**/
+EFI_STATUS
+EFIAPI
+CpuFlushCpuDataCache (
+  IN EFI_CPU_ARCH_PROTOCOL   *This,
+  IN EFI_PHYSICAL_ADDRESSStart,
+  IN UINT64  Length,
+  IN EFI_CPU_FLUSH_TYPE  FlushType
+  )
+{
+  switch (FlushType) {
+case EfiCpuFlushTypeWriteBack:
+  WriteBackDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
+  break;
+case EfiCpuFlushTypeInvalidate:
+  InvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
+  break;
+case EfiCpuFlushTypeWriteBackInvalidate:
+  WriteBackInvalidateDataCacheRange ((VOID *) (UINTN)Start, (UINTN)Length);
+  break;
+default:
+  return EFI_INVALID_PARAMETER;
+  }
+  return EFI_SUCCESS;
+}
+
+/**
+  This function enables interrupt processing by the processor.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+
+  @retval EFI_SUCCESS   Interrupts are enabled on the processor.
+  @retval EFI_DEVICE_ERROR  Interrupts could not be enabled on the 
processor.
+**/
+EFI_STATUS
+EFIAPI
+CpuEnableInterrupt (
+  IN EFI_CPU_ARCH_PROTOCOL  *This
+  )
+{
+  EnableInterrupts ();
+
+  mInterruptState  = TRUE;
+  return EFI_SUCCESS;
+}
+
+/**
+  This function disables interrupt processing by the processor.
+
+  @param  This The EFI_CPU_ARCH_PROTOCOL instance.
+
+  @retval EFI_SUCCESS   Interrupts are disabled on the proc

[edk2-devel] [edk2-platforms][PATCH V5 11/15] Platform/Loongson: Add RealTime Clock lib.

[xianglai]

This library provides interfaces such as
real-time clock initialization
to get time and setting time.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../LsRealTimeClockLib/LsRealTimeClock.h  |  40 +++
 .../LsRealTimeClockLib/LsRealTimeClockLib.c   | 335 ++
 .../LsRealTimeClockLib/LsRealTimeClockLib.inf |  44 +++
 3 files changed, 419 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
new file mode 100644
index 00..6567ec80db
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClock.h
@@ -0,0 +1,40 @@
+/** @file
+  Implement EFI RealTimeClock runtime services via RTC Lib.
+
+  Copyright (c) 2022, Loongson Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef LS_REAL_TIME_CLOCK_H_
+#define LS_REAL_TIME_CLOCK_H_
+
+#define TOY_WRITE0_REG0x24
+#define TOY_WRITE1_REG0x28
+#define TOY_READ0_REG 0x2c
+#define TOY_READ1_REG 0x30
+#define RTC_CTRL_REG  0x40
+
+/* TOY Enable bits */
+#define RTC_ENABLE_BIT(1UL << 13)
+#define TOY_ENABLE_BIT(1UL << 11)
+#define OSC_ENABLE_BIT(1UL << 8)
+
+/*
+ * shift bits and filed mask
+ */
+#define TOY_MON_MASK  0x3f
+#define TOY_DAY_MASK  0x1f
+#define TOY_HOUR_MASK 0x1f
+#define TOY_MIN_MASK  0x3f
+#define TOY_SEC_MASK  0x3f
+#define TOY_MSEC_MASK 0xf
+
+#define TOY_MON_SHIFT 26
+#define TOY_DAY_SHIFT 21
+#define TOY_HOUR_SHIFT16
+#define TOY_MIN_SHIFT 10
+#define TOY_SEC_SHIFT 4
+
+#endif // LS_REAL_TIME_CLOCK_H_
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
new file mode 100644
index 00..dc651ccaaf
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/LsRealTimeClockLib/LsRealTimeClockLib.c
@@ -0,0 +1,335 @@
+/** @file
+  Implement EFI RealTimeClock runtime services via RTC Lib.
+
+  Copyright (c) 2022, Loongson Limited. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include "LsRealTimeClock.h"
+
+STATIC BOOLEANmInitialized = FALSE;
+STATIC EFI_EVENT  mRtcVirtualAddrChangeEvent;
+STATIC UINTN  mRtcBase = 0x100d0100;
+/*
+  Enable Real-time clock.
+
+  @param VOID
+
+  @retval  VOID
+ */
+VOID
+InitRtc (
+  VOID
+  )
+{
+ UINTN  Val;
+
+  if (!mInitialized) {
+/* enable rtc */
+Val  = MmioRead32 (mRtcBase + RTC_CTRL_REG);
+Val |= TOY_ENABLE_BIT | OSC_ENABLE_BIT;
+MmioWrite32 (mRtcBase + RTC_CTRL_REG, Val);
+mInitialized = TRUE;
+  }
+}
+
+/**
+  Returns the current time and date information, and the time-keeping 
capabilities
+  of the hardware platform.
+
+  @param  Time   A pointer to storage to receive a snapshot of 
the current time.
+  @param  Capabilities   An optional pointer to a buffer to receive 
the real time clock
+ device's capabilities.
+
+  @retval EFI_SUCCESSThe operation completed successfully.
+  @retval EFI_INVALID_PARAMETER  Time is NULL.
+  @retval EFI_DEVICE_ERROR   The time could not be retrieved due to 
hardware error.
+  @retval EFI_SECURITY_VIOLATION The time could not be retrieved due to an 
authentication failure.
+**/
+EFI_STATUS
+EFIAPI
+LibGetTime (
+  OUT EFI_TIME*Time,
+  OUT EFI_TIME_CAPABILITIES   *Capabilities
+  )
+{
+  UINT32  Val;
+
+  // Ensure Time is a valid pointer
+  if (Time == NULL) {
+return EFI_INVALID_PARAMETER;
+  }
+
+  InitRtc ();
+  Val = MmioRead32 (mRtcBase + TOY_READ1_REG);
+  Time->Year = Val + 1900;
+
+  Val = MmioRead32 (mRtcBase + TOY_READ0_REG);
+  Time->Month =  (Val >> TOY_MON_SHIFT) & TOY_MON_MASK;
+  Time->Day   =  (Val >> TOY_DAY_SHIFT) & TOY_DAY_MASK;
+  Time->Hour  =  (Val >> TOY_HOUR_SHIFT) & TOY_HOUR_MASK;
+  Time->Minute = (Val >> TOY_MIN_SHIFT) & TOY_MIN_MASK;
+  Time->Second = (Val >> TOY_SEC_SHIFT) & TOY_SEC_MASK;
+  Time->Nanosecond  = 0;
+  return EFI_SUCCESS;
+}
+
+/**
+  Sets the current local time and date information.
+
+  @param  Time 

[edk2-devel] [edk2-platforms][PATCH V5 07/15] Platform/Loongson: Support PEI phase.

[xianglai]

Platform PEI module for LoongArch platform initialization.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Loongson/LoongArchQemuPkg/Loongson.dec|  23 ++
 .../Loongson/LoongArchQemuPkg/Loongson.dsc|  64 +
 .../Loongson/LoongArchQemuPkg/Loongson.fdf|  51 
 .../LoongArchQemuPkg/PlatformPei/Fv.c |  58 
 .../LoongArchQemuPkg/PlatformPei/MemDetect.c  | 104 +++
 .../LoongArchQemuPkg/PlatformPei/Platform.c   | 261 ++
 .../LoongArchQemuPkg/PlatformPei/Platform.h   |  86 ++
 .../PlatformPei/PlatformPei.inf   |  72 +
 8 files changed, 719 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Fv.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/MemDetect.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/PlatformPei/Platform.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/PlatformPei/PlatformPei.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
index 61f600b20d..aeae75a678 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -32,7 +32,30 @@
 [PcdsFixedAtBuild, PcdsDynamic]
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0001
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvBase|0x0|UINT64|0x0003
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashDxeFvSize|0x0|UINT32|0x0004
+  gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreeBase|0x0|UINT64|0x0009
+  gLoongArchQemuPkgTokenSpaceGuid.PcdDeviceTreePadding|256|UINT32|0x000a
+
   gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT64|0x000b
   gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x000c
+  gLoongArchQemuPkgTokenSpaceGuid.PcdUefiRamTop|0x0|UINT64|0x000d
+  gLoongArchQemuPkgTokenSpaceGuid.PcdRamRegionsBottom|0x0|UINT64|0x000e
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x000f
   gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x0010
+
+## In the PcdsFixedAtBuild.LOONGARCH64 area, numbers start at 0x1.
+[PcdsFixedAtBuild.LOONGARCH64]
+   gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|32|UINT8|0x0001
+   gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize|0|UINT8|0x00010001
+
+## In the PcdsDynamic area, numbers start at 0x2.
+[PcdsDynamic]
+  gLoongArchQemuPkgTokenSpaceGuid.PcdRamSize|0x4000|UINT64|0x0002
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgSelectorAddress|0x0|UINT64|0x00020001
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFwCfgDataAddress|0x0|UINT64|0x00020002
+  gLoongArchQemuPkgTokenSpaceGuid.PcdSwapPageDir|0x0|UINT64|0x00020003
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPgd|0x0|UINT64|0x00020004
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPud|0x0|UINT64|0x00020005
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPmd|0x0|UINT64|0x00020006
+  gLoongArchQemuPkgTokenSpaceGuid.PcdInvalidPte|0x0|UINT64|0x00020007
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
index b506f70625..b78a7e3b49 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -56,16 +56,53 @@
 
 [LibraryClasses.common]
   PcdLib   | 
MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  TimerLib | 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf
   PrintLib | 
MdePkg/Library/BasePrintLib/BasePrintLib.inf
   BaseMemoryLib| 
MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
   BaseLib  | MdePkg/Library/BaseLib/BaseLib.inf
+  PerformanceLib   | 
MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
   PeCoffLib| 
MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+  CacheMaintenanceLib  | 
MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+  UefiDecompressLib| 
MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
   PeCoffGetEntryPointLib   | 
MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
   IoLib| 
MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
   SerialPortLib| 
Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.inf
   DebugPrintErrorLevelLib  | 
MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+  FdtLib   | EmbeddedPkg/Library/FdtLib/FdtLib.inf
   PeCoffExtraActionLib | 
MdePkg/Library/BasePeCoffExtraActionLibNull/Ba

[edk2-devel] [edk2-platforms][PATCH V5 10/15] Platform/Loongson: Add timer Dxe driver.

[xianglai]

This driver produces Timer Architectural Protocol,
Registers a timer interrupt and initializes the timer.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Drivers/StableTimerDxe/Timer.c| 388 ++
 .../Drivers/StableTimerDxe/Timer.h| 172 
 .../Drivers/StableTimerDxe/TimerConfig.S  |  38 ++
 .../Drivers/StableTimerDxe/TimerDxe.inf   |  44 ++
 4 files changed, 642 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/TimerConfig.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/TimerDxe.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c 
b/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
new file mode 100644
index 00..e09da71272
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Drivers/StableTimerDxe/Timer.c
@@ -0,0 +1,388 @@
+/** @file
+  Timer Architectural Protocol as defined in the DXE CIS
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include "Library/Cpu.h"
+#include 
+#include 
+#include "Timer.h"
+#include 
+#include 
+
+//
+// The handle onto which the Timer Architectural Protocol will be installed
+//
+EFI_HANDLEmTimerHandle = NULL;
+EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;
+
+//
+// The Timer Architectural Protocol that this driver produces
+//
+EFI_TIMER_ARCH_PROTOCOL   mTimer = {
+  TimerDriverRegisterHandler,
+  TimerDriverSetTimerPeriod,
+  TimerDriverGetTimerPeriod,
+  TimerDriverGenerateSoftInterrupt
+};
+
+//
+// Pointer to the CPU Architectural Protocol instance
+//
+EFI_CPU_ARCH_PROTOCOL *mCpu;
+
+//
+// The notification function to call on every timer interrupt.
+// A bug in the compiler prevents us from initializing this here.
+//
+EFI_TIMER_NOTIFY mTimerNotifyFunction;
+
+//
+// The current period of the timer interrupt
+//
+volatile UINT64   mTimerPeriod = 0;
+volatile UINT64   mTimerTicks = 0;
+
+//
+// Const frequence in Hz
+//
+extern UINT32 StableTimerFreq;
+
+/**
+  Sets the counter value for timer.
+
+  @param CountThe 16-bit counter value to program into stable timer.
+
+  @retval VOID
+**/
+VOID
+SetPitCount (
+  IN UINT64  Count
+  )
+{
+  if (Count <= 4) {
+return;
+  }
+
+  Count &= LOONGARCH_CSR_TMCFG_TIMEVAL;
+  Count |= LOONGARCH_CSR_TMCFG_EN | LOONGARCH_CSR_TMCFG_PERIOD;
+  LoongarchWriteqTmcfg (Count);
+}
+
+/**
+  Timer Interrupt Handler.
+
+  @param InterruptTypeThe type of interrupt that occurred
+  @param SystemContextA pointer to the system context when the interrupt 
occurred
+
+  @retval VOID
+**/
+VOID
+EFIAPI
+TimerInterruptHandler (
+  IN EFI_EXCEPTION_TYPE   InterruptType,
+  IN EFI_SYSTEM_CONTEXT   SystemContext
+  )
+{
+  EFI_TPL OriginalTPL;
+
+  OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
+
+  //
+  // Clear interrupt.
+  //
+  LoongarchWriteqTintclr (0x1);
+
+  if (mTimerNotifyFunction != NULL) {
+//
+// @bug : This does not handle missed timer interrupts
+//
+mTimerNotifyFunction (mTimerPeriod);
+  }
+
+  gBS->RestoreTPL (OriginalTPL);
+}
+
+/**
+  This function registers the handler NotifyFunction so it is called every time
+  the timer interrupt fires.  It also passes the amount of time since the last
+  handler call to the NotifyFunction.  If NotifyFunction is NULL, then the
+  handler is unregistered.  If the handler is registered, then EFI_SUCCESS is
+  returned.  If the CPU does not support registering a timer interrupt handler,
+  then EFI_UNSUPPORTED is returned.  If an attempt is made to register a 
handler
+  when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+  If an attempt is made to unregister a handler when a handler is not 
registered,
+  then EFI_INVALID_PARAMETER is returned.  If an error occurs attempting to
+  register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+  is returned.
+
+  @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+  @param NotifyFunction   The function to call when a timer interrupt fires.  
This
+  function executes at TPL_HIGH_LEVEL.  The DXE Core 
will
+  register a handler for the timer interrupt, so it 
can know
+  how much time has passed.  This information is used 
to
+  signal timer based events.  NULL will unregister the 
handler.
+
+  @retvalEFI_SUCCESSThe timer handler was registered.
+  @retvalEFI_UNSUPPORTEDThe platform does not sup

[edk2-devel] [edk2-platforms][PATCH V5 05/15] Platform/Loongson: Add MmuLib.

[xianglai]

Read the memory map information through the QemuFwCfg interface,
then build the page table through the memory map information,
and finally enable Mmu.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../LoongArchQemuPkg/Include/Library/MmuLib.h |  85 ++
 .../LoongArchQemuPkg/Library/MmuLib/Mmu.S | 155 
 .../Library/MmuLib/MmuBaseLib.inf |  40 +
 .../Library/MmuLib/MmuBaseLibPei.inf  |  47 +
 .../Library/MmuLib/MmuLibCore.c   | 831 ++
 .../Library/MmuLib/MmuLibCore.h   |  40 +
 .../Library/MmuLib/MmuLibCorePei.c| 231 +
 .../LoongArchQemuPkg/Library/MmuLib/mmu.h | 190 
 .../LoongArchQemuPkg/Library/MmuLib/page.h| 280 ++
 .../LoongArchQemuPkg/Library/MmuLib/pte.h |  57 ++
 10 files changed, 1956 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseLib.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuBaseLibPei.inf
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCore.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/MmuLibCorePei.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/mmu.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/page.h
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/pte.h

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
new file mode 100644
index 00..9880fc385c
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/MmuLib.h
@@ -0,0 +1,85 @@
+/** @file
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- EXC - execute
+**/
+#ifndef MMU_LIB_H_
+#define MMU_LIB_H_
+/**
+  write operation is performed Count times from the first element of Buffer.
+  Convert EFI Attributes to Loongarch Attributes.
+  @param[in]  EfiAttributes Efi Attributes.
+
+  @retval  LoongArch Attributes.
+**/
+UINTN
+EfiAttributeToLoongArchAttribute (
+  IN UINTN  EfiAttributes
+  );
+
+/**
+  Finds the length and memory properties of the memory region corresponding to 
the specified base address.
+
+  @param[in]  BaseAddressTo find the base address of the memory region.
+  @param[in]  EndAddress To find the end address of the memory region.
+  @param[out]  RegionLengthThe length of the memory region found.
+  @param[out]  RegionAttributesProperties of the memory region found.
+
+  @retval  EFI_SUCCESSThe corresponding memory area was successfully found
+   EFI_NOT_FOUNDNo memory area found
+**/
+EFI_STATUS
+GetLoongArchMemoryRegion (
+  IN UINTN  BaseAddress,
+  IN UINTN  EndAddress,
+  OUTUINTN  *RegionLength,
+  OUTUINTN  *RegionAttributes
+  );
+
+/**
+  Sets the Attributes  of the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to set the 
Attributes.
+  @param[in]  Length   The length of the memory region to set the 
Attributes.
+  @param[in]  Attributes   The Attributes to be set.
+
+  @retval  EFI_SUCCESSThe Attributes was set successfully
+**/
+EFI_STATUS
+LoongArchSetMemoryAttributes (
+  IN EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN UINTN Length,
+  IN UINTN Attributes
+  );
+
+/**
+  Sets the non-executable Attributes for the specified memory region
+
+  @param[in]  BaseAddress  The base address of the memory region to set the 
Attributes.
+  @param[in]  Length   The length of the memory region to set the 
Attributes.
+
+  @retval  EFI_SUCCESSThe Attributes was set successfully
+**/
+EFI_STATUS
+LoongArchSetMemoryRegionNoExec (
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,
+  IN  UINTNLength
+  );
+
+/**
+  Create a page table and initialize the MMU.
+
+  @param[] VOID
+
+  @retval  VOID
+**/
+VOID
+EFIAPI
+ConfigureMmu (
+  VOID
+  );
+#endif // MMU_LIB_H_
diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S 
b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
new file mode 100644
index 00..d5863de072
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/MmuLib/Mmu.S
@@ -0,0 +1,155 @@
+#--
+#
+# LoongArch for LoongArch
+#
+# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--

[edk2-devel] [edk2-platforms][PATCH V5 01/15] Platform/Loongson: Add Serial Port library

[xianglai]

Serial Port library for LoongarchQemuPkg

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../LoongArchQemuPkg/Include/Library/Cpu.h| 237 +++
 .../Include/LoongArchQemuPlatform.h   |  95 +++
 .../Library/SerialPortLib/SerialPortLib.c | 593 ++
 .../Library/SerialPortLib/SerialPortLib.inf   |  39 ++
 4 files changed, 964 insertions(+)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/SerialPortLib/SerialPortLib.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
new file mode 100644
index 00..c6599c6ed7
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/Cpu.h
@@ -0,0 +1,237 @@
+/** @file
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- EXC - Exception
+- INT - Interrupt
+- FPU - Floating Point Unit
+- CSR - CPU Status Register
+- READQ   - Read Quad Word
+**/
+#ifndef LOONGARCH_CPU_H_
+#define LOONGARCH_CPU_H_
+
+/* Exception types decoded by machdep exception decoder */
+#define EXC_INT 0   /* HW interrupt */
+#define EXC_TLBL1   /* TLB miss on a load */
+#define EXC_TLBS2   /* TLB miss on a store */
+#define EXC_TLBI3   /* TLB miss on a ifetch */
+#define EXC_TLBM4   /* TLB modified fault */
+#define EXC_TLBRI   5   /* TLB Read-Inhibit exception */
+#define EXC_TLBXI   6   /* TLB Execution-Inhibit exception 
*/
+#define EXC_TLBPE   7   /* TLB Privilege Error */
+#define EXC_ADE 8   /* Address Error */
+#define EXC_ALE 9   /* Unalign Access */
+#define EXC_OOB 10  /* Out of bounds */
+#define EXC_SYS 11  /* System call */
+#define EXC_BP  12  /* Breakpoint */
+#define EXC_INE 13  /* Inst. Not Exist */
+#define EXC_IPE 14  /* Inst. Privileged Error */
+#define EXC_FPDIS   15  /* FPU Disabled */
+#define EXC_LSXDIS  16  /* LSX Disabled */
+#define EXC_LASXDIS 17  /* LASX Disabled */
+#define EXC_FPE 18  /* Floating Point Exception */
+#define EXC_WATCH   19  /* Watch address reference */
+#define EXC_BAD 255 /* Undecodeable */
+
+#define COPY_SIGCODE// copy sigcode above user stack in exec
+#define ZERO$r0 /* wired zero */
+#define RA  $r1 /* return address */
+#define GP  $r2 /* global pointer - caller saved for 
PIC */
+#define SP  $r3 /* stack pointer */
+#define V0  $r4 /* return value - caller saved */
+#define V1  $r5
+#define A0  $r4 /* argument registers */
+#define A1  $r5
+#define A2  $r6
+#define A3  $r7
+#define A4  $r8 /* arg reg 64 bit; caller saved in 32 
bit */
+#define A5  $r9
+#define A6  $r10
+#define A7  $r11
+#define T0  $r12 /* caller saved */
+#define T1  $r13
+#define T2  $r14
+#define T3  $r15
+#define T4  $r16 /* callee saved */
+#define T5  $r17
+#define T6  $r18
+#define T7  $r19
+#define T8  $r20 /* caller saved */
+#define TP  $r21 /* TLS */
+#define FP  $r22 /* frame pointer */
+#define S0  $r23 /* callee saved */
+#define S1  $r24
+#define S2  $r25
+#define S3  $r26
+#define S4  $r27
+#define S5  $r28
+#define S6  $r29
+#define S7  $r30
+#define S8  $r31 /* callee saved */
+
+#define FCSR0   $r0
+
+//
+// Location of the saved registers relative to ZERO.
+// Usage is p->p_regs[XX].
+//
+#define RA_NUM  

[edk2-devel] [edk2-platforms][PATCH V5 02/15] Platform/Loongson: Support SEC

[xianglai]

Add SEC Code And Readme.md for LoongArchQemu

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li  
Signed-off-by: xianglai li 
---
 .../Include/LoongArchQemuPlatform.h   |   2 +-
 .../Loongson/LoongArchQemuPkg/Loongson.dec|  38 ++
 .../Loongson/LoongArchQemuPkg/Loongson.dsc| 122 +
 .../Loongson/LoongArchQemuPkg/Loongson.fdf|  53 ++
 .../LoongArchQemuPkg/Loongson.fdf.inc |  21 +
 .../LoongArchQemuPkg/Sec/LoongArch64/Start.S  |  84 +++
 .../Loongson/LoongArchQemuPkg/Sec/SecMain.c   | 494 ++
 .../Loongson/LoongArchQemuPkg/Sec/SecMain.inf |  51 ++
 8 files changed, 864 insertions(+), 1 deletion(-)
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.dec
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Loongson.fdf.inc
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/LoongArch64/Start.S
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.c
 create mode 100644 Platform/Loongson/LoongArchQemuPkg/Sec/SecMain.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
index e942e6a994..d003b9013d 100644
--- a/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/LoongArchQemuPlatform.h
@@ -92,4 +92,4 @@
 #define UART_BASE_ADDRESS (0x1fe001e0)
 #define UART_BPS  (115200)
 #define UART_WAIT_TIMOUT  (100)
-#endif
+#endif // LOONGARCH_QEMU_PLATFORM_H_
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dec 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
new file mode 100644
index 00..61f600b20d
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dec
@@ -0,0 +1,38 @@
+## @file
+#
+#  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  DEC_SPECIFICATION  = 0x00010005
+  PACKAGE_NAME   = LoongArchQemuPkg
+  PACKAGE_GUID   = b51d765a-41da-45fc-a537-de3ee785c0f6
+  PACKAGE_VERSION= 0.1
+
+
+#
+# Include Section - list of Include Paths that are provided by this package.
+#   Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+#  BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER
+#  DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+
+[Includes.common]
+  Include# Root include for the package
+
+[Guids]
+  gLoongArchQemuPkgTokenSpaceGuid  = { 0x0e0383ce, 0x0151, 0x4d01, { 0x80, 
0x0e, 0x3f, 0xef, 0x8b, 0x27, 0x6d, 0x52 } }
+
+## In the PcdsFixedAtBuild and PcdsDynamic areas, numbers start at 0x0.
+[PcdsFixedAtBuild, PcdsDynamic]
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvBase|0x0|UINT64|0x
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashPeiFvSize|0x0|UINT32|0x0001
+  gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamBase|0|UINT64|0x000b
+  gLoongArchQemuPkgTokenSpaceGuid.PcdSecPeiTempRamSize|0|UINT32|0x000c
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvBase|0x0|UINT64|0x000f
+  gLoongArchQemuPkgTokenSpaceGuid.PcdFlashSecFvSize|0x0|UINT32|0x0010
diff --git a/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc 
b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
new file mode 100644
index 00..b506f70625
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Loongson.dsc
@@ -0,0 +1,122 @@
+## @file
+#
+#  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+###
+[Defines]
+  PLATFORM_NAME  = LoongArchQemu
+  PLATFORMPKG_NAME   = LoongArchQemu
+  PLATFORM_GUID  = 7926ea52-b0dc-4ee8-ac63-341eebd84ed4
+  PLATFORM_VERSION   = 0.1
+  DSC_SPECIFICATION  = 0x00010005
+  OUTPUT_DIRECTORY   = Build/$(PLATFORM_NAME)
+  SUPPORTED_ARCHITECTURES= LOONGARCH64
+  BUILD_TARGETS  = DEBUG|RELEASE
+  SKUID_IDENTIFIER   = DEFAULT
+  FLASH_DEFINITION   = 
Platform/Loongson/LoongArchQemuPkg/Loongson.fdf
+  TTY_TERMINAL   = FALSE
+
+

[edk2-devel] [edk2-platforms][PATCH V5 06/15] Platform/Loongson: Add StableTimerLib.

[xianglai]

This library provides a delay interface and a timing interface.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Include/Library/StableTimer.h |  59 +
 .../Library/StableTimerLib/Count.S|  52 
 .../Library/StableTimerLib/TimerLib.c | 236 ++
 .../Library/StableTimerLib/TimerLib.inf   |  32 +++
 4 files changed, 379 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
new file mode 100644
index 00..93f5b66c34
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/StableTimer.h
@@ -0,0 +1,59 @@
+/** @file
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Csr- Cpu Status Register
+- Calc   - Calculation
+- Freq   - frequency
+**/
+
+#ifndef STABLE_TIMER_H_
+#define STABLE_TIMER_H_
+#include "Library/Cpu.h"
+
+/**
+  Gets the timer count value.
+
+  @param[] VOID
+
+  @retval  timer count value.
+**/
+extern
+UINTN
+EFIAPI
+LoongArchReadTime (
+  VOID
+  );
+
+/**
+  Calculate the timer frequency.
+
+  @param[] VOID
+
+  @retval  Timer frequency.
+**/
+UINT32
+EFIAPI
+CalcConstFreq (
+  VOID
+  );
+
+/*
+  Reads data from the specified CPUCFG register.
+
+  @param[OUT]  Val   Pointer to the variable used to store the CPUCFG register 
value.
+  @param[IN]  regSpecifies the register number of the CPUCFG to read the 
data.
+
+  @retval  none
+ */
+extern
+VOID
+LoongArchReadCpuCfg (
+  UINT64   *Val,
+  UINT64   reg
+  );
+
+#endif // STABLE_TIMER_H_
diff --git a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S 
b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
new file mode 100644
index 00..4e0e718381
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/Count.S
@@ -0,0 +1,52 @@
+#--
+#
+# Count for LoongArch
+#
+# Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#--
+
+#ifndef __ASSEMBLY__
+#define __ASSEMBLY__
+#endif
+
+#include "Library/Cpu.h"
+
+ASM_GLOBAL ASM_PFX(CpuSetIP)
+ASM_GLOBAL ASM_PFX(LoongArchReadTime)
+ASM_GLOBAL ASM_PFX(LoongArchReadCpuCfg)
+
+#
+# Set cpu interrupts
+# @param A0 The interrupt number
+#
+
+ASM_PFX(CpuSetIP):
+csrrd   T0, LOONGARCH_CSR_ECFG
+or  T0, T0, A0
+csrwr   T0, LOONGARCH_CSR_ECFG
+jirlZERO, RA, 0
+
+#
+#Gets the timer count value.
+#@param[] VOID
+#@retval  timer count value.
+#
+
+ASM_PFX(LoongArchReadTime):
+rdtime.d   A0, ZERO
+jirlZERO, RA, 0
+
+#
+#   Read Csr CPUCFG register.
+#   @param   A0 Pointer to the variable used to store the CPUCFG register 
value.
+#   @param   A1 Specifies the register number of the CPUCFG to read the data.
+#   @retval  none
+#
+
+ASM_PFX(LoongArchReadCpuCfg):
+cpucfg T0, A1
+stptr.d T0, A0, 0
+jirlZERO, RA, 0
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c 
b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
new file mode 100644
index 00..135fb22611
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Library/StableTimerLib/TimerLib.c
@@ -0,0 +1,236 @@
+/** @file
+  Generic LoongArch implementation of TimerLib.h
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- Freq - Frequency
+- Csr  - Cpu Status Register
+- calc - calculate
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include "Library/StableTimer.h"
+#include "Library/Cpu.h"
+
+UINT32 StableTimerFreq = 0;
+
+/**
+  Calculate the timer frequency.
+
+  @param[] VOID
+
+  @retval  Timer frequency.
+**/
+UINT32
+EFIAPI
+CalcConstFreq (
+  VOID
+  )
+{
+  UINT32 Result;
+  UINT32 BaseFreq;
+  UINT32 ClockMultiplier;
+  UINT32 ClockDivide;
+  UINT64 Val;
+
+  LoongArchReadCpuCfg (&Val, LOONGARCH_CPUCFG4);
+  BaseFreq = (UINT32)Val;
+  LoongArchReadCpuCfg (&Val, LOONGARCH_CPUCFG5);
+  Result = (UINT32)Val;
+  ClockMultiplier = Result & 0x;
+  ClockDivide = (Result >> 16) & 0x;
+
+  if ((!BaseFreq) || (!ClockMultiplier) || (!ClockDivide)) {
+retu

[edk2-devel] [edk2-platforms][PATCH V5 04/15] Platform/Loongson: Add QemuFwCfgLib.

[xianglai]

QemuFwCfgLib for PEI phase.
This library obtains the QemuFWCfg base address by
directly parsing the fdt, and reads and writes the data
in the QemuFWCfg by operating on the QemuFWCfg base address.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../Include/Library/QemuFwCfgLib.h| 174 +++
 .../QemuFwCfgLib/QemuFwCfgLibInternal.h   |  63 +++
 .../Library/QemuFwCfgLib/QemuFwCfgPei.c   | 117 +
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.c| 463 ++
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf  |  46 ++
 5 files changed, 863 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgLibInternal.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPei.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf

diff --git a/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h 
b/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
new file mode 100644
index 00..11da4d0b8a
--- /dev/null
+++ b/Platform/Loongson/LoongArchQemuPkg/Include/Library/QemuFwCfgLib.h
@@ -0,0 +1,174 @@
+/** @file
+  QEMU/KVM Firmware Configuration access
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Glossary:
+- FW or Fw- Firmware
+- Cfg - Configure
+**/
+
+#ifndef QEMU_FW_CFG_LIB_
+#define QEMU_FW_CFG_LIB_
+
+#include 
+
+typedef enum {
+  EfiAcpiAddressRangeMemory   = 1,
+  EfiAcpiAddressRangeReserved = 2,
+  EfiAcpiAddressRangeACPI = 3,
+  EfiAcpiAddressRangeNVS  = 4
+} EFI_ACPI_MEMORY_TYPE;
+
+typedef struct {
+  UINT64  BaseAddr;
+  UINT64  Length;
+  UINT32  Type;
+  UINT32  Reserved;
+} LOONGARCH_MEMMAP_ENTRY;
+
+/**
+  Returns a boolean indicating if the firmware configuration interface
+  is available or not.
+
+  This function may change fw_cfg state.
+
+  @retvalTRUE   The interface is available
+  @retvalFALSE  The interface is not available
+**/
+BOOLEAN
+EFIAPI
+QemuFwCfgIsAvailable (
+  VOID
+  );
+
+/**
+  Selects a firmware configuration item for reading.
+
+  Following this call, any data read from this item will start from
+  the beginning of the configuration item's data.
+
+  @param[in] QemuFwCfgItem - Firmware Configuration item to read
+**/
+VOID
+EFIAPI
+QemuFwCfgSelectItem (
+  IN FIRMWARE_CONFIG_ITEM   QemuFwCfgItem
+  );
+
+/**
+  Reads firmware configuration bytes into a buffer
+
+  If called multiple times, then the data read will
+  continue at the offset of the firmware configuration
+  item where the previous read ended.
+
+  @param[in] Size - Size in bytes to read
+  @param[in] Buffer - Buffer to store data into
+**/
+VOID
+EFIAPI
+QemuFwCfgReadBytes (
+  IN UINTN  Size,
+  IN VOID   *Buffer  OPTIONAL
+  );
+
+/**
+  Writes firmware configuration bytes from a buffer
+
+  If called multiple times, then the data written will
+  continue at the offset of the firmware configuration
+  item where the previous write ended.
+
+  @param[in] Size - Size in bytes to write
+  @param[in] Buffer - Buffer to read data from
+**/
+VOID
+EFIAPI
+QemuFwCfgWriteBytes (
+  IN UINTN  Size,
+  IN VOID   *Buffer
+  );
+
+/**
+  Skip bytes in the firmware configuration item.
+
+  Increase the offset of the firmware configuration item without transferring
+  bytes between the item and a caller-provided buffer. Subsequent read, write
+  or skip operations will commence at the increased offset.
+
+  @param[in] Size  Number of bytes to skip.
+**/
+VOID
+EFIAPI
+QemuFwCfgSkipBytes (
+  IN UINTN  Size
+  );
+
+/**
+  Reads a UINT8 firmware configuration value
+
+  @retvalValue of Firmware Configuration item read
+**/
+UINT8
+EFIAPI
+QemuFwCfgRead8 (
+  VOID
+  );
+
+/**
+  Reads a UINT16 firmware configuration value
+
+  @retvalValue of Firmware Configuration item read
+**/
+UINT16
+EFIAPI
+QemuFwCfgRead16 (
+  VOID
+  );
+
+/**
+  Reads a UINT32 firmware configuration value
+
+  @retvalValue of Firmware Configuration item read
+**/
+UINT32
+EFIAPI
+QemuFwCfgRead32 (
+  VOID
+  );
+
+/**
+  Reads a UINT64 firmware configuration value
+
+  @retvalValue of Firmware Configuration item read
+**/
+UINT64
+EFIAPI
+QemuFwCfgRead64 (
+  VOID
+  );
+
+/**
+  Find the configuration item corresponding to the firmware configuration file.
+
+  @param[in]  Name - Name of file to look up.
+  @param[out] Item - Configuration item corresponding to the file, to be passed
+ to QemuFwCfgSelectItem ().
+  @param[out]

[edk2-devel] [edk2-platforms][PATCH V5 00/15] Platform: Add Loongson support.

[xianglai]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

The uploaded code generates firmware to support Linux launching on the 
LoongArch platform under qemu,
So it will run in a virtual machine.

LoongArch is the general processor architecture of Loongson.
You can get the latest LoongArch documents or LoongArch tools at 
https://github.com/loongson/.

You can also view the code through the Loongson community.
The edk2 code in Loongson community:
https://github.com/loongson/edk2/tree/LoongArch
The edk2-platform code in Loonson community:
https://github.com/loongson/edk2-platforms
The qemu code in Loongson community:
https://gitlab.com/qemu-project/qemu.git
The LoongArch Documentation in Loongson community:
https://github.com/loongson/LoongArch-Documentation/tree/main/docs
The all patches at:
https://github.com/loongson/edk2-platforms/tree/devel-LoongArch-patch

v2 changes:
 - Remove the inline assembly from StableTimerLib.
 - troubleshoot TAB strings, convert TAB characters to spaces.
 - remove smm related code, loongarch has no smm mode.

v3 changes:
 - delete ExtractHandler related code.
 - Boot UEFI with low 256M memory.
 - Modify common interrupt handling.

v4 changes:
 - Remove qemu flash related code.
 - Modify fdt base address.

v5 changes:
 - Add Udf driver support.
 - Split readme file into a separate patch.
 - Modify the code style
   - delete extra blank lines
   - use the assembly function definition macros in MdePkg
   - sort out the PCD variable Token value.

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 

xianglai li (15):
  Platform/Loongson: Add Serial Port library
  Platform/Loongson: Support SEC
  Platform/Loongson: Add PeiServicesTablePointerLib.
  Platform/Loongson: Add QemuFwCfgLib.
  Platform/Loongson: Add MmuLib.
  Platform/Loongson: Add StableTimerLib.
  Platform/Loongson: Support PEI phase.
  Platform/Loongson: Add CPU DXE driver.
  Platform/Loongson: Add PciCpuIoDxe driver.
  Platform/Loongson:  Add timer Dxe driver.
  Platform/Loongson: Add RealTime Clock lib.
  Platform/Loongson: Add Platform Boot Manager Lib.
  Platform/Loongson: Add Reset System Lib.
  Platform/Loongson: Support Dxe
  Platform/Loongson: Add Readme.

 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.c  | 367 
 .../LoongArchQemuPkg/Drivers/CpuDxe/CpuDxe.h  | 199 +
 .../Drivers/CpuDxe/CpuDxe.inf |  59 ++
 .../Drivers/CpuDxe/LoongArch64/Exception.c| 335 +++
 .../Drivers/CpuDxe/LoongArch64/Fpu.S  |  97 ++
 .../Drivers/CpuDxe/LoongArch64/LoongArch.S| 321 +++
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.c   | 538 
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.h   | 207 +
 .../Drivers/PciCpuIo2Dxe/PciCpuIo2Dxe.inf |  44 +
 .../Drivers/StableTimerDxe/Timer.c| 388 
 .../Drivers/StableTimerDxe/Timer.h| 172 
 .../Drivers/StableTimerDxe/TimerConfig.S  |  38 +
 .../Drivers/StableTimerDxe/TimerDxe.inf   |  44 +
 .../LoongArchQemuPkg/Include/Library/Cpu.h| 237 +
 .../LoongArchQemuPkg/Include/Library/MmuLib.h |  85 ++
 .../Include/Library/QemuFwCfgLib.h| 174 
 .../Include/Library/StableTimer.h |  59 ++
 .../Include/LoongArchQemuPlatform.h   |  95 ++
 .../LsRealTimeClockLib/LsRealTimeClock.h  |  40 +
 .../LsRealTimeClockLib/LsRealTimeClockLib.c   | 335 +++
 .../LsRealTimeClockLib/LsRealTimeClockLib.inf |  44 +
 .../LoongArchQemuPkg/Library/MmuLib/Mmu.S | 155 
 .../Library/MmuLib/MmuBaseLib.inf |  40 +
 .../Library/MmuLib/MmuBaseLibPei.inf  |  47 +
 .../Library/MmuLib/MmuLibCore.c   | 831 ++
 .../Library/MmuLib/MmuLibCore.h   |  40 +
 .../Library/MmuLib/MmuLibCorePei.c| 231 +
 .../LoongArchQemuPkg/Library/MmuLib/mmu.h | 190 
 .../LoongArchQemuPkg/Library/MmuLib/page.h| 280 ++
 .../LoongArchQemuPkg/Library/MmuLib/pte.h |  57 ++
 .../PeiServicesTablePointer.c |  79 ++
 .../PeiServicesTablePointer.h |  39 +
 .../PeiServicesTablePointerLib.S  |  40 +
 .../PeiServicesTablePointerLib.inf|  32 +
 .../PlatformBootManagerLib/PlatformBm.c   | 742 
 .../PlatformBootManagerLib/PlatformBm.h   | 112 +++
 .../PlatformBootManagerLib.inf|  75 ++
 .../PlatformBootManagerLib/QemuKernel.c   |  81 ++
 .../QemuFwCfgLib/QemuFwCfgLibInternal.h   |  63 ++
 .../Library/QemuFwCfgLib/QemuFwCfgPei.c   | 117 +++
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.c| 463 ++
 .../Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf  |  46 +
 .../BaseResetSystemAcpiGed.c  | 146 +++
 .../BaseResetSystemAcpiGedLib.inf |  37 +
 .../DxeResetSystemAcpiGed.c   | 257 ++
 .../DxeResetSystemAcpiGedLib.inf  |  41 +
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.c   | 128 +++
 .../ResetSystemAcpiLib/ResetSystemAcpiGed.h   |  

[edk2-devel] [edk2-platforms][PATCH V5 03/15] Platform/Loongson: Add PeiServicesTablePointerLib.

[xianglai]

Use a register to save PeiServicesTable pointer,
This lib Provides PeiServicesTable pointer saving
and retrieval services.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4054

Cc: Bibo Mao 
Cc: Chao Li 
Cc: Leif Lindholm 
Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: xianglai li 
---
 .../PeiServicesTablePointer.c | 79 +++
 .../PeiServicesTablePointer.h | 39 +
 .../PeiServicesTablePointerLib.S  | 40 ++
 .../PeiServicesTablePointerLib.inf| 32 
 4 files changed, 190 insertions(+)
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S
 create mode 100644 
Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf

diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
new file mode 100644
index 00..204def3bde
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
@@ -0,0 +1,79 @@
+/** @file
+  PEI Services Table Pointer Library.
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include "Library/Cpu.h"
+#include "PeiServicesTablePointer.h"
+
+/**
+  Caches a pointer PEI Services Table.
+
+  Caches the pointer to the PEI Services Table specified by 
PeiServicesTablePointer
+  in a platform specific manner.
+
+  If PeiServicesTablePointer is NULL, then ASSERT ().
+
+  @paramPeiServicesTablePointer   The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+  IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer
+  )
+{
+  LoongarchWriteqKs0 ((UINTN)PeiServicesTablePointer);
+}
+
+/**
+  Retrieves the cached value of the PEI Services Table pointer.
+
+  Returns the cached value of the PEI Services Table pointer in a CPU specific 
manner
+  as specified in the CPU binding section of the Platform Initialization 
Pre-EFI
+  Initialization Core Interface Specification.
+
+  If the cached PEI Services Table pointer is NULL, then ASSERT ().
+
+  @return  The pointer to PeiServices.
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+  VOID
+  )
+{
+  UINTN  val;
+
+  LoongarchReadqKs0 (&val);
+
+  return (CONST EFI_PEI_SERVICES **)val;
+}
+
+/**
+Perform CPU specific actions required to migrate the PEI Services Table
+pointer from temporary RAM to permanent RAM.
+
+For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+a dedicated CPU register.  This means that there is no memory storage
+associated with storing the PEI Services Table pointer, so no additional
+migration actions are required for Itanium or ARM CPUs.
+*/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+VOID
+)
+{
+  return;
+}
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
new file mode 100644
index 00..5bcbc810d0
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.h
@@ -0,0 +1,39 @@
+/** @file
+  PeiServicesTablePointer
+
+  Copyright (c) 2022 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef PEISERVICESTABLEPOINTER_H_
+#define PEISERVICESTABLEPOINTER_H_
+
+/**
+  Write Csr KS0 register.
+
+ @param A0 The value used to write to the KS0 register
+
+  @retval none
+**/
+extern
+VOID
+LoongarchWriteqKs0 (
+  IN UINT64  Val
+  );
+
+/**
+  Read Csr KS0 register.
+
+ @param  Val Pointer to the variable used to store the KS0 register value
+
+  @retval none
+**/
+extern
+VOID
+LoongarchReadqKs0 (
+  IN UINT64  *Val
+  );
+
+#endif // PEISERVICESTABLEPOINTER_H_
diff --git 
a/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S
 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.S
new file mode 100644
index 00..7c6170c5d6
--- /dev/null
+++ 
b/Platform/Loongson/LoongArchQemuPkg/Library/PeiServicesTablePointerLib/Pe

Re: [edk2-devel] [PATCH 0/3] OVMF: support EFI_RNG_PROTOCOL without virtio-rng

[Gerd Hoffmann]

On Thu, Nov 10, 2022 at 02:47:35PM +0100, Ard Biesheuvel wrote:
> Currently, we only expose EFI_RNG_PROTOCOL when running under QEMU if it
> exposes a virtio-rng device. This means that generic EFI apps or
> loaders have no access to an entropy source if this device is
> unavailable, unless they implement their own arch-specific handling to
> figure out whether any CPU instructions or monitor calls can be used
> instead.
> 
> So let's wire those up as EFI_RNG_PROTOCOL implementations as well,
> using the existing drivers and libraries.
> 
> First patch is a bugfix - Liming, mind if I merge that right away?
> Thanks.
> 
> Cc: Liming Gao 
> Cc: Rebecca Cran 
> Cc: Pierre Gondois 
> Cc: Leif Lindholm 
> Cc: Sami Mujawar 
> Cc: Gerd Hoffmann 
> Cc: Jason A. Donenfeld 
> 
> Ard Biesheuvel (3):
>   ArmPkg/ArmTrngLib: Fix incorrect GUID reference in DEBUG() output
>   ArmVirtPkg/ArmVirtQemu: Expose TRNG hypercall via RngDxe if
> implemented
>   OvmfPkg/OvmfX86: Enable RDRAND based EFI_RNG_PROTOCOL implementation

Series looks good to me (not tested though).

Acked-by: Gerd Hoffmann 

take care,
  Gerd



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