date:20230615

Re: [edk2-devel] [PATCH] Maintainers.txt: update maintainer for CryptoPkg

2023-06-15 Thread Li, Yi

Reviewed-by: Yi Li 

-Original Message-
From: Wang, Jian J  
Sent: Friday, June 16, 2023 12:09 PM
To: devel@edk2.groups.io
Cc: Yao, Jiewen ; Li, Yi1 ; Lu, Xiaoyu1 
; Jiang, Guomin 
Subject: [PATCH] Maintainers.txt: update maintainer for CryptoPkg

Cc: Jiewen Yao  [jyao1]
Cc: Yi Li  [liyi77]
Cc: Xiaoyu Lu  [xiaoyuxlu]
Cc: Guomin Jiang  [guominjia]
Signed-off-by: Jian J Wang 
---
 Maintainers.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Maintainers.txt b/Maintainers.txt index 42e40dced3..c645df397c 
100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -178,7 +178,7 @@ CryptoPkg
 F: CryptoPkg/ W: 
https://github.com/tianocore/tianocore.github.io/wiki/CryptoPkg M: Jiewen Yao 
 [jyao1]-M: Jian J Wang  
[jwang36]+M: Yi Li  [liyi77] R: Xiaoyu Lu 
 [xiaoyuxlu] R: Guomin Jiang  
[guominjia] --
2.39.1.windows.1



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[edk2-devel] [PATCH] Maintainers.txt: update maintainer for CryptoPkg

2023-06-15 Thread Wang, Jian J

Cc: Jiewen Yao  [jyao1]
Cc: Yi Li  [liyi77]
Cc: Xiaoyu Lu  [xiaoyuxlu]
Cc: Guomin Jiang  [guominjia]
Signed-off-by: Jian J Wang 
---
 Maintainers.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Maintainers.txt b/Maintainers.txt
index 42e40dced3..c645df397c 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -178,7 +178,7 @@ CryptoPkg
 F: CryptoPkg/
 W: https://github.com/tianocore/tianocore.github.io/wiki/CryptoPkg
 M: Jiewen Yao  [jyao1]
-M: Jian J Wang  [jwang36]
+M: Yi Li  [liyi77]
 R: Xiaoyu Lu  [xiaoyuxlu]
 R: Guomin Jiang  [guominjia]
 
-- 
2.39.1.windows.1



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Re: [edk2-devel] [PATCH V3 8/8] MdeModulePkg/SmmCore: Perf-log PlatformHookBefore/AfterSmmDispatch

2023-06-15 Thread Wang, Jian J



Reviewed-by: Jian J Wang 

Regards,
Jian



> -Original Message-
> From: Ni, Ray 
> Sent: Tuesday, June 13, 2023 2:13 PM
> To: devel@edk2.groups.io
> Cc: Wang, Jian J ; Gao, Liming
> ; Wu, Jiaxin 
> Subject: [PATCH V3 8/8] MdeModulePkg/SmmCore: Perf-log
> PlatformHookBefore/AfterSmmDispatch
> 
> Signed-off-by: Ray Ni 
> Cc: Jian J Wang 
> Cc: Liming Gao 
> Cc: Jiaxin Wu 
> ---
>  MdeModulePkg/Core/PiSmmCore/PiSmmCore.c | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
> b/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
> index 68af9ab81b..a8537829e3 100644
> --- a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
> +++ b/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
> @@ -692,7 +692,9 @@ SmmEntryPoint (
>//
> 
>// Call platform hook before Smm Dispatch
> 
>//
> 
> +  PERF_START (NULL, "PlatformHookBeforeSmmDispatch", NULL, 0, 0);
> 
>PlatformHookBeforeSmmDispatch ();
> 
> +  PERF_END (NULL, "PlatformHookBeforeSmmDispatch", NULL, 0);
> 
> 
> 
>//
> 
>// Call memory management hook function
> 
> @@ -769,7 +771,9 @@ SmmEntryPoint (
>//
> 
>// Call platform hook after Smm Dispatch
> 
>//
> 
> +  PERF_START (NULL, "PlatformHookAfterSmmDispatch", NULL, 0, 0);
> 
>PlatformHookAfterSmmDispatch ();
> 
> +  PERF_END (NULL, "PlatformHookAfterSmmDispatch", NULL, 0)
> 
> 
> 
>//
> 
>// If a legacy boot has occurred, then make sure gSmmCorePrivate is not
> accessed
> 
> --
> 2.39.1.windows.1



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Re: [edk2-devel] [PATCH V3 6/8] MdeModulePkg/SmmCorePerformanceLib: Disable perf-logging at runtime

2023-06-15 Thread Wang, Jian J



Reviewed-by: Jian J Wang 

Regards,
Jian



> -Original Message-
> From: Ni, Ray 
> Sent: Tuesday, June 13, 2023 2:13 PM
> To: devel@edk2.groups.io
> Cc: Wu, Jiaxin ; Bi, Dandan ; Gao,
> Liming ; Wang, Jian J ;
> Dong, Eric 
> Subject: [PATCH V3 6/8] MdeModulePkg/SmmCorePerformanceLib: Disable
> perf-logging at runtime
> 
> Because SMM perf-logging is migrated to non-SMRAM at ReadyToBoot
> by DxeCorePerformanceLib, the perf-logging after ExitBS is useless and
> impact the SMI latency at runtime.
> Hence the SmmCorePerformanceLib is updated to disable perf-logging
> after ExitBS.
> 
> Cc: Jiaxin Wu 
> Cc: Dandan Bi 
> Cc: Liming Gao 
> Cc: Jian J Wang 
> Reviewed-by: Jiaxin Wu 
> Reviewed-by: Eric Dong 
> ---
>  .../SmmCorePerformanceLib.c   | 48 ++-
>  .../SmmCorePerformanceLib.inf |  3 +-
>  2 files changed, 48 insertions(+), 3 deletions(-)
> 
> diff --git
> a/MdeModulePkg/Library/SmmCorePerformanceLib/SmmCorePerformanceLib.
> c
> b/MdeModulePkg/Library/SmmCorePerformanceLib/SmmCorePerformanceLib.
> c
> index 3efe56e056..c566a298dd 100644
> ---
> a/MdeModulePkg/Library/SmmCorePerformanceLib/SmmCorePerformanceLib.
> c
> +++
> b/MdeModulePkg/Library/SmmCorePerformanceLib/SmmCorePerformanceLib.
> c
> @@ -16,7 +16,7 @@
> 
> 
>   SmmPerformanceHandlerEx(), SmmPerformanceHandler() will receive
> untrusted input and do basic validation.
> 
> 
> 
> -Copyright (c) 2011 - 2021, Intel Corporation. All rights reserved.
> 
> +Copyright (c) 2011 - 2023, Intel Corporation. All rights reserved.
> 
>  SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> 
> 
>  **/
> 
> @@ -48,6 +48,7 @@ SPIN_LOCK mSmmFpdtLock;
>  PERFORMANCE_PROPERTY  mPerformanceProperty;
> 
>  UINT32mCachedLength   = 0;
> 
>  UINT32mBootRecordSize = 0;
> 
> +BOOLEAN   mPerformanceMeasurementEnabled;
> 
> 
> 
>  //
> 
>  // Interfaces for SMM PerformanceMeasurement Protocol.
> 
> @@ -929,6 +930,36 @@ FpdtSmiHandler (
>return EFI_SUCCESS;
> 
>  }
> 
> 
> 
> +/**
> 
> +  This is the Event call back function is triggered in SMM to notify the 
> Library
> 
> +  the system is entering runtime phase.
> 
> +
> 
> +  @param[in] Protocol   Points to the protocol's unique identifier
> 
> +  @param[in] Interface  Points to the interface instance
> 
> +  @param[in] Handle The handle on which the interface was installed
> 
> +
> 
> +  @retval EFI_SUCCESS SmmAtRuntimeCallBack runs successfully
> 
> + **/
> 
> +EFI_STATUS
> 
> +EFIAPI
> 
> +SmmCorePerformanceLibExitBootServicesCallback (
> 
> +  IN CONST EFI_GUID  *Protocol,
> 
> +  IN VOID*Interface,
> 
> +  IN EFI_HANDLE  Handle
> 
> +  )
> 
> +{
> 
> +  //
> 
> +  // Disable performance measurement after ExitBootServices because
> 
> +  // 1. Performance measurement might impact SMI latency at runtime;
> 
> +  // 2. Performance log is copied to non SMRAM at ReadyToBoot so runtime
> performance
> 
> +  //log is not useful.
> 
> +  //
> 
> +  mPerformanceMeasurementEnabled = FALSE;
> 
> +
> 
> +  return EFI_SUCCESS;
> 
> +}
> 
> +
> 
> +
> 
>  /**
> 
>SmmBase2 protocol notify callback function, when SMST and SMM memory
> service get initialized
> 
>this function is callbacked to initialize the Smm Performance Lib
> 
> @@ -948,6 +979,7 @@ InitializeSmmCorePerformanceLib (
>EFI_HANDLESmiHandle;
> 
>EFI_STATUSStatus;
> 
>PERFORMANCE_PROPERTY  *PerformanceProperty;
> 
> +  VOID  *Registration;
> 
> 
> 
>//
> 
>// Initialize spin lock
> 
> @@ -987,6 +1019,16 @@ InitializeSmmCorePerformanceLib (
>  Status = gBS->InstallConfigurationTable (&gPerformanceProtocolGuid,
> &mPerformanceProperty);
> 
>  ASSERT_EFI_ERROR (Status);
> 
>}
> 
> +
> 
> +  //
> 
> +  // Register callback function for ExitBootServices event.
> 
> +  //
> 
> +  Status = gSmst->SmmRegisterProtocolNotify (
> 
> +&gEdkiiSmmExitBootServicesProtocolGuid,
> 
> +SmmCorePerformanceLibExitBootServicesCallback,
> 
> +&Registration
> 
> +);
> 
> +  ASSERT_EFI_ERROR (Status);
> 
>  }
> 
> 
> 
>  /**
> 
> @@ -1011,6 +1053,8 @@ SmmCorePerformanceLibConstructor (
>EFI_EVENT   Event;
> 
>VOID*Registration;
> 
> 
> 
> +  mPerformanceMeasurementEnabled =  (BOOLEAN)((PcdGet8
> (PcdPerformanceLibraryPropertyMask) &
> PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED) != 0);
> 
> +
> 
>if (!PerformanceMeasurementEnabled ()) {
> 
>  //
> 
>  // Do not initialize performance infrastructure if not required.
> 
> @@ -1383,7 +1427,7 @@ PerformanceMeasurementEnabled (
>VOID
> 
>)
> 
>  {
> 
> -  return (BOOLEAN)((PcdGet8 (PcdPerformanceLibraryPropertyMask) &
> PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED) != 0);
> 
> +  return mPerformanceMeasurementEnabled;
> 
>  }
> 
> 
> 
>  /**
> 
> diff --git
> a/MdeModulePkg/Library/SmmCorePerformanceLib/SmmCor

Re: [edk2-devel] [PATCH V3 5/8] MdeModulePkg/SmmPerformanceLib: Disable perf-logging after ExitBS

2023-06-15 Thread Wang, Jian J

Reviewed-by: Jian J Wang 

Regards,
Jian



> -Original Message-
> From: Ni, Ray 
> Sent: Tuesday, June 13, 2023 2:13 PM
> To: devel@edk2.groups.io
> Cc: Wu, Jiaxin ; Bi, Dandan ; Gao,
> Liming ; Wang, Jian J ;
> Dong, Eric 
> Subject: [PATCH V3 5/8] MdeModulePkg/SmmPerformanceLib: Disable perf-
> logging after ExitBS
> 
> Because SMM perf-logging is migrated to non-SMRAM at ReadyToBoot
> by DxeCorePerformanceLib, the perf-logging after ExitBS is useless and
> impact the SMI latency at runtime.
> Hence the SmmPerformanceLib is updated to disable perf-logging
> after ExitBS.
> 
> Cc: Jiaxin Wu 
> Cc: Dandan Bi 
> Cc: Liming Gao 
> Cc: Jian J Wang 
> Reviewed-by: Jiaxin Wu 
> Reviewed-by: Eric Dong 
> ---
>  .../SmmPerformanceLib/SmmPerformanceLib.c | 63 ++-
>  .../SmmPerformanceLib/SmmPerformanceLib.inf   |  4 ++
>  2 files changed, 66 insertions(+), 1 deletion(-)
> 
> diff --git a/MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.c
> b/MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.c
> index 623f8a978c..b9c33c0f64 100644
> --- a/MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.c
> +++ b/MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.c
> @@ -23,6 +23,36 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>  // The cached SMM Performance Protocol and SMM PerformanceEx Protocol
> interface.
> 
>  EDKII_PERFORMANCE_MEASUREMENT_PROTOCOL
> *mPerformanceMeasurement = NULL;
> 
>  BOOLEAN mPerformanceMeasurementEnabled;
> 
> +VOID
> *mPerformanceLibExitBootServicesRegistration;
> 
> +
> 
> +/**
> 
> +  This is the Event call back function is triggered in SMM to notify the 
> Library
> 
> +  the system is entering runtime phase.
> 
> +
> 
> +  @param[in] Protocol   Points to the protocol's unique identifier
> 
> +  @param[in] Interface  Points to the interface instance
> 
> +  @param[in] Handle The handle on which the interface was installed
> 
> +
> 
> +  @retval EFI_SUCCESS SmmAtRuntimeCallBack runs successfully
> 
> + **/
> 
> +EFI_STATUS
> 
> +EFIAPI
> 
> +SmmPerformanceLibExitBootServicesCallback (
> 
> +  IN CONST EFI_GUID  *Protocol,
> 
> +  IN VOID*Interface,
> 
> +  IN EFI_HANDLE  Handle
> 
> +  )
> 
> +{
> 
> +  //
> 
> +  // Disable performance measurement after ExitBootServices because
> 
> +  // 1. Performance measurement might impact SMI latency at runtime;
> 
> +  // 2. Performance log is copied to non SMRAM at ReadyToBoot so runtime
> performance
> 
> +  //log is not useful.
> 
> +  //
> 
> +  mPerformanceMeasurementEnabled = FALSE;
> 
> +
> 
> +  return EFI_SUCCESS;
> 
> +}
> 
> 
> 
>  /**
> 
>The constructor function initializes the Performance Measurement Enable 
> flag
> 
> @@ -40,9 +70,40 @@ SmmPerformanceLibConstructor (
>IN EFI_SYSTEM_TABLE  *SystemTable
> 
>)
> 
>  {
> 
> +  EFI_STATUS  Status;
> 
> +
> 
>mPerformanceMeasurementEnabled =  (BOOLEAN)((PcdGet8
> (PcdPerformanceLibraryPropertyMask) &
> PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED) != 0);
> 
> 
> 
> -  return EFI_SUCCESS;
> 
> +  Status = gSmst->SmmRegisterProtocolNotify (
> 
> +&gEdkiiSmmExitBootServicesProtocolGuid,
> 
> +SmmPerformanceLibExitBootServicesCallback,
> 
> +&mPerformanceLibExitBootServicesRegistration
> 
> +);
> 
> +  ASSERT_EFI_ERROR (Status);
> 
> +
> 
> +  return Status;
> 
> +}
> 
> +
> 
> +EFI_STATUS
> 
> +EFIAPI
> 
> +SmmPerformanceLibDestructor (
> 
> +  IN EFI_HANDLEImageHandle,
> 
> +  IN EFI_SYSTEM_TABLE  *SystemTable
> 
> +  )
> 
> +{
> 
> +  EFI_STATUS  Status;
> 
> +
> 
> +  //
> 
> +  // Unregister SmmExitBootServices notification.
> 
> +  //
> 
> +  Status = gSmst->SmmRegisterProtocolNotify (
> 
> +&gEdkiiSmmExitBootServicesProtocolGuid,
> 
> +NULL,
> 
> +&mPerformanceLibExitBootServicesRegistration
> 
> +);
> 
> +  ASSERT_EFI_ERROR (Status);
> 
> +
> 
> +  return Status;
> 
>  }
> 
> 
> 
>  /**
> 
> diff --git
> a/MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.inf
> b/MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.inf
> index d79cd5c8da..002462f5ca 100644
> --- a/MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.inf
> +++ b/MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.inf
> @@ -21,6 +21,7 @@
>LIBRARY_CLASS  = PerformanceLib|DXE_SMM_DRIVER
> 
> 
> 
>CONSTRUCTOR= SmmPerformanceLibConstructor
> 
> +  DESTRUCTOR = SmmPerformanceLibDestructor
> 
> 
> 
>  #
> 
>  # The following information is for reference only and not required by the 
> build
> tools.
> 
> @@ -46,5 +47,8 @@
>  [Guids]
> 
>gEdkiiSmmPerformanceMeasurementProtocolGuid  ##
> SOMETIMES_CONSUMES   ## UNDEFINED # Locate protocol
> 
> 
> 
> +[Protocols]
> 
> +  gEdkiiSmmExitBootServicesProtocolGuid

Re: [edk2-devel] [PATCH V3 4/8] MdeModulePkg/SmmCore: Add perf-logging for SmmDriverDispatchHandler

2023-06-15 Thread Wang, Jian J



Reviewed-by: Jian J Wang 

Regards,
Jian



> -Original Message-
> From: Ni, Ray 
> Sent: Tuesday, June 13, 2023 2:13 PM
> To: devel@edk2.groups.io
> Cc: Wang, Jian J ; Gao, Liming
> ; Wu, Jiaxin ; Dong, Eric
> 
> Subject: [PATCH V3 4/8] MdeModulePkg/SmmCore: Add perf-logging for
> SmmDriverDispatchHandler
> 
> SmmDriverDispatchHandler is the routine that dispatches SMM drivers
> from FV. It's a time-consuming routine.
> Add perf-logging for this routine.
> 
> Signed-off-by: Ray Ni 
> Cc: Jian J Wang 
> Cc: Liming Gao 
> Cc: Jiaxin Wu 
> Reviewed-by: Jiaxin Wu 
> Reviewed-by: Eric Dong 
> ---
>  MdeModulePkg/Core/PiSmmCore/Dispatcher.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/MdeModulePkg/Core/PiSmmCore/Dispatcher.c
> b/MdeModulePkg/Core/PiSmmCore/Dispatcher.c
> index f635565dd1..bb789e5890 100644
> --- a/MdeModulePkg/Core/PiSmmCore/Dispatcher.c
> +++ b/MdeModulePkg/Core/PiSmmCore/Dispatcher.c
> @@ -28,7 +28,7 @@
>Depex - Dependency Expression.
> 
> 
> 
>Copyright (c) 2014, Hewlett-Packard Development Company, L.P.
> 
> -  Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.
> 
> +  Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.
> 
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> 
> 
>  **/
> 
> @@ -1322,6 +1322,8 @@ SmmDriverDispatchHandler (
>  return EFI_NOT_FOUND;
> 
>}
> 
> 
> 
> +  PERF_CALLBACK_BEGIN (&gEfiEventDxeDispatchGuid);
> 
> +
> 
>for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
> 
>  FvHandle = HandleBuffer[HandleIndex];
> 
> 
> 
> @@ -1511,6 +1513,7 @@ SmmDriverDispatchHandler (
>  }
> 
>}
> 
> 
> 
> +  PERF_CALLBACK_END (&gEfiEventDxeDispatchGuid);
> 
>return EFI_SUCCESS;
> 
>  }
> 
> 
> 
> --
> 2.39.1.windows.1



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Re: [edk2-devel] [PATCH V3 3/8] MdeModulePkg/SmmCore: Add perf-logging for time-consuming procedures

2023-06-15 Thread Wang, Jian J



Reviewed-by: Jian J Wang 

Regards,
Jian



> -Original Message-
> From: Ni, Ray 
> Sent: Tuesday, June 13, 2023 2:13 PM
> To: devel@edk2.groups.io
> Cc: Wang, Jian J ; Gao, Liming
> ; Wu, Jiaxin ; Dong, Eric
> 
> Subject: [PATCH V3 3/8] MdeModulePkg/SmmCore: Add perf-logging for time-
> consuming procedures
> 
> Following procedures are perf-logged:
> * SmmReadyToBootHandler
> * SmmReadyToLockHandler
> * SmmEndOfDxeHandler
> * SmmEntryPoint
>   (It's the main routine run in BSP when SMI happens.)
> * SmiManage
> 
> Cc: Jian J Wang 
> Cc: Liming Gao 
> Cc: Jiaxin Wu 
> Reviewed-by: Jiaxin Wu 
> Reviewed-by: Eric Dong 
> ---
>  MdeModulePkg/Core/PiSmmCore/PiSmmCore.c | 15 ++-
>  MdeModulePkg/Core/PiSmmCore/Smi.c   |  6 ++
>  2 files changed, 20 insertions(+), 1 deletion(-)
> 
> diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
> b/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
> index 875c7c0258..68af9ab81b 100644
> --- a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
> +++ b/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c
> @@ -1,7 +1,7 @@
>  /** @file
> 
>SMM Core Main Entry Point
> 
> 
> 
> -  Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.
> 
> +  Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.
> 
>SPDX-License-Identifier: BSD-2-Clause-Patent
> 
> 
> 
>  **/
> 
> @@ -305,6 +305,8 @@ SmmReadyToBootHandler (
>EFI_STATUS  Status;
> 
>EFI_HANDLE  SmmHandle;
> 
> 
> 
> +  PERF_CALLBACK_BEGIN (&gEfiEventReadyToBootGuid);
> 
> +
> 
>//
> 
>// Install SMM Ready To Boot protocol.
> 
>//
> 
> @@ -318,6 +320,7 @@ SmmReadyToBootHandler (
> 
> 
>SmiHandlerUnRegister (DispatchHandle);
> 
> 
> 
> +  PERF_CALLBACK_END (&gEfiEventReadyToBootGuid);
> 
>return Status;
> 
>  }
> 
> 
> 
> @@ -352,6 +355,8 @@ SmmReadyToLockHandler (
>EFI_HANDLE  SmmHandle;
> 
>VOID*Interface;
> 
> 
> 
> +  PERF_CALLBACK_BEGIN (&gEfiDxeSmmReadyToLockProtocolGuid);
> 
> +
> 
>//
> 
>// Unregister SMI Handlers that are no required after the SMM driver 
> dispatch
> is stopped
> 
>//
> 
> @@ -408,6 +413,7 @@ SmmReadyToLockHandler (
> 
> 
>SmramProfileReadyToLock ();
> 
> 
> 
> +  PERF_CALLBACK_END (&gEfiDxeSmmReadyToLockProtocolGuid);
> 
>return Status;
> 
>  }
> 
> 
> 
> @@ -442,6 +448,8 @@ SmmEndOfDxeHandler (
> 
> 
>DEBUG ((DEBUG_INFO, "SmmEndOfDxeHandler\n"));
> 
> 
> 
> +  PERF_CALLBACK_BEGIN (&gEfiEndOfDxeEventGroupGuid);
> 
> +
> 
>//
> 
>// Install SMM EndOfDxe protocol
> 
>//
> 
> @@ -479,6 +487,7 @@ SmmEndOfDxeHandler (
>  }
> 
>}
> 
> 
> 
> +  PERF_CALLBACK_END (&gEfiEndOfDxeEventGroupGuid);
> 
>return EFI_SUCCESS;
> 
>  }
> 
> 
> 
> @@ -669,6 +678,8 @@ SmmEntryPoint (
>VOID*CommunicationBuffer;
> 
>UINTN   BufferSize;
> 
> 
> 
> +  PERF_FUNCTION_BEGIN ();
> 
> +
> 
>//
> 
>// Update SMST with contents of the SmmEntryContext structure
> 
>//
> 
> @@ -769,6 +780,8 @@ SmmEntryPoint (
>  //
> 
>  gSmmCorePrivate->InSmm = FALSE;
> 
>}
> 
> +
> 
> +  PERF_FUNCTION_END ();
> 
>  }
> 
> 
> 
>  /**
> 
> diff --git a/MdeModulePkg/Core/PiSmmCore/Smi.c
> b/MdeModulePkg/Core/PiSmmCore/Smi.c
> index 6d13969979..2985f989c3 100644
> --- a/MdeModulePkg/Core/PiSmmCore/Smi.c
> +++ b/MdeModulePkg/Core/PiSmmCore/Smi.c
> @@ -109,6 +109,8 @@ SmiManage (
>BOOLEAN  SuccessReturn;
> 
>EFI_STATUS   Status;
> 
> 
> 
> +  PERF_FUNCTION_BEGIN ();
> 
> +
> 
>Status= EFI_NOT_FOUND;
> 
>SuccessReturn = FALSE;
> 
>if (HandlerType == NULL) {
> 
> @@ -125,6 +127,7 @@ SmiManage (
>//
> 
>// There is no handler registered for this interrupt source
> 
>//
> 
> +  PERF_FUNCTION_END ();
> 
>return Status;
> 
>  }
> 
>}
> 
> @@ -148,6 +151,7 @@ SmiManage (
>  // no additional handlers will be processed and EFI_INTERRUPT_PENDING
> will be returned.
> 
>  //
> 
>  if (HandlerType != NULL) {
> 
> +  PERF_FUNCTION_END ();
> 
>return EFI_INTERRUPT_PENDING;
> 
>  }
> 
> 
> 
> @@ -160,6 +164,7 @@ SmiManage (
>  // additional handlers will be processed.
> 
>  //
> 
>  if (HandlerType != NULL) {
> 
> +  PERF_FUNCTION_END ();
> 
>return EFI_SUCCESS;
> 
>  }
> 
> 
> 
> @@ -194,6 +199,7 @@ SmiManage (
>  Status = EFI_SUCCESS;
> 
>}
> 
> 
> 
> +  PERF_FUNCTION_END ();
> 
>return Status;
> 
>  }
> 
> 
> 
> --
> 2.39.1.windows.1



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Re: [edk2-devel] [PATCH 3/3] UefiCpuPkg/ResetVector: Remove pre-built binaries

2023-06-15 Thread Dong, Eric

Reviewed-by: Eric Dong 

Thanks,
Eric
-Original Message-
From: Ni, Ray  
Sent: Thursday, June 15, 2023 6:51 PM
To: devel@edk2.groups.io
Cc: Dong, Eric ; Kumar, Rahul R ; 
Gerd Hoffmann 
Subject: [PATCH 3/3] UefiCpuPkg/ResetVector: Remove pre-built binaries

Because it's simpler for a platform to include the ResetVector source and 
having pre-built binaries add burdens of updating the pre-built binaries. This 
patch removes the pre-built binaries and the script that buids the pre-built 
binaries.

Signed-off-by: Ray Ni 
Cc: Eric Dong 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
---
 .../Vtf0/Bin/IA32/ResetVector.ia32.port80.raw | Bin 532 -> 0 bytes
 .../Vtf0/Bin/IA32/ResetVector.ia32.raw| Bin 500 -> 0 bytes
 .../Vtf0/Bin/IA32/ResetVector.ia32.serial.raw | Bin 900 -> 0 bytes
 .../ResetVector/Vtf0/Bin/ResetVector.inf  |  31 --
 .../ResetVector/Vtf0/Bin/ResetVector.uni  |  16 
 .../ResetVector/Vtf0/Bin/ResetVector1G.inf|  31 --
 .../ResetVector/Vtf0/Bin/ResetVectorExtra.uni |  12 ---
 .../PageTable1G/ResetVector.x64.port80.raw| Bin 12292 -> 0 bytes
 .../Bin/X64/PageTable1G/ResetVector.x64.raw   | Bin 12292 -> 0 bytes
 .../PageTable1G/ResetVector.x64.serial.raw| Bin 12292 -> 0 bytes
 .../PageTable2M/ResetVector.x64.port80.raw| Bin 28676 -> 0 bytes
 .../Bin/X64/PageTable2M/ResetVector.x64.raw   | Bin 28676 -> 0 bytes
 .../PageTable2M/ResetVector.x64.serial.raw| Bin 28676 -> 0 bytes
 UefiCpuPkg/ResetVector/Vtf0/Build.py  |  89 --
 .../Vtf0/Tools/FixupForRawSection.py  |  20 
 UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf  |   9 ++
 16 files changed, 9 insertions(+), 199 deletions(-)  delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.uni
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVectorExtra.uni
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.port80.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Build.py
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Tools/FixupForRawSection.py

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw 
b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
deleted file mode 100644
index 
a3601274c25dde665872ff375f1deadf1c838476..
GIT binary patch
literal 0
HcmV?d1

literal 532
zcmYk3L1+^}6hQxG?OGMxP=XCuO{oFvA!34x5(Ckq=%JWHDKR3&%U*@;4lLqfmnDa3
z%DNy3Djoz+o>n|`p_PoRky;N5Js1c|L|nU_OT82o$@oJN@(=(2nR&cF!+4(O*Tp(W`R7TpTmFm4ifa-;zC*vz4XttW
zq}0}nTrTTp>dYuOY`31v{#vMxZinN>X5&iA{wjokJ@1Uq(rY83f3nOGnJ7F{XGEc^
zd@axD+xj+9{H@3`dj3!J3w#sG<{Xwjw>n?7OgU*B!aQOW8fp7m--koX4wLm__Al=^
zY?o%Aovx9bx>P+cg?6!W34mnesY#x}LmFy!akfSd$Wy}(n^c!>D977;D8Mlg8>sUS
zM%JHY*m66|cf|=!l}5GTC_q`AVA|#!0!awU3V=G%^$U@u1;gOBUFLS(4fi9z>Se$~
z2tQ>Y`tp9@WdZJg*r|{I*L%>sSmAq{7b<*6qi=YE|Bg)&AL|JbKgC45A{vlk%hz|-
Oedp}VWx$=4LE;}o$@(e)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw 
b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
deleted file mode 100644
index 
6124f3f9a40e4e58cc672b54cbf5cc33360b3858..
GIT binary patch
literal 0
HcmV?d1

literal 500
zcmbO*VZsE%1G)?X3=Fmm3=IE^A{#3Nsty!~l*%?%h@7@P`lJPIy15`EBv@@}EGf-9QVcpB6tC}lR7)qCP9%hbE
zD4qM7bH{!l=sf!RU+2-6j*JWphPONKb-qaJjx}JsQDps^*`dg+^+1VH^8xlEU6mhQ
z5#rwtE0nzI_7G`&`2YWZ2F{ZucNq_sFcn>Is1RZ#o8d#>?cFW^_0sqm#nW~uGcY*tD;-FCl?{{>VA$cn#=yX@^dM~q2SeYD
zz5{&^`d;*1c8TLB`yyn{P81R}kt@Frh
trq@4TcfR!a_y7OPT|lDq!T)CvW8mcL%Md2W%&-tQh6xj1?}1AK82|{?Cv

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw 
b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
deleted file mode 100644
index 
48b46e3473e77a1179bf818a1f1deafb7e46cf3e..
GIT binary patch
literal 0
HcmV?d1

literal 900
zcmbO*VZwx6znM3*zuWbbc>}|{T|byNFuntcu)lk$%4~Q*mqCDm!Ipu6;eSzNV}(G~
zf#Q%-*~SWy)3&F4OGO$hB=+XZO)KSYtdQw^ZZfNs>9q<_RmIbup3
zs%DyYCYEjns%kx~d%1K~bA<{+>5|UF%n=Hub6y9;GyisKLn%SYqvh_fT
zY4ZX0A_J8lT@m8n4l9(r>h=(6eE9$We+JHzC3hJQmM|4vZ>SJrF6DeV9T;A%2TIvG
zPrN>Ec%buG>$g%TREMRZIfSquOa9?Efe5dqFoK*_65o74!tz9ML_-C

Re: [edk2-devel] [PATCH v14 0/8] Adds AmdSmmCpuFeaturesLib and MmSaveStateLib

2023-06-15 Thread Ni, Ray

Gerd,
Can you kindly provide "Reviewed-by" for the patch series?

Thanks,
Ray

> -Original Message-
> From: Ni, Ray
> Sent: Tuesday, June 13, 2023 3:56 PM
> To: devel@edk2.groups.io; abdat...@amd.com
> Cc: Paul Grimes ; Abner Chang
> ; Dong, Eric ; Kumar, Rahul R
> ; Gerd Hoffmann ; Kinney,
> Michael D ; Gao, Liming
> ; Liu, Zhiguang ; Ard
> Biesheuvel ; Yao, Jiewen
> ; Justen, Jordan L 
> Subject: RE: [edk2-devel] [PATCH v14 0/8] Adds AmdSmmCpuFeaturesLib and
> MmSaveStateLib
> 
> Reviewed-by: Ray Ni 
> 
> > -Original Message-
> > From: devel@edk2.groups.io  On Behalf Of Abdul
> Lateef
> > Attar via groups.io
> > Sent: Tuesday, June 6, 2023 2:07 PM
> > To: devel@edk2.groups.io
> > Cc: Abdul Lateef Attar ; Paul Grimes
> > ; Abner Chang ; Dong,
> Eric
> > ; Ni, Ray ; Kumar, Rahul R
> > ; Gerd Hoffmann ; Kinney,
> > Michael D ; Gao, Liming
> > ; Liu, Zhiguang ; Ard
> > Biesheuvel ; Yao, Jiewen
> ;
> > Justen, Jordan L 
> > Subject: [edk2-devel] [PATCH v14 0/8] Adds AmdSmmCpuFeaturesLib and
> > MmSaveStateLib
> >
> > Backward-compatibility changes:
> >   This patch series removes the SmmCpuFeaturesReadSaveStateRegister
> >   and SmmCpuFeaturesWriteSaveStateRegister interface/function.
> >   SmmReadSaveState() and SmmWriteSaveState() now directly invokes
> > MmSaveStateLib
> >   routines to save/restore registers.
> >
> > PR: https://github.com/tianocore/edk2/pull/4519
> >
> > V14: Delta changes
> >   Added @note to the MmSaveStateLib.h.
> >   SaveState(Read/Write) of
> >
> EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID/EFI_MM_SAVE_STATE_REG
> IS
> > TER_PROCESSOR_ID
> >   is handled by PiSmmCpuDxeSmm driver.
> >   Fixed PatchCheck warnings.
> > V13: Delta changes
> >   Address review comments from Ray Ni
> >   Changed the BASE _NAME of AmdSmmCpuFeaturesLib.
> >   Removed EFIAPI from local function.
> >   Removed CpuIndex parameter from MmSaveStateGetRegisterLma
> >   Modifed MmSaveStateGetRegisterIndex () to accept RegOffset
> > as second parameter.
> >   Removed FILE_GUID library instance for intel implemention from
> > UefiCpuPkg.dsc.
> > V12:
> >   Addressed review comments from Michael.
> >   Added LibraryClasses to .inf file.
> >   removed duplicate MACRO definations.
> >   Moved related MACRO defination to respective file.
> > V11: Delta changes
> >   Drop the OVMF implementation of MmSaveStateLib
> > V10: Delta changes:
> >   Addressed review comments from Abner.
> > V9: Delta changes:
> >   Addressed review comments.
> >   Rename to MmSaveStateLib.
> >   Also rename SMM_ defines to MM_.
> >   Implemented OVMF MmSaveStateLib.
> >   Removes SmmCpuFeaturesReadSaveStateRegister and
> > SmmCpuFeaturesWriteSaveStateRegister
> >   function interface.
> > V8 delta changes:
> >Addressed review comments from Abner,
> >Fix the whitespace error.
> >Seperate the Ovmf changes to another patch
> > V7 delta changes:
> >Adds SmmSmramSaveStateLib for Intel processor.
> >Integrate SmmSmramSaveStateLib library.
> > V6 delta changes:
> >Addressed review comments for Ray NI.
> >removed unnecessary EFIAPI.
> > V5 delta changes:
> >rebase to master branch.
> >updated Reviewed-by
> > V4 delta changes:
> >   rebase to master branch.
> >   added reviewed-by.
> > V3 delta changes:
> >   Addressed review comments from Abner chang.
> >   Re-arranged patch order.
> >
> > Cc: Paul Grimes 
> > Cc: Abner Chang 
> > Cc: Eric Dong 
> > Cc: Ray Ni 
> > Cc: Rahul Kumar 
> > Cc: Gerd Hoffmann 
> > Cc: Michael D Kinney 
> > Cc: Liming Gao 
> > Cc: Zhiguang Liu 
> > Cc: Ard Biesheuvel 
> > Cc: Jiewen Yao 
> > Cc: Jordan Justen 
> > Cc: Abdul Lateef Attar 
> >
> > Abdul Lateef Attar (8):
> >   MdePkg: Adds AMD SMRAM save state map
> >   UefiCpuPkg: Adds MmSaveStateLib library class
> >   UefiCpuPkg: Implements MmSaveStateLib library instance
> >   UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code
> >   UefiCpuPkg: Implements SmmCpuFeaturesLib for AMD Family
> >   UefiCpuPkg: Implements MmSaveStateLib for Intel
> >   UefiCpuPkg: Removes SmmCpuFeaturesReadSaveStateRegister
> >   OvmfPkg: Uses MmSaveStateLib library
> >
> >  UefiCpuPkg/UefiCpuPkg.dec |   4 +
> >  OvmfPkg/OvmfPkgIa32.dsc   |   1 +
> >  OvmfPkg/OvmfPkgIa32X64.dsc|   3 +
> >  OvmfPkg/OvmfPkgX64.dsc|   1 +
> >  UefiCpuPkg/UefiCpuPkg.dsc |  13 +
> >  .../MmSaveStateLib/AmdMmSaveStateLib.inf  |  34 +
> >  .../MmSaveStateLib/IntelMmSaveStateLib.inf|  34 +
> >  .../AmdSmmCpuFeaturesLib.inf  |  38 +
> >  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf  |   2 +
> >  .../Include/Register/Amd/SmramSaveStateMap.h  | 194 +
> >  UefiCpuPkg/Include/Library/MmSaveStateLib.h   |  74 ++
> >  .../Include/Library/SmmCpuFeaturesLib.h   |  52 --
> >  .../Library/MmSaveStateLib/MmSaveState.h  |  94 +++
> >  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h|  56 +-
> >  .../SmmCpuFeaturesLib/SmmCpuFeaturesLib.c

[edk2-devel] [PATCH] [edk2-staging]BaseTools/FMMT: C FMMT match new version machine defines

2023-06-15 Thread Yuwei Chen

BaseTools have switch from EFI_IMAGE_MACHINE_*
to IMAGE_FILE_MACHINE_*. Thus, match the FCE & FMMT
tool in edk2-staging repo with the new version define.

Cc: Rebecca Cran 
Cc: Liming Gao 
Cc: Bob Feng 
Signed-off-by: Yuwei Chen 
---
 BaseTools/Source/C/FMMT/Rebase.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/BaseTools/Source/C/FMMT/Rebase.c b/BaseTools/Source/C/FMMT/Rebase.c
index d32217d18c..059f39900d 100644
--- a/BaseTools/Source/C/FMMT/Rebase.c
+++ b/BaseTools/Source/C/FMMT/Rebase.c
@@ -159,8 +159,8 @@ EFI_NOT_FOUND   No compressed sections could be 
found.
   return Status;
 }
 
-//if ((ImageContext.Machine == EFI_IMAGE_MACHINE_ARMT) ||
-//  (ImageContext.Machine == EFI_IMAGE_MACHINE_AARCH64)) {
+//if ((ImageContext.Machine == IMAGE_FILE_MACHINE_ARMT) ||
+//  (ImageContext.Machine == IMAGE_FILE_MACHINE_AARCH64)) {
 //  mArm = TRUE;
 //}
 
@@ -435,8 +435,8 @@ EFI_NOT_FOUND   No compressed sections could be 
found.
   return Status;
 }
 
-//if ((ImageContext.Machine == EFI_IMAGE_MACHINE_ARMT) ||
-//  (ImageContext.Machine == EFI_IMAGE_MACHINE_AARCH64)) {
+//if ((ImageContext.Machine == IMAGE_FILE_MACHINE_ARMT) ||
+//  (ImageContext.Machine == IMAGE_FILE_MACHINE_AARCH64)) {
 //  mArm = TRUE;
 //}
 
@@ -835,8 +835,8 @@ Returns:
   //
   // Verify machine type is supported
   //
-  if ((*MachineType != EFI_IMAGE_MACHINE_IA32) && (*MachineType != 
EFI_IMAGE_MACHINE_X64) && (*MachineType != EFI_IMAGE_MACHINE_EBC) &&
-  (*MachineType != EFI_IMAGE_MACHINE_ARMT) && (*MachineType != 
EFI_IMAGE_MACHINE_AARCH64)) {
+  if ((*MachineType != IMAGE_FILE_MACHINE_IA32) && (*MachineType != 
IMAGE_FILE_MACHINE_X64) && (*MachineType != IMAGE_FILE_MACHINE_EBC) &&
+  (*MachineType != IMAGE_FILE_MACHINE_ARMT) && (*MachineType != 
IMAGE_FILE_MACHINE_AARCH64)) {
 Error (NULL, 0, 3000, "Invalid", "Unrecognized machine type in the PE32 
file.");
 return EFI_UNSUPPORTED;
   }
-- 
2.39.1.windows.1



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Re: [edk2-devel] [PATCH] OvmfPkg/README: Document Secure Boot

2023-06-15 Thread Joursoir

+cc to maintainers

On Sat, 3 Jun 2023 01:44:40 +0400
"Joursoir"  wrote:

> Add the new section for Secure Boot.
> 
> Signed-off-by: Alexander Goncharov 
> ---
>  OvmfPkg/README | 36 
>  1 file changed, 36 insertions(+)
> 
> diff --git a/OvmfPkg/README b/OvmfPkg/README
> index 0a408abf01..e106e19818 100644
> --- a/OvmfPkg/README
> +++ b/OvmfPkg/README
> @@ -120,6 +120,42 @@ $ OvmfPkg/build.sh -a X64 qemu -cdrom
> /path/to/disk-image.iso To build a 32-bit OVMF without debug messages
> using GCC 4.8: $ OvmfPkg/build.sh -a IA32 -b RELEASE -t GCC48
>  
> +=== Secure Boot ===
> +
> +Secure Boot is a security feature that ensures only trusted and
> digitally +signed software is allowed to run during the boot process.
> +
> +* In order to support Secure Boot, OVMF must be built with the
> +  "-D SECURE_BOOT_ENABLE" option.
> +
> +* By default, OVMF is not shipped with any SecureBoot keys installed.
> The user
> +  need to install them with "Secure Boot Configuration" utility in
> the firmware
> +  UI, or enroll the default UEFI keys using the
> OvmfPkg/EnrollDefaultKeys app. +
> +  For the EnrollDefaultKeys application, the hypervisor is expected
> to add a
> +  string entry to the "OEM Strings" (Type 11) SMBIOS table. The
> string should
> +  have the following format:
> +
> +4e32566d-8e9e-4f52-81d3-5bb9715f9727: first KEK> +
> +  Such string can be generated with the following script, for
> example: +
> +sed \
> +  -e 's/^-BEGIN
> CERTIFICATE-$/4e32566d-8e9e-4f52-81d3-5bb9715f9727:/' \
> +  -e '/^-END CERTIFICATE-$/d' \
> +  PkKek1.pem \
> +| tr -d '\n' \
> +> PkKek1.oemstr
> +
> +  - Using QEMU 5.2 or later, the SMBIOS type 11 field can be
> specified from a
> +file:
> +
> +-smbios type=11,path=PkKek1.oemstr \
> +
> +  - Using QEMU 5.1 or earlier, the string has to be passed as a
> value: +
> +-smbios type=11,value="$(< PkKek1.oemstr)"
> +
>  === SMM support ===
>  
>  Requirements:

-- 
Joursoir


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Re: [edk2-devel] [PATCH 1/1] Maintainers.txt: Update NetworkPkg maintainers and reviewers

2023-06-15 Thread Michael D Kinney

Reviewed-by: Michael D Kinney 

> -Original Message-
> From: Clark-williams, Zachary 
> Sent: Thursday, June 15, 2023 11:32 AM
> To: Kasbekar, Saloni ; devel@edk2.groups.io
> Cc: Kinney, Michael D ; Andrew Fish
> ; Leif Lindholm 
> Subject: RE: [PATCH 1/1] Maintainers.txt: Update NetworkPkg maintainers and
> reviewers
> 
> Reviewed-by: Zachary Clark-williams 
> 
> -Zack
> 
> -Original Message-
> From: Kasbekar, Saloni 
> Sent: Wednesday, June 14, 2023 10:47 AM
> To: devel@edk2.groups.io
> Cc: Kasbekar, Saloni ; Kinney, Michael D
> ; Andrew Fish ; Leif Lindholm
> ; Clark-williams, Zachary  willi...@intel.com>
> Subject: [PATCH 1/1] Maintainers.txt: Update NetworkPkg maintainers and
> reviewers
> 
> Add Zack, Saloni and remove unused IDs
> 
> Cc: Michael D Kinney 
> Cc: Andrew Fish 
> Cc: Leif Lindholm 
> Cc: Zachary Clark-willilams 
> Signed-off-by: Saloni Kasbekar 
> ---
>  Maintainers.txt | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/Maintainers.txt b/Maintainers.txt index
> 42e40dced3c7..cf40934acc82 100644
> --- a/Maintainers.txt
> +++ b/Maintainers.txt
> @@ -465,8 +465,8 @@ R: James Lu  [jameslu8]  NetworkPkg
>  F: NetworkPkg/
>  W: https://github.com/tianocore/tianocore.github.io/wiki/NetworkPkg
> -M: Maciej Rabeda  [mrabeda]
> -R: Siyuan Fu  [sfu5]
> +R: Saloni Kasbekar  [SaloniKasbekar]
> +R: Zachary Clark-williams 
> +[Zclarkwilliams]
> 
>  OvmfPkg
>  F: OvmfPkg/
> --
> 2.36.1.windows.1



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Re: [edk2-devel] [PATCH 1/1] Maintainers.txt: Update NetworkPkg maintainers and reviewers

2023-06-15 Thread Clark-williams, Zachary

Reviewed-by: Zachary Clark-williams 

-Zack

-Original Message-
From: Kasbekar, Saloni  
Sent: Wednesday, June 14, 2023 10:47 AM
To: devel@edk2.groups.io
Cc: Kasbekar, Saloni ; Kinney, Michael D 
; Andrew Fish ; Leif Lindholm 
; Clark-williams, Zachary 

Subject: [PATCH 1/1] Maintainers.txt: Update NetworkPkg maintainers and 
reviewers

Add Zack, Saloni and remove unused IDs

Cc: Michael D Kinney 
Cc: Andrew Fish 
Cc: Leif Lindholm 
Cc: Zachary Clark-willilams 
Signed-off-by: Saloni Kasbekar 
---
 Maintainers.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Maintainers.txt b/Maintainers.txt index 42e40dced3c7..cf40934acc82 
100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -465,8 +465,8 @@ R: James Lu  [jameslu8]  NetworkPkg
 F: NetworkPkg/
 W: https://github.com/tianocore/tianocore.github.io/wiki/NetworkPkg
-M: Maciej Rabeda  [mrabeda]
-R: Siyuan Fu  [sfu5]
+R: Saloni Kasbekar  [SaloniKasbekar]
+R: Zachary Clark-williams  
+[Zclarkwilliams]
 
 OvmfPkg
 F: OvmfPkg/
--
2.36.1.windows.1



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[edk2-devel] [PATCH 8/8] AlderlakeSiliconPkg/SystemAgent: Add library and driver modules

2023-06-15 Thread Saloni Kasbekar

Adds the following modules:
- Library/DxeSaPolicyLib
- SaInit

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Library/DxeSaPolicyLib/DxeSaPolicyLib.c   | 225 ++
 .../Library/DxeSaPolicyLib/DxeSaPolicyLib.inf |  46 
 .../DxeSaPolicyLib/DxeSaPolicyLibrary.h   |  30 +++
 .../SystemAgent/SaInit/Dxe/SaAcpi.c   | 193 +++
 .../SystemAgent/SaInit/Dxe/SaInit.c   |  97 
 .../SystemAgent/SaInit/Dxe/SaInit.h   |  42 
 .../SystemAgent/SaInit/Dxe/SaInitDxe.c|  90 +++
 .../SystemAgent/SaInit/Dxe/SaInitDxe.h| 119 +
 .../SystemAgent/SaInit/Dxe/SaInitDxe.inf  |  98 
 9 files changed, 940 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLibrary.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaAcpi.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInit.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInit.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/SaInit/Dxe/SaInitDxe.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
new file mode 100644
index 00..d812f300c1
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Library/DxeSaPolicyLib/DxeSaPolicyLib.c
@@ -0,0 +1,225 @@
+/** @file
+  This file provide services for DXE phase policy default initialization
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "DxeSaPolicyLibrary.h"
+#include 
+#include 
+#include "MemoryConfig.h"
+
+extern EFI_GUID gMemoryDxeConfigGuid;
+
+/**
+  This function prints the SA DXE phase policy.
+
+  @param[in] SaPolicy - SA DXE Policy protocol
+**/
+VOID
+SaPrintPolicyProtocol (
+  IN  SA_POLICY_PROTOCOL  *SaPolicy
+  )
+{
+  UINT8   ControllerIndex;
+  UINT8   ChannelIndex;
+  EFI_STATUS  Status;
+  MEMORY_DXE_CONFIG   *MemoryDxeConfig;
+
+  Status = GetConfigBlock ((VOID *) SaPolicy, &gMemoryDxeConfigGuid, (VOID 
*)&MemoryDxeConfig);
+  ASSERT_EFI_ERROR (Status);
+
+
+  DEBUG_CODE_BEGIN ();
+  INTN  i;
+
+  DEBUG ((DEBUG_INFO, "\n SA Policy (DXE) print BEGIN 
-\n"));
+  DEBUG ((DEBUG_INFO, "Revision : %x\n", 
SaPolicy->TableHeader.Header.Revision));
+  ASSERT (SaPolicy->TableHeader.Header.Revision == 
SA_POLICY_PROTOCOL_REVISION);
+
+  DEBUG ((DEBUG_INFO, " SA_MEMORY_CONFIGURATION 
-\n"));
+
+  DEBUG ((DEBUG_INFO, " SpdAddressTable[%d] :", 4));
+  for (i = 0; i < 4; i++) {
+DEBUG ((DEBUG_INFO, " %x", MemoryDxeConfig->SpdAddressTable[i]));
+  }
+  DEBUG ((DEBUG_INFO, "\n"));
+
+  for (ControllerIndex = 0; ControllerIndex < MEM_CFG_MAX_CONTROLLERS; 
ControllerIndex++) {
+for (ChannelIndex = 0; ChannelIndex < MEM_CFG_MAX_CHANNELS; 
ChannelIndex++) {
+  DEBUG ((DEBUG_INFO, " SlotMap[%d][%d] : 0x%x\n", ControllerIndex, 
ChannelIndex, MemoryDxeConfig->SlotMap[ControllerIndex][ChannelIndex]));
+}
+  }
+  DEBUG ((DEBUG_INFO, " MrcTimeMeasure  : %x\n", 
MemoryDxeConfig->MrcTimeMeasure));
+  DEBUG ((DEBUG_INFO, " MrcFastBoot : %x\n", 
MemoryDxeConfig->MrcFastBoot));
+
+  DEBUG ((DEBUG_INFO, " CPU_PCIE_CONFIGURATION 
-\n"));
+  DEBUG ((DEBUG_INFO, " PegAspm[%d] :", SA_PEG_MAX_FUN));
+  DEBUG ((DEBUG_INFO, " PegRootPortHPE[%d] :", SA_PEG_MAX_FUN));
+  DEBUG ((DEBUG_INFO, "\n"));
+
+
+  DEBUG ((DEBUG_INFO, "\n SA Policy (DXE) print END 
-\n"));
+  DEBUG_CODE_END ();
+
+  return;
+}
+
+/**
+  Load DXE Config block default
+
+  @param[in] ConfigBlockPointer Pointer to config block
+**/
+VOID
+LoadMemoryDxeDefault (
+  IN VOID*ConfigBlockPointer
+  )
+{
+  UINT8ControllerIndex;
+  UINT8ChannelIndex;
+  MEMORY_DXE_CONFIG*MemoryDxeConfig;
+
+  MemoryDxeConfig = ConfigBlockPointer;
+  ///
+  /// Initialize the Memory Configuration
+  ///
+  ///
+  /// DIMM SMBus addresses info
+  /// Refer to the SpdAddressTable[] mapping rule in DxeSaPolicyLibrary.h
+  ///
+  MemoryDxeConfig->SpdAddressTable = AllocateZeroPool (sizeof (UINT8) * 4);
+  ASSERT (MemoryDxeConfig->SpdAddressTable !

[edk2-devel] [PATCH 7/8] AlderlakeSiliconPkg/SystemAgent: Add include headers

2023-06-15 Thread Saloni Kasbekar

Adds the following header files:
* SystemAgent/Include

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/ConfigBlock/MemoryDxeConfig.h | 126 ++
 .../ConfigBlock/SaMiscPeiPreMemConfig.h   | 112 +
 .../Include/Library/DxeSaPolicyLib.h  |  58 +
 .../Include/Library/PeiSaPolicyLib.h  |  13 ++
 .../SystemAgent/Include/MemInfoHob.h  | 220 ++
 .../SystemAgent/Include/Protocol/SaPolicy.h   |  54 +
 .../SystemAgent/Include/SaDataHob.h   |  28 +++
 7 files changed, 611 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/SaMiscPeiPreMemConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/Library/DxeSaPolicyLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/Library/PeiSaPolicyLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/MemInfoHob.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/Protocol/SaPolicy.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/SaDataHob.h

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
new file mode 100644
index 00..eca0c2f1ba
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/Include/ConfigBlock/MemoryDxeConfig.h
@@ -0,0 +1,126 @@
+/** @file
+  Memory DXE Policy definitions
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _MEMORY_DXE_CONFIG_H_
+#define _MEMORY_DXE_CONFIG_H_
+
+#pragma pack(push, 1)
+
+/**
+ Making any setup structure change after code frozen
+ will need to maintain backward compatibility, bump up
+ structure revision and update below history table\n
+  Revision 1:  - Initial version.
+**/
+#define MEMORY_DXE_CONFIG_REVISION 2
+
+typedef struct _MEMORY_DXE_CONFIG  MEMORY_DXE_CONFIG;
+
+/**
+  Retrieves the OEM custom string for the SMBIOS Type 17 Table DeviceLocator 
field.
+  Implementation of this function is optional, if this function pointer is 
NULL then
+  the reference implementation of DeviceLocator will be used.
+
+  @param[in]  This  A pointer to this instance of 
MEMORY_DXE_CONFIG.
+  @param[in]  ControllerDesired Controller to get a 
DeviceLocator string for.
+  @param[in]  Dimm  Desired DIMM to get a 
DeviceLocator string for.
+  @param[in]  MdSocket  0 = Memory Down, 1 = Socketed.
+
+  @retval   The DeviceLocator string
+  @retval NULL  If the return value is NULL, the 
default value will be used.
+**/
+typedef
+CHAR8*
+(EFIAPI *MEMORY_DXE_CONFIG_GET_DEVICE_LOCATOR_STRING)(
+  IN CONSTMEMORY_DXE_CONFIG   *This,
+  IN  UINT8   Controller,
+  IN  UINT8   Dimm,
+  IN  UINT8   MdSocket
+  );
+
+/**
+  Retrieves the OEM custom string for the SMBIOS Type 17 Table BankLocator 
field.
+  Implementation of this function is optional, if this function pointer is 
NULL then
+  the reference implementation of DeviceLocator will be used.
+
+  @param[in]  This  A pointer to this instance of 
MEMORY_DXE_CONFIG.
+  @param[in]  ControllerDesired Controller to get a 
BankLocator string for.
+  @param[in]  Dimm  Desired DIMM to get a BankLocator 
string for.
+  @param[in]  MdSocket  0 = Memory Down, 1 = Socketed.
+
+  @retval   The BankLocator string
+  @retval NULL  If the return value is NULL, the 
default value will be used.
+**/
+typedef
+CHAR8*
+(EFIAPI *MEMORY_DXE_CONFIG_GET_BANK_LOCATOR_STRING)(
+  IN CONSTMEMORY_DXE_CONFIG   *This,
+  IN  UINT8   Controller,
+  IN  UINT8   Dimm,
+  IN  UINT8   MdSocket
+  );
+
+/**
+  The Memory Configuration includes DIMM SPD address Map and DIMM Slot 
Mechanical present bit map.
+  The data elements should be initialized by a Platform Module.\n
+  Revision 1:
+  - Initial version.
+**/
+struct _MEMORY_DXE_CONFIG {
+  CONFIG_BLOCK_HEADER   Header;   ///< Offset 0-27: Config 
Block Header
+/**
+  Offset 28:
+  Dimm SPD address
+  Only Server support 2 channels * 3 slots per channel = 6 sockets totally
+  The Desktop and mobile only support 2 channels * 2 slots per channel = 4 
sockets totally
+  So there is mapping rule here for Desktop and mobile that there are no more 
4 DIMMS totally in a system:
+Channel A/ Slot 0 --> Dim

[edk2-devel] [PATCH 6/8] AlderlakeSiliconPkg/SystemAgent: Add NVS support

2023-06-15 Thread Saloni Kasbekar

Adds the System Agent NVS ACPI table and structures

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../SystemAgent/AcpiTables/SaSsdt/SaNvs.asl   | 18 +++
 .../IncludePrivate/Protocol/SaNvsArea.h   | 30 +++
 .../SystemAgent/IncludePrivate/SaNvsAreaDef.h | 22 ++
 3 files changed, 70 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaNvs.asl
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/Protocol/SaNvsArea.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/SaNvsAreaDef.h

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaNvs.asl 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaNvs.asl
new file mode 100644
index 00..e9785873d2
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/AcpiTables/SaSsdt/SaNvs.asl
@@ -0,0 +1,18 @@
+/**@file
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+  //
+  // Define SA NVS Area operation region.
+  //
+
+
+  OperationRegion(SANV,SystemMemory,SANB,SANL)
+  Field(SANV,AnyAcc,Lock,Preserve)
+  {  Offset(0),  M64B, 64, // Offset(0),   Base of above 4GB MMIO resource
+  Offset(8),M64L, 64, // Offset(8),   Length of above 4GB MMIO resource
+  Offset(16),M32B, 32, // Offset(16),   Base of below 4GB MMIO resource
+  Offset(20),M32L, 32, // Offset(20),   Length of below 4GB MMIO resource
+  }
\ No newline at end of file
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/Protocol/SaNvsArea.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/Protocol/SaNvsArea.h
new file mode 100644
index 00..3a75465843
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/Protocol/SaNvsArea.h
@@ -0,0 +1,30 @@
+/** @file
+  Definition of the System Agent global NVS area protocol.
+  This protocol publishes the address and format of a global ACPI NVS buffer
+  used as a communications buffer between SMM/DXE/PEI code and ASL code.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _SYSTEM_AGENT_NVS_AREA_H_
+#define _SYSTEM_AGENT_NVS_AREA_H_
+
+//
+// SA NVS Area definition
+//
+#include 
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gSaNvsAreaProtocolGuid;
+
+///
+/// System Agent Global NVS Area Protocol
+///
+typedef struct {
+  SYSTEM_AGENT_NVS_AREA *Area;///< System Agent Global NVS Area 
Structure
+} SYSTEM_AGENT_NVS_AREA_PROTOCOL;
+
+#endif // _SYSTEM_AGENT_NVS_AREA_H_
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/SaNvsAreaDef.h 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/SaNvsAreaDef.h
new file mode 100644
index 00..5b8136866a
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/SystemAgent/IncludePrivate/SaNvsAreaDef.h
@@ -0,0 +1,22 @@
+/**@file
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+  //
+  // Define SA NVS Area operation region.
+  //
+#ifndef _SA_NVS_AREA_DEF_H_
+#define _SA_NVS_AREA_DEF_H_
+
+#pragma pack (push,1)
+typedef struct {
+  UINT64   Mmio64Base;  ///< Offset 0 Base of 
above 4GB MMIO resource
+  UINT64   Mmio64Length;///< Offset 8 Length 
of above 4GB MMIO resource
+  UINT32   Mmio32Base;  ///< Offset 16 Base of 
below 4GB MMIO resource
+  UINT32   Mmio32Length;///< Offset 20 Length 
of below 4GB MMIO resource
+} SYSTEM_AGENT_NVS_AREA;
+
+#pragma pack(pop)
+#endif
-- 
2.36.1.windows.1



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[edk2-devel] [PATCH 4/8] AlderlakeSiliconPkg/Pch: Add libraries

2023-06-15 Thread Saloni Kasbekar

Adds the following libraries:
- BasePchPciBdfLib
- BaseResetSystemLib
- PeiDxeSmmPchCycleDecodingLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../BasePchPciBdfLib/BasePchPciBdfLib.inf |  32 ++
 .../Library/BasePchPciBdfLib/PchPciBdfLib.c   | 308 ++
 .../BaseResetSystemLib/BaseResetSystemLib.c   | 114 +++
 .../BaseResetSystemLib/BaseResetSystemLib.inf |  37 +++
 .../PchCycleDecodingLib.c | 194 +++
 .../PeiDxeSmmPchCycleDecodingLib.inf  |  41 +++
 6 files changed, 726 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BaseResetSystemLib/BaseResetSystemLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BaseResetSystemLib/BaseResetSystemLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PchCycleDecodingLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/PeiDxeSmmPchCycleDecodingLib/PeiDxeSmmPchCycleDecodingLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
new file mode 100644
index 00..e65f564c1b
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/BasePchPciBdfLib.inf
@@ -0,0 +1,32 @@
+## @file
+# PCH PCIe Bus Device Function Library.
+#
+# All functions from this library are available in PEI, DXE, and SMM,
+# But do not support UEFI RUNTIME environment call.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+INF_VERSION = 0x00010017
+BASE_NAME = PeiDxeSmmPchPciBdfLib
+FILE_GUID = A36363FC-2951-4DCF-AC81-16F4ED3FDA47
+VERSION_STRING = 1.0
+MODULE_TYPE = BASE
+LIBRARY_CLASS = PchPciBdfLib
+
+[LibraryClasses]
+BaseLib
+IoLib
+DebugLib
+PciSegmentLib
+PchInfoLib
+PchPcieRpLib
+
+[Packages]
+MdePkg/MdePkg.dec
+AlderlakeSiliconPkg/SiPkg.dec
+
+[Sources]
+PchPciBdfLib.c
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c
new file mode 100644
index 00..c26625e2eb
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Library/BasePchPciBdfLib/PchPciBdfLib.c
@@ -0,0 +1,308 @@
+/** @file
+  PCH PCIe Bus Device Function Library.
+  All functions from this library are available in PEI, DXE, and SMM,
+  But do not support UEFI RUNTIME environment call.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Check if a Device is present for PCH FRU
+  If the data is defined for PCH RFU return it
+  If the data is not defined (Device is NOT present) assert.
+
+  @param[in]  DataToCheck   Device or Function number to check
+
+  @retval Device or Function number value if defined for PCH FRU
+  0xFF if not present in PCH FRU
+**/
+UINT8
+CheckAndReturn (
+  UINT8 DataToCheck
+  )
+{
+  if (DataToCheck == NOT_PRESENT) {
+ASSERT (FALSE);
+  }
+  return DataToCheck;
+}
+
+/**
+  Get P2SB PCI device number
+
+  @retval PCI dev number
+**/
+UINT8
+P2sbDevNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_P2SB);
+}
+
+/**
+  Get P2SB PCI function number
+
+  @retval PCI fun number
+**/
+UINT8
+P2sbFuncNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_P2SB);
+}
+
+/**
+  Get P2SB controller address that can be passed to the PCI Segment Library 
functions.
+
+  @retval P2SB controller address in PCI Segment Library representation
+**/
+UINT64
+P2sbPciCfgBase (
+  VOID
+  )
+{
+  return PCI_SEGMENT_LIB_ADDRESS (
+   DEFAULT_PCI_SEGMENT_NUMBER_PCH,
+   DEFAULT_PCI_BUS_NUMBER_PCH,
+   P2sbDevNumber (),
+   P2sbFuncNumber (),
+   0
+   );
+}
+
+
+
+/**
+  Returns PCH SPI Device number
+
+  @retval UINT8   PCH SPI Device number
+**/
+UINT8
+SpiDevNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_DEVICE_NUMBER_PCH_SPI);
+}
+
+/**
+  Returns PCH SPI Function number
+
+  @retval UINT8   PCH SPI Function number
+**/
+UINT8
+SpiFuncNumber (
+  VOID
+  )
+{
+  return CheckAndReturn (PCI_FUNCTION_NUMBER_PCH_SPI);
+}
+
+/**
+  Returns PCH SPI PCI Config Space base address
+
+  @retval  UINT64  PCH SPI Config Space base address
+**/
+UINT64
+SpiPciCfgBase (
+  VOID
+  )
+{
+  return PCI_SEGMENT_LIB_ADDRESS (
+   DEFAULT_PCI_SEGMENT_NUMBER_PCH,
+   DEFAULT_PCI_BUS_NUMBER_PCH,
+   SpiDevNumber (),
+

[edk2-devel] [PATCH 3/8] AlderlakeSiliconPkg/Pch: Add include headers

2023-06-15 Thread Saloni Kasbekar

Adds the following header files:
* Pch/Include

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Include/ConfigBlock/PchGeneralConfig.h|  86 
 .../Pch/Include/Library/PchCycleDecodingLib.h |  59 ++
 .../Pch/Include/Library/PchInfoDefs.h |  19 ++
 .../Pch/Include/Library/PchInfoLib.h  | 108 ++
 .../Pch/Include/Library/PchPciBdfLib.h| 187 ++
 .../Pch/Include/PchPolicyCommon.h |  30 +++
 .../Pch/Include/PchPreMemPolicyCommon.h   |  53 +
 .../Pch/Include/PchResetPlatformSpecific.h|  21 ++
 .../Pch/Include/Protocol/PchAcpiSmiDispatch.h | 134 +
 .../Pch/Include/Protocol/PchPcieSmiDispatch.h | 166 
 .../Pch/Include/Protocol/PchSmiDispatch.h | 132 +
 .../Include/Protocol/PchSmmIoTrapControl.h|  65 ++
 .../Protocol/PchSmmPeriodicTimerControl.h |  65 ++
 .../Pch/Include/Protocol/PchTcoSmiDispatch.h  | 150 ++
 .../Pch/Include/Protocol/SmmSmbus.h   |  13 ++
 .../Pch/Include/Register/PchRegs.h|  45 +
 16 files changed, 1333 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchCycleDecodingLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchInfoDefs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchInfoLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Library/PchPciBdfLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/PchPolicyCommon.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/PchPreMemPolicyCommon.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/PchResetPlatformSpecific.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchAcpiSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchPcieSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchSmmIoTrapControl.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchSmmPeriodicTimerControl.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/PchTcoSmiDispatch.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Protocol/SmmSmbus.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/Register/PchRegs.h

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h
new file mode 100644
index 00..4501537fe2
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Pch/Include/ConfigBlock/PchGeneralConfig.h
@@ -0,0 +1,86 @@
+/** @file
+  PCH General policy
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_GENERAL_CONFIG_H_
+#define _PCH_GENERAL_CONFIG_H_
+
+
+extern EFI_GUID gPchGeneralConfigGuid;
+extern EFI_GUID gPchGeneralPreMemConfigGuid;
+
+#pragma pack (push,1)
+
+enum PCH_RESERVED_PAGE_ROUTE {
+  PchReservedPageToLpc,   ///< Port 80h cycles are sent to LPC.
+  PchReservedPageToPcie   ///< Port 80h cycles are sent to 
PCIe.
+};
+
+/**
+  PCH General Configuration
+  Revision 1:  - Initial version.
+  Revision 2:  - Added AcpiL6dPmeHandling
+**/
+typedef struct {
+  CONFIG_BLOCK_HEADER   Header;   ///< Config Block Header
+  /**
+This member describes whether or not the Compatibility Revision ID (CRID) 
feature
+of PCH should be enabled. 0: Disable; 1: Enable
+  **/
+  UINT32Crid:  1;
+  /**
+Set to enable low latency of legacy IO.
+Some systems require lower IO latency irrespective of power.
+This is a tradeoff between power and IO latency.
+@note: Once this is enabled, DmiAspm, Pcie DmiAspm in SystemAgent
+and ITSS Clock Gating are forced to disabled.
+0: Disable, 1: Enable
+  **/
+  UINT32LegacyIoLowLatency  :  1;
+  /**
+  Enables _L6D ACPI handler.
+  PME GPE is shared by multiple devices So BIOS must verify the same in the 
ASL handler by reading offset for PMEENABLE and PMESTATUS bit
+  0: Disable, 1: Enable
+  **/
+  UINT32AcpiL6dPmeHandling  :  1;
+  UINT32RsvdBits0   : 29;   ///< Reserved bits
+} PCH_GENERAL_CONFIG;
+
+/**
+  PCH General Pre-Memory Configuration
+  Revision 1:  - Initial version.
+  Revision 2:  - Added GpioOverride.
+  Revision 3:  - Added IoeDebugEn, PmodeClkEn
+**/
+typedef struct {
+  CONFIG_BLOCK_HEADER   Header;   ///< Config Block Header
+  /**
+Control where the Port 80h cycles are sent, 0: LPC; 1: PCI.
+  **/
+

[edk2-devel] [PATCH 1/8] AlderlakeSiliconPkg: Add package and library instances

2023-06-15 Thread Saloni Kasbekar

Create the AlderlakeSiliconPkg to provide an initial package for
silicon initialization code for Alder Lake (ADL) products. Add the
following libraries -
- BasePciSegmentMultiSegLibPci
- BaseSiConfigBlockLib
- PeiDxeSmmReserveMmio64SizeLib
- PeiPostMemSiliconPolicyInitLib

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../BasePciSegmentMultiSegLibPci.inf  |  37 ++
 .../BasePciSegmentMultiSegLibPci.uni  |  14 +
 .../PciSegmentLib.c   | 597 ++
 .../BaseSiConfigBlockLib.c|  87 +++
 .../BaseSiConfigBlockLib.inf  |  32 +
 .../PeiDxeSmmReserveMmio64SizeLib.c   |  22 +
 .../PeiDxeSmmReserveMmio64SizeLib.inf |  28 +
 .../PeiPostMemSiliconPolicyInitLib.c  |  94 +++
 .../PeiPostMemSiliconPolicyInitLib.inf|  39 ++
 .../PeiPreMemSiliconPolicyInitLib.c   |  98 +++
 .../PeiPreMemSiliconPolicyInitLib.inf |  36 ++
 11 files changed, 1084 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/PciSegmentLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiConfigBlockLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/BaseSiConfigBlockLib/BaseSiConfigBlockLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiDxeSmmReserveMmio64SizeLib/PeiDxeSmmReserveMmio64SizeLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiDxeSmmReserveMmio64SizeLib/PeiDxeSmmReserveMmio64SizeLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPostMemSiliconPolicyInitLib/PeiPostMemSiliconPolicyInitLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPostMemSiliconPolicyInitLib/PeiPostMemSiliconPolicyInitLib.inf
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPreMemSiliconPolicyInitLib/PeiPreMemSiliconPolicyInitLib.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Library/PeiPreMemSiliconPolicyInitLib/PeiPreMemSiliconPolicyInitLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
new file mode 100644
index 00..f3764d0187
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.inf
@@ -0,0 +1,37 @@
+## @file
+# Instance of PCI Segment Library based on PCI Library.
+#
+# PCI Segment Library that layers on top of the PCI Library which only
+#  supports segment 0 and segment 1 PCI configuration access.
+#
+#   Copyright (c) 2022, Intel Corporation. All rights reserved.
+#   SPDX-License-Identifier: BSD-2-Clause-Patent
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = BasePciSegmentMultiSegLibPci
+  MODULE_UNI_FILE= BasePciSegmentMultiSegLibPci.uni
+  FILE_GUID  = AC65B409-DF03-466e-8D2B-6FCE1079F0B2
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = PciSegmentLib
+
+#
+# The following information is for reference only and not required by the 
build tools.
+#
+#  VALID_ARCHITECTURES   = IA32 X64 IPF EBC
+#
+
+[Sources]
+  PciSegmentLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  AlderlakeSiliconPkg/SiPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PciLib
+  DebugLib
+  PcdLib
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
new file mode 100644
index 00..dd8d74bee8
--- /dev/null
+++ 
b/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/BasePciSegmentMultiSegLibPci.uni
@@ -0,0 +1,14 @@
+// /** @file
+// Instance of PCI Segment Library based on PCI Library.
+//
+// PCI Segment Library that layers on top of the PCI Library which only
+//  supports segment 0 and segment 1 PCI configuration access.
+//
+//   Copyright (c) 2022, Intel Corporation. All rights reserved.
+//   SPDX-License-Identifier: BSD-2-Clause-Patent
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "Instance of PCI 
Segment Library based on PCI Library."
+
+#string STR_MODULE_DESCRIPTION  #language en-US "PCI Segment Library 
that layers on top of the PCI Library which only supports segment 0 and segment 
1 PCI configuration access."
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Library/BasePciSegmentMultiSegLibPci/P

[edk2-devel] [PATCH 2/8] AlderlakeSiliconPkg: Add Cpu modules

2023-06-15 Thread Saloni Kasbekar

Add Cpu/Include, Cpu/IncludePrivate and Cpu/Library

Cc: Sai Chaganty 
Cc: Nate DeSimone 
Cc: Isaac Oram 
Cc: Rosen Chuang 
Signed-off-by: Saloni Kasbekar 
---
 .../Cpu/Include/ConfigBlock/CpuConfig.h   |  86 
 .../ConfigBlock/CpuConfigLibPreMemConfig.h| 195 ++
 .../ConfigBlock/CpuSecurityPreMemConfig.h |  63 ++
 .../AlderlakeSiliconPkg/Cpu/Include/CpuRegs.h |  63 ++
 .../Cpu/Include/Library/CpuPlatformLib.h  |  42 
 .../Cpu/Include/Protocol/CpuPolicyProtocol.h  |  95 +
 .../Cpu/Include/Register/CommonMsr.h  |  60 ++
 .../IncludePrivate/Library/CpuInfoFruLib.h|  64 ++
 .../CpuPlatformLibrary.c  |  55 +
 .../CpuPlatformLibrary.h  |  25 +++
 .../PeiDxeSmmCpuPlatformLib.inf   |  41 
 11 files changed, 789 insertions(+)
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfigLibPreMemConfig.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuSecurityPreMemConfig.h
 create mode 100644 Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/CpuRegs.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/Library/CpuPlatformLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/Protocol/CpuPolicyProtocol.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/Register/CommonMsr.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/IncludePrivate/Library/CpuInfoFruLib.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/CpuPlatformLibrary.c
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/CpuPlatformLibrary.h
 create mode 100644 
Silicon/Intel/AlderlakeSiliconPkg/Cpu/Library/PeiDxeSmmCpuPlatformLib/PeiDxeSmmCpuPlatformLib.inf

diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h 
b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
new file mode 100644
index 00..9815f8b185
--- /dev/null
+++ b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfig.h
@@ -0,0 +1,86 @@
+/** @file
+  CPU Config Block.
+
+   Copyright (c) 2022, Intel Corporation. All rights reserved.
+   SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _CPU_CONFIG_H_
+#define _CPU_CONFIG_H_
+
+#define CPU_CONFIG_REVISION 1
+
+extern EFI_GUID gCpuConfigGuid;
+
+#pragma pack (push,1)
+
+/**
+  CPU Configuration Structure.
+
+  Revision 1:
+  - Initial version.
+**/
+typedef struct {
+  CONFIG_BLOCK_HEADER   Header;   ///< Config Block Header
+  UINT32MicrocodePatchRegionSize;
+  EFI_PHYSICAL_ADDRESS  MicrocodePatchAddress;///< Pointer to microcode 
patch that is suitable for this processor.
+  /**
+Enable or Disable Advanced Encryption Standard (AES) feature.
+For some countries, this should be disabled for legal reasons.
+-0: Disable
+- 1: Enable
+  **/
+  UINT32 AesEnable   : 1;
+  /**
+Enable or Disable Trusted Execution Technology (TXT) feature.
+-0: Disable
+- 1: Enable
+  **/
+  UINT32 TxtEnable   : 1;
+  UINT32 SkipMpInit  : 1; ///< For Fsp only, Silicon 
Initialization will skip MP Initialization (including BSP) if enabled. For 
non-FSP, this should always be 0.
+  /**
+Enable or Disable or Auto for PPIN Support to view Protected Processor 
Inventory Number.
+- 0: Disable
+-1: Enable
+-2: Auto : Feature is based on End Of Manufacturing (EOM) flag. If EOM 
is set, it is disabled.
+  **/
+  UINT32 PpinSupport : 2;
+  /**
+Enable or Disable #AC machine check on split lock.
+- 0: Disable
+-1: Enable
+  **/
+  UINT32 AcSplitLock : 1;
+  /**
+  Enable or Disable Avx.
+  -  1: Disable
+  -   0: Enable
+  **/
+  UINT32 AvxDisable  : 1;
+  /**
+  @deprecated
+  Enable or Disable Avx3.
+  -   1: Disable
+  -  0: Enable
+  **/
+  UINT32 Avx3Disable : 1;
+  /**
+Enable or Disable X2APIC Support.
+- 0: Disable
+-1: Enable
+  **/
+  UINT32 X2ApicSupport   : 1;
+  UINT32 RsvdBits: 23;///< Reserved for future use
+  /**
+Provide the option for platform to override the MaxSpeed field of Smbios 
Type 4.
+Value 4000 means 4000MHz.
+If this value is not zero, it dominates the field.
+If this value is zero, CPU RC will update the field according to the max 
radio.
+default is 0.
+  **/
+  UINT16 SmbiosType4MaxSpeedOverride;
+  UINT8  Reserved0[2];///< Reserved for future use
+} CPU_CONFIG;
+
+#pragma pack (pop)
+
+#endif // _CPU_CONFIG_H_
diff --git 
a/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/CpuConfigLibPreMemConfig.h
 
b/Silicon/Intel/AlderlakeSiliconPkg/Cpu/Include/ConfigBlock/

[edk2-devel] BZ-4482 Feature Request

2023-06-15 Thread Demeter, Miki

I see that no one has looked at this yet

https://bugzilla.tianocore.org/show_bug.cgi?id=4482

Is it possible to have someone look into upgrading openssl 1.1.1t to 1.1.1u to 
hopefully make the 202308 stable tag relese

-miki

--
Miki Demeter (she/her/Miki)
Security Researcher / FW Developer
Tianocore Community Manager
FST
Intel Corporation

Portland Women in Tech Best Speaker
miki.deme...@intel.com
503.712.8030 (office)
971.248.0123 (cell)



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Re: [edk2-devel] [edk2-platforms][PATCH] edk2-platform: Add Readme under Platform\AMD

2023-06-15 Thread Chang, Abner via groups.io

[AMD Official Use Only - General]

> -Original Message-
> From: Leif Lindholm 
> Sent: Thursday, June 15, 2023 11:18 PM
> To: Chang, Abner ; devel@edk2.groups.io
> Cc: Michael D Kinney ; Attar, AbdulLateef
> (Abdul Lateef) ; Xing, Eric
> ; He, Jiangang ; Ard
> Biesheuvel 
> Subject: Re: [edk2-devel] [edk2-platforms][PATCH] edk2-platform: Add
> Readme under Platform\AMD
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On 2023-06-14 18:57, Chang, Abner wrote:
> > [AMD Official Use Only - General]
> >
> >> -Original Message-
> >> From: devel@edk2.groups.io  On Behalf Of Leif
> >> Lindholm via groups.io
> >> Sent: Thursday, June 15, 2023 12:13 AM
> >> To: devel@edk2.groups.io; Chang, Abner 
> >> Cc: Michael D Kinney ; Attar, AbdulLateef
> >> (Abdul Lateef) ; Xing, Eric
> >> ; He, Jiangang 
> >> Subject: Re: [edk2-devel] [edk2-platforms][PATCH] edk2-platform: Add
> >> Readme under Platform\AMD
> >>
> >> Caution: This message originated from an External Source. Use proper
> caution
> >> when opening attachments, clicking links, or responding.
> >>
> >>
> >> On 2023-06-14 05:22, Chang, Abner via groups.io wrote:
> >>> From: Abner Chang 
> >>>
> >>> For AMD edk2 opensource project and the needs
> >>> of opensource AMD platform common modules those can
> >>> be leverage across AMD business units, AMD server,
> >>> client and S3 (silicon strategic solution) BUs
> >>> have the consensus to propose AMD as the maintainer
> >>> of Platform/AMD folder. The folder and edk2 package
> >>> structure under Platform/AMD is defined in the
> >>> Readme for the further upstream works.
> >>>
> >>> We still leave the existing maintainers for
> >>> AMD OverdriveBoard which is no conflicts with this
> >>> change.
> >>>
> >>> Signed-off-by: Abner Chang 
> >>> Cc: Leif Lindholm 
> >>> Cc: Michael D Kinney 
> >>> Cc: Abdul Lateef Attar 
> >>> Cc: Eric Xing 
> >>> Cc: Jiangang He 
> >>> ---
> >>>Platform/AMD/Readme.md | 85
> >> ++
> >>>Maintainers.txt| 10 ++---
> >>>2 files changed, 90 insertions(+), 5 deletions(-)
> >>>create mode 100644 Platform/AMD/Readme.md
> >>>
> >>> diff --git a/Platform/AMD/Readme.md b/Platform/AMD/Readme.md
> >>> new file mode 100644
> >>> index 00..f39b8140f5
> >>> --- /dev/null
> >>> +++ b/Platform/AMD/Readme.md
> >>> @@ -0,0 +1,85 @@
> >>> +# AMD EDK2 Platform
> >>> +
> >>> +This is AMD folder that provides the edk2 modules to support AMD edk2
> >> firmware
> >>> +solution for the server, client (e.g., Notebook) and S3 (Strategic 
> >>> Silicon
> >> Solutions)
> >>> +platforms. The board packages under this folder are the firmware
> reference
> >> code for
> >>> +booting certain AMD platforms. The definition of sub-folders is described
> in
> >> below sections.
> >>> +
> >>> +## Term and Definitions
> >>> +
> >>> +* **AMD Platform** (platform in short)
> >>> +
> >>> +  AMD platform refers to a platform that supports the particular AMD SoC
> >> (processor), such as AMD EPYC Milan and Genoa processors.
> >>> +
> >>> +* **AMD Board** (board in short)
> >>> +
> >>> +  AMD board is a generic terminology refers to a board that is designed
> >> based on a
> >>> +  specific AMD SoC architecture (also referred as AMD platform). More
> than
> >> one boards
> >>> +  are possibly designed to support an AMD platform with different
> >> configuration, such as 1-processor socket or 2-processor sockets board.
> >>> +
> >>> +* **AMD edk2 Platform Package** (platform package in short)
> >>> +
> >>> +  The folder has the AMD edk2 platform common modules.
> >>> +
> >>> +* **AMD edk2 Board Package** (board package in short)
> >>> +
> >>> +  The folder has the edk2 meta files to build the necessary edk2 firmware
> >> modules
> >>> +  and generate the binary to run on a board.
> >>> +
> >>> +## Package Definition
> >>> +
> >>> +* **AmdPlatformPkg**
> >>> +
> >>> +  AMD platform edk2 package under this folder provides the common
> edk2
> >> modules those
> >>> +  are leverage by platforms. Usually those modules have no dependencies
> >> with
> >>> +  particular platforms. The module under this scope can provides a
> common
> >> implementation
> >>> +  for all platforms, or it may just provide a framework but the 
> >>> differences
> of
> >> implementation could be configured through the PCDs declared in
> >> AmdPlatformPkg.dec, or
> >>> +  the board level library provided in the \Pkg.
> >>> +
> >>> +* **AmdMinBoardPkg**
> >>> +
> >>> +  This package provides the common edk2 modules those can be leverage
> >> across AMD boards those use MinPlatformPkg framework.
> >>> +
> >>> +* **\Board**
> >>> +
> >>> +  This is the folder named by SoC and accommodate one or multiple
> board
> >> packages those
> >>> +  are designed base on the same SoC platform. Board folder
> >> may contain edk2
> >>> +  package meta files directly or the sub-folders named by \ >>

Re: [edk2-devel] [PATCH 0/4] OvmfPkg/RiscVVirt: Separate code and variable storage

2023-06-15 Thread Heinrich Schuchardt


On 6/15/23 13:50, Sunil V L wrote:

On Wed, Jun 14, 2023 at 07:11:18PM +0200, Heinrich Schuchardt wrote:

Sunil V L  schrieb am Mi., 14. Juni 2023, 19:01:


Recent updates to RISC-V qemu virt platform merged today (07/14),
have enabled both pflash devices for the S-mode payload like EDK2.
These updates also aligned the design similar to other architectures
where pflash0 is for read-only code and pflash1 for variable store.
Previously only pflash1 was available for S-mode use.

Current EDK2 will not work with this latest qemu changes since it always
assumed to boot from pflash1. So, separate the code and variable
store and use pflash0 to keep the code.



Not all users will have the newest QEMU provided by their Linx distro. Will
it be possible to boot the same EDK II binary on old and new QEMU
releases?


Hi Heinrich,

While both unified and separate images can not be generated at the same
time, a build flag can be used by which the user can build one of
the schemes matching qemu capabilities. Default will be separate
code and vars matching the latest qemu.

I believe this will alleviate the concern. If this looks better, let me
test and send v2.

Thanks!
Sunil


At least Debian and Ubuntu packaging relies on the separation of code 
and variables. So anyway we would not be able back-port EDK II as 
package to anything that does not have the upcoming QEMU release.


It would be helpful to document the constraints in the yet to be created 
OvmfPkg/RiscVVirt/ReadMe.rst.


Best regards

Heinrich


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Re: [edk2-devel] [edk2-platforms][PATCH] edk2-platform: Add Readme under Platform\AMD

2023-06-15 Thread Leif Lindholm


On 2023-06-14 18:57, Chang, Abner wrote:

[AMD Official Use Only - General]


-Original Message-
From: devel@edk2.groups.io  On Behalf Of Leif
Lindholm via groups.io
Sent: Thursday, June 15, 2023 12:13 AM
To: devel@edk2.groups.io; Chang, Abner 
Cc: Michael D Kinney ; Attar, AbdulLateef
(Abdul Lateef) ; Xing, Eric
; He, Jiangang 
Subject: Re: [edk2-devel] [edk2-platforms][PATCH] edk2-platform: Add
Readme under Platform\AMD

Caution: This message originated from an External Source. Use proper caution
when opening attachments, clicking links, or responding.


On 2023-06-14 05:22, Chang, Abner via groups.io wrote:

From: Abner Chang 

For AMD edk2 opensource project and the needs
of opensource AMD platform common modules those can
be leverage across AMD business units, AMD server,
client and S3 (silicon strategic solution) BUs
have the consensus to propose AMD as the maintainer
of Platform/AMD folder. The folder and edk2 package
structure under Platform/AMD is defined in the
Readme for the further upstream works.

We still leave the existing maintainers for
AMD OverdriveBoard which is no conflicts with this
change.

Signed-off-by: Abner Chang 
Cc: Leif Lindholm 
Cc: Michael D Kinney 
Cc: Abdul Lateef Attar 
Cc: Eric Xing 
Cc: Jiangang He 
---
   Platform/AMD/Readme.md | 85

++

   Maintainers.txt| 10 ++---
   2 files changed, 90 insertions(+), 5 deletions(-)
   create mode 100644 Platform/AMD/Readme.md

diff --git a/Platform/AMD/Readme.md b/Platform/AMD/Readme.md
new file mode 100644
index 00..f39b8140f5
--- /dev/null
+++ b/Platform/AMD/Readme.md
@@ -0,0 +1,85 @@
+# AMD EDK2 Platform
+
+This is AMD folder that provides the edk2 modules to support AMD edk2

firmware

+solution for the server, client (e.g., Notebook) and S3 (Strategic Silicon

Solutions)

+platforms. The board packages under this folder are the firmware reference

code for

+booting certain AMD platforms. The definition of sub-folders is described in

below sections.

+
+## Term and Definitions
+
+* **AMD Platform** (platform in short)
+
+  AMD platform refers to a platform that supports the particular AMD SoC

(processor), such as AMD EPYC Milan and Genoa processors.

+
+* **AMD Board** (board in short)
+
+  AMD board is a generic terminology refers to a board that is designed

based on a

+  specific AMD SoC architecture (also referred as AMD platform). More than

one boards

+  are possibly designed to support an AMD platform with different

configuration, such as 1-processor socket or 2-processor sockets board.

+
+* **AMD edk2 Platform Package** (platform package in short)
+
+  The folder has the AMD edk2 platform common modules.
+
+* **AMD edk2 Board Package** (board package in short)
+
+  The folder has the edk2 meta files to build the necessary edk2 firmware

modules

+  and generate the binary to run on a board.
+
+## Package Definition
+
+* **AmdPlatformPkg**
+
+  AMD platform edk2 package under this folder provides the common edk2

modules those

+  are leverage by platforms. Usually those modules have no dependencies

with

+  particular platforms. The module under this scope can provides a common

implementation

+  for all platforms, or it may just provide a framework but the differences of

implementation could be configured through the PCDs declared in
AmdPlatformPkg.dec, or

+  the board level library provided in the \Pkg.
+
+* **AmdMinBoardPkg**
+
+  This package provides the common edk2 modules those can be leverage

across AMD boards those use MinPlatformPkg framework.

+
+* **\Board**
+
+  This is the folder named by SoC and accommodate one or multiple board

packages those

+  are designed base on the same SoC platform. Board folder

may contain edk2

+  package meta files directly or the sub-folders named by \
name\>Pkg for a

+  variety configurations of a platform.
+
+* **Pkg**
+
+  This is the folder that contains edk2 package meta files for a board which is

designed base on a platform. Besides the edk2 meta files, Pkg
may also provides

+  edk2 modules which are specifically to a board.
+
+  ```
+  e.g. OverdriveBoard
+  e.g. GenoaBoard
+   |--Board1Pkg
+   |--Board2Pkg
+  ```
+
+  Below is the outline of folder structure under Platform/AMD
+
+  ```
+  Platform/AMD
+|AmdPlatformPkg
+|AmdMinBoardPkg
+|OverdriveBoard
+|GenoaBoard
+| |--Common Modules for Genoa boards
+| |--Board1Pkg
+| ||---Board specific modules
+| |--Board2Pkg
+|
+|NextGenBoard
+  |--Common Modules for the next generation
+ platform boards
+  |--Board1Pkg
+  |--Board2Pkg
+   |---Board specific modules
+  ```
+
+
+## Board Support
+Under progr

Re: [edk2-devel] enable MemoryProfile for uefi shell app

2023-06-15 Thread Rafael Machado

Hi MT



Just to understand better.

Do you have access to the BIOS code so you can compile the BIOS with
support to MemoryProfile?



As far as I can see it seems you have added the needed libraries to your
.dsc file, but to make memoryprofile working you need to have a BIOS
capable of doing that. At the BIOS you are running the required protocols
are not detected, this indicates you don't have the BIOS code compiled with
support to MemoryProfile.



In case you don’t have access to a real BIOS code or CRB, maybe you can try
using OVMF with MemoryProfile enabled (not sure if this already works, but
it may be a way).



Hope this can help.

Thanks

Rafael

Em qua., 7 de jun. de 2023 às 11:34, M.T.  escreveu:

> Hello group
>
> I'm looking for some help with MemoryProfile to catch some memory leaks in
> a custom uefi application.
>
> I followed the instructions found on:
> https://github.com/tianocore/tianocore.github.io/wiki/Memory-leak-detection-with-memory-profile-feature
>
> However I can't seem to get this to work, let me paint a more complete
> picture.
>
> My uefi app is standalone, it is not a part of any other package and has
> its own .dsc file and this is where I make all the changes to enable Memory
> Profiler.
> The memory I want to watch for is UEFI_APPLICATION, any calls to Allocate*
> functions to make sure everything has been freed accordingly, I suspect it
> has not hence the leak.
>
> So my debug build has the following Libs:
>
> MemoryAllocationLib|MdeModulePkg/Library/UefiMemoryAllocationProfileLib/UefiMemoryAllocationProfileLib.inf
>
> MemoryProfileLib|MdeModulePkg/Library/UefiMemoryAllocationProfileLib/UefiMemoryAllocationProfileLib.inf
>
> PCDs are set like this:
> gEfiMdeModulePkgTokenSpaceGuid.PcdMemoryProfilePropertyMask|0x1
> gEfiMdeModulePkgTokenSpaceGuid.PcdMemoryProfileMemoryType|0x60
> gEfiMdeModulePkgTokenSpaceGuid.PcdMemoryProfileDriverPath|{0x04, 0x06,
> 0x14, 0x00,  0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65,
> 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1, 0x7F, 0xFF, 0x04, 0x00}
>
> In Components I added:
> MdeModulePkg/Application/MemoryProfileInfo/MemoryProfileInfo.inf
>
> This also required that I add DxeServiceLib
>
> Everything builds without issues, my app runs as expected, however when I
> try to run
> MemoryProfileInfo.efi, I only get the following:
> UefiMemoryProfile: Locate MemoryProfile protocol - Not Found
> GetUefiMemoryProfileData - Not Found
> SmramProfile: Locate SmmCommunication protocol - Not Found
> GetSmramProfileData - Not Found
>
> Couple of questions about this:
> Is MemoryProfileInfo.efi supposed to be run after my app exits?
> Or is it more like a wrapper for my app (ie. valgrind)?
>
> The errors seem to indicate that the libs are still missing, are they
> supposed
> to be linked into the OVMF image as well perhaps, or anywhere else aside
> for my app?
>
> Appreciate any help, debugging third party libs has become a major
> headache and I hope
> memoryProfiler can help with this.
>
> Cheers
> mt
>
> 
>
>


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Re: [edk2-devel] [PATCH 0/4] OvmfPkg/RiscVVirt: Separate code and variable storage

2023-06-15 Thread Sunil V L

On Wed, Jun 14, 2023 at 07:11:18PM +0200, Heinrich Schuchardt wrote:
> Sunil V L  schrieb am Mi., 14. Juni 2023, 19:01:
> 
> > Recent updates to RISC-V qemu virt platform merged today (07/14),
> > have enabled both pflash devices for the S-mode payload like EDK2.
> > These updates also aligned the design similar to other architectures
> > where pflash0 is for read-only code and pflash1 for variable store.
> > Previously only pflash1 was available for S-mode use.
> >
> > Current EDK2 will not work with this latest qemu changes since it always
> > assumed to boot from pflash1. So, separate the code and variable
> > store and use pflash0 to keep the code.
> >
> 
> Not all users will have the newest QEMU provided by their Linx distro. Will
> it be possible to boot the the same EDK II binary on old and new QEMU
> releases?
> 
Hi Heinrich,

While both unified and separate images can not be generated at the same
time, a build flag can be used by which the user can build one of
the schemes matching qemu capabilities. Default will be separate
code and vars matching the latest qemu.

I believe this will alleviate the concern. If this looks better, let me
test and send v2.

Thanks!
Sunil


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[edk2-devel] [PATCH 3/3] UefiCpuPkg/ResetVector: Remove pre-built binaries

2023-06-15 Thread Ni, Ray

Because it's simpler for a platform to include the ResetVector source
and having pre-built binaries add burdens of updating the pre-built
binaries. This patch removes the pre-built binaries and the script
that buids the pre-built binaries.

Signed-off-by: Ray Ni 
Cc: Eric Dong 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
---
 .../Vtf0/Bin/IA32/ResetVector.ia32.port80.raw | Bin 532 -> 0 bytes
 .../Vtf0/Bin/IA32/ResetVector.ia32.raw| Bin 500 -> 0 bytes
 .../Vtf0/Bin/IA32/ResetVector.ia32.serial.raw | Bin 900 -> 0 bytes
 .../ResetVector/Vtf0/Bin/ResetVector.inf  |  31 --
 .../ResetVector/Vtf0/Bin/ResetVector.uni  |  16 
 .../ResetVector/Vtf0/Bin/ResetVector1G.inf|  31 --
 .../ResetVector/Vtf0/Bin/ResetVectorExtra.uni |  12 ---
 .../PageTable1G/ResetVector.x64.port80.raw| Bin 12292 -> 0 bytes
 .../Bin/X64/PageTable1G/ResetVector.x64.raw   | Bin 12292 -> 0 bytes
 .../PageTable1G/ResetVector.x64.serial.raw| Bin 12292 -> 0 bytes
 .../PageTable2M/ResetVector.x64.port80.raw| Bin 28676 -> 0 bytes
 .../Bin/X64/PageTable2M/ResetVector.x64.raw   | Bin 28676 -> 0 bytes
 .../PageTable2M/ResetVector.x64.serial.raw| Bin 28676 -> 0 bytes
 UefiCpuPkg/ResetVector/Vtf0/Build.py  |  89 --
 .../Vtf0/Tools/FixupForRawSection.py  |  20 
 UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf  |   9 ++
 16 files changed, 9 insertions(+), 199 deletions(-)
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.uni
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVectorExtra.uni
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.port80.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Build.py
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Tools/FixupForRawSection.py

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw 
b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
deleted file mode 100644
index 
a3601274c25dde665872ff375f1deadf1c838476..
GIT binary patch
literal 0
HcmV?d1

literal 532
zcmYk3L1+^}6hQxG?OGMxP=XCuO{oFvA!34x5(Ckq=%JWHDKR3&%U*@;4lLqfmnDa3
z%DNy3Djoz+o>n|`p_PoRky;N5Js1c|L|nU_OT82o$@oJN@(=(2nR&cF!+4(O*Tp(W`R7TpTmFm4ifa-;zC*vz4XttW
zq}0}nTrTTp>dYuOY`31v{#vMxZinN>X5&iA{wjokJ@1Uq(rY83f3nOGnJ7F{XGEc^
zd@axD+xj+9{H@3`dj3!J3w#sG<{Xwjw>n?7OgU*B!aQOW8fp7m--koX4wLm__Al=^
zY?o%Aovx9bx>P+cg?6!W34mnesY#x}LmFy!akfSd$Wy}(n^c!>D977;D8Mlg8>sUS
zM%JHY*m66|cf|=!l}5GTC_q`AVA|#!0!awU3V=G%^$U@u1;gOBUFLS(4fi9z>Se$~
z2tQ>Y`tp9@WdZJg*r|{I*L%>sSmAq{7b<*6qi=YE|Bg)&AL|JbKgC45A{vlk%hz|-
Oedp}VWx$=4LE;}o$@(e)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw 
b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
deleted file mode 100644
index 
6124f3f9a40e4e58cc672b54cbf5cc33360b3858..
GIT binary patch
literal 0
HcmV?d1

literal 500
zcmbO*VZsE%1G)?X3=Fmm3=IE^A{#3Nsty!~l*%?%h@7@P`lJPIy15`EBv@@}EGf-9QVcpB6tC}lR7)qCP9%hbE
zD4qM7bH{!l=sf!RU+2-6j*JWphPONKb-qaJjx}JsQDps^*`dg+^+1VH^8xlEU6mhQ
z5#rwtE0nzI_7G`&`2YWZ2F{ZucNq_sFcn>Is1RZ#o8d#>?cFW^_0sqm#nW~uGcY*tD;-FCl?{{>VA$cn#=yX@^dM~q2SeYD
zz5{&^`d;*1c8TLB`yyn{P81R}kt@Frh
trq@4TcfR!a_y7OPT|lDq!T)CvW8mcL%Md2W%&-tQh6xj1?}1AK82|{?Cv

diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw 
b/UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
deleted file mode 100644
index 
48b46e3473e77a1179bf818a1f1deafb7e46cf3e..
GIT binary patch
literal 0
HcmV?d1

literal 900
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zs%DyYCYEjns%kx~d%1K~bA<{+>5|UF%n=Hub6y9;GyisKLn%SYqvh_fT
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zPrN>Ec%buG>$g%TREMRZIfSquOa9?Efe5dqFoK*_65o74!tz9ML_-C$K#4Sv6e=<5
zmS}to@(R$u4$TLci>y`tyuRIhfF-Tb!Z)f^mw$VN4ddZP>i|~P{{8Fm
z@S*Sa?ymoOY5a`hX*-k|7##SO4y3&@1iDdxVTS`70|UR(1JnR9Mhj9SG(Kirr|sZi
z=)2K(pzlH7i@po5?Iy@GOaKJ}6o6Ti&ohAO*)Y1FVZT$rYu^2i0k1jII*+_O@aHwt
v>u)cG|Gzx{=l}ng2mk*6-}&JGGhn`gf!CKIEReBbA#My4CcNGQlLOHJZ`sQ4

dif

[edk2-devel] [PATCH 2/3] UefiCpuPkg/ResetVector: Add guidance of how to guarantee 16B align

2023-06-15 Thread Ni, Ray

ResetVector assembly implementation puts "ALIGN 16" in the end
to guarantee the final executable file size is multiple of 16 bytes.
Because the module uses a special GUID which guarantees it's put in
the very end of a FV, which should be also the end of the FD.
Then to make sure the reset vector "JMP" code is at _FFF0h, the
ResetVector has to be aligned at 16-byte boundary.

The patch updates INF file and ReadMe.txt to add guidance how to make
sure the module is aligned on 16-byte boundary.

Signed-off-by: Ray Ni 
Cc: Eric Dong 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
---
 UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt | 27 +++---
 UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf   | 19 +-
 2 files changed, 25 insertions(+), 21 deletions(-)

diff --git a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt 
b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
index 97f4600968..edeb2d6d3e 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
+++ b/UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt
@@ -1,15 +1,16 @@
 
 === HOW TO USE VTF0 ===
+Add this line to your DSC [Components.IA32] or [Components.X64] section:
+  UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf
 
 Add this line to your FDF FV section:
-INF  RuleOverride=RESET_VECTOR USE = IA32 
UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
-(For X64 SEC/PEI change IA32 to X64 => 'USE = X64')
+  INF  RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf
 
 In your FDF FFS file rules sections add:
-[Rule.Common.SEC.RESET_VECTOR]
-  FILE RAW = $(NAMED_GUID) {
-RAW RAW|.raw
-  }
+  [Rule.Common.SEC.RESET_VECTOR]
+FILE RAW = $(NAMED_GUID) {
+  RAW BIN   Align = 16   |.bin
+}
 
 === VTF0 Boot Flow ===
 
@@ -25,17 +26,3 @@ All inputs to SEC image are register based:
 EAX/RAX - Initial value of the EAX register (BIST: Built-in Self Test)
 DI  - 'BP': boot-strap processor, or 'AP': application processor
 EBP/RBP - Pointer to the start of the Boot Firmware Volume
-
-=== HOW TO BUILD VTF0 ===
-
-Dependencies:
-* Python 3 or newer
-* Nasm 2.03 or newer
-
-To rebuild the VTF0 binaries:
-1. Change to VTF0 source dir: UefiCpuPkg/ResetVector/Vtf0
-2. nasm and python should be in executable path
-3. Run this command:
-   python Build.py
-4. Binaries output will be in UefiCpuPkg/ResetVector/Vtf0/Bin
-
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf 
b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
index 9922cb2755..28185a6e60 100644
--- a/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
+++ b/UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
@@ -1,7 +1,24 @@
 ## @file
 #  Reset Vector
 #
-#  Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.
+#  Note:
+#The platform FDF file MUST guarantee the ResetVector is aligned
+#on 16-byte boundary. Otherwise, the CPU reset vector will NOT be
+#at _FFF0h.
+#
+#A sample FDF build rule could be as follows:
+#
+#  [Rule.Common.SEC.RESET_VECTOR]
+#FILE RAW = $(NAMED_GUID) {
+#  RAW BIN   Align = 16   |.bin
+#}
+#
+#Following line in FDF forces to use the above build rule for the 
ResetVector:
+#
+#  INF  RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf
+#
+#
+#  Copyright (c) 2006 - 2023, Intel Corporation. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
-- 
2.39.1.windows.1



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[edk2-devel] [PATCH 0/3] Remove pre-built ResetVector binaries

2023-06-15 Thread Ni, Ray

Ray Ni (3):
  UefiCpuPkg: Include ResetVector in DSC
  UefiCpuPkg/ResetVector: Add guidance of how to guarantee 16B align
  UefiCpuPkg/ResetVector: Remove pre-built binaries

 .../Vtf0/Bin/IA32/ResetVector.ia32.port80.raw | Bin 532 -> 0 bytes
 .../Vtf0/Bin/IA32/ResetVector.ia32.raw| Bin 500 -> 0 bytes
 .../Vtf0/Bin/IA32/ResetVector.ia32.serial.raw | Bin 900 -> 0 bytes
 .../ResetVector/Vtf0/Bin/ResetVector.inf  |  31 --
 .../ResetVector/Vtf0/Bin/ResetVector.uni  |  16 
 .../ResetVector/Vtf0/Bin/ResetVector1G.inf|  31 --
 .../ResetVector/Vtf0/Bin/ResetVectorExtra.uni |  12 ---
 .../PageTable1G/ResetVector.x64.port80.raw| Bin 12292 -> 0 bytes
 .../Bin/X64/PageTable1G/ResetVector.x64.raw   | Bin 12292 -> 0 bytes
 .../PageTable1G/ResetVector.x64.serial.raw| Bin 12292 -> 0 bytes
 .../PageTable2M/ResetVector.x64.port80.raw| Bin 28676 -> 0 bytes
 .../Bin/X64/PageTable2M/ResetVector.x64.raw   | Bin 28676 -> 0 bytes
 .../PageTable2M/ResetVector.x64.serial.raw| Bin 28676 -> 0 bytes
 UefiCpuPkg/ResetVector/Vtf0/Build.py  |  89 --
 UefiCpuPkg/ResetVector/Vtf0/ReadMe.txt|  27 ++
 .../Vtf0/Tools/FixupForRawSection.py  |  20 
 UefiCpuPkg/ResetVector/Vtf0/Vtf0.inf  |  28 +-
 UefiCpuPkg/UefiCpuPkg.dsc |   4 +-
 18 files changed, 36 insertions(+), 222 deletions(-)
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.port80.raw
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/IA32/ResetVector.ia32.serial.raw
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.uni
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector1G.inf
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVectorExtra.uni
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.port80.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable1G/ResetVector.x64.serial.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.port80.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.raw
 delete mode 100644 
UefiCpuPkg/ResetVector/Vtf0/Bin/X64/PageTable2M/ResetVector.x64.serial.raw
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Build.py
 delete mode 100644 UefiCpuPkg/ResetVector/Vtf0/Tools/FixupForRawSection.py

-- 
2.39.1.windows.1



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[edk2-devel] [PATCH 1/3] UefiCpuPkg: Include ResetVector in DSC

2023-06-15 Thread Ni, Ray

Since ResetVector source module shares the same GUID as the binary
module, the binary INF file is just removed from DSC.

Signed-off-by: Ray Ni 
Cc: Eric Dong 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
---
 UefiCpuPkg/UefiCpuPkg.dsc | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 593c11cc74..7af1c83424 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -1,7 +1,7 @@
 ## @file
 #  UefiCpuPkg Package
 #
-#  Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.
+#  Copyright (c) 2007 - 2023, Intel Corporation. All rights reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -168,7 +168,7 @@
   
SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibStm.inf
   }
   UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
-  UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf
+  UefiCpuPkg/ResetVector/Vtf0/ResetVector.inf
   UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
   UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
   
UefiCpuPkg/Library/CpuExceptionHandlerLib/UnitTest/PeiCpuExceptionHandlerLibUnitTest.inf
-- 
2.39.1.windows.1



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Re: [edk2-devel] [PATCH V3 0/8] Enable SMM perf-logging

2023-06-15 Thread Ni, Ray

I haven't got "Reviewed-by" for MdeModulePkg changes. Can Jian or Liming 
approve?

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Ni, Ray
> Sent: Tuesday, June 13, 2023 2:13 PM
> To: devel@edk2.groups.io
> Subject: [edk2-devel] [PATCH V3 0/8] Enable SMM perf-logging
> 
> To avoid impacting runtime performance, the perf-logging is
> disabled upon ExitBootServices.
> 
> Ray Ni (8):
>   UefiCpuPkg/CpuSmm: Add perf-logging for time-consuming BSP procedures
>   UefiCpuPkg/CpuSmm: Add perf-logging for MP procedures
>   MdeModulePkg/SmmCore: Add perf-logging for time-consuming procedures
>   MdeModulePkg/SmmCore: Add perf-logging for SmmDriverDispatchHandler
>   MdeModulePkg/SmmPerformanceLib: Disable perf-logging after ExitBS
>   MdeModulePkg/SmmCorePerformanceLib: Disable perf-logging at runtime
>   UefiCpuPkg/SmmCpu: Add PcdSmmApPerfLogEnable control AP perf-logging
>   MdeModulePkg/SmmCore: Perf-log PlatformHookBefore/AfterSmmDispatch
> 
>  MdeModulePkg/Core/PiSmmCore/Dispatcher.c  |   5 +-
>  MdeModulePkg/Core/PiSmmCore/PiSmmCore.c   |  19 +++-
>  MdeModulePkg/Core/PiSmmCore/Smi.c |   6 ++
>  .../SmmCorePerformanceLib.c   |  48 -
>  .../SmmCorePerformanceLib.inf |   3 +-
>  .../SmmPerformanceLib/SmmPerformanceLib.c |  63 ++-
>  .../SmmPerformanceLib/SmmPerformanceLib.inf   |   4 +
>  UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c |  42 +++-
>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c|  38 +++
>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h|   2 +
>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf  |   4 +
>  .../PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c   |  13 ++-
>  UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.c | 100
> ++
>  UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.h |  83
> +++
>  UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c|   4 +-
>  UefiCpuPkg/UefiCpuPkg.dec |   6 ++
>  16 files changed, 429 insertions(+), 11 deletions(-)
>  create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.c
>  create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.h
> 
> --
> 2.39.1.windows.1
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH] Maintainers.txt: update maintainer for CryptoPkg

[edk2-devel] [PATCH] Maintainers.txt: update maintainer for CryptoPkg

Re: [edk2-devel] [PATCH V3 8/8] MdeModulePkg/SmmCore: Perf-log PlatformHookBefore/AfterSmmDispatch

Re: [edk2-devel] [PATCH V3 6/8] MdeModulePkg/SmmCorePerformanceLib: Disable perf-logging at runtime

Re: [edk2-devel] [PATCH V3 5/8] MdeModulePkg/SmmPerformanceLib: Disable perf-logging after ExitBS

Re: [edk2-devel] [PATCH V3 4/8] MdeModulePkg/SmmCore: Add perf-logging for SmmDriverDispatchHandler

Re: [edk2-devel] [PATCH V3 3/8] MdeModulePkg/SmmCore: Add perf-logging for time-consuming procedures

Re: [edk2-devel] [PATCH 3/3] UefiCpuPkg/ResetVector: Remove pre-built binaries

Re: [edk2-devel] [PATCH v14 0/8] Adds AmdSmmCpuFeaturesLib and MmSaveStateLib

[edk2-devel] [PATCH] [edk2-staging]BaseTools/FMMT: C FMMT match new version machine defines

Re: [edk2-devel] [PATCH] OvmfPkg/README: Document Secure Boot

Re: [edk2-devel] [PATCH 1/1] Maintainers.txt: Update NetworkPkg maintainers and reviewers

Re: [edk2-devel] [PATCH 1/1] Maintainers.txt: Update NetworkPkg maintainers and reviewers

[edk2-devel] [PATCH 8/8] AlderlakeSiliconPkg/SystemAgent: Add library and driver modules

[edk2-devel] [PATCH 7/8] AlderlakeSiliconPkg/SystemAgent: Add include headers

[edk2-devel] [PATCH 6/8] AlderlakeSiliconPkg/SystemAgent: Add NVS support

[edk2-devel] [PATCH 4/8] AlderlakeSiliconPkg/Pch: Add libraries

[edk2-devel] [PATCH 3/8] AlderlakeSiliconPkg/Pch: Add include headers

[edk2-devel] [PATCH 1/8] AlderlakeSiliconPkg: Add package and library instances

[edk2-devel] [PATCH 2/8] AlderlakeSiliconPkg: Add Cpu modules

[edk2-devel] BZ-4482 Feature Request

Re: [edk2-devel] [edk2-platforms][PATCH] edk2-platform: Add Readme under Platform\AMD

Re: [edk2-devel] [PATCH 0/4] OvmfPkg/RiscVVirt: Separate code and variable storage

Re: [edk2-devel] [edk2-platforms][PATCH] edk2-platform: Add Readme under Platform\AMD

Re: [edk2-devel] enable MemoryProfile for uefi shell app

Re: [edk2-devel] [PATCH 0/4] OvmfPkg/RiscVVirt: Separate code and variable storage

[edk2-devel] [PATCH 3/3] UefiCpuPkg/ResetVector: Remove pre-built binaries

[edk2-devel] [PATCH 2/3] UefiCpuPkg/ResetVector: Add guidance of how to guarantee 16B align

[edk2-devel] [PATCH 0/3] Remove pre-built ResetVector binaries

[edk2-devel] [PATCH 1/3] UefiCpuPkg: Include ResetVector in DSC

Re: [edk2-devel] [PATCH V3 0/8] Enable SMM perf-logging

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