Re: [edk2-devel] [edk2-platforms][PATCH v1 5/5] Platform/Sgi: Extend SMBIOS support for RD-Fremont

2024-04-03 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 03 April 2024 18:33
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v1 5/5] Platform/Sgi: Extend 
SMBIOS support for RD-Fremont

Extend the SMBIOS support for RD-Fremont platform. RD-Fremont is a
16 core platform with Poseidon CPU. Each of the CPUs include
64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/Include/SgiPlatform.h | 5 
+
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 5 
-
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 5 
-
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 1 +
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 6 
++
 5 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index 6fa39d407bc9..acfa45910aed 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -51,6 +51,10 @@
 #define RD_V2_PART_NUM0x7F2
 #define RD_V2_CONF_ID 0x1

+// RD-Fremont Platform Identification values
+#define RD_Fremont_PART_NUM   0x7EE
+#define RD_Fremont_CONF_ID0x1
+
 #define SGI_CONFIG_MASK   0x0F
 #define SGI_CONFIG_SHIFT  0x1C
 #define SGI_PART_NUM_MASK 0xFFF
@@ -90,6 +94,7 @@ typedef enum {
   RdN2Cfg1,
   RdN2Cfg2,
   RdV2,
+  RdFremont,
 } ARM_RD_PRODUCT_ID;

 // Arm ProductId look-up table
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
index edf2a5f63c63..9c28b051ebc2 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
@@ -34,7 +34,8 @@
   "RdN2\0"  \
   "RdN2Cfg1\0"  \
   "RdN2Cfg2\0"  \
-  "RdV2\0"
+  "RdV2\0"  \
+  "RdFremont\0"

 typedef enum {
   ManufacturerName = 1,
@@ -74,6 +75,8 @@ STATIC GUID mSmbiosUid[] = {
   {0xd2946d07, 0x8057, 0x4c26, {0xbf, 0x53, 0x78, 0xa6, 0x5b, 0xe1, 0xc1, 
0x60}},
   /* Rd-V2 */
   {0x3b1180a3, 0x0744, 0x4194, {0xae, 0x2e, 0xed, 0xa5, 0xbc, 0x2e, 0x43, 
0x45}},
+  /* Rd-Fremont*/
+  {0x904b28d6, 0x0662, 0x11ed, {0xb9, 0x39, 0x02, 0x42, 0xac, 0x12, 0x00, 
0x02}},
 };

 /* System information */
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
index ee269f707714..c39c1553f6aa 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
@@ -44,6 +44,7 @@
   "Neoverse-N2\0"   \
   "Neoverse-N2\0"   \
   "Neoverse-V2\0"   \
+  "Neoverse-Poseidon\0" \
   "000-0\0" /* Serial number */ \
   "783-3\0" \
   "786-1\0" \
@@ -54,7 +55,8 @@
   "7B7-1\0" \
   "7B6-1\0" \
   "7B7-1\0" \
-  "7F2-1\0"
+  "7F2-1\0" \
+  "7EE-1\0"

 typedef enum {
   PartNumber = 1,
@@ -181,6 +183,7 @@ InstallType4ProcessorInformation (
   case RdN2:
   case RdN2Cfg1:
   case RdV2:
+  case RdFremont:
 mArmRdSmbiosType4.Base.CoreCount = CoreCount;
 mArmRdSmbiosType4.Base.EnabledCoreCount = CoreCount;
 mArmRdSmbiosType4.Base.ThreadCount = CoreCount;
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
index 4af72919a3f1..4cdea5b3b763 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
@@ -335,6 +335,7 @@ InstallType7CacheInformation (
 mArmRdSmbiosType7[4].Base.Associativity = CacheAssociativity16Way;
 break;
   case RdV2:
+  case RdFremont:
 /* L1 instruction cache */
 mArmRdSmbiosType7[0].Base.MaximumCacheS

Re: [edk2-devel] [edk2-platforms][PATCH v1 3/5] Platform/Sgi: Define RD-V2 platform id values

2024-04-03 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 03 April 2024 18:33
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v1 3/5] Platform/Sgi: Define RD-V2 
platform id values

From: Pranav Madhu 

Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7 ++-
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 8 +++-
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index e83853664c4c..6fa39d407bc9 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.
+*  Copyright (c) 2018 - 2024, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -47,6 +47,10 @@
 #define RD_N2_PART_NUM0x7B7
 #define RD_N2_CONF_ID 0x1

+// RD-V2 Platform Identification values
+#define RD_V2_PART_NUM0x7F2
+#define RD_V2_CONF_ID 0x1
+
 #define SGI_CONFIG_MASK   0x0F
 #define SGI_CONFIG_SHIFT  0x1C
 #define SGI_PART_NUM_MASK 0xFFF
@@ -85,6 +89,7 @@ typedef enum {
   RdN2,
   RdN2Cfg1,
   RdN2Cfg2,
+  RdV2,
 } ARM_RD_PRODUCT_ID;

 // Arm ProductId look-up table
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c 
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
index fa006320025b..14b06796ae9c 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.
+*  Copyright (c) 2018 - 2024, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -79,6 +79,12 @@ STATIC CONST SGI_PRODUCT_ID_LOOKUP SgiProductIdLookup[] = {
 RD_N2_CONF_ID,
 1
   },
+  {
+RdV2,
+RD_V2_PART_NUM,
+RD_V2_CONF_ID,
+0
+  },
 };

 EFI_BOOT_MODE
--
2.34.1



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Re: [edk2-devel] [edk2-platforms][PATCH v1 4/5] Platform/Sgi: Extend SMBIOS support for RD-V2 platform

2024-04-03 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 03 April 2024 18:33
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v1 4/5] Platform/Sgi: Extend 
SMBIOS support for RD-V2 platform

From: Pranav Madhu 

The Neoverse RD-V2 FVP platform includes 16 CPUs and each CPU has 64KB
of L1 instruction/data cache, 2MB of L2 cache and 32MB of system level
cache. Extend the SMBIOS support for RD-V2 platform with this
configuration and reuse rest of the RD-N2 SMBIOS configuration for the
RD-V2 platform.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c|  7 
+--
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c |  9 
++---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 20 
+++-
 3 files changed, 30 insertions(+), 6 deletions(-)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
index b7e2238fb39c..edf2a5f63c63 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
@@ -5,7 +5,7 @@
   Reference Design platforms. Type 1 table defines attributes of the
   overall system such as manufacturer, product name, UUID etc.

-  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+  Copyright (c) 2021 - 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent

   @par Specification Reference:
@@ -33,7 +33,8 @@
   "RdV1Mc\0"\
   "RdN2\0"  \
   "RdN2Cfg1\0"  \
-  "RdN2Cfg2\0"
+  "RdN2Cfg2\0"  \
+  "RdV2\0"

 typedef enum {
   ManufacturerName = 1,
@@ -71,6 +72,8 @@ STATIC GUID mSmbiosUid[] = {
   {0xa4941d3d, 0xfac3, 0x4ace, {0x9a, 0x7e, 0xce, 0x26, 0x76, 0x64, 0x5e, 
0xda}},
   /* Rd-N2-Cfg2*/
   {0xd2946d07, 0x8057, 0x4c26, {0xbf, 0x53, 0x78, 0xa6, 0x5b, 0xe1, 0xc1, 
0x60}},
+  /* Rd-V2 */
+  {0x3b1180a3, 0x0744, 0x4194, {0xae, 0x2e, 0xed, 0xa5, 0xbc, 0x2e, 0x43, 
0x45}},
 };

 /* System information */
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
index b59172cf1cb9..ee269f707714 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
@@ -6,7 +6,7 @@
   family, processor id, maximum operating frequency, and other information
   related to the processor.

-  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+  Copyright (c) 2021 - 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent

   @par Specification Reference:
@@ -27,7 +27,7 @@
 #define SOCKET_TYPE_BASE3
 #define SOCKET_TYPE_NUM 1
 #define PROCESSOR_VERSION_BASE  (SOCKET_TYPE_BASE + SOCKET_TYPE_NUM)
-#define PROCESSOR_VERSION_NUM   10
+#define PROCESSOR_VERSION_NUM   11
 #define SERIAL_NUMBER_BASE  (PROCESSOR_VERSION_BASE + 
PROCESSOR_VERSION_NUM)
 #define TYPE4_STRINGS   \
   "0x000\0" /* Part Number */   \
@@ -43,6 +43,7 @@
   "Neoverse-N2\0"   \
   "Neoverse-N2\0"   \
   "Neoverse-N2\0"   \
+  "Neoverse-V2\0"   \
   "000-0\0" /* Serial number */ \
   "783-3\0" \
   "786-1\0" \
@@ -52,7 +53,8 @@
   "78A-2\0" \
   "7B7-1\0" \
   "7B6-1\0" \
-  "7B7-1\0"
+  "7B7-1\0" \
+  "7F2-1\0"

 typedef enum {
   PartNumber = 1,
@@ -178,6 +180,7 @@ InstallType4ProcessorInformation (
 break;
   case RdN2:
   case RdN2Cfg1:
+  case RdV2:
 mArmRdSmbiosType4.Base.CoreCount = CoreCount;
 mArmRdSmbiosType4.Base.EnabledCoreCount = CoreCount;
 mArmRdSmbiosType4.Base.ThreadCount = CoreCount;
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
index b71ce721e2e8..4af72919a3f1 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
@@ -6,7 +6,7 @@
   implemented, cache configuration,

Re: [edk2-devel] [edk2-platforms][PATCH v1 2/5] Platform/Sgi: Use PCD value for L2 cache size in PPTT table

2024-04-03 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 03 April 2024 18:33
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v1 2/5] Platform/Sgi: Use PCD 
value for L2 cache size in PPTT table

The PcdL2CacheSize PCD specifies the size of L2 cache of the CPU.
Use the size specified by this PCD in the PPTT table of the
RD-N2 platform.

The PLAT_L2_CACHE_SIZE build time parameter is used to set the size of
the CPU's L2 cache and this allows changing the value of the L2 cache
size depending the variant of the RD-N2 platform being build. RD-V2
platform is an example of such a variant.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/RdN2/RdN2.dsc | 4 
 Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 1 +
 Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc | 4 +++-
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/RdN2/RdN2.dsc 
b/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
index 49a317a930e0..634edc2416c4 100644
--- a/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
+++ b/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
@@ -45,6 +45,10 @@ [PcdsFixedAtBuild.common]
   gArmPlatformTokenSpaceGuid.PcdCoreCount|1
   gArmPlatformTokenSpaceGuid.PcdClusterCount|16

+!ifdef $(PLAT_L2_CACHE_SIZE)
+   gArmSgiTokenSpaceGuid.PcdL2CacheSize|$(PLAT_L2_CACHE_SIZE)
+!endif
+
 

 #
 # Components Section - list of all EDK II Modules needed by this Platform
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf 
b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
index afc38385c051..fb5e6e72c9e8 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
@@ -64,6 +64,7 @@ [FixedPcd]
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
   gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base
   gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable
+  gArmSgiTokenSpaceGuid.PcdL2CacheSize
   gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip
   gArmSgiTokenSpaceGuid.PcdOscLpiEnable
   gArmSgiTokenSpaceGuid.PcdOscCppcEnable
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc 
b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
index b8cb04459be2..c37f04582f9c 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
@@ -21,6 +21,8 @@
 #include "SgiAcpiHeader.h"
 #include "SgiPlatform.h"

+#define L2_CACHE_SIZE  FixedPcdGet32 (PcdL2CacheSize)
+
 /** Define helper macro for populating processor core information.

   @param [in] PackageId Package instance number.
@@ -81,7 +83,7 @@
 EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_INIT (   
\
   PPTT_CACHE_STRUCTURE_FLAGS,   /* Flag */ 
\
   0,/* Next level of cache */  
\
-  SIZE_1MB, /* Size */ 
\
+  L2_CACHE_SIZE,/* Size */ 
\
   2048, /* Num of sets */  
\
   8,/* Associativity */
\
   PPTT_UNIFIED_CACHE_ATTR,  /* Attributes */   
\
--
2.34.1



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Re: [edk2-devel] [edk2-platforms][PATCH v1 1/5] Platform/Sgi: Add a new PCD for L2 cache size

2024-04-03 Thread levi.yun
Reviewed-by: levi.yun 


From: devel@edk2.groups.io  on behalf of Prabin CA via 
groups.io 
Sent: 03 April 2024 18:33
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; Leif Lindholm; Sami Mujawar; Thomas Abraham
Subject: [edk2-devel] [edk2-platforms][PATCH v1 1/5] Platform/Sgi: Add a new 
PCD for L2 cache size

A new PCD named PcdL2CacheSize is introduced to specify the size of the
CPU's L2 cache. This PCD can be used in PPTT tables for a reference
design platform. The default value of this PCD is set to 1MB but can be
changed depending on the variant of the reference design platform.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/SgiPlatform.dec | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec 
b/Platform/ARM/SgiPkg/SgiPlatform.dec
index af7887e54126..d540dbff2d19 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -37,6 +37,9 @@ [PcdsFixedAtBuild]
   gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x0002
   gArmSgiTokenSpaceGuid.PcdDramBlock2Size|0|UINT64|0x0003

+  # L2 Cache size
+  gArmSgiTokenSpaceGuid.PcdL2CacheSize|0x10|UINT32|0x002F
+
   # Virtio Block device
   gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress|0x|UINT32|0x0004
   gArmSgiTokenSpaceGuid.PcdVirtioBlkSize|0x|UINT32|0x0005
--
2.34.1



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Re: [edk2-devel] [PATCH V2 1/6] RedfishPkg/RedfishPlatformConfigDxe: Config language searching optimization

2024-04-03 Thread Chang, Abner via groups.io
[AMD Official Use Only - General]

Hi Nickle, I will rename it and send out the V3 together with Igor's comments 
addressed.

Thanks
Abner

> -Original Message-
> From: Nickle Wang 
> Sent: Wednesday, March 27, 2024 10:40 AM
> To: Chang, Abner ; devel@edk2.groups.io
> Cc: Igor Kulchytskyy 
> Subject: RE: [PATCH V2 1/6] RedfishPkg/RedfishPlatformConfigDxe: Config
> language searching optimization
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Hi Abner,
>
> Could we change "DescriptionStr" below to something like "XuefiString", so
> people don't think it is a regular English string of HII statement?
>
> > +  EFI_STRING_ID Description;  // String 
> > token of this
> question.
> > +  CHAR16*DescriptionStr;  // String of 
> > this question.
> > +  EFI_STRING_ID Help; // String 
> > token of help message.
>
>
> Thanks,
> Nickle
>
> > -Original Message-
> > From: abner.ch...@amd.com 
> > Sent: Tuesday, March 26, 2024 11:15 PM
> > To: devel@edk2.groups.io
> > Cc: Nickle Wang ; Igor Kulchytskyy 
> > Subject: [PATCH V2 1/6] RedfishPkg/RedfishPlatformConfigDxe: Config
> language
> > searching optimization
> >
> > External email: Use caution opening links or attachments
> >
> >
> > From: abnchang 
> >
> > Build up the x-uefi-redfish string database for the Redfish confg language
> > searching, instead of using HII String protocol.
> > This can improve the time consumption lot on searching strings.
> >
> > Signed-off-by: Abner Chang 
> > Co-authored-by: Nickle Wang 
> > Cc: Igor Kulchytskyy 
> > ---
> >  .../RedfishPlatformConfigImpl.h   | 107 ++-
> >  .../RedfishPlatformConfigDxe.c|  23 +-
> >  .../RedfishPlatformConfigImpl.c   | 820 +-
> >  3 files changed, 878 insertions(+), 72 deletions(-)
> >
> > diff --git
> a/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
> > b/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
> > index 9f4312decf5..6e6c7fdb8a9 100644
> > --- a/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
> > +++ b/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
> > @@ -2,7 +2,8 @@
> >This file defines the EDKII Redfish Platform Config Protocol private
> structure.
> >
> >(C) Copyright 2021-2022 Hewlett Packard Enterprise Development LP
> > -  Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights
> > reserved.
> > +  Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights
> > reserved.
> > +  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights
> > + reserved.
> >
> >SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > @@ -30,6 +31,10 @@
> >  #define ENGLISH_LANGUAGE_CODE  "en-US"
> >  #define X_UEFI_SCHEMA_PREFIX   "x-uefi-redfish-"
> >
> > +#define MAX_X_UEFI_REDFISH_STRING_SIZE  (128 * 2)// 128 character in
> UCS.
> > +
> > +typedef struct _REDFISH_PLATFORM_CONFIG_STATEMENT_PRIVATE
> > +REDFISH_PLATFORM_CONFIG_STATEMENT_PRIVATE;
> > +
> >  //
> >  // Definition of REDFISH_PLATFORM_CONFIG_PRIVATE.
> >  //
> > @@ -46,17 +51,49 @@ typedef struct {
> >CHAR8**SchemaList;// Schema list
> >  } REDFISH_PLATFORM_CONFIG_SCHEMA;
> >
> > +// Defines the number of elements in array #define
> > +X_UEFI_REDFISH_STRING_ARRAY_ENTRY_NUMBER  1024
> > +
> > +//
> > +// Definition of x-uefi-redfish string element.
> > +//
> > +typedef struct {
> > +  EFI_STRING_IDStringId;
> > +  CHAR16   *UcsString;
> > +} REDFISH_X_UEFI_STRINGS_ARRAY_ELEMENT;
> > +
> > +//
> > +// Discrete string array buffer, each has
> > X_UEFI_REDFISH_STRING_ARRAY_NUMBER element.
> > +//
> > +typedef struct {
> > +  LIST_ENTRY  NextArray;
> > +  REDFISH_X_UEFI_STRINGS_ARRAY_ELEMENT*ArrayEntryAddress;
> > +} REDFISH_X_UEFI_STRINGS_ARRAY;
> > +
> > +//
> > +// x-uefi-redfish string database, x-uefi-redfish language based.
> > +//
> > +typedef struct {
> > +  LIST_ENTRYNextXuefiRedfishLanguage;  
> >// Link to the
> > next suppoted x-uefi-Redfish language.
> > +  CHAR8 *XuefiRedfishLanguage; 
> >// x-uefi-redfish
> > language.
> > +  UINTN StringsArrayBlocks;
> >// Number of the
> array
> > blocks that accommodate X_UEFI_REDFISH_STRING_ARRAY_NUMBER
> > +   
> >// elements in each.
> > +  LIST_ENTRYXuefiRedfishStringArrays;  
> >// Link entry of
> x-
> > uefi-redfish string array.
> > +} REDFISH_X_UEFI_STRING_DATABASE;
> > +
> >  //
> >  // Definition of REDFISH_PLATFORM_CONFIG_FORM_SET_PRIVATE
> >  //
> >  typedef struct {
> >LIST_ENTRY   

Re: [edk2-devel] [PATCH V2 1/6] RedfishPkg/RedfishPlatformConfigDxe: Config language searching optimization

2024-04-03 Thread Chang, Abner via groups.io
[AMD Official Use Only - General]

Hi Igor, my responses to your three comments in line.

> -Original Message-
> From: Igor Kulchytskyy 
> Sent: Thursday, April 4, 2024 8:44 AM
> To: Chang, Abner ; devel@edk2.groups.io
> Cc: Nickle Wang 
> Subject: RE: [EXTERNAL] [PATCH V2 1/6]
> RedfishPkg/RedfishPlatformConfigDxe: Config language searching
> optimization
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Hi Abner,
> Sorry for that delay.
> Here is a couple of remarks.
> DescriptionStr was introduced and, I think, it can be used in
> RedfishPlatformConfigProtocolGetAttribute function instead of using
> HiiGetRedfishString.

As DescriptionStr only captures the HII string with language x-uefi, however 
RedfishPlatformConfigProtocolGetAttribute needs the human understandable string 
in Eng language, this is why we still keep using HiiGetRedfishAsciiString. 
Nickle and I, we think there is still some room to enhance 
HiiGetRedfishAsciiString later. Also, to prevent from the confusions, Nickle 
also suggested to rename DescriptionStr to XuefiDescriptionStr. I will address 
your two comments below and Nickle's as well then send out the V3 patch set.


> Also please check my comment below in NewRedfishXuefiStringArray and
> RedfishXuefiStringInsertDatabase  functions.
> Best regards,
> Igor
>
>
> -Original Message-
> From: abner.ch...@amd.com 
> Sent: Tuesday, March 26, 2024 11:15 AM
> To: devel@edk2.groups.io
> Cc: Nickle Wang ; Igor Kulchytskyy 
> Subject: [EXTERNAL] [PATCH V2 1/6] RedfishPkg/RedfishPlatformConfigDxe:
> Config language searching optimization
>
>
> **CAUTION: The e-mail below is from an external source. Please exercise
> caution before opening attachments, clicking links, or following guidance.**
>
> From: abnchang 
>
> Build up the x-uefi-redfish string database for the Redfish confg
> language searching, instead of using HII String protocol.
> This can improve the time consumption lot on searching strings.
>
> Signed-off-by: Abner Chang 
> Co-authored-by: Nickle Wang 
> Cc: Igor Kulchytskyy 
> ---
>  .../RedfishPlatformConfigImpl.h   | 107 ++-
>  .../RedfishPlatformConfigDxe.c|  23 +-
>  .../RedfishPlatformConfigImpl.c   | 820 +-
>  3 files changed, 878 insertions(+), 72 deletions(-)
>
> diff --git
> a/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
> b/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
> index 9f4312decf5..6e6c7fdb8a9 100644
> --- a/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
> +++ b/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
> @@ -2,7 +2,8 @@
>This file defines the EDKII Redfish Platform Config Protocol private 
> structure.
>
>(C) Copyright 2021-2022 Hewlett Packard Enterprise Development LP
> -  Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights
> reserved.
> +  Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights
> reserved.
> +  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
>
>SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -30,6 +31,10 @@
>  #define ENGLISH_LANGUAGE_CODE  "en-US"
>  #define X_UEFI_SCHEMA_PREFIX   "x-uefi-redfish-"
>
> +#define MAX_X_UEFI_REDFISH_STRING_SIZE  (128 * 2)// 128 character in
> UCS.
> +
> +typedef struct _REDFISH_PLATFORM_CONFIG_STATEMENT_PRIVATE
> REDFISH_PLATFORM_CONFIG_STATEMENT_PRIVATE;
> +
>  //
>  // Definition of REDFISH_PLATFORM_CONFIG_PRIVATE.
>  //
> @@ -46,17 +51,49 @@ typedef struct {
>CHAR8**SchemaList;// Schema list
>  } REDFISH_PLATFORM_CONFIG_SCHEMA;
>
> +// Defines the number of elements in array
> +#define X_UEFI_REDFISH_STRING_ARRAY_ENTRY_NUMBER  1024
> +
> +//
> +// Definition of x-uefi-redfish string element.
> +//
> +typedef struct {
> +  EFI_STRING_IDStringId;
> +  CHAR16   *UcsString;
> +} REDFISH_X_UEFI_STRINGS_ARRAY_ELEMENT;
> +
> +//
> +// Discrete string array buffer, each has
> X_UEFI_REDFISH_STRING_ARRAY_NUMBER element.
> +//
> +typedef struct {
> +  LIST_ENTRY  NextArray;
> +  REDFISH_X_UEFI_STRINGS_ARRAY_ELEMENT*ArrayEntryAddress;
> +} REDFISH_X_UEFI_STRINGS_ARRAY;
> +
> +//
> +// x-uefi-redfish string database, x-uefi-redfish language based.
> +//
> +typedef struct {
> +  LIST_ENTRYNextXuefiRedfishLanguage;
>  // Link to the
> next suppoted x-uefi-Redfish language.
> +  CHAR8 *XuefiRedfishLanguage;   
>  // x-uefi-redfish
> language.
> +  UINTN StringsArrayBlocks;  
>  // Number of the array
> blocks that accommodate X_UEFI_REDFISH_STRING_ARRAY_NUMBER
> + 
>  // elements in each.
> +  LIST_ENTRYXuefiRedfishStringArrays;   

Re: [edk2-devel] [PATCH V2 1/6] RedfishPkg/RedfishPlatformConfigDxe: Config language searching optimization

2024-04-03 Thread Igor Kulchytskyy via groups.io
Hi Abner,
Sorry for that delay.
Here is a couple of remarks.
DescriptionStr was introduced and, I think, it can be used in 
RedfishPlatformConfigProtocolGetAttribute function instead of using 
HiiGetRedfishString.
Also please check my comment below in NewRedfishXuefiStringArray and 
RedfishXuefiStringInsertDatabase  functions.
Best regards,
Igor


-Original Message-
From: abner.ch...@amd.com 
Sent: Tuesday, March 26, 2024 11:15 AM
To: devel@edk2.groups.io
Cc: Nickle Wang ; Igor Kulchytskyy 
Subject: [EXTERNAL] [PATCH V2 1/6] RedfishPkg/RedfishPlatformConfigDxe: Config 
language searching optimization


**CAUTION: The e-mail below is from an external source. Please exercise caution 
before opening attachments, clicking links, or following guidance.**

From: abnchang 

Build up the x-uefi-redfish string database for the Redfish confg
language searching, instead of using HII String protocol.
This can improve the time consumption lot on searching strings.

Signed-off-by: Abner Chang 
Co-authored-by: Nickle Wang 
Cc: Igor Kulchytskyy 
---
 .../RedfishPlatformConfigImpl.h   | 107 ++-
 .../RedfishPlatformConfigDxe.c|  23 +-
 .../RedfishPlatformConfigImpl.c   | 820 +-
 3 files changed, 878 insertions(+), 72 deletions(-)

diff --git a/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h 
b/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
index 9f4312decf5..6e6c7fdb8a9 100644
--- a/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
+++ b/RedfishPkg/RedfishPlatformConfigDxe/RedfishPlatformConfigImpl.h
@@ -2,7 +2,8 @@
   This file defines the EDKII Redfish Platform Config Protocol private 
structure.

   (C) Copyright 2021-2022 Hewlett Packard Enterprise Development LP
-  Copyright (c) 2022-2023, NVIDIA CORPORATION & AFFILIATES. All rights 
reserved.
+  Copyright (c) 2022-2024, NVIDIA CORPORATION & AFFILIATES. All rights 
reserved.
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -30,6 +31,10 @@
 #define ENGLISH_LANGUAGE_CODE  "en-US"
 #define X_UEFI_SCHEMA_PREFIX   "x-uefi-redfish-"

+#define MAX_X_UEFI_REDFISH_STRING_SIZE  (128 * 2)// 128 character in UCS.
+
+typedef struct _REDFISH_PLATFORM_CONFIG_STATEMENT_PRIVATE 
REDFISH_PLATFORM_CONFIG_STATEMENT_PRIVATE;
+
 //
 // Definition of REDFISH_PLATFORM_CONFIG_PRIVATE.
 //
@@ -46,17 +51,49 @@ typedef struct {
   CHAR8**SchemaList;// Schema list
 } REDFISH_PLATFORM_CONFIG_SCHEMA;

+// Defines the number of elements in array
+#define X_UEFI_REDFISH_STRING_ARRAY_ENTRY_NUMBER  1024
+
+//
+// Definition of x-uefi-redfish string element.
+//
+typedef struct {
+  EFI_STRING_IDStringId;
+  CHAR16   *UcsString;
+} REDFISH_X_UEFI_STRINGS_ARRAY_ELEMENT;
+
+//
+// Discrete string array buffer, each has X_UEFI_REDFISH_STRING_ARRAY_NUMBER 
element.
+//
+typedef struct {
+  LIST_ENTRY  NextArray;
+  REDFISH_X_UEFI_STRINGS_ARRAY_ELEMENT*ArrayEntryAddress;
+} REDFISH_X_UEFI_STRINGS_ARRAY;
+
+//
+// x-uefi-redfish string database, x-uefi-redfish language based.
+//
+typedef struct {
+  LIST_ENTRYNextXuefiRedfishLanguage; 
// Link to the next suppoted x-uefi-Redfish language.
+  CHAR8 *XuefiRedfishLanguage;
// x-uefi-redfish language.
+  UINTN StringsArrayBlocks;   
// Number of the array blocks that accommodate 
X_UEFI_REDFISH_STRING_ARRAY_NUMBER
+  
// elements in each.
+  LIST_ENTRYXuefiRedfishStringArrays; 
// Link entry of x-uefi-redfish string array.
+} REDFISH_X_UEFI_STRING_DATABASE;
+
 //
 // Definition of REDFISH_PLATFORM_CONFIG_FORM_SET_PRIVATE
 //
 typedef struct {
   LIST_ENTRYLink;
-  HII_FORMSET   *HiiFormSet; // Pointer to HII formset 
data.
-  EFI_GUID  Guid;// Formset GUID.
-  EFI_HII_HANDLEHiiHandle;   // Hii Handle of this 
formset.
-  LIST_ENTRYHiiFormList; // Form list that keep 
form data under this formset.
-  CHAR16*DevicePathStr;  // Device path of this 
formset.
-  REDFISH_PLATFORM_CONFIG_SCHEMASupportedSchema; // Schema that is 
supported in this formset.
+  HII_FORMSET   *HiiFormSet;// Pointer to 
HII formset data.
+  EFI_GUID  Guid;   // Formset 
GUID.
+  EFI_HII_HANDLEHiiHandle;  // Hii Handle 
of this formset.
+  EFI_HII_PACKAGE_LIST_HEADER   *HiiPackageListHeader;  // Hii Package 
list header.
+  LIST_ENTRYHiiFormList;// Form list 
that k

Re: [edk2-devel] Call or topics for April TianoCore Community Meeting

2024-04-03 Thread Michael D Kinney
MdeModulePkg has many different reviewers for different subsets.

We should also consider seeing if any of those reviewers that
are responsible for different subsets of MdeModulePkg would be 
willing to be a backup maintainer for the MdeModulePkg.

Zhiguang Liu  [LiuZhiguang001]
Dandan Bi  [dandanbi]
Zhichao Gao  [ZhichaoGao]
Ray Ni  [niruiyu]
Jiaxin Wu  [jiaxinwu]
Star Zeng  [lzeng14]
Gua Guo  [gguo11837463]
Prakashan Krishnadas Veliyathuparambil 
 [kprakas2]
K N Karthik  [karthikkabbigere1]
Richard Ho  [richardho]
Rebecca Cran  [bcran]
Abdul Lateef Attar  [abdattar]
Nickle Wang  [nicklela]

Mike

> -Original Message-
> From: Oliver Smith-Denny 
> Sent: Wednesday, April 3, 2024 3:02 PM
> To: devel@edk2.groups.io; Kinney, Michael D
> ; Ard Biesheuvel 
> Subject: Re: [edk2-devel] Call or topics for April TianoCore Community
> Meeting
> 
> On 4/3/2024 1:38 PM, Michael D Kinney wrote:
> > Hi Oliver,
> >
> > I missed this response.  Did not show up in thread for some reason.
> 
> No worries.
> 
> >
> > But we can continue these topics on email.
> >
> > The TianoCore roles and responsibilities are documented here:
> >
> > https://github.com/tianocore/tianocore.github.io/wiki/TianoCore-
> Who-we-are
> >
> > If there are maintainers are not following their responsibilities,
> then
> > please let us know and we can work together to find additional
> maintainers.
> 
> Thanks, as I've mentioned in several of my last patches to
> MdeModulePkg,
> I think we need an additional top level maintainer there who is
> currently active. Liming has obviously been a huge part of edk2, but
> has
> many roles and has been quiet on MdeModulePkg patches for over a
> month.
> His input is greatly valued, but it seems he could use some help
> maintaining the package so we can keep up developer flow, I had
> multiple
> patches that contained items such as fixes for UEFI spec violations
> and
> boot breaks that were sitting with multiple reviews that were not
> getting the maintainer review and merging in.
> 
> I think it would be very valuable to have a second MdeModulePkg top
> level maintainer in any case, this covers areas such as DxeCore that
> are some of the most central and complex parts of the code base and
> bugs there need immediate resolution.
> 
> I don't want to put him on the spot, but I would be tempted to
> nominate Ard, if he wants the added responsibility, as he is very
> knowledgeable in UEFI and one of the few people who actively reviews
> patches closely and timely. If he does not want the additional
> maintenance burden, then I would ask the stewards to help find
> a community member to take on this role with Liming.
> 
> >
> > There is not much progress on PR process.  We need resources to work
> on the
> > list of action items documented here:
> >
> > https://github.com/orgs/tianocore/projects/5
> 
> Thanks for this pointer, I know the majority of active community
> members report in many different forums that moving to PRs is
> critical and I am confident that as a community we can make this
> happen.
> 
> Thanks,
> Oliver


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Re: [edk2-devel] Call or topics for April TianoCore Community Meeting

2024-04-03 Thread Oliver Smith-Denny

On 4/3/2024 1:38 PM, Michael D Kinney wrote:

Hi Oliver,

I missed this response.  Did not show up in thread for some reason.


No worries.



But we can continue these topics on email.

The TianoCore roles and responsibilities are documented here:


https://github.com/tianocore/tianocore.github.io/wiki/TianoCore-Who-we-are

If there are maintainers are not following their responsibilities, then
please let us know and we can work together to find additional maintainers.


Thanks, as I've mentioned in several of my last patches to MdeModulePkg,
I think we need an additional top level maintainer there who is
currently active. Liming has obviously been a huge part of edk2, but has
many roles and has been quiet on MdeModulePkg patches for over a month.
His input is greatly valued, but it seems he could use some help
maintaining the package so we can keep up developer flow, I had multiple
patches that contained items such as fixes for UEFI spec violations and
boot breaks that were sitting with multiple reviews that were not
getting the maintainer review and merging in.

I think it would be very valuable to have a second MdeModulePkg top
level maintainer in any case, this covers areas such as DxeCore that
are some of the most central and complex parts of the code base and
bugs there need immediate resolution.

I don't want to put him on the spot, but I would be tempted to
nominate Ard, if he wants the added responsibility, as he is very
knowledgeable in UEFI and one of the few people who actively reviews
patches closely and timely. If he does not want the additional
maintenance burden, then I would ask the stewards to help find
a community member to take on this role with Liming.



There is not much progress on PR process.  We need resources to work on the
list of action items documented here:

https://github.com/orgs/tianocore/projects/5


Thanks for this pointer, I know the majority of active community
members report in many different forums that moving to PRs is
critical and I am confident that as a community we can make this
happen.

Thanks,
Oliver


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[edk2-devel] [PATCH v4 3/3] ShellPkg: UefiShellDebug1CommandsLib: Conformance Profiles in Dmem.c

2024-04-03 Thread Sam Kaynor
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352

Implemented dumping of the UEFI Conformance Profiles Table using Dmem.c
Additionally added the base support for the table with new
header file ConformanceProfiles.h (Cc'd maintainers of MdePkg for this)

Cc: Ray Ni 
Cc: Zhichao Gao 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Signed-off-by: Sam Kaynor 
---

Notes:
v3:
- fixed build errors
- properly using Address variable
- removed unecessary comment in header file

 MdePkg/MdePkg.dec  |  
5 ++
 ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf |  
3 +
 MdePkg/Include/Guid/ConformanceProfiles.h  | 
56 
 ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c | 
69 
 ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni |  
5 ++
 5 files changed, 138 insertions(+)

diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index 0c18e1decd51..861838c148f3 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -746,6 +746,11 @@ [Guids]
   ## Include/Guid/DeviceAuthentication.h
   gEfiDeviceSignatureDatabaseGuid  = { 0xb9c2b4f4, 0xbf5f, 0x462d, {0x8a, 
0xdf, 0xc5, 0xc7, 0xa, 0xc3, 0x5d, 0xad }}
 
+  ## Include/Guid/ConformanceProfiles.h
+  gEfiConfProfilesTableGuid= { 0x36122546, 0xf7e7, 0x4c8f, { 0xbd, 
0x9b, 0xeb, 0x85, 0x25, 0xb5, 0x0c, 0x0b }}
+  gEfiConfProfilesUefiSpecGuid = { 0x523c91af, 0xa195, 0x4382, { 0x81, 
0x8d, 0x29, 0x5f, 0xe4, 0x00, 0x64, 0x65 }}
+  gEfiConfProfilesEbbrSpecGuid = { 0xcce33c35, 0x74ac, 0x4087, { 0xbc, 
0xe7, 0x8b, 0x29, 0xb0, 0x2e, 0xeb, 0x27 }}
+
   #
   # GUID defined in PI1.0
   #
diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
index 3741dac5d94c..172ac2862ba1 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
@@ -139,3 +139,6 @@ [Guids]
   gEfiJsonConfigDataTableGuid ## SOMETIMES_CONSUMES ## SystemTable
   gEfiJsonCapsuleDataTableGuid## SOMETIMES_CONSUMES ## SystemTable
   gEfiJsonCapsuleResultTableGuid  ## SOMETIMES_CONSUMES ## SystemTable
+  gEfiConfProfilesTableGuid   ## SOMETIMES_CONSUMES ## SystemTable
+  gEfiConfProfilesUefiSpecGuid## SOMETIMES_CONSUMES ## GUID
+  gEfiConfProfilesEbbrSpecGuid## SOMETIMES_CONSUMES ## GUID
diff --git a/MdePkg/Include/Guid/ConformanceProfiles.h 
b/MdePkg/Include/Guid/ConformanceProfiles.h
new file mode 100644
index ..c6211d63d79c
--- /dev/null
+++ b/MdePkg/Include/Guid/ConformanceProfiles.h
@@ -0,0 +1,56 @@
+/** @file
+  Legal information
+
+**/
+
+#ifndef __CONFORMANCE_PROFILES_TABLE_GUID_H__
+#define __CONFORMANCE_PROFILES_TABLE_GUID_H__
+
+
+//
+// This table allows the platform to advertise its UEFI specification 
conformance
+// in the form of pre-defined profiles. Each profile is identified by a GUID, 
with
+// known profiles listed in the section below.
+// The absence of this table shall indicate that the platform implementation is
+// conformant with the UEFI specification requirements, as defined in Section 
2.6.
+// This is equivalent to publishing this configuration table with the
+// EFI_CONFORMANCE_PROFILES_UEFI_SPEC_GUID conformance profile.
+//
+#define EFI_CONFORMANCE_PROFILES_TABLE_GUID \
+  { \
+0x36122546, 0xf7e7, 0x4c8f, { 0xbd, 0x9b, 0xeb, 0x85, 0x25, 0xb5, 0x0c, 
0x0b } \
+  }
+
+#pragma pack(1)
+
+typedef struct {
+  ///
+  /// Version of the table must be 0x1
+  ///
+  UINT16 Version;
+  ///
+  /// The number of profiles GUIDs present in ConformanceProfiles
+  ///
+  UINT16 NumberOfProfiles;
+  ///
+  /// An array of conformance profile GUIDs that are supported by this system.
+  /// EFI_GUIDConformanceProfiles[];
+  ///
+} EFI_CONFORMANCE_PROFILES_TABLE;
+
+#define EFI_CONFORMANCE_PROFILES_TABLE_VERSION 0x1
+
+//
+// GUID defined in spec.
+//
+#define EFI_CONFORMANCE_PROFILES_UEFI_SPEC_GUID \
+{ 0x523c91af, 0xa195, 0x4382, \
+{ 0x81, 0x8d, 0x29, 0x5f, 0xe4, 0x00, 0x64, 0x65 }}
+#define EFI_CONFORMANCE_PROFILE_EBBR_2_1_GUID \
+{ 0xcce33c35, 0x74ac, 0x4087, \
+{ 0xbc, 0xe7, 0x8b, 0x29, 0xb0, 0x2e, 0xeb, 0x27 }}
+
+extern EFI_GUID  gEfiConfProfilesTableGuid;
+extern EFI_GUID  gEfiConfProfilesUefiSpecGuid;
+
+#endif
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
index 813759a9055d..2618402bc714 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
@@ -19,6 +19,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /**
   Make a printable character.
@@ -268,7 +269,67 @@ DisplayImageExecutionEntries (
   return (ShellStatus);
 }
 
+/**
+  Display the ConformancePr

[edk2-devel] [PATCH v4 0/3] Adding support for verbose UEFI Table dumping to Dmem.c

2024-04-03 Thread Sam Kaynor
This adds an additional option to the dmem UEFI shell command for verbose 
dumping of a couple of UEFI tables.

The tables specified are the RT Properties Table, the Image Execution Table, 
and the Conformance Profiles table.

Supporting objects are added in the .inf and .uni files relating to Dmem.c and 
an additional header file for the Conformance Profiles table was added.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352

v3->v4:
- Resolved crash when RT Properties table isn't present
- Added output to help command to include -verbose option
- Changed Image Exe Table output to more closely match spec

Cc: Ray Ni 
Cc: Zhichao Gao 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Stuart Yoder 
Signed-off-by: Sam Kaynor 

Sam Kaynor (3):
  ShellPkg: UefiShellDebug1CommandsLib: Dumping RT Properties in Dmem.c
  ShellPkg: UefiShellDebug1CommandsLib: Image Execution Table in Dmem.c
  ShellPkg: UefiShellDebug1CommandsLib: Conformance Profiles in Dmem.c

 MdePkg/MdePkg.dec  |   
5 +
 ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf |   
3 +
 MdePkg/Include/Guid/ConformanceProfiles.h  |  
56 +
 ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c | 
266 
 ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni |  
31 ++-
 5 files changed, 359 insertions(+), 2 deletions(-)
 create mode 100644 MdePkg/Include/Guid/ConformanceProfiles.h

-- 
2.34.1



[edk2-devel] [PATCH v4 2/3] ShellPkg: UefiShellDebug1CommandsLib: Image Execution Table in Dmem.c

2024-04-03 Thread Sam Kaynor
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352

Implemented dumping of the Image Execution Table using Dmem.c

Cc: Ray Ni 
Cc: Zhichao Gao 
Signed-off-by: Sam Kaynor 
---

Notes:
v4:
- changed Image Execution output to match spec
v3:
- fixed build erros
- added setwidth formatting to output
- properly using Address variable

 ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c | 
134 
 ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni |   
3 +
 2 files changed, 137 insertions(+)

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
index 52a0630f1cdc..813759a9055d 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
@@ -139,6 +139,137 @@ DisplayRtProperties (
   return (ShellStatus);
 }
 
+/**
+  Retrieve the ImageExecutionTable Entry ImageName from Device Path
+
+  @param[in] AddressThe pointer to the ImageExecutionTable.
+**/
+EFI_STATUS
+GetBaseName (
+  IN  CHAR16  *FileName,
+  OUT CHAR16  **BaseName
+  )
+{
+  UINT32  StrLen;
+  CHAR16  *StrTail;
+
+  StrLen = StrSize(FileName);
+
+  for (StrTail = FileName + StrLen - 1; StrTail != FileName && *StrTail != 
L'\\'; StrTail--) {
+  }
+
+  if (StrTail == FileName) {
+return EFI_NOT_FOUND;
+  }
+  *BaseName = StrTail+1;
+
+  return EFI_SUCCESS;
+}
+
+/**
+  Retrieve the ImageExecutionTable entries
+
+  @param[in] AddressThe pointer to the ImageExecutionTable.
+**/
+EFI_STATUS
+GetImageExecutionInfo (
+  IN UINT64 Address
+  )
+{
+  EFI_STATUS Status;
+  EFI_IMAGE_EXECUTION_INFO_TABLE *ExecInfoTablePtr;
+  EFI_IMAGE_EXECUTION_INFO   *InfoPtr;
+  VOID   *ptr;
+  CHAR16 *ImagePath;
+  CHAR16 *ImageName;
+  UINTN  *NumberOfImages;
+  CHAR16 *ActionType;
+
+  ExecInfoTablePtr = (EFI_IMAGE_EXECUTION_INFO_TABLE *)Address;
+
+  NumberOfImages = &ExecInfoTablePtr->NumberOfImages;
+
+  ptr = (VOID *)(ExecInfoTablePtr + 1);
+
+  for (int Image = 0; Image < *NumberOfImages; Image++, ptr += 
InfoPtr->InfoSize) {
+InfoPtr = ptr;
+ImagePath = (CHAR16*)(InfoPtr + 1);
+
+GetBaseName(ImagePath,&ImageName);
+
+switch(InfoPtr->Action) {
+  case EFI_IMAGE_EXECUTION_AUTHENTICATION:
+ActionType = L"AUTHENTICATION";
+break;
+  case EFI_IMAGE_EXECUTION_AUTH_UNTESTED:
+ActionType = L"AUTH_UNTESTED";
+break;
+  case EFI_IMAGE_EXECUTION_AUTH_SIG_FAILED:
+ActionType = L"AUTH_SIG_FAILED";
+break;
+  case EFI_IMAGE_EXECUTION_AUTH_SIG_PASSED:
+ActionType = L"AUTH_SIG_PASSED";
+break;
+  case EFI_IMAGE_EXECUTION_AUTH_SIG_NOT_FOUND:
+ActionType = L"AUTH_SIG_NOT_FOUND";
+break;
+  case EFI_IMAGE_EXECUTION_AUTH_SIG_FOUND:
+ActionType = L"AUTH_SIG_FOUND";
+break;
+  case EFI_IMAGE_EXECUTION_POLICY_FAILED:
+ActionType = L"POLICY_FAILED";
+break;
+  case EFI_IMAGE_EXECUTION_INITIALIZED:
+ActionType = L"INITIALIZED";
+break;
+  default:
+ActionType = L"invalid action";
+}
+
+Status = ShellPrintHiiEx(
+  -1,
+  -1,
+  NULL,
+  STRING_TOKEN (STR_DMEM_IMG_EXE_ENTRY),
+  gShellDebug1HiiHandle,
+  ImageName,
+  ActionType
+);
+  }
+
+  return Status;
+}
+
+/**
+  Display the ImageExecutionTable entries
+
+  @param[in] AddressThe pointer to the ImageExecutionTable.
+**/
+SHELL_STATUS
+DisplayImageExecutionEntries (
+  IN UINT64 Address
+  )
+{
+  SHELL_STATUSShellStatus;
+  EFI_STATUS  Status;
+
+  ShellStatus = SHELL_SUCCESS;
+
+  if (Address != 0) {
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_IMG_EXE_TABLE), 
gShellDebug1HiiHandle);
+Status = GetImageExecutionInfo(Address);
+if (EFI_ERROR (Status)) {
+  ShellStatus = SHELL_ABORTED;
+  ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_ERR_GET_FAIL), 
gShellDebug1HiiHandle, L"ImageExecutionTable");
+}
+  } else {
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_ERR_NOT_FOUND), 
gShellDebug1HiiHandle, L"ImageExecutionTable");
+  }
+  return (ShellStatus);
+}
+
+
+
 STATIC CONST SHELL_PARAM_ITEM  ParamList[] = {
   { L"-mmio", TypeFlag },
   { L"-verbose", TypeFlag },
@@ -369,6 +500,9 @@ ShellCommandRunDmem (
   if (ShellStatus == SHELL_SUCCESS) {
 ShellStatus = DisplayRtProperties (RtPropertiesTableAddress);
   }
+  if (ShellStatus == SHELL_SUCCESS) {
+ShellStatus = DisplayImageExecutionEntries 
(ImageExecutionTableAddress);
+  }
 }
 
   } else {
diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1Com

[edk2-devel] [PATCH v4 1/3] ShellPkg: UefiShellDebug1CommandsLib: Dumping RT Properties in Dmem.c

2024-04-03 Thread Sam Kaynor
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352

Implemented the dumping of the UEFI RT Properties Table using Dmem.c

Added new entry to the help command for the -verbose option

Cc: Ray Ni 
Cc: Zhichao Gao 
Signed-off-by: Sam Kaynor 
---

Notes:
v4:
- fixed crash when RTProperties table not present
- expanded help output to include -verbose option
v3:
- fixed build errors
- properly using Address variable

 ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c | 
63 
 ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni | 
23 ++-
 2 files changed, 84 insertions(+), 2 deletions(-)

diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
index a609971f345e..52a0630f1cdc 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
@@ -84,8 +84,64 @@ DisplayMmioMemory (
   return (ShellStatus);
 }
 
+/**
+  Display the RtPropertiesTable entries
+
+  @param[in] AddressThe pointer to the RtPropertiesTable.
+**/
+SHELL_STATUS
+DisplayRtProperties (
+  IN UINT64 Address
+  )
+{
+  EFI_RT_PROPERTIES_TABLE *RtPropertiesTable;
+  UINT32  RtServices;
+  SHELL_STATUSShellStatus;
+  EFI_STATUS  Status;
+
+  ShellStatus = SHELL_SUCCESS;
+
+  if (Address != 0) {
+RtPropertiesTable = (EFI_RT_PROPERTIES_TABLE *)Address;
+
+RtServices = (UINT32)RtPropertiesTable->RuntimeServicesSupported;
+Status = ShellPrintHiiEx (
+  -1,
+  -1,
+  NULL,
+  STRING_TOKEN (STR_DMEM_RT_PROPERTIES),
+  gShellDebug1HiiHandle,
+  EFI_RT_PROPERTIES_TABLE_VERSION,
+  (RtServices & EFI_RT_SUPPORTED_GET_TIME) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_SET_TIME) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_GET_WAKEUP_TIME) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_SET_WAKEUP_TIME) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_GET_VARIABLE) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_GET_NEXT_VARIABLE_NAME) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_SET_VARIABLE) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_SET_VIRTUAL_ADDRESS_MAP) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_CONVERT_POINTER) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_GET_NEXT_HIGH_MONOTONIC_COUNT) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_RESET_SYSTEM) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_UPDATE_CAPSULE) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_QUERY_CAPSULE_CAPABILITIES) ? 1 : 0,
+  (RtServices & EFI_RT_SUPPORTED_QUERY_VARIABLE_INFO) ? 1 : 0
+  );
+
+if (EFI_ERROR (Status)) {
+  ShellStatus = SHELL_ABORTED;
+  ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_ERR_GET_FAIL), 
gShellDebug1HiiHandle, L"RtPropertiesTable");
+}
+  } else {
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_ERR_NOT_FOUND), 
gShellDebug1HiiHandle, L"RtPropertiesTable");
+  }
+
+  return (ShellStatus);
+}
+
 STATIC CONST SHELL_PARAM_ITEM  ParamList[] = {
   { L"-mmio", TypeFlag },
+  { L"-verbose", TypeFlag },
   { NULL, TypeMax  }
 };
 
@@ -308,6 +364,13 @@ ShellCommandRunDmem (
 ConformanceProfileTableAddress
 );
 }
+
+if (ShellCommandLineGetFlag (Package, L"-verbose")) {
+  if (ShellStatus == SHELL_SUCCESS) {
+ShellStatus = DisplayRtProperties (RtPropertiesTableAddress);
+  }
+}
+
   } else {
 ShellStatus = DisplayMmioMemory (Address, (UINTN)Size);
   }
diff --git 
a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni 
b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni
index 4041f0cd483e..a2241614f109 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni
@@ -126,8 +126,26 @@
   "Memory Range Capsule
  %016LX\r\n"
   "Hii Database Export Buffer  
  %016LX\r\n"
   "Conformance Profile Table   
  %016LX\r\n"
-
-
+#string STR_DMEM_RT_PROPERTIES#language en-US "\r\nRT Properties Table\r\n"
+  
"\r\n"
+  "Version   
0x%01LX\r\n"
+  "Runtime Services 
Supported:\r\n"
+  "  GET_TIME  
   %d\r\n"
+  "  GET_WAKEUP_TIME   
   %d\r\n"
+  "  SET_TIME  
   %d\r\n"
+  "  SET_WAKEUP_TIME   
  

Re: [edk2-devel] Call or topics for April TianoCore Community Meeting

2024-04-03 Thread Michael Kubacki

Hi Mike,

Thanks for continuing to use that project. I haven't seen many updates 
but my understanding is that you've worked on some of the items since we 
last talked.


Could you please take a look through and see what items you can update? 
Mostly these types of updates:


- Check that current task ownership is accurate
- Check that task details and status is up-to-date
- Provide more information about open requirements where needed

If that's done, it would help set us up either for a discussion to 
onboard those interested and/or start assigning work.


- Michael

On 4/3/2024 4:38 PM, Michael D Kinney wrote:

Hi Oliver,

I missed this response.  Did not show up in thread for some reason.

But we can continue these topics on email.

The TianoCore roles and responsibilities are documented here:


https://github.com/tianocore/tianocore.github.io/wiki/TianoCore-Who-we-are

If there are maintainers are not following their responsibilities, then
please let us know and we can work together to find additional maintainers.

There is not much progress on PR process.  We need resources to work on the
list of action items documented here:

https://github.com/orgs/tianocore/projects/5

Mike


-Original Message-
From: Oliver Smith-Denny 
Sent: Wednesday, April 3, 2024 10:25 AM
To: devel@edk2.groups.io; Kinney, Michael D

Subject: Re: [edk2-devel] Call or topics for April TianoCore Community
Meeting

Hi Mike,

My two topics would be PRs and lack of maintainer response, the proper
process there, etc.

Thanks,
Oliver

On 4/2/2024 5:12 PM, Michael D Kinney wrote:

Please let me know if you have any topics for the TianoCore

Community

Meeting this month.

Thanks,

Mike
















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Re: [edk2-devel] Call or topics for April TianoCore Community Meeting

2024-04-03 Thread Michael D Kinney
Hi Oliver,

I missed this response.  Did not show up in thread for some reason.

But we can continue these topics on email.

The TianoCore roles and responsibilities are documented here:


https://github.com/tianocore/tianocore.github.io/wiki/TianoCore-Who-we-are

If there are maintainers are not following their responsibilities, then
please let us know and we can work together to find additional maintainers.

There is not much progress on PR process.  We need resources to work on the
list of action items documented here:

https://github.com/orgs/tianocore/projects/5

Mike

> -Original Message-
> From: Oliver Smith-Denny 
> Sent: Wednesday, April 3, 2024 10:25 AM
> To: devel@edk2.groups.io; Kinney, Michael D
> 
> Subject: Re: [edk2-devel] Call or topics for April TianoCore Community
> Meeting
> 
> Hi Mike,
> 
> My two topics would be PRs and lack of maintainer response, the proper
> process there, etc.
> 
> Thanks,
> Oliver
> 
> On 4/2/2024 5:12 PM, Michael D Kinney wrote:
> > Please let me know if you have any topics for the TianoCore
> Community
> > Meeting this month.
> >
> > Thanks,
> >
> > Mike
> >
> >
> >
> >
> >
> > 
> >


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[edk2-devel] Cancelled Event: TianoCore Community Meeting - APAC/NAMO - Thursday, April 4, 2024 #cal-cancelled

2024-04-03 Thread Group Notification
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Re: [edk2-devel] Call or topics for April TianoCore Community Meeting

2024-04-03 Thread Michael D Kinney
No topics received.  Meeting canceled this month.

Mike

> -Original Message-
> From: Kinney, Michael D 
> Sent: Tuesday, April 2, 2024 5:12 PM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D 
> Subject: Call or topics for April TianoCore Community Meeting
> 
> Please let me know if you have any topics for the TianoCore Community
> Meeting this month.
> 
> Thanks,
> 
> Mike
> 
> 



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Re: [edk2-devel] [edk2-platforms][PATCH v5 0/6] Platform/Sgi: Add support for RD-N2-Cfg3 and RD-V2 platform

2024-04-03 Thread Prabin CA
Thanks Sami, for your review I have addressed your review comments and 
incorporated the changes. Please find the link to new patch series 
https://edk2.groups.io/g/devel/message/117378


From: Sami Mujawar via Groups.Io 
Sent: Sunday, March 31, 2024 3:07 PM
To: Prabin CA ; devel@edk2.groups.io
Subject: Re: [edk2-devel] [edk2-platforms][PATCH v5 0/6] Platform/Sgi: Add 
support for RD-N2-Cfg3 and RD-V2 platform

Hi Prabin,

To me the RD-V2 support appears to be incomplete (or the required information 
is not clear).
Therefore, instead of stalling the entire series, I am going to drop patch 5/6 
and 6/6 and merge the remaining patches.

Please reply back to my queries for patch 5/6 and send a separate patch series 
for RD-V2.

Regards,

Sami Mujawar
IMPORTANT NOTICE: The contents of this email and any attachments are 
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Re: [edk2-devel] [edk2-platforms][PATCH v5 0/9] Platform/Sgi: Add support for RD-Fremont platform

2024-04-03 Thread Prabin CA
Thanks Sami, for your review I have addressed your review comments and 
incorporated the changes. Please find the link to new patch series 
https://edk2.groups.io/g/devel/message/117378

> -Original Message-
> From: Sami Mujawar 
> Sent: Sunday, March 31, 2024 5:36 PM
> To: Prabin CA ; devel@edk2.groups.io
> Cc: Ard Biesheuvel ; Leif Lindholm
> ; Thomas Abraham ;
> nd 
> Subject: Re: [edk2-platforms][PATCH v5 0/9] Platform/Sgi: Add support for RD-
> Fremont platform
>
> Hi Prabin,
>
> I am going to drop patch 7/9 that adds the SMBIOS support, and merge the
> remaining series.
>
> Please fix patch 7/9 and send it as a separate patch that adds SMBIOS support
> for RD-Fremont.
>
> Regards,
>
> Sami Mujawar
>
> On 11/03/2024 01:14 pm, Prabin CA wrote:
> > Changes since V4:
> > - Addressed the comments shared by Levi for V3.
> >
> > Changes since V3:
> > - Rebase on top of latest upstream branch.
> >
> > Changes since V2:
> > - Removed author's signed-off on the patches, which is owned by another
> author.
> >
> > Changes since V1:
> > - Corrected memory map in the DSDT file.
> >
> > This patch series introduce support for RD-Fremont reference design
> > platform. This platform includes 32 CPUs, but the fixed virtual
> > platform
> > (FVP) simulates 16 CPUs of the platform. There is one CPU per cluster
> > in the system and so the FVP simulates 16 clusters. Each of the CPUs
> > include 64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
> > The platform also includes system level cache of 32MB and 8GB of RAM.
> > Also, this patch series adding the extended SMBIO support for
> > RD-Fremont platform.
> >
> > In addition to patches that introduce RD-Fremont platform, there are
> > four patches that update support for existing platforms. The first
> > patch in this series correct the typo while defining the CPPC support.
> > The second patch in this series changes the data type of PcdSmmuBase
> > from u32 to u64. The third patch refactor the system memory map base
> > and size values. The fourth patch add a flag to enable PCIE support
> > for existing and future platforms.
> >
> > This patch series should be applied on top of the patch series
> > https://edk2.groups.io/g/devel/message/116262
> >
> > Link to gitlab branch with the patches in this series -
> > https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-pl
> > atforms/-/commits/topics/rdfremont/
> >
> > Prabin CA (7):
> >Platform/Sgi: Correct typo in defining CPPC performance limited register
> >Platform/Sgi: Refactor system memory base and size definitions
> >Platform/Sgi: Introduce a flag to enable PCIe support for RD Platforms
> >Platform/Sgi: Add initial support for RD-Fremont platform
> >Platform/Sgi: Extend SMBIOS support for RD-Fremont
> >Platform/Sgi: Low Power Idle States for RD-Fremont
> >Platform/Sgi: Add CPPC support for RD-Fremont platform
> >
> > Shriram K (1):
> >Platform/Sgi: Add ACPI tables for RD-Fremont platform
> >
> > Vivek Gautam (1):
> >Platform/Sgi: Update the datatype of PcdSmmuBase from u32 to u64
> >
> >   Platform/ARM/SgiPkg/SgiPlatform.dec   
> > |   3 +-
> >   Platform/ARM/SgiPkg/SgiMemoryMap.dsc.inc  
> > |   8 +-
> >   Platform/ARM/SgiPkg/SgiMemoryMap2.dsc.inc 
> > |   8 +-
> >   Platform/ARM/SgiPkg/{SgiMemoryMap2.dsc.inc =>
> SgiMemoryMap3.dsc.inc}  |  88 ++--
> >   Platform/ARM/SgiPkg/SgiPlatform.dsc.inc   
> > |  12 +-
> >   Platform/ARM/SgiPkg/RdE1Edge/RdE1Edge.dsc 
> > |   4 +-
> >   Platform/ARM/SgiPkg/{RdV1/RdV1.dsc => RdFremont/RdFremont.dsc}
> |  14 +-
> >   Platform/ARM/SgiPkg/RdN1Edge/RdN1Edge.dsc 
> > |   4 +-
> >   Platform/ARM/SgiPkg/RdN1EdgeX2/RdN1EdgeX2.dsc 
> > |   4
> +-
> >   Platform/ARM/SgiPkg/RdV1/RdV1.dsc 
> > |   4 +-
> >   Platform/ARM/SgiPkg/RdV1Mc/RdV1Mc.dsc 
> > |   4 +-
> >   Platform/ARM/SgiPkg/Sgi575/Sgi575.dsc 
> > |   4 +-
> >   Platform/ARM/SgiPkg/SgiPlatform.fdf   
> > |   4 +-
> >   Platform/ARM/SgiPkg/AcpiTables/RdFremontAcpiTables.inf
> > |  75
> +++
> >   Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.inf   
> > |   5 +-
> >   Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h   
> > |   3 +-
> >   Platform/ARM/SgiPkg/Include/SgiPlatform.h 
> > |   5 +
> >
> Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
> |   5 +-
> >
> Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.
> c |   5 +-
> >   Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
> |   1 +
> >   Platform/ARM/SgiPkg/Library/PlatformLib

[edk2-devel] [edk2-platforms][PATCH v1 5/5] Platform/Sgi: Extend SMBIOS support for RD-Fremont

2024-04-03 Thread Prabin CA
Extend the SMBIOS support for RD-Fremont platform. RD-Fremont is a
16 core platform with Poseidon CPU. Each of the CPUs include
64KB L1 Data cache, 64KB L1 Instruction cache and 2MB L2 cache.
The platform also includes system level cache of 32MB and 8GB of RAM.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/Include/SgiPlatform.h | 5 
+
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 5 
-
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 5 
-
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 1 +
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 6 
++
 5 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index 6fa39d407bc9..acfa45910aed 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -51,6 +51,10 @@
 #define RD_V2_PART_NUM0x7F2
 #define RD_V2_CONF_ID 0x1
 
+// RD-Fremont Platform Identification values
+#define RD_Fremont_PART_NUM   0x7EE
+#define RD_Fremont_CONF_ID0x1
+
 #define SGI_CONFIG_MASK   0x0F
 #define SGI_CONFIG_SHIFT  0x1C
 #define SGI_PART_NUM_MASK 0xFFF
@@ -90,6 +94,7 @@ typedef enum {
   RdN2Cfg1,
   RdN2Cfg2,
   RdV2,
+  RdFremont,
 } ARM_RD_PRODUCT_ID;
 
 // Arm ProductId look-up table
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
index edf2a5f63c63..9c28b051ebc2 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
@@ -34,7 +34,8 @@
   "RdN2\0"  \
   "RdN2Cfg1\0"  \
   "RdN2Cfg2\0"  \
-  "RdV2\0"
+  "RdV2\0"  \
+  "RdFremont\0"
 
 typedef enum {
   ManufacturerName = 1,
@@ -74,6 +75,8 @@ STATIC GUID mSmbiosUid[] = {
   {0xd2946d07, 0x8057, 0x4c26, {0xbf, 0x53, 0x78, 0xa6, 0x5b, 0xe1, 0xc1, 
0x60}},
   /* Rd-V2 */
   {0x3b1180a3, 0x0744, 0x4194, {0xae, 0x2e, 0xed, 0xa5, 0xbc, 0x2e, 0x43, 
0x45}},
+  /* Rd-Fremont*/
+  {0x904b28d6, 0x0662, 0x11ed, {0xb9, 0x39, 0x02, 0x42, 0xac, 0x12, 0x00, 
0x02}},
 };
 
 /* System information */
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
index ee269f707714..c39c1553f6aa 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
@@ -44,6 +44,7 @@
   "Neoverse-N2\0"   \
   "Neoverse-N2\0"   \
   "Neoverse-V2\0"   \
+  "Neoverse-Poseidon\0" \
   "000-0\0" /* Serial number */ \
   "783-3\0" \
   "786-1\0" \
@@ -54,7 +55,8 @@
   "7B7-1\0" \
   "7B6-1\0" \
   "7B7-1\0" \
-  "7F2-1\0"
+  "7F2-1\0" \
+  "7EE-1\0"
 
 typedef enum {
   PartNumber = 1,
@@ -181,6 +183,7 @@ InstallType4ProcessorInformation (
   case RdN2:
   case RdN2Cfg1:
   case RdV2:
+  case RdFremont:
 mArmRdSmbiosType4.Base.CoreCount = CoreCount;
 mArmRdSmbiosType4.Base.EnabledCoreCount = CoreCount;
 mArmRdSmbiosType4.Base.ThreadCount = CoreCount;
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
index 4af72919a3f1..4cdea5b3b763 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
@@ -335,6 +335,7 @@ InstallType7CacheInformation (
 mArmRdSmbiosType7[4].Base.Associativity = CacheAssociativity16Way;
 break;
   case RdV2:
+  case RdFremont:
 /* L1 instruction cache */
 mArmRdSmbiosType7[0].Base.MaximumCacheSize2 = 64;// 64KB
 mArmRdSmbiosType7[0].Base.InstalledSize2 = 64;   // 64KB
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c 
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
index 14b06796ae9c..ae31be142d12 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
+++ b/Platform/ARM/SgiPkg/Library/Pl

[edk2-devel] [edk2-platforms][PATCH v1 4/5] Platform/Sgi: Extend SMBIOS support for RD-V2 platform

2024-04-03 Thread Prabin CA
From: Pranav Madhu 

The Neoverse RD-V2 FVP platform includes 16 CPUs and each CPU has 64KB
of L1 instruction/data cache, 2MB of L2 cache and 32MB of system level
cache. Extend the SMBIOS support for RD-V2 platform with this
configuration and reuse rest of the RD-N2 SMBIOS configuration for the
RD-V2 platform.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c|  7 
+--
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c |  9 
++---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 20 
+++-
 3 files changed, 30 insertions(+), 6 deletions(-)

diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
index b7e2238fb39c..edf2a5f63c63 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c
@@ -5,7 +5,7 @@
   Reference Design platforms. Type 1 table defines attributes of the
   overall system such as manufacturer, product name, UUID etc.
 
-  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+  Copyright (c) 2021 - 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Specification Reference:
@@ -33,7 +33,8 @@
   "RdV1Mc\0"\
   "RdN2\0"  \
   "RdN2Cfg1\0"  \
-  "RdN2Cfg2\0"
+  "RdN2Cfg2\0"  \
+  "RdV2\0"
 
 typedef enum {
   ManufacturerName = 1,
@@ -71,6 +72,8 @@ STATIC GUID mSmbiosUid[] = {
   {0xa4941d3d, 0xfac3, 0x4ace, {0x9a, 0x7e, 0xce, 0x26, 0x76, 0x64, 0x5e, 
0xda}},
   /* Rd-N2-Cfg2*/
   {0xd2946d07, 0x8057, 0x4c26, {0xbf, 0x53, 0x78, 0xa6, 0x5b, 0xe1, 0xc1, 
0x60}},
+  /* Rd-V2 */
+  {0x3b1180a3, 0x0744, 0x4194, {0xae, 0x2e, 0xed, 0xa5, 0xbc, 0x2e, 0x43, 
0x45}},
 };
 
 /* System information */
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
index b59172cf1cb9..ee269f707714 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c
@@ -6,7 +6,7 @@
   family, processor id, maximum operating frequency, and other information
   related to the processor.
 
-  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+  Copyright (c) 2021 - 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Specification Reference:
@@ -27,7 +27,7 @@
 #define SOCKET_TYPE_BASE3
 #define SOCKET_TYPE_NUM 1
 #define PROCESSOR_VERSION_BASE  (SOCKET_TYPE_BASE + SOCKET_TYPE_NUM)
-#define PROCESSOR_VERSION_NUM   10
+#define PROCESSOR_VERSION_NUM   11
 #define SERIAL_NUMBER_BASE  (PROCESSOR_VERSION_BASE + 
PROCESSOR_VERSION_NUM)
 #define TYPE4_STRINGS   \
   "0x000\0" /* Part Number */   \
@@ -43,6 +43,7 @@
   "Neoverse-N2\0"   \
   "Neoverse-N2\0"   \
   "Neoverse-N2\0"   \
+  "Neoverse-V2\0"   \
   "000-0\0" /* Serial number */ \
   "783-3\0" \
   "786-1\0" \
@@ -52,7 +53,8 @@
   "78A-2\0" \
   "7B7-1\0" \
   "7B6-1\0" \
-  "7B7-1\0"
+  "7B7-1\0" \
+  "7F2-1\0"
 
 typedef enum {
   PartNumber = 1,
@@ -178,6 +180,7 @@ InstallType4ProcessorInformation (
 break;
   case RdN2:
   case RdN2Cfg1:
+  case RdV2:
 mArmRdSmbiosType4.Base.CoreCount = CoreCount;
 mArmRdSmbiosType4.Base.EnabledCoreCount = CoreCount;
 mArmRdSmbiosType4.Base.ThreadCount = CoreCount;
diff --git 
a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c 
b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
index b71ce721e2e8..4af72919a3f1 100644
--- a/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
+++ b/Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c
@@ -6,7 +6,7 @@
   implemented, cache configuration, ways of associativity and other
   information related to cache memory installed.
 
-  Copyright (c) 2021 - 2022, Arm Limited. All rights reserved.
+  Copyright (c) 2021 - 2024, Arm Limited. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Specification Reference:
@@ -334,6 +334,24 @@ InstallType7CacheInformation (
  

[edk2-devel] [edk2-platforms][PATCH v1 3/5] Platform/Sgi: Define RD-V2 platform id values

2024-04-03 Thread Prabin CA
From: Pranav Madhu 

Add RD-V2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/Include/SgiPlatform.h | 7 ++-
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 8 +++-
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/Platform/ARM/SgiPkg/Include/SgiPlatform.h 
b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
index e83853664c4c..6fa39d407bc9 100644
--- a/Platform/ARM/SgiPkg/Include/SgiPlatform.h
+++ b/Platform/ARM/SgiPkg/Include/SgiPlatform.h
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.
+*  Copyright (c) 2018 - 2024, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -47,6 +47,10 @@
 #define RD_N2_PART_NUM0x7B7
 #define RD_N2_CONF_ID 0x1
 
+// RD-V2 Platform Identification values
+#define RD_V2_PART_NUM0x7F2
+#define RD_V2_CONF_ID 0x1
+
 #define SGI_CONFIG_MASK   0x0F
 #define SGI_CONFIG_SHIFT  0x1C
 #define SGI_PART_NUM_MASK 0xFFF
@@ -85,6 +89,7 @@ typedef enum {
   RdN2,
   RdN2Cfg1,
   RdN2Cfg2,
+  RdV2,
 } ARM_RD_PRODUCT_ID;
 
 // Arm ProductId look-up table
diff --git a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c 
b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
index fa006320025b..14b06796ae9c 100644
--- a/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
+++ b/Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c
@@ -1,6 +1,6 @@
 /** @file
 *
-*  Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.
+*  Copyright (c) 2018 - 2024, Arm Limited. All rights reserved.
 *
 *  SPDX-License-Identifier: BSD-2-Clause-Patent
 *
@@ -79,6 +79,12 @@ STATIC CONST SGI_PRODUCT_ID_LOOKUP SgiProductIdLookup[] = {
 RD_N2_CONF_ID,
 1
   },
+  {
+RdV2,
+RD_V2_PART_NUM,
+RD_V2_CONF_ID,
+0
+  },
 };
 
 EFI_BOOT_MODE
-- 
2.34.1



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[edk2-devel] [edk2-platforms][PATCH v1 2/5] Platform/Sgi: Use PCD value for L2 cache size in PPTT table

2024-04-03 Thread Prabin CA
The PcdL2CacheSize PCD specifies the size of L2 cache of the CPU.
Use the size specified by this PCD in the PPTT table of the
RD-N2 platform.

The PLAT_L2_CACHE_SIZE build time parameter is used to set the size of
the CPU's L2 cache and this allows changing the value of the L2 cache
size depending the variant of the RD-N2 platform being build. RD-V2
platform is an example of such a variant.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/RdN2/RdN2.dsc | 4 
 Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf | 1 +
 Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc | 4 +++-
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/Platform/ARM/SgiPkg/RdN2/RdN2.dsc 
b/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
index 49a317a930e0..634edc2416c4 100644
--- a/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
+++ b/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
@@ -45,6 +45,10 @@ [PcdsFixedAtBuild.common]
   gArmPlatformTokenSpaceGuid.PcdCoreCount|1
   gArmPlatformTokenSpaceGuid.PcdClusterCount|16
 
+!ifdef $(PLAT_L2_CACHE_SIZE)
+   gArmSgiTokenSpaceGuid.PcdL2CacheSize|$(PLAT_L2_CACHE_SIZE)
+!endif
+
 

 #
 # Components Section - list of all EDK II Modules needed by this Platform
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf 
b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
index afc38385c051..fb5e6e72c9e8 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf
@@ -64,6 +64,7 @@ [FixedPcd]
   gArmSgiTokenSpaceGuid.PcdGtFrame1Gsiv
   gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlk0Base
   gArmSgiTokenSpaceGuid.PcdIoVirtSocExpBlkUartEnable
+  gArmSgiTokenSpaceGuid.PcdL2CacheSize
   gArmSgiTokenSpaceGuid.PcdMaxAddressBitsPerChip
   gArmSgiTokenSpaceGuid.PcdOscLpiEnable
   gArmSgiTokenSpaceGuid.PcdOscCppcEnable
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc 
b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
index b8cb04459be2..c37f04582f9c 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc
@@ -21,6 +21,8 @@
 #include "SgiAcpiHeader.h"
 #include "SgiPlatform.h"
 
+#define L2_CACHE_SIZE  FixedPcdGet32 (PcdL2CacheSize)
+
 /** Define helper macro for populating processor core information.
 
   @param [in] PackageId Package instance number.
@@ -81,7 +83,7 @@
 EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_INIT (   
\
   PPTT_CACHE_STRUCTURE_FLAGS,   /* Flag */ 
\
   0,/* Next level of cache */  
\
-  SIZE_1MB, /* Size */ 
\
+  L2_CACHE_SIZE,/* Size */ 
\
   2048, /* Num of sets */  
\
   8,/* Associativity */
\
   PPTT_UNIFIED_CACHE_ATTR,  /* Attributes */   
\
-- 
2.34.1



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[edk2-devel] [edk2-platforms][PATCH v1 1/5] Platform/Sgi: Add a new PCD for L2 cache size

2024-04-03 Thread Prabin CA
A new PCD named PcdL2CacheSize is introduced to specify the size of the
CPU's L2 cache. This PCD can be used in PPTT tables for a reference
design platform. The default value of this PCD is set to 1MB but can be
changed depending on the variant of the reference design platform.

Signed-off-by: Prabin CA 
---
 Platform/ARM/SgiPkg/SgiPlatform.dec | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dec 
b/Platform/ARM/SgiPkg/SgiPlatform.dec
index af7887e54126..d540dbff2d19 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dec
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dec
@@ -37,6 +37,9 @@ [PcdsFixedAtBuild]
   gArmSgiTokenSpaceGuid.PcdDramBlock2Base|0|UINT64|0x0002
   gArmSgiTokenSpaceGuid.PcdDramBlock2Size|0|UINT64|0x0003
 
+  # L2 Cache size
+  gArmSgiTokenSpaceGuid.PcdL2CacheSize|0x10|UINT32|0x002F
+
   # Virtio Block device
   gArmSgiTokenSpaceGuid.PcdVirtioBlkBaseAddress|0x|UINT32|0x0004
   gArmSgiTokenSpaceGuid.PcdVirtioBlkSize|0x|UINT32|0x0005
-- 
2.34.1



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[edk2-devel] [edk2-platforms][PATCH v1 0/5] Platform/Sgi: Extend SMBIOS support for RD-V2 and RD-Fremont

2024-04-03 Thread Prabin CA
Each CPUs of RD-V2 has 64KB of L1 instruction/data cache, 2MB of L2
cache and 32MB of system level cache. The system architecture of the
RD-V2 platform is similar to the RD-N2 platform, except for the CPU
and L2 cache size. So existing RD-N2 SMBIOS support is extended for
RD-V2 platform to reuse rest of the RD-N2 SMBIOS configuration for the
RD-V2 platform.

Each CPUs of RD-Fremont include 64KB L1 instruction/data cache, 2MB L2
cache and 2MB of system level cache. This patch series adding the
extended SMBIOS support for RD-Fremont platform.

In addition to patches that extend the SMBIO support for these two
platforms, there are two patches that update support for existing
platforms. The first patch in this series introduce a PCD to specify
L2 cache size. The second patch make use of this PCD in PPTT table.

Link to gitlab branch with the patches in this series -
https://gitlab.arm.com/infra-solutions/reference-design/platsw/edk2-platforms/-/commits/topics/rdv2/?ref_type=heads

Prabin CA (3):
  Platform/Sgi: Add a new PCD for L2 cache size
  Platform/Sgi: Use PCD value for L2 cache size in PPTT table
  Platform/Sgi: Extend SMBIOS support for RD-Fremont

Pranav Madhu (2):
  Platform/Sgi: Define RD-V2 platform id values
  Platform/Sgi: Extend SMBIOS support for RD-V2 platform

 Platform/ARM/SgiPkg/SgiPlatform.dec   |  3 
+++
 Platform/ARM/SgiPkg/RdN2/RdN2.dsc |  4 

 Platform/ARM/SgiPkg/AcpiTables/RdN2AcpiTables.inf |  1 
+
 Platform/ARM/SgiPkg/Include/SgiPlatform.h | 12 
++-
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type1SystemInformation.c| 10 
--
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type4ProcessorInformation.c | 12 
---
 Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/Type7CacheInformation.c | 21 
+++-
 Platform/ARM/SgiPkg/Library/PlatformLib/PlatformLib.c | 14 
-
 Platform/ARM/SgiPkg/AcpiTables/RdN2/Pptt.aslc |  4 
+++-
 9 files changed, 72 insertions(+), 9 deletions(-)

-- 
2.34.1



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Re: [edk2-devel] [PATCH 7/9] .pytool/CISettings.py: add libspdm submodule.

2024-04-03 Thread Joey Vagedes via groups.io
Reviewed-By: joey.vage...@gmail.com


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Re: [edk2-devel] Call or topics for April TianoCore Community Meeting

2024-04-03 Thread Oliver Smith-Denny

Hi Mike,

My two topics would be PRs and lack of maintainer response, the proper
process there, etc.

Thanks,
Oliver

On 4/2/2024 5:12 PM, Michael D Kinney wrote:

Please let me know if you have any topics for the TianoCore Community
Meeting this month.

Thanks,

Mike










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Re: [edk2-devel] [PATCH v5] IntelFsp2Pkg: Fsp T new ARCH UPD Support

2024-04-03 Thread Chiu, Chasel


Hi Chinni,

Thanks for working on this, please see my feedbacks below inline.

Thanks,
Chasel


> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of cbduggap
> Sent: Thursday, March 21, 2024 10:02 PM
> To: devel@edk2.groups.io
> Cc: Chaganty, Rangasai V ; Desimone, Nathaniel
> L ; Chiu, Chasel ;
> Duggapu, Chinni B 
> Subject: [edk2-devel] [PATCH v5] IntelFsp2Pkg: Fsp T new ARCH UPD Support
> 
> Changes to support spec changes
> 
> 1. Remove usage of Pcd.
> 2. Change code to validate the Temporary Ram size input.
> 3. Consume the input saved in YMM Register
> 
> Cc: Sai Chaganty 
> Cc: Nate DeSimone 
> Cc: Chiu Chasel 
> Cc: Duggapu Chinni B 
> 
> 
> Signed-off-by: Duggapu Chinni B 
> ---
>  IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf |  1 +
>  IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf   |  1 +
>  .../FspSecCore/Ia32/Fsp24ApiEntryM.nasm   |  1 -
>  .../FspSecCore/Ia32/FspApiEntryM.nasm |  1 -
>  .../FspSecCore/Ia32/FspApiEntryT.nasm | 62 ++---
>  .../FspSecCore/Ia32/SaveRestoreSseNasm.inc| 11 +++
>  IntelFsp2Pkg/FspSecCore/SecFsp.c  |  9 +++
>  IntelFsp2Pkg/FspSecCore/SecFsp.h  |  1 +
>  IntelFsp2Pkg/FspSecCore/X64/FspApiEntryT.nasm | 69 +++
>  IntelFsp2Pkg/Include/FspEas/FspApi.h  |  5 +-
>  IntelFsp2Pkg/Include/Library/FspPlatformLib.h | 13 
>  .../Include/SaveRestoreSseAvxNasm.inc | 21 ++
>  .../BaseFspPlatformLib/FspPlatformMemory.c| 38 ++
>  .../SecRamInitData.c  |  3 +-
>  14 files changed, 209 insertions(+), 27 deletions(-)
> 
> diff --git a/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
> b/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
> index cb011f99f9..8cb0e6411f 100644
> --- a/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
> +++ b/IntelFsp2Pkg/FspSecCore/Fsp24SecCoreM.inf
> @@ -60,6 +60,7 @@
>FspSecPlatformLib   CpuLib   FspMultiPhaseLib+  FspPlatformLib  [Pcd]
> gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase  ## CONSUMESdiff
> --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> index 8029832235..ef19c6ae78 100644
> --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf
> @@ -59,6 +59,7 @@
>FspCommonLib   FspSecPlatformLib   CpuLib+  FspPlatformLib  [Pcd]
> gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase  ## CONSUMESdiff
> --git a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> index 15f8ecea83..5fa5c03569 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryM.nasm
> @@ -11,7 +11,6 @@
>  ; Following are fixed PCDs ; extern
> ASM_PFX(PcdGet32(PcdTemporaryRamBase))-extern
> ASM_PFX(PcdGet32(PcdTemporaryRamSize)) extern
> ASM_PFX(PcdGet32(PcdFspTemporaryRamSize)) extern   ASM_PFX(PcdGet8
> (PcdFspHeapSizePercentage)) diff --git
> a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
> index 61ab4612a3..861cce4d01 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryM.nasm
> @@ -11,7 +11,6 @@
>  ; Following are fixed PCDs ; extern
> ASM_PFX(PcdGet32(PcdTemporaryRamBase))-extern
> ASM_PFX(PcdGet32(PcdTemporaryRamSize)) extern
> ASM_PFX(PcdGet32(PcdFspTemporaryRamSize)) extern   ASM_PFX(PcdGet8
> (PcdFspHeapSizePercentage)) diff --git
> a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> index 900126b93b..f72da0d5a9 100644
> --- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> +++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
> @@ -109,7 +109,8 @@ struc LoadMicrocodeParamsFsp24
>  .FsptArchReserved:resb3 .FsptArchLength:  resd
> 1 .FspDebugHandler  resq1-.FsptArchUpd: resd
> 4+.FspTemporaryRamSize: resd1  ; Supported only if ArchRevison is 
> >=
> 3+.FsptArchUpd: resd3 ; } ; FSPT_CORE_UPD
> { .MicrocodeCodeAddr:   resq1@@ -267,7 +268,7 @@
> ASM_PFX(LoadMicrocodeDefault):
> cmpbyte [esp + LoadMicrocodeParamsFsp22.FspUpdHeaderRevision], 2jb
> Fsp20UpdHeadercmpbyte [esp +
> LoadMicrocodeParamsFsp22.FsptArchRevision], 2-   je Fsp24UpdHeader+   jae
> Fsp24UpdHeaderjmpFsp22UpdHeader  Fsp20UpdHeader:@@ -405,7 +406,7
> @@ CheckAddress:
> cmp   byte [esp + LoadMicrocodeParamsFsp22.FspUpdHeaderRevision], 2jb
> Fsp20UpdHeader1cmpbyte [esp +
> LoadMicrocodeParamsFsp22.FsptArchRevision], 2-   je Fsp24UpdHeader1;+
> jaeFsp24UpdHeader1;jmpFsp22UpdHeader1  Fsp20UpdHeader1:@@ -
> 497,7 +498,8 @@ ASM_PFX(EstablishStackFsp):
>; Enable FSP STACK   ;   mov   esp, DWORD [ASM_PFX(PcdGet32
> (PcdTemporaryRamBase))]-  add   esp, DWORD [ASM_PFX(PcdGet32
> (PcdTemporaryRamSize))]+  LOAD_TEMPORARY_RAM_SIZE ecx+  add  

[edk2-devel] RFC - Tianocore infosec process

2024-04-03 Thread Zimmer, Vincent
Hello

The infosec team in Tianocore request feedback on the proposed process for 
handling security issues described in  
https://github.com/tianocore/tianocore.github.io/wiki/GHSA-GitHub-Security-Advisories-Proceess-(Draft)

We'd like to make this active after the May stable so feedback by April 15, 
2024 would be appreciated.

Thanks

infosec


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Re: [edk2-devel] [Question] using Flexible Array Member in Structure.

2024-04-03 Thread Michael D Kinney
Yes.  Use of flexible array members is supported and encouraged.

There are challenges with existing structure definitions that declare
arrays of size [1] when a flexible array is really intended. Those 
were defined before flexible array members were supported by all the
compilers.  Converting these to a flexible array member would not be
a backwards compatible change.

Mike

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of
> levi.yun
> Sent: Wednesday, April 3, 2024 2:27 AM
> To: devel@edk2.groups.io
> Cc: n...@arm.com; sami.muja...@arm.com
> Subject: [edk2-devel] [Question] using Flexible Array Member in
> Structure.
> 
> Hello all!
> 
> while I see the code. I have one question related using Flexible Array
> Member.
> 
> For example)
> 
> ///
> /// Socket Type Data.
> ///
> typedef struct {
>    EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
>    UINT16 SocketIdentifier;
>    UINT16 Reserved;
>    // EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];
> } EFI_ACPI_6_4_PMTT_SOCKET_TYPE_DATA;
> 
> In here, why MemoryDeviceStructure should remain with comments?
> 
> IIUC, edk2 coding style guide doesn't seem to prevent use of Flexible
> Array Member which is C99 standard.
> 
> And consider the compiler used to compile edk2 uses defaults standard
> above of C99 standard.
> 
> Couldn't I use the flexible array member like:
> 
> ///
> /// Socket Type Data.
> ///
> typedef struct {
>    EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
>    UINT16 SocketIdentifier;
>    UINT16 Reserved;
>    EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE  MemoryDeviceStructure[]
> }
> 
> Thanks!
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH v3 00/24] Provide SEV-SNP support for running under an SVSM

2024-04-03 Thread Lendacky, Thomas via groups.io

On 4/3/24 02:09, Ni, Ray wrote:

I think I've acked all patches in UefiCpuPkg.
Please let me know if any other patches need my review.


Thanks, Ray!

Tom



Thanks,
Ray

*From:* devel@edk2.groups.io  on behalf of 
Lendacky, Thomas via groups.io 

*Sent:* Wednesday, April 3, 2024 2:16
*To:* devel@edk2.groups.io ; Yao, Jiewen 
; Liming Gao ; Ni, Ray 
; Liu, Zhiguang ; Kinney, 
Michael D ; Guo, Gua ; 
Dong, Guo ; Lu, James ; Rhodes, 
Sean ; Kumar, Rahul R 
*Cc:* Ard Biesheuvel ; Aktas, Erdem 
; Gerd Hoffmann ; Xu, Min M 
; Michael Roth ; Anatol Belski 
; Anthony Perard 
; Corvin Köhne ; 
Jianyong Wu ; Rebecca Cran 
*Subject:* Re: [edk2-devel] [PATCH v3 00/24] Provide SEV-SNP support for 
running under an SVSM

Re-pinging the list/maintainers. Still awaiting feedback/reviews/acks on
the changes.

Thanks,
Tom

On 3/26/24 13:34, Tom Lendacky wrote:
Any issues with this version of the series? Still looking for 
Reviewed-by's for the MdePkg, UefiCpuPkg and UefiPayloadPkg related 
patches.


Once I get those, I'll submit the edk2-platform patches to support the 
new library as a response to these patches for a quick review.


Thanks,
Tom

On 3/8/24 09:29, Tom Lendacky wrote:


BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654 




This series adds SEV-SNP support for running OVMF under an Secure VM
Service Module (SVSM) at a less privileged VM Privilege Level (VMPL).
By running at a less priviledged VMPL, the SVSM can be used to provide
services, e.g. a virtual TPM, for the guest OS within the SEV-SNP
confidential VM (CVM) rather than trust such services from the 
hypervisor.


Currently, OVMF expects to run at the highest VMPL, VMPL0, and there are
certain SNP related operations that require that VMPL level. 
Specifically,

the PVALIDATE instruction and the RMPADJUST instruction when setting the
the VMSA attribute of a page (used when starting APs).

If OVMF is to run at a less privileged VMPL, e.g. VMPL2, then it must
use an SVSM (which is running at VMPL0) to perform the operations that
it is no longer able to perform.

When running under an SVSM, OVMF must know the APIC IDs of the vCPUs that
it will be starting. As a result, the GHCB APIC ID retrieval action must
be performed. Since this service can also work with SEV-SNP running at
VMPL0, the patches to make use of this feature are near the beginning of
the series.

How OVMF interacts with and uses the SVSM is documented in the SVSM
specification [1] and the GHCB specification [2].

This support creates a new AmdSvsmLib library that is used by MpInitLib.
The edk2-platforms repo requires updates/patches to add the new library
requirement. To accomodate that, this series could be split between:

patch number 12:
   UefiCpuPkg/AmdSvsmLib: Create the AmdSvsmLib library to support an 
SVSM


and patch number 13:
   UefiPayloadPkg: Prepare UefiPayloadPkg to use the AmdSvsmLib library

The updates to edk2-platforms can be applied at the split.

This series introduces support to run OVMF under an SVSM. It consists
of:
   - Retrieving the list of vCPU APIC IDs and starting up all APs without
 performing a broadcast SIPI
   - Reorganizing the page state change support to not directly use the
 GHCB buffer since an SVSM will use the calling area buffer, instead
   - Detecting the presence of an SVSM
   - When not running at VMPL0, invoking the SVSM for page validation and
 VMSA page creation/deletion
   - Detecting and allowing OVMF to run in a VMPL other than 0 when an
 SVSM is present

The series is based off of commit:

   e60529df58e4 ("UefiPayloadPkg: Make Dsc accomodative of other archs")

[1] 
https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/58019.pdf 
[2] 
https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56421.pdf 


Cc: Anatol Belski 
Cc: Anthony Perard 
Cc: Ard Biesheuvel 
Cc: Corvin Köhne 
Cc: Erdem Aktas 
Cc: Gerd Hoffmann 
Cc: Gua Guo 
Cc: Guo Dong 
Cc: James Lu 
Cc: Jianyong Wu 
Cc: Jiewen Yao 
Cc: Laszlo Ersek 
Cc: Liming Gao 
Cc: Michael D Kinney 
Cc: Michael Roth 
Cc: Min Xu 
Cc: Rahul Kumar 
Cc: Ray Ni 
Cc: Rebecca Cran 
Cc: Sean Rhodes 
Cc: Zhiguang Liu 

---

Changes in v3:
- Renamed CcSvsmLib to a more AMD-specific AmdSvsmLib with corresponding
   function name changes
- Moved the GHCB APIC ID list GUID definition from MdePkg to UefiCpuPkg
   and change the name from gEfiApicIdsGuid to gGhcbApicIdsGuid
- Separated the OvmfPkg changes for the AmdSvsmLib into two patches:
   - First patch adds usage of the AmdSvsmLib NULL library
   - Second patch adds the OVMF AmdSvsmLib implementation
- Updated the commit message for the OVMF AmdSvsmLib implementatio

[edk2-devel] Event: TianoCore Community Meeting EMEA/NAMO - Thursday, April 4, 2024 #cal-reminder

2024-04-03 Thread Group Notification
*Reminder: TianoCore Community Meeting EMEA/NAMO*

*When:*
Thursday, April 4, 2024
8:00am to 9:00am
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*Where:*
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*Description:*



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Re: [edk2-devel] [PATCH edk2-platforms 1/1] Maintainers.txt: Update maintainers for Marvell platforms

2024-04-03 Thread Leif Lindholm
Thanks all, update pushed as 8b29c9255d44.

/
Leif

On Wed, Apr 03, 2024 at 14:28:45 +, Narinder Dhillon wrote:
> 
> 
> > -Original Message-
> > From: Marcin Wojtas 
> > Sent: Wednesday, April 3, 2024 6:36 AM
> > To: devel@edk2.groups.io; michael.d.kin...@intel.com
> > Cc: Leif Lindholm ; Narinder Dhillon
> > 
> > Subject: [EXTERNAL] Re: [edk2-devel] [PATCH edk2-platforms 1/1]
> > Maintainers.txt: Update maintainers for Marvell platforms
> > 
> > Prioritize security for external emails: Confirm sender and content safety
> > before clicking links or opening attachments
> > 
> > --
> > wt., 2 kwi 2024 o 17:59 Michael D Kinney 
> > napisał(a):
> > >
> > > Reviewed-by: Michael D Kinney 
> > >
> > > > -Original Message-
> > > > From: Leif Lindholm 
> > > > Sent: Tuesday, April 2, 2024 8:40 AM
> > > > To: devel@edk2.groups.io
> > > > Cc: Marcin Wojtas ; Narinder Dhillon
> > > > ; Kinney, Michael D
> > > > 
> > > > Subject: [PATCH edk2-platforms 1/1] Maintainers.txt: Update
> > > > maintainers for Marvell platforms
> > > >
> > > > Marcin and Narinder are the people most familiar with the Marvell
> > > > platforms, so make them the maintainers.
> > > > I move myself down to Reviewer for now.
> > > >
> > > > Cc: Marcin Wojtas 
> > > > Cc: Narinder Dhillon 
> > > > Cc: Michael D Kinney 
> > > > Signed-off-by: Leif Lindholm 
> > > > ---
> > > >  Maintainers.txt | 5 +++--
> > > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/Maintainers.txt b/Maintainers.txt index
> > > > ca36aa679470..877620a1b02c 100644
> > > > --- a/Maintainers.txt
> > > > +++ b/Maintainers.txt
> > > > @@ -357,8 +357,9 @@ Marvell platforms and silicon
> > > >  F: Platform/Marvell/
> > > >  F: Platform/SolidRun/
> > > >  F: Silicon/Marvell/
> > > > -R: Marcin Wojtas 
> > > > -M: Leif Lindholm 
> > > > +M: Marcin Wojtas  [wojtas-marcin]
> > > > +M: Narinder Dhillon  [ndhillonm]
> > > > +R: Leif Lindholm  [leiflindholm]
> > > >
> > 
> > Reviewed-by: Marcin Wojtas 
> > 
> > Thanks,
> > Marcin
> > 
> 
> Reviewed-by: Narinder Dhillon 
> 
> Thanks,
> Narinder
> 
> > > >  Miscellaneous drivers
> > > >  F: Silicon/Atmel/
> > > > --
> > > > 2.30.2
> > >
> > >
> > >
> > > 
> > >
> > >


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Re: [edk2-devel] [PATCH edk2-platforms 1/1] Maintainers.txt: Update maintainers for Marvell platforms

2024-04-03 Thread Narinder Dhillon


> -Original Message-
> From: Marcin Wojtas 
> Sent: Wednesday, April 3, 2024 6:36 AM
> To: devel@edk2.groups.io; michael.d.kin...@intel.com
> Cc: Leif Lindholm ; Narinder Dhillon
> 
> Subject: [EXTERNAL] Re: [edk2-devel] [PATCH edk2-platforms 1/1]
> Maintainers.txt: Update maintainers for Marvell platforms
> 
> Prioritize security for external emails: Confirm sender and content safety
> before clicking links or opening attachments
> 
> --
> wt., 2 kwi 2024 o 17:59 Michael D Kinney 
> napisał(a):
> >
> > Reviewed-by: Michael D Kinney 
> >
> > > -Original Message-
> > > From: Leif Lindholm 
> > > Sent: Tuesday, April 2, 2024 8:40 AM
> > > To: devel@edk2.groups.io
> > > Cc: Marcin Wojtas ; Narinder Dhillon
> > > ; Kinney, Michael D
> > > 
> > > Subject: [PATCH edk2-platforms 1/1] Maintainers.txt: Update
> > > maintainers for Marvell platforms
> > >
> > > Marcin and Narinder are the people most familiar with the Marvell
> > > platforms, so make them the maintainers.
> > > I move myself down to Reviewer for now.
> > >
> > > Cc: Marcin Wojtas 
> > > Cc: Narinder Dhillon 
> > > Cc: Michael D Kinney 
> > > Signed-off-by: Leif Lindholm 
> > > ---
> > >  Maintainers.txt | 5 +++--
> > >  1 file changed, 3 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/Maintainers.txt b/Maintainers.txt index
> > > ca36aa679470..877620a1b02c 100644
> > > --- a/Maintainers.txt
> > > +++ b/Maintainers.txt
> > > @@ -357,8 +357,9 @@ Marvell platforms and silicon
> > >  F: Platform/Marvell/
> > >  F: Platform/SolidRun/
> > >  F: Silicon/Marvell/
> > > -R: Marcin Wojtas 
> > > -M: Leif Lindholm 
> > > +M: Marcin Wojtas  [wojtas-marcin]
> > > +M: Narinder Dhillon  [ndhillonm]
> > > +R: Leif Lindholm  [leiflindholm]
> > >
> 
> Reviewed-by: Marcin Wojtas 
> 
> Thanks,
> Marcin
> 

Reviewed-by: Narinder Dhillon 

Thanks,
Narinder

> > >  Miscellaneous drivers
> > >  F: Silicon/Atmel/
> > > --
> > > 2.30.2
> >
> >
> >
> > 
> >
> >


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[edk2-devel] Event: TianoCore edk2-test Bug Triage Meeting - Thursday, April 4, 2024 #cal-reminder

2024-04-03 Thread Group Notification
*Reminder: TianoCore edk2-test Bug Triage Meeting*

*When:*
Thursday, April 4, 2024
10:00pm to 11:00pm
(UTC+08:00) Asia/Shanghai

*Where:*
https://armltd.zoom.us/j/94348061758?pwd=Q3RDeFA5K2JFaU5jdWUxc1FnaGdyUT09&from=addon

*Organizer:*
Edhaya Chandran
edhaya.chand...@arm.com ( 
edhaya.chand...@arm.com?subject=Re:%20Event:%20TianoCore%20edk2-test%20Bug%20Triage%20Meeting
 )

View Event ( https://edk2.groups.io/g/devel/viewevent?eventid=2159778 )

*Description:*


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Re: [edk2-devel] [PATCH edk2-platforms 1/1] Maintainers.txt: Update maintainers for Marvell platforms

2024-04-03 Thread Marcin Wojtas
wt., 2 kwi 2024 o 17:59 Michael D Kinney 
napisał(a):
>
> Reviewed-by: Michael D Kinney 
>
> > -Original Message-
> > From: Leif Lindholm 
> > Sent: Tuesday, April 2, 2024 8:40 AM
> > To: devel@edk2.groups.io
> > Cc: Marcin Wojtas ; Narinder Dhillon
> > ; Kinney, Michael D 
> > Subject: [PATCH edk2-platforms 1/1] Maintainers.txt: Update maintainers
> > for Marvell platforms
> >
> > Marcin and Narinder are the people most familiar with the Marvell
> > platforms, so make them the maintainers.
> > I move myself down to Reviewer for now.
> >
> > Cc: Marcin Wojtas 
> > Cc: Narinder Dhillon 
> > Cc: Michael D Kinney 
> > Signed-off-by: Leif Lindholm 
> > ---
> >  Maintainers.txt | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/Maintainers.txt b/Maintainers.txt
> > index ca36aa679470..877620a1b02c 100644
> > --- a/Maintainers.txt
> > +++ b/Maintainers.txt
> > @@ -357,8 +357,9 @@ Marvell platforms and silicon
> >  F: Platform/Marvell/
> >  F: Platform/SolidRun/
> >  F: Silicon/Marvell/
> > -R: Marcin Wojtas 
> > -M: Leif Lindholm 
> > +M: Marcin Wojtas  [wojtas-marcin]
> > +M: Narinder Dhillon  [ndhillonm]
> > +R: Leif Lindholm  [leiflindholm]
> >

Reviewed-by: Marcin Wojtas 

Thanks,
Marcin

> >  Miscellaneous drivers
> >  F: Silicon/Atmel/
> > --
> > 2.30.2
>
>
>
> 
>
>


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Re: [edk2-devel] Is there a way to create filesystem in UEFI Shell ?

2024-04-03 Thread Pedro Falcato
On Wed, Apr 3, 2024 at 8:48 AM Yoshinoya  wrote:
>
> Maybe ref to ramdisk sample, create a memory type block io device, then mount 
> file system on it.
> UEFI supports fat file system, some 3rd drivers could be added to support 
> ext4 filesystem.
> Search them on github website

EDK2 already supports ext4, you need to add
edk2-platforms/Features/Ext4Pkg to your platform. Although it doesn't
have write support and I intend to keep it this way. Everything that
was discussed in this thread is definitely stepping over the line of
what is reasonable for firmware to do (making a filesystem in UEFI?
seriously???).

-- 
Pedro


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[edk2-devel] [Question] using Flexible Array Member in Structure.

2024-04-03 Thread levi.yun

Hello all!

while I see the code. I have one question related using Flexible Array 
Member.


For example)

///
/// Socket Type Data.
///
typedef struct {
  EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
  UINT16 SocketIdentifier;
  UINT16 Reserved;
  // EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];
} EFI_ACPI_6_4_PMTT_SOCKET_TYPE_DATA;

In here, why MemoryDeviceStructure should remain with comments?

IIUC, edk2 coding style guide doesn't seem to prevent use of Flexible 
Array Member which is C99 standard.


And consider the compiler used to compile edk2 uses defaults standard 
above of C99 standard.


Couldn't I use the flexible array member like:

///
/// Socket Type Data.
///
typedef struct {
  EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;
  UINT16 SocketIdentifier;
  UINT16 Reserved;
  EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE  MemoryDeviceStructure[]
}

Thanks!


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[edk2-devel] [PATCH V4 6/6] Maintainers: AMD as SPI driver stack maintainer

2024-04-03 Thread Chang, Abner via groups.io
From: Abner Chang 

Signed-off-by: Abner Chang 
M: Andrew Fish 
M: Leif Lindholm 
M: Michael D Kinney 
---
 Maintainers.txt | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/Maintainers.txt b/Maintainers.txt
index 799f27f914c..7d9cdca611f 100644
--- a/Maintainers.txt
+++ b/Maintainers.txt
@@ -417,6 +417,11 @@ M: Abner Chang  [changab]
 R: Abdul Lateef Attar  [abdattar]
 R: Nickle Wang  [nicklela]
 
+MdeModulePkg: SPI driver stack
+F: MdeModulePkg/Bus/Spi/
+M: Abner Chang  [changab]
+R: Brit Chesley  [BritChesley]
+
 MdePkg
 F: MdePkg/
 W: https://github.com/tianocore/tianocore.github.io/wiki/MdePkg
@@ -450,6 +455,12 @@ M: Abner Chang  [changab]
 R: Abdul Lateef Attar  [abdattar]
 R: Nickle Wang  [nicklela]
 
+MdePkg: SPI related C header files
+F: MdePkg/Include/Protocol/Spi*.h
+F: MdePkg/Include/IndustryStandard/SpiNorFlashJedecSfdp.h
+M: Abner Chang  [changab]
+R: Brit Chesley  [BritChesley]
+
 NetworkPkg
 F: NetworkPkg/
 W: https://github.com/tianocore/tianocore.github.io/wiki/NetworkPkg
-- 
2.37.1.windows.1



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[edk2-devel] [PATCH V4 5/6] MdeModulePkg: Add SPI NOR FLash SFDP drivers to DSC

2024-04-03 Thread Chang, Abner via groups.io
From: abnchang 

BZ#: 4471
SPI NOR Flash JEDEC Serial Flash Discoverable Driver
implementation.

Signed-off-by: Abner Chang 
Cc: Jian J Wang 
Cc: Liming Gao 
Cc: Abdul Lateef Attar 
Cc: Brit Chesley 
---
 MdeModulePkg/MdeModulePkg.dsc | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index c0f1df3bfbc..6bed9205ea6 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -4,7 +4,7 @@
 # (C) Copyright 2014 Hewlett-Packard Development Company, L.P.
 # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
 # Copyright (c) Microsoft Corporation.
-# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
 #
 #SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -285,6 +285,8 @@
   MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
   MdeModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
   
MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf
+  MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpDxe.inf
+  MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpSmm.inf
 
   MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
   MdeModulePkg/Core/Pei/PeiMain.inf
-- 
2.37.1.windows.1



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[edk2-devel] [PATCH V4 2/6] MdePkg/Include: Add SPI NOR Flash JEDEC SFDP header file

2024-04-03 Thread Chang, Abner via groups.io
From: abnchang 

BZ#: 4472
Add definition of JEDEC Serial Flash Discoverable Parameters
(SFDP) specification.
https://www.jedec.org/standards-documents/docs/jesd216b

Signed-off-by: Abner Chang 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Abdul Lateef Attar 
Cc: Brit Chesley 
---
 .../IndustryStandard/SpiNorFlashJedecSfdp.h   | 324 ++
 1 file changed, 324 insertions(+)
 create mode 100644 MdePkg/Include/IndustryStandard/SpiNorFlashJedecSfdp.h

diff --git a/MdePkg/Include/IndustryStandard/SpiNorFlashJedecSfdp.h 
b/MdePkg/Include/IndustryStandard/SpiNorFlashJedecSfdp.h
new file mode 100644
index 000..2577a1289be
--- /dev/null
+++ b/MdePkg/Include/IndustryStandard/SpiNorFlashJedecSfdp.h
@@ -0,0 +1,324 @@
+/** @file
+  SPI NOR Flash JEDEC Serial Flash Discoverable Parameters (SFDP)
+  header file.
+
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Revision Reference:
+- JEDEC Standard, JESD216F.02
+  https://www.jedec.org/document_search?search_api_views_fulltext=JESD216
+
+  @par Glossary:
+- SFDP - Serial Flash Discoverable Parameters
+- PTP  - Parameter Table Pointer
+**/
+
+#ifndef SPI_NOR_FLASH_JEDEC_H_
+#define SPI_NOR_FLASH_JEDEC_H_
+
+#include 
+
+#define SFDP_HEADER_SIGNATURE  0x50444653
+#define SFDP_SUPPORTED_MAJOR_REVISION  0x1ul
+
+/// JEDEC Basic Flash Parameter Header
+#define SFDP_BASIC_PARAMETER_ID_LSB  0x00
+#define SFDP_BASIC_PARAMETER_ID_MSB  0xFF
+
+///
+/// JDEC Sector Map Parameter Header and Table
+///
+#define SFDP_SECTOR_MAP_PARAMETER_ID_LSB0x81
+#define SFDP_FOUR_BYTE_ADDRESS_INSTRUCTION_LSB  0x84
+#define SFDP_SECTOR_MAP_PARAMETER_ID_MSB0xFF
+
+#define SFDP_FLASH_MEMORY_DENSITY_4GBIT  0x8000
+
+#pragma pack (1)
+typedef struct _SFDP_HEADER {
+  UINT32Signature;
+  UINT32MinorRev: 8;
+  UINT32MajorRev: 8;
+  UINT32NumParameterHeaders : 8;
+  UINT32AccessProtocol  : 8;
+} SFDP_HEADER;
+
+typedef struct _SFDP_PARAMETER_HEADER {
+  UINT32IdLsb: 8;
+  UINT32MinorRev : 8;
+  UINT32MajorRev : 8;
+  UINT32Length   : 8;
+  UINT32TablePointer : 24;
+  UINT32IdMsb: 8;
+} SFDP_PARAMETER_HEADER;
+
+typedef struct _SFDP_BASIC_FLASH_PARAMETER {
+  // DWORD 1
+  UINT32EraseSizes : 2;
+  UINT32WriteGranularity   : 1;
+  UINT32VolatileStatusBlockProtect : 1;
+  UINT32WriteEnableVolatileStatus  : 1;
+  UINT32Unused1Dw1 : 3;
+  UINT32FourKEraseInstr: 8;
+  UINT32FastRead112: 1;
+  UINT32AddressBytes   : 2;
+  UINT32DtrClocking: 1;
+  UINT32FastRead122: 1;
+  UINT32FastRead144: 1;
+  UINT32FastRead114: 1;
+  UINT32Unused2Dw1 : 9;
+  // DWORD 2
+  UINT32Density;
+  // DWORD 3
+  // Fast Read 144
+  UINT32FastRead144Dummy   : 5;
+  UINT32FastRead144ModeClk : 3;
+  UINT32FastRead144Instr   : 8;
+  // Fast Read 114
+  UINT32FastRead114Dummy   : 5;
+  UINT32FastRead114ModeClk : 3;
+  UINT32FastRead114Instr   : 8;
+  // DWORD 4
+  // Fast Read 112
+  UINT32FastRead112Dummy   : 5;
+  UINT32FastRead112ModeClk : 3;
+  UINT32FastRead112Instr   : 8;
+  // Fast Read 122
+  UINT32FastRead122Dummy   : 5;
+  UINT32FastRead122ModeClk : 3;
+  UINT32FastRead122Instr   : 8;
+  // DWORD 5
+  UINT32FastRead222: 1;
+  UINT32Unused1Dw5 : 3;
+  UINT32FastRead444: 1;
+  UINT32Unused2Dw5 : 27;
+  // DWORD 6
+  UINT32UnusedDw6  : 16;
+  // Fast Read 222
+  UINT32FastRead222Dummy   : 5;
+  UINT32FastRead222ModeClk : 3;
+  UINT32FastRead222Instr   : 8;
+  // DWORD 7
+  UINT32UnusedDw7  : 16;
+  // Fast Read 444
+  UINT32FastRead444Dummy   : 5;
+  UINT32FastRead444ModeClk : 3;
+  UINT32FastRead444Instr   : 8;
+  // DWORD 8
+  UINT32Erase1Size : 8;
+  UINT32Erase1Instr: 8;
+  UINT32Erase2Size : 8;
+  UINT32Erase2Instr: 8;
+  // DWORD 9
+  UINT32Erase3Size : 8;
+  UINT32Erase3Instr: 8;
+  UINT32Erase4Size : 8;
+  UINT32Erase4Instr: 8;
+  // DWORD 10
+  UINT32EraseMultiplier: 4;
+  UINT32Erase1Time : 7;
+  UINT32Erase2Time : 7;
+  UINT32Erase3Time : 7;
+  UINT32Erase4Time : 7;
+  // DWORD 11
+  UINT32ProgramMultiplier  : 4;
+  UINT32PageSize   : 4;
+

[edk2-devel] [PATCH V4 3/6] MdeModulePkg: Add definitions in DEC for SPI NOR Flash SFDP driver

2024-04-03 Thread Chang, Abner via groups.io
From: Abner Chang 

BZ#: 4473

Signed-off-by: Abner Chang 
Cc: Liming Gao 
Cc: Jian J Wang 
Cc: Abdul Lateef Attar 
---
 MdeModulePkg/MdeModulePkg.dec | 28 +++-
 1 file changed, 27 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index a82dedc070d..050871cdf6b 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -9,7 +9,7 @@
 # (C) Copyright 2016 - 2019 Hewlett Packard Enterprise Development LP
 # Copyright (c) 2017, AMD Incorporated. All rights reserved.
 # Copyright (c) Microsoft Corporation.
-# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
 ##
@@ -454,6 +454,12 @@
   ## GUID used for Boot Discovery Policy FormSet guid and related variables.
   gBootDiscoveryPolicyMgrFormsetGuid = { 0x5b6f7107, 0xbb3c, 0x4660, { 0x92, 
0xcd, 0x54, 0x26, 0x90, 0x28, 0x0b, 0xbd } }
 
+  #
+  # SPI NOR flash JEDEC Serial Flash Discoverable Parameters (SFDP) driver GUID
+  #
+  gEdk2JedecSfdpSpiDxeDriverGuid  = { 0xBE71701E, 0xB63C, 0x4574, { 0x9C, 
0x5C, 0x36, 0x29, 0xE8, 0xEA, 0xC4, 0x14 }}
+  gEdk2JedecSfdpSpiSmmDriverGuid  = { 0x95A1E915, 0x195C, 0x477C, { 0x92, 
0x6F, 0x7E, 0x24, 0x67, 0xC1, 0xB3, 0x1F }}
+
 [Ppis]
   ## Include/Ppi/FirmwareVolumeShadowPpi.h
   gEdkiiPeiFirmwareVolumeShadowPpiGuid = { 0x7dfe756c, 0xed8d, 0x4d77, {0x9e, 
0xc4, 0x39, 0x9a, 0x8a, 0x81, 0x51, 0x16 } }
@@ -1638,6 +1644,26 @@
   # @Prompt The value of Retry Count,  Default value is 5.
   gEfiMdeModulePkgTokenSpaceGuid.PcdAhciCommandRetryCount|5|UINT32|0x0032
 
+  ## SPI NOR Flash operation retry counts
+  #  0x:  No retry
+  #  0x:  Maximum retry value
+  #
+  # @Prompt SPI NOR Flash Operation Retry Value
+  
gEfiMdeModulePkgTokenSpaceGuid.PcdSpiNorFlashOperationRetryCount|0x0003|UINT32|0x0033
+
+  ## SPI NOR Flash operation retry counts for the fixed timeout value
+  #  0x:  No retry
+  #  0x:  Maximum retry value
+  #
+  # @Prompt SPI NOR Flash Operation Retry Value for the Fixed Timeout Value
+  
gEfiMdeModulePkgTokenSpaceGuid.PcdSpiNorFlashFixedTimeoutRetryCount|0x|UINT32|0x0034
+
+  ## SPI NOR Flash operation delay in microseconds
+  #  Deafult is set to 0x0010 microseconds
+  #
+  # @Prompt SPI NOR Flash Operation Delay in Microseconds (16 us)
+  
gEfiMdeModulePkgTokenSpaceGuid.PcdSpiNorFlashOperationDelayMicroseconds|0x0010|UINT32|0x0035
+
 [PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
   ## This PCD defines the Console output row. The default value is 25 
according to UEFI spec.
   #  This PCD could be set to 0 then console output would be at max column and 
max row.
-- 
2.37.1.windows.1



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[edk2-devel] [PATCH V4 1/6] MdePkg/Include: Update definitions of SPI related header files

2024-04-03 Thread Chang, Abner via groups.io
From: abnchang 

BZ#: 4471
Update definitions according to PI spec 1.8 errata A

Signed-off-by: Abner Chang 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Abdul Lateef Attar 
Cc: Brit Chesley 
---
 MdePkg/Include/Protocol/SpiConfiguration.h | 10 +-
 MdePkg/Include/Protocol/SpiHc.h| 16 +++-
 MdePkg/Include/Protocol/SpiIo.h| 12 +++-
 3 files changed, 35 insertions(+), 3 deletions(-)

diff --git a/MdePkg/Include/Protocol/SpiConfiguration.h 
b/MdePkg/Include/Protocol/SpiConfiguration.h
index 3f8fb9ff62c..7a5da9f9692 100644
--- a/MdePkg/Include/Protocol/SpiConfiguration.h
+++ b/MdePkg/Include/Protocol/SpiConfiguration.h
@@ -2,10 +2,11 @@
   This file defines the SPI Configuration Protocol.
 
   Copyright (c) 2017, Intel Corporation. All rights reserved.
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Revision Reference:
-This Protocol was introduced in UEFI PI Specification 1.6.
+This Protocol was introduced in UEFI PI Specification 1.8 A.
 
 **/
 
@@ -168,6 +169,13 @@ typedef struct _EFI_SPI_BUS {
   VOID*ClockParameter;
 } EFI_SPI_BUS;
 
+///
+/// Definitions of SPI Part Attributes.
+///
+#define SPI_PART_SUPPORTS_2_BIT_DATA_BUS_WIDTH  BIT0
+#define SPl_PART_SUPPORTS_4_B1T_DATA_BUS_WIDTH  BIT1
+#define SPl_PART_SUPPORTS_8_B1T_DATA_BUS_WIDTH  BIT2
+
 ///
 /// The EFI_SPI_PERIPHERAL data structure describes how a specific block of
 /// logic which is connected to the SPI bus. This data structure also selects
diff --git a/MdePkg/Include/Protocol/SpiHc.h b/MdePkg/Include/Protocol/SpiHc.h
index 30128dd5c4d..354de721606 100644
--- a/MdePkg/Include/Protocol/SpiHc.h
+++ b/MdePkg/Include/Protocol/SpiHc.h
@@ -2,10 +2,11 @@
   This file defines the SPI Host Controller Protocol.
 
   Copyright (c) 2017, Intel Corporation. All rights reserved.
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Revision Reference:
-This Protocol was introduced in UEFI PI Specification 1.6.
+This Protocol was introduced in UEFI PI Specification 1.8 A.
 
 **/
 
@@ -121,6 +122,19 @@ typedef EFI_STATUS
   IN EFI_SPI_BUS_TRANSACTION*BusTransaction
   );
 
+///
+/// Definitions of SPI Host Controller Attributes.
+///
+#define HC_SUPPORTS_WRITE_ONLY_OPERATIONS   BIT0
+#define HC_SUPPORTS_READ_ONLY_OPERATIONSBIT1
+#define HC_SUPPORTS_WRITE_THEN_READ_OPERATIONS  BIT2
+#define HC_TX_FRAME_IN_MOST_SIGNIFICANT_BITSBIT3
+#define HC_RX_FRAME_IN_MOST_SIGNIFICANT_BITSBIT4
+#define HC_SUPPORTS_2_BIT_DATA_BUS_WIDTHBIT5
+#define HC_SUPPORTS_4_BIT_DATA_BUS_WIDTHBIT6
+#define HC_SUPPORTS_8_BIT_DATA_BUS_WIDTHBIT7
+#define HC_TRANSFER_SIZE_INCLUDES_OPCODEBIT8
+#define HC_TRANSFER_SIZE_INCLUDES_ADDRESS   BIT9
 ///
 /// Support a SPI data transaction between the SPI controller and a SPI chip.
 ///
diff --git a/MdePkg/Include/Protocol/SpiIo.h b/MdePkg/Include/Protocol/SpiIo.h
index b4fc5e03b88..2c95a375a20 100644
--- a/MdePkg/Include/Protocol/SpiIo.h
+++ b/MdePkg/Include/Protocol/SpiIo.h
@@ -2,10 +2,11 @@
   This file defines the SPI I/O Protocol.
 
   Copyright (c) 2017, Intel Corporation. All rights reserved.
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Revision Reference:
-This Protocol was introduced in UEFI PI Specification 1.6.
+This Protocol was introduced in UEFI PI Specification 1.8 A.
 
 **/
 
@@ -223,6 +224,15 @@ typedef struct _EFI_SPI_BUS_TRANSACTION {
   UINT8   *ReadBuffer;
 } EFI_SPI_BUS_TRANSACTION;
 
+///
+/// Definitions of SPI I/O Attributes.
+///
+#define SPI_IO_SUPPORTS_2_BIT_DATA_BUS_WIDTH   BIT0
+#define SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH   BIT1
+#define SPI_IO_SUPPORTS_8_BIT_DATA_BUS_WIDTH   BIT2
+#define SPI_IO_TRANSFER_SIZE_INCLUDES_OPCODE   BIT3
+#define SPI_IO_TRANSFER_SIZE_INCLUDES_ADDRESS  BIT4
+
 ///
 /// Support managed SPI data transactions between the SPI controller and a SPI
 /// chip.
-- 
2.37.1.windows.1



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[edk2-devel] [PATCH V4 0/6] SPI NOR Flash Driver for SFDP flash device

2024-04-03 Thread Chang, Abner via groups.io
From: Abner Chang 

Sending V4 for review as SPI related ECR is approved by
PIWG in PI spec 1.8A

IN V4: Enhance timeout algorithm
In V3: Relocate GUIDs/PCDs for SPI SFDP drivers to
   MdeModulePkg.dec.
In V2: Add maintainer entry for Bus/Spi.

This patch fixes the missing SPI defintions per to PI spec
1.8 errata A.
This patch also provides the implemtation of SPI NOR flash
driver that supports JEDEC SFDP specification.
This driver support the flash device that has the GUID
gEdk2JedecSfdpSpiDxeDriverGuid or gEdk2JedecSfdpSpiSmmDriverGuid
declared in EFI_SPI_PERIPHERAL SpiPeripheralDriverGuid structure.

The driver has been verified with Macronix MX25U6435F flash device.

Signed-off-by: Abner Chang 
Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Abdul Lateef Attar 
Cc: Hao A Wu 
Cc: Ray Ni 
Cc: Jian J Wang 
Cc: Liming Gao 
Cc: Brit Chesley 

Abner Chang (2):
  MdeModulePkg: Add definitions in DEC for SPI NOR Flash SFDP driver
  Maintainers: AMD as SPI driver stack maintainer

abnchang (4):
  MdePkg/Include: Update definitions of SPI related header files
  MdePkg/Include: Add SPI NOR Flash JEDEC SFDP header file
  MdeModulePkg/SpiNorFlashJedecSfdp: SPI NOR Flash JEDEC SFDP
  MdeModulePkg: Add SPI NOR FLash SFDP drivers to DSC

 MdeModulePkg/MdeModulePkg.dec |   28 +-
 MdeModulePkg/MdeModulePkg.dsc |4 +-
 .../SpiNorFlashJedecSfdpDxe.inf   |   64 +
 .../SpiNorFlashJedecSfdpSmm.inf   |   64 +
 .../Spi/SpiNorFlashJedecSfdp/SpiNorFlash.h|  286 +++
 .../SpiNorFlashJedecSfdpInternal.h|  299 +++
 .../IndustryStandard/SpiNorFlashJedecSfdp.h   |  324 +++
 MdePkg/Include/Protocol/SpiConfiguration.h|   10 +-
 MdePkg/Include/Protocol/SpiHc.h   |   16 +-
 MdePkg/Include/Protocol/SpiIo.h   |   12 +-
 .../Spi/SpiNorFlashJedecSfdp/SpiNorFlash.c| 1137 +++
 .../SpiNorFlashJedecSfdp.c| 1782 +
 .../SpiNorFlashJedecSfdpDxe.c |  261 +++
 .../SpiNorFlashJedecSfdpSmm.c |  234 +++
 Maintainers.txt   |   11 +
 .../SpiNorFlashJedecSfdpDxe.uni   |   13 +
 .../SpiNorFlashJedecSfdpExtra.uni |   11 +
 .../SpiNorFlashJedecSfdpSmm.uni   |   13 +
 18 files changed, 4564 insertions(+), 5 deletions(-)
 create mode 100644 
MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpDxe.inf
 create mode 100644 
MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpSmm.inf
 create mode 100644 MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlash.h
 create mode 100644 
MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpInternal.h
 create mode 100644 MdePkg/Include/IndustryStandard/SpiNorFlashJedecSfdp.h
 create mode 100644 MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlash.c
 create mode 100644 
MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdp.c
 create mode 100644 
MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpDxe.c
 create mode 100644 
MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpSmm.c
 create mode 100644 
MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpDxe.uni
 create mode 100644 
MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpExtra.uni
 create mode 100644 
MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpSmm.uni

-- 
2.37.1.windows.1



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[edk2-devel] [PATCH] IntelFsp2Pkg: Optional Plugin for FSP SecCore/PeiCore Rebasing

2024-04-03 Thread Zhiguang Liu
This optional plugin is designed to execute before the FSP SecCore to
rebase SecCore and PeiCore during runtime. If the FSP binary requires
rebasing at runtime, this module should be included within the FSP
binary. Additionally, specific patches must be applied to ensure proper
functionality.
In the absence of this module, manual patching of API offsets within
the FSP header is necessary. To illustrate, let's consider a scenario
within FSP-S where 'FspSiliconInitEntry' is the initial API to be
executed post-rebase.
Rather than directly inputting the 'FspSiliconInit' offset into the
'FspSiliconInitEntryOffset' field of the FSP header, the entry point
of this module should be used.
Furthermore, the 'FspSiliconInit' offset should be placed into
'AsmGetFspSecEntry', which signifies the address to which this module
will jump.
It is also essential to patch the image bases of SecCore and PeiCore
to enable the rebasing functionality of this module.

The following is an example of how to apply the necessary patches:
Patch Address   Patch Value
 PreFspSecS:_ModuleEntryPoint - [0x]
PreFspSecS:SecCoreRelativeOff   PreFspSecS:AsmGetFspSecCore
   - Fsp24SecCoreS:BASE
PreFspSecS:PeiCoreRelativeOff   PreFspSecS:AsmGetFspPeiCore
   - PeiCore:BASE
PreFspSecS:SecEntryRelativeOff  PreFspSecS:AsmGetFspSecEntry
  - Fsp24SecCoreS:FspSiliconInitApi

Cc: Chasel Chiu 
Cc: Nate DeSimone 
Cc: Duggapu Chinni B 
Cc: Star Zeng 
Cc: Ted Kuo 
Cc: Ashraf Ali S 
Cc: Susovan Mohapatra 
Cc: Ray Ni 
Signed-off-by: Zhiguang Liu 
---
 IntelFsp2Pkg/IntelFsp2Pkg.dsc |   5 +
 IntelFsp2Pkg/PreFspSec/PreFspSec.c| 115 ++
 IntelFsp2Pkg/PreFspSec/PreFspSec.inf  |  61 ++
 .../PreFspSec/X64/PreFspSecCommon.nasm|  69 +++
 4 files changed, 250 insertions(+)
 create mode 100644 IntelFsp2Pkg/PreFspSec/PreFspSec.c
 create mode 100644 IntelFsp2Pkg/PreFspSec/PreFspSec.inf
 create mode 100644 IntelFsp2Pkg/PreFspSec/X64/PreFspSecCommon.nasm

diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dsc b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
index f236a7010b..a2cc29c940 100644
--- a/IntelFsp2Pkg/IntelFsp2Pkg.dsc
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.dsc
@@ -33,6 +33,8 @@
   SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
   
ReportStatusCodeLib|MdePkg/Library/BaseReportStatusCodeLibNull/BaseReportStatusCodeLibNull.inf
   
DebugDeviceLib|IntelFsp2Pkg/Library/BaseDebugDeviceLibNull/BaseDebugDeviceLibNull.inf
+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+  
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
 
   # FSP override
   
DebugLib|IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/BaseFspDebugLibSerialPort.inf
@@ -75,6 +77,9 @@
   IntelFsp2Pkg/FspSecCore/Fsp24SecCoreS.inf
   IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf
 
+[Components.X64]
+  IntelFsp2Pkg/PreFspSec/PreFspSec.inf
+
 [PcdsFixedAtBuild.common]
   gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x1f
   gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80080046
diff --git a/IntelFsp2Pkg/PreFspSec/PreFspSec.c 
b/IntelFsp2Pkg/PreFspSec/PreFspSec.c
new file mode 100644
index 00..d5fd028afc
--- /dev/null
+++ b/IntelFsp2Pkg/PreFspSec/PreFspSec.c
@@ -0,0 +1,115 @@
+/** @file
+
+  Copyright (c) 2024, Intel Corporation. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include "Guid/FspHeaderFile.h"
+#include 
+#include 
+#include 
+#include 
+
+/**
+  This interface gets SecCore image base
+
+  @return   SecCore image base, or zero if no patch in nasm code
+
+**/
+UINTN
+EFIAPI
+AsmGetFspSecCore (
+  VOID
+  );
+
+/**
+  This interface gets PeiCore image base
+
+  @return   PeiCore image base, or zero if no patch in nasm code
+
+**/
+UINTN
+EFIAPI
+AsmGetFspPeiCore (
+  VOID
+  );
+
+/**
+  Relocate Pe/Te Image
+
+  @param[in] ImageBaseAddress   Image base address
+
+  @retval EFI_SUCCESS   Image is relocated successfully
+  @retval OthersImage is not relocated successfully
+**/
+EFI_STATUS
+RelocatePeTeImage (
+  UINT64  ImageBaseAddress
+  )
+{
+  RETURN_STATUS Status;
+  PE_COFF_LOADER_IMAGE_CONTEXT  ImageContext;
+
+  ZeroMem (&ImageContext, sizeof (ImageContext));
+
+  ImageContext.Handle= (VOID *)ImageBaseAddress;
+  ImageContext.ImageRead = PeCoffLoaderImageReadFromMemory;
+
+  Status = PeCoffLoaderGetImageInfo (&ImageContext);
+  if (EFI_ERROR (Status)) {
+ASSERT_EFI_ERROR (Status);
+return Status;
+  }
+
+  ImageContext.ImageAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)ImageBaseAddress;
+
+  //
+  // rebase the image
+  //
+  Status = PeCoffLoaderRelocateImage (&ImageContext);
+
+  ASSERT_EFI_ERROR (Status);
+  return Status;
+}
+
+/**
+  This function will patch the Sec Core and Pei Core in current FSP.
+**/
+VOID
+EFIAPI
+FspPatchSecAndPeiCore (
+  V

Re: [edk2-devel] Refactoring the UEFI shell

2024-04-03 Thread Yoshinoya
Hi, Sheng:
Could you help to implement a new redirection mechanism?
For example:
User wants to output messages on screen, and also redirect the output  messages 
into a file at the same time .


Current redirection mechanism is a alternative choice.
















At 2024-03-27 18:27:34, "Sheng Lean Tan"  wrote:

Hi all,
Any feedback regarding this? :P
Any thoughts?
Much appreciated!


Best Regards,
Sheng


On Tue, 19 Mar 2024 at 18:44, Benjamin Doron  wrote:

Hi all,
We're planning to refactor the shell into a library so that shell apps possibly 
used in the field for testing can be easily adapted for automation.


Our plan is:
Refactor ShellInfoObject into base internals and interactive elements

Migrate functions that imply interactivity into a new library class, and write 
some stubs in a LibNull
Refactor last shell app files (file interface, shell env var) into another (or 
same) library

Implement non-interactive functions, as required
Write an example implementation in MdeModulePkg/Application/


We're looking for thoughts and ideas on our approach, as well as opinions on 
the concept.



Best regards,
Benjamin



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Re: [edk2-devel] [PATCH 3/3] PlatformHookLib: Set PcdSerialClockRate using HOB data

2024-04-03 Thread Sean Rhodes
PR created - https://github.com/tianocore/edk2/pull/5513

LGTM but I can't check it against UPL.

@Dong, Guo  Would you be able to take a look please'?

On Wed, 4 Oct 2023 at 21:02, MrChromebox  wrote:

> Fixes serial output on platforms using coreboot and a non-default
> clock rate such as AMD Picasso and newer Zen-based platforms.
>
> Signed-off-by: Matt DeVillier 
> Change-Id: I91290397852176754e9a34ec6e5829044f41d15a
> ---
>  UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c   | 5 +
>  UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf | 1 +
>  2 files changed, 6 insertions(+)
>
> diff --git a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
> b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
> index 60a17b8fc2..e3d47ac2fa 100644
> --- a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
> +++ b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
> @@ -90,6 +90,11 @@ PlatformHookSerialPortInitialize (
>return Status;
>  }
>
> +Status = PcdSet32S (PcdSerialClockRate, SerialPortInfo->ClockRate);
> +if (RETURN_ERROR (Status)) {
> +  return Status;
> +}
> +
>  return RETURN_SUCCESS;
>}
>
> diff --git a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf
> b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf
> index 7ac6bfa1b1..e2908cfbca 100644
> --- a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf
> +++ b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf
> @@ -38,3 +38,4 @@
>gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase## PRODUCES
>gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate## PRODUCES
>gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride  ## PRODUCES
> +  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate   ## PRODUCES
> --
> 2.34.1
>
>
>
> 
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> 
>
>
>


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[edk2-devel] [PATCH v2 6/6] StandaloneMmPkg: Support to unregister MMI handler in MMI handlers

2024-04-03 Thread Zhiguang Liu
Unregistering MMI handler will free the MMI_HANDLER. However, the
MmiManage() may be using the link node from MMI_HANDLER for loop if
the unregistering happens in MMI handlers.
To avoid that, the idea is to inform MmiHandlerUnRegister() whether
it's running or not running on the stack of MmiManage(), and to
postpone MMI_HANDLER deletion until after the loop finishes.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Signed-off-by: Zhiguang Liu 
---
 StandaloneMmPkg/Core/Mmi.c | 149 +++--
 1 file changed, 126 insertions(+), 23 deletions(-)

diff --git a/StandaloneMmPkg/Core/Mmi.c b/StandaloneMmPkg/Core/Mmi.c
index 0de6fd17fc..b13c7a3bc6 100644
--- a/StandaloneMmPkg/Core/Mmi.c
+++ b/StandaloneMmPkg/Core/Mmi.c
@@ -34,11 +34,50 @@ typedef struct {
   LIST_ENTRYLink;// Link on MMI_ENTRY.MmiHandlers
   EFI_MM_HANDLER_ENTRY_POINTHandler; // The mm handler's entry point
   MMI_ENTRY *MmiEntry;
+  BOOLEAN   ToDelete;// To delete this MMI_HANDLER 
later
 } MMI_HANDLER;
 
+//
+// mMmiManageCallingDepth is used to track the depth of recursive calls of 
MmiManage.
+//
+UINTN  mMmiManageCallingDepth = 0;
+
 LIST_ENTRY  mRootMmiHandlerList = INITIALIZE_LIST_HEAD_VARIABLE 
(mRootMmiHandlerList);
 LIST_ENTRY  mMmiEntryList   = INITIALIZE_LIST_HEAD_VARIABLE 
(mMmiEntryList);
 
+/**
+  Remove MmiHandler and free the memory it used.
+  If MmiEntry is empty, remove MmiEntry and free the memory it used.
+
+  @param  MmiHandler  Points to MMI handler.
+  @param  MmiEntryPoints to MMI Entry or NULL for root MMI handlers.
+
+  @retval TRUEMmiEntry is removed.
+  @retval FALSE   MmiEntry is not removed.
+**/
+BOOLEAN
+RemoveMmiHandler (
+  IN MMI_HANDLER  *MmiHandler,
+  IN MMI_ENTRY*MmiEntry
+  )
+{
+  RemoveEntryList (&MmiHandler->Link);
+  FreePool (MmiHandler);
+
+  if (MmiEntry != NULL) {
+if (IsListEmpty (&MmiEntry->MmiHandlers)) {
+  //
+  // No handler registered for this MMI_ENTRY, remove the MMI_ENTRY
+  //
+  RemoveEntryList (&MmiEntry->AllEntries);
+  FreePool (MmiEntry);
+  return TRUE;
+}
+  }
+
+  return FALSE;
+}
+
 /**
   Finds the MMI entry for the requested handler type.
 
@@ -126,13 +165,16 @@ MmiManage (
 {
   LIST_ENTRY   *Link;
   LIST_ENTRY   *Head;
+  LIST_ENTRY   *EntryLink;
   MMI_ENTRY*MmiEntry;
   MMI_HANDLER  *MmiHandler;
-  BOOLEAN  SuccessReturn;
+  EFI_STATUS   ReturnStatus;
+  BOOLEAN  WillReturn;
   EFI_STATUS   Status;
 
-  Status= EFI_NOT_FOUND;
-  SuccessReturn = FALSE;
+  mMmiManageCallingDepth++;
+  Status   = EFI_NOT_FOUND;
+  ReturnStatus = Status;
   if (HandlerType == NULL) {
 //
 // Root MMI handler
@@ -171,7 +213,16 @@ MmiManage (
 // no additional handlers will be processed and EFI_INTERRUPT_PENDING 
will be returned.
 //
 if (HandlerType != NULL) {
-  return EFI_INTERRUPT_PENDING;
+  ReturnStatus = EFI_INTERRUPT_PENDING;
+  WillReturn   = TRUE;
+} else {
+  //
+  // If any other handler's result sets ReturnStatus as EFI_SUCCESS, 
the return status
+  // will be EFI_SUCCESS.
+  //
+  if (ReturnStatus != EFI_SUCCESS) {
+ReturnStatus = Status;
+  }
 }
 
 break;
@@ -183,10 +234,10 @@ MmiManage (
 // additional handlers will be processed.
 //
 if (HandlerType != NULL) {
-  return EFI_SUCCESS;
+  WillReturn = TRUE;
 }
 
-SuccessReturn = TRUE;
+ReturnStatus = EFI_SUCCESS;
 break;
 
   case EFI_WARN_INTERRUPT_SOURCE_QUIESCED:
@@ -194,7 +245,7 @@ MmiManage (
 // If at least one of the handlers returns 
EFI_WARN_INTERRUPT_SOURCE_QUIESCED
 // then the function will return EFI_SUCCESS.
 //
-SuccessReturn = TRUE;
+ReturnStatus = EFI_SUCCESS;
 break;
 
   case EFI_WARN_INTERRUPT_SOURCE_PENDING:
@@ -202,6 +253,10 @@ MmiManage (
 // If all the handlers returned EFI_WARN_INTERRUPT_SOURCE_PENDING
 // then EFI_WARN_INTERRUPT_SOURCE_PENDING will be returned.
 //
+if (ReturnStatus != EFI_SUCCESS) {
+  ReturnStatus = Status;
+}
+
 break;
 
   default:
@@ -211,13 +266,67 @@ MmiManage (
 ASSERT_EFI_ERROR (Status);
 break;
 }
+
+if (WillReturn) {
+  break;
+}
   }
 
-  if (SuccessReturn) {
-Status = EFI_SUCCESS;
+  ASSERT (mMmiManageCallingDepth > 0);
+  mMmiManageCallingDepth--;
+
+  //
+  // The MmiHandlerUnRegister won't take effect inside MmiManage.
+  // Before returned from MmiManage, delete the MmiHandler which is
+  // marked as ToDelete.
+  // Note that MmiManage can be called recursively.
+  //
+  if (mMmiManageCallingDepth == 0) {
+//
+// Go through all MmiHandler in

[edk2-devel] [PATCH v2 5/6] MdeModulePkg/SMM: Support to unregister SMI handler in SMI handlers

2024-04-03 Thread Zhiguang Liu
Unregistering SMI handler will free the SMI_HANDLER. However, the
SmiManage() may be using the link node from SMI_HANDLER for loop if
the unregistering happens in SMI handlers.
To avoid that, the idea is to inform SmiHandlerUnRegister() whether
it's running or not running on the stack of SmiManage(), and to
postpone SMI_HANDLER deletion before SmiManage() returns.
Noted SmiManage() may be called recursively, the SmiHandlerUnRegister()
won't take effect until the root SmiManage() returns.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Signed-off-by: Zhiguang Liu 
---
 MdeModulePkg/Core/PiSmmCore/PiSmmCore.h |   1 +
 MdeModulePkg/Core/PiSmmCore/Smi.c   | 147 
 2 files changed, 123 insertions(+), 25 deletions(-)

diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.h 
b/MdeModulePkg/Core/PiSmmCore/PiSmmCore.h
index b8a490a8c3..72e0ee2cf0 100644
--- a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.h
+++ b/MdeModulePkg/Core/PiSmmCore/PiSmmCore.h
@@ -93,6 +93,7 @@ typedef struct {
   SMI_ENTRY   *SmiEntry;
   VOID*Context;// for profile
   UINTN   ContextSize; // for profile
+  BOOLEAN ToDelete;// To delete this SMI_HANDLER 
later
 } SMI_HANDLER;
 
 //
diff --git a/MdeModulePkg/Core/PiSmmCore/Smi.c 
b/MdeModulePkg/Core/PiSmmCore/Smi.c
index 2985f989c3..b8400b25a4 100644
--- a/MdeModulePkg/Core/PiSmmCore/Smi.c
+++ b/MdeModulePkg/Core/PiSmmCore/Smi.c
@@ -8,6 +8,11 @@
 
 #include "PiSmmCore.h"
 
+//
+// mSmiManageCallingDepth is used to track the depth of recursive calls of 
SmiManage.
+//
+UINTN  mSmiManageCallingDepth = 0;
+
 LIST_ENTRY  mSmiEntryList = INITIALIZE_LIST_HEAD_VARIABLE (mSmiEntryList);
 
 SMI_ENTRY  mRootSmiEntry = {
@@ -79,6 +84,39 @@ SmmCoreFindSmiEntry (
   return SmiEntry;
 }
 
+/**
+  Remove SmiHandler and free the memory it used.
+  If SmiEntry is empty, remove SmiEntry and free the memory it used.
+
+  @param  SmiHandler Points to SMI handler.
+  @param  SmiEntry   Points to SMI Entry or NULL for root SMI handlers.
+
+  @retval TRUESmiEntry is removed.
+  @retval FALSE   SmiEntry is not removed.
+**/
+BOOLEAN
+RemoveSmiHandler (
+  IN SMI_HANDLER  *SmiHandler,
+  IN SMI_ENTRY*SmiEntry
+  )
+{
+  RemoveEntryList (&SmiHandler->Link);
+  FreePool (SmiHandler);
+
+  if (SmiEntry != NULL) {
+if (IsListEmpty (&SmiEntry->SmiHandlers)) {
+  //
+  // No handler registered for this SMI_ENTRY now, remove the SMI_ENTRY
+  //
+  RemoveEntryList (&SmiEntry->AllEntries);
+  FreePool (SmiEntry);
+  return TRUE;
+}
+  }
+
+  return FALSE;
+}
+
 /**
   Manage SMI of a particular type.
 
@@ -104,15 +142,17 @@ SmiManage (
 {
   LIST_ENTRY   *Link;
   LIST_ENTRY   *Head;
+  LIST_ENTRY   *EntryLink;
   SMI_ENTRY*SmiEntry;
   SMI_HANDLER  *SmiHandler;
-  BOOLEAN  SuccessReturn;
+  EFI_STATUS   ReturnStatus;
+  BOOLEAN  WillReturn;
   EFI_STATUS   Status;
 
   PERF_FUNCTION_BEGIN ();
-
-  Status= EFI_NOT_FOUND;
-  SuccessReturn = FALSE;
+  mSmiManageCallingDepth++;
+  Status   = EFI_NOT_FOUND;
+  ReturnStatus = Status;
   if (HandlerType == NULL) {
 //
 // Root SMI handler
@@ -152,7 +192,16 @@ SmiManage (
 //
 if (HandlerType != NULL) {
   PERF_FUNCTION_END ();
-  return EFI_INTERRUPT_PENDING;
+  ReturnStatus = EFI_INTERRUPT_PENDING;
+  WillReturn   = TRUE;
+} else {
+  //
+  // If any other handler's result sets ReturnStatus as EFI_SUCCESS, 
the return status
+  // will be EFI_SUCCESS.
+  //
+  if (ReturnStatus != EFI_SUCCESS) {
+ReturnStatus = Status;
+  }
 }
 
 break;
@@ -165,10 +214,10 @@ SmiManage (
 //
 if (HandlerType != NULL) {
   PERF_FUNCTION_END ();
-  return EFI_SUCCESS;
+  WillReturn = TRUE;
 }
 
-SuccessReturn = TRUE;
+ReturnStatus = EFI_SUCCESS;
 break;
 
   case EFI_WARN_INTERRUPT_SOURCE_QUIESCED:
@@ -176,7 +225,7 @@ SmiManage (
 // If at least one of the handlers returns 
EFI_WARN_INTERRUPT_SOURCE_QUIESCED
 // then the function will return EFI_SUCCESS.
 //
-SuccessReturn = TRUE;
+ReturnStatus = EFI_SUCCESS;
 break;
 
   case EFI_WARN_INTERRUPT_SOURCE_PENDING:
@@ -184,6 +233,10 @@ SmiManage (
 // If all the handlers returned EFI_WARN_INTERRUPT_SOURCE_PENDING
 // then EFI_WARN_INTERRUPT_SOURCE_PENDING will be returned.
 //
+if (ReturnStatus != EFI_SUCCESS) {
+  ReturnStatus = Status;
+}
+
 break;
 
   default:
@@ -193,14 +246,65 @@ SmiManage (
 ASSERT (FALSE);
 break;
 }
+
+if (WillReturn) {
+  break;
+}
   }
 
-  if (SuccessReturn) {
-Status = EFI_SUCCESS;
+  ASSERT (mSmiManageCallingDepth > 0);
+  mSmiManageC

[edk2-devel] [PATCH v2 4/6] Revert ae1079b386a597108a8070652bf7cdaa4ec3dda3

2024-04-03 Thread Zhiguang Liu
This reverts "MdeModulePkg/SMM: Support to unregister
SMI handler inside SMI handler" for better design later.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Signed-off-by: Zhiguang Liu 
---
 MdeModulePkg/Core/PiSmmCore/Smi.c | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/MdeModulePkg/Core/PiSmmCore/Smi.c 
b/MdeModulePkg/Core/PiSmmCore/Smi.c
index 3489c130fd..2985f989c3 100644
--- a/MdeModulePkg/Core/PiSmmCore/Smi.c
+++ b/MdeModulePkg/Core/PiSmmCore/Smi.c
@@ -134,14 +134,8 @@ SmiManage (
 
   Head = &SmiEntry->SmiHandlers;
 
-  for (Link = Head->ForwardLink; Link != Head;) {
+  for (Link = Head->ForwardLink; Link != Head; Link = Link->ForwardLink) {
 SmiHandler = CR (Link, SMI_HANDLER, Link, SMI_HANDLER_SIGNATURE);
-//
-// To support unregister SMI handler inside SMI handler itself,
-// get next node before handler is executed, since LIST_ENTRY that
-// Link points to may be freed if unregister SMI handler.
-//
-Link = Link->ForwardLink;
 
 Status = SmiHandler->Handler (
(EFI_HANDLE)SmiHandler,
-- 
2.31.1.windows.1



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[edk2-devel] [PATCH v2 3/6] Revert 17b28722008eab745ce186b72cd325944cbe6bf0

2024-04-03 Thread Zhiguang Liu
This reverts commit "MdeModulePkg/SMM: Disallow unregister
 SMI handler in other SMI handler" for better design later.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Signed-off-by: Zhiguang Liu 
---
 MdeModulePkg/Core/PiSmmCore/Smi.c | 29 -
 1 file changed, 8 insertions(+), 21 deletions(-)

diff --git a/MdeModulePkg/Core/PiSmmCore/Smi.c 
b/MdeModulePkg/Core/PiSmmCore/Smi.c
index b3a81ac877..3489c130fd 100644
--- a/MdeModulePkg/Core/PiSmmCore/Smi.c
+++ b/MdeModulePkg/Core/PiSmmCore/Smi.c
@@ -8,8 +8,7 @@
 
 #include "PiSmmCore.h"
 
-SMI_HANDLER  *mCurrentSmiHandler = NULL;
-LIST_ENTRY   mSmiEntryList   = INITIALIZE_LIST_HEAD_VARIABLE 
(mSmiEntryList);
+LIST_ENTRY  mSmiEntryList = INITIALIZE_LIST_HEAD_VARIABLE (mSmiEntryList);
 
 SMI_ENTRY  mRootSmiEntry = {
   SMI_ENTRY_SIGNATURE,
@@ -143,18 +142,13 @@ SmiManage (
 // Link points to may be freed if unregister SMI handler.
 //
 Link = Link->ForwardLink;
-//
-// Assign gCurrentSmiHandle before calling the SMI handler and
-// set to NULL when it returns.
-//
-mCurrentSmiHandler = SmiHandler;
-Status = SmiHandler->Handler (
-   (EFI_HANDLE)SmiHandler,
-   Context,
-   CommBuffer,
-   CommBufferSize
-   );
-mCurrentSmiHandler = NULL;
+
+Status = SmiHandler->Handler (
+   (EFI_HANDLE)SmiHandler,
+   Context,
+   CommBuffer,
+   CommBufferSize
+   );
 
 switch (Status) {
   case EFI_INTERRUPT_PENDING:
@@ -334,13 +328,6 @@ SmiHandlerUnRegister (
 return EFI_INVALID_PARAMETER;
   }
 
-  //
-  // Do not allow to unregister SMI Handler inside other SMI Handler
-  //
-  if ((mCurrentSmiHandler != NULL) && (mCurrentSmiHandler != SmiHandler)) {
-return EFI_INVALID_PARAMETER;
-  }
-
   SmiEntry = SmiHandler->SmiEntry;
 
   RemoveEntryList (&SmiHandler->Link);
-- 
2.31.1.windows.1



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[edk2-devel] [PATCH v2 2/6] Revert 049ff6c39c73edd3709c05bd0e46184320471358

2024-04-03 Thread Zhiguang Liu
This reverts commit "StandaloneMmPkg: Support to unregister
MMI handler inside MMI handler" for better design later.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Signed-off-by: Zhiguang Liu 
---
 StandaloneMmPkg/Core/Mmi.c | 9 ++---
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/StandaloneMmPkg/Core/Mmi.c b/StandaloneMmPkg/Core/Mmi.c
index c1a1d76e85..0de6fd17fc 100644
--- a/StandaloneMmPkg/Core/Mmi.c
+++ b/StandaloneMmPkg/Core/Mmi.c
@@ -154,14 +154,9 @@ MmiManage (
 Head = &MmiEntry->MmiHandlers;
   }
 
-  for (Link = Head->ForwardLink; Link != Head;) {
+  for (Link = Head->ForwardLink; Link != Head; Link = Link->ForwardLink) {
 MmiHandler = CR (Link, MMI_HANDLER, Link, MMI_HANDLER_SIGNATURE);
-//
-// To support unregister MMI handler inside MMI handler itself,
-// get next node before handler is executed, since LIST_ENTRY that
-// Link points to may be freed if unregister MMI handler.
-//
-Link   = Link->ForwardLink;
+
 Status = MmiHandler->Handler (
(EFI_HANDLE)MmiHandler,
Context,
-- 
2.31.1.windows.1



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[edk2-devel] [PATCH v2 1/6] Revert 2ec8f0c6407f062441b205b900038933865c7b3c

2024-04-03 Thread Zhiguang Liu
This reverts commit "StandaloneMmPkg: Disallow unregister MMI
handler in other MMI handler" for better design later.

Cc: Liming Gao 
Cc: Jiaxin Wu 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Ard Biesheuvel 
Cc: Sami Mujawar 
Signed-off-by: Zhiguang Liu 
---
 StandaloneMmPkg/Core/Mmi.c | 32 +---
 1 file changed, 9 insertions(+), 23 deletions(-)

diff --git a/StandaloneMmPkg/Core/Mmi.c b/StandaloneMmPkg/Core/Mmi.c
index 9e52072bf7..c1a1d76e85 100644
--- a/StandaloneMmPkg/Core/Mmi.c
+++ b/StandaloneMmPkg/Core/Mmi.c
@@ -36,9 +36,8 @@ typedef struct {
   MMI_ENTRY *MmiEntry;
 } MMI_HANDLER;
 
-LIST_ENTRY   mRootMmiHandlerList = INITIALIZE_LIST_HEAD_VARIABLE 
(mRootMmiHandlerList);
-LIST_ENTRY   mMmiEntryList   = INITIALIZE_LIST_HEAD_VARIABLE 
(mMmiEntryList);
-MMI_HANDLER  *mCurrentMmiHandler = NULL;
+LIST_ENTRY  mRootMmiHandlerList = INITIALIZE_LIST_HEAD_VARIABLE 
(mRootMmiHandlerList);
+LIST_ENTRY  mMmiEntryList   = INITIALIZE_LIST_HEAD_VARIABLE 
(mMmiEntryList);
 
 /**
   Finds the MMI entry for the requested handler type.
@@ -162,19 +161,13 @@ MmiManage (
 // get next node before handler is executed, since LIST_ENTRY that
 // Link points to may be freed if unregister MMI handler.
 //
-Link = Link->ForwardLink;
-//
-// Assign gCurrentMmiHandle before calling the MMI handler and
-// set to NULL when it returns.
-//
-mCurrentMmiHandler = MmiHandler;
-Status = MmiHandler->Handler (
-   (EFI_HANDLE)MmiHandler,
-   Context,
-   CommBuffer,
-   CommBufferSize
-   );
-mCurrentMmiHandler = NULL;
+Link   = Link->ForwardLink;
+Status = MmiHandler->Handler (
+   (EFI_HANDLE)MmiHandler,
+   Context,
+   CommBuffer,
+   CommBufferSize
+   );
 
 switch (Status) {
   case EFI_INTERRUPT_PENDING:
@@ -321,13 +314,6 @@ MmiHandlerUnRegister (
 return EFI_INVALID_PARAMETER;
   }
 
-  //
-  // Do not allow to unregister MMI Handler inside other MMI Handler
-  //
-  if ((mCurrentMmiHandler != NULL) && (mCurrentMmiHandler != MmiHandler)) {
-return EFI_INVALID_PARAMETER;
-  }
-
   MmiEntry = MmiHandler->MmiEntry;
 
   RemoveEntryList (&MmiHandler->Link);
-- 
2.31.1.windows.1



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[edk2-devel] [PATCH v2 0/6] Support to unregister SMI handler in SMI handlers

2024-04-03 Thread Zhiguang Liu
Months ago, I sent patch set to fix potential issues in the usage of SMI 
handler unregistering SMI handler. Discussion can be found in below
link:
https://edk2.groups.io/g/devel/topic/103925794#114251

The conclusion was to only support SMI handler unregistering itself, and not 
allow  SMI handler unregistering other handlers, because we thought there would 
be no such usage.
However, recently, I find in some platform, there is kind of usage.
To also support SMI handler unregistering other handlers, this patch set use a 
totally different design. So I revert the former ones first to make the code 
more readable.

Thank Laszlo for bring up the initial idea for the new design.

V2:
A limit simplication based on Ray's comments

Zhiguang Liu (6):
  Revert 2ec8f0c6407f062441b205b900038933865c7b3c
  Revert 049ff6c39c73edd3709c05bd0e46184320471358
  Revert 17b28722008eab745ce186b72cd325944cbe6bf0
  Revert ae1079b386a597108a8070652bf7cdaa4ec3dda3
  MdeModulePkg/SMM: Support to unregister SMI handler in SMI handlers
  StandaloneMmPkg: Support to unregister MMI handler in MMI handlers

 MdeModulePkg/Core/PiSmmCore/PiSmmCore.h |   1 +
 MdeModulePkg/Core/PiSmmCore/Smi.c   | 184 ---
 StandaloneMmPkg/Core/Mmi.c  | 188 +---
 3 files changed, 268 insertions(+), 105 deletions(-)

-- 
2.31.1.windows.1



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Re: [edk2-devel] Is there a way to create filesystem in UEFI Shell ?

2024-04-03 Thread Yoshinoya
Maybe ref to ramdisk sample, create a memory type block io device, then mount 
file system on it.
UEFI supports fat file system, some 3rd drivers could be added to support ext4 
filesystem.
Search them on github website
















At 2024-04-01 11:43:59, "John Chew"  wrote:

Hi Michael,

 

Thanks for the tool recommendation. 

However, the tools are useful for x86, arm, and IPF platforms. I'm working on a 
RISC-V platform.

I wanted to compile the tools for RISC-V, but the link is not found:

https://edk.tianocore.org/files/documents/16/347/file_347.dat/EDK%20Build_0_2.pdf
 (This link is located in ReleaseNote.txt)

 

Do you know if there are similar tools that can be use in RISC-V platform?

 

Thanks! =)

John

 



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Re: [edk2-devel] [PATCH v3 00/24] Provide SEV-SNP support for running under an SVSM

2024-04-03 Thread Ni, Ray
I think I've acked all patches in UefiCpuPkg.
Please let me know if any other patches need my review.

Thanks,
Ray

From: devel@edk2.groups.io  on behalf of Lendacky, Thomas 
via groups.io 
Sent: Wednesday, April 3, 2024 2:16
To: devel@edk2.groups.io ; Yao, Jiewen 
; Liming Gao ; Ni, Ray 
; Liu, Zhiguang ; Kinney, Michael D 
; Guo, Gua ; Dong, Guo 
; Lu, James ; Rhodes, Sean 
; Kumar, Rahul R 
Cc: Ard Biesheuvel ; Aktas, Erdem 
; Gerd Hoffmann ; Xu, Min M 
; Michael Roth ; Anatol Belski 
; Anthony Perard ; 
Corvin Köhne ; Jianyong Wu ; Rebecca 
Cran 
Subject: Re: [edk2-devel] [PATCH v3 00/24] Provide SEV-SNP support for running 
under an SVSM

Re-pinging the list/maintainers. Still awaiting feedback/reviews/acks on
the changes.

Thanks,
Tom

On 3/26/24 13:34, Tom Lendacky wrote:
> Any issues with this version of the series? Still looking for
> Reviewed-by's for the MdePkg, UefiCpuPkg and UefiPayloadPkg related
> patches.
>
> Once I get those, I'll submit the edk2-platform patches to support the
> new library as a response to these patches for a quick review.
>
> Thanks,
> Tom
>
> On 3/8/24 09:29, Tom Lendacky wrote:
>>
>> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654
>>
>> This series adds SEV-SNP support for running OVMF under an Secure VM
>> Service Module (SVSM) at a less privileged VM Privilege Level (VMPL).
>> By running at a less priviledged VMPL, the SVSM can be used to provide
>> services, e.g. a virtual TPM, for the guest OS within the SEV-SNP
>> confidential VM (CVM) rather than trust such services from the
>> hypervisor.
>>
>> Currently, OVMF expects to run at the highest VMPL, VMPL0, and there are
>> certain SNP related operations that require that VMPL level.
>> Specifically,
>> the PVALIDATE instruction and the RMPADJUST instruction when setting the
>> the VMSA attribute of a page (used when starting APs).
>>
>> If OVMF is to run at a less privileged VMPL, e.g. VMPL2, then it must
>> use an SVSM (which is running at VMPL0) to perform the operations that
>> it is no longer able to perform.
>>
>> When running under an SVSM, OVMF must know the APIC IDs of the vCPUs that
>> it will be starting. As a result, the GHCB APIC ID retrieval action must
>> be performed. Since this service can also work with SEV-SNP running at
>> VMPL0, the patches to make use of this feature are near the beginning of
>> the series.
>>
>> How OVMF interacts with and uses the SVSM is documented in the SVSM
>> specification [1] and the GHCB specification [2].
>>
>> This support creates a new AmdSvsmLib library that is used by MpInitLib.
>> The edk2-platforms repo requires updates/patches to add the new library
>> requirement. To accomodate that, this series could be split between:
>>
>> patch number 12:
>>UefiCpuPkg/AmdSvsmLib: Create the AmdSvsmLib library to support an
>> SVSM
>>
>> and patch number 13:
>>UefiPayloadPkg: Prepare UefiPayloadPkg to use the AmdSvsmLib library
>>
>> The updates to edk2-platforms can be applied at the split.
>>
>> This series introduces support to run OVMF under an SVSM. It consists
>> of:
>>- Retrieving the list of vCPU APIC IDs and starting up all APs without
>>  performing a broadcast SIPI
>>- Reorganizing the page state change support to not directly use the
>>  GHCB buffer since an SVSM will use the calling area buffer, instead
>>- Detecting the presence of an SVSM
>>- When not running at VMPL0, invoking the SVSM for page validation and
>>  VMSA page creation/deletion
>>- Detecting and allowing OVMF to run in a VMPL other than 0 when an
>>  SVSM is present
>>
>> The series is based off of commit:
>>
>>e60529df58e4 ("UefiPayloadPkg: Make Dsc accomodative of other archs")
>>
>> [1]
>> https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/58019.pdf
>> [2]
>> https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56421.pdf
>>
>> Cc: Anatol Belski 
>> Cc: Anthony Perard 
>> Cc: Ard Biesheuvel 
>> Cc: Corvin Köhne 
>> Cc: Erdem Aktas 
>> Cc: Gerd Hoffmann 
>> Cc: Gua Guo 
>> Cc: Guo Dong 
>> Cc: James Lu 
>> Cc: Jianyong Wu 
>> Cc: Jiewen Yao 
>> Cc: Laszlo Ersek 
>> Cc: Liming Gao 
>> Cc: Michael D Kinney 
>> Cc: Michael Roth 
>> Cc: Min Xu 
>> Cc: Rahul Kumar 
>> Cc: Ray Ni 
>> Cc: Rebecca Cran 
>> Cc: Sean Rhodes 
>> Cc: Zhiguang Liu 
>>
>> ---
>>
>> Changes in v3:
>> - Renamed CcSvsmLib to a more AMD-specific AmdSvsmLib with corresponding
>>function name changes
>> - Moved the GHCB APIC ID list GUID definition from MdePkg to UefiCpuPkg
>>and change the name from gEfiApicIdsGuid to gGhcbApicIdsGuid
>> - Separated the OvmfPkg changes for the AmdSvsmLib into two patches:
>>- First patch adds usage of the AmdSvsmLib NULL library
>>- Second patch adds the OVMF AmdSvsmLib implementation
>> - Updated the commit message for the OVMF AmdSvsmLib implementation to
>>indicate that the base functionality for PVALIDATE and RMPADJUST was
>

Re: [edk2-devel] [PATCH v3 03/24] UefiCpuPkg/MpInitLib: Always use AP Create if GhcbApicIds HOB is present

2024-04-03 Thread Ni, Ray
Acked-by: Ray Ni 

Thanks,
Ray

From: devel@edk2.groups.io  on behalf of Lendacky, Thomas 
via groups.io 
Sent: Friday, March 8, 2024 23:30
To: devel@edk2.groups.io 
Cc: Ard Biesheuvel ; Aktas, Erdem 
; Gerd Hoffmann ; Yao, Jiewen 
; Laszlo Ersek ; Liming Gao 
; Kinney, Michael D ; Xu, 
Min M ; Liu, Zhiguang ; Kumar, 
Rahul R ; Ni, Ray ; Michael Roth 

Subject: [edk2-devel] [PATCH v3 03/24] UefiCpuPkg/MpInitLib: Always use AP 
Create if GhcbApicIds HOB is present

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

Currently, the first time an AP is started for an SEV-SNP guest, it relies
on the VMSA as set by the hypervisor. If the list of APIC IDs has been
retrieved, this is not necessary. The list of APIC IDs will be identified
by a GUIDed HOB. If the GUIDed HOB is present, use the SEV-SNP AP Create
protocol to start the AP for the first time and each time thereafter.

Cc: Gerd Hoffmann 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Ray Ni 
Reviewed-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/UefiCpuPkg.dec |  5 +-
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |  1 +
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |  1 +
 UefiCpuPkg/Include/Guid/GhcbApicIds.h | 17 +
 UefiCpuPkg/Library/MpInitLib/MpLib.h  | 15 +++-
 UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c| 21 +-
 UefiCpuPkg/Library/MpInitLib/MpLib.c  |  9 ++-
 UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c | 78 ++--
 8 files changed, 133 insertions(+), 14 deletions(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 571b59b36f0a..c31d8b6736cf 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -2,7 +2,7 @@
 # This Package provides UEFI compatible CPU modules and libraries.
 #
 # Copyright (c) 2007 - 2023, Intel Corporation. All rights reserved.
-# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. All rights 
reserved.
 #
 # SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -91,6 +91,9 @@ [Guids]
   ## Include/Guid/MpInformation2.h
   gMpInformation2HobGuid = { 0x417a7f64, 0xf4e9, 0x4b32, {0x84, 0x6a, 
0x5c, 0xc4, 0xd8, 0x62, 0x18, 0x79 }}

+  ## Include/Guid/GhcbApicIds.h
+  gGhcbApicIdsGuid   = { 0xbc964338, 0xee39, 0x4fc8, { 0xa2, 0x24, 
0x10, 0x10, 0x8b, 0x17, 0x80, 0x1b }}
+
 [Protocols]
   ## Include/Protocol/SmmCpuService.h
   gEfiSmmCpuServiceProtocolGuid   = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 
0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 55e46d4a1fad..69950fcd1289 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -68,6 +68,7 @@ [Guids]
   gEfiEventExitBootServicesGuid ## CONSUMES  ## Event
   gEfiEventLegacyBootGuid   ## SOMETIMES_CONSUMES  ## Event
   gEdkiiMicrocodePatchHobGuid   ## SOMETIMES_CONSUMES  ## HOB
+  gGhcbApicIdsGuid  ## SOMETIMES_CONSUMES  ## HOB

 [Pcd]
   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber## 
CONSUMES
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index bc3d716aa951..22f74a814534 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -76,3 +76,4 @@ [Ppis]
 [Guids]
   gEdkiiS3SmmInitDoneGuid
   gEdkiiMicrocodePatchHobGuid
+  gGhcbApicIdsGuid   ## SOMETIMES_CONSUMES
diff --git a/UefiCpuPkg/Include/Guid/GhcbApicIds.h 
b/UefiCpuPkg/Include/Guid/GhcbApicIds.h
new file mode 100644
index ..9d5bfcb0de22
--- /dev/null
+++ b/UefiCpuPkg/Include/Guid/GhcbApicIds.h
@@ -0,0 +1,17 @@
+/** @file
+  APIC ID list retrieved for an SEV-ES/SEV-SNP guest via the GHCB.
+
+  Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef GHCB_APIC_IDS_H_
+#define GHCB_APIC_IDS_H_
+
+#define GHCB_APIC_IDS_GUID \
+  { 0xbc964338, 0xee39, 0x4fc8, { 0xa2, 0x24, 0x10, 0x10, 0x8b, 0x17, 0x80, 
0x1b }}
+
+extern EFI_GUID  gGhcbApicIdsGuid;
+
+#endif
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h 
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index d26035559f22..65e05c4806f5 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -2,7 +2,7 @@
   Common header file for MP Initialize Library.

   Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
-  Copyright (c) 2020, AMD Inc. All rights reserved.
+  Copyright (c) 2020 - 2024, AMD Inc. All rights reserved.

   SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -924,6 +924,19 @@ SevSnpCreateAP (
   IN INTN ProcessorNumber
   );

+/**
+  Determine if the SEV-SNP AP Create protocol sh

Re: [edk2-devel] [PATCH v3 12/24] UefiCpuPkg/AmdSvsmLib: Create the AmdSvsmLib library to support an SVSM

2024-04-03 Thread Ni, Ray
Acked-by: Ray Ni 

Thanks,
Ray

From: devel@edk2.groups.io  on behalf of Lendacky, Thomas 
via groups.io 
Sent: Friday, March 8, 2024 23:31
To: devel@edk2.groups.io 
Cc: Ard Biesheuvel ; Aktas, Erdem 
; Gerd Hoffmann ; Yao, Jiewen 
; Laszlo Ersek ; Liming Gao 
; Kinney, Michael D ; Xu, 
Min M ; Liu, Zhiguang ; Kumar, 
Rahul R ; Ni, Ray ; Michael Roth 

Subject: [edk2-devel] [PATCH v3 12/24] UefiCpuPkg/AmdSvsmLib: Create the 
AmdSvsmLib library to support an SVSM

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

In order to support an SEV-SNP guest running under an SVSM at VMPL1 or
lower, a new library must be created.

This library includes an interface to detect if running under an SVSM, an
interface to return the current VMPL, an interface to perform memory
validation and an interface to set or clear the attribute that allows a
page to be used as a VMSA.

Cc: Gerd Hoffmann 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Ray Ni 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/UefiCpuPkg.dec|   3 +
 UefiCpuPkg/UefiCpuPkg.dsc|   4 +-
 UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf |  27 +
 UefiCpuPkg/Include/Library/AmdSvsmLib.h  | 101 ++
 UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.c   | 108 
 UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.uni |  13 +++
 6 files changed, 255 insertions(+), 1 deletion(-)

diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index c31d8b6736cf..d1bff93ae2e0 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -52,6 +52,9 @@ [LibraryClasses.IA32, LibraryClasses.X64]
   ##  @libraryclass  Provides function to support CcExit processing.
   CcExitLib|Include/Library/CcExitLib.h

+  ##  @libraryclass  Provides function to support AmdSvsm processing.
+  AmdSvsmLib|Include/Library/AmdSvsmLib.h
+
   ##  @libraryclass  Provides function to get CPU cache information.
   CpuCacheInfoLib|Include/Library/CpuCacheInfoLib.h

diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index 10b33594e586..422e50c92b48 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -2,7 +2,7 @@
 #  UefiCpuPkg Package
 #
 #  Copyright (c) 2007 - 2023, Intel Corporation. All rights reserved.
-#  Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+#  Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. All rights 
reserved.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -61,6 +61,7 @@ [LibraryClasses]
   
PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
   
TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
   CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
+  AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   MicrocodeLib|UefiCpuPkg/Library/MicrocodeLib/MicrocodeLib.inf
   
SmmCpuRendezvousLib|UefiCpuPkg/Library/SmmCpuRendezvousLib/SmmCpuRendezvousLib.inf
   CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
@@ -159,6 +160,7 @@ [Components.IA32, Components.X64]
   UefiCpuPkg/Library/SmmCpuFeaturesLib/StandaloneMmCpuFeaturesLib.inf
   UefiCpuPkg/Library/SmmCpuSyncLib/SmmCpuSyncLib.inf
   UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf
+  UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
   UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
   UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
   UefiCpuPkg/SecCore/SecCore.inf
diff --git a/UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf 
b/UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
new file mode 100644
index ..45a189540941
--- /dev/null
+++ b/UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf
@@ -0,0 +1,27 @@
+## @file
+#  AmdSvsm Base Support Library.
+#
+#  Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 1.29
+  BASE_NAME  = AmdSvsmLibNull
+  MODULE_UNI_FILE= AmdSvsmLibNull.uni
+  FILE_GUID  = 62b45e0f-c9b4-45ce-a5b3-41762709b3d9
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = AmdSvsmLib
+
+[Sources.common]
+  AmdSvsmLibNull.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+  BaseLib
+
diff --git a/UefiCpuPkg/Include/Library/AmdSvsmLib.h 
b/UefiCpuPkg/Include/Library/AmdSvsmLib.h
new file mode 100644
index ..40e0e5bd4259
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/AmdSvsmLib.h
@@ -0,0 +1,101 @@
+/** @file
+  Public header file for the AmdSvsmLib.
+
+  This library class defines some routines used for invoking an SVSM when the
+  guest is not running at VMPL0.
+
+  Copyright (C) 2024, Advanced Micro Devices, Inc. All 

Re: [edk2-devel] [PATCH v3 16/24] UefiCpuPkg/MpInitLib: Use AmdSvsmSnpVmsaRmpAdjust() to set/clear VMSA

2024-04-03 Thread Ni, Ray
Acked-by: Ray Ni 

Thanks,
Ray

From: Tom Lendacky 
Sent: Friday, March 8, 2024 23:29
To: devel@edk2.groups.io 
Cc: Ard Biesheuvel ; Aktas, Erdem 
; Gerd Hoffmann ; Yao, Jiewen 
; Laszlo Ersek ; Liming Gao 
; Kinney, Michael D ; Xu, 
Min M ; Liu, Zhiguang ; Kumar, 
Rahul R ; Ni, Ray ; Michael Roth 

Subject: [PATCH v3 16/24] UefiCpuPkg/MpInitLib: Use AmdSvsmSnpVmsaRmpAdjust() 
to set/clear VMSA

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4654

The RMPADJUST instruction is used to change the VMSA attribute of a page,
but the VMSA attribute can only be changed when running at VMPL0. To
prepare for running at a less priviledged VMPL, use the AmdSvsmLib library
API to perform the RMPADJUST. The AmdSvsmLib library will perform the
proper operation on behalf of the caller.

Cc: Gerd Hoffmann 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Ray Ni 
Acked-by: Gerd Hoffmann 
Signed-off-by: Tom Lendacky 
---
 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf |  1 +
 UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf |  1 +
 UefiCpuPkg/Library/MpInitLib/MpLib.h  | 14 -
 UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c| 20 
 UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c | 54 +++-
 5 files changed, 9 insertions(+), 81 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 69950fcd1289..19745437f005 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -57,6 +57,7 @@ [LibraryClasses]
   SynchronizationLib
   PcdLib
   CcExitLib
+  AmdSvsmLib
   MicrocodeLib
 [LibraryClasses.X64]
   CpuPageTableLib
diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf 
b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index 22f74a814534..679e51a1acd5 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -53,6 +53,7 @@ [LibraryClasses]
   PeiServicesLib
   PcdLib
   CcExitLib
+  AmdSvsmLib
   MicrocodeLib

 [Pcd]
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h 
b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 65e05c4806f5..179f8e585b5d 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -883,20 +883,6 @@ FillExchangeInfoDataSevEs (
   IN volatile MP_CPU_EXCHANGE_INFO  *ExchangeInfo
   );

-/**
-  Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.
-
-  @param[in]  PageAddress
-  @param[in]  VmsaPage
-
-  @return  RMPADJUST return value
-**/
-UINT32
-SevSnpRmpAdjust (
-  IN  EFI_PHYSICAL_ADDRESS  PageAddress,
-  IN  BOOLEAN   VmsaPage
-  );
-
 /**
   Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.

diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c 
b/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c
index 0478e92317f1..963bd62494b9 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/AmdSev.c
@@ -49,26 +49,6 @@ SevSnpCreateAP (
   ASSERT (FALSE);
 }

-/**
-  Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.
-
-  @param[in]  PageAddress
-  @param[in]  VmsaPage
-
-  @return  RMPADJUST return value
-**/
-UINT32
-SevSnpRmpAdjust (
-  IN  EFI_PHYSICAL_ADDRESS  PageAddress,
-  IN  BOOLEAN   VmsaPage
-  )
-{
-  //
-  // RMPADJUST is not supported in 32-bit mode
-  //
-  return RETURN_UNSUPPORTED;
-}
-
 /**
   Determine if the SEV-SNP AP Create protocol should be used.

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c 
b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c
index bd12a5ee2fcb..981135621384 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c
+++ b/UefiCpuPkg/Library/MpInitLib/X64/AmdSev.c
@@ -10,6 +10,7 @@

 #include "MpLib.h"
 #include 
+#include 
 #include 
 #include 

@@ -38,20 +39,15 @@ SevSnpPerformApAction (
   BOOLEAN   InterruptState;
   UINT64ExitInfo1;
   UINT64ExitInfo2;
-  UINT32RmpAdjustStatus;
   UINT64VmgExitStatus;
+  EFI_STATUSVmsaStatus;

   if (Action == SVM_VMGEXIT_SNP_AP_CREATE) {
 //
-// To turn the page into a recognized VMSA page, issue RMPADJUST:
-//   Target VMPL but numerically higher than current VMPL
-//   Target PermissionMask is not used
+// Turn the page into a recognized VMSA page.
 //
-RmpAdjustStatus = SevSnpRmpAdjust (
-(EFI_PHYSICAL_ADDRESS)(UINTN)SaveArea,
-TRUE
-);
-if (RmpAdjustStatus != 0) {
+VmsaStatus = AmdSvsmSnpVmsaRmpAdjust (SaveArea, ApicId, TRUE);
+if (EFI_ERROR (VmsaStatus)) {
   DEBUG ((DEBUG_INFO, "SEV-SNP: RMPADJUST failed for VMSA creation\n"));
   ASSERT (FALSE);

@@ -94,11 +90,8 @@ SevSnpPerformApAction (
 // Make the current VMSA not runnable and accessible to be
 // reprogrammed.
 //
-RmpAdjustStatus = SevSnpRmpAdjust (
-