Re: [edk2-devel] [PATCH v2] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set
On Fri, Apr 26, 2024 at 05:25:15PM +0200, Ard Biesheuvel wrote: > On Fri, 26 Apr 2024 at 16:16, Roth, Michael via groups.io > wrote: > > > > On Fri, Apr 26, 2024 at 08:51:20AM -0500, Roth, Michael via groups.io wrote: > > > For the most part, OVMF will clear the encryption bit for MMIO regions, > > > but there is currently one known exception during SEC when the APIC > > > base address is accessed via MMIO with the encryption bit set for > > > SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special > > > handling on the hypervisor side which may not be available in the > > > future[1], so make the necessary changes in the SEC-configured page > > > table to clear the encryption bit for 4K region containing the APIC > > > base address. > > > > > > Since CpuPageTableLib is used to handle the splitting, some additional > > > care must be taken to clear the C-bit in all non-leaf PTEs since the > > > library expects that to be the case. Add handling for that when setting > > > up the SEC page table. > > > > Tom just noticed another spot where a non-leaf C-bit needs to be cleared > > (the one mapping the GHCB page). It doesn't affect patch functionality > > but should be included for completeness of this change, so will send a > > quick v3 with this addressed. > > > > -Mike > > > > While at it, could you please fix your email setup and use 8bit > transfer encoding instead of quoted printable? Also, please put me on > cc so I don't have to apply the garbled groups.io copy. I'm not sure why git send-email seems to be defaulting to "quoted-printable", but I've set sendemail.transferencoding=8bit and that seems to have resolved things. Thanks, Mike -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118350): https://edk2.groups.io/g/devel/message/118350 Mute This Topic: https://groups.io/mt/105750506/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v3] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set
For the most part, OVMF will clear the encryption bit for MMIO regions,
but there is currently one known exception during SEC when the APIC
base address is accessed via MMIO with the encryption bit set for
SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special
handling on the hypervisor side which may not be available in the
future[1], so make the necessary changes in the SEC-configured page
table to clear the encryption bit for 4K region containing the APIC
base address.
Since CpuPageTableLib is used to handle the splitting, some additional
care must be taken to clear the C-bit in all non-leaf PTEs since the
library expects that to be the case. Add handling for that when setting
up the SEC page table.
While here, drop special handling for the APIC base address in the
SEV-ES/SNP #VC handler.
[1] https://lore.kernel.org/lkml/20240208002420.34mvemnzrwwsa...@amd.com/#t
Suggested-by: Tom Lendacky
Cc: Ard Biesheuvel
Cc: Gerd Hoffmann
Cc: Erdem Aktas
Cc: Jiewen Yao
Cc: Min Xu
Cc: Tom Lendacky
Cc: Jianyong Wu
Cc: Anatol Belski
Signed-off-by: Michael Roth
---
v3:
- also clear C-bit for non-leaf PTEs containing GHCB range
- add missing Cc's to commit log
v2:
- use CpuPageTableLib to handle splitting (Gerd, Tom)
OvmfPkg/AmdSev/AmdSevX64.fdf| 5 +-
OvmfPkg/Bhyve/BhyveX64.dsc | 1 +
OvmfPkg/CloudHv/CloudHvX64.fdf | 5 +-
OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 12 +
OvmfPkg/Microvm/MicrovmX64.fdf | 3 ++
OvmfPkg/OvmfPkg.dec | 5 ++
OvmfPkg/OvmfPkgX64.fdf | 5 +-
OvmfPkg/ResetVector/Ia32/AmdSev.asm | 5 +-
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 20 +++
OvmfPkg/Sec/AmdSev.c| 58 +
OvmfPkg/Sec/AmdSev.h| 14 +
OvmfPkg/Sec/SecMain.c | 1 +
OvmfPkg/Sec/SecMain.inf | 3 ++
13 files changed, 112 insertions(+), 25 deletions(-)
diff --git a/OvmfPkg/AmdSev/AmdSevX64.fdf b/OvmfPkg/AmdSev/AmdSevX64.fdf
index d49555c6c8..595945181c 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.fdf
+++ b/OvmfPkg/AmdSev/AmdSevX64.fdf
@@ -77,7 +77,10 @@
gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|gUefiOvmfPkgTokenSpaceGuid.Pcd
0x010C00|0x000400
gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize
-0x011000|0x00F000
+0x011000|0x001000
+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize
+
+0x012000|0x00E000
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
0x02|0x0E
diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc
index 6f305d690d..78050959f8 100644
--- a/OvmfPkg/Bhyve/BhyveX64.dsc
+++ b/OvmfPkg/Bhyve/BhyveX64.dsc
@@ -174,6 +174,7 @@
PeiHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf
DxeHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf
ImagePropertiesRecordLib|MdeModulePkg/Library/ImagePropertiesRecordLib/ImagePropertiesRecordLib.inf
+ CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
diff --git a/OvmfPkg/CloudHv/CloudHvX64.fdf b/OvmfPkg/CloudHv/CloudHvX64.fdf
index eae3ada191..3e6688b103 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.fdf
+++ b/OvmfPkg/CloudHv/CloudHvX64.fdf
@@ -76,7 +76,10 @@
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCp
0x00F000|0x001000
gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize
-0x01|0x01
+0x01|0x001000
+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize
+
+0x011000|0x00F000
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
0x02|0x0E
diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
index 549375dfed..da8f1e5db9 100644
--- a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
+++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
@@ -98,7 +98,7 @@ UnsupportedExit (
Validate that the MMIO memory access is not to encrypted memory.
Examine the pagetable entry for the memory specified. MMIO should not be
- performed against encrypted memory. MMIO to the APIC page is always allowed.
+ performed against encrypted memory.
@param[in] Ghcb Pointer to the Guest-Hypervisor Communication Block
@param[in] MemoryAddress Memory address to validate
@@ -118,16 +118,6 @@ ValidateMmioMemory (
{
MEM_ENCRYPT_SEV_ADDRESS_RANGE_STATE State;
GHCB_EVENT_INJECTION GpEvent;
- UINTN
[edk2-devel] [PATCH v6 4/4] ShellPkg: UefiShellDebug1CommandsLib: Conformance Profiles in Dmem.c
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352
Implemented dumping of the UEFI Conformance Profiles Table using Dmem.c
Uses header file for GUIDs added in previous patch
Cc: Ray Ni
Cc: Zhichao Gao
Signed-off-by: Sam Kaynor
---
Notes:
v6:
- Moved MdePkg changes to separate patch
v5:
- corrected style error (spaces before '(')
v3:
- fixed build errors
- properly using Address variable
- removed unecessary comment in header file
ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf |
3 +
ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c |
69
ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni |
5 ++
3 files changed, 77 insertions(+)
diff --git
a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
index 3741dac5d94c..172ac2862ba1 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
@@ -139,3 +139,6 @@ [Guids]
gEfiJsonConfigDataTableGuid ## SOMETIMES_CONSUMES ## SystemTable
gEfiJsonCapsuleDataTableGuid## SOMETIMES_CONSUMES ## SystemTable
gEfiJsonCapsuleResultTableGuid ## SOMETIMES_CONSUMES ## SystemTable
+ gEfiConfProfilesTableGuid ## SOMETIMES_CONSUMES ## SystemTable
+ gEfiConfProfilesUefiSpecGuid## SOMETIMES_CONSUMES ## GUID
+ gEfiConfProfilesEbbrSpecGuid## SOMETIMES_CONSUMES ## GUID
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
index a4f404c1cdbd..53ee2b01f918 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
@@ -19,6 +19,7 @@
#include
#include
#include
+#include
/**
Make a printable character.
@@ -269,7 +270,67 @@ DisplayImageExecutionEntries (
return (ShellStatus);
}
+/**
+ Display the ConformanceProfileTable entries
+ @param[in] AddressThe pointer to the ConformanceProfileTable.
+**/
+SHELL_STATUS
+DisplayConformanceProfiles (
+ IN UINT64 Address
+ )
+{
+ SHELL_STATUSShellStatus;
+ EFI_STATUS Status;
+ EFI_GUID*EntryGuid;
+ CHAR16 *GuidName;
+ EFI_CONFORMANCE_PROFILES_TABLE*ConfProfTable;
+
+ ShellStatus = SHELL_SUCCESS;
+
+ if (Address != 0) {
+ConfProfTable = (EFI_CONFORMANCE_PROFILES_TABLE *)Address;
+
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_CONF_PRO_TABLE),
gShellDebug1HiiHandle);
+
+EntryGuid = (EFI_GUID *) (ConfProfTable + 1);
+
+for (int Profile = 0; Profile < ConfProfTable->NumberOfProfiles;
Profile++, EntryGuid++) {
+ GuidName = L"Unknown_Profile";
+
+ if (CompareGuid (EntryGuid, )) {
+GuidName = L"EBBR_2.1";
+ }
+
+ Status = ShellPrintHiiEx (
+-1,
+-1,
+NULL,
+STRING_TOKEN (STR_DMEM_CONF_PRO_ROW),
+gShellDebug1HiiHandle,
+GuidName,
+EntryGuid
+);
+}
+if (EFI_ERROR (Status)) {
+ ShellStatus = SHELL_ABORTED;
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_ERR_GET_FAIL),
gShellDebug1HiiHandle, L"ComformanceProfilesTable");
+}
+ } else {
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_CONF_PRO_TABLE),
gShellDebug1HiiHandle);
+ShellPrintHiiEx (
+ -1,
+ -1,
+ NULL,
+ STRING_TOKEN (STR_DMEM_CONF_PRO_ROW),
+ gShellDebug1HiiHandle,
+ L"EFI_CONFORMANCE_PROFILES_UEFI_SPEC_GUID",
+
+ );
+ }
+
+ return (ShellStatus);
+}
STATIC CONST SHELL_PARAM_ITEM ParamList[] = {
{ L"-mmio", TypeFlag },
@@ -461,6 +522,11 @@ ShellCommandRunDmem (
HiiDatabaseExportBufferAddress = (UINT64)
(UINTN)gST->ConfigurationTable[TableWalker].VendorTable;
continue;
}
+
+if (CompareGuid (>ConfigurationTable[TableWalker].VendorGuid,
)) {
+ ConformanceProfileTableAddress = (UINT64)
(UINTN)gST->ConfigurationTable[TableWalker].VendorTable;
+ continue;
+}
}
ShellPrintHiiEx (
@@ -504,6 +570,9 @@ ShellCommandRunDmem (
if (ShellStatus == SHELL_SUCCESS) {
ShellStatus = DisplayImageExecutionEntries
(ImageExecutionTableAddress);
}
+ if (ShellStatus == SHELL_SUCCESS) {
+ShellStatus = DisplayConformanceProfiles
(ConformanceProfileTableAddress);
+ }
}
} else {
diff --git
a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni
b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni
index 3b730164ddce..6ef923e4fd5e 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni
[edk2-devel] [PATCH v6 3/4] MdePkg: Adding support for EFI_CONFORMANCE_PROFILE_TABLE
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352
Adding support for EFI_CONFORMANCE_PROFILE_TABLE by adding an
associated header file and relevant GUIDs to MdePkg.dec as defined
in the UEFI 2.10 spec.
This table is needed to address changes being made within ShellPkg.
Cc: Michael D Kinney
Cc: Liming Gao
Cc: Zhiguang Liu
Signed-off-by: Sam Kaynor
---
Notes:
v6:
- Added patch to address MdePkg changes separately
MdePkg/MdePkg.dec | 5 ++
MdePkg/Include/Guid/ConformanceProfiles.h | 56
2 files changed, 61 insertions(+)
diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec
index bf94549cbfbd..2c053a7459f3 100644
--- a/MdePkg/MdePkg.dec
+++ b/MdePkg/MdePkg.dec
@@ -746,6 +746,11 @@ [Guids]
## Include/Guid/DeviceAuthentication.h
gEfiDeviceSignatureDatabaseGuid = { 0xb9c2b4f4, 0xbf5f, 0x462d, {0x8a,
0xdf, 0xc5, 0xc7, 0xa, 0xc3, 0x5d, 0xad }}
+ ## Include/Guid/ConformanceProfiles.h
+ gEfiConfProfilesTableGuid= { 0x36122546, 0xf7e7, 0x4c8f, { 0xbd,
0x9b, 0xeb, 0x85, 0x25, 0xb5, 0x0c, 0x0b }}
+ gEfiConfProfilesUefiSpecGuid = { 0x523c91af, 0xa195, 0x4382, { 0x81,
0x8d, 0x29, 0x5f, 0xe4, 0x00, 0x64, 0x65 }}
+ gEfiConfProfilesEbbrSpecGuid = { 0xcce33c35, 0x74ac, 0x4087, { 0xbc,
0xe7, 0x8b, 0x29, 0xb0, 0x2e, 0xeb, 0x27 }}
+
#
# GUID defined in PI1.0
#
diff --git a/MdePkg/Include/Guid/ConformanceProfiles.h
b/MdePkg/Include/Guid/ConformanceProfiles.h
new file mode 100644
index ..c6211d63d79c
--- /dev/null
+++ b/MdePkg/Include/Guid/ConformanceProfiles.h
@@ -0,0 +1,56 @@
+/** @file
+ Legal information
+
+**/
+
+#ifndef __CONFORMANCE_PROFILES_TABLE_GUID_H__
+#define __CONFORMANCE_PROFILES_TABLE_GUID_H__
+
+
+//
+// This table allows the platform to advertise its UEFI specification
conformance
+// in the form of pre-defined profiles. Each profile is identified by a GUID,
with
+// known profiles listed in the section below.
+// The absence of this table shall indicate that the platform implementation is
+// conformant with the UEFI specification requirements, as defined in Section
2.6.
+// This is equivalent to publishing this configuration table with the
+// EFI_CONFORMANCE_PROFILES_UEFI_SPEC_GUID conformance profile.
+//
+#define EFI_CONFORMANCE_PROFILES_TABLE_GUID \
+ { \
+0x36122546, 0xf7e7, 0x4c8f, { 0xbd, 0x9b, 0xeb, 0x85, 0x25, 0xb5, 0x0c,
0x0b } \
+ }
+
+#pragma pack(1)
+
+typedef struct {
+ ///
+ /// Version of the table must be 0x1
+ ///
+ UINT16 Version;
+ ///
+ /// The number of profiles GUIDs present in ConformanceProfiles
+ ///
+ UINT16 NumberOfProfiles;
+ ///
+ /// An array of conformance profile GUIDs that are supported by this system.
+ /// EFI_GUIDConformanceProfiles[];
+ ///
+} EFI_CONFORMANCE_PROFILES_TABLE;
+
+#define EFI_CONFORMANCE_PROFILES_TABLE_VERSION 0x1
+
+//
+// GUID defined in spec.
+//
+#define EFI_CONFORMANCE_PROFILES_UEFI_SPEC_GUID \
+{ 0x523c91af, 0xa195, 0x4382, \
+{ 0x81, 0x8d, 0x29, 0x5f, 0xe4, 0x00, 0x64, 0x65 }}
+#define EFI_CONFORMANCE_PROFILE_EBBR_2_1_GUID \
+{ 0xcce33c35, 0x74ac, 0x4087, \
+{ 0xbc, 0xe7, 0x8b, 0x29, 0xb0, 0x2e, 0xeb, 0x27 }}
+
+extern EFI_GUID gEfiConfProfilesTableGuid;
+extern EFI_GUID gEfiConfProfilesUefiSpecGuid;
+
+#endif
--
2.34.1
[edk2-devel] [PATCH v6 1/4] ShellPkg: UefiShellDebug1CommandsLib: Dumping RT Properties in Dmem.c
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352
Implemented the dumping of the UEFI RT Properties Table using Dmem.c
Added new entry to the help command for the -verbose option
Cc: Ray Ni
Cc: Zhichao Gao
Signed-off-by: Sam Kaynor
Tested-by: Stuart Yoder
Reviewed-by: Stuart Yoder
Reviewed-by: Zhichao Gao
---
Notes:
v5:
- corrected style error (spaces before '(')
v4:
- fixed crash when RTProperties table not present
- expanded help output to include -verbose option
v3:
- fixed build errors
- properly using Address variable
ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c |
113 +++-
ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni |
23 +++-
2 files changed, 109 insertions(+), 27 deletions(-)
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
index a609971f345e..2975e21b0a42 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
@@ -34,7 +34,7 @@ MakePrintable (
IN CONST CHAR16 Char
)
{
- if (((Char < 0x20) && (Char > 0)) || (Char > 126)) {
+ if ( ( (Char < 0x20) && (Char > 0)) || (Char > 126)) {
return (L'?');
}
@@ -71,12 +71,12 @@ DisplayMmioMemory (
return SHELL_OUT_OF_RESOURCES;
}
- Status = PciRbIo->Mem.Read (PciRbIo, EfiPciWidthUint8,
(UINT64)(UINTN)Address, Size, Buffer);
+ Status = PciRbIo->Mem.Read (PciRbIo, EfiPciWidthUint8, (UINT64)
(UINTN)Address, Size, Buffer);
if (EFI_ERROR (Status)) {
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PCIRBIO_ER),
gShellDebug1HiiHandle, L"dmem");
ShellStatus = SHELL_NOT_FOUND;
} else {
-ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_MMIO_HEADER_ROW),
gShellDebug1HiiHandle, (UINT64)(UINTN)Address, Size);
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_MMIO_HEADER_ROW),
gShellDebug1HiiHandle, (UINT64) (UINTN)Address, Size);
DumpHex (2, (UINTN)Address, Size, Buffer);
}
@@ -84,8 +84,64 @@ DisplayMmioMemory (
return (ShellStatus);
}
+/**
+ Display the RtPropertiesTable entries
+
+ @param[in] AddressThe pointer to the RtPropertiesTable.
+**/
+SHELL_STATUS
+DisplayRtProperties (
+ IN UINT64 Address
+ )
+{
+ EFI_RT_PROPERTIES_TABLE *RtPropertiesTable;
+ UINT32 RtServices;
+ SHELL_STATUSShellStatus;
+ EFI_STATUS Status;
+
+ ShellStatus = SHELL_SUCCESS;
+
+ if (Address != 0) {
+RtPropertiesTable = (EFI_RT_PROPERTIES_TABLE *)Address;
+
+RtServices = (UINT32)RtPropertiesTable->RuntimeServicesSupported;
+Status = ShellPrintHiiEx (
+ -1,
+ -1,
+ NULL,
+ STRING_TOKEN (STR_DMEM_RT_PROPERTIES),
+ gShellDebug1HiiHandle,
+ EFI_RT_PROPERTIES_TABLE_VERSION,
+ (RtServices & EFI_RT_SUPPORTED_GET_TIME) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_SET_TIME) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_GET_WAKEUP_TIME) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_SET_WAKEUP_TIME) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_GET_VARIABLE) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_GET_NEXT_VARIABLE_NAME) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_SET_VARIABLE) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_SET_VIRTUAL_ADDRESS_MAP) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_CONVERT_POINTER) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_GET_NEXT_HIGH_MONOTONIC_COUNT) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_RESET_SYSTEM) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_UPDATE_CAPSULE) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_QUERY_CAPSULE_CAPABILITIES) ? 1 : 0,
+ (RtServices & EFI_RT_SUPPORTED_QUERY_VARIABLE_INFO) ? 1 : 0
+ );
+
+if (EFI_ERROR (Status)) {
+ ShellStatus = SHELL_ABORTED;
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_ERR_GET_FAIL),
gShellDebug1HiiHandle, L"RtPropertiesTable");
+}
+ } else {
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_ERR_NOT_FOUND),
gShellDebug1HiiHandle, L"RtPropertiesTable");
+ }
+
+ return (ShellStatus);
+}
+
STATIC CONST SHELL_PARAM_ITEM ParamList[] = {
{ L"-mmio", TypeFlag },
+ { L"-verbose", TypeFlag },
{ NULL, TypeMax }
};
@@ -147,7 +203,7 @@ ShellCommandRunDmem (
//
Status = ShellCommandLineParse (ParamList, , , TRUE);
if (EFI_ERROR (Status)) {
-if ((Status == EFI_VOLUME_CORRUPTED) && (ProblemParam != NULL)) {
+if ( (Status == EFI_VOLUME_CORRUPTED) && (ProblemParam != NULL)) {
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PROBLEM),
gShellDebug1HiiHandle, L"dmem", ProblemParam);
FreePool (ProblemParam);
ShellStatus = SHELL_INVALID_PARAMETER;
@@ -183,7 +239,7 @@ ShellCommandRunDmem (
if (ShellStatus == SHELL_SUCCESS) {
if (!ShellCommandLineGetFlag (Package, L"-mmio")) {
-ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN
[edk2-devel] [PATCH v6 0/4] Adding support for veborse UEFI Table dumping to Dmem.c
This adds an additional option to the dmem UEFI shell command for verbose dumping of a couple of UEFI tables. The tables specified are the RT Properties Table, the Image Execution Table, and the Conformance Profiles table. Supporting objects are added in the .inf and .uni files relating to Dmem.c and an additional header file for the Conformance Profiles table was added. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352 v5->v6: - Additional patch created to separate changes made to MdePkg Cc: Ray Ni Cc: Zhichao Gao Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Stuart Yoder Signed-off-by: Sam Kaynor Sam Kaynor (4): ShellPkg: UefiShellDebug1CommandsLib: Dumping RT Properties in Dmem.c ShellPkg: UefiShellDebug1CommandsLib: Image Execution Table in Dmem.c MdePkg: Adding support for EFI_CONFORMANCE_PROFILE_TABLE ShellPkg: UefiShellDebug1CommandsLib: Conformance Profiles in Dmem.c MdePkg/MdePkg.dec | 5 + ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf | 3 + MdePkg/Include/Guid/ConformanceProfiles.h | 56 ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c | 317 ++-- ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni | 31 +- 5 files changed, 385 insertions(+), 27 deletions(-) create mode 100644 MdePkg/Include/Guid/ConformanceProfiles.h -- 2.34.1
[edk2-devel] [PATCH v6 2/4] ShellPkg: UefiShellDebug1CommandsLib: Image Execution Table in Dmem.c
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352
Implemented dumping of the Image Execution Table using Dmem.c
Cc: Ray Ni
Cc: Zhichao Gao
Signed-off-by: Sam Kaynor
Tested-by: Stuart Yoder
Reviewed-by: Stuart Yoder
Reviewed-by: Zhichao Gao
---
Notes:
v5:
- corrected comment for GetBaseName
- corrected style error (spaces before '(')
v4:
- changed Image Execution output to match spec
v3:
- fixed build erros
- added setwidth formatting to output
- properly using Address variable
ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c |
135
ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.uni |
3 +
2 files changed, 138 insertions(+)
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
index 2975e21b0a42..a4f404c1cdbd 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Dmem.c
@@ -139,6 +139,138 @@ DisplayRtProperties (
return (ShellStatus);
}
+/**
+ Retrieve the ImageExecutionTable Entry ImageName from ImagePath
+
+ @param[in] FilenameThe full path of the image.
+ @param[out] BasenameThe name of the image.
+**/
+EFI_STATUS
+GetBaseName (
+ IN CHAR16 *FileName,
+ OUT CHAR16 **BaseName
+ )
+{
+ UINT32 StrLen;
+ CHAR16 *StrTail;
+
+ StrLen = StrSize (FileName);
+
+ for (StrTail = FileName + StrLen - 1; StrTail != FileName && *StrTail !=
L'\\'; StrTail--) {
+ }
+
+ if (StrTail == FileName) {
+return EFI_NOT_FOUND;
+ }
+ *BaseName = StrTail+1;
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Retrieve the ImageExecutionTable entries
+
+ @param[in] AddressThe pointer to the ImageExecutionTable.
+**/
+EFI_STATUS
+GetImageExecutionInfo (
+ IN UINT64 Address
+ )
+{
+ EFI_STATUS Status;
+ EFI_IMAGE_EXECUTION_INFO_TABLE *ExecInfoTablePtr;
+ EFI_IMAGE_EXECUTION_INFO *InfoPtr;
+ VOID *ptr;
+ CHAR16 *ImagePath;
+ CHAR16 *ImageName;
+ UINTN *NumberOfImages;
+ CHAR16 *ActionType;
+
+ ExecInfoTablePtr = (EFI_IMAGE_EXECUTION_INFO_TABLE *)Address;
+
+ NumberOfImages = >NumberOfImages;
+
+ ptr = (VOID *) (ExecInfoTablePtr + 1);
+
+ for (int Image = 0; Image < *NumberOfImages; Image++, ptr +=
InfoPtr->InfoSize) {
+InfoPtr = ptr;
+ImagePath = (CHAR16*) (InfoPtr + 1);
+
+GetBaseName (ImagePath,);
+
+switch (InfoPtr->Action) {
+ case EFI_IMAGE_EXECUTION_AUTHENTICATION:
+ActionType = L"AUTHENTICATION";
+break;
+ case EFI_IMAGE_EXECUTION_AUTH_UNTESTED:
+ActionType = L"AUTH_UNTESTED";
+break;
+ case EFI_IMAGE_EXECUTION_AUTH_SIG_FAILED:
+ActionType = L"AUTH_SIG_FAILED";
+break;
+ case EFI_IMAGE_EXECUTION_AUTH_SIG_PASSED:
+ActionType = L"AUTH_SIG_PASSED";
+break;
+ case EFI_IMAGE_EXECUTION_AUTH_SIG_NOT_FOUND:
+ActionType = L"AUTH_SIG_NOT_FOUND";
+break;
+ case EFI_IMAGE_EXECUTION_AUTH_SIG_FOUND:
+ActionType = L"AUTH_SIG_FOUND";
+break;
+ case EFI_IMAGE_EXECUTION_POLICY_FAILED:
+ActionType = L"POLICY_FAILED";
+break;
+ case EFI_IMAGE_EXECUTION_INITIALIZED:
+ActionType = L"INITIALIZED";
+break;
+ default:
+ActionType = L"invalid action";
+}
+
+Status = ShellPrintHiiEx (
+ -1,
+ -1,
+ NULL,
+ STRING_TOKEN (STR_DMEM_IMG_EXE_ENTRY),
+ gShellDebug1HiiHandle,
+ ImageName,
+ ActionType
+);
+ }
+
+ return Status;
+}
+
+/**
+ Display the ImageExecutionTable entries
+
+ @param[in] AddressThe pointer to the ImageExecutionTable.
+**/
+SHELL_STATUS
+DisplayImageExecutionEntries (
+ IN UINT64 Address
+ )
+{
+ SHELL_STATUSShellStatus;
+ EFI_STATUS Status;
+
+ ShellStatus = SHELL_SUCCESS;
+
+ if (Address != 0) {
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_IMG_EXE_TABLE),
gShellDebug1HiiHandle);
+Status = GetImageExecutionInfo (Address);
+if (EFI_ERROR (Status)) {
+ ShellStatus = SHELL_ABORTED;
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_ERR_GET_FAIL),
gShellDebug1HiiHandle, L"ImageExecutionTable");
+}
+ } else {
+ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_DMEM_ERR_NOT_FOUND),
gShellDebug1HiiHandle, L"ImageExecutionTable");
+ }
+ return (ShellStatus);
+}
+
+
+
STATIC CONST SHELL_PARAM_ITEM ParamList[] = {
{ L"-mmio", TypeFlag },
{ L"-verbose", TypeFlag },
@@ -369,6 +501,9 @@ ShellCommandRunDmem (
if (ShellStatus == SHELL_SUCCESS) {
ShellStatus = DisplayRtProperties (RtPropertiesTableAddress);
}
+ if (ShellStatus == SHELL_SUCCESS) {
+ShellStatus = DisplayImageExecutionEntries
(ImageExecutionTableAddress);
+
Re: [edk2-devel] [PATCH v2] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set
On Fri, 26 Apr 2024 at 16:16, Roth, Michael via groups.io wrote: > > On Fri, Apr 26, 2024 at 08:51:20AM -0500, Roth, Michael via groups.io wrote: > > For the most part, OVMF will clear the encryption bit for MMIO regions, > > but there is currently one known exception during SEC when the APIC > > base address is accessed via MMIO with the encryption bit set for > > SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special > > handling on the hypervisor side which may not be available in the > > future[1], so make the necessary changes in the SEC-configured page > > table to clear the encryption bit for 4K region containing the APIC > > base address. > > > > Since CpuPageTableLib is used to handle the splitting, some additional > > care must be taken to clear the C-bit in all non-leaf PTEs since the > > library expects that to be the case. Add handling for that when setting > > up the SEC page table. > > Tom just noticed another spot where a non-leaf C-bit needs to be cleared > (the one mapping the GHCB page). It doesn't affect patch functionality > but should be included for completeness of this change, so will send a > quick v3 with this addressed. > > -Mike > While at it, could you please fix your email setup and use 8bit transfer encoding instead of quoted printable? Also, please put me on cc so I don't have to apply the garbled groups.io copy. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118343): https://edk2.groups.io/g/devel/message/118343 Mute This Topic: https://groups.io/mt/105750506/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v2] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set
On Fri, Apr 26, 2024 at 08:51:20AM -0500, Roth, Michael via groups.io wrote: > For the most part, OVMF will clear the encryption bit for MMIO regions, > but there is currently one known exception during SEC when the APIC > base address is accessed via MMIO with the encryption bit set for > SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special > handling on the hypervisor side which may not be available in the > future[1], so make the necessary changes in the SEC-configured page > table to clear the encryption bit for 4K region containing the APIC > base address. > > Since CpuPageTableLib is used to handle the splitting, some additional > care must be taken to clear the C-bit in all non-leaf PTEs since the > library expects that to be the case. Add handling for that when setting > up the SEC page table. Tom just noticed another spot where a non-leaf C-bit needs to be cleared (the one mapping the GHCB page). It doesn't affect patch functionality but should be included for completeness of this change, so will send a quick v3 with this addressed. -Mike > > While here, drop special handling for the APIC base address in the > SEV-ES/SNP #VC handler. > > [1] https://lore.kernel.org/lkml/20240208002420.34mvemnzrwwsa...@amd.com/#t > > Suggested-by: Tom Lendacky > Cc: Erdem Aktas > Cc: Jiewen Yao > Cc: Min Xu > Cc: Tom Lendacky > Cc: Jianyong Wu > Cc: Anatol Belski > Signed-off-by: Michael Roth > --- > changes since v1: > - use CpuPageTableLib to handle splitting (Gerd, Tom) > > OvmfPkg/AmdSev/AmdSevX64.fdf| 5 +- > OvmfPkg/Bhyve/BhyveX64.dsc | 1 + > OvmfPkg/CloudHv/CloudHvX64.fdf | 5 +- > OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 12 + > OvmfPkg/Microvm/MicrovmX64.fdf | 3 ++ > OvmfPkg/OvmfPkg.dec | 5 ++ > OvmfPkg/OvmfPkgX64.fdf | 5 +- > OvmfPkg/ResetVector/Ia32/PageTables64.asm | 20 +++ > OvmfPkg/Sec/AmdSev.c| 58 + > OvmfPkg/Sec/AmdSev.h| 14 + > OvmfPkg/Sec/SecMain.c | 1 + > OvmfPkg/Sec/SecMain.inf | 3 ++ > 12 files changed, 108 insertions(+), 24 deletions(-) > > diff --git a/OvmfPkg/AmdSev/AmdSevX64.fdf b/OvmfPkg/AmdSev/AmdSevX64.fdf > index d49555c6c8..595945181c 100644 > --- a/OvmfPkg/AmdSev/AmdSevX64.fdf > +++ b/OvmfPkg/AmdSev/AmdSevX64.fdf > @@ -77,7 +77,10 @@ > gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|gUefiOvmfPkgTokenSpaceGuid.Pcd > 0x010C00|0x000400 > > > gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize > > > > -0x011000|0x00F000 > > +0x011000|0x001000 > > +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize > > + > > +0x012000|0x00E000 > > > gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize > > > > 0x02|0x0E > > diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc > index 6f305d690d..78050959f8 100644 > --- a/OvmfPkg/Bhyve/BhyveX64.dsc > +++ b/OvmfPkg/Bhyve/BhyveX64.dsc > @@ -174,6 +174,7 @@ >PeiHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf > >DxeHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf > > > ImagePropertiesRecordLib|MdeModulePkg/Library/ImagePropertiesRecordLib/ImagePropertiesRecordLib.inf > > + CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf > > > > > CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf > > > FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf > > diff --git a/OvmfPkg/CloudHv/CloudHvX64.fdf b/OvmfPkg/CloudHv/CloudHvX64.fdf > index eae3ada191..3e6688b103 100644 > --- a/OvmfPkg/CloudHv/CloudHvX64.fdf > +++ b/OvmfPkg/CloudHv/CloudHvX64.fdf > @@ -76,7 +76,10 @@ > gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCp > 0x00F000|0x001000 > > > gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize > > > > -0x01|0x01 > > +0x01|0x001000 > > +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize > > + > > +0x011000|0x00F000 > > > gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize > > > > 0x02|0x0E > > diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c > b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c > index 549375dfed..da8f1e5db9 100644 > --- a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c > +++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c > @@ -98,7 +98,7 @@ UnsupportedExit ( >Validate that the MMIO memory access is not to encrypted memory. > > > >Examine the pagetable entry for the
[edk2-devel] [PATCH v2] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set
For the most part, OVMF will clear the encryption bit for MMIO regions,
but there is currently one known exception during SEC when the APIC
base address is accessed via MMIO with the encryption bit set for
SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special
handling on the hypervisor side which may not be available in the
future[1], so make the necessary changes in the SEC-configured page
table to clear the encryption bit for 4K region containing the APIC
base address.
Since CpuPageTableLib is used to handle the splitting, some additional
care must be taken to clear the C-bit in all non-leaf PTEs since the
library expects that to be the case. Add handling for that when setting
up the SEC page table.
While here, drop special handling for the APIC base address in the
SEV-ES/SNP #VC handler.
[1] https://lore.kernel.org/lkml/20240208002420.34mvemnzrwwsa...@amd.com/#t
Suggested-by: Tom Lendacky
Cc: Erdem Aktas
Cc: Jiewen Yao
Cc: Min Xu
Cc: Tom Lendacky
Cc: Jianyong Wu
Cc: Anatol Belski
Signed-off-by: Michael Roth
---
changes since v1:
- use CpuPageTableLib to handle splitting (Gerd, Tom)
OvmfPkg/AmdSev/AmdSevX64.fdf| 5 +-
OvmfPkg/Bhyve/BhyveX64.dsc | 1 +
OvmfPkg/CloudHv/CloudHvX64.fdf | 5 +-
OvmfPkg/Library/CcExitLib/CcExitVcHandler.c | 12 +
OvmfPkg/Microvm/MicrovmX64.fdf | 3 ++
OvmfPkg/OvmfPkg.dec | 5 ++
OvmfPkg/OvmfPkgX64.fdf | 5 +-
OvmfPkg/ResetVector/Ia32/PageTables64.asm | 20 +++
OvmfPkg/Sec/AmdSev.c| 58 +
OvmfPkg/Sec/AmdSev.h| 14 +
OvmfPkg/Sec/SecMain.c | 1 +
OvmfPkg/Sec/SecMain.inf | 3 ++
12 files changed, 108 insertions(+), 24 deletions(-)
diff --git a/OvmfPkg/AmdSev/AmdSevX64.fdf b/OvmfPkg/AmdSev/AmdSevX64.fdf
index d49555c6c8..595945181c 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.fdf
+++ b/OvmfPkg/AmdSev/AmdSevX64.fdf
@@ -77,7 +77,10 @@
gUefiOvmfPkgTokenSpaceGuid.PcdSevLaunchSecretBase|gUefiOvmfPkgTokenSpaceGuid.Pcd
0x010C00|0x000400
gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdQemuHashTableSize
-0x011000|0x00F000
+0x011000|0x001000
+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize
+
+0x012000|0x00E000
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
0x02|0x0E
diff --git a/OvmfPkg/Bhyve/BhyveX64.dsc b/OvmfPkg/Bhyve/BhyveX64.dsc
index 6f305d690d..78050959f8 100644
--- a/OvmfPkg/Bhyve/BhyveX64.dsc
+++ b/OvmfPkg/Bhyve/BhyveX64.dsc
@@ -174,6 +174,7 @@
PeiHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/PeiHardwareInfoLib.inf
DxeHardwareInfoLib|OvmfPkg/Library/HardwareInfoLib/DxeHardwareInfoLib.inf
ImagePropertiesRecordLib|MdeModulePkg/Library/ImagePropertiesRecordLib/ImagePropertiesRecordLib.inf
+ CpuPageTableLib|UefiCpuPkg/Library/CpuPageTableLib/CpuPageTableLib.inf
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
FrameBufferBltLib|MdeModulePkg/Library/FrameBufferBltLib/FrameBufferBltLib.inf
diff --git a/OvmfPkg/CloudHv/CloudHvX64.fdf b/OvmfPkg/CloudHv/CloudHvX64.fdf
index eae3ada191..3e6688b103 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.fdf
+++ b/OvmfPkg/CloudHv/CloudHvX64.fdf
@@ -76,7 +76,10 @@
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCpuidBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfCp
0x00F000|0x001000
gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtr|gUefiOvmfPkgTokenSpaceGuid.PcdXenPvhStartOfDayStructPtrSize
-0x01|0x01
+0x01|0x001000
+gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize
+
+0x011000|0x00F000
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
0x02|0x0E
diff --git a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
index 549375dfed..da8f1e5db9 100644
--- a/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
+++ b/OvmfPkg/Library/CcExitLib/CcExitVcHandler.c
@@ -98,7 +98,7 @@ UnsupportedExit (
Validate that the MMIO memory access is not to encrypted memory.
Examine the pagetable entry for the memory specified. MMIO should not be
- performed against encrypted memory. MMIO to the APIC page is always allowed.
+ performed against encrypted memory.
@param[in] Ghcb Pointer to the Guest-Hypervisor Communication Block
@param[in] MemoryAddress Memory address to validate
@@ -118,16 +118,6 @@ ValidateMmioMemory (
{
MEM_ENCRYPT_SEV_ADDRESS_RANGE_STATE State;
GHCB_EVENT_INJECTION GpEvent;
- UINTNAddress;
-
- //
- // Allow APIC accesses (which will have the encryption bit set during
- // SEC and PEI phases).
-
Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib
On 4/25/24 01:58, Gerd Hoffmann wrote:
Hi,
That means the SMMRevId is 0_xx64h for AMD64 processor. But I am not
sure what the value is for AMD32 processor. Maybe 0 according to the
OVMF logic.
The smm emulation in the linux kernel uses 0 and 0x64.
But, I am very suspicious about the logic in AMD's version as below:
--- AMD's version
SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT;
LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA;
if (LMAValue) {
SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;
}
---
The above logic detects the current CPU mode and 64bit save state area layout
is used if it's running in 64bit.
But if a AMD64 CPU runs in 32bit mode, the above logic causes the
32bit save state area layout is used. It's not right! The save state
area layout does not depend on the CPU running mode, but whether it's
a legacy CPU or a 64-capable CPU.
Well, that is not entirely clear to me. Could it be 64-bit processors
support both 32-bit and 64-bit format, for backward compatibility
reasons?
So OvmfPkgIa32 builds could use the 32-bit format, OvmfPkgX64 builds use
the 64-bit format, everything works fine?
The tricky corner case is OvmfPkgIa32X64, where (after applying this
series) 32-bit PEI should setup things for 64-bit SMM/DXE, and checking
the current processor mode will not give use the result we need.
Jiaxin, I agree that the confusion should be cleaned up by AMD
experts. Let's not change any existing behavior.
Agree. Tom?
I don't have a lot of experience with SMM. I believe Paolo first ported
over the support into OVMF and might have more insight?
I'll try to take a look at it when I can, but maybe @Abner or @Abdul might
have more understanding of SMM with which they can comment.
Thanks,
Tom
take care,
Gerd
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-=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH v4 13/14] UefiPayloadPkg/UefiPayloadPkg.dsc: Include SmmRelocationLib
Reviewed-by: Gua Guo From: Wu, Jiaxin Sent: Friday, April 26, 2024 8:17:19 PM To: devel@edk2.groups.io Cc: Dong, Guo ; Rhodes, Sean ; Lu, James ; Guo, Gua ; Ni, Ray Subject: [PATCH v4 13/14] UefiPayloadPkg/UefiPayloadPkg.dsc: Include SmmRelocationLib This patch just includes SmmRelocationLib in UefiPayloadPkg. Cc: Guo Dong Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Cc: Ray Ni Signed-off-by: Jiaxin Wu Reviewed-by: Gua Guo Reviewed-by: Guo Dong --- UefiPayloadPkg/UefiPayloadPkg.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayloadPkg.dsc index e1b9d5ecf1..2860a659f6 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -314,10 +314,12 @@ VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf FdtLib|MdePkg/Library/BaseFdtLib/BaseFdtLib.inf + SmmRelocationLib|UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf + [LibraryClasses.common] !if $(BOOTSPLASH_IMAGE) SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.inf !endif -- 2.16.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118339): https://edk2.groups.io/g/devel/message/118339 Mute This Topic: https://groups.io/mt/105748927/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v4 14/14] UefiCpuPkg/PiSmmCpuDxeSmm: Remove SmBases relocation logic
This patch is to remove legacy SmBase relocation in
PiSmmCpuDxeSmm Driver. The responsibility for SmBase
relocation has been transferred to the SmmRelocationInit
interface, which now handles the following tasks:
1. Relocates the SmBase for each processor.
2. Generates the gSmmBaseHobGuid HOB.
As a result of this change, the PiSmmCpuDxeSmm driver's
role in SMM environment setup is simplified to:
1. Utilize the gSmmBaseHobGuid to determine the SmBase.
2. Perform the ExecuteFirstSmiInit() to do early SMM
initialization.
Cc: Ray Ni
Cc: Zeng Star
Cc: Gerd Hoffmann
Cc: Rahul Kumar
Signed-off-by: Jiaxin Wu
---
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c| 21 +-
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c | 42
UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm | 96
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c| 10 +-
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 334 +++
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 103 +
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 4 -
UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.h| 2 +-
UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c | 69 --
UefiCpuPkg/PiSmmCpuDxeSmm/X64/Semaphore.c| 69 --
UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm | 146
11 files changed, 40 insertions(+), 856 deletions(-)
delete mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c
delete mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
delete mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/Semaphore.c
delete mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index b14c289a27..d67fb49890 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -639,27 +639,14 @@ InitializeCpuProcedure (
//
InitializeCpuBeforeRebase (IsBsp);
}
if (IsBsp) {
-DEBUG ((DEBUG_INFO, "SmmRestoreCpu: mSmmRelocated is %d\n",
mSmmRelocated));
-
//
-// Check whether Smm Relocation is done or not.
-// If not, will do the SmmBases Relocation here!!!
+// Issue SMI IPI (All Excluding Self SMM IPI + BSP SMM IPI) to execute
first SMI init.
//
-if (!mSmmRelocated) {
- //
- // Restore SMBASE for BSP and all APs
- //
- SmmRelocateBases ();
-} else {
- //
- // Issue SMI IPI (All Excluding Self SMM IPI + BSP SMM IPI) to execute
first SMI init.
- //
- ExecuteFirstSmiInit ();
-}
+ExecuteFirstSmiInit ();
}
//
// Skip initialization if mAcpiCpuData is not valid
//
@@ -978,13 +965,13 @@ InitSmmS3ResumeState (
SmmS3ResumeState->SmmS3StackBase =
(EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES
((UINTN)SmmS3ResumeState->SmmS3StackSize));
if (SmmS3ResumeState->SmmS3StackBase == 0) {
SmmS3ResumeState->SmmS3StackSize = 0;
}
-SmmS3ResumeState->SmmS3Cr0 = mSmmCr0;
+SmmS3ResumeState->SmmS3Cr0 = (UINT32)AsmReadCr0 ();
SmmS3ResumeState->SmmS3Cr3 = Cr3;
-SmmS3ResumeState->SmmS3Cr4 = mSmmCr4;
+SmmS3ResumeState->SmmS3Cr4 = (UINT32)AsmReadCr4 ();
if (sizeof (UINTN) == sizeof (UINT64)) {
SmmS3ResumeState->Signature = SMM_S3_RESUME_SMM_64;
}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c
deleted file mode 100644
index a9fcc89dda..00
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/** @file
-Semaphore mechanism to indicate to the BSP that an AP has exited SMM
-after SMBASE relocation.
-
-Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include "PiSmmCpuDxeSmm.h"
-
-UINTN mSmmRelocationOriginalAddress;
-volatile BOOLEAN *mRebasedFlag;
-
-/**
- Hook return address of SMM Save State so that semaphore code
- can be executed immediately after AP exits SMM to indicate to
- the BSP that an AP has exited SMM after SMBASE relocation.
-
- @param[in] CpuIndex The processor index.
- @param[in] RebasedFlag A pointer to a flag that is set to TRUE
- immediately after AP exits SMM.
-
-**/
-VOID
-SemaphoreHook (
- IN UINTN CpuIndex,
- IN volatile BOOLEAN *RebasedFlag
- )
-{
- SMRAM_SAVE_STATE_MAP *CpuState;
-
- mRebasedFlag = RebasedFlag;
-
- CpuState = (SMRAM_SAVE_STATE_MAP
*)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
- mSmmRelocationOriginalAddress = (UINTN)HookReturnFromSmm (
- CpuIndex,
- CpuState,
-
(UINT64)(UINTN),
-
(UINT64)(UINTN)
- );
-}
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
deleted file mode 100644
index
[edk2-devel] [PATCH v4 13/14] UefiPayloadPkg/UefiPayloadPkg.dsc: Include SmmRelocationLib
This patch just includes SmmRelocationLib in UefiPayloadPkg. Cc: Guo Dong Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Cc: Ray Ni Signed-off-by: Jiaxin Wu Reviewed-by: Gua Guo Reviewed-by: Guo Dong --- UefiPayloadPkg/UefiPayloadPkg.dsc | 2 ++ 1 file changed, 2 insertions(+) diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayloadPkg.dsc index e1b9d5ecf1..2860a659f6 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -314,10 +314,12 @@ VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf CcExitLib|UefiCpuPkg/Library/CcExitLibNull/CcExitLibNull.inf AmdSvsmLib|UefiCpuPkg/Library/AmdSvsmLibNull/AmdSvsmLibNull.inf ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf FdtLib|MdePkg/Library/BaseFdtLib/BaseFdtLib.inf + SmmRelocationLib|UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf + [LibraryClasses.common] !if $(BOOTSPLASH_IMAGE) SafeIntLib|MdePkg/Library/BaseSafeIntLib/BaseSafeIntLib.inf BmpSupportLib|MdeModulePkg/Library/BaseBmpSupportLib/BaseBmpSupportLib.inf !endif -- 2.16.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118337): https://edk2.groups.io/g/devel/message/118337 Mute This Topic: https://groups.io/mt/105748927/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v4 12/14] OvmfPkg/PlatformPei: Relocate SmBases in PEI phase
This patch is to consume SmmRelocationInit for SmBase
Relocation.
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Ray Ni
Signed-off-by: Jiaxin Wu
---
OvmfPkg/PlatformPei/Platform.c | 3 +
OvmfPkg/PlatformPei/Platform.h | 5 ++
OvmfPkg/PlatformPei/PlatformPei.inf| 5 +-
.../ClearCache.c => PlatformPei/SmmRelocation.c} | 79 ++
4 files changed, 34 insertions(+), 58 deletions(-)
copy OvmfPkg/{Bhyve/PlatformPei/ClearCache.c => PlatformPei/SmmRelocation.c}
(32%)
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index f5dc41c3a8..df35726ff6 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -365,8 +365,11 @@ InitializePlatform (
MiscInitialization (PlatformInfoHob);
}
IntelTdxInitialize ();
InstallFeatureControlCallback (PlatformInfoHob);
+ if (PlatformInfoHob->SmmSmramRequire) {
+RelocateSmBase ();
+ }
return EFI_SUCCESS;
}
diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
index 1cf44844a7..0a59547cfc 100644
--- a/OvmfPkg/PlatformPei/Platform.h
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -76,10 +76,15 @@ InstallFeatureControlCallback (
VOID
InstallClearCacheCallback (
VOID
);
+VOID
+RelocateSmBase (
+ VOID
+ );
+
VOID
AmdSevInitialize (
IN EFI_HOB_PLATFORM_INFO *PlatformInfoHob
);
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf
b/OvmfPkg/PlatformPei/PlatformPei.inf
index 20b1b98292..e036018eab 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -1,10 +1,10 @@
## @file
# Platform PEI driver
#
# This module provides platform specific function to detect boot mode.
-# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2024, Intel Corporation. All rights reserved.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -30,10 +30,11 @@
MemDetect.c
MemTypeInfo.c
Platform.c
Platform.h
IntelTdx.c
+ SmmRelocation.c
[Packages]
EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
@@ -64,10 +65,11 @@
MtrrLib
MemEncryptSevLib
PcdLib
CcExitLib
PlatformInitLib
+ SmmRelocationLib
[Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
@@ -140,9 +142,10 @@
[Ppis]
gEfiPeiMasterBootModePpiGuid
gEfiPeiMpServicesPpiGuid
gEfiPeiReadOnlyVariable2PpiGuid
+ gEdkiiPeiMpServices2PpiGuid
[Depex]
TRUE
diff --git a/OvmfPkg/Bhyve/PlatformPei/ClearCache.c
b/OvmfPkg/PlatformPei/SmmRelocation.c
similarity index 32%
copy from OvmfPkg/Bhyve/PlatformPei/ClearCache.c
copy to OvmfPkg/PlatformPei/SmmRelocation.c
index 9e59f31df7..1151fc9220 100644
--- a/OvmfPkg/Bhyve/PlatformPei/ClearCache.c
+++ b/OvmfPkg/PlatformPei/SmmRelocation.c
@@ -1,45 +1,21 @@
/**@file
- Install a callback to clear cache on all processors.
- This is for conformance with the TCG "Platform Reset Attack Mitigation
- Specification". Because clearing the CPU caches at boot doesn't impact
- performance significantly, do it unconditionally, for simplicity's
- sake.
+ Install a callback to do smm relocation.
- Copyright (C) 2018, Red Hat, Inc.
+ Copyright (c) 2024, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-#include
#include
#include
-#include
-
+#include
+#include
#include "Platform.h"
/**
- Invalidate data & instruction caches.
- All APs execute this function in parallel. The BSP executes the function
- separately.
-
- @param[in,out] WorkSpace Pointer to the input/output argument workspace
-shared by all processors.
-**/
-STATIC
-VOID
-EFIAPI
-ClearCache (
- IN OUT VOID *WorkSpace
- )
-{
- WriteBackInvalidateDataCache ();
- InvalidateInstructionCache ();
-}
-
-/**
- Notification function called when EFI_PEI_MP_SERVICES_PPI becomes available.
+ Notification function called when EDKII_PEI_MP_SERVICES2_PPI becomes
available.
@param[in] PeiServices Indirect reference to the PEI Services Table.
@param[in] NotifyDescriptor Address of the notification descriptor data
structure.
@param[in] Ppi Address of the PPI that was installed.
@@ -48,68 +24,57 @@ ClearCache (
function is ignored.
**/
STATIC
EFI_STATUS
EFIAPI
-ClearCacheOnMpServicesAvailable (
+OnMpServices2Available (
IN EFI_PEI_SERVICES **PeiServices,
IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
IN VOID *Ppi
)
{
- EFI_PEI_MP_SERVICES_PPI *MpServices;
- EFI_STATUS Status;
+ EDKII_PEI_MP_SERVICES2_PPI *MpServices2;
+ EFI_STATUS Status;
DEBUG ((DEBUG_INFO, "%a: %a\n", gEfiCallerBaseName, __func__));
+ MpServices2 = Ppi;
+
//
- //
[edk2-devel] [PATCH v4 11/14] OvmfPkg/SmmCpuFeaturesLib: Check Smbase Relocation is done or not
Based on gSmmBaseHobGuid:
If gSmmBaseHobGuid found, means SmBase info has been relocated
and recorded in the SmBase array.
So, this patch check smbase relocation is done or not in
SmmCpuFeaturesInitializeProcessor().
With SmmRelocationLib, gSmmBaseHobGuid will be always created.
Here this patch just makes the function/logic correct. The SMM
Relocation logic can be totally cleaned from the
SmmCpuFeaturesLib. But it will happen in the future patch set,
this patch does not target to the cleanup work.
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Ray Ni
Signed-off-by: Jiaxin Wu
Reviewed-by: Ray Ni
---
.../Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 33 ++
1 file changed, 22 insertions(+), 11 deletions(-)
diff --git a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
index 63822b126e..0a6f33c2b1 100644
--- a/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
+++ b/OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c
@@ -26,10 +26,16 @@
//
// EFER register LMA bit
//
#define LMA BIT10
+//
+// Indicate SmBase for each Processors has been relocated or not. If TRUE,
+// means no need to do the relocation in SmmCpuFeaturesInitializeProcessor().
+//
+BOOLEAN mSmmCpuFeaturesSmmRelocated;
+
/**
The constructor function
@param[in] ImageHandle The firmware allocated handle for the EFI image.
@param[in] SystemTable A pointer to the EFI System Table.
@@ -44,13 +50,13 @@ SmmCpuFeaturesLibConstructor (
IN EFI_SYSTEM_TABLE *SystemTable
)
{
//
// If gSmmBaseHobGuid found, means SmBase info has been relocated and
recorded
- // in the SmBase array. ASSERT it's not supported in OVMF.
+ // in the SmBase array.
//
- ASSERT (GetFirstGuidHob () == NULL);
+ mSmmCpuFeaturesSmmRelocated = (BOOLEAN)(GetFirstGuidHob ()
!= NULL);
//
// No need to program SMRRs on our virtual platform.
//
return EFI_SUCCESS;
@@ -90,20 +96,25 @@ SmmCpuFeaturesInitializeProcessor (
)
{
AMD_SMRAM_SAVE_STATE_MAP *CpuState;
//
- // Configure SMBASE.
+ // No need to configure SMBASE if SmBase relocation has been done.
//
- CpuState = (AMD_SMRAM_SAVE_STATE_MAP *)(UINTN)(
- SMM_DEFAULT_SMBASE +
- SMRAM_SAVE_STATE_MAP_OFFSET
- );
- if ((CpuState->x86.SMMRevId & 0x) == 0) {
-CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
- } else {
-CpuState->x64.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
+ if (!mSmmCpuFeaturesSmmRelocated) {
+//
+// Configure SMBASE.
+//
+CpuState = (AMD_SMRAM_SAVE_STATE_MAP *)(UINTN)(
+ SMM_DEFAULT_SMBASE +
+ SMRAM_SAVE_STATE_MAP_OFFSET
+ );
+if ((CpuState->x86.SMMRevId & 0x) == 0) {
+ CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
+} else {
+ CpuState->x64.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];
+}
}
//
// No need to program SMRRs on our virtual platform.
//
--
2.16.2.windows.1
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[edk2-devel] [PATCH v4 10/14] OvmfPkg: Refine SmmAccess implementation
This patch refines the SmmAccess implementation:
1. SmramMap will be retrieved from the
gEfiSmmSmramMemoryGuid instead of original from
the TSEG Memory Base register.
2. Remove the gEfiAcpiVariableGuid creation, thus
the DESCRIPTOR_INDEX definition can be also cleaned.
3. The gEfiAcpiVariableGuid HOB is moved to the
OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf.
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Ray Ni
Signed-off-by: Jiaxin Wu
---
OvmfPkg/Library/PlatformInitLib/MemDetect.c| 10 ++
.../Library/PlatformInitLib/PlatformInitLib.inf| 1 +
OvmfPkg/SmmAccess/SmmAccess2Dxe.c | 4 +-
OvmfPkg/SmmAccess/SmmAccess2Dxe.inf| 5 +
OvmfPkg/SmmAccess/SmmAccessPei.c | 116 +++--
OvmfPkg/SmmAccess/SmmAccessPei.inf | 11 +-
OvmfPkg/SmmAccess/SmramInternal.c | 72 -
OvmfPkg/SmmAccess/SmramInternal.h | 19 +---
8 files changed, 87 insertions(+), 151 deletions(-)
diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index 19abb16e79..e64c0ee324 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -40,10 +40,12 @@ Module Name:
#include
#include
#include
#include
+
+#include
#include
#define MEGABYTE_SHIFT 20
VOID
@@ -1001,10 +1003,11 @@ CreateSmmSmramMemoryHob (
{
UINTN BufferSize;
UINT8 SmramRanges;
EFI_PEI_HOB_POINTERSHob;
EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *SmramHobDescriptorBlock;
+ VOID*GuidHob;
SmramRanges = 2;
BufferSize = sizeof (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + (SmramRanges - 1) *
sizeof (EFI_SMRAM_DESCRIPTOR);
Hob.Raw = BuildGuidHob (
@@ -1023,10 +1026,17 @@ CreateSmmSmramMemoryHob (
SmramHobDescriptorBlock->Descriptor[0].PhysicalStart = StartAddress;
SmramHobDescriptorBlock->Descriptor[0].CpuStart = StartAddress;
SmramHobDescriptorBlock->Descriptor[0].PhysicalSize = EFI_PAGE_SIZE;
SmramHobDescriptorBlock->Descriptor[0].RegionState = EFI_SMRAM_CLOSED |
EFI_CACHEABLE | EFI_ALLOCATED;
+ //
+ // 1.1 Create gEfiAcpiVariableGuid according
SmramHobDescriptorBlock->Descriptor[0] since it's used in S3 resume.
+ //
+ GuidHob = BuildGuidHob (, sizeof
(EFI_SMRAM_DESCRIPTOR));
+ ASSERT (GuidHob != NULL);
+ CopyMem (GuidHob, >Descriptor[0], sizeof
(EFI_SMRAM_DESCRIPTOR));
+
//
// 2. Create second SMRAM descriptor, which is free and will be used by SMM
foundation.
//
SmramHobDescriptorBlock->Descriptor[1].PhysicalStart =
SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
SmramHobDescriptorBlock->Descriptor[1].CpuStart =
SmramHobDescriptorBlock->Descriptor[0].CpuStart + EFI_PAGE_SIZE;
diff --git a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
index 2bb1c0296f..21e6efa5e0 100644
--- a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
+++ b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
@@ -56,10 +56,11 @@
[LibraryClasses.X64]
TdxLib
[Guids]
gEfiSmmSmramMemoryGuid
+ gEfiAcpiVariableGuid
[Pcd]
gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable
diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
index 4b9e6df37f..3371592de7 100644
--- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
+++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.c
@@ -4,11 +4,11 @@
Q35 TSEG is expected to have been verified and set up by the SmmAccessPei
driver.
Copyright (C) 2013, 2015, Red Hat, Inc.
- Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.
+ Copyright (c) 2009 - 2024, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -113,12 +113,10 @@ SmmAccess2DxeGetCapabilities (
IN OUT UINTN *SmramMapSize,
IN OUT EFI_SMRAM_DESCRIPTOR*SmramMap
)
{
return SmramAccessGetCapabilities (
- This->LockState,
- This->OpenState,
SmramMapSize,
SmramMap
);
}
diff --git a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
index d86381d0fb..d9f01a13c4 100644
--- a/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
+++ b/OvmfPkg/SmmAccess/SmmAccess2Dxe.inf
@@ -3,10 +3,11 @@
#
# Q35 TSEG is expected to have been verified and set up by the SmmAccessPei
# driver.
#
# Copyright (C) 2013, 2015, Red Hat, Inc.
+# Copyright (c) 2024 Intel Corporation.
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@@ -39,17 +40,21 @@
DebugLib
PcdLib
PciLib
UefiBootServicesTableLib
UefiDriverEntryPoint
+ HobLib
[Protocols]
gEfiSmmAccess2ProtocolGuid ## PRODUCES
[FeaturePcd]
gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
+[Guids]
[edk2-devel] [PATCH v4 09/14] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid
In the PiSmmCpuDxeSmm driver, SMRAM allocation for SMI
handlers and processor Save State areas was traditionally
performed using the Smst->AllocatePages() function during
the DXE phase. The introduction of SmmRelocationLib
changes this process by moving the allocation to the PEI
phase, where Smst->AllocatePages() is not accessible.
Instead, the allocation is now handled by partitioning
the SMRAM based on the information provided by a GUID HOB
(identified by gEfiSmmSMramMemoryGuid).
This patch is to ensure that OVMF produces the
gEfiSmmSMramMemoryGuid HOB, allowing SmmRelocationLib to
reserve the necessary memory for SMBASE relocation.
More info for the change:
1. The EFI_SMM_SMRAM_MEMORY_GUID HOB, as defined in the PI
specification, vol.3, section 5, which is used to describe
the SMRAM memory regions supported by the platform. This HOB
should be produced during the memory detection phase to
align with the PI spec.
2. In addition to the memory reserved for ACPI S3 resume,
an increasing number of features require reserving SMRAM
for specific purposes, such as SmmRelocation. Other
advanced features in Intel platforms also necessitate
this. The implementation of these features varies and is
entirely dependent on the platform. This is why an
increasing number of platforms are adopting the
EFI_SMM_SMRAM_MEMORY_GUID HOB for SMRAM description.
3. It is crucial that the SMRAM information remains
consistent when retrieved from the platform, whether
through the SMM ACCESS PPI/Protocol or the
EFI_SMM_SMRAM_MEMORY_GUID HOB. Inconsistencies can lead
to unexpected issues, most commonly memory region conflicts.
4. The SMM ACCESS PPI/Protocol can be naturally
implemented for general use. The common approach is to
utilize the EFI_SMM_SMRAM_MEMORY_GUID HOB. For reference,
see the existing implementation in the EDK2 repository at
edk2/UefiPayloadPkg/SmmAccessDxe/SmmAccessDxe.inf and
edk2-platforms/Silicon/Intel/IntelSiliconPkg/Feature/
SmmAccess/Library/PeiSmmAccessLib/PeiSmmAccessLib.inf.
Next patch will refine the OVMF SMM Access to consume
the EFI_SMM_SMRAM_MEMORY_GUID HOB.
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Ray Ni
Signed-off-by: Jiaxin Wu
---
OvmfPkg/Library/PlatformInitLib/MemDetect.c| 125 ++---
.../Library/PlatformInitLib/PlatformInitLib.inf| 5 +-
2 files changed, 90 insertions(+), 40 deletions(-)
diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
index 7b6e5102ad..19abb16e79 100644
--- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c
+++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c
@@ -1,9 +1,9 @@
/**@file
Memory Detection for Virtual Machines.
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2006 - 2024, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
Module Name:
MemDetect.c
@@ -40,10 +40,11 @@ Module Name:
#include
#include
#include
#include
+#include
#define MEGABYTE_SHIFT 20
VOID
EFIAPI
@@ -980,10 +981,61 @@ PlatformAddressWidthInitialization (
#endif
PlatformInfoHob->PhysMemAddressWidth = PhysMemAddressWidth;
}
+/**
+ Create gEfiSmmSmramMemoryGuid HOB defined in the PI specification Vol. 3,
+ section 5, which is used to describe the SMRAM memory regions supported
+ by the platform.
+
+ @param[in] StartAddress StartAddress of smram.
+ @param[in] Size Size of smram.
+
+**/
+STATIC
+VOID
+CreateSmmSmramMemoryHob (
+ IN EFI_PHYSICAL_ADDRESS StartAddress,
+ IN UINT32Size
+ )
+{
+ UINTN BufferSize;
+ UINT8 SmramRanges;
+ EFI_PEI_HOB_POINTERSHob;
+ EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *SmramHobDescriptorBlock;
+
+ SmramRanges = 2;
+ BufferSize = sizeof (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + (SmramRanges - 1) *
sizeof (EFI_SMRAM_DESCRIPTOR);
+
+ Hob.Raw = BuildGuidHob (
+ ,
+ BufferSize
+ );
+ ASSERT (Hob.Raw);
+
+ SmramHobDescriptorBlock =
(EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *)(Hob.Raw);
+ SmramHobDescriptorBlock->NumberOfSmmReservedRegions = SmramRanges;
+
+ //
+ // 1. Create first SMRAM descriptor, which contains data structures used in
S3 resume.
+ // One page is enough for the data structure
+ //
+ SmramHobDescriptorBlock->Descriptor[0].PhysicalStart = StartAddress;
+ SmramHobDescriptorBlock->Descriptor[0].CpuStart = StartAddress;
+ SmramHobDescriptorBlock->Descriptor[0].PhysicalSize = EFI_PAGE_SIZE;
+ SmramHobDescriptorBlock->Descriptor[0].RegionState = EFI_SMRAM_CLOSED |
EFI_CACHEABLE | EFI_ALLOCATED;
+
+ //
+ // 2. Create second SMRAM descriptor, which is free and will be used by SMM
foundation.
+ //
+ SmramHobDescriptorBlock->Descriptor[1].PhysicalStart =
SmramHobDescriptorBlock->Descriptor[0].PhysicalStart + EFI_PAGE_SIZE;
+ SmramHobDescriptorBlock->Descriptor[1].CpuStart =
[edk2-devel] [PATCH v4 08/14] OvmfPkg/SmmRelocationLib: Add library instance for OVMF
There are below 2 differences between AMD & OVMF according
existing implementation:
1.The mode of the CPU check is different between the AMD & OVMF.
OVMF:
CpuSaveState->x86.SMMRevId & 0X
AMD:
LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA
2.Existing SmBase configuration is different between the
AMD & OVMF.
OVMF:
if ((CpuSaveState->x86.SMMRevId & 0x) == 0) {
CpuSaveState->x86.SMBASE = mSmBaseForAllCpus[CpuIndex];
} else {
CpuSaveState->x64.SMBASE = mSmBaseForAllCpus[CpuIndex];
}
AMD:
AmdCpuState->x64.SMBASE = mSmBaseForAllCpus[CpuIndex];
This patch provides the SmmRelocationLib library instance
for OVMF to handle the logic difference, and it won't change
the existing implementation code logic.
Cc: Ray Ni
Cc: Zeng Star
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Rahul Kumar
Signed-off-by: Jiaxin Wu
---
OvmfPkg/AmdSev/AmdSevX64.dsc | 1 +
OvmfPkg/CloudHv/CloudHvX64.dsc | 1 +
.../Library/SmmRelocationLib/Ia32/Semaphore.c | 0
.../Library/SmmRelocationLib/Ia32/SmmInit.nasm | 0
.../SmmRelocationLib/InternalSmmRelocationLib.h| 0
.../Library/SmmRelocationLib/SmmRelocationLib.c| 0
.../Library/SmmRelocationLib/SmmRelocationLib.inf | 3 +-
.../SmmRelocationLib/SmramSaveStateConfig.c| 65 +++---
.../Library/SmmRelocationLib/X64/Semaphore.c | 0
.../Library/SmmRelocationLib/X64/SmmInit.nasm | 0
OvmfPkg/Microvm/MicrovmX64.dsc | 1 +
OvmfPkg/OvmfPkgIa32.dsc| 1 +
OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
OvmfPkg/OvmfPkgX64.dsc | 1 +
14 files changed, 27 insertions(+), 47 deletions(-)
copy {UefiCpuPkg => OvmfPkg}/Library/SmmRelocationLib/Ia32/Semaphore.c (100%)
copy {UefiCpuPkg => OvmfPkg}/Library/SmmRelocationLib/Ia32/SmmInit.nasm (100%)
copy {UefiCpuPkg =>
OvmfPkg}/Library/SmmRelocationLib/InternalSmmRelocationLib.h (100%)
copy {UefiCpuPkg => OvmfPkg}/Library/SmmRelocationLib/SmmRelocationLib.c (100%)
copy {UefiCpuPkg => OvmfPkg}/Library/SmmRelocationLib/SmmRelocationLib.inf
(90%)
copy UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c =>
OvmfPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c (60%)
copy {UefiCpuPkg => OvmfPkg}/Library/SmmRelocationLib/X64/Semaphore.c (100%)
copy {UefiCpuPkg => OvmfPkg}/Library/SmmRelocationLib/X64/SmmInit.nasm (100%)
diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index a7540bb636..8eb6f4f24f 100644
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -108,10 +108,11 @@
!include MdePkg/MdeLibs.dsc.inc
[LibraryClasses]
+ SmmRelocationLib|OvmfPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc
index b1911d6ab4..4996885301 100644
--- a/OvmfPkg/CloudHv/CloudHvX64.dsc
+++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
@@ -124,10 +124,11 @@
!include MdePkg/MdeLibs.dsc.inc
[LibraryClasses]
+ SmmRelocationLib|OvmfPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
TimerLib|OvmfPkg/Library/AcpiTimerLib/BaseAcpiTimerLib.inf
ResetSystemLib|OvmfPkg/Library/ResetSystemLib/BaseResetSystemLib.inf
PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
b/OvmfPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
similarity index 100%
copy from UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
copy to OvmfPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
b/OvmfPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
similarity index 100%
copy from UefiCpuPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
copy to OvmfPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
b/OvmfPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
similarity index 100%
copy from UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
copy to OvmfPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
b/OvmfPkg/Library/SmmRelocationLib/SmmRelocationLib.c
similarity index 100%
copy from UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
copy to
[edk2-devel] [PATCH v4 07/14] UefiCpuPkg/SmmRelocationLib: Add library instance for AMD
Due to the definition difference of SMRAM Save State,
SmmBase config in SMRAM Save State for AMD is also different.
This patch provides the AmdSmmRelocationLib library instance
to handle the SMRAM Save State difference.
Cc: Abdul Lateef Attar
Cc: Abner Chang
Cc: Ray Ni
Cc: Zeng Star
Cc: Gerd Hoffmann
Cc: Rahul Kumar
Signed-off-by: Jiaxin Wu
Acked-by: Ray Ni
Reviewed-by: Abdul Lateef Attar
---
...mmRelocationLib.inf => AmdSmmRelocationLib.inf} | 5 +-
...SaveStateConfig.c => AmdSmramSaveStateConfig.c} | 91 ++
UefiCpuPkg/UefiCpuPkg.dsc | 1 +
3 files changed, 43 insertions(+), 54 deletions(-)
copy UefiCpuPkg/Library/SmmRelocationLib/{SmmRelocationLib.inf =>
AmdSmmRelocationLib.inf} (89%)
copy UefiCpuPkg/Library/SmmRelocationLib/{SmramSaveStateConfig.c =>
AmdSmramSaveStateConfig.c} (47%)
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
similarity index 89%
copy from UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
copy to UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
index 45fdaf35bc..e69079fa02 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
+++ b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmmRelocationLib.inf
@@ -13,18 +13,18 @@
##
[Defines]
INF_VERSION= 0x00010005
BASE_NAME = SmmRelocationLib
- FILE_GUID = 853E97B3-790C-4EA3-945C-8F622FC47FE8
+ FILE_GUID = 65C74DCD-0D09-494A-8BFF-A64226EB8054
MODULE_TYPE= PEIM
VERSION_STRING = 1.0
LIBRARY_CLASS = SmmRelocationLib
[Sources]
InternalSmmRelocationLib.h
- SmramSaveStateConfig.c
+ AmdSmramSaveStateConfig.c
SmmRelocationLib.c
[Sources.Ia32]
Ia32/Semaphore.c
Ia32/SmmInit.nasm
@@ -40,11 +40,10 @@
[LibraryClasses]
BaseLib
BaseMemoryLib
CpuExceptionHandlerLib
- CpuLib
DebugLib
HobLib
LocalApicLib
MemoryAllocationLib
PcdLib
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c
b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
similarity index 47%
copy from UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c
copy to UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
index 76d798aba5..068ae60887 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/AmdSmramSaveStateConfig.c
@@ -1,14 +1,17 @@
/** @file
Config SMRAM Save State for SmmBases Relocation.
+ Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
Copyright (c) 2024, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "InternalSmmRelocationLib.h"
-#include
+#include
+
+#define EFER_ADDRESS 0XC080ul
/**
Get the mode of the CPU at the time an SMI occurs
@retval EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT 32 bit.
@@ -18,44 +21,18 @@
UINT8
GetMmSaveStateRegisterLma (
VOID
)
{
- CPUID_VERSION_INFO_EAX RegEax;
- CPUID_EXTENDED_CPU_SIG_EDX RegEdx;
- UINTN FamilyId;
- UINTN ModelId;
- UINT32 Eax;
- UINT8 SmmSaveStateRegisterLma;
-
- //
- // Determine the mode of the CPU at the time an SMI occurs
- // Intel(R) 64 and IA-32 Architectures Software Developer's Manual
- // Volume 3C, Section 34.4.1.1
- //
- RegEax.Uint32 = GetCpuFamilyModel ();
- FamilyId = RegEax.Bits.FamilyId;
- ModelId = RegEax.Bits.Model;
- if ((FamilyId == 0x06) || (FamilyId == 0x0f)) {
-ModelId = ModelId | RegEax.Bits.ExtendedModelId << 4;
- }
-
- RegEdx.Uint32 = 0;
- AsmCpuid (CPUID_EXTENDED_FUNCTION, , NULL, NULL, NULL);
- if (Eax >= CPUID_EXTENDED_CPU_SIG) {
-AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &(RegEdx.Uint32));
- }
+ UINT8 SmmSaveStateRegisterLma;
+ UINT32 LMAValue;
SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT;
- if (RegEdx.Bits.LM) {
-SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;
- }
- if (FamilyId == 0x06) {
-if ((ModelId == 0x17) || (ModelId == 0x0f) || (ModelId == 0x1c)) {
- SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;
-}
+ LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA;
+ if (LMAValue) {
+SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;
}
return SmmSaveStateRegisterLma;
}
@@ -69,22 +46,32 @@ VOID
EFIAPI
ConfigureSmBase (
IN UINT64 SmBase
)
{
- SMRAM_SAVE_STATE_MAP *CpuState;
+ AMD_SMRAM_SAVE_STATE_MAP *AmdCpuState;
- CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE +
SMRAM_SAVE_STATE_MAP_OFFSET);
+ AmdCpuState = (AMD_SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE +
SMRAM_SAVE_STATE_MAP_OFFSET);
-
[edk2-devel] [PATCH v4 06/14] UefiCpuPkg/SmmRelocationLib: Remove unnecessary CpuIndex
This patch is to remove unnecessary CpuIndex.
Cc: Ray Ni
Cc: Zeng Star
Cc: Gerd Hoffmann
Cc: Rahul Kumar
Signed-off-by: Jiaxin Wu
---
UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c | 3 ---
.../Library/SmmRelocationLib/InternalSmmRelocationLib.h | 5 -
UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c | 12 +++-
UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c | 3 ---
UefiCpuPkg/Library/SmmRelocationLib/X64/Semaphore.c | 3 ---
5 files changed, 3 insertions(+), 23 deletions(-)
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
b/UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
index ba329d6ba2..5d9eea3de9 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
@@ -15,28 +15,25 @@ volatile BOOLEAN *mRebasedFlag;
/**
Hook return address of SMM Save State so that semaphore code
can be executed immediately after AP exits SMM to indicate to
the BSP that an AP has exited SMM after SMBASE relocation.
- @param[in] CpuIndex The processor index.
@param[in] RebasedFlag A pointer to a flag that is set to TRUE
immediately after AP exits SMM.
**/
VOID
SemaphoreHook (
- IN UINTN CpuIndex,
IN volatile BOOLEAN *RebasedFlag
)
{
SMRAM_SAVE_STATE_MAP *CpuState;
mRebasedFlag = RebasedFlag;
CpuState = (SMRAM_SAVE_STATE_MAP
*)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);
mSmmRelocationOriginalAddress = (UINTN)HookReturnFromSmm (
- CpuIndex,
CpuState,
(UINT64)(UINTN),
(UINT64)(UINTN)
);
}
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
b/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
index ede61b956f..d1387f2dfb 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
+++ b/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
@@ -81,12 +81,10 @@ SmmRelocationSemaphoreComplete (
Hook the code executed immediately after an RSM instruction on the currently
executing CPU. The mode of code executed immediately after RSM must be
detected, and the appropriate hook must be selected. Always clear the auto
HALT restart flag if it is set.
- @param[in] CpuIndex The processor index for the currently
- executing CPU.
@param[in,out] CpuState Pointer to SMRAM Save State Map for
the
currently executing CPU.
@param[in] NewInstructionPointer32 Instruction pointer to use if
resuming to
32-bit mode from 64-bit SMM.
@param[in] NewInstructionPointerInstruction pointer to use if
resuming to
@@ -96,29 +94,26 @@ SmmRelocationSemaphoreComplete (
**/
UINT64
EFIAPI
HookReturnFromSmm (
- IN UINTN CpuIndex,
IN OUT SMRAM_SAVE_STATE_MAP *CpuState,
IN UINT64NewInstructionPointer32,
IN UINT64NewInstructionPointer
);
/**
Hook return address of SMM Save State so that semaphore code
can be executed immediately after AP exits SMM to indicate to
the BSP that an AP has exited SMM after SMBASE relocation.
- @param[in] CpuIndex The processor index.
@param[in] RebasedFlag A pointer to a flag that is set to TRUE
immediately after AP exits SMM.
**/
VOID
SemaphoreHook (
- IN UINTN CpuIndex,
IN volatile BOOLEAN *RebasedFlag
);
/**
This function fixes up the address of the global variable or function
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
b/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
index 86df66a280..7e65bbf929 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
@@ -29,15 +29,10 @@ UINT64 mSmBase;
//
// SmBase Rebased flag for current CPU
//
volatile BOOLEAN mRebased;
-//
-// CpuIndex for current CPU
-//
-UINTN mCpuIndex;
-
/**
This function will get the SmBase for CpuIndex.
@param[in] CpuIndexThe processor index.
@param[in] SmmRelocationStart The start address of Smm relocated memory
in SMRAM.
@@ -153,11 +148,11 @@ SmmInitHandler (
//
// Hook return after RSM to set SMM re-based flag
// SMM re-based flag can't be set before RSM, because SMM save state context
might be override
// by next AP flow before it take effect.
//
- SemaphoreHook (mCpuIndex, );
+ SemaphoreHook ();
}
/**
Relocate SmmBases for each processor.
Execute on first boot and all S3 resumes
@@
[edk2-devel] [PATCH v4 05/14] UefiCpuPkg/SmmRelocationLib: Remove unnecessary global variable
This patch aims on mProcessorInfo global variable, which can be
defined as local variable in SmmRelocateBases(). With this patch,
no need to allocate the memory for all CPUs to store the
Processor Info.
Cc: Ray Ni
Cc: Zeng Star
Cc: Gerd Hoffmann
Cc: Rahul Kumar
Signed-off-by: Jiaxin Wu
---
.../Library/SmmRelocationLib/SmmRelocationLib.c| 88 --
1 file changed, 32 insertions(+), 56 deletions(-)
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
b/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
index 3694a07cbb..86df66a280 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
@@ -14,15 +14,10 @@
#include "InternalSmmRelocationLib.h"
UINTN mMaxNumberOfCpus = 1;
UINTN mNumberOfCpus= 1;
-//
-// Record all Processors Info
-//
-EFI_PROCESSOR_INFORMATION *mProcessorInfo = NULL;
-
//
// IDT used during SMM Init
//
IA32_DESCRIPTOR gcSmmInitIdtr;
@@ -34,10 +29,15 @@ UINT64 mSmBase;
//
// SmBase Rebased flag for current CPU
//
volatile BOOLEAN mRebased;
+//
+// CpuIndex for current CPU
+//
+UINTN mCpuIndex;
+
/**
This function will get the SmBase for CpuIndex.
@param[in] CpuIndexThe processor index.
@param[in] SmmRelocationStart The start address of Smm relocated memory
in SMRAM.
@@ -138,37 +138,26 @@ VOID
EFIAPI
SmmInitHandler (
VOID
)
{
- UINT32 ApicId;
- UINTN Index;
-
//
// Update SMM IDT entries' code segment and load IDT
//
AsmWriteIdtr ();
- ApicId = GetApicId ();
- for (Index = 0; Index < mNumberOfCpus; Index++) {
-if (ApicId == (UINT32)mProcessorInfo[Index].ProcessorId) {
- //
- // Configure SmBase.
- //
- ConfigureSmBase (mSmBase);
-
- //
- // Hook return after RSM to set SMM re-based flag
- // SMM re-based flag can't be set before RSM, because SMM save state
context might be override
- // by next AP flow before it take effect.
- //
- SemaphoreHook (Index, );
- return;
-}
- }
+ //
+ // Configure SmBase.
+ //
+ ConfigureSmBase (mSmBase);
- ASSERT (FALSE);
+ //
+ // Hook return after RSM to set SMM re-based flag
+ // SMM re-based flag can't be set before RSM, because SMM save state context
might be override
+ // by next AP flow before it take effect.
+ //
+ SemaphoreHook (mCpuIndex, );
}
/**
Relocate SmmBases for each processor.
Execute on first boot and all S3 resumes
@@ -185,17 +174,19 @@ SmmRelocateBases (
IN EDKII_PEI_MP_SERVICES2_PPI *MpServices2,
IN EFI_PHYSICAL_ADDRESSSmmRelocationStart,
IN UINTN TileSize
)
{
- UINT8 BakBuf[BACK_BUF_SIZE];
- SMRAM_SAVE_STATE_MAP BakBuf2;
- SMRAM_SAVE_STATE_MAP *CpuStatePtr;
- UINT8 *U8Ptr;
- UINTN Index;
- UINTN BspIndex;
- UINT32BspApicId;
+ EFI_STATUS Status;
+ UINT8 BakBuf[BACK_BUF_SIZE];
+ SMRAM_SAVE_STATE_MAP BakBuf2;
+ SMRAM_SAVE_STATE_MAP *CpuStatePtr;
+ UINT8 *U8Ptr;
+ UINTN Index;
+ UINTN BspIndex;
+ UINT32 BspApicId;
+ EFI_PROCESSOR_INFORMATION ProcessorInfo;
//
// Make sure the reserved size is large enough for procedure SmmInitTemplate.
//
ASSERT (sizeof (BakBuf) >= gcSmmInitSize);
@@ -230,14 +221,18 @@ SmmRelocateBases (
// Relocate SM bases for all APs
// This is APs' 1st SMI - rebase will be done here, and APs' default SMI
handler will be overridden by gcSmmInitTemplate
//
BspIndex = (UINTN)-1;
for (Index = 0; Index < mNumberOfCpus; Index++) {
-if (BspApicId != (UINT32)mProcessorInfo[Index].ProcessorId) {
- mRebased = FALSE;
- mSmBase = GetSmBase (Index, SmmRelocationStart, TileSize);
- SendSmiIpi ((UINT32)mProcessorInfo[Index].ProcessorId);
+Status = MpServices2->GetProcessorInfo (MpServices2, Index |
CPU_V2_EXTENDED_TOPOLOGY, );
+ASSERT_EFI_ERROR (Status);
+
+if (BspApicId != (UINT32)ProcessorInfo.ProcessorId) {
+ mRebased = FALSE;
+ mSmBase = GetSmBase (Index, SmmRelocationStart, TileSize);
+ mCpuIndex = Index;
+ SendSmiIpi ((UINT32)ProcessorInfo.ProcessorId);
//
// Wait for this AP to finish its 1st SMI
//
while (!mRebased) {
}
@@ -443,11 +438,10 @@ SmmRelocationInit (
UINTN TileSize;
UINT64SmmRelocationSize;
EFI_PHYSICAL_ADDRESS SmmRelocationStart;
UINTN SmmStackSize;
UINT8 *SmmStacks;
- UINTN Index;
SmmRelocationStart = 0;
SmmStacks = NULL;
DEBUG ((DEBUG_INFO, "SmmRelocationInit Start \n"));
@@ -473,28 +467,10 @@ SmmRelocationInit (
mMaxNumberOfCpus = mNumberOfCpus;
}
ASSERT (mNumberOfCpus <= mMaxNumberOfCpus);
- //
- //
[edk2-devel] [PATCH v4 04/14] UefiCpuPkg/SmmRelocationLib: Avoid unnecessary memory allocation
Since SMM relocation is performed serially for each CPU, there is
no need to allocate buffers for all CPUs to store the SmBase
address in mSmBase and the Rebased flag in mRebased. A defined
global variable is sufficient.
This patch focuses on the mSmBase and mRebased global variables
to prevent unnecessary memory allocation for these variables.
Cc: Ray Ni
Cc: Zeng Star
Cc: Gerd Hoffmann
Cc: Rahul Kumar
Signed-off-by: Jiaxin Wu
---
.../Library/SmmRelocationLib/SmmRelocationLib.c| 201 +
1 file changed, 90 insertions(+), 111 deletions(-)
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
b/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
index ca98f06a05..3694a07cbb 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
@@ -25,31 +25,57 @@ EFI_PROCESSOR_INFORMATION *mProcessorInfo = NULL;
// IDT used during SMM Init
//
IA32_DESCRIPTOR gcSmmInitIdtr;
//
-// Smbase for all CPUs
+// Smbase for current CPU
//
-UINT64 *mSmBase = NULL;
+UINT64 mSmBase;
//
-// SmBase Rebased flag for all CPUs
+// SmBase Rebased flag for current CPU
//
-volatile BOOLEAN *mRebased;
+volatile BOOLEAN mRebased;
+
+/**
+ This function will get the SmBase for CpuIndex.
+
+ @param[in] CpuIndexThe processor index.
+ @param[in] SmmRelocationStart The start address of Smm relocated memory
in SMRAM.
+ @param[in] TileSizeThe total size required for a CPU save
state, any
+ additional CPU-specific context and the
size of code
+ for the SMI entry point.
+
+ @retval The value of SmBase for CpuIndex.
+
+**/
+UINTN
+GetSmBase (
+ IN UINTN CpuIndex,
+ IN EFI_PHYSICAL_ADDRESS SmmRelocationStart,
+ IN UINTN TileSize
+ )
+{
+ return (UINTN)(SmmRelocationStart) + CpuIndex * TileSize -
SMM_HANDLER_OFFSET;
+}
/**
This function will create SmBase for all CPUs.
- @param[in] SmBasePointer to SmBase for all CPUs.
+ @param[in] SmmRelocationStart The start address of Smm relocated memory
in SMRAM.
+ @param[in] TileSizeThe total size required for a CPU save
state, any
+ additional CPU-specific context and the
size of code
+ for the SMI entry point.
@retval EFI_SUCCESS Create SmBase for all CPUs successfully.
@retval OthersFailed to create SmBase for all CPUs.
**/
EFI_STATUS
CreateSmmBaseHob (
- IN UINT64 *SmBase
+ IN EFI_PHYSICAL_ADDRESS SmmRelocationStart,
+ IN UINTN TileSize
)
{
UINTN Index;
SMM_BASE_HOB_DATA *SmmBaseHobData;
UINT32 CpuCount;
@@ -90,11 +116,11 @@ CreateSmmBaseHob (
DEBUG ((DEBUG_INFO, "CreateSmmBaseHob -
SmmBaseHobData[%d]->NumberOfProcessors: %d\n", HobCount,
SmmBaseHobData->NumberOfProcessors));
for (Index = 0; Index < SmmBaseHobData->NumberOfProcessors; Index++) {
//
// Calculate the new SMBASE address
//
- SmmBaseHobData->SmBase[Index] = SmBase[Index + CpuCount];
+ SmmBaseHobData->SmBase[Index] = GetSmBase (Index + CpuCount,
SmmRelocationStart, TileSize);
DEBUG ((DEBUG_INFO, "CreateSmmBaseHob - SmmBaseHobData[%d]->SmBase[%d]:
0x%08x\n", HobCount, Index, SmmBaseHobData->SmBase[Index]));
}
CpuCount += NumberOfProcessorsInHob;
HobCount++;
@@ -126,18 +152,18 @@ SmmInitHandler (
for (Index = 0; Index < mNumberOfCpus; Index++) {
if (ApicId == (UINT32)mProcessorInfo[Index].ProcessorId) {
//
// Configure SmBase.
//
- ConfigureSmBase (mSmBase[Index]);
+ ConfigureSmBase (mSmBase);
//
// Hook return after RSM to set SMM re-based flag
// SMM re-based flag can't be set before RSM, because SMM save state
context might be override
// by next AP flow before it take effect.
//
- SemaphoreHook (Index, [Index]);
+ SemaphoreHook (Index, );
return;
}
}
ASSERT (FALSE);
@@ -145,14 +171,22 @@ SmmInitHandler (
/**
Relocate SmmBases for each processor.
Execute on first boot and all S3 resumes
+ @param[in] MpServices2 Pointer to this instance of the MpServices.
+ @param[in] SmmRelocationStart The start address of Smm relocated memory
in SMRAM.
+ @param[in] TileSizeThe total size required for a CPU save
state, any
+ additional CPU-specific context and the
size of code
+ for the SMI entry point.
+
**/
VOID
SmmRelocateBases (
- VOID
+ IN EDKII_PEI_MP_SERVICES2_PPI *MpServices2,
+ IN EFI_PHYSICAL_ADDRESSSmmRelocationStart,
+ IN UINTN TileSize
)
{
UINT8 BakBuf[BACK_BUF_SIZE];
SMRAM_SAVE_STATE_MAP BakBuf2;
SMRAM_SAVE_STATE_MAP
[edk2-devel] [PATCH v4 03/14] UefiCpuPkg/SmmRelocationLib: Rename global variables
This patch aims to rename global variables for clearer
association with Smm Init, ensuring their names are
distinct from those used in the PiSmmCpuDxeSmm Driver.
Cc: Ray Ni
Cc: Zeng Star
Cc: Gerd Hoffmann
Cc: Rahul Kumar
Signed-off-by: Jiaxin Wu
---
.../Library/SmmRelocationLib/Ia32/SmmInit.nasm | 18 +++
.../SmmRelocationLib/InternalSmmRelocationLib.h| 8 +++
.../Library/SmmRelocationLib/SmmRelocationLib.c| 26 +++---
.../Library/SmmRelocationLib/X64/SmmInit.nasm | 18 +++
4 files changed, 35 insertions(+), 35 deletions(-)
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
b/UefiCpuPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
index 3d845e9e16..8916cb7d06 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
+++ b/UefiCpuPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
@@ -16,15 +16,15 @@
extern ASM_PFX(SmmInitHandler)
extern ASM_PFX(mRebasedFlag)
extern ASM_PFX(mSmmRelocationOriginalAddress)
-global ASM_PFX(gPatchSmmCr3)
-global ASM_PFX(gPatchSmmCr4)
-global ASM_PFX(gPatchSmmCr0)
+global ASM_PFX(gPatchSmmInitCr3)
+global ASM_PFX(gPatchSmmInitCr4)
+global ASM_PFX(gPatchSmmInitCr0)
global ASM_PFX(gPatchSmmInitStack)
-global ASM_PFX(gcSmiInitGdtr)
+global ASM_PFX(gcSmmInitGdtr)
global ASM_PFX(gcSmmInitSize)
global ASM_PFX(gcSmmInitTemplate)
%define PROTECT_MODE_CS 0x8
%define PROTECT_MODE_DS 0x20
@@ -81,11 +81,11 @@ CodeSeg64:
DB 0x9b
DB 0xaf; LimitHigh
DB 0 ; BaseHigh
GDT_SIZE equ $ - NullSeg
-ASM_PFX(gcSmiInitGdtr):
+ASM_PFX(gcSmmInitGdtr):
DW GDT_SIZE - 1
DD NullSeg
SECTION .text
@@ -98,22 +98,22 @@ ASM_PFX(SmmStartup):
cpuid
mov ebx, edx; rdmsr will change edx. keep it in
ebx.
and ebx, BIT20 ; extract NX capability bit
shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11]
position
mov eax, strict dword 0 ; source operand will be patched
-ASM_PFX(gPatchSmmCr3):
+ASM_PFX(gPatchSmmInitCr3):
mov cr3, eax
-o32 lgdt[cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
+o32 lgdt[cs:ebp + (ASM_PFX(gcSmmInitGdtr) - ASM_PFX(SmmStartup))]
mov eax, strict dword 0 ; source operand will be patched
-ASM_PFX(gPatchSmmCr4):
+ASM_PFX(gPatchSmmInitCr4):
mov cr4, eax
mov ecx, 0xc080 ; IA32_EFER MSR
rdmsr
or eax, ebx; set NXE bit if NX is available
wrmsr
mov eax, strict dword 0 ; source operand will be patched
-ASM_PFX(gPatchSmmCr0):
+ASM_PFX(gPatchSmmInitCr0):
mov di, PROTECT_MODE_DS
mov cr0, eax
jmp PROTECT_MODE_CS : dword @32bit
BITS 32
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
b/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
index a9d3f271a9..ede61b956f 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
+++ b/UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
@@ -30,17 +30,17 @@
#include
#include
#include
#include
-extern IA32_DESCRIPTOR gcSmiInitGdtr;
+extern IA32_DESCRIPTOR gcSmmInitGdtr;
extern CONST UINT16 gcSmmInitSize;
extern CONST UINT8 gcSmmInitTemplate[];
-X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;
-X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;
-X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;
+X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitCr0;
+X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitCr3;
+X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitCr4;
X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;
//
// The size 0x20 must be bigger than
// the size of template code of SmmInit. Currently,
diff --git a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
b/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
index 13e62b662d..ca98f06a05 100644
--- a/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
@@ -22,11 +22,11 @@ UINTN mNumberOfCpus= 1;
EFI_PROCESSOR_INFORMATION *mProcessorInfo = NULL;
//
// IDT used during SMM Init
//
-IA32_DESCRIPTOR gcSmiIdtr;
+IA32_DESCRIPTOR gcSmmInitIdtr;
//
// Smbase for all CPUs
//
UINT64 *mSmBase = NULL;
@@ -118,11 +118,11 @@ SmmInitHandler (
UINTN Index;
//
// Update SMM IDT entries' code segment and load IDT
//
- AsmWriteIdtr ();
+ AsmWriteIdtr ();
ApicId = GetApicId ();
for (Index = 0; Index < mNumberOfCpus; Index++) {
if (ApicId == (UINT32)mProcessorInfo[Index].ProcessorId) {
//
@@ -167,13 +167,13 @@ SmmRelocateBases (
ASSERT (sizeof (BakBuf) >= gcSmmInitSize);
//
// Patch ASM code template with current CR0, CR3, and CR4 values
//
- PatchInstructionX86 (gPatchSmmCr0, AsmReadCr0 (), 4);
- PatchInstructionX86 (gPatchSmmCr3, AsmReadCr3 (), 4);
- PatchInstructionX86 (gPatchSmmCr4,
[edk2-devel] [PATCH v4 02/14] UefiCpuPkg/SmmRelocationLib: Add SmmRelocationLib library instance
This patch just separates the smbase relocation logic from
PiSmmCpuDxeSmm driver, and moves to the SmmRelocationInit
interface. It maintains the original implementation of most
functions and leaves the definitions of global variables
intact. Further refinements to the code are planned for
subsequent patches.
Platform shall consume the interface for the smbase
relocation if need SMM support.
Note:
Before using SmmRelocationLib, the PiSmmCpuDxeSmm driver
allocates the SMRAM to be used for SMI handler and Save
state area of each processor from Smst->AllocatePages().
With SmmRelocationLib, the SMRAM allocation for SMI
handlers and Save state areas is moved to early PEI
phase (Smst->AllocatePages() service is not available).
So, the allocation is done by splitting the SMRAM out of
the SMRAM regions reported from gEfiSmmSMramMemoryGuid.
So, Platform must produce the gEfiSmmSMramMemoryGuid HOB
for SmmRelocationLib usage.
Cc: Ray Ni
Cc: Zeng Star
Cc: Gerd Hoffmann
Cc: Rahul Kumar
Signed-off-by: Jiaxin Wu
---
.../SmmRelocationLib}/Ia32/Semaphore.c | 10 +-
.../SmmRelocationLib}/Ia32/SmmInit.nasm| 67 ++-
.../SmmRelocationLib/InternalSmmRelocationLib.h| 132 +
.../Library/SmmRelocationLib/SmmRelocationLib.c| 600 +
.../Library/SmmRelocationLib/SmmRelocationLib.inf | 61 +++
.../SmmRelocationLib/SmramSaveStateConfig.c| 139 +
.../SmmRelocationLib}/X64/Semaphore.c | 10 +-
.../SmmRelocationLib}/X64/SmmInit.nasm | 69 ++-
UefiCpuPkg/UefiCpuPkg.dsc | 1 +
9 files changed, 1066 insertions(+), 23 deletions(-)
copy UefiCpuPkg/{PiSmmCpuDxeSmm => Library/SmmRelocationLib}/Ia32/Semaphore.c
(79%)
copy UefiCpuPkg/{PiSmmCpuDxeSmm => Library/SmmRelocationLib}/Ia32/SmmInit.nasm
(53%)
create mode 100644
UefiCpuPkg/Library/SmmRelocationLib/InternalSmmRelocationLib.h
create mode 100644 UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.c
create mode 100644 UefiCpuPkg/Library/SmmRelocationLib/SmmRelocationLib.inf
create mode 100644 UefiCpuPkg/Library/SmmRelocationLib/SmramSaveStateConfig.c
copy UefiCpuPkg/{PiSmmCpuDxeSmm => Library/SmmRelocationLib}/X64/Semaphore.c
(84%)
copy UefiCpuPkg/{PiSmmCpuDxeSmm => Library/SmmRelocationLib}/X64/SmmInit.nasm
(64%)
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c
b/UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
similarity index 79%
copy from UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c
copy to UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
index a9fcc89dda..ba329d6ba2 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Semaphore.c
+++ b/UefiCpuPkg/Library/SmmRelocationLib/Ia32/Semaphore.c
@@ -1,15 +1,15 @@
/** @file
-Semaphore mechanism to indicate to the BSP that an AP has exited SMM
-after SMBASE relocation.
+ Semaphore mechanism to indicate to the BSP that an AP has exited SMM
+ after SMBASE relocation.
-Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.
-SPDX-License-Identifier: BSD-2-Clause-Patent
+ Copyright (c) 2024, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
**/
-#include "PiSmmCpuDxeSmm.h"
+#include "InternalSmmRelocationLib.h"
UINTN mSmmRelocationOriginalAddress;
volatile BOOLEAN *mRebasedFlag;
/**
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
b/UefiCpuPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
similarity index 53%
copy from UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
copy to UefiCpuPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
index b5e77a1a5b..3d845e9e16 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
+++ b/UefiCpuPkg/Library/SmmRelocationLib/Ia32/SmmInit.nasm
@@ -1,7 +1,7 @@
;--
;
-; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.
+; Copyright (c) 2024, Intel Corporation. All rights reserved.
; SPDX-License-Identifier: BSD-2-Clause-Patent
;
; Module Name:
;
; SmmInit.nasm
@@ -27,15 +27,70 @@ global ASM_PFX(gcSmmInitSize)
global ASM_PFX(gcSmmInitTemplate)
%define PROTECT_MODE_CS 0x8
%define PROTECT_MODE_DS 0x20
-SECTION .text
+SECTION .data
-ASM_PFX(gcSmiInitGdtr):
+NullSeg: DQ 0 ; reserved by architecture
+CodeSeg32:
+DW -1 ; LimitLow
+DW 0 ; BaseLow
+DB 0 ; BaseMid
+DB 0x9b
+DB 0xcf; LimitHigh
+DB 0 ; BaseHigh
+ProtModeCodeSeg32:
+DW -1 ; LimitLow
+DW 0 ; BaseLow
+DB 0 ; BaseMid
+DB 0x9b
+DB 0xcf; LimitHigh
+DB 0 ; BaseHigh
+ProtModeSsSeg32:
+DW -1 ; LimitLow
+
[edk2-devel] [PATCH v4 01/14] UefiCpuPkg: Add SmmRelocationLib class
Intel plans to separate the smbase relocation logic from PiSmmCpuDxeSmm driver, and the related behavior will be moved to the new interface defined by the SmmRelocationLib class. The SmmRelocationLib class provides the SmmRelocationInit() interface for platform to do the smbase relocation, which shall provide below 2 functionalities: 1. Relocate smbases for each processor. 2. Create the gSmmBaseHobGuid HOB. With SmmRelocationLib, PiSmmCpuDxeSmm driver (which runs at a later phase) shall: 1. Consume the gSmmBaseHobGuid HOB for the relocated smbases for each Processor. 2. Execute the early SMM Init. This patch just provides the SmmRelocationLib class. Cc: Ray Ni Cc: Zeng Star Cc: Gerd Hoffmann Cc: Rahul Kumar Signed-off-by: Jiaxin Wu Reviewed-by: Ray Ni --- UefiCpuPkg/Include/Library/SmmRelocationLib.h | 42 +++ UefiCpuPkg/UefiCpuPkg.dec | 3 ++ 2 files changed, 45 insertions(+) create mode 100644 UefiCpuPkg/Include/Library/SmmRelocationLib.h diff --git a/UefiCpuPkg/Include/Library/SmmRelocationLib.h b/UefiCpuPkg/Include/Library/SmmRelocationLib.h new file mode 100644 index 00..999a5b46d1 --- /dev/null +++ b/UefiCpuPkg/Include/Library/SmmRelocationLib.h @@ -0,0 +1,42 @@ +/** @file + Header file for SMM Relocation Library. + + The SmmRelocationLib class provides the SmmRelocationInit() + interface for platform to do the smbase relocation, which + shall provide below 2 functionalities: + 1. Relocate SmBases for each processor. + 2. Create the SmBase HOB (gSmmBaseHobGuid). + + With SmmRelocationLib, PiSmmCpuDxeSmm driver (which runs at a later phase) + shall: + 1. Consume the gSmmBaseHobGuid for the relocated smbase for each Processor. + 2. Execute early SMM init. + + Copyright (c) 2024, Intel Corporation. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef SMM_RELOCATION_LIB_H_ +#define SMM_RELOCATION_LIB_H_ + +#include + +/** + CPU SmmBase Relocation Init. + + This function is to relocate CPU SmmBase. + + @param[in] MpServices2Pointer to this instance of the MpServices. + + @retval EFI_SUCCESS CPU SmmBase Relocated successfully. + @retval OthersCPU SmmBase Relocation failed. + +**/ +EFI_STATUS +EFIAPI +SmmRelocationInit ( + IN EDKII_PEI_MP_SERVICES2_PPI *MpServices2 + ); + +#endif diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index f412ac0ce2..f86a6d2bcb 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -69,10 +69,13 @@ MmSaveStateLib|Include/Library/MmSaveStateLib.h ## @libraryclass Provides functions for SMM CPU Sync Operation. SmmCpuSyncLib|Include/Library/SmmCpuSyncLib.h + ## @libraryclass Provides functions for SMM Relocation Operation. + SmmRelocationLib|Include/Library/SmmRelocationLib.h + [LibraryClasses.RISCV64] ## @libraryclass Provides functions to manage MMU features on RISCV64 CPUs. ## RiscVMmuLib|Include/Library/BaseRiscVMmuLib.h -- 2.16.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118325): https://edk2.groups.io/g/devel/message/118325 Mute This Topic: https://groups.io/mt/105748912/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v4 00/14] Add SmmRelocationLib
PR: https://github.com/tianocore/edk2/pull/5546
Intel plans to separate the smbase relocation logic from
PiSmmCpuDxeSmm driver, and the related behavior will be
moved to the new interface defined by the SmmRelocationLib
class.
The SmmRelocationLib class provides the SmmRelocationInit()
interface for platform to do the smbase relocation, which
shall provide below 2 functionalities:
1. Relocate smbases for each processor.
2. Create the gSmmBaseHobGuid HOB.
With SmmRelocationLib, PiSmmCpuDxeSmm driver (which runs at
a later phase) can be simplfied as below for SMM init:
1. Consume the gSmmBaseHobGuid HOB for the relocated smbases
for each Processor.
2. Execute the early SMM Init.
Cc: Ray Ni
Cc: Zeng Star
Cc: Gerd Hoffmann
Cc: Rahul Kumar
Cc: Guo Dong
Cc: Sean Rhodes
Cc: James Lu
Cc: Gua Guo
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Abdul Lateef Attar
Cc: Abner Chang
Cc: Tom Lendacky
Signed-off-by: Jiaxin Wu
Jiaxin Wu (14):
UefiCpuPkg: Add SmmRelocationLib class
UefiCpuPkg/SmmRelocationLib: Add SmmRelocationLib library instance
UefiCpuPkg/SmmRelocationLib: Rename global variables
UefiCpuPkg/SmmRelocationLib: Avoid unnecessary memory allocation
UefiCpuPkg/SmmRelocationLib: Remove unnecessary global variable
UefiCpuPkg/SmmRelocationLib: Remove unnecessary CpuIndex
UefiCpuPkg/SmmRelocationLib: Add library instance for AMD
OvmfPkg/SmmRelocationLib: Add library instance for OVMF
OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid
OvmfPkg: Refine SmmAccess implementation
OvmfPkg/SmmCpuFeaturesLib: Check Smbase Relocation is done or not
OvmfPkg/PlatformPei: Relocate SmBases in PEI phase
UefiPayloadPkg/UefiPayloadPkg.dsc: Include SmmRelocationLib
UefiCpuPkg/PiSmmCpuDxeSmm: Remove SmBases relocation logic
OvmfPkg/AmdSev/AmdSevX64.dsc | 1 +
OvmfPkg/CloudHv/CloudHvX64.dsc | 1 +
OvmfPkg/Library/PlatformInitLib/MemDetect.c| 135 +++--
.../Library/PlatformInitLib/PlatformInitLib.inf| 6 +-
.../Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c | 33 +-
.../Library/SmmRelocationLib}/Ia32/Semaphore.c | 13 +-
.../Library/SmmRelocationLib}/Ia32/SmmInit.nasm| 83 +++-
.../SmmRelocationLib/InternalSmmRelocationLib.h| 127 +
.../Library/SmmRelocationLib/SmmRelocationLib.c| 549 +
.../Library/SmmRelocationLib/SmmRelocationLib.inf | 60 +++
.../SmmRelocationLib/SmramSaveStateConfig.c| 100
.../Library/SmmRelocationLib}/X64/Semaphore.c | 13 +-
.../Library/SmmRelocationLib}/X64/SmmInit.nasm | 85 +++-
OvmfPkg/Microvm/MicrovmX64.dsc | 1 +
OvmfPkg/OvmfPkgIa32.dsc| 1 +
OvmfPkg/OvmfPkgIa32X64.dsc | 1 +
OvmfPkg/OvmfPkgX64.dsc | 1 +
OvmfPkg/PlatformPei/Platform.c | 3 +
OvmfPkg/PlatformPei/Platform.h | 5 +
OvmfPkg/PlatformPei/PlatformPei.inf| 5 +-
OvmfPkg/PlatformPei/SmmRelocation.c| 80 +++
OvmfPkg/SmmAccess/SmmAccess2Dxe.c | 4 +-
OvmfPkg/SmmAccess/SmmAccess2Dxe.inf| 5 +
OvmfPkg/SmmAccess/SmmAccessPei.c | 116 ++---
OvmfPkg/SmmAccess/SmmAccessPei.inf | 11 +-
OvmfPkg/SmmAccess/SmramInternal.c | 72 +--
OvmfPkg/SmmAccess/SmramInternal.h | 19 +-
UefiCpuPkg/Include/Library/SmmRelocationLib.h | 42 ++
.../SmmRelocationLib/AmdSmmRelocationLib.inf | 60 +++
.../SmmRelocationLib/AmdSmramSaveStateConfig.c | 125 +
.../SmmRelocationLib}/Ia32/Semaphore.c | 13 +-
.../SmmRelocationLib}/Ia32/SmmInit.nasm| 83 +++-
.../SmmRelocationLib/InternalSmmRelocationLib.h| 127 +
.../Library/SmmRelocationLib/SmmRelocationLib.c| 549 +
.../Library/SmmRelocationLib/SmmRelocationLib.inf | 61 +++
.../SmmRelocationLib/SmramSaveStateConfig.c| 136 +
.../SmmRelocationLib}/X64/Semaphore.c | 13 +-
.../SmmRelocationLib}/X64/SmmInit.nasm | 85 +++-
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 21 +-
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 10 +-
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 334 ++---
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 103 +---
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 4 -
UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.h | 2 +-
UefiCpuPkg/PiSmmCpuDxeSmm/SmramSaveState.c | 69 ---
UefiCpuPkg/UefiCpuPkg.dec | 3 +
UefiCpuPkg/UefiCpuPkg.dsc | 2 +
UefiPayloadPkg/UefiPayloadPkg.dsc | 2 +
48 files changed, 2578 insertions(+), 796 deletions(-)
copy {UefiCpuPkg/PiSmmCpuDxeSmm =>
OvmfPkg/Library/SmmRelocationLib}/Ia32/Semaphore.c (71%)
copy {UefiCpuPkg/PiSmmCpuDxeSmm =>
回复: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard
Foster: There is CI failure in https://github.com/tianocore/edk2/pull/5585. Please resolve them first. Thanks Liming > -邮件原件- > 发件人: devel@edk2.groups.io 代表 gaoliming via > groups.io > 发送时间: 2024年4月23日 21:15 > 收件人: 'Nong, Foster' ; devel@edk2.groups.io; > 'Kinney, Michael D' ; 'Chris Li' > > 抄送: 'Ni, Ray' > 主题: 回复: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into > IndustryStandard > > Seemly, there is no other comments. I create PR > https://github.com/tianocore/edk2/pull/5585 to merge it. > > Thanks > Liming > > -邮件原件- > > 发件人: Nong, Foster > > 发送时间: 2024年4月23日 18:07 > > 收件人: gaoliming ; devel@edk2.groups.io; > > Kinney, Michael D ; 'Chris Li' > > > > 抄送: Ni, Ray > > 主题: RE: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into > > IndustryStandard > > > > Hi Liming, > > > > What is the patch review status? Can this patch be merged? > > > > -Original Message- > > From: Nong, Foster > > Sent: Wednesday, December 27, 2023 2:05 PM > > To: gaoliming ; devel@edk2.groups.io; Kinney, > > Michael D ; 'Chris Li' > > > > Cc: Ni, Ray > > Subject: RE: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into > > IndustryStandard > > > > Thanks Liming! > > @'Chris Li' and @Kinney, Michael D, please help comment the patch. > Thanks! > > > > -Original Message- > > From: gaoliming > > Sent: Tuesday, December 19, 2023 9:05 PM > > To: devel@edk2.groups.io; Nong, Foster ; Kinney, > > Michael D ; 'Chris Li' > > > > Cc: Ni, Ray > > Subject: 回复: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into > > IndustryStandard > > > > Foster: > > I have no comments for this patch. Acked-by: Liming Gao > > > > > > Thanks > > Liming > > > -邮件原件- > > > 发件人: devel@edk2.groups.io 代表 Nong, > > Foster > > > 发送时间: 2023年12月19日 18:17 > > > 收件人: devel@edk2.groups.io; Kinney, Michael D > > > ; Gao, Liming > ; > > > Chris Li > > > 抄送: Ni, Ray > > > 主题: Re: [edk2-devel] [PATCH v1] MdePkg: Add Cxl30.h into > > > IndustryStandard > > > > > > @Gao, Liming @Chris Li @Kinney, Michael D, > > > > > > Don't forget reviewing the patch. Thanks! > > > > > > -Original Message- > > > From: Nong, Foster > > > Sent: Wednesday, November 29, 2023 2:57 PM > > > To: devel@edk2.groups.io > > > Cc: Nong, Foster ; Kinney, Michael D > > > ; Gao, Liming > ; > > > Ni, Ray ; Chris Li > > > Subject: [PATCH v1] MdePkg: Add Cxl30.h into IndustryStandard > > > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4516 > > > > > > 1) Add CXL 3.0 header file to comply with CXL 3.0 specification > > > 2) CXL 3.0 header will embed Cxl20.h > > > 3) Updated Cxl.h to point to 3.0 header file > > > > > > Signed-off-by: Foster Nong > > > Cc: Michael D Kinney > > > Cc: Liming Gao > > > Cc: Ray Ni > > > Cc: Chris Li > > > --- > > > MdePkg/Include/IndustryStandard/Cxl.h | 2 +- > > > MdePkg/Include/IndustryStandard/Cxl30.h | 315 > > > > > 2 files changed, 316 insertions(+), 1 deletion(-) > > > > > > diff --git a/MdePkg/Include/IndustryStandard/Cxl.h > > > b/MdePkg/Include/IndustryStandard/Cxl.h > > > index 9ad3242e25..cb623a355d 100755 > > > --- a/MdePkg/Include/IndustryStandard/Cxl.h > > > +++ b/MdePkg/Include/IndustryStandard/Cxl.h > > > @@ -12,7 +12,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > #ifndef > > > _CXL_MAIN_H_ #define _CXL_MAIN_H_ -#include > > > +#include // // > > > CXL assigned new Vendor ID //diff --git > > > a/MdePkg/Include/IndustryStandard/Cxl30.h > > > b/MdePkg/Include/IndustryStandard/Cxl30.h > > > new file mode 100644 > > > index 00..feb6b9c52f > > > --- /dev/null > > > +++ b/MdePkg/Include/IndustryStandard/Cxl30.h > > > @@ -0,0 +1,315 @@ > > > +/** @file+ CXL 3.0 Register definitions++ This file contains the > > register > > > definitions based on the Compute Express Link+ (CXL) Specification > > Revision > > > 3.0.++ Copyright (c) 2023, Intel Corporation. All rights > > > reserved.++ > > > SPDX-License-Identifier: BSD-2-Clause-Patent++**/+#ifndef > > > CXL30_H_+#define CXL30_H_++#include > > ++//+// > > > CXL Cache Memory Capability IDs+// Compute Express Link Specification > > > Revision 3.0 - Chapter 8.2.4 Table 8-22+//+#define > > > CXL_CACHE_MEM_CAPABILITY_ID_TIMEOUT_AND_ISOLATION > > > 0x0009+#define CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED > > > 0x000A+#define CXL_CACHE_MEM_CAPABILITY_ID_BI_ROUTE_TABLE > > > 0x000B+#define CXL_CACHE_MEM_CAPABILITY_ID_BI_DECODER > > > 0x000C+#define > > > CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_ROUTE_TABLE > > > 0x000D+#define > CXL_CACHE_MEM_CAPABILITY_ID_CACHE_ID_DECODER > > > 0x000E+#define > > > CXL_CACHE_MEM_CAPABILITY_ID_EXTENDED_HDM_DECODER > > > 0x000F++//+// CXL_Capability_Version+// Compute Express ink > > > 0x000F++Specification > > > Revision 3.0 - Chapter 8.2.4.5+//+#define > > CXL_HDM_DECODER_VERSION_30 > > > 0x3++//+// CXL CXL HDM Decoder n Control+// Compute Express Link > > > Specification Revision 3.0 - 8.2.4.19.7+//+//+// Bit4..7: Interleave > > > Ways (IW)+//+#define CXL_HDM_16_WAY_INTERLEAVING > > >
[edk2-devel] 回复: [EXTERNAL] 回复: [PATCH 0/7] General Updates based on UEFI 2.10 and PI 1.8 Specification
Felix and Sachin: I don't find PI_SPECIFICATION_MINOR_REVISION definition from the latest public PI 1.8A. So, this change may not be added now. Thanks Liming > -邮件原件- > 发件人: Sachin Ganesh > 发送时间: 2024年4月25日 17:57 > 收件人: Felix Polyudov ; gaoliming > ; devel@edk2.groups.io > 抄送: zhiguang@intel.com; michael.d.kin...@intel.com; > ardb+tianoc...@kernel.org; kra...@redhat.com; jiewen@intel.com; > erdemak...@google.com; min.m...@intel.com; thomas.lenda...@amd.com; > Dhanaraj V > 主题: RE: [EXTERNAL] 回复: [PATCH 0/7] General Updates based on UEFI > 2.10 and PI 1.8 Specification > > Hi Felix/ Liming, > > Thank you for your comments. Patch 6 has been updated to only focus on > consolidating the revision macros. > > Patch Link: > https://edk2.groups.io/g/devel/message/118246?p=%2C%2C%2C20%2C0%2 > C0%2C0%3A%3Arecentpostdate%2Fsticky%2C%2Csachin%2C20%2C2%2C0% > 2C105721897 > PR Link: https://github.com/tianocore/edk2/pull/5569 > > Thank you, > Sachin. > > -Original Message- > From: Felix Polyudov > Sent: Tuesday, April 23, 2024 10:58 PM > To: gaoliming ; Sachin Ganesh > ; devel@edk2.groups.io > Cc: zhiguang@intel.com; michael.d.kin...@intel.com; > ardb+tianoc...@kernel.org; kra...@redhat.com; jiewen@intel.com; > erdemak...@google.com; min.m...@intel.com; thomas.lenda...@amd.com; > Dhanaraj V > Subject: RE: [EXTERNAL] 回复: [PATCH 0/7] General Updates based on UEFI > 2.10 and PI 1.8 Specification > > I think patch 6 can be updated to introduce unified PI specification > versioning > macros without incrementing the minor revision, by changing > PI_SPECIFICATION_MINOR_REVISION back to 70. > This will ensure compliance with the versioning schema introduced in PI 1.7B > without changing the PI support level. > (the macros were introduced by PIWG mantis 2101) > > -Original Message- > From: gaoliming > Sent: Tuesday, April 23, 2024 10:49 AM > To: Sachin Ganesh ; devel@edk2.groups.io > Cc: zhiguang@intel.com; michael.d.kin...@intel.com; > ardb+tianoc...@kernel.org; kra...@redhat.com; jiewen@intel.com; > erdemak...@google.com; min.m...@intel.com; thomas.lenda...@amd.com; > Felix Polyudov ; Dhanaraj V > Subject: [EXTERNAL] 回复: [PATCH 0/7] General Updates based on UEFI 2.10 > and PI 1.8 Specification > > > **CAUTION: The e-mail below is from an external source. Please exercise > caution before opening attachments, clicking links, or following guidance.** > > Except for Patch 6/7, others are good to me. Reviewed-by: Liming Gao > > > I suggest to merge others first. The patch 6/7 to update PI version from 1.7 > to > 1.8 can be discussed first. > > Thanks > Liming > > -邮件原件- > > 发件人: Sachin Ganesh > > 发送时间: 2024年4月20日 5:46 > > 收件人: devel@edk2.groups.io > > 抄送: gaolim...@byosoft.com.cn; zhiguang@intel.com; > > michael.d.kin...@intel.com; ardb+tianoc...@kernel.org; > > kra...@redhat.com; jiewen@intel.com; erdemak...@google.com; > > min.m...@intel.com; thomas.lenda...@amd.com; Felix Polyudov > > ; Dhanaraj V ; Sachin Ganesh > > > > 主题: [PATCH 0/7] General Updates based on UEFI 2.10 and PI 1.8 > > Specification > > > > This series of patches are for general updates to MdePkg and > > MdeModulePkg based on UEFI 2.10 and PI 1.8 Specifications > > > > Sachin Ganesh (7): > > MdePkg: Add definition for NVMe Over Fabric Device Path > > MdePkg: Add new Resource Attributes defined in PI 1.8 Spec > > MdePkg: Define Unaccepted Memory Type > > MdeModulePkg: Use newly defined Unaccepted Memory Type > > MdePkg: Update Delayed Dispatch PPI as per PI 1.8 Spec > > MdePkg: Update to PI 1.8 Revision > > OvmfPkg: Use newly defined Unaccepted Memory Type > > > > MdeModulePkg/Core/Dxe/Gcd/Gcd.c | 10 +++--- > > MdeModulePkg/Core/Dxe/Mem/Page.c | 38 > > ++-- > > MdeModulePkg/Include/Pi/PrePiDxeCis.h| 25 - > > MdeModulePkg/Include/Pi/PrePiHob.h | 20 --- > > MdePkg/Include/Pi/PiDxeCis.h | 19 +- > > MdePkg/Include/Pi/PiHob.h| 14 +++- > > MdePkg/Include/Pi/PiMmCis.h | 6 ++-- > > MdePkg/Include/Pi/PiMultiPhase.h | 6 > > MdePkg/Include/Pi/PiPeiCis.h | 6 ++-- > > MdePkg/Include/Pi/PiSmmCis.h | 2 +- > > MdePkg/Include/Ppi/DelayedDispatch.h | 24 - > > MdePkg/Include/Protocol/DevicePath.h | 22 > > OvmfPkg/AmdSevDxe/AmdSevDxe.c| 4 +-- > > OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c | 8 ++--- > > OvmfPkg/Library/PeilessStartupLib/Hob.c | 4 +-- > > OvmfPkg/Library/PlatformInitLib/IntelTdx.c | 8 ++--- > > OvmfPkg/PlatformPei/AmdSev.c | 4 +-- > > 17 files changed, 108 insertions(+), 112 deletions(-) delete mode > > 100644 MdeModulePkg/Include/Pi/PrePiDxeCis.h > > delete mode 100644 MdeModulePkg/Include/Pi/PrePiHob.h > > > > -- > > 2.24.1.windows.2 > > -The information contained
Re: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset endpoint while USB Transaction error
I have no access to push PR. But I tried with my personal fork, it can pass CI.
Thanks,
Xianglei
-Original Message-
From: gaoliming
Sent: Friday, April 26, 2024 4:44 PM
To: devel@edk2.groups.io; Cai, Xianglei
Cc: Ni, Ray ; Lewandowski, Krzysztof
; Huang, Jenny ; Shih,
More
Subject: 回复: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset endpoint
while USB Transaction error
Can you create PR for this patch? If it passes CI, I will add push label.
Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Xianglei Cai
> 发送时间: 2024年4月25日 17:58
> 收件人: gaoliming ; devel@edk2.groups.io
> 抄送: Ni, Ray ; Lewandowski, Krzysztof
> ; Huang, Jenny
> ; Shih, More
> 主题: Re: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset
> endpoint while USB Transaction error
>
> Hi @gaoliming
>
> Could you provide the eta when the patch can be merged?
>
> Thanks,
> Xianglei
>
> -Original Message-
> From: Cai, Xianglei
> Sent: Thursday, April 18, 2024 4:59 PM
> To: gaoliming ; devel@edk2.groups.io
> Cc: Ni, Ray ; Lewandowski, Krzysztof
> ; Huang, Jenny
> ; Shih, More
> Subject: RE: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset
> endpoint while USB Transaction error
>
> Hi Liming,
>
> Could you help pick the change to the master branch?
>
> Thanks,
> Xianglei
>
> -Original Message-
> From: gaoliming
> Sent: Monday, April 15, 2024 5:52 PM
> To: devel@edk2.groups.io; Cai, Xianglei
> Cc: Ni, Ray ; Lewandowski, Krzysztof
> ; Huang, Jenny
> ; Shih, More
> Subject: 回复: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset
> endpoint while USB Transaction error
>
> Reviewed-by: Liming Gao
>
> > -邮件原件-
> > 发件人: devel@edk2.groups.io 代表 Xianglei
> Cai
> > 发送时间: 2024年4月15日 14:55
> > 收件人: devel@edk2.groups.io
> > 抄送: Xianglei Cai ; Ray Ni
> > ; Liming Gao ; Krzysztof
> > Lewandowski ; Jenny Huang
> > ; More Shih
> > 主题: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset
> endpoint
> > while USB Transaction error
> >
> > https://bugzilla.tianocore.org/show_bug.cgi?id=4556
> >
> > Based on XHCI spec 4.8.3, software should do the reset endpoint
> > while USB Transaction occur.
> > Add the error code for USB Transaction error since UEFI spec don't
> > have the related definition.
> >
> > Cc: Ray Ni
> > Cc: Liming Gao
> > Cc: Krzysztof Lewandowski
> > Cc: Jenny Huang
> > Cc: More Shih
> > Signed-off-by: Xianglei Cai
> > Reviewed-by: Krzysztof Lewandowski
> > ---
> > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 5 -
> > MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 5 -
> > MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h | 7 +++
> > 3 files changed, 15 insertions(+), 2 deletions(-)
> >
> > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
> > b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
> > index f4e61d223c1b..cf6b32959e68 100644
> > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
> > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
> > @@ -825,7 +825,10 @@ XhcTransfer (
> >*TransferResult = Urb->Result;
> >*DataLength = Urb->Completed;
> >
> > - if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult ==
> > EFI_USB_ERR_BABBLE)) {
> > + //
> > + // Based on XHCI spec 4.8.3, software should do the reset
> > + endpoint
> while
> > USB Transaction occur.
> > + //
> > + if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult ==
> > EFI_USB_ERR_BABBLE) || (*TransferResult ==
> > EDKII_USB_ERR_TRANSACTION)) {
> > ASSERT (Status == EFI_DEVICE_ERROR);
> > RecoveryStatus = XhcRecoverHaltedEndpoint (Xhc, Urb);
> > if (EFI_ERROR (RecoveryStatus)) { diff --git
> > a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> > index 5d735008ba31..a97ed44dbfc3 100644
> > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> > @@ -1192,8 +1192,11 @@ XhcCheckUrbResult (
> > DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: ERR_BUFFER!
> > Completecode = %x\n", EvtTrb->Completecode));
> > goto EXIT;
> >
> > + //
> > + // Based on XHCI spec 4.8.3, software should do the reset
> > + endpoint
> > while USB Transaction occur.
> > + //
> >case TRB_COMPLETION_USB_TRANSACTION_ERROR:
> > -CheckedUrb->Result |= EFI_USB_ERR_TIMEOUT;
> > +CheckedUrb->Result |= EDKII_USB_ERR_TRANSACTION;
> > CheckedUrb->Finished = TRUE;
> > DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult:
> > TRANSACTION_ERROR! Completecode = %x\n", EvtTrb->Completecode));
> > goto EXIT;
> > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
> > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
> > index 7c85f7993b5c..e606e212a1d3 100644
> > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
> > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
> > @@ -78,6 +78,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > #define TRB_COMPLETION_STOPPED 26
> > #define
回复: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset endpoint while USB Transaction error
Can you create PR for this patch? If it passes CI, I will add push label.
Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Xianglei Cai
> 发送时间: 2024年4月25日 17:58
> 收件人: gaoliming ; devel@edk2.groups.io
> 抄送: Ni, Ray ; Lewandowski, Krzysztof
> ; Huang, Jenny ;
> Shih, More
> 主题: Re: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset
> endpoint while USB Transaction error
>
> Hi @gaoliming
>
> Could you provide the eta when the patch can be merged?
>
> Thanks,
> Xianglei
>
> -Original Message-
> From: Cai, Xianglei
> Sent: Thursday, April 18, 2024 4:59 PM
> To: gaoliming ; devel@edk2.groups.io
> Cc: Ni, Ray ; Lewandowski, Krzysztof
> ; Huang, Jenny ;
> Shih, More
> Subject: RE: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset
> endpoint while USB Transaction error
>
> Hi Liming,
>
> Could you help pick the change to the master branch?
>
> Thanks,
> Xianglei
>
> -Original Message-
> From: gaoliming
> Sent: Monday, April 15, 2024 5:52 PM
> To: devel@edk2.groups.io; Cai, Xianglei
> Cc: Ni, Ray ; Lewandowski, Krzysztof
> ; Huang, Jenny ;
> Shih, More
> Subject: 回复: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset
> endpoint while USB Transaction error
>
> Reviewed-by: Liming Gao
>
> > -邮件原件-
> > 发件人: devel@edk2.groups.io 代表 Xianglei
> Cai
> > 发送时间: 2024年4月15日 14:55
> > 收件人: devel@edk2.groups.io
> > 抄送: Xianglei Cai ; Ray Ni ;
> > Liming Gao ; Krzysztof Lewandowski
> > ; Jenny Huang
> > ; More Shih
> > 主题: [edk2-devel] [PATCH V2 1/1] MdeModulePkg/XhciDxe: Reset
> endpoint
> > while USB Transaction error
> >
> > https://bugzilla.tianocore.org/show_bug.cgi?id=4556
> >
> > Based on XHCI spec 4.8.3, software should do the reset endpoint while
> > USB Transaction occur.
> > Add the error code for USB Transaction error since UEFI spec don't
> > have the related definition.
> >
> > Cc: Ray Ni
> > Cc: Liming Gao
> > Cc: Krzysztof Lewandowski
> > Cc: Jenny Huang
> > Cc: More Shih
> > Signed-off-by: Xianglei Cai
> > Reviewed-by: Krzysztof Lewandowski
> > ---
> > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 5 -
> > MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 5 -
> > MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h | 7 +++
> > 3 files changed, 15 insertions(+), 2 deletions(-)
> >
> > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
> > b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
> > index f4e61d223c1b..cf6b32959e68 100644
> > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
> > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
> > @@ -825,7 +825,10 @@ XhcTransfer (
> >*TransferResult = Urb->Result;
> >*DataLength = Urb->Completed;
> >
> > - if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult ==
> > EFI_USB_ERR_BABBLE)) {
> > + //
> > + // Based on XHCI spec 4.8.3, software should do the reset endpoint
> while
> > USB Transaction occur.
> > + //
> > + if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult ==
> > EFI_USB_ERR_BABBLE) || (*TransferResult ==
> > EDKII_USB_ERR_TRANSACTION)) {
> > ASSERT (Status == EFI_DEVICE_ERROR);
> > RecoveryStatus = XhcRecoverHaltedEndpoint (Xhc, Urb);
> > if (EFI_ERROR (RecoveryStatus)) { diff --git
> > a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> > index 5d735008ba31..a97ed44dbfc3 100644
> > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c
> > @@ -1192,8 +1192,11 @@ XhcCheckUrbResult (
> > DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult: ERR_BUFFER!
> > Completecode = %x\n", EvtTrb->Completecode));
> > goto EXIT;
> >
> > + //
> > + // Based on XHCI spec 4.8.3, software should do the reset
> > + endpoint
> > while USB Transaction occur.
> > + //
> >case TRB_COMPLETION_USB_TRANSACTION_ERROR:
> > -CheckedUrb->Result |= EFI_USB_ERR_TIMEOUT;
> > +CheckedUrb->Result |= EDKII_USB_ERR_TRANSACTION;
> > CheckedUrb->Finished = TRUE;
> > DEBUG ((DEBUG_ERROR, "XhcCheckUrbResult:
> > TRANSACTION_ERROR! Completecode = %x\n", EvtTrb->Completecode));
> > goto EXIT;
> > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
> > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
> > index 7c85f7993b5c..e606e212a1d3 100644
> > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
> > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h
> > @@ -78,6 +78,13 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > #define TRB_COMPLETION_STOPPED 26
> > #define TRB_COMPLETION_STOPPED_LENGTH_INVALID 27
> >
> > +//
> > +// USB Transfer Results Internal Definition // Based on XHCI spec
> > +4.8.3, software should do the reset endpoint while
> > USB Transaction occur.
> > +// Add the error code for USB Transaction error since UEFI spec don't
> have
> > the related definition.
> > +//
> > +#define EDKII_USB_ERR_TRANSACTION 0x200
> > +
> > //
> > // The topology string used to
[edk2-devel] [PATCH v4 8/8] OvmfPkg: Remove QemuFwCfgLibMmio.inf
All of platforms are switching to QemuFwCfgMmioDxeLib.inf, remove QemuFwCfgLibMmio.inf now. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755 Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Gerd Hoffmann Signed-off-by: Chao Li --- .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 54 --- 1 file changed, 54 deletions(-) delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf deleted file mode 100644 index 633053aaed..00 --- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf +++ /dev/null @@ -1,54 +0,0 @@ -## @file -# -# Stateful, implicitly initialized fw_cfg library. -# -# Copyright (C) 2013 - 2014, Red Hat, Inc. -# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved. -# Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved. -# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION= 0x00010005 - BASE_NAME = QemuFwCfgLib - FILE_GUID = B271F41F-B841-48A9-BA8D-545B4BC2E2BF - MODULE_TYPE= BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER - - CONSTRUCTOR= QemuFwCfgInitialize - -# -# The following information is for reference only and not required by the build -# tools. -# -# VALID_ARCHITECTURES = ARM AARCH64 RISCV64 LOONGARCH64 -# - -[Sources] - QemuFwCfgLibMmio.c - QemuFwCfgMmioDxe.c - -[Packages] - MdePkg/MdePkg.dec - OvmfPkg/OvmfPkg.dec - EmbeddedPkg/EmbeddedPkg.dec - -[LibraryClasses] - BaseLib - BaseMemoryLib - DebugLib - HobLib - IoLib - UefiBootServicesTableLib - -[Protocols] - gFdtClientProtocolGuid## CONSUMES - -[Guids] - gQemuFirmwareResourceHobGuid - -[Depex] - gFdtClientProtocolGuid -- 2.27.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118319): https://edk2.groups.io/g/devel/message/118319 Mute This Topic: https://groups.io/mt/105746799/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v4 7/8] OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
Enable QemuFwCfgMmioDxeLib.inf in RiscVVirtQemu.dsc Build-tested only (with "RiscVVirtQemu.dsc"). BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755 Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Gerd Hoffmann Cc: Sunil V L Cc: Andrei Warkentin Signed-off-by: Chao Li --- OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc index 27f24648e8..e0ed6fb9bc 100644 --- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc +++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc @@ -78,7 +78,7 @@ [LibraryClasses.common] # Virtio Support VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf - QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf -- 2.27.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118318): https://edk2.groups.io/g/devel/message/118318 Mute This Topic: https://groups.io/mt/105746798/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v4 6/8] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
Enable QemuFwCfgMmioDxeLib.inf in ArmVirtQemu.dsc and ArmVirtQemuKernel.dsc. Build-tested only (with "ArmVirtQemu.dsc"). BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755 Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Gerd Hoffmann Cc: Leif Lindholm Cc: Sami Mujawar Signed-off-by: Chao Li --- ArmVirtPkg/ArmVirtQemu.dsc | 2 +- ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc index f6f7835955..7e2ff33ad1 100644 --- a/ArmVirtPkg/ArmVirtQemu.dsc +++ b/ArmVirtPkg/ArmVirtQemu.dsc @@ -60,7 +60,7 @@ [LibraryClasses.common] # Virtio Support VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf - QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc index 668a65ba64..efe2df97bd 100644 --- a/ArmVirtPkg/ArmVirtQemuKernel.dsc +++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc @@ -57,7 +57,7 @@ [LibraryClasses.common] # Virtio Support VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf - QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf + QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf -- 2.27.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118317): https://edk2.groups.io/g/devel/message/118317 Mute This Topic: https://groups.io/mt/105746796/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v4 5/8] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
Copy QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf, QemuFwCfgLibMmio.inf will be deleted when all platforms switching is completed. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755 Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Gerd Hoffmann Signed-off-by: Chao Li --- .../QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf | 54 +++ 1 file changed, 54 insertions(+) create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf new file mode 100644 index 00..633053aaed --- /dev/null +++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf @@ -0,0 +1,54 @@ +## @file +# +# Stateful, implicitly initialized fw_cfg library. +# +# Copyright (C) 2013 - 2014, Red Hat, Inc. +# Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved. +# Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION= 0x00010005 + BASE_NAME = QemuFwCfgLib + FILE_GUID = B271F41F-B841-48A9-BA8D-545B4BC2E2BF + MODULE_TYPE= BASE + VERSION_STRING = 1.0 + LIBRARY_CLASS = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER + + CONSTRUCTOR= QemuFwCfgInitialize + +# +# The following information is for reference only and not required by the build +# tools. +# +# VALID_ARCHITECTURES = ARM AARCH64 RISCV64 LOONGARCH64 +# + +[Sources] + QemuFwCfgLibMmio.c + QemuFwCfgMmioDxe.c + +[Packages] + MdePkg/MdePkg.dec + OvmfPkg/OvmfPkg.dec + EmbeddedPkg/EmbeddedPkg.dec + +[LibraryClasses] + BaseLib + BaseMemoryLib + DebugLib + HobLib + IoLib + UefiBootServicesTableLib + +[Protocols] + gFdtClientProtocolGuid## CONSUMES + +[Guids] + gQemuFirmwareResourceHobGuid + +[Depex] + gFdtClientProtocolGuid -- 2.27.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#118316): https://edk2.groups.io/g/devel/message/118316 Mute This Topic: https://groups.io/mt/105746794/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v4 4/8] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Co-authored-by: Xianglai Li
Signed-off-by: Chao Li
---
.../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c | 235 ++
.../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf | 52
2 files changed, 287 insertions(+)
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..055148de8e
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,235 @@
+/** @file
+
+ Stateful and implicitly initialized fw_cfg library implementation.
+
+ Copyright (C) 2013 - 2014, Red Hat, Inc.
+ Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+ (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+ Copyright (c) 2024 Loongson Technology Corporation Limited. All rights
reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+/**
+ To get firmware configure selector address.
+
+ @param VOID
+
+ @retval firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+ VOID
+ )
+{
+ QEMU_FW_CFG_RESOURCE *FwCfgResource;
+
+ FwCfgResource = QemuGetFwCfgResourceHob ();
+ ASSERT (FwCfgResource != NULL);
+
+ return FwCfgResource->FwCfgSelectorAddress;
+}
+
+/**
+ To get firmware configure Data address.
+
+ @param VOID
+
+ @retval firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+ VOID
+ )
+{
+ QEMU_FW_CFG_RESOURCE *FwCfgResource;
+
+ FwCfgResource = QemuGetFwCfgResourceHob ();
+ ASSERT (FwCfgResource != NULL);
+
+ return FwCfgResource->FwCfgDataAddress;
+}
+
+/**
+ To get firmware DMA address.
+
+ @param VOID
+
+ @retval firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+ VOID
+ )
+{
+ QEMU_FW_CFG_RESOURCE *FwCfgResource;
+
+ FwCfgResource = QemuGetFwCfgResourceHob ();
+ ASSERT (FwCfgResource != NULL);
+
+ return FwCfgResource->FwCfgDmaAddress;
+}
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+ VOID
+ )
+{
+ VOID *DeviceTreeBase;
+ INT32 Node;
+ INT32 Prev;
+ CONST CHAR8 *Type;
+ INT32 Len;
+ CONST UINT64 *Reg;
+ UINT64FwCfgSelectorAddress;
+ UINT64FwCfgSelectorSize;
+ UINT64FwCfgDataAddress;
+ UINT64FwCfgDataSize;
+ UINT64FwCfgDmaAddress;
+ UINT64FwCfgDmaSize;
+ QEMU_FW_CFG_RESOURCE *FwCfgResource;
+ VOID *Buffer;
+
+ //
+ // Check whether the Qemu firmware configure resources HOB has been created,
+ // if so use the resources in the HOB.
+ //
+ FwCfgResource = QemuGetFwCfgResourceHob ();
+ if (FwCfgResource != NULL) {
+return RETURN_SUCCESS;
+ }
+
+ DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+ ASSERT (DeviceTreeBase != NULL);
+ //
+ // Make sure we have a valid device tree blob
+ //
+ ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+ //
+ // Create resouce memory
+ //
+ Buffer = AllocatePages(EFI_SIZE_TO_PAGES (sizeof (QEMU_FW_CFG_RESOURCE)));
+ ASSERT (Buffer != NULL);
+ ZeroMem (Buffer, sizeof (QEMU_FW_CFG_RESOURCE));
+
+ FwCfgResource = (QEMU_FW_CFG_RESOURCE *)Buffer;
+
+ for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+ break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", );
+if ((Type) &&
+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+ //
+ // Get the 'reg' property of this node. For now, we will assume
+ // two 8 byte quantities for base and size, respectively.
+ //
+ Reg = fdt_getprop (DeviceTreeBase, Node, "reg", );
+ if ((Reg != 0) && (Len == (2 * sizeof (UINT64 {
+FwCfgDataAddress = SwapBytes64 (Reg[0]);
+FwCfgDataSize= 8;
+FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+FwCfgSelectorSize= 2;
+
+//
+// The following ASSERT()s express
+//
+// Address + Size - 1 <= MAX_UINTN
+//
+// for both registers, that is, that the last byte in each MMIO range
is
+// expressible as a MAX_UINTN. The form below is mathematically
+// equivalent, and it also prevents any unsigned overflow before the
+// comparison.
+//
+ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
+
[edk2-devel] [PATCH v4 3/8] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.
Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Sunil V L
Cc: Andrei Warkentin
Signed-off-by: Chao Li
---
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c | 71 --
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 5 +
.../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h | 71 +-
.../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c | 97 ---
4 files changed, 217 insertions(+), 27 deletions(-)
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 2a2f3e67ac..4da7890fc1 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -3,15 +3,21 @@
Copyright (C) 2013 - 2014, Red Hat, Inc.
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
(C) Copyright 2021 Hewlett Packard Enterprise Development LP
+ Copyright (c) 2024 Loongson Technology Corporation Limited. All rights
reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+#include
#include
+#include
+#include
+
#include
#include
#include
+#include
#include
#include
#include
@@ -27,6 +33,51 @@ READ_BYTES_FUNCTION *InternalQemuFwCfgReadBytes =
MmioReadBytes;
WRITE_BYTES_FUNCTION *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
SKIP_BYTES_FUNCTION *InternalQemuFwCfgSkipBytes = MmioSkipBytes;
+
+/**
+ Build firmware configure resource HOB.
+
+ @param[in] FwCfgResource A pointer to firmware configure resource.
+
+ @retval VOID
+**/
+VOID
+QemuBuildFwCfgResourceHob (
+ IN QEMU_FW_CFG_RESOURCE *FwCfgResource
+ )
+{
+ BuildGuidDataHob (
+,
+(VOID *)FwCfgResource,
+sizeof (QEMU_FW_CFG_RESOURCE)
+);
+}
+
+/**
+ Get firmware configure resource in HOB.
+
+ @param VOID
+
+ @retval non-NULL The firmware configure resource in HOB.
+ NULL The firmware configure resource not found.
+**/
+QEMU_FW_CFG_RESOURCE *
+QemuGetFwCfgResourceHob (
+ VOID
+ )
+{
+ EFI_HOB_GUID_TYPE *GuidHob;
+
+ GuidHob = NULL;
+
+ GuidHob = GetFirstGuidHob ();
+ if (GuidHob == NULL) {
+return NULL;
+ }
+
+ return (QEMU_FW_CFG_RESOURCE *)GET_GUID_HOB_DATA (GuidHob);
+}
+
/**
Returns a boolean indicating if the firmware configuration interface
is available or not.
@@ -43,7 +94,7 @@ QemuFwCfgIsAvailable (
VOID
)
{
- return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+ return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 &&
QemuGetFwCfgDataAddress () != 0);
}
/**
@@ -62,7 +113,7 @@ QemuFwCfgSelectItem (
)
{
if (QemuFwCfgIsAvailable ()) {
-MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16
((UINT16)QemuFwCfgItem));
}
}
@@ -92,30 +143,30 @@ MmioReadBytes (
#if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined
(MDE_CPU_LOONGARCH64)
while (Ptr < End) {
-*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
+*(UINT64 *)Ptr = MmioRead64 (QemuGetFwCfgDataAddress ());
Ptr += 8;
}
if (Left & 4) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
Ptr += 4;
}
#else
while (Ptr < End) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
Ptr += 4;
}
#endif
if (Left & 2) {
-*(UINT16 *)Ptr = MmioRead16 (mFwCfgDataAddress);
+*(UINT16 *)Ptr = MmioRead16 (QemuGetFwCfgDataAddress ());
Ptr += 2;
}
if (Left & 1) {
-*Ptr = MmioRead8 (mFwCfgDataAddress);
+*Ptr = MmioRead8 (QemuGetFwCfgDataAddress ());
}
}
@@ -168,9 +219,9 @@ DmaTransferBytes (
// This will fire off the transfer.
//
#if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined
(MDE_CPU_LOONGARCH64)
- MmioWrite64 (mFwCfgDmaAddress, SwapBytes64 ((UINT64)));
+ MmioWrite64 (QemuGetFwCfgDmaAddress (), SwapBytes64 ((UINT64)));
#else
- MmioWrite32 ((UINT32)(mFwCfgDmaAddress + 4), SwapBytes32 ((UINT32)));
+ MmioWrite32 ((UINT32)(QemuGetFwCfgDmaAddress () + 4), SwapBytes32
((UINT32)));
#endif
//
@@ -239,7 +290,7 @@ MmioWriteBytes (
UINTN Idx;
for (Idx = 0; Idx < Size; ++Idx) {
-MmioWrite8 (mFwCfgDataAddress, ((UINT8 *)Buffer)[Idx]);
+MmioWrite8 (QemuGetFwCfgDataAddress (), ((UINT8 *)Buffer)[Idx]);
}
}
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
index b3017aef80..633053aaed 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++
[edk2-devel] [PATCH v4 2/8] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.
Some DXE stage variables became non-static in this patch, they will be
restored to static in the next patch.
Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Sunil V L
Cc: Andrei Warkentin
Signed-off-by: Chao Li
---
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c | 192 +-
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 3 +-
.../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h | 179
.../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c | 145 +
4 files changed, 333 insertions(+), 186 deletions(-)
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..2a2f3e67ac 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,7 +1,5 @@
/** @file
- Stateful and implicitly initialized fw_cfg library implementation.
-
Copyright (C) 2013 - 2014, Red Hat, Inc.
Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
(C) Copyright 2021 Hewlett Packard Enterprise Development LP
@@ -20,63 +18,14 @@
#include
-STATIC UINTN mFwCfgSelectorAddress;
-STATIC UINTN mFwCfgDataAddress;
-STATIC UINTN mFwCfgDmaAddress;
-
-/**
- Reads firmware configuration bytes into a buffer
-
- @param[in] SizeSize in bytes to read
- @param[in] Buffer Buffer to store data into (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
- IN UINTN Size,
- IN VOID *Buffer OPTIONAL
- );
-
-/**
- Writes bytes from a buffer to firmware configuration
-
- @param[in] SizeSize in bytes to write
- @param[in] Buffer Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
- IN UINTN Size,
- IN VOID *Buffer OPTIONAL
- );
-
-/**
- Skips bytes in firmware configuration
-
- @param[in] Size Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
- IN UINTN Size
- );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION DmaSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"
//
// These correspond to the implementation we detect at runtime.
//
-STATIC READ_BYTES_FUNCTION *InternalQemuFwCfgReadBytes = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION *InternalQemuFwCfgSkipBytes = MmioSkipBytes;
+READ_BYTES_FUNCTION *InternalQemuFwCfgReadBytes = MmioReadBytes;
+WRITE_BYTES_FUNCTION *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION *InternalQemuFwCfgSkipBytes = MmioSkipBytes;
/**
Returns a boolean indicating if the firmware configuration interface
@@ -97,126 +46,6 @@ QemuFwCfgIsAvailable (
return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
}
-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
- VOID
- )
-{
- EFI_STATUS Status;
- FDT_CLIENT_PROTOCOL *FdtClient;
- CONST UINT64 *Reg;
- UINT32 RegSize;
- UINTNAddressCells, SizeCells;
- UINT64 FwCfgSelectorAddress;
- UINT64 FwCfgSelectorSize;
- UINT64 FwCfgDataAddress;
- UINT64 FwCfgDataSize;
- UINT64 FwCfgDmaAddress;
- UINT64 FwCfgDmaSize;
-
- Status = gBS->LocateProtocol (
- ,
- NULL,
- (VOID **)
- );
- ASSERT_EFI_ERROR (Status);
-
- Status = FdtClient->FindCompatibleNodeReg (
-FdtClient,
-"qemu,fw-cfg-mmio",
-(CONST VOID **),
-,
-,
-
-);
- if (EFI_ERROR (Status)) {
-DEBUG ((
- DEBUG_WARN,
- "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
- __func__,
- Status
- ));
-return EFI_SUCCESS;
- }
-
- ASSERT (AddressCells == 2);
- ASSERT (SizeCells == 2);
- ASSERT (RegSize == 2 * sizeof (UINT64));
-
- FwCfgDataAddress = SwapBytes64 (Reg[0]);
- FwCfgDataSize= 8;
- FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
- FwCfgSelectorSize= 2;
-
- //
- // The following ASSERT()s express
- //
-
[edk2-devel] [PATCH v4 1/8] OvmfPkg: Add a GUID for QemuFwCfgLib
Added a new GUID for QemuFwCfgLib MMIO version, called
gQemuFirmwareResourceHobGuid, which is used to save QEMU firmware
configure resource during PEI stage.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Signed-off-by: Chao Li
---
OvmfPkg/OvmfPkg.dec | 1 +
1 file changed, 1 insertion(+)
diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 2f7bded926..731f67b727 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -167,6 +167,7 @@ [Guids]
gUefiOvmfPkgTdxAcpiHobGuid= {0x6a0c5870, 0xd4ed, 0x44f4, {0xa1,
0x35, 0xdd, 0x23, 0x8b, 0x6f, 0x0c, 0x8d}}
gEfiNonCcFvGuid = {0xae047c6d, 0xbce9, 0x426c, {0xae,
0x03, 0xa6, 0x8e, 0x3b, 0x8a, 0x04, 0x88}}
gOvmfVariableGuid = {0x50bea1e5, 0xa2c5, 0x46e9, {0x9b,
0x3a, 0x59, 0x59, 0x65, 0x16, 0xb0, 0x0a}}
+ gQemuFirmwareResourceHobGuid = {0x3cc47b04, 0x0d3e, 0xaa64, {0x06,
0xa6, 0x4b, 0xdc, 0x9a, 0x2c, 0x61, 0x19}}
[Ppis]
# PPI whose presence in the PPI database signals that the TPM base address
--
2.27.0
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[edk2-devel] [PATCH v4 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage
Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.
V1 -> V2:
1. Use HOBs instead of PCD.
2. The old patch2 is divided into two parts, one is code splitting, and
the other is functional changes.
3. add two patches to keep the safe when change the platform DSC file.
V2 -> V3:
1. Merge three HOBs into a single HOB.
2. Remove the dynamic global variables in PEI.
V3 -> V4:
1. Adjust the HOB content, this version saves all of structual contents
in HOB.
2. Remove the Loongson copyright in separation patch, and add it in the
funciton change patch.
3. Restored some variables as static in DXE version.
4. Added the HOB GUID in OvmfPkg.dec.
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
PR: https://github.com/tianocore/edk2/pull/5568
Cc: Ard Biesheuvel
Cc: Jiewen Yao
Cc: Gerd Hoffmann
Cc: Leif Lindholm
Cc: Sami Mujawar
Cc: Sunil V L
Cc: Andrei Warkentin
Chao Li (8):
OvmfPkg: Add a GUID for QemuFwCfgLib
OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
OvmfPkg: Remove QemuFwCfgLibMmio.inf
ArmVirtPkg/ArmVirtQemu.dsc| 2 +-
ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
.../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c | 243 +
.../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h | 244 ++
.../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c | 214 +++
...CfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf} | 8 +-
.../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c | 235 +
.../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf | 52
OvmfPkg/OvmfPkg.dec | 1 +
OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +-
10 files changed, 814 insertions(+), 189 deletions(-)
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf =>
QemuFwCfgMmioDxeLib.inf} (78%)
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf
--
2.27.0
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Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib
Thanks,
Ray
From: Gerd Hoffmann
Sent: Thursday, April 25, 2024 14:58
To: Ni, Ray
Cc: Wu, Jiaxin ; devel@edk2.groups.io
; Zeng, Star ; Kumar, Rahul R
; Dong, Guo ; Rhodes, Sean
; Lu, James ; Guo, Gua
; Ard Biesheuvel ; Yao, Jiewen
; Abdul Lateef Attar ; Abner
Chang ; Tom Lendacky
Subject: Re: [edk2-devel] [PATCH v3 00/13] Add SmmRelocationLib
Hi,
> That means the SMMRevId is 0_xx64h for AMD64 processor. But I am not
> sure what the value is for AMD32 processor. Maybe 0 according to the
> OVMF logic.
The smm emulation in the linux kernel uses 0 and 0x64.
[Ray] OK. that supports the OVMF instance's logic. But I'd like Tom or any
other AMD guys to provide spec that says 0 for AMD32.
> But, I am very suspicious about the logic in AMD's version as below:
> --- AMD's version
> SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT;
>
> LMAValue = (UINT32)AsmReadMsr64 (EFER_ADDRESS) & LMA;
> if (LMAValue) {
> SmmSaveStateRegisterLma = (UINT8)EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT;
> }
> ---
> The above logic detects the current CPU mode and 64bit save state area layout
> is used if it's running in 64bit.
> But if a AMD64 CPU runs in 32bit mode, the above logic causes the
> 32bit save state area layout is used. It's not right! The save state
> area layout does not depend on the CPU running mode, but whether it's
> a legacy CPU or a 64-capable CPU.
Well, that is not entirely clear to me. Could it be 64-bit processors
support both 32-bit and 64-bit format, for backward compatibility
reasons?
[Ray] The CPU uses a fixed save state area layout no matter it runs in 32bit or
64bit.
The 64bit cpu only uses the 64bit format, no matter it runs in 32bit or 64bit.
So OvmfPkgIa32 builds could use the 32-bit format, OvmfPkgX64 builds use
the 64-bit format, everything works fine?
[Ray] For OVMF, it depends on how the virtual cpu is defined by QEMU
implementation.
If the underline CPU is a AMD64 cpu, the CPU supports running in 32bit or 64bit
modes. But no matter
it runs in 32bit or 64bit, the save state area layout always follows the 64bit
format.
The tricky corner case is OvmfPkgIa32X64, where (after applying this
series) 32-bit PEI should setup things for 64-bit SMM/DXE, and checking
the current processor mode will not give use the result we need.
> Jiaxin, I agree that the confusion should be cleaned up by AMD
> experts. Let's not change any existing behavior.
Agree. Tom?
take care,
Gerd
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