Re: [edk2-devel] [PATCH 1/3] MdePkg: Add TcgSp800155Event3 type info

2024-04-30 Thread Yao, Jiewen
I think it is confusing to add "TCG_Sp800_155_PlatformId_Event3" field for 
"TCG_Sp800_155_PlatformId_Event2" structure.

Maybe just create a new "TCG_Sp800_155_PlatformId_Event3" structure?



> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Dionna Glaze
> via groups.io
> Sent: Wednesday, May 1, 2024 8:53 AM
> To: devel@edk2.groups.io
> Cc: Dionna Glaze ; Kinney, Michael D
> ; Liming Gao ; Liu,
> Zhiguang 
> Subject: [edk2-devel] [PATCH 1/3] MdePkg: Add TcgSp800155Event3 type info
> 
> TCG PC Client Platform Firmware Profile 1.06 revision 52 of December
> 2023 added a new event signature and extended information about where a
> reference measurement document for the firmware can be found.
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Zhiguang Liu 
> 
> Signed-off-by: Dionna Glaze 
> ---
>  MdePkg/Include/IndustryStandard/UefiTcgPlatform.h | 12 +++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h
> b/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h
> index 61bd4e4667..30df8302b1 100644
> --- a/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h
> +++ b/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h
> @@ -451,6 +451,7 @@ typedef struct tdTCG_PCClientTaggedEvent {
> 
>  #define TCG_Sp800_155_PlatformId_Event_SIGNATURE   "SP800-155 Event"
>  #define TCG_Sp800_155_PlatformId_Event2_SIGNATURE  "SP800-155 Event2"
> +#define TCG_Sp800_155_PlatformId_Event3_SIGNATURE  "SP800-155 Event3"
> 
>  typedef struct tdTCG_Sp800_155_PlatformId_Event2 {
>UINT8   Signature[16];
> @@ -478,7 +479,16 @@ typedef struct tdTCG_Sp800_155_PlatformId_Event2 {
>// UINT8   
> FirmwareManufacturerStr[FirmwareManufacturerStrSize];
>// UINT32  FirmwareManufacturerId;
>// UINT8   FirmwareVersion;
> -  // UINT8   FirmwareVersion[FirmwareVersionSize]];
> +  // UINT8   FirmwareVersion[FirmwareVersionSize];
> +  //
> +  // Below structure is newly added in TCG_Sp800_155_PlatformId_Event3
> +  //
> +  // UINT32  RimLocatorType;
> +  // UINT32  RimLocatorLength;
> +  // UINT8   RimLocator[RimLocatorLength];
> +  // UINT32  PlatformCertLocatorType;
> +  // UINT32  PlatformCertLocatorLength;
> +  // UINT8   PlatformCertLocator[PlatformCertLocatorLength];
>  } TCG_Sp800_155_PlatformId_Event2;
> 
>  #define TCG_EfiStartupLocalityEvent_SIGNATURE  "StartupLocality"
> --
> 2.45.0.rc0.197.gbae5840b3b-goog
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH 0/3] TCG_Sp800_155_PlatformId_Event3 support

2024-04-30 Thread Yao, Jiewen
Reviewed-by: Jiewen Yao 

> -Original Message-
> From: Dionna Glaze 
> Sent: Wednesday, May 1, 2024 8:53 AM
> To: devel@edk2.groups.io
> Cc: Dionna Glaze ; Kinney, Michael D
> ; Liming Gao ; Liu,
> Zhiguang ; Yao, Jiewen ;
> Kumar, Rahul R ; Ard Biesheuvel
> ; Gerd Hoffmann 
> Subject: [PATCH 0/3] TCG_Sp800_155_PlatformId_Event3 support
> 
> In December 2023, the TCG published the PC Client Platform Firmware
> Profile version 1.06 revision 52. This revision includes a new event
> type for NIST SP 800-155 recommended signed BIOS reference measurements.
> The new type allows for the event log auditor to find local or remote
> copies of the signed reference measurements.
> 
> Supporting this new event type eases the process of distributing signed
> reference measurements since the machine can now simply report where
> they can be found in a standard way.
> 
> Cc: Michael D Kinney 
> Cc: Liming Gao 
> Cc: Zhiguang Liu 
> Cc: Jiewen Yao 
> Cc: Rahul Kumar 
> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> 
> 
> Dionna Glaze (3):
>   MdePkg: Add TcgSp800155Event3 type info
>   SecurityPkg: recognize sp800155Event3 event too
>   OvmfPkg: add sp800155Event3 support
> 
>  MdePkg/Include/IndustryStandard/UefiTcgPlatform.h | 12 +++-
>  OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c |  9 +++--
>  SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c |  9 +++--
>  3 files changed, 25 insertions(+), 5 deletions(-)
> 
> --
> 2.45.0.rc0.197.gbae5840b3b-goog


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[edk2-devel] [PATCH 3/3] OvmfPkg: add sp800155Event3 support

2024-04-30 Thread Dionna Glaze via groups.io
The signatures for event2 or event3 are now valid TCG SP800155 event
types.

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 

Signed-off-by: Dionna Glaze 
---
 OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c 
b/OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c
index 6ca29f5de0..d487f5c715 100644
--- a/OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c
+++ b/OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c
@@ -821,11 +821,16 @@ Is800155Event (
 {
   if TCG_PCR_EVENT2_HDR *)NewEventHdr)->EventType == EV_NO_ACTION) &&
   (NewEventSize >= sizeof (TCG_Sp800_155_PlatformId_Event2)) &&
-  (CompareMem (
+  ((CompareMem (
  NewEventData,
  TCG_Sp800_155_PlatformId_Event2_SIGNATURE,
  sizeof (TCG_Sp800_155_PlatformId_Event2_SIGNATURE) - 1
- ) == 0))
+ ) == 0) ||
+  (CompareMem (
+ NewEventData,
+ TCG_Sp800_155_PlatformId_Event3_SIGNATURE,
+ sizeof (TCG_Sp800_155_PlatformId_Event3_SIGNATURE) - 1
+ ) == 0
   {
 return TRUE;
   }
-- 
2.45.0.rc0.197.gbae5840b3b-goog



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[edk2-devel] [PATCH 2/3] SecurityPkg: recognize sp800155Event3 event too

2024-04-30 Thread Dionna Glaze via groups.io
The signatures for event2 or event3 are now valid TCG SP800155 event
types.

Cc: Jiewen Yao 
Cc: Rahul Kumar 

Signed-off-by: Dionna Glaze 
---
 SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c 
b/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c
index b8f50e25df..2f73237984 100644
--- a/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c
+++ b/SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c
@@ -812,11 +812,16 @@ Is800155Event (
 {
   if TCG_PCR_EVENT2_HDR *)NewEventHdr)->EventType == EV_NO_ACTION) &&
   (NewEventSize >= sizeof (TCG_Sp800_155_PlatformId_Event2)) &&
-  (CompareMem (
+  ((CompareMem (
  NewEventData,
  TCG_Sp800_155_PlatformId_Event2_SIGNATURE,
  sizeof (TCG_Sp800_155_PlatformId_Event2_SIGNATURE) - 1
- ) == 0))
+ ) == 0) ||
+   (CompareMem (
+ NewEventData,
+ TCG_Sp800_155_PlatformId_Event3_SIGNATURE,
+ sizeof (TCG_Sp800_155_PlatformId_Event3_SIGNATURE) - 1
+ ) == 0)))
   {
 return TRUE;
   }
-- 
2.45.0.rc0.197.gbae5840b3b-goog



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[edk2-devel] [PATCH 0/3] TCG_Sp800_155_PlatformId_Event3 support

2024-04-30 Thread Dionna Glaze via groups.io
In December 2023, the TCG published the PC Client Platform Firmware
Profile version 1.06 revision 52. This revision includes a new event
type for NIST SP 800-155 recommended signed BIOS reference measurements.
The new type allows for the event log auditor to find local or remote
copies of the signed reference measurements.

Supporting this new event type eases the process of distributing signed
reference measurements since the machine can now simply report where
they can be found in a standard way.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 
Cc: Jiewen Yao 
Cc: Rahul Kumar 
Cc: Ard Biesheuvel 
Cc: Gerd Hoffmann 


Dionna Glaze (3):
  MdePkg: Add TcgSp800155Event3 type info
  SecurityPkg: recognize sp800155Event3 event too
  OvmfPkg: add sp800155Event3 support

 MdePkg/Include/IndustryStandard/UefiTcgPlatform.h | 12 +++-
 OvmfPkg/Tcg/TdTcg2Dxe/TdTcg2Dxe.c |  9 +++--
 SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.c |  9 +++--
 3 files changed, 25 insertions(+), 5 deletions(-)

--
2.45.0.rc0.197.gbae5840b3b-goog


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[edk2-devel] [PATCH 1/3] MdePkg: Add TcgSp800155Event3 type info

2024-04-30 Thread Dionna Glaze via groups.io
TCG PC Client Platform Firmware Profile 1.06 revision 52 of December
2023 added a new event signature and extended information about where a
reference measurement document for the firmware can be found.

Cc: Michael D Kinney 
Cc: Liming Gao 
Cc: Zhiguang Liu 

Signed-off-by: Dionna Glaze 
---
 MdePkg/Include/IndustryStandard/UefiTcgPlatform.h | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h 
b/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h
index 61bd4e4667..30df8302b1 100644
--- a/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h
+++ b/MdePkg/Include/IndustryStandard/UefiTcgPlatform.h
@@ -451,6 +451,7 @@ typedef struct tdTCG_PCClientTaggedEvent {
 
 #define TCG_Sp800_155_PlatformId_Event_SIGNATURE   "SP800-155 Event"
 #define TCG_Sp800_155_PlatformId_Event2_SIGNATURE  "SP800-155 Event2"
+#define TCG_Sp800_155_PlatformId_Event3_SIGNATURE  "SP800-155 Event3"
 
 typedef struct tdTCG_Sp800_155_PlatformId_Event2 {
   UINT8   Signature[16];
@@ -478,7 +479,16 @@ typedef struct tdTCG_Sp800_155_PlatformId_Event2 {
   // UINT8   FirmwareManufacturerStr[FirmwareManufacturerStrSize];
   // UINT32  FirmwareManufacturerId;
   // UINT8   FirmwareVersion;
-  // UINT8   FirmwareVersion[FirmwareVersionSize]];
+  // UINT8   FirmwareVersion[FirmwareVersionSize];
+  //
+  // Below structure is newly added in TCG_Sp800_155_PlatformId_Event3
+  //
+  // UINT32  RimLocatorType;
+  // UINT32  RimLocatorLength;
+  // UINT8   RimLocator[RimLocatorLength];
+  // UINT32  PlatformCertLocatorType;
+  // UINT32  PlatformCertLocatorLength;
+  // UINT8   PlatformCertLocator[PlatformCertLocatorLength];
 } TCG_Sp800_155_PlatformId_Event2;
 
 #define TCG_EfiStartupLocalityEvent_SIGNATURE  "StartupLocality"
-- 
2.45.0.rc0.197.gbae5840b3b-goog



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Re: [edk2-devel] 回复: [PATCH 0/7] General Updates based on UEFI 2.10 and PI 1.8 Specification

2024-04-30 Thread Felix Polyudov via groups.io
Liming,

In PI 1.8 macros for major and minor versions have been replaced with a single 
revision macro combining both version elements.
Refer to:
PEI: 
https://uefi.org/specs/PI/1.8/V1_PEI_Services_Table.html#related-definitions
DXE: https://uefi.org/specs/PI/1.8/V2_UEFI_System_Table.html#dxe-services
MM: 
https://uefi.org/specs/PI/1.8/V4_Management_Mode_System_Table.html#efi-mm-system-table

If patch is updated to literally follow the spec, the following macros will be 
removed:
PEI_SPECIFICATION_MAJOR_REVISION
PEI_SPECIFICATION_MINOR_REVISION
DXE_SPECIFICATION_MAJOR_REVISION
DXE_SPECIFICATION_MINOR_REVISION
MM_SPECIFICATION_MAJOR_REVISION
MM_SPECIFICATION_MINOR_REVISION

These macros exist for a long time, so their removal can break some code in the 
downstream projects.
That's why we thought it would be safer to honor the spirit of the spec without 
following it literally.

Let us know if you want us to update the patch to match the spec.

-Original Message-
From: gaoliming 
Sent: Friday, April 26, 2024 5:23 AM
To: Sachin Ganesh ; Felix Polyudov ; 
devel@edk2.groups.io
Cc: zhiguang@intel.com; michael.d.kin...@intel.com; 
ardb+tianoc...@kernel.org; kra...@redhat.com; jiewen@intel.com; 
erdemak...@google.com; min.m...@intel.com; thomas.lenda...@amd.com; Dhanaraj V 

Subject: 回复: [EXTERNAL] 回复: [PATCH 0/7] General Updates based on UEFI 2.10 and 
PI 1.8 Specification

Felix and Sachin:
  I don't find PI_SPECIFICATION_MINOR_REVISION definition from the latest 
public PI 1.8A. So, this change may not be added now.

Thanks
Liming
> -邮件原件-
> 发件人: Sachin Ganesh 
> 发送时间: 2024年4月25日 17:57
> 收件人: Felix Polyudov ; gaoliming
> ; devel@edk2.groups.io
> 抄送: zhiguang@intel.com; michael.d.kin...@intel.com;
> ardb+tianoc...@kernel.org; kra...@redhat.com; jiewen@intel.com;
> erdemak...@google.com; min.m...@intel.com; thomas.lenda...@amd.com;
> Dhanaraj V 
> 主题: RE: [EXTERNAL] 回复: [PATCH 0/7] General Updates based on UEFI
> 2.10 and PI 1.8 Specification
>
> Hi Felix/ Liming,
>
> Thank you for your comments. Patch 6 has been updated to only focus on
> consolidating the revision macros.
>
> Patch Link:
> https://edk2.groups.io/g/devel/message/118246?p=%2C%2C%2C20%2C0%252
> C0%2C0%3A%3Arecentpostdate%2Fsticky%2C%2Csachin%2C20%2C2%2C0%
> 2C105721897
> PR Link: https://github.com/tianocore/edk2/pull/5569
>
> Thank you,
> Sachin.
>
> -Original Message-
> From: Felix Polyudov 
> Sent: Tuesday, April 23, 2024 10:58 PM
> To: gaoliming ; Sachin Ganesh
> ; devel@edk2.groups.io
> Cc: zhiguang@intel.com; michael.d.kin...@intel.com;
> ardb+tianoc...@kernel.org; kra...@redhat.com; jiewen@intel.com;
> erdemak...@google.com; min.m...@intel.com; thomas.lenda...@amd.com;
> Dhanaraj V 
> Subject: RE: [EXTERNAL] 回复: [PATCH 0/7] General Updates based on UEFI
> 2.10 and PI 1.8 Specification
>
> I think patch 6 can be updated to introduce unified PI specification 
> versioning
> macros without incrementing the minor revision, by changing
> PI_SPECIFICATION_MINOR_REVISION back to 70.
> This will ensure compliance with the versioning schema introduced in PI 1.7B
> without changing the PI support level.
> (the macros were introduced by PIWG mantis 2101)
>
> -Original Message-
> From: gaoliming 
> Sent: Tuesday, April 23, 2024 10:49 AM
> To: Sachin Ganesh ; devel@edk2.groups.io
> Cc: zhiguang@intel.com; michael.d.kin...@intel.com;
> ardb+tianoc...@kernel.org; kra...@redhat.com; jiewen@intel.com;
> erdemak...@google.com; min.m...@intel.com; thomas.lenda...@amd.com;
> Felix Polyudov ; Dhanaraj V 
> Subject: [EXTERNAL] 回复: [PATCH 0/7] General Updates based on UEFI 2.10
> and PI 1.8 Specification
>
>
> **CAUTION: The e-mail below is from an external source. Please exercise
> caution before opening attachments, clicking links, or following guidance.**
>
> Except for Patch 6/7, others are good to me. Reviewed-by: Liming Gao
> 
>
> I suggest to merge others first. The patch 6/7 to update PI version from 1.7 
> to
> 1.8 can be discussed first.
>
> Thanks
> Liming
> > -邮件原件-
> > 发件人: Sachin Ganesh 
> > 发送时间: 2024年4月20日 5:46
> > 收件人: devel@edk2.groups.io
> > 抄送: gaolim...@byosoft.com.cn; zhiguang@intel.com;
> > michael.d.kin...@intel.com; ardb+tianoc...@kernel.org;
> > kra...@redhat.com; jiewen@intel.com; erdemak...@google.com;
> > min.m...@intel.com; thomas.lenda...@amd.com; Felix Polyudov
> > ; Dhanaraj V ; Sachin Ganesh
> > 
> > 主题: [PATCH 0/7] General Updates based on UEFI 2.10 and PI 1.8
> > Specification
> >
> > This series of patches are for general updates to MdePkg and
> > MdeModulePkg based on UEFI 2.10 and PI 1.8 Specifications
> >
> > Sachin Ganesh (7):
> >   MdePkg: Add definition for NVMe Over Fabric Device Path
> >   MdePkg: Add new Resource Attributes defined in PI 1.8 Spec
> >   MdePkg: Define Unaccepted Memory Type
> >   MdeModulePkg: Use newly defined Unaccepted Memory Type
> >   MdePkg: Update Delayed Dispatch PPI as per PI 1.8 Spec
> >   MdePkg: Update to PI 1.

Re: [edk2-devel] [PATCH v2] MdeModulePkg/PciBusDxe: plug device hierarchy leak upon bridge hot-unplug

2024-04-30 Thread Hsueh, Hong-Chih (Neo) via groups.io
[AMD Official Use Only - General]

Hi @ray...@intel.com,

Sorry you bother you, may I have your feedback for this patch?
If it looks good to you could you help to give me an R-b ?

Thank you.

Regards,
Neo


From: Laszlo Ersek 
Sent: Sunday, February 25, 2024 7:59 AM
To: Hsueh, Hong-Chih (Neo) ; devel@edk2.groups.io 

Cc: Ding, Feng (Sunnyvale) ; He, Jiangang 
; Chang, Abner ; ray...@intel.com 
; gaolim...@byosoft.com.cn 
Subject: Re: [PATCH v2] MdeModulePkg/PciBusDxe: plug device hierarchy leak upon 
bridge hot-unplug

Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.


On 2/22/24 17:28, Neo Hsueh wrote:
> A USB4 or TBT bridge can be plugged or unplugged on USB4 port. The actions 
> require PciHotPlugRequestNotify to add a root bridge or remove a root bridge 
> completely.
> In the plug-unplug-plug scenerio, PciHotPlugRequestNotify will return with 
> no-action on second plug because bridge tree shows configured.
> Destroy Pci Device Tree in function PciHotPlugRequestNotify for unplug event 
> to fix this issue.
>
> Cc: Feng Ding 
> Cc: Jiangang He 
> Signed-off-by: Neo Hsueh 
> ---
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c 
> b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> index 3f8c6e6da7..2b7af60e0a 100644
> --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> @@ -2103,6 +2103,8 @@ PciHotPlugRequestNotify (
>}
>  }
>
> +DestroyPciDeviceTree (Bridge);
> +
>  //
>  // End for
>  //

This looks convincing to me, but I don't now nearly enough about
PciBusDxe internals (resource management in particular) to confidently
approve this patch. I can give an

Acked-by: Laszlo Ersek 

but the patch should not be merged until Ray provides an R-b.

Laszlo



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Re: [edk2-devel] [PATCH v6 3/4] MdePkg: Adding support for EFI_CONFORMANCE_PROFILE_TABLE

2024-04-30 Thread Sam Kaynor
Liming,
I will do that; I will also update the EBBR definition to include the GUID from 
the most recent EBBR release.

Thanks,
Sam

-Original Message-
From: gaoliming 
Sent: Monday, April 29, 2024 8:48 PM
To: Sam Kaynor ; devel@edk2.groups.io
Cc: 'Michael D Kinney' ; 'Zhiguang Liu' 

Subject: 回复: [PATCH v6 3/4] MdePkg: Adding support for 
EFI_CONFORMANCE_PROFILE_TABLE

Sam:
 I would suggest to separate this patch 3/4 to two patches. One is to add UEFI 
definition, another is to add EBBR definition. Do you think so?

Thanks
Liming
> -邮件原件-
> 发件人: Sam Kaynor 
> 发送时间: 2024年4月29日 21:49
> 收件人: gaoliming ; devel@edk2.groups.io
> 抄送: 'Michael D Kinney' ; 'Zhiguang Liu'
> 
> 主题: RE: [PATCH v6 3/4] MdePkg: Adding support for
> EFI_CONFORMANCE_PROFILE_TABLE
>
> Liming,
>
> Excuse me, I forgot to include the spec for that GUID. It's defined in
> the Embedded Base Boot Requirements (EBBR) specification 2.1.0 release.
> https://arm-software.github.io/ebbr/
>
> Thanks,
> Sam
>
> -Original Message-
> From: gaoliming 
> Sent: Sunday, April 28, 2024 8:05 PM
> To: Sam Kaynor ; devel@edk2.groups.io
> Cc: 'Michael D Kinney' ; 'Zhiguang Liu'
> 
> Subject: 回复: [PATCH v6 3/4] MdePkg: Adding support for
> EFI_CONFORMANCE_PROFILE_TABLE
>
> Sam:
>   I don't find EFI_CONFORMANCE_PROFILE_EBBR_2_1_GUID definition in
> UEFI 2.10 spec. So, what's its definition from?
>
> Thanks
> Liming
> > -邮件原件-
> > 发件人: Sam Kaynor 
> > 发送时间: 2024年4月27日 1:53
> > 收件人: devel@edk2.groups.io
> > 抄送: Michael D Kinney ; Liming Gao
> > ; Zhiguang Liu 
> > 主题: [PATCH v6 3/4] MdePkg: Adding support for
> > EFI_CONFORMANCE_PROFILE_TABLE
> >
> > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4352
> >
> > Adding support for EFI_CONFORMANCE_PROFILE_TABLE by adding an
> > associated header file and relevant GUIDs to MdePkg.dec as defined
> > in the UEFI 2.10 spec.
> > This table is needed to address changes being made within ShellPkg.
> >
> > Cc: Michael D Kinney 
> > Cc: Liming Gao 
> > Cc: Zhiguang Liu 
> > Signed-off-by: Sam Kaynor 
> > ---
> >
> > Notes:
> > v6:
> > - Added patch to address MdePkg changes separately
> >
> >  MdePkg/MdePkg.dec |  5 ++
> >  MdePkg/Include/Guid/ConformanceProfiles.h | 56
> 
> >  2 files changed, 61 insertions(+)
> >
> > diff --git a/MdePkg/MdePkg.dec b/MdePkg/MdePkg.dec index
> > bf94549cbfbd..2c053a7459f3 100644
> > --- a/MdePkg/MdePkg.dec
> > +++ b/MdePkg/MdePkg.dec
> > @@ -746,6 +746,11 @@ [Guids]
> >## Include/Guid/DeviceAuthentication.h
> >gEfiDeviceSignatureDatabaseGuid  = { 0xb9c2b4f4, 0xbf5f, 0x462d,
> > {0x8a, 0xdf, 0xc5, 0xc7, 0xa, 0xc3, 0x5d, 0xad }}
> >
> > +  ## Include/Guid/ConformanceProfiles.h
> > +  gEfiConfProfilesTableGuid= { 0x36122546, 0xf7e7, 0x4c8f, {
> 0xbd,
> > 0x9b, 0xeb, 0x85, 0x25, 0xb5, 0x0c, 0x0b }}
> > +  gEfiConfProfilesUefiSpecGuid = { 0x523c91af, 0xa195, 0x4382, {
> 0x81,
> > 0x8d, 0x29, 0x5f, 0xe4, 0x00, 0x64, 0x65 }}
> > +  gEfiConfProfilesEbbrSpecGuid = { 0xcce33c35, 0x74ac, 0x4087,
> > { 0xbc, 0xe7, 0x8b, 0x29, 0xb0, 0x2e, 0xeb, 0x27 }}
> > +
> >#
> ># GUID defined in PI1.0
> >#
> > diff --git a/MdePkg/Include/Guid/ConformanceProfiles.h
> > b/MdePkg/Include/Guid/ConformanceProfiles.h
> > new file mode 100644
> > index ..c6211d63d79c
> > --- /dev/null
> > +++ b/MdePkg/Include/Guid/ConformanceProfiles.h
> > @@ -0,0 +1,56 @@
> > +/** @file
> > +  Legal information
> > +
> > +**/
> > +
> > +#ifndef __CONFORMANCE_PROFILES_TABLE_GUID_H__
> > +#define __CONFORMANCE_PROFILES_TABLE_GUID_H__
> > +
> > +
> > +//
> > +// This table allows the platform to advertise its UEFI
> > +specification
> > conformance
> > +// in the form of pre-defined profiles. Each profile is identified
> > +by a
> GUID,
> > with
> > +// known profiles listed in the section below.
> > +// The absence of this table shall indicate that the platform
> implementation
> > is
> > +// conformant with the UEFI specification requirements, as defined
> > +in
> > Section 2.6.
> > +// This is equivalent to publishing this configuration table with
> > +the // EFI_CONFORMANCE_PROFILES_UEFI_SPEC_GUID conformance profile.
> > +//
> > +#define EFI_CONFORMANCE_PROFILES_TABLE_GUID \
> > +  { \
> > +0x36122546, 0xf7e7, 0x4c8f, { 0xbd, 0x9b, 0xeb, 0x85, 0x25,
> > +0xb5,
> 0x0c,
> > 0x0b } \
> > +  }
> > +
> > +#pragma pack(1)
> > +
> > +typedef struct {
> > +  ///
> > +  /// Version of the table must be 0x1
> > +  ///
> > +  UINT16 Version;
> > +  ///
> > +  /// The number of profiles GUIDs present in ConformanceProfiles
> > +  ///
> > +  UINT16 NumberOfProfiles;
> > +  ///
> > +  /// An array of conformance profile GUIDs that are supported by
> > +this
> > system.
> > +  /// EFI_GUIDConformanceProfiles[];
> > +  ///
> > +} EFI_CONFORMANCE_PROFILES_TABLE;
> > +
> > +#define EFI_CONFORMANCE_PROFILES_TABLE_VERSION 0x1
> > +
> > +//
> > +// GUID defined in spec.
> > +//
> > +#define EFI_CONFORMANCE_PROFILES

Re: [edk2-devel] [PATCH] EmbeddedPkg/VirtualRealTimeClockLib: Support SOURCE_DATE_EPOCH

2024-04-30 Thread joeyli via groups.io
Hi all,

On Fri, Apr 12, 2024 at 06:03:35PM +0800, joeyli via groups.io wrote:
> Hi experts,
> 
> On Fri, Apr 12, 2024 at 03:25:56PM +0800, Lee, Chun-Yi wrote:
> > From: Chun-Yi Lee 
> > 
> > RISC-V ovmf used VirtualRealTimeClockLib but the default epoch is a
> > compilation time. It causes that the RISC-V ovmf binary image is NOT
> > reproducible.
> > 
> > This patch added the support of SOURCE_DATE_EPOCH by printenv command.
> > If SOURCE_DATE_EPOCH be found then we use it as BUILD_EPOCH. Otherwise
> > we run date command for setting BUILD_EPOCH.
> > 
> > For distributions want a reproducible RISC-V ovmf image, they should
> > export SOURCE_DATE_EPOCH environment variable before building ovmf.
> > 
> > References: https://reproducible-builds.org/docs/source-date-epoch/
> > Cc: Pete Batard 
> > Cc: Ard Biesheuvel 
> > Signed-off-by: Chun-Yi Lee 
> 
> I have filed pull request:
>  
> https://github.com/tianocore/edk2/pull/5550
> 

Does anyone have suggestion against this patch. Or I missed anything for
the submit request?

Thanks!
Joey Lee

> 
> > ---
> >  .../Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git 
> > a/EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf 
> > b/EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf
> > index 5d0f867..285e880 100644
> > --- 
> > a/EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf
> > +++ 
> > b/EmbeddedPkg/Library/VirtualRealTimeClockLib/VirtualRealTimeClockLib.inf
> > @@ -34,4 +34,4 @@
> >  
> >  # Current usage of this library expects GCC in a UNIX-like shell 
> > environment with the date command
> >  [BuildOptions]
> > -  GCC:*_*_*_CC_FLAGS = -DBUILD_EPOCH=`date +%s`
> > +  GCC:*_*_*_CC_FLAGS = -DBUILD_EPOCH=`printenv SOURCE_DATE_EPOCH || date 
> > +%s`
> > -- 
> > 2.35.3
> 
> 
> 
> 


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[edk2-devel] [PATCH 4/5] MdeModulePkg: SpiHc: SpiHc Drivers

2024-04-30 Thread Chesley, Brit via groups.io
From: Brit Chesley 

Added SpiHc DXE and SMM drivers. This code receives bus transactions
from the SpiBus layer and passes them onto the SpiHcPlatformLib

Platform Initialization Spec 1.7 volume 5 section 18.1.7

Bugzilla #4753

Cc: Abner Chang 
Cc: Abdul Lateef Attar 
Signed-off-by: Brit Chesley 
---
 MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.inf |  46 ++
 MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.inf |  44 +
 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.h  | 111 +++
 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.c  | 115 
 MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.c   | 101 +
 MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.c   |  79 
 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.uni|  10 +++
 7 files changed, 506 insertions(+)
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.inf
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.inf
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.h
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.uni

diff --git a/MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.inf 
b/MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.inf
new file mode 100644
index ..49fa7d831fce
--- /dev/null
+++ b/MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.inf
@@ -0,0 +1,46 @@
+#/** @file
+#
+#  Component description file for SPI Host Controller Module
+#
+#  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+[Defines]
+  INF_VERSION   = 1.27
+  BASE_NAME = SpiHcDxe
+  FILE_GUID = 95D148FF-5A23-43B9-9FC4-80AE0DD48D32
+  MODULE_TYPE   = DXE_DRIVER
+  VERSION_STRING= 0.1
+  PI_SPECIFICATION_VERSION  = 0x0001000A
+  ENTRY_POINT   = SpiHcProtocolEntry
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  DevicePathLib
+  MemoryAllocationLib
+  SpiHcPlatformLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+  UefiLib
+  UefiRuntimeServicesTableLib
+
+[Sources]
+  SpiHc.h
+  SpiHc.c
+  SpiHcDxe.c
+
+[Protocols]
+  gEfiSpiHcProtocolGuid
+
+[Depex]
+  TRUE
+
+[UserExtensions.TianoCore."ExtraFiles"]
+  SpiHc.uni
diff --git a/MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.inf 
b/MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.inf
new file mode 100644
index ..deef4d7cf3fa
--- /dev/null
+++ b/MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.inf
@@ -0,0 +1,44 @@
+#/** @file
+#
+#  Component description file for SPI Host Controller Module
+#
+#  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+[Defines]
+  INF_VERSION   = 1.27
+  BASE_NAME = SpiHcSmm
+  FILE_GUID = 0CDAE298-CB3B-480A-BDC4-A6840FFE1F5E
+  MODULE_TYPE   = DXE_SMM_DRIVER
+  VERSION_STRING= 0.1
+  PI_SPECIFICATION_VERSION  = 0x0001000A
+  ENTRY_POINT   = SpiHcProtocolEntry
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  MemoryAllocationLib
+  MmServicesTableLib
+  SpiHcPlatformLib
+  UefiDriverEntryPoint
+  UefiLib
+
+[Sources]
+  SpiHc.h
+  SpiHc.c
+  SpiHcSmm.c
+
+[Protocols]
+  gEfiSpiSmmHcProtocolGuid
+
+[Depex]
+  TRUE
+
+[UserExtensions.TianoCore."ExtraFiles"]
+  SpiHc.uni
diff --git a/MdeModulePkg/Bus/Spi/SpiHc/SpiHc.h 
b/MdeModulePkg/Bus/Spi/SpiHc/SpiHc.h
new file mode 100644
index ..80448c5c536a
--- /dev/null
+++ b/MdeModulePkg/Bus/Spi/SpiHc/SpiHc.h
@@ -0,0 +1,111 @@
+/** @file
+
+  SPI Host Controller function declarations
+
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  Assert or deassert the SPI chip select.
+
+  This routine is called at TPL_NOTIFY.
+  Update the value of the chip select line for a SPI peripheral. The SPI bus
+  layer calls this routine either in the board layer or in the SPI controller
+  to manipulate the chip select pin at the start and end of a SPI transaction.
+
+  @param[in] This   Pointer to an EFI_SPI_HC_PROTOCOL structure.
+  @param[in] SpiPeripheral  The address of an EFI_SPI_PERIPHERAL data structure
+describing the SPI peripheral whose chip select pin
+is to be manipulated. The routine may access the
+ChipSelectParameter field to gain sufficient
+context to complete the operati on.
+  @param[in] PinValue   The value to be applied to the chip select line of
+the SPI peripheral.
+
+  @retval EFI_SUCCESSThe chip select wa

[edk2-devel] [PATCH 1/5] MdeModulePkg/Bus/Spi/SpiBus: Adding SpiBus Drivers

2024-04-30 Thread Chesley, Brit via groups.io
From: Brit Chesley 

Added SpiBus DXE and SMM drivers. This code translates SPI requests from
the application layer into SPI Bus transactions on the SPI host
controller. The code is responsible for checking if the transaction is
valid, then setting up the SPI clock and chip select properly before
passing the bus transaction to the host controller.

Platform Initialization Spec 1.7 volume 5 section 18.1.6

Bugzilla #4753

Cc: Abner Chang 
Cc: Abdul Lateef Attar 
Signed-off-by: Brit Chesley 
---
 MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.inf |  42 +++
 MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.inf |  42 +++
 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.h  | 167 +
 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.c  | 433 ++
 MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.c   | 198 ++
 MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.c   | 162 
 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.uni|  10 +
 7 files changed, 1054 insertions(+)
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.inf
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.inf
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.h
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.uni

diff --git a/MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.inf 
b/MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.inf
new file mode 100644
index ..992135a76ee6
--- /dev/null
+++ b/MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.inf
@@ -0,0 +1,42 @@
+#/** @file
+#
+#  Component description for the SPI BUS DXE module
+#
+#  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+[Defines]
+  INF_VERSION   = 1.27
+  BASE_NAME = SpiBusDxe
+  FILE_GUID = 25CE038C-5C3A-4A9B-A111-90DF5897E058
+  MODULE_TYPE   = DXE_DRIVER
+  VERSION_STRING= 0.1
+  PI_SPECIFICATION_VERSION  = 0x0001000A
+  ENTRY_POINT   = SpiBusEntry
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
+  DevicePathLib
+  MemoryAllocationLib
+  UefiBootServicesTableLib
+  UefiDriverEntryPoint
+
+[Sources]
+  SpiBusDxe.c
+  SpiBus.c
+  SpiBus.h
+
+[Protocols]
+  gEfiSpiConfigurationProtocolGuid  ## CONSUMES
+  gEfiSpiHcProtocolGuid ## CONSUMES
+
+[Depex]
+  gEfiSpiConfigurationProtocolGuid AND
+  gEfiSpiHcProtocolGuid
+
+[UserExtensions.TianoCore."ExtraFiles"]
+  SpiBus.uni
diff --git a/MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.inf 
b/MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.inf
new file mode 100644
index ..56ce87e9296a
--- /dev/null
+++ b/MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.inf
@@ -0,0 +1,42 @@
+#/** @file
+#
+#  Component description for the SPI BUS SMM module
+#
+#  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#**/
+[Defines]
+  INF_VERSION   = 1.27
+  BASE_NAME = SpiBusSmm
+  FILE_GUID = 5DBB52E1-3D78-4C9C-A9D7-A43E79E93AC0
+  MODULE_TYPE   = DXE_SMM_DRIVER
+  VERSION_STRING= 0.1
+  PI_SPECIFICATION_VERSION  = 0x0001000A
+  ENTRY_POINT   = SpiBusEntry
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  DebugLib
+  DevicePathLib
+  MemoryAllocationLib
+  MmServicesTableLib
+  UefiDriverEntryPoint
+
+[Sources]
+  SpiBus.h
+  SpiBus.c
+  SpiBusSmm.c
+
+[Protocols]
+  gEfiSpiSmmConfigurationProtocolGuid   ## CONSUMES
+  gEfiSpiSmmHcProtocolGuid  ## CONSUMES
+
+[Depex]
+  gEfiSpiSmmConfigurationProtocolGuid AND
+  gEfiSpiSmmHcProtocolGuid
+
+[UserExtensions.TianoCore."ExtraFiles"]
+  SpiBus.uni
diff --git a/MdeModulePkg/Bus/Spi/SpiBus/SpiBus.h 
b/MdeModulePkg/Bus/Spi/SpiBus/SpiBus.h
new file mode 100644
index ..7a43f66ac750
--- /dev/null
+++ b/MdeModulePkg/Bus/Spi/SpiBus/SpiBus.h
@@ -0,0 +1,167 @@
+/** @file
+
+  SPI bus driver
+
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef SPI_BUS_H_
+#define SPI_BUS_H_
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SPI_IO_SIGNATURE  SIGNATURE_32 ('s', 'i', 'o', 'c')
+
+typedef struct {
+  UINTN Signature;
+  EFI_HANDLEHandle;
+  EFI_SPI_IO_PROTOCOL   Protocol;
+  EFI_SPI_BUS_TRANSACTION   BusTransaction;
+  EFI_SPI_CONFIGURATION_PROTOCOL*SpiConfig;
+  EFI_SPI_HC_PROTOCOL   *SpiHc;
+  EFI_SPI_BUS   *SpiBus;
+} SPI_IO_CHIP;
+
+#define SPI_IO_CHIP_FROM_THIS(a) \
+  CR (a, SPI_IO_CHIP, Protocol, \
+  SPI_IO_SIGNATURE)
+
+/**
+  Checks if two device paths are the same
+
+  @param[in] DevicePath1First dev

[edk2-devel] [PATCH 2/5] MdeModulePkg: Adding SpiBus Drivers

2024-04-30 Thread Chesley, Brit via groups.io
From: Brit Chesley 

Including the SpiBus drivers in MdeModulePkg.dsc

Platform Initialization spec 1.7 volume 5 section 18.1.6

Bugzilla #4753

Cc: Liming Gao 
Cc: Ray Ni 
Cc: Abner Chang 
Cc: Abdul Lateef Attar 
Signed-off-by: Brit Chesley 
---
 MdeModulePkg/MdeModulePkg.dsc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index 6bed9205ea69..33d6f4a1f6a6 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -287,6 +287,8 @@ [Components]
   
MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceDxe.inf
   MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpDxe.inf
   MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpSmm.inf
+  MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.inf
+  MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.inf
 
   MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
   MdeModulePkg/Core/Pei/PeiMain.inf
-- 
2.42.1



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[edk2-devel] [PATCH 5/5] MdeModulePkg: Adding SpiHc Drivers

2024-04-30 Thread Chesley, Brit via groups.io
From: Brit Chesley 

Including the SpiHc drivers in MdeModulePkg.dsc

Bugzilla #4753

Cc: Liming Gao 
Cc: Ray Ni 
Cc: Abner Chang 
Cc: Abdul Lateef Attar 
Signed-off-by: Brit Chesley 
---
 MdeModulePkg/MdeModulePkg.dsc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index 9f4178473360..3d22a9cdb2b2 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -290,6 +290,8 @@ [Components]
   MdeModulePkg/Bus/Spi/SpiNorFlashJedecSfdp/SpiNorFlashJedecSfdpSmm.inf
   MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.inf
   MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.inf
+  MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.inf
+  MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.inf
 
   MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
   MdeModulePkg/Core/Pei/PeiMain.inf
-- 
2.42.1



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[edk2-devel] [PATCH 0/5] SPI Driver Stack

2024-04-30 Thread Chesley, Brit via groups.io
From: Brit Chesley 

This patchset introduces the SPI driver stack as defined in the Platform
Initialization specification Volume 5 chapter 18 (DXE) and Volume 4 chapter
12 (SMM). The SPI stack decouples the SPI chip details from the SPI
controller and SPI bus configuration details to enable silicon vendors
to write drivers effectively. This patchset also introduces the
SpiHcPlatformLib, which allows for OEMs to handle low level SPI host
controller details while using the generic SPI bus/hc drivers.

https://github.com/BritChesley/edk2/tree/SpiBusStack

Cc: Liming Gao 
Cc: Ray Ni 
Cc: Abner Chang 
Cc: Abdul Lateef Attar 

Brit Chesley (5):
  MdeModulePkg/Bus/Spi/SpiBus: Adding SpiBus Drivers
  MdeModulePkg: Adding SpiBus Drivers
  MdeModulePkg:BaseSpiHcPlatformLib: Adding NULL lib instance
  MdeModulePkg: SpiHc: SpiHc Drivers
  MdeModulePkg: Adding SpiHc Drivers

 MdeModulePkg/MdeModulePkg.dec |   5 +
 MdeModulePkg/MdeModulePkg.dsc |   5 +
 MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.inf |  42 ++
 MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.inf |  42 ++
 MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.inf   |  46 ++
 MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.inf   |  44 ++
 .../BaseSpiHcPlatformLibNull.inf  |  35 ++
 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.h  | 167 +++
 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.h| 111 +
 .../Include/Library/SpiHcPlatformLib.h| 148 ++
 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.c  | 433 ++
 MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.c   | 198 
 MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.c   | 162 +++
 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.c| 115 +
 MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.c | 101 
 MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.c |  79 
 .../BaseSpiHcPlatformLibNull.c| 145 ++
 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.uni|  10 +
 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.uni  |  10 +
 .../BaseSpiHcPlatformLibNull.uni  |  11 +
 20 files changed, 1909 insertions(+)
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.inf
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.inf
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.inf
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.inf
 create mode 100644 
MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.inf
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.h
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.h
 create mode 100644 MdeModulePkg/Include/Library/SpiHcPlatformLib.h
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBusDxe.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBusSmm.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHcDxe.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHcSmm.c
 create mode 100644 
MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.c
 create mode 100644 MdeModulePkg/Bus/Spi/SpiBus/SpiBus.uni
 create mode 100644 MdeModulePkg/Bus/Spi/SpiHc/SpiHc.uni
 create mode 100644 
MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.uni

-- 
2.42.1



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[edk2-devel] [PATCH 3/5] MdeModulePkg:BaseSpiHcPlatformLib: Adding NULL lib instance

2024-04-30 Thread Chesley, Brit via groups.io
From: Brit Chesley 

Adding NULL SpiHcPlatformLib instance. This library is responsible for
handling the low level details of the SPI host controller. Since this is
platform specific this library will be dependent on OEM SPI
implementation. The SPI host controller layer will utilize this library
for SPI bus transactions.

Bugzilla #4753

Cc: Liming Gao 
Cc: Ray Ni 
Cc: Abner Chang 
Cc: Abdul Lateef Attar 
Signed-off-by: Brit Chesley 
---
 MdeModulePkg/MdeModulePkg.dec |   5 +
 MdeModulePkg/MdeModulePkg.dsc |   1 +
 .../BaseSpiHcPlatformLibNull.inf  |  35 +
 .../Include/Library/SpiHcPlatformLib.h| 148 ++
 .../BaseSpiHcPlatformLibNull.c| 145 +
 .../BaseSpiHcPlatformLibNull.uni  |  11 ++
 6 files changed, 345 insertions(+)
 create mode 100644 
MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.inf
 create mode 100644 MdeModulePkg/Include/Library/SpiHcPlatformLib.h
 create mode 100644 
MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.c
 create mode 100644 
MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.uni

diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index 3a239a1687ea..98e6b385cd91 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -169,6 +169,11 @@ [LibraryClasses]
   #
   ImagePropertiesRecordLib|Include/Library/ImagePropertiesRecordLib.h
 
+  ##  @libraryclass   Platform SPI Host Controller library which provides 
low-level
+  #   control over the SPI hardware
+  #
+  SpiHcPlatformLib|Include/Library/SpiHcPlatformLib.h
+
 [Guids]
   ## MdeModule package token space guid
   # Include/Guid/MdeModulePkgTokenSpace.h
diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc
index 33d6f4a1f6a6..9f4178473360 100644
--- a/MdeModulePkg/MdeModulePkg.dsc
+++ b/MdeModulePkg/MdeModulePkg.dsc
@@ -107,6 +107,7 @@ [LibraryClasses]
   
MmUnblockMemoryLib|MdePkg/Library/MmUnblockMemoryLib/MmUnblockMemoryLibNull.inf
   
VariableFlashInfoLib|MdeModulePkg/Library/BaseVariableFlashInfoLib/BaseVariableFlashInfoLib.inf
   
IpmiCommandLib|MdeModulePkg/Library/BaseIpmiCommandLibNull/BaseIpmiCommandLibNull.inf
+  
SpiHcPlatformLib|MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.inf
 
 [LibraryClasses.EBC.PEIM]
   IoLib|MdePkg/Library/PeiIoLibCpuIo/PeiIoLibCpuIo.inf
diff --git 
a/MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.inf 
b/MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.inf
new file mode 100644
index ..96c32dc39720
--- /dev/null
+++ b/MdeModulePkg/Library/BaseSpiHcPlatformLibNull/BaseSpiHcPlatformLibNull.inf
@@ -0,0 +1,35 @@
+
+#/** @file
+#
+#  NULL library for platform SPI Host controller, which should be provided
+#  by the OEM.
+#
+#  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#**/
+[Defines]
+  INF_VERSION   = 1.27
+  BASE_NAME = BaseSpiHcPlatformLibNull
+  FILE_GUID = 3C230948-6DF5-4802-8177-967A190579CF
+  MODULE_TYPE   = BASE
+  VERSION_STRING= 0.1
+  PI_SPECIFICATION_VERSION  = 0x0001000A
+  LIBRARY_CLASS = SpiHcPlatformLib
+
+[Packages]
+  MdePkg/MdePkg.dec
+  MdeModulePkg/MdeModulePkg.dec
+
+[LibraryClasses]
+  DevicePathLib
+  UefiLib
+
+[Sources]
+  BaseSpiHcPlatformLibNull.c
+
+[Depex]
+  TRUE
+
+[UserExtensions.TianoCore."ExtraFiles"]
+  BaseSpiHcPlatformLibNull.uni
diff --git a/MdeModulePkg/Include/Library/SpiHcPlatformLib.h 
b/MdeModulePkg/Include/Library/SpiHcPlatformLib.h
new file mode 100644
index ..c68f7455372c
--- /dev/null
+++ b/MdeModulePkg/Include/Library/SpiHcPlatformLib.h
@@ -0,0 +1,148 @@
+/** @file
+
+  Function declarations for SpiHcPlatformLib
+
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef PLATFORM_SPI_HC_H_
+#define PLATFORM_SPI_HC_H_
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+  This function reports the details of the SPI Host Controller to the SpiHc 
driver.
+
+  @param[out] Attributes  The suported attributes of the SPI 
host controller
+  @param[out] FrameSizeSupportMaskThe suported FrameSizeSupportMask of 
the SPI host controller
+  @param[out] MaximumTransferBytesThe suported MaximumTransferBytes of 
the SPI host controller
+
+  @retval EFI_SUCCESS SPI_HOST_CONTROLLER_INSTANCE was allocated 
properly
+  @retval EFI_OUT_OF_RESOURCESThe SPI_HOST_CONTROLLER_INSTANCE could not 
be allocated
+*/
+EFI_STATUS
+EFIAPI
+GetPlatformSpiHcDetails (
+  OUT UINT32  *Attributes,
+  OUT UINT32  *FrameSizeSupportMask,
+  OUT UINT32  *MaximumTransferBytes
+  );
+
+/**
+  This function reports the device path of SPI

Re: [edk2-devel] [PATCH] Added support for ACPI related data structures for RISC_V64 platform

2024-04-30 Thread Sunil V L
Hi Lingheng Du,

What is the use of adding this header file and how did you create it? I
think EDK2 needs ACPI spec to be released to get these definitions
added. Also, these are not part of 6.5 and hence names like
EFI_ACPI_6_5* are incorrect. So, it will be helpful if you add some
commit message why do we need this header.

Thanks,
Sunil
On Mon, Apr 29, 2024 at 05:53:55PM +0800, gaoliming via groups.io wrote:
> From: dylanlhdu 
> 
> Signed-off-by: Lingheng Du 
> Reviewed-by: Song Huang  
> Reviewed-by: Bing Fan 
> ---
>  .../Include/IndustryStandard/AcpiRiscv64.h| 176 ++
>  1 file changed, 176 insertions(+)
>  create mode 100644 edk2/MdePkg/Include/IndustryStandard/AcpiRiscv64.h
> 
> diff --git a/edk2/MdePkg/Include/IndustryStandard/AcpiRiscv64.h 
> b/edk2/MdePkg/Include/IndustryStandard/AcpiRiscv64.h
> new file mode 100644
> index ..4111b3ea
> --- /dev/null
> +++ b/edk2/MdePkg/Include/IndustryStandard/AcpiRiscv64.h
> @@ -0,0 +1,176 @@
> +/** @file
> +  RISCV64 platform ACPI related support April, 2022.
> +
> +  SPDX-License-Identifier: BSD-2-Clause-Patent
> +**/
> +
> +#ifndef ACPI_RISCV64_H_
> +#define ACPI_RISCV64_H_
> +
> +//
> +// Ensure proper structure formats
> +//
> +#pragma pack(1)
> +
> +///
> +/// RISC-V Interrupt Type
> +///
> +#define EFI_ACPI_6_5_INC_RINTC_TYPE  0x18
> +#define EFI_ACPI_6_5_INC_IMSIC_TYPE  0x19
> +#define EFI_ACPI_6_5_INC_APLIC_TYPE  0x1A
> +#define EFI_ACPI_6_5_INC_PLIC_TYPE   0x1B
> +
> +///
> +///  RISC-V Interrupt Controller (RINTC)
> +///
> +typedef struct {
> +  UINT8 Type;
> +  UINT8 Length;
> +  UINT8 Version;
> +  UINT8 Reserved;
> +  UINT32Flags;
> +  UINT64HartId;
> +  UINT32Uid;
> +  UINT32ExtIntcId;
> +  UINT64ImsicAddr;
> +  UINT32ImsicSize;
> +} EFI_ACPI_6_5_INC_RINTC_STRUCTURE;
> +
> +///
> +///  Incoming MSI Controller (IMSIC)
> +///
> +typedef struct {
> +  UINT8 Type;
> +  UINT8 Length;
> +  UINT8 Version;
> +  UINT8 Reserved;
> +  UINT32Flags;
> +  UINT16NumIds;
> +  UINT16NumGuestIds;
> +  UINT8 GuestIndexBits;
> +  UINT8 HartIndexBits;
> +  UINT8 GroupIndexBits;
> +  UINT8 GroupIndexShift;
> +} EFI_ACPI_6_5_INC_IMSIC_STRUCTURE;
> +
> +///
> +///  RISC-V Advanced Platform Level Interrupt Controller (APLIC)
> +///
> +typedef struct {
> +  UINT8 Type;
> +  UINT8 Length;
> +  UINT8 Version;
> +  UINT8 AplicId;
> +  UINT32Flags;
> +  UINT8 HW_ID[8];
> +  UINT16NumIdc;
> +  UINT16ExternSoureceSupport;
> +  UINT32GSysInterruptBase;
> +  UINT64AplicAddress;
> +  UINT32AplicSize;
> +} EFI_ACPI_6_5_INC_APLIC_STRUCTURE;
> +
> +///
> +///   RISC-V Platform Level Interrupt Controller (PLIC)
> +///
> +typedef struct {
> +  UINT8 Type;
> +  UINT8 Length;
> +  UINT8 Version;
> +  UINT8 PlicId;
> +  UINT8 HwId[8];
> +  UINT16NumIrqs;
> +  UINT16MaxPrio;
> +  UINT32Flags;
> +  UINT32PlicSize;
> +  UINT64PlicAddress;
> +  UINT32GsiBase;
> +} EFI_ACPI_6_5_INC_PLIC_STRUCTURE;
> +
> +///
> +/// RISC-V Hart Capabilities Table (RHCT)
> +///
> +typedef struct {
> +  EFI_ACPI_DESCRIPTION_HEADERHeader;
> +} EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;
> +
> +///
> +/// RHCT Revision
> +///
> +#define EFI_ACPI_6_5_RHCT_APIC_DESCRIPTION_TABLE_REVISION  0x05
> +
> +///
> +/// RHCT types
> +///
> +#define EFI_ACPI_6_5_NODE_ISA_TYPE   0x0
> +#define EFI_ACPI_6_5_NODE_CM0_TYPE   0x1
> +#define EFI_ACPI_6_5_NODE_MMU_TYPE   0x2
> +#define EFI_ACPI_6_5_NODE_RESERVED_TYPE  0x3
> +#define EFI_ACPI_6_5_NODE_HART_TYPE  0x
> +
> +///
> +/// RHCT Flags
> +///
> +#define ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU  (1)
> +
> +///
> +/// ISA string node
> +///
> +typedef struct {
> +  UINT16Type;
> +  UINT16Length;
> +  UINT16Revision;
> +  UINT16IsaLength;
> +  UINT8 IsaString[];
> +} EFI_ACPI_6_5_NODE_ISA_STRING_STRUCTURE;
> +
> +///
> +/// CM0 node
> +///
> +typedef struct {
> +  UINT16Type;
> +  UINT16Length;
> +  UINT16Revision;
> +  UINT8 Reserved;
> +  UINT8 CbomSize;
> +  UINT8 CbopSize;
> +  UINT8 CbozSize;
> +} EFI_ACPI_6_5_NODE_CM0_STRUCTURE;
> +
> +///
> +/// MMU node
> +///
> +typedef struct {
> +  UINT16Type;
> +  UINT16Length;
> +  UINT16Revision;
> +  UINT8 Reserved;
> +  UINT8 MmuType;
> +} EFI_ACPI_6_5_NODE_MMU_STRUCTURE;
> +
> +///
> +/// MMU type
> +///
> +#define EFI_ACPI_6_5_MMU_SV39_TYPE  0x0
> +#define EFI_ACPI_6_5_MMU_SV48_TYPE  0x1
> +#define EFI_ACPI_6_5_MMU_SV57_TYPE  0x2
> +
> +///
> +/// Hart Info Node
> +///
> +typedef struct {
> +  UINT16Type;
> +  UINT16Length;
> +  UINT16Revision;
> +  UINT16NumOffsets;
> +  UINT32Uid;
> +} EFI_ACPI_6_5_NODE_HARTINFO_STRUCTURE;
> +
> +///
> +/// "RHCT" RISC-V Hart Capabilities Table
> +///
> +#define EFI_ACPI_6_5_RHCT_HART_DESCRIPTION_TABLE_SIGNATURE  
> SIGNATURE_32('R', 'H', 'C', 'T')
> +
> +#p

Re: [edk2-devel] [PATCH v3] OvmfPkg: Don't make APIC MMIO accesses with encryption bit set

2024-04-30 Thread Gerd Hoffmann
On Fri, Apr 26, 2024 at 02:50:07PM GMT, Roth, Michael via groups.io wrote:
> For the most part, OVMF will clear the encryption bit for MMIO regions,
> but there is currently one known exception during SEC when the APIC
> base address is accessed via MMIO with the encryption bit set for
> SEV-ES/SEV-SNP guests. In the case of SEV-SNP, this requires special
> handling on the hypervisor side which may not be available in the
> future[1], so make the necessary changes in the SEC-configured page
> table to clear the encryption bit for 4K region containing the APIC
> base address.
> 
> Since CpuPageTableLib is used to handle the splitting, some additional
> care must be taken to clear the C-bit in all non-leaf PTEs since the
> library expects that to be the case. Add handling for that when setting
> up the SEC page table.
> 
> While here, drop special handling for the APIC base address in the
> SEV-ES/SNP #VC handler.

Please split this into smaller patches (one for each commit message
paragraph).

> -0x011000|0x00F000
> +0x011000|0x001000
> +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableBase|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecApicPageTableSize

Hmm, I think we need to figure how we'll organize page table allocation
best.  This becomes a bit messy, even more so once we enable 5-level
paging for sev because one page isn't enough then ...

Is it possible to move the GHCB page setup to SecCoreStartupWithStack()
too?  If so it would be nice to setup both GHCB and APIC page in C code,
and it should also allow to cleanup the page table memory reservation
and simplify the reset vector.

Note: I'm fine with this as-is for the next stable tag, the comments are
more for the next patch series, when enabling 5-level paging for sev,
where this must be touched again.

> +  ApicAddress = (UINT64)GetLocalApicBaseAddress ();
> +  Buffer  = (VOID *)(UINTN)FixedPcdGet32 (PcdOvmfSecApicPageTableBase);
> +  Cr3 = AsmReadCr3 ();
> +
> +  MapAttribute.Uint64 = ApicAddress;
> +  MapAttribute.Bits.Present   = 1;
> +  MapAttribute.Bits.ReadWrite = 1;
> +  MapMask.Uint64  = MAX_UINT64;
> +  BufferSize  = SIZE_4KB;
> +
> +  Status = PageTableMap (
> + (UINTN *)&Cr3,
> + Paging4Level,
> + Buffer,
> + &BufferSize,
> + ApicAddress,
> + SIZE_4KB,
> + &MapAttribute,
> + &MapMask,
> + NULL
> + );

Very nice.

take care,
  Gerd



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Re: [edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage

2024-04-30 Thread Ard Biesheuvel
On Tue, 30 Apr 2024 at 09:47, Chao Li  wrote:
>
> Patch1: Added three PCDs for QemuFwCfgLibMmio
> Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
> stage library.
> Patch3: Added QemuFwCfgMmiLib PEI version
> Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
> enable it in AARCH64 and RISCV64.
>
> V1 -> V2:
> 1. Use HOBs instead of PCD.
> 2. The old patch2 is divided into two parts, one is code splitting, and
> the other is functional changes.
> 3. add two patches to keep the safe when change the platform DSC file.
>
> V2 -> V3:
> 1. Merge three HOBs into a single HOB.
> 2. Remove the dynamic global variables in PEI.
>
> V3 -> V4:
> 1. Adjust the HOB content, this version saves all of structual contents
> in HOB.
> 2. Remove the Loongson copyright in separation patch, and add it in the
> funciton change patch.
> 3. Restored some variables as static in DXE version.
> 4. Added the HOB GUID in OvmfPkg.dec.
>
> V4 -> V5
> 1. Adjust the PEI version some logic error, it will built the HOB after
> the QEMU check passes.
> 2. Adjust some code style.
> 3. Remove the architecture comment in PEI INF.
> 4. Reoder the PEI INF in alphabetical order.
>
> BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755
>
> PR: https://github.com/tianocore/edk2/pull/5568
>
> Cc: Ard Biesheuvel 
> Cc: Jiewen Yao 
> Cc: Gerd Hoffmann 
> Cc: Leif Lindholm 
> Cc: Sami Mujawar 
> Cc: Sunil V L 
> Cc: Andrei Warkentin 
>
> Chao Li (8):
>   OvmfPkg: Add a GUID for QemuFwCfgLib
>   OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
>   OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
>   OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
>   OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
>   ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
>   OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
>   OvmfPkg: Remove QemuFwCfgLibMmio.inf
>

Thanks - I've queued these up now


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Re: [edk2-devel] [PATCH v4 00/14] Add SmmRelocationLib

2024-04-30 Thread Wu, Jiaxin
Thanks Ray, I missed to add some already reviewed-by tag in v4. All V4 patches 
are tested & acted by Gerd:

Tested-by: Gerd Hoffmann mailto:kra...@redhat.com>>

Acked-by: Gerd Hoffmann mailto:kra...@redhat.com>>

For each one: listed as below, *so need Ray "reviewed-by" tag on the patch: 
05/06/14, need Gerd "reviewed-by" tag on the patch:  08/09/10/11/12*

  [PATCH v4 01/14] UefiCpuPkg: Add SmmRelocationLib class
Reviewed-by: Ray Ni mailto:ray...@intel.com>>  --> no change 
compared to V3

  [PATCH v4 02/14] UefiCpuPkg/SmmRelocationLib: Add SmmRelocationLib library 
instance
Reviewed-by: Ray Ni mailto:ray...@intel.com>> --> no change 
compared to V3

  [PATCH v4 03/14] UefiCpuPkg/SmmRelocationLib: Rename global variables
Reviewed-by: Ray Ni mailto:ray...@intel.com>> --> no change 
compared to V3

 [PATCH v4 04/14]  UefiCpuPkg/SmmRelocationLib: Avoid unnecessary memory 
allocation
Reviewed-by: Ray Ni mailto:ray...@intel.com>> --> no change 
compared to V3

  [PATCH v4 05/14] UefiCpuPkg/SmmRelocationLib: Remove unnecessary global 
variable
  [PATCH v4 06/14] UefiCpuPkg/SmmRelocationLib: Remove unnecessary CpuIndex
* Change Based on Ray's comment on V3: split the removal of CpuIndex parameter 
in a new patch, so add the 06 patch in V4.*

  [PATCH v4 07/14] UefiCpuPkg/SmmRelocationLib: Add library instance for AMD
Reviewed-by: Abdul Lateef Attar  --> no change 
compared to V3

  [PATCH v4 08/14] OvmfPkg/SmmRelocationLib: Add library instance for OVMF
  [PATCH v4 09/14] OvmfPkg/PlatformInitLib: Create gEfiSmmSmramMemoryGuid
  [PATCH v4 10/14]  OvmfPkg: Refine SmmAccess implementation
  [PATCH v4 11/14] OvmfPkg/SmmCpuFeaturesLib: Check Smbase Relocation is done 
or not
  [PATCH v4 12/14] OvmfPkg/PlatformPei: Relocate SmBases in PEI phase
*Change Based on Gerd's  comment on V3: 1. Creating the 
EFI_SMM_SMRAM_MEMORY_GUID HOB should be moved to its own function.  2) refine 
the comment in SmmAccess 3) refine the commit log.*

  [PATCH v4 13/14] UefiPayloadPkg/UefiPayloadPkg.dsc: Include SmmRelocationLib
Reviewed-by: Gua Guo 
Reviewed-by: Guo Dong 

  [PATCH v4 14/14] UefiCpuPkg/PiSmmCpuDxeSmm: Remove SmBases relocation logic
*Change Based on Ray's comment on V3: move the "TileSize" check just below the 
original TileSize calculation logic*

Thanks,
Jiaxin

From: Ni, Ray 
Sent: Tuesday, April 30, 2024 2:01 PM
To: Wu, Jiaxin ; devel@edk2.groups.io
Cc: Zeng, Star ; Gerd Hoffmann ; Kumar, 
Rahul R ; Dong, Guo ; Rhodes, Sean 
; Lu, James ; Guo, Gua 
; Ard Biesheuvel ; Yao, Jiewen 
; Abdul Lateef Attar ; Abner 
Chang ; Tom Lendacky 
Subject: Re: [PATCH v4 00/14] Add SmmRelocationLib

Jiaxin,
You need to add the missing Reviewed-by for each patch if the patch doesn't 
change in V4.

Can you reply to this mail to list what patches have already got Reviewed-by 
from whom?



Thanks,
Ray

From: Wu, Jiaxin mailto:jiaxin...@intel.com>>
Sent: Friday, April 26, 2024 20:17
To: devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>
Cc: Ni, Ray mailto:ray...@intel.com>>; Zeng, Star 
mailto:star.z...@intel.com>>; Gerd Hoffmann 
mailto:kra...@redhat.com>>; Kumar, Rahul R 
mailto:rahul.r.ku...@intel.com>>; Dong, Guo 
mailto:guo.d...@intel.com>>; Rhodes, Sean 
mailto:sean@starlabs.systems>>; Lu, James 
mailto:james...@intel.com>>; Guo, Gua 
mailto:gua@intel.com>>; Ard Biesheuvel 
mailto:ardb+tianoc...@kernel.org>>; Yao, Jiewen 
mailto:jiewen@intel.com>>; Abdul Lateef Attar 
mailto:abdullateef.at...@amd.com>>; Abner Chang 
mailto:abner.ch...@amd.com>>; Tom Lendacky 
mailto:thomas.lenda...@amd.com>>
Subject: [PATCH v4 00/14] Add SmmRelocationLib

PR: https://github.com/tianocore/edk2/pull/5546

Intel plans to separate the smbase relocation logic from
PiSmmCpuDxeSmm driver, and the related behavior will be
moved to the new interface defined by the SmmRelocationLib
class.

The SmmRelocationLib class provides the SmmRelocationInit()
interface for platform to do the smbase relocation, which
shall provide below 2 functionalities:
1. Relocate smbases for each processor.
2. Create the gSmmBaseHobGuid HOB.

With SmmRelocationLib, PiSmmCpuDxeSmm driver (which runs at
a later phase) can be simplfied as below for SMM init:
1. Consume the gSmmBaseHobGuid HOB for the relocated smbases
for each Processor.
2. Execute the early SMM Init.

Cc: Ray Ni mailto:ray...@intel.com>>
Cc: Zeng Star mailto:star.z...@intel.com>>
Cc: Gerd Hoffmann mailto:kra...@redhat.com>>
Cc: Rahul Kumar mailto:rahul1.ku...@intel.com>>
Cc: Guo Dong mailto:guo.d...@intel.com>>
Cc: Sean Rhodes mailto:sean@starlabs.systems>>
Cc: James Lu mailto:james...@intel.com>>
Cc: Gua Guo mailto:gua@intel.com>>
Cc: Ard Biesheuvel mailto:ardb+tianoc...@kernel.org>>
Cc: Jiewen Yao mailto:jiewen@intel.com>>
Cc: Abdul Lateef Attar 
mailto:abdullateef.at...@amd.com>>
Cc: Abner Chang mailto:abner.ch...@amd.com>>
Cc: Tom Lendacky mailto:thomas.lenda...@amd.com>>
Signed-off-by: Jiaxin Wu mailto:jiaxin...@intel.com>>

Jiaxin Wu (

Re: [edk2-devel] [PATCH v4 00/14] Add SmmRelocationLib

2024-04-30 Thread Gerd Hoffmann
On Fri, Apr 26, 2024 at 08:17:06PM GMT, Jiaxin Wu wrote:
> PR: https://github.com/tianocore/edk2/pull/5546
> 
> Intel plans to separate the smbase relocation logic from
> PiSmmCpuDxeSmm driver, and the related behavior will be
> moved to the new interface defined by the SmmRelocationLib
> class.
> 
> The SmmRelocationLib class provides the SmmRelocationInit()
> interface for platform to do the smbase relocation, which
> shall provide below 2 functionalities:
> 1. Relocate smbases for each processor.
> 2. Create the gSmmBaseHobGuid HOB.
> 
> With SmmRelocationLib, PiSmmCpuDxeSmm driver (which runs at
> a later phase) can be simplfied as below for SMM init:
> 1. Consume the gSmmBaseHobGuid HOB for the relocated smbases
> for each Processor.
> 2. Execute the early SMM Init.

Series:
Tested-by: Gerd Hoffmann 
Acked-by: Gerd Hoffmann 

take care,
  Gerd



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Re: [edk2-devel] [PATCH ovmf v2 0/5] Enable AMD SEV-ES DebugSwap

2024-04-30 Thread Alexey Kardashevskiy via groups.io




On 22/4/24 22:16, Alexey Kardashevskiy wrote:

This is to prevent #DB interception on SEV-ES VM with
enabled DebugSwap feature, more details in 3/5.

The corresponding Linux change (HV and VM) went upstream
long time ago:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e221804dad4e
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=d1f85fbe836e

And then I dropped the ball, sorry.

The previous conversation (more than a year ago) is here:
https://edk2.groups.io/g/devel/message/96808

This failed CI though (figuring out this not-that-trivial Uncrustify guy now):
https://dev.azure.com/tianocore/edk2-ci/_build/results?buildId=123642&view=logs&j=ec42d809-3c3b-54a9-276c-e54a8b9aaee9&t=bd91c6c3-6d75-5ede-7b63-5767cf827334



I finally got CI happy, here is the pull request:
github.com/tianocore/edk2/pull/5594

How do I proceed from here? Repost patches here or that pull request 
will do? I did not change anything besides spaces and CCs. Thanks,





This is based on sha1
6780b3aba086 Abner Chang "Maintainers: AMD as SPI driver stack maintainer".

Please comment. Thanks.



Alexey Kardashevskiy (5):
   MdePkg/Register/Amd: Define all bits from MSR_SEV_STATUS_REGISTER
   MdePkg: Add AMD SEV features to PcdConfidentialComputingGuestAttr
   OvmfPkg: Add AMD SEV-ES DebugSwap feature support
   UefiCpuPkg: Add AMD SEV-ES features support
   OvmfPkf: Enable AMD SEV-ES DebugSwap for DXE

  MdePkg/Include/ConfidentialComputingGuestAttr.h| 16 +-
  MdePkg/Include/Register/Amd/Fam17Msr.h | 57 
+++-
  OvmfPkg/Include/Library/MemEncryptSevLib.h | 12 +
  OvmfPkg/Library/BaseMemEncryptSevLib/DxeMemEncryptSevLibInternal.c | 25 
+++--
  OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLibInternal.c | 19 
+++
  OvmfPkg/Library/BaseMemEncryptSevLib/SecMemEncryptSevLibInternal.c | 20 
+++
  OvmfPkg/Library/CcExitLib/CcExitVcHandler.c|  8 +++
  OvmfPkg/PlatformPei/AmdSev.c   | 13 +++--
  UefiCpuPkg/Library/MpInitLib/MpLib.c   | 10 ++--
  9 files changed, 168 insertions(+), 12 deletions(-)



--
Alexey



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Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: Remove the dependency with MinPlatform

2024-04-30 Thread Chang, Abner via groups.io
[AMD Official Use Only - General]

Thanks for reviewing this, the change is merged.

Abner

From: Attar, AbdulLateef (Abdul Lateef) 
Sent: Tuesday, April 30, 2024 3:36 PM
To: Chang, Abner ; devel@edk2.groups.io
Cc: Nickle Wang 
Subject: Re: [edk2-platforms][PATCH] ManageabilityPkg: Remove the dependency 
with MinPlatform


Reviewed-by: Abdul Lateef Attar 

On 29-04-2024 10:31, abner.ch...@amd.com wrote:

From: Abner Chang 



BZ# 4695



Signed-off-by: Abner Chang 

Cc: Abdul Lateef Attar 


Cc: Nickle Wang 

---

 .../ManageabilityPkg/ManageabilityPkg.dsc | 72 ++-

 1 file changed, 56 insertions(+), 16 deletions(-)



diff --git a/Features/ManageabilityPkg/ManageabilityPkg.dsc 
b/Features/ManageabilityPkg/ManageabilityPkg.dsc

index 87b32f1182..8608450a3b 100644

--- a/Features/ManageabilityPkg/ManageabilityPkg.dsc

+++ b/Features/ManageabilityPkg/ManageabilityPkg.dsc

@@ -3,7 +3,7 @@

 # This is the package provides edk2 drivers and libraries

 # those are related to the platform management.

 #

-# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.

+# Copyright (C) 2023-2024 Advanced Micro Devices, Inc. All rights reserved.

 # SPDX-License-Identifier: BSD-2-Clause-Patent

 #

 ##

@@ -18,15 +18,7 @@

   BUILD_TARGETS  = DEBUG|RELEASE|NOOPT

   SKUID_IDENTIFIER   = DEFAULT



-[Packages]

-  MinPlatformPkg/MinPlatformPkg.dec

-

 [PcdsFeatureFlag]

-  #

-  # MinPlatform common include currently required PCD

-  #

-  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable   
|FALSE

-  gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable  
|FALSE



   #

   # Manageability modules

@@ -45,19 +37,67 @@

   gManageabilityPkgTokenSpaceGuid.PcdManageabilityPeiIpmiFrb 
|TRUE

   gManageabilityPkgTokenSpaceGuid.PcdManageabilityDxeIpmiBmcAcpi 
|TRUE



-#

-# Include common libraries

-#

-!include MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc

-!include MinPlatformPkg/Include/Dsc/CorePeiLib.dsc

-!include MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc

-

 [Components]

   
ManageabilityPkg/Library/ManageabilityTransportKcsLib/Dxe/DxeManageabilityTransportKcs.inf

   
ManageabilityPkg/Library/ManageabilityTransportMctpLib/Dxe/DxeManageabilityTransportMctp.inf

   ManageabilityPkg/Library/PldmProtocolLibrary/Dxe/PldmProtocolLib.inf

   ManageabilityPkg/Library/IpmiCommandLib/IpmiCommandLib.inf



+  #

+  # Generic EDKII Lib

+  #

+

+!include MdePkg/MdeLibs.dsc.inc

+

+[LibraryClasses.common]

+

+  #

+  # Entry point

+  #

+  
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+  PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf

+  #

+  # Basic

+  #

+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf

+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf

+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf

+  #

+  # UEFI & PI

+  #

+  
UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf

+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf

+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf

+  
DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf

+  #

+  # Misc

+  #

+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf

+  
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf

+  
OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+

+[LibraryClasses.common.DXE_SMM_DRIVER]

+  
SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf

+  MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTableLib.inf

+  
ReportStatusCodeLib|MdeModulePkg/Library/SmmReportStatusCodeLib/SmmReportStatusCodeLib.inf

+  
MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf

+

+[LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE, 
LibraryClasses.common.PEIM]

+  
S3BootScriptLib|MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.i

[edk2-devel] [PATCH v5 8/8] OvmfPkg: Remove QemuFwCfgLibMmio.inf

2024-04-30 Thread Chao Li
All of platforms are switching to QemuFwCfgMmioDxeLib.inf, remove
QemuFwCfgLibMmio.inf now.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf | 54 ---
 1 file changed, 54 deletions(-)
 delete mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
deleted file mode 100644
index 633053aaed..00
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+++ /dev/null
@@ -1,54 +0,0 @@
-## @file
-#
-#  Stateful, implicitly initialized fw_cfg library.
-#
-#  Copyright (C) 2013 - 2014, Red Hat, Inc.
-#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
-#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
-#
-#  SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
-  INF_VERSION= 0x00010005
-  BASE_NAME  = QemuFwCfgLib
-  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
-  MODULE_TYPE= BASE
-  VERSION_STRING = 1.0
-  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
-
-  CONSTRUCTOR= QemuFwCfgInitialize
-
-#
-# The following information is for reference only and not required by the build
-# tools.
-#
-#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
-#
-
-[Sources]
-  QemuFwCfgLibMmio.c
-  QemuFwCfgMmioDxe.c
-
-[Packages]
-  MdePkg/MdePkg.dec
-  OvmfPkg/OvmfPkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-
-[LibraryClasses]
-  BaseLib
-  BaseMemoryLib
-  DebugLib
-  HobLib
-  IoLib
-  UefiBootServicesTableLib
-
-[Protocols]
-  gFdtClientProtocolGuid## CONSUMES
-
-[Guids]
-  gQemuFirmwareResourceHobGuid
-
-[Depex]
-  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v5 7/8] OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf

2024-04-30 Thread Chao Li
Enable QemuFwCfgMmioDxeLib.inf in RiscVVirtQemu.dsc

Build-tested only (with "RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc 
b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
index 27f24648e8..e0ed6fb9bc 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
+++ b/OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
@@ -78,7 +78,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v5 6/8] ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf

2024-04-30 Thread Chao Li
Enable QemuFwCfgMmioDxeLib.inf in ArmVirtQemu.dsc and
ArmVirtQemuKernel.dsc.

Build-tested only (with "ArmVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Signed-off-by: Chao Li 
---
 ArmVirtPkg/ArmVirtQemu.dsc   | 2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/ArmVirtPkg/ArmVirtQemu.dsc b/ArmVirtPkg/ArmVirtQemu.dsc
index f6f7835955..7e2ff33ad1 100644
--- a/ArmVirtPkg/ArmVirtQemu.dsc
+++ b/ArmVirtPkg/ArmVirtQemu.dsc
@@ -60,7 +60,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
diff --git a/ArmVirtPkg/ArmVirtQemuKernel.dsc b/ArmVirtPkg/ArmVirtQemuKernel.dsc
index 668a65ba64..efe2df97bd 100644
--- a/ArmVirtPkg/ArmVirtQemuKernel.dsc
+++ b/ArmVirtPkg/ArmVirtQemuKernel.dsc
@@ -57,7 +57,7 @@ [LibraryClasses.common]
   # Virtio Support
   VirtioLib|OvmfPkg/Library/VirtioLib/VirtioLib.inf
   
VirtioMmioDeviceLib|OvmfPkg/Library/VirtioMmioDeviceLib/VirtioMmioDeviceLib.inf
-  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
+  QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/BaseQemuFwCfgS3LibNull.inf
   
QemuFwCfgSimpleParserLib|OvmfPkg/Library/QemuFwCfgSimpleParserLib/QemuFwCfgSimpleParserLib.inf
   
QemuLoadImageLib|OvmfPkg/Library/GenericQemuLoadImageLib/GenericQemuLoadImageLib.inf
-- 
2.27.0



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[edk2-devel] [PATCH v5 5/8] OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf

2024-04-30 Thread Chao Li
Copy QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf,
QemuFwCfgLibMmio.inf will be deleted when all platforms switching is
completed.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 .../QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf  | 54 +++
 1 file changed, 54 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
new file mode 100644
index 00..633053aaed
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxeLib.inf
@@ -0,0 +1,54 @@
+## @file
+#
+#  Stateful, implicitly initialized fw_cfg library.
+#
+#  Copyright (C) 2013 - 2014, Red Hat, Inc.
+#  Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
+#  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+  INF_VERSION= 0x00010005
+  BASE_NAME  = QemuFwCfgLib
+  FILE_GUID  = B271F41F-B841-48A9-BA8D-545B4BC2E2BF
+  MODULE_TYPE= BASE
+  VERSION_STRING = 1.0
+  LIBRARY_CLASS  = QemuFwCfgLib|DXE_DRIVER UEFI_DRIVER
+
+  CONSTRUCTOR= QemuFwCfgInitialize
+
+#
+# The following information is for reference only and not required by the build
+# tools.
+#
+#  VALID_ARCHITECTURES   = ARM AARCH64 RISCV64 LOONGARCH64
+#
+
+[Sources]
+  QemuFwCfgLibMmio.c
+  QemuFwCfgMmioDxe.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+  OvmfPkg/OvmfPkg.dec
+  EmbeddedPkg/EmbeddedPkg.dec
+
+[LibraryClasses]
+  BaseLib
+  BaseMemoryLib
+  DebugLib
+  HobLib
+  IoLib
+  UefiBootServicesTableLib
+
+[Protocols]
+  gFdtClientProtocolGuid## CONSUMES
+
+[Guids]
+  gQemuFirmwareResourceHobGuid
+
+[Depex]
+  gFdtClientProtocolGuid
-- 
2.27.0



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[edk2-devel] [PATCH v5 4/8] OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version

2024-04-30 Thread Chao Li
Added the PEI stage library for QemuFwCfgMmioLib, which uses the FDT to
find the fw_cfg and parse it.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Co-authored-by: Xianglai Li 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 236 ++
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  45 
 2 files changed, 281 insertions(+)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
new file mode 100644
index 00..6f35fb4304
--- /dev/null
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
@@ -0,0 +1,236 @@
+/** @file
+
+  Stateful and implicitly initialized fw_cfg library implementation.
+
+  Copyright (C) 2013 - 2014, Red Hat, Inc.
+  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
+  (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include "QemuFwCfgLibMmioInternal.h"
+
+/**
+  To get firmware configure selector address.
+
+  @param VOID
+
+  @retval  firmware configure selector address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgSelectorAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgSelectorAddress;
+}
+
+/**
+  To get firmware configure Data address.
+
+  @param VOID
+
+  @retval  firmware configure data address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDataAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDataAddress;
+}
+
+/**
+  To get firmware DMA address.
+
+  @param VOID
+
+  @retval  firmware DMA address
+**/
+UINTN
+EFIAPI
+QemuGetFwCfgDmaAddress (
+  VOID
+  )
+{
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  ASSERT (FwCfgResource != NULL);
+
+  return FwCfgResource->FwCfgDmaAddress;
+}
+
+RETURN_STATUS
+EFIAPI
+QemuFwCfgInitialize (
+  VOID
+  )
+{
+  VOID  *DeviceTreeBase;
+  INT32 Node;
+  INT32 Prev;
+  UINT32Signature;
+  CONST CHAR8   *Type;
+  INT32 Len;
+  CONST UINT64  *Reg;
+  UINT64FwCfgSelectorAddress;
+  UINT64FwCfgSelectorSize;
+  UINT64FwCfgDataAddress;
+  UINT64FwCfgDataSize;
+  UINT64FwCfgDmaAddress;
+  UINT64FwCfgDmaSize;
+  QEMU_FW_CFG_RESOURCE  *FwCfgResource;
+
+  //
+  // Check whether the Qemu firmware configure resources HOB has been created,
+  // if so use the resources in the HOB.
+  //
+  FwCfgResource = QemuGetFwCfgResourceHob ();
+  if (FwCfgResource != NULL) {
+return RETURN_SUCCESS;
+  }
+
+  DeviceTreeBase = (VOID *)(UINTN)PcdGet64 (PcdDeviceTreeInitialBaseAddress);
+  ASSERT (DeviceTreeBase != NULL);
+  //
+  // Make sure we have a valid device tree blob
+  //
+  ASSERT (fdt_check_header (DeviceTreeBase) == 0);
+
+  //
+  // Create resouce memory
+  //
+  FwCfgResource = AllocateZeroPool (sizeof (QEMU_FW_CFG_RESOURCE));
+  ASSERT (FwCfgResource != NULL);
+
+  for (Prev = 0; ; Prev = Node) {
+Node = fdt_next_node (DeviceTreeBase, Prev, NULL);
+if (Node < 0) {
+  break;
+}
+
+//
+// Check for memory node
+//
+Type = fdt_getprop (DeviceTreeBase, Node, "compatible", &Len);
+if ((Type != NULL) &&
+(AsciiStrnCmp (Type, "qemu,fw-cfg-mmio", Len) == 0))
+{
+  //
+  // Get the 'reg' property of this node. For now, we will assume
+  // two 8 byte quantities for base and size, respectively.
+  //
+  Reg = fdt_getprop (DeviceTreeBase, Node, "reg", &Len);
+  if ((Reg != 0) && (Len == (2 * sizeof (UINT64 {
+FwCfgDataAddress = SwapBytes64 (Reg[0]);
+FwCfgDataSize= 8;
+FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
+FwCfgSelectorSize= 2;
+
+//
+// The following ASSERT()s express
+//
+//   Address + Size - 1 <= MAX_UINTN
+//
+// for both registers, that is, that the last byte in each MMIO range 
is
+// expressible as a MAX_UINTN. The form below is mathematically
+// equivalent, and it also prevents any unsigned overflow before the
+// comparison.
+//
+ASSERT (FwCfgSelectorAddress <= MAX_UINTN - FwCfgSelectorSize + 1);
+ASSERT (FwCfgDataAddress <= MAX_UINTN - FwCfgDataSize + 1);
+
+FwCfgResour

[edk2-devel] [PATCH v5 3/8] OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio

2024-04-30 Thread Chao Li
Added the HOB methods to load and store the QEMU firmware configure
address, data address and DMA address, which are not enabled during the
DXE stage.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 70 +++--
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |  5 +
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 71 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 97 ---
 4 files changed, 216 insertions(+), 27 deletions(-)

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 2a2f3e67ac..6da689b1df 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -3,15 +3,21 @@
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
+  Copyright (c) 2024 Loongson Technology Corporation Limited. All rights 
reserved.
 
   SPDX-License-Identifier: BSD-2-Clause-Patent
 **/
 
+#include 
 #include 
 
+#include 
+#include 
+
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -27,6 +33,50 @@ READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = 
MmioReadBytes;
 WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
 SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
 
+/**
+  Build firmware configure resource HOB.
+
+  @param[in]   FwCfgResource  A pointer to firmware configure resource.
+
+  @retval  VOID
+**/
+VOID
+QemuBuildFwCfgResourceHob (
+  IN QEMU_FW_CFG_RESOURCE  *FwCfgResource
+  )
+{
+  BuildGuidDataHob (
+&gQemuFirmwareResourceHobGuid,
+(VOID *)FwCfgResource,
+sizeof (QEMU_FW_CFG_RESOURCE)
+);
+}
+
+/**
+  Get firmware configure resource in HOB.
+
+  @param VOID
+
+  @retval  non-NULL   The firmware configure resource in HOB.
+   NULL   The firmware configure resource not found.
+**/
+QEMU_FW_CFG_RESOURCE *
+QemuGetFwCfgResourceHob (
+  VOID
+  )
+{
+  EFI_HOB_GUID_TYPE  *GuidHob;
+
+  GuidHob = NULL;
+
+  GuidHob = GetFirstGuidHob (&gQemuFirmwareResourceHobGuid);
+  if (GuidHob == NULL) {
+return NULL;
+  }
+
+  return (QEMU_FW_CFG_RESOURCE *)GET_GUID_HOB_DATA (GuidHob);
+}
+
 /**
   Returns a boolean indicating if the firmware configuration interface
   is available or not.
@@ -43,7 +93,7 @@ QemuFwCfgIsAvailable (
   VOID
   )
 {
-  return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
+  return (BOOLEAN)(QemuGetFwCfgSelectorAddress () != 0 && 
QemuGetFwCfgDataAddress () != 0);
 }
 
 /**
@@ -62,7 +112,7 @@ QemuFwCfgSelectItem (
   )
 {
   if (QemuFwCfgIsAvailable ()) {
-MmioWrite16 (mFwCfgSelectorAddress, SwapBytes16 ((UINT16)QemuFwCfgItem));
+MmioWrite16 (QemuGetFwCfgSelectorAddress (), SwapBytes16 
((UINT16)QemuFwCfgItem));
   }
 }
 
@@ -92,30 +142,30 @@ MmioReadBytes (
 
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
   while (Ptr < End) {
-*(UINT64 *)Ptr = MmioRead64 (mFwCfgDataAddress);
+*(UINT64 *)Ptr = MmioRead64 (QemuGetFwCfgDataAddress ());
 Ptr   += 8;
   }
 
   if (Left & 4) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
 Ptr   += 4;
   }
 
  #else
   while (Ptr < End) {
-*(UINT32 *)Ptr = MmioRead32 (mFwCfgDataAddress);
+*(UINT32 *)Ptr = MmioRead32 (QemuGetFwCfgDataAddress ());
 Ptr   += 4;
   }
 
  #endif
 
   if (Left & 2) {
-*(UINT16 *)Ptr = MmioRead16 (mFwCfgDataAddress);
+*(UINT16 *)Ptr = MmioRead16 (QemuGetFwCfgDataAddress ());
 Ptr   += 2;
   }
 
   if (Left & 1) {
-*Ptr = MmioRead8 (mFwCfgDataAddress);
+*Ptr = MmioRead8 (QemuGetFwCfgDataAddress ());
   }
 }
 
@@ -168,9 +218,9 @@ DmaTransferBytes (
   // This will fire off the transfer.
   //
  #if defined (MDE_CPU_AARCH64) || defined (MDE_CPU_RISCV64) || defined 
(MDE_CPU_LOONGARCH64)
-  MmioWrite64 (mFwCfgDmaAddress, SwapBytes64 ((UINT64)&Access));
+  MmioWrite64 (QemuGetFwCfgDmaAddress (), SwapBytes64 ((UINT64)&Access));
  #else
-  MmioWrite32 ((UINT32)(mFwCfgDmaAddress + 4), SwapBytes32 ((UINT32)&Access));
+  MmioWrite32 ((UINT32)(QemuGetFwCfgDmaAddress () + 4), SwapBytes32 
((UINT32)&Access));
  #endif
 
   //
@@ -239,7 +289,7 @@ MmioWriteBytes (
   UINTN  Idx;
 
   for (Idx = 0; Idx < Size; ++Idx) {
-MmioWrite8 (mFwCfgDataAddress, ((UINT8 *)Buffer)[Idx]);
+MmioWrite8 (QemuGetFwCfgDataAddress (), ((UINT8 *)Buffer)[Idx]);
   }
 }
 
diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf
index b3017aef80

[edk2-devel] [PATCH v5 2/8] OvmfPkg: Separate QemuFwCfgLibMmio.c into two files

2024-04-30 Thread Chao Li
Separate QemuFwCfgLibMmio.c into two files named QemuFwCfgLibMmio.c and
QemuFwCfgLibMmioDxe.c, added a new header named
QemuFwCfgLibMmioInternal.h for MMIO version.

Some DXE stage variables became non-static in this patch, they will be
restored to static in the next patch.

Build-tested only (with "ArmVirtQemu.dsc and RiscVVirtQemu.dsc").

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 
Signed-off-by: Chao Li 
---
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 192 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.inf |   3 +-
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 173 
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 145 +
 4 files changed, 327 insertions(+), 186 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c

diff --git a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c 
b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
index 115a210759..2a2f3e67ac 100644
--- a/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
+++ b/OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmio.c
@@ -1,7 +1,5 @@
 /** @file
 
-  Stateful and implicitly initialized fw_cfg library implementation.
-
   Copyright (C) 2013 - 2014, Red Hat, Inc.
   Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.
   (C) Copyright 2021 Hewlett Packard Enterprise Development LP
@@ -20,63 +18,14 @@
 
 #include 
 
-STATIC UINTN  mFwCfgSelectorAddress;
-STATIC UINTN  mFwCfgDataAddress;
-STATIC UINTN  mFwCfgDmaAddress;
-
-/**
-  Reads firmware configuration bytes into a buffer
-
-  @param[in] SizeSize in bytes to read
-  @param[in] Buffer  Buffer to store data into  (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI READ_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Writes bytes from a buffer to firmware configuration
-
-  @param[in] SizeSize in bytes to write
-  @param[in] Buffer  Buffer to transfer data from (OPTIONAL if Size is 0)
-
-**/
-typedef
-VOID(EFIAPI WRITE_BYTES_FUNCTION)(
-  IN UINTN Size,
-  IN VOID  *Buffer OPTIONAL
-  );
-
-/**
-  Skips bytes in firmware configuration
-
-  @param[in] Size  Size in bytes to skip
-
-**/
-typedef
-VOID(EFIAPI SKIP_BYTES_FUNCTION)(
-  IN UINTN Size
-  );
-
-//
-// Forward declaration of the two implementations we have.
-//
-STATIC READ_BYTES_FUNCTION   MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   MmioSkipBytes;
-STATIC READ_BYTES_FUNCTION   DmaReadBytes;
-STATIC WRITE_BYTES_FUNCTION  DmaWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   DmaSkipBytes;
+#include "QemuFwCfgLibMmioInternal.h"
 
 //
 // These correspond to the implementation we detect at runtime.
 //
-STATIC READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
-STATIC WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
-STATIC SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
+READ_BYTES_FUNCTION   *InternalQemuFwCfgReadBytes  = MmioReadBytes;
+WRITE_BYTES_FUNCTION  *InternalQemuFwCfgWriteBytes = MmioWriteBytes;
+SKIP_BYTES_FUNCTION   *InternalQemuFwCfgSkipBytes  = MmioSkipBytes;
 
 /**
   Returns a boolean indicating if the firmware configuration interface
@@ -97,126 +46,6 @@ QemuFwCfgIsAvailable (
   return (BOOLEAN)(mFwCfgSelectorAddress != 0 && mFwCfgDataAddress != 0);
 }
 
-RETURN_STATUS
-EFIAPI
-QemuFwCfgInitialize (
-  VOID
-  )
-{
-  EFI_STATUS   Status;
-  FDT_CLIENT_PROTOCOL  *FdtClient;
-  CONST UINT64 *Reg;
-  UINT32   RegSize;
-  UINTNAddressCells, SizeCells;
-  UINT64   FwCfgSelectorAddress;
-  UINT64   FwCfgSelectorSize;
-  UINT64   FwCfgDataAddress;
-  UINT64   FwCfgDataSize;
-  UINT64   FwCfgDmaAddress;
-  UINT64   FwCfgDmaSize;
-
-  Status = gBS->LocateProtocol (
-  &gFdtClientProtocolGuid,
-  NULL,
-  (VOID **)&FdtClient
-  );
-  ASSERT_EFI_ERROR (Status);
-
-  Status = FdtClient->FindCompatibleNodeReg (
-FdtClient,
-"qemu,fw-cfg-mmio",
-(CONST VOID **)&Reg,
-&AddressCells,
-&SizeCells,
-&RegSize
-);
-  if (EFI_ERROR (Status)) {
-DEBUG ((
-  DEBUG_WARN,
-  "%a: No 'qemu,fw-cfg-mmio' compatible DT node found (Status == %r)\n",
-  __func__,
-  Status
-  ));
-return EFI_SUCCESS;
-  }
-
-  ASSERT (AddressCells == 2);
-  ASSERT (SizeCells == 2);
-  ASSERT (RegSize == 2 * sizeof (UINT64));
-
-  FwCfgDataAddress = SwapBytes64 (Reg[0]);
-  FwCfgDataSize= 8;
-  FwCfgSelectorAddress = FwCfgDataAddress + FwCfgDataSize;
-  FwCfgSelecto

[edk2-devel] [PATCH v5 1/8] OvmfPkg: Add a GUID for QemuFwCfgLib

2024-04-30 Thread Chao Li
Added a new GUID for QemuFwCfgLib MMIO version, called
gQemuFirmwareResourceHobGuid, which is used to save QEMU firmware
configure resource during PEI stage.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Signed-off-by: Chao Li 
---
 OvmfPkg/OvmfPkg.dec | 1 +
 1 file changed, 1 insertion(+)

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index 2f7bded926..731f67b727 100644
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -167,6 +167,7 @@ [Guids]
   gUefiOvmfPkgTdxAcpiHobGuid= {0x6a0c5870, 0xd4ed, 0x44f4, {0xa1, 
0x35, 0xdd, 0x23, 0x8b, 0x6f, 0x0c, 0x8d}}
   gEfiNonCcFvGuid   = {0xae047c6d, 0xbce9, 0x426c, {0xae, 
0x03, 0xa6, 0x8e, 0x3b, 0x8a, 0x04, 0x88}}
   gOvmfVariableGuid = {0x50bea1e5, 0xa2c5, 0x46e9, {0x9b, 
0x3a, 0x59, 0x59, 0x65, 0x16, 0xb0, 0x0a}}
+  gQemuFirmwareResourceHobGuid  = {0x3cc47b04, 0x0d3e, 0xaa64, {0x06, 
0xa6, 0x4b, 0xdc, 0x9a, 0x2c, 0x61, 0x19}}
 
 [Ppis]
   # PPI whose presence in the PPI database signals that the TPM base address
-- 
2.27.0



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[edk2-devel] [PATCH v5 0/8] Adjust the QemuFwCfgLibMmio and add PEI stage

2024-04-30 Thread Chao Li
Patch1: Added three PCDs for QemuFwCfgLibMmio
Patch2: Sparate QemuFwCfgLibMmio.c into two files and default as DXE
stage library.
Patch3: Added QemuFwCfgMmiLib PEI version
Patch4: Rename QemuFwCfgLibMmio.inf to QemuFwCfgMmioDxeLib.inf and
enable it in AARCH64 and RISCV64.

V1 -> V2:
1. Use HOBs instead of PCD.
2. The old patch2 is divided into two parts, one is code splitting, and
the other is functional changes.
3. add two patches to keep the safe when change the platform DSC file.

V2 -> V3:
1. Merge three HOBs into a single HOB.
2. Remove the dynamic global variables in PEI.

V3 -> V4:
1. Adjust the HOB content, this version saves all of structual contents
in HOB.
2. Remove the Loongson copyright in separation patch, and add it in the
funciton change patch.
3. Restored some variables as static in DXE version.
4. Added the HOB GUID in OvmfPkg.dec.

V4 -> V5
1. Adjust the PEI version some logic error, it will built the HOB after
the QEMU check passes.
2. Adjust some code style.
3. Remove the architecture comment in PEI INF.
4. Reoder the PEI INF in alphabetical order.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4755

PR: https://github.com/tianocore/edk2/pull/5568

Cc: Ard Biesheuvel 
Cc: Jiewen Yao 
Cc: Gerd Hoffmann 
Cc: Leif Lindholm 
Cc: Sami Mujawar 
Cc: Sunil V L 
Cc: Andrei Warkentin 

Chao Li (8):
  OvmfPkg: Add a GUID for QemuFwCfgLib
  OvmfPkg: Separate QemuFwCfgLibMmio.c into two files
  OvmfPkg: Add the way of HOBs in QemuFwCfgLibMmio
  OvmfPkg: Add the QemuFwCfgMmioLib PEI stage version
  OvmfPkg: Copy the same new INF as QemuFwCfgLibMmio.inf
  ArmVirtPkg: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg/RiscVVirt: Enable QemuFwCfgMmioDxeLib.inf
  OvmfPkg: Remove QemuFwCfgLibMmio.inf

 ArmVirtPkg/ArmVirtQemu.dsc|   2 +-
 ArmVirtPkg/ArmVirtQemuKernel.dsc  |   2 +-
 .../Library/QemuFwCfgLib/QemuFwCfgLibMmio.c   | 244 +-
 .../QemuFwCfgLib/QemuFwCfgLibMmioInternal.h   | 238 +
 .../Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c   | 214 +++
 ...CfgLibMmio.inf => QemuFwCfgMmioDxeLib.inf} |   8 +-
 .../Library/QemuFwCfgLib/QemuFwCfgMmioPei.c   | 236 +
 .../QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf  |  45 
 OvmfPkg/OvmfPkg.dec   |   1 +
 OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc   |   2 +-
 10 files changed, 802 insertions(+), 190 deletions(-)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgLibMmioInternal.h
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioDxe.c
 rename OvmfPkg/Library/QemuFwCfgLib/{QemuFwCfgLibMmio.inf => 
QemuFwCfgMmioDxeLib.inf} (78%)
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPei.c
 create mode 100644 OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgMmioPeiLib.inf

-- 
2.27.0



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Re: [edk2-devel] [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Handle the NULL gMpInformation2HobGuid

2024-04-30 Thread Abdul Lateef Attar via groups.io

Hi Ray,

    Some of AMD platform doesnt use CpuMpPeim.

Also this patch helps not to enforce the platform to brinup all AP's in 
PEI phase.



Thanks

AbduL


On 30-04-2024 11:17, Ni, Ray wrote:



Caution: This message originated from an External Source. Use proper 
caution when opening attachments, clicking links, or responding.



Abdul,
Does Amd PEI include the CpuMpPeim?
If it includes the PEIM, the MpInformation2Hob should be in the HOB 
database.


Thanks,
Ray

*From:* Abdul Lateef Attar 
*Sent:* Monday, April 29, 2024 19:17
*To:* devel@edk2.groups.io 
*Cc:* Abdul Lateef Attar ; Ni, Ray 
; Laszlo Ersek ; Kumar, Rahul R 
; Gerd Hoffmann 
*Subject:* [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Handle the NULL 
gMpInformation2HobGuid

If gMpInformation2HobGuid HOB is NULL,
then fall back to an older way of collecting
CPU information from the MP services library.

Cc: Ray Ni 
Cc: Laszlo Ersek 
Cc: Rahul Kumar 
Cc: Gerd Hoffmann 
Signed-off-by: Abdul Lateef Attar 
---
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c   | 87 +++-
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf |  3 +-
 2 files changed, 87 insertions(+), 3 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c 
b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c

index 499f979d34..74e494f332 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -3,7 +3,7 @@ Agent Module to load other modules to deploy SMM Entry 
Vector for X86 CPU.


 Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.
 Copyright (c) 2017, AMD Incorporated. All rights reserved.
-Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights 
reserved.


 SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -750,6 +750,85 @@ MpInformation2HobCompare (
   return 0;
 }

+/**
+  Extract NumberOfCpus, MaxNumberOfCpus and EFI_PROCESSOR_INFORMATION 
for all CPU from gEfiMpServiceProtocolGuid.

+
+  @param[out] NumberOfCpus   Pointer to NumberOfCpus.
+  @param[out] MaxNumberOfCpus    Pointer to MaxNumberOfCpus.
+
+  @retval ProcessorInfo  Pointer to 
EFI_PROCESSOR_INFORMATION buffer.

+**/
+EFI_PROCESSOR_INFORMATION *
+GetMpInformationFromMpServices (
+  OUT UINTN  *NumberOfCpus,
+  OUT UINTN  *MaxNumberOfCpus
+  )
+{
+  EFI_STATUS Status;
+  UINTN  Index;
+  UINTN  NumberOfEnabledProcessors;
+  UINTN  NumberOfProcessors;
+  EFI_MP_SERVICES_PROTOCOL   *MpService;
+  EFI_PROCESSOR_INFORMATION  *ProcessorInfo;
+
+  if ((NumberOfCpus == NULL) || (MaxNumberOfCpus == NULL)) {
+    ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER);
+    return NULL;
+  }
+
+  ProcessorInfo    = NULL;
+  *NumberOfCpus    = 0;
+  *MaxNumberOfCpus = 0;
+
+  /// Get the MP Services Protocol
+  Status = gBS->LocateProtocol (&gEfiMpServiceProtocolGuid, NULL, 
(VOID **)&MpService);

+  if (EFI_ERROR (Status)) {
+    ASSERT_EFI_ERROR (Status);
+    return NULL;
+  }
+
+  /// Get the number of processors
+  Status = MpService->GetNumberOfProcessors (MpService, 
&NumberOfProcessors, &NumberOfEnabledProcessors);

+  if (EFI_ERROR (Status)) {
+    ASSERT_EFI_ERROR (Status);
+    return NULL;
+  }
+
+  ASSERT (NumberOfProcessors <= PcdGet32 
(PcdCpuMaxLogicalProcessorNumber));

+
+  /// Allocate buffer for processor information
+  ProcessorInfo = AllocateZeroPool (sizeof 
(EFI_PROCESSOR_INFORMATION) * NumberOfProcessors);

+  if (ProcessorInfo == NULL) {
+    ASSERT_EFI_ERROR (EFI_OUT_OF_RESOURCES);
+    return NULL;
+  }
+
+  /// Get processor information
+  for (Index = 0; Index < NumberOfProcessors; Index++) {
+    Status = MpService->GetProcessorInfo (MpService, Index | 
CPU_V2_EXTENDED_TOPOLOGY, &ProcessorInfo[Index]);

+    if (EFI_ERROR (Status)) {
+  FreePool (ProcessorInfo);
+  DEBUG ((DEBUG_ERROR, "%a: Failed to get processor information 
for processor %d\n", __func__, Index));

+  ASSERT_EFI_ERROR (Status);
+  return NULL;
+    }
+  }
+
+  *NumberOfCpus = NumberOfEnabledProcessors;
+
+  ASSERT (*NumberOfCpus <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));
+  //
+  // If support CPU hot plug, we need to allocate resources for 
possibly hot-added processors

+  //
+  if (FeaturePcdGet (PcdCpuHotPlugSupport)) {
+    *MaxNumberOfCpus = PcdGet32 (PcdCpuMaxLogicalProcessorNumber);
+  } else {
+    *MaxNumberOfCpus = *NumberOfCpus;
+  }
+
+  return ProcessorInfo;
+}
+
 /**
   Extract NumberOfCpus, MaxNumberOfCpus and EFI_PROCESSOR_INFORMATION 
for all CPU from MpInformation2 HOB.


@@ -784,7 +863,11 @@ GetMpInformation (
   HobCount  = 0;

   FirstMpInfo2Hob = GetFirstGuidHob (&gMpInformation2HobGuid);
-  ASSERT (FirstMpInfo2Hob != NULL);
+  if (FirstMpInfo2Hob == NULL) {
+    DEBUG ((DEBUG_INFO, "%a: [INFO] gMpInformation2HobGuid HOB not 
found.\n", __func__));
+    return

Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: Remove the dependency with MinPlatform

2024-04-30 Thread Abdul Lateef Attar via groups.io

Reviewed-by: Abdul Lateef Attar 

On 29-04-2024 10:31, abner.ch...@amd.com wrote:

From: Abner Chang

BZ# 4695

Signed-off-by: Abner Chang
Cc: Abdul Lateef Attar
Cc: Nickle Wang
---
  .../ManageabilityPkg/ManageabilityPkg.dsc | 72 ++-
  1 file changed, 56 insertions(+), 16 deletions(-)

diff --git a/Features/ManageabilityPkg/ManageabilityPkg.dsc 
b/Features/ManageabilityPkg/ManageabilityPkg.dsc
index 87b32f1182..8608450a3b 100644
--- a/Features/ManageabilityPkg/ManageabilityPkg.dsc
+++ b/Features/ManageabilityPkg/ManageabilityPkg.dsc
@@ -3,7 +3,7 @@
  # This is the package provides edk2 drivers and libraries
  # those are related to the platform management.
  #
-# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+# Copyright (C) 2023-2024 Advanced Micro Devices, Inc. All rights reserved.
  # SPDX-License-Identifier: BSD-2-Clause-Patent
  #
  ##
@@ -18,15 +18,7 @@
BUILD_TARGETS  = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER   = DEFAULT
  
-[Packages]

-  MinPlatformPkg/MinPlatformPkg.dec
-
  [PcdsFeatureFlag]
-  #
-  # MinPlatform common include currently required PCD
-  #
-  gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable   
|FALSE
-  gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable  
|FALSE
  
#

# Manageability modules
@@ -45,19 +37,67 @@
gManageabilityPkgTokenSpaceGuid.PcdManageabilityPeiIpmiFrb 
|TRUE
gManageabilityPkgTokenSpaceGuid.PcdManageabilityDxeIpmiBmcAcpi 
|TRUE
  
-#

-# Include common libraries
-#
-!include MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc
-!include MinPlatformPkg/Include/Dsc/CorePeiLib.dsc
-!include MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc
-
  [Components]

ManageabilityPkg/Library/ManageabilityTransportKcsLib/Dxe/DxeManageabilityTransportKcs.inf

ManageabilityPkg/Library/ManageabilityTransportMctpLib/Dxe/DxeManageabilityTransportMctp.inf
ManageabilityPkg/Library/PldmProtocolLibrary/Dxe/PldmProtocolLib.inf
ManageabilityPkg/Library/IpmiCommandLib/IpmiCommandLib.inf
  
+  #

+  # Generic EDKII Lib
+  #
+
+!include MdePkg/MdeLibs.dsc.inc
+
+[LibraryClasses.common]
+
+  #
+  # Entry point
+  #
+  
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+  PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+  #
+  # Basic
+  #
+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+  BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+  #
+  # UEFI & PI
+  #
+  
UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+  
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+  
PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+  
DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+  #
+  # Misc
+  #
+  DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+  
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+  
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+  
DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+  
OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+
+[LibraryClasses.common.DXE_SMM_DRIVER]
+  
SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
+  MmServicesTableLib|MdePkg/Library/MmServicesTableLib/MmServicesTableLib.inf
+  
ReportStatusCodeLib|MdeModulePkg/Library/SmmReportStatusCodeLib/SmmReportStatusCodeLib.inf
+  
MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
+
+[LibraryClasses.common.SEC, LibraryClasses.common.PEI_CORE, 
LibraryClasses.common.PEIM]
+  
S3BootScriptLib|MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.inf
+  PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+  
MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+  
ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLibBase.inf
+
  [LibraryClasses]

ManageabilityTransportLib|ManageabilityPkg/Library/BaseManageabilityTransportNullLib/BaseManageabilityTransportNull.inf
IpmiLib|MdeModulePkg/Library/BaseIpmiLibNull/BaseIpmiLibNull.inf



-=