Re: [edk2-devel] [PATCH 0/5] AmdMinBoardPkg: AMD board specific modules

[Chang, Abner via groups.io]

[AMD Official Use Only - AMD Internal Distribution Only]

Already reviewed internally.
Reviewed-by: Abner Chang 

Hi Abdul, please add the tag [edk2-platforms] in subject next time when send 
the patch for edk2-platforms changes.
Thanks
Abner

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Abdul
> Lateef Attar via groups.io
> Sent: Friday, May 17, 2024 11:49 AM
> To: devel@edk2.groups.io
> Cc: Attar, AbdulLateef (Abdul Lateef) ; Chang,
> Abner ; Grimes, Paul 
> Subject: [edk2-devel] [PATCH 0/5] AmdMinBoardPkg: AMD board specific
> modules
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> PR: https://github.com/tianocore/edk2-platforms/pull/143
> Adds various module common to AMD boards.
> Cc: Abner Chang 
> Cc: Paul Grimes 
>
> Abdul Lateef Attar (5):
>   AmdMinBoardPkg: Uncrustify PciHotPlug module
>   AmdMinBoardPkg/Library: Uncrustify the Library module
>   AmdMinBoardPkg: Implement BoardInitLib for PEI phase
>   AmdMinBoardPkg: Implement BoardInitLib for DXE phase
>   AmdMinBoardPkg: Implements BoardBdsHookLib library
>
>  .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec |   10 +
>  .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc |   10 +-
>  .../Include/Library/AmdBoardBdsHookLib.h  |  130 ++
>  .../Library/BoardBdsHookLib/BoardBdsHook.h|  242 +++
>  .../Library/BoardBdsHookLib/BoardBdsHookLib.c | 1712
> +
>  .../BoardBdsHookLib/BoardBdsHookLib.inf   |  105 +
>  .../Library/BoardBdsHookLib/BoardBootOption.c |  754 
>  .../Library/BoardBdsHookLib/BoardMemoryTest.c |   83 +
>  .../Library/DxeBoardInitLib/DxeBoardInitLib.c |  253 +++
>  .../DxeBoardInitLib/DxeBoardInitLib.inf   |   51 +
>  .../DxeBoardInitLib/DxeBoardInitLibInternal.c |  306 +++
>  .../DxeBoardInitLib/DxeBoardInitLibInternal.h |  159 ++
>  .../DxeBoardInitLib/MadtAcpiTablePatch.c  |  243 +++
>  .../PeiBoardInitPreMemLib/AmdMemoryInfoHob.h  |   50 +
>  .../PeiBoardInitPreMemLib.c   |  229 +++
>  .../PeiBoardInitPreMemLib.inf |   45 +
>  .../PeiBoardInitPreMemLib/PeiMemoryInit.c |  198 ++
>  .../PeiBoardInitPreMemLib/PeiMemoryInit.h |   50 +
>  .../Library/PeiReportFvLib/PeiReportFvLib.c   |   12 +-
>  .../Library/SetCacheMtrrLib/SetCacheMtrrLib.c |3 +-
>  .../PciHotPlug/PciHotPlugInit.c   |4 +-
>  .../PciHotPlug/PciHotPlugInit.inf |5 +-
>  22 files changed, 4647 insertions(+), 7 deletions(-)
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Include/Library/AmdBoardBdsHookLib.h
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHook.
> h
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLi
> b.c
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLi
> b.inf
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBootOptio
> n.c
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardMemoryT
> est.c
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.c
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.in
> f
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLibIn
> ternal.c
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLibIn
> ternal.h
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/MadtAcpiTablePat
> ch.c
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMem
> oryInfoHob.h
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardI
> nitPreMemLib.c
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardI
> nitPreMemLib.inf
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemor
> yInit.c
>  create mode 100644
> Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemor
> yInit.h
>
> --
> 2.34.1
>
>
>
> 
>



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Re: [edk2-devel] [PATCH v2] MdeModulePkg/PciBusDxe: plug device hierarchy leak upon bridge hot-unplug

[Ni, Ray]

Thanks for confirming.

Thanks,
Ray

From: Ding, Feng (Sunnyvale) 
Sent: Friday, May 17, 2024 8:39
To: Ni, Ray ; Hsueh, Hong-Chih (Neo) 
; Laszlo Ersek ; 
devel@edk2.groups.io 
Cc: He, Jiangang ; Chang, Abner ; 
gaolim...@byosoft.com.cn 
Subject: RE: [PATCH v2] MdeModulePkg/PciBusDxe: plug device hierarchy leak upon 
bridge hot-unplug


[AMD Official Use Only - AMD Internal Distribution Only]


Hi Ray,



You are right. The change is NOT necessary.



Thanks

feng



From: Ni, Ray 
Sent: Tuesday, May 7, 2024 8:26 PM
To: Hsueh, Hong-Chih (Neo) ; Laszlo Ersek 
; devel@edk2.groups.io
Cc: Ding, Feng (Sunnyvale) ; He, Jiangang 
; Chang, Abner ; 
gaolim...@byosoft.com.cn
Subject: Re: [PATCH v2] MdeModulePkg/PciBusDxe: plug device hierarchy leak upon 
bridge hot-unplug



Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.



Neo,

I don't think your change is needed because of the following existing logic 
where RemoveAllPciDeviceOnBridge() is called to destroy/free all PCI nodes.







  if (Operation == EfiPciHotplugRequestRemove) {



if (*NumberOfChildren == 0) {



  //



  // Remove all devices on the bridge



  //



  RemoveAllPciDeviceOnBridge (RootBridgeHandle, Bridge);



  return EFI_SUCCESS;



}





Thanks,

Ray



From: Hsueh, Hong-Chih (Neo) 
mailto:hong-chih.hs...@amd.com>>
Sent: Wednesday, May 1, 2024 2:24
To: Laszlo Ersek mailto:ler...@redhat.com>>; 
devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>; Ni, Ray 
mailto:ray...@intel.com>>
Cc: Ding, Feng (Sunnyvale) mailto:feng1.d...@amd.com>>; He, 
Jiangang mailto:jiangang...@amd.com>>; Chang, Abner 
mailto:abner.ch...@amd.com>>; 
gaolim...@byosoft.com.cn 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [PATCH v2] MdeModulePkg/PciBusDxe: plug device hierarchy leak upon 
bridge hot-unplug



[AMD Official Use Only - General]



Hi @ray...@intel.com,



Sorry you bother you, may I have your feedback for this patch?

If it looks good to you could you help to give me an R-b ?



Thank you.



Regards,

Neo





From: Laszlo Ersek mailto:ler...@redhat.com>>
Sent: Sunday, February 25, 2024 7:59 AM
To: Hsueh, Hong-Chih (Neo) 
mailto:hong-chih.hs...@amd.com>>; 
devel@edk2.groups.io 
mailto:devel@edk2.groups.io>>
Cc: Ding, Feng (Sunnyvale) mailto:feng1.d...@amd.com>>; He, 
Jiangang mailto:jiangang...@amd.com>>; Chang, Abner 
mailto:abner.ch...@amd.com>>; 
ray...@intel.com 
mailto:ray...@intel.com>>; 
gaolim...@byosoft.com.cn 
mailto:gaolim...@byosoft.com.cn>>
Subject: Re: [PATCH v2] MdeModulePkg/PciBusDxe: plug device hierarchy leak upon 
bridge hot-unplug



Caution: This message originated from an External Source. Use proper caution 
when opening attachments, clicking links, or responding.


On 2/22/24 17:28, Neo Hsueh wrote:
> A USB4 or TBT bridge can be plugged or unplugged on USB4 port. The actions 
> require PciHotPlugRequestNotify to add a root bridge or remove a root bridge 
> completely.
> In the plug-unplug-plug scenerio, PciHotPlugRequestNotify will return with 
> no-action on second plug because bridge tree shows configured.
> Destroy Pci Device Tree in function PciHotPlugRequestNotify for unplug event 
> to fix this issue.
>
> Cc: Feng Ding mailto:feng1.d...@amd.com>>
> Cc: Jiangang He mailto:jiangang...@amd.com>>
> Signed-off-by: Neo Hsueh 
> mailto:hong-chih.hs...@amd.com>>
> ---
>  MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c 
> b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> index 3f8c6e6da7..2b7af60e0a 100644
> --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
> @@ -2103,6 +2103,8 @@ PciHotPlugRequestNotify (
>}
>  }
>
> +DestroyPciDeviceTree (Bridge);
> +
>  //
>  // End for
>  //

This looks convincing to me, but I don't now nearly enough about
PciBusDxe internals (resource management in particular) to confidently
approve this patch. I can give an

Acked-by: Laszlo Ersek mailto:ler...@redhat.com>>

but the patch should not be merged until Ray provides an R-b.

Laszlo


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Re: [edk2-devel] [PATCH] OvmfPkg: Update VMM Hob list check to support new resource attributes

[Du Lin]

Thanks for the review and approval. Could you please help merge this patch to 
the upstream? A pull request has been created for this patch: 
https://github.com/tianocore/edk2/pull/5644. Thanks.


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[edk2-devel] [PATCH 5/5] AmdMinBoardPkg: Implements BoardBdsHookLib library

[Abdul Lateef Attar via groups.io]

Implements BoardBdsHookLib library class for AMD platforms.

Cc: Abner Chang 
Cc: Paul Grimes 
Signed-off-by: Abdul Lateef Attar 
---
 .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec |   10 +
 .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc |2 +
 .../Include/Library/AmdBoardBdsHookLib.h  |  130 ++
 .../Library/BoardBdsHookLib/BoardBdsHook.h|  242 +++
 .../Library/BoardBdsHookLib/BoardBdsHookLib.c | 1712 +
 .../BoardBdsHookLib/BoardBdsHookLib.inf   |  105 +
 .../Library/BoardBdsHookLib/BoardBootOption.c |  754 
 .../Library/BoardBdsHookLib/BoardMemoryTest.c |   83 +
 8 files changed, 3038 insertions(+)
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Include/Library/AmdBoardBdsHookLib.h
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHook.h
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.inf
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBootOption.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardMemoryTest.c

diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec 
b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
index 03d1d77c34..47ec5b4b56 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec
@@ -17,9 +17,19 @@
   PACKAGE_GUID   = 44F9D761-9ECB-43DD-A5AC-177E5048701B
   PACKAGE_VERSION= 0.1
 
+[Includes]
+  Include
+
 [Guids]
   gAmdMinBoardPkgTokenSpaceGuid  = {0xd4d23d79, 0x73bf, 0x460a, {0xa1, 0xc7, 
0x85, 0xa3, 0xca, 0x71, 0xb9, 0x4c}}
 
+[LibraryClasses]
+  ##  @libraryclassProvide services to platform BDS hook.
+  BoardBdsHookLib|Include/Library/AmdBoardBdsHookLib.h
+
+[Protocols]
+  gAmdBoardBdsBootOptionPriorityProtocolGuid = { 0x5806db97, 0x5303, 0x409f, { 
0x8f, 0x09, 0xab, 0x29, 0xd8, 0x07, 0xa3, 0xf1}}
+
 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
   #
   # PCI HotPlug Resource Padding
diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc 
b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
index e0afe1e755..e002e78f21 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
@@ -41,6 +41,7 @@
   
BoardInitLib|AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
 
 [LibraryClasses.common.DXE_DRIVER]
+  BoardBdsHookLib|AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.inf
   BoardInitLib|AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.inf
 
 [Components]
@@ -53,4 +54,5 @@
 
 [Components.X64]
   AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.inf
+  AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.inf
   AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
\ No newline at end of file
diff --git a/Platform/AMD/AmdMinBoardPkg/Include/Library/AmdBoardBdsHookLib.h 
b/Platform/AMD/AmdMinBoardPkg/Include/Library/AmdBoardBdsHookLib.h
new file mode 100644
index 00..6bfa4747e0
--- /dev/null
+++ b/Platform/AMD/AmdMinBoardPkg/Include/Library/AmdBoardBdsHookLib.h
@@ -0,0 +1,130 @@
+/** @file
+  Header file for BDS Hook Library
+
+  Copyright (c) 2020, Intel Corporation. All rights reserved.
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef AMD_BOARD_BDS_HOOK_LIB_H_
+#define AMD_BOARD_BDS_HOOK_LIB_H_
+
+#include 
+#include 
+#include 
+#include 
+
+#define AMD_BOARD_BDS_BOOT_OPTION_PRIORITY_PROTOCOL_GUID\
+  { 0x5806db97, 0x5303, 0x409f, \
+{ 0x8f, 0x09, 0xab, 0x29, 0xd8, 0x07, 0xa3, 0xf1 }}
+
+/*
+  This protocol is introduced so the platform can give certain boot options
+  a custom priority value. Useful in boot overrides, or when IPMI doesn't 
inherently
+  support a specific boot override needed by the platform.
+*/
+struct _AMD_BOARD_BDS_BOOT_OPTION_PRIORITY_PROTOCOL {
+  UINT8   IpmiBootDeviceSelectorType;
+  SORT_COMPARECompare;
+};
+
+typedef struct _AMD_BOARD_BDS_BOOT_OPTION_PRIORITY_PROTOCOL 
AMD_BOARD_BDS_BOOT_OPTION_PRIORITY_PROTOCOL;
+
+extern EFI_GUID  gAmdBoardBdsBootOptionPriorityProtocolGuid;
+
+/**
+  Returns the boot option type of a device
+
+  @param[in] DevicePath The path of device whose boot option type
+should be returned
+  @retval -1Device type not found
+  @retval > -1  Device type found
+**/
+UINT8
+BootOptionType (
+  IN EFI_DEVICE_PATH_PROTOCOL  *DevicePath
+  );
+
+/**
+  This is the callback function for Bds Ready To Boot event.
+
+  @param[in]  Event   Pointer to this event
+  @param[in]  Context Event handler private data
+
+  @retval None.
+**/
+VOID
+EFIAPI
+BdsReadyToBootCallback (
+  IN  EFI_EVENT  Event,
+  IN  VOID   *Context
+  );
+
+/**
+  This is the callback function for 

[edk2-devel] [PATCH 4/5] AmdMinBoardPkg: Implement BoardInitLib for DXE phase

[Abdul Lateef Attar via groups.io]

DxeBoardInitLib library provides board-specific
initialization functions for the DXE phase.

Cc: Abner Chang 
Cc: Paul Grimes 
Signed-off-by: Abdul Lateef Attar 
---
 .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc |   6 +-
 .../Library/DxeBoardInitLib/DxeBoardInitLib.c | 253 +++
 .../DxeBoardInitLib/DxeBoardInitLib.inf   |  51 +++
 .../DxeBoardInitLib/DxeBoardInitLibInternal.c | 306 ++
 .../DxeBoardInitLib/DxeBoardInitLibInternal.h | 159 +
 .../DxeBoardInitLib/MadtAcpiTablePatch.c  | 243 ++
 6 files changed, 1017 insertions(+), 1 deletion(-)
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.inf
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLibInternal.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLibInternal.h
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/MadtAcpiTablePatch.c

diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc 
b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
index 335e875f70..e0afe1e755 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
@@ -40,6 +40,9 @@
   SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
   
BoardInitLib|AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
 
+[LibraryClasses.common.DXE_DRIVER]
+  BoardInitLib|AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.inf
+
 [Components]
   AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
 
@@ -49,4 +52,5 @@
   AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
 
 [Components.X64]
-  AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
+  AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.inf
+  AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
\ No newline at end of file
diff --git 
a/Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.c 
b/Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.c
new file mode 100644
index 00..7c41d3e38b
--- /dev/null
+++ b/Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.c
@@ -0,0 +1,253 @@
+/** @file
+  BoardInitLib library implementation for DXE phase.
+
+  Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include "DxeBoardInitLibInternal.h"
+
+EFI_HANDLEmImageHandle;
+EFI_SYSTEM_TABLE  *mSystemTable;
+
+/**
+  This board service detects the board type.
+
+  @retval EFI_SUCCESS   The board was detected successfully.
+  @retval EFI_NOT_FOUND The board could not be detected.
+**/
+EFI_STATUS
+EFIAPI
+BoardDetect (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  This board service initializes board-specific debug devices.
+
+  @retval EFI_SUCCESS   Board-specific debug initialization was successful.
+  @retval EFI_NOT_READY The board has not been detected yet.
+**/
+EFI_STATUS
+EFIAPI
+BoardDebugInit (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  This board service detects the boot mode.
+
+  @retval EFI_BOOT_MODE The boot mode.
+  @retval EFI_NOT_READY The board has not been detected yet.
+**/
+EFI_BOOT_MODE
+EFIAPI
+BoardBootModeDetect (
+  VOID
+  )
+{
+  return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+/**
+  A hook for board-specific initialization prior to memory initialization.
+
+  @retval EFI_SUCCESS   The board initialization was successful.
+  @retval EFI_NOT_READY The board has not been detected yet.
+**/
+EFI_STATUS
+EFIAPI
+BoardInitBeforeMemoryInit (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  A hook for board-specific initialization after memory initialization.
+
+  @retval EFI_SUCCESS   The board initialization was successful.
+  @retval EFI_NOT_READY The board has not been detected yet.
+**/
+EFI_STATUS
+EFIAPI
+BoardInitAfterMemoryInit (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  A hook for board-specific initialization prior to disabling temporary RAM.
+
+  @retval EFI_SUCCESS   The board initialization was successful.
+  @retval EFI_NOT_READY The board has not been detected yet.
+**/
+EFI_STATUS
+EFIAPI
+BoardInitBeforeTempRamExit (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  A hook for board-specific initialization after disabling temporary RAM.
+
+  @retval EFI_SUCCESS   The board initialization was successful.
+  @retval EFI_NOT_READY The board has not been detected yet.
+**/
+EFI_STATUS
+EFIAPI
+BoardInitAfterTempRamExit (
+  VOID
+  )
+{
+  return EFI_SUCCESS;
+}
+
+/**
+  A hook for board-specific initialization prior to silicon initialization.
+
+  @retval EFI_SUCCESS   The board initialization was successful.
+  @retval EFI_NOT_READY The board has not been detected yet.
+**/
+EFI_STATUS
+EFIAPI
+BoardInitBeforeSiliconInit (
+  

[edk2-devel] [PATCH 2/5] AmdMinBoardPkg/Library: Uncrustify the Library module

[Abdul Lateef Attar via groups.io]

Uncrustify the library module.
Update the function header.

Cc: Abner Chang 
Cc: Paul Grimes 
Signed-off-by: Abdul Lateef Attar 
---
 .../Library/PeiReportFvLib/PeiReportFvLib.c  | 12 +++-
 .../Library/SetCacheMtrrLib/SetCacheMtrrLib.c|  3 +--
 2 files changed, 12 insertions(+), 3 deletions(-)

diff --git 
a/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c 
b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
index f0b2abef61..b19f33663d 100644
--- a/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
+++ b/Platform/AMD/AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.c
@@ -5,7 +5,7 @@
 This source has the reference of MinPlatformPkgs's PeriReportFvLib.c 
module.
 
   Copyright (c) 2018 - 2020, Intel Corporation. All rights reserved.
-  Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
+  Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -19,6 +19,11 @@
 #include 
 #include 
 
+/**
+  Report Pre-Memory Firmware Volumes.
+
+  This function reports the Pre-Memory Firmware Volumes to the Firmware Volume 
Hob.
+**/
 VOID
 ReportPreMemFv (
   VOID
@@ -66,6 +71,11 @@ ReportPreMemFv (
   }
 }
 
+/**
+  Report Post-Memory Firmware Volumes.
+
+  This function reports the Post-Memory Firmware Volumes to the Firmware 
Volume Hob.
+**/
 VOID
 ReportPostMemFv (
   VOID
diff --git 
a/Platform/AMD/AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c 
b/Platform/AMD/AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c
index 33b774fedb..e7a503f6cf 100644
--- a/Platform/AMD/AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c
+++ b/Platform/AMD/AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.c
@@ -3,7 +3,7 @@
 SetCacheMtrr library functions.
 This library implementation is for AMD processor based platforms.
 
-Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
 
 SPDX-License-Identifier: BSD-2-Clause-Patent
 
@@ -130,4 +130,3 @@ SetCacheMtrrAfterEndOfPei (
   MtrrDebugPrintAllMtrrs ();
   return EFI_SUCCESS;
 }
-
-- 
2.34.1



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[edk2-devel] [PATCH 3/5] AmdMinBoardPkg: Implement BoardInitLib for PEI phase

[Abdul Lateef Attar via groups.io]

PeiBoardInitPreMemLib library provides board-specific
initialization functions for the PEI phase.

Cc: Abner Chang 
Cc: Paul Grimes 
Signed-off-by: Abdul Lateef Attar 
---
 .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc |   2 +
 .../PeiBoardInitPreMemLib/AmdMemoryInfoHob.h  |  50 
 .../PeiBoardInitPreMemLib.c   | 229 ++
 .../PeiBoardInitPreMemLib.inf |  45 
 .../PeiBoardInitPreMemLib/PeiMemoryInit.c | 198 +++
 .../PeiBoardInitPreMemLib/PeiMemoryInit.h |  50 
 6 files changed, 574 insertions(+)
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.h

diff --git a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc 
b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
index be33089a45..335e875f70 100644
--- a/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
+++ b/Platform/AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc
@@ -38,6 +38,7 @@
 
 [LibraryClasses.common.PEIM]
   SetCacheMtrrLib|AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
+  
BoardInitLib|AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
 
 [Components]
   AmdMinBoardPkg/Library/SpcrDeviceLib/SpcrDeviceLib.inf
@@ -45,6 +46,7 @@
 [Components.IA32]
   AmdMinBoardPkg/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf
   AmdMinBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
+  AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
 
 [Components.X64]
   AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
diff --git 
a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h 
b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
new file mode 100644
index 00..b596b3bdf3
--- /dev/null
+++ 
b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
@@ -0,0 +1,50 @@
+/** @file
+  Defines AMD memory info hob.
+
+  Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved.
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef AMD_MEMORY_INFO_HOB_H_
+#define AMD_MEMORY_INFO_HOB_H_
+
+#pragma pack (push, 1)
+
+/// Memory descriptor structure for each memory range
+typedef struct {
+  UINT64Base;   ///< Base address of memory rang
+  UINT64Size;   ///< Size of memory rang
+  UINT32Attribute;  ///< Attribute of memory rang
+  UINT32Reserved;   ///< For alignment purpose
+} AMD_MEMORY_RANGE_DESCRIPTOR;
+
+/// Memory info HOB structure
+typedef struct  {
+  UINT32 Version;   ///< Version of HOB 
structure
+  BOOLEANReserved1;
+  UINT16 Reserved2;
+  BOOLEANReserved3;
+  UINT8  Reserved4;
+  BOOLEANReserved5;
+  UINT32 Reserved6;
+  UINT32 Reserved7;
+  UINT32 NumberOfDescriptor;///< Number of memory 
range descriptor
+  AMD_MEMORY_RANGE_DESCRIPTORRanges[1]; ///< Memory ranges 
array
+} AMD_MEMORY_INFO_HOB;
+
+#pragma pack (pop)
+
+/// Memory attribute in the memory range descriptor = AVAILABLE
+#define AMD_MEMORY_ATTRIBUTE_AVAILABLE  0x1
+
+/// Memory attribute in the memory range descriptor = UMA
+#define AMD_MEMORY_ATTRIBUTE_UMA  0x2
+
+/// Memory attribute in the memory range descriptor = MMIO
+#define AMD_MEMORY_ATTRIBUTE_MMIO  0x3
+
+/// Memory attribute in the memory range descriptor = RESERVED
+#define AMD_MEMORY_ATTRIBUTE_RESERVED  0x4
+
+#endif
diff --git 
a/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.c
 
b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.c
new file mode 100644
index 00..01e73efa12
--- /dev/null
+++ 
b/Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.c
@@ -0,0 +1,229 @@
+/** @file
+  BoardInitLib library implementation for pre-mem PEI phase.
+
+Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include 
+#include 
+#include 
+#include 
+#include "PeiMemoryInit.h"
+
+EFI_PEI_NOTIFY_DESCRIPTOR  mNotifyList = {
+  (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_DISPATCH | 
EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+  ,
+  EndofAmdMemoryInfoHobPpiGuidCallBack
+};
+
+/**
+  Get Pcie base address from MSR and set PcdPciExpressBaseSize
+
+  @retval EFI_SUCCESS   PcdPciExpressBaseSize value set successfully.
+**/

[edk2-devel] [PATCH 1/5] AmdMinBoardPkg: Uncrustify PciHotPlug module

[Abdul Lateef Attar via groups.io]

Uncrustify PciHotPlug module.
corrects the [in, out] parameters.

Cc: Abner Chang 
Cc: Paul Grimes 
Signed-off-by: Abdul Lateef Attar 
---
 Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c   | 4 +++-
 Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf | 5 +++--
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c 
b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
index a26ca16741..9a7b509b55 100755
--- a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
+++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.c
@@ -44,6 +44,8 @@
 
   Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.
   Copyright (C) 2016, Red Hat, Inc.
+  Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
+
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
   @par Revision Reference:
@@ -169,7 +171,7 @@ InitializeRootHpc (
   @param[in]  ThisPointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL 
instance.
   @param[in]  HpcDevicePath   The device path to the HPC.
   @param[in]  HpcPciAddress   The address of the HPC function on the PCI bus.
-  @param[in]  HpcStateThe state of the HPC hardware.
+  @param[out] HpcStateThe state of the HPC hardware.
   @param[out] Padding The amount of resource padding that is required 
by the
   PCI bus under the control of the specified HPC.
   @param[out] Attributes  Describes how padding is accounted for. The 
padding
diff --git a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf 
b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
index 44564df387..861fc120d9 100755
--- a/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
+++ b/Platform/AMD/AmdMinBoardPkg/PciHotPlug/PciHotPlugInit.inf
@@ -2,8 +2,9 @@
 # This driver implements EFI_PCI_HOT_PLUG_INIT_PROTOCOL.
 # Adds resource padding information, for PCIe hotplug purposes.
 #
-# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved
-# SPDX-License-Identifier: BSD-2-Clause-Patent ##
+# Copyright (C) 2023 - 2024 Advanced Micro Devices, Inc. All rights reserved
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+##
 
 [Defines]
   INF_VERSION= 1.29
-- 
2.34.1



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[edk2-devel] [PATCH 0/5] AmdMinBoardPkg: AMD board specific modules

[Abdul Lateef Attar via groups.io]

PR: https://github.com/tianocore/edk2-platforms/pull/143
Adds various module common to AMD boards.
Cc: Abner Chang 
Cc: Paul Grimes 

Abdul Lateef Attar (5):
  AmdMinBoardPkg: Uncrustify PciHotPlug module
  AmdMinBoardPkg/Library: Uncrustify the Library module
  AmdMinBoardPkg: Implement BoardInitLib for PEI phase
  AmdMinBoardPkg: Implement BoardInitLib for DXE phase
  AmdMinBoardPkg: Implements BoardBdsHookLib library

 .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dec |   10 +
 .../AMD/AmdMinBoardPkg/AmdMinBoardPkg.dsc |   10 +-
 .../Include/Library/AmdBoardBdsHookLib.h  |  130 ++
 .../Library/BoardBdsHookLib/BoardBdsHook.h|  242 +++
 .../Library/BoardBdsHookLib/BoardBdsHookLib.c | 1712 +
 .../BoardBdsHookLib/BoardBdsHookLib.inf   |  105 +
 .../Library/BoardBdsHookLib/BoardBootOption.c |  754 
 .../Library/BoardBdsHookLib/BoardMemoryTest.c |   83 +
 .../Library/DxeBoardInitLib/DxeBoardInitLib.c |  253 +++
 .../DxeBoardInitLib/DxeBoardInitLib.inf   |   51 +
 .../DxeBoardInitLib/DxeBoardInitLibInternal.c |  306 +++
 .../DxeBoardInitLib/DxeBoardInitLibInternal.h |  159 ++
 .../DxeBoardInitLib/MadtAcpiTablePatch.c  |  243 +++
 .../PeiBoardInitPreMemLib/AmdMemoryInfoHob.h  |   50 +
 .../PeiBoardInitPreMemLib.c   |  229 +++
 .../PeiBoardInitPreMemLib.inf |   45 +
 .../PeiBoardInitPreMemLib/PeiMemoryInit.c |  198 ++
 .../PeiBoardInitPreMemLib/PeiMemoryInit.h |   50 +
 .../Library/PeiReportFvLib/PeiReportFvLib.c   |   12 +-
 .../Library/SetCacheMtrrLib/SetCacheMtrrLib.c |3 +-
 .../PciHotPlug/PciHotPlugInit.c   |4 +-
 .../PciHotPlug/PciHotPlugInit.inf |5 +-
 22 files changed, 4647 insertions(+), 7 deletions(-)
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Include/Library/AmdBoardBdsHookLib.h
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHook.h
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.inf
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardBootOption.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/BoardBdsHookLib/BoardMemoryTest.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLib.inf
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLibInternal.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/DxeBoardInitLibInternal.h
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/DxeBoardInitLib/MadtAcpiTablePatch.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/AmdMemoryInfoHob.h
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiBoardInitPreMemLib.inf
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.c
 create mode 100644 
Platform/AMD/AmdMinBoardPkg/Library/PeiBoardInitPreMemLib/PeiMemoryInit.h

-- 
2.34.1



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Re: [edk2-devel] 回复: [edk2-devel] [PATCH v2 03/13] OvmfPkg:PlatformCI: Support virtio-rng-pci

[Doug Flick via groups.io]

>
> On ARM, we can actually do better than this: I have taken Doug's v2
> and applied some changes on top to make it work with ArmVirtQemu.
>
> https://github.com/ardbiesheuvel/edk2/tree/doug-v2
> 

Ard, would you be comfortable with this patch series if I take the commits 
you're suggesting? I'm being asked to see what it would take to get these 
commits in for this release.


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[edk2-devel] [PATCH v1 1/1] Add the EFI_RESOURCE_ATTRIBUTE_SPECIAL_PURPOSE attribute.

[Michael Kubacki]

From: Patrick Payne 

Add the EFI_RESOURCE_ATTRIBUTE_SPECIAL_PURPOSE resource attribute as
per the PI 1.8 spec. This flag is used to indicate that the memory
should be treated as special purpose memory (SPM).

Also adds GCD code that marks the SPM with the EFI_MEMORY_SP bit and
sets the GCD memory type to EfiGcdMemoryTypeSystemMemory.

Cc: Liming Gao 
Cc: Michael D Kinney 
Signed-off-by: Patrick Payne 
---
 MdeModulePkg/Core/Dxe/Gcd/Gcd.c | 12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Core/Dxe/Gcd/Gcd.c b/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
index fe1bbd6974b7..c941fe941276 100644
--- a/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
+++ b/MdeModulePkg/Core/Dxe/Gcd/Gcd.c
@@ -26,7 +26,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
EFI_RESOURCE_ATTRIBUTE_16_BIT_IO
   | \
EFI_RESOURCE_ATTRIBUTE_32_BIT_IO
   | \
EFI_RESOURCE_ATTRIBUTE_64_BIT_IO
   | \
-   EFI_RESOURCE_ATTRIBUTE_PERSISTENT   
   )
+   EFI_RESOURCE_ATTRIBUTE_PERSISTENT   
   | \
+   EFI_RESOURCE_ATTRIBUTE_SPECIAL_PURPOSE  
   )
 
 #define TESTED_MEMORY_ATTRIBUTES  (EFI_RESOURCE_ATTRIBUTE_PRESENT | \
EFI_RESOURCE_ATTRIBUTE_INITIALIZED | \
@@ -92,6 +93,7 @@ GCD_ATTRIBUTE_CONVERSION_ENTRY  mAttributeConversionTable[] = 
{
   { EFI_RESOURCE_ATTRIBUTE_TESTED,  EFI_MEMORY_TESTED,
FALSE },
   { EFI_RESOURCE_ATTRIBUTE_PERSISTABLE, EFI_MEMORY_NV,
TRUE  },
   { EFI_RESOURCE_ATTRIBUTE_MORE_RELIABLE,   EFI_MEMORY_MORE_RELIABLE, 
TRUE  },
+  { EFI_RESOURCE_ATTRIBUTE_SPECIAL_PURPOSE, EFI_MEMORY_SP,
TRUE  },
   { 0,  0,
FALSE }
 };
 
@@ -691,6 +693,10 @@ ConverToCpuArchAttributes (
 CpuArchAttributes |= EFI_MEMORY_WP;
   }
 
+  if ((Attributes & EFI_MEMORY_SP) == EFI_MEMORY_SP) {
+CpuArchAttributes |= EFI_MEMORY_SP;
+  }
+
   return CpuArchAttributes;
 }
 
@@ -2660,6 +2666,10 @@ CoreInitializeGcdServices (
 GcdMemoryType = EfiGcdMemoryTypePersistent;
   }
 
+  if ((ResourceHob->ResourceAttribute & 
EFI_RESOURCE_ATTRIBUTE_SPECIAL_PURPOSE) == 
EFI_RESOURCE_ATTRIBUTE_SPECIAL_PURPOSE) {
+GcdMemoryType = EfiGcdMemoryTypeSystemMemory;
+  }
+
   break;
 case EFI_RESOURCE_MEMORY_MAPPED_IO:
 case EFI_RESOURCE_FIRMWARE_DEVICE:
-- 
2.45.1.windows.1



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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 12/14] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe

[Sami Mujawar]

Hi Sahil,

Please find my response inline marked [SAMI].

Regards,

Sami Mujawar

On 09/05/2024 07:25 am, Sahil wrote:
Hi Pierre, Thanks for reviewing the patchset. Please find my comment 
inline below.


On Thu, 2 May 2024 at 18:47, PierreGondois via groups.io 
  wrote:

>
> Hello Sahil,
>
> On 4/23/24 07:56, Sahil Kaushal via groups.io  wrote:
> > From: sahil 
> >
> > In N1Sdp platform, the SoC is connected to IOFPGA which has a
> > Cadence Quad SPI (QSPI) controller. This QSPI controller manages
> > the flash chip device via QSPI bus.
> >
> > This patch adds CadenceQspiNorFlashDeviceLib which is used to
> > manage and access the above configuration.
> >
> > Signed-off-by: sahil 
> > ---
> > 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf 
|   32 +
> > 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h 
  |   44 +
> > 
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c 
  | 1011 

> >   3 files changed, 1087 insertions(+)
> >
>
> [snip]
>
> > +
> > +/**
> > +  Converts milliseconds into number of ticks of the performance 
counter.

> > +
> > +  @param[in] Milliseconds  Milliseconds to convert into ticks.
> > +
> > +  @retval Milliseconds expressed as number of ticks.
> > +
> > +**/
> > +STATIC
> > +UINT64
> > +MilliSecondsToTicks (
> > +  IN UINTN  Milliseconds
> > +  )
> > +{
> > +  CONST UINT64  NanoSecondsPerTick = GetTimeInNanoSecond (1);
> > +
> > +  return (Milliseconds * 100) / NanoSecondsPerTick;
>
> Should use DivU64x64Remainder() here:
> {
>    UINT64  NanoSecondsPerTick;
>    UINT64  NanoSeconds;
>
>    NanoSecondsPerTick = GetTimeInNanoSecond (1);
>    NanoSeconds = MultU64x32 (Milliseconds, 100);
>
>    return DivU64x64Remainder (NanoSeconds, NanoSecondsPerTick, NULL);
> }
>
> > +}
> > +
> > +/**
> > +  Poll Status register for NOR flash erase/write completion.
> > +
> > +  @param[in]      Instance           NOR flash Instance.
> > +
> > +  @retval         EFI_SUCCESS        Request is executed 
successfully.

> > +  @retval         EFI_TIMEOUT        Operation timed out.
> > +  @retval         EFI_DEVICE_ERROR   Controller operartion failed.
>
> operartion -> typo
> (same at another place I think)
>
> [snip]
>
> > +
> > +/**
> > +  Read from nor flash.
> > +
> > +  @param[in]     Instance               NOR flash Instance of 
variable store region.
> > +  @param[in]     Lba                    The starting logical 
block index to read from.
> > +  @param[in]     Offset                 Offset into the block at 
which to begin reading.

> > +  @param[in]     BufferSizeInBytes      The number of bytes to read.
> > +  @param[out]    Buffer                 The pointer to a 
caller-allocated buffer that

> > +                                        should copied with read data.
> > +
> > +  @retval        EFI_SUCCESS            The read is completed.
> > +  @retval        EFI_INVALID_PARAMETER  Invalid parameters passed.
> > +**/
> > +EFI_STATUS
> > +NorFlashRead (
> > +  IN NOR_FLASH_INSTANCE  *Instance,
> > +  IN EFI_LBA             Lba,
> > +  IN UINTN               Offset,
> > +  IN UINTN               BufferSizeInBytes,
> > +  OUT VOID               *Buffer
> > +  )
> > +{
> > +  UINTN  StartAddress;
> > +
> > +  // The buffer must be valid
> > +  if (Buffer == NULL) {
> > +    return EFI_INVALID_PARAMETER;
> > +  }
> > +
> > +  // Return if we do not have any byte to read
> > +  if (BufferSizeInBytes == 0) {
> > +    return EFI_SUCCESS;
> > +  }
> > +
> > +  if (((Lba * Instance->Media.BlockSize) + Offset + 
BufferSizeInBytes) >

> > +      Instance->Size)
> > +  {
> > +    DEBUG ((
> > +      DEBUG_ERROR,
> > +      "NorFlashRead: ERROR - Read will exceed device size.\n"
> > +      ));
> > +    return EFI_INVALID_PARAMETER;
> > +  }
> > +
> > +  // Get the address to start reading from
> > +  StartAddress = GET_NOR_BLOCK_ADDRESS (
> > +                   Instance->RegionBaseAddress,
> > +                   Lba,
> > +                   Instance->Media.BlockSize
> > +                   );
> > +
> > +  // Readout the data
> > +  CopyMem (Buffer, (UINTN *)(StartAddress + Offset), 
BufferSizeInBytes);

>
> The original code at:
>  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c
>
> implements and uses AlignedCopyMem()/NorFlashWriteBuffer() which seems
> to be more efficient.
> Just to be sure I understand correctly, is the maximal read/write size
> of 4 bytes ? Meaning that these functions are not needed ?
>
> ---
>
> NorFlashWriteBuffer() is not implemented here IIUC won't be 
implemtned as not
> needed. Maybe in an additional patch, the function could be removed 
from the

> library interface at:
>    Platform/ARM/Include/Library/NorFlashDeviceLib.h
> and made static in:
>  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c
>
CopyMem() and AlignedCopyMem() have nearly identical implementations, 

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 14/14] Platform/ARM/N1Sdp: Enable FaultTolerantWrite Dxe driver for N1Sdp

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

This driver enables Fault Tolerant Write protocol, which provides
fault tolerant write capability for block devices.

Signed-off-by: sahil 
---
  Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 +
  Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 1 +
  2 files changed, 6 insertions(+)

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc 
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index fd630fa08c35..743c2e647b76 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -162,6 +162,10 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20

  


# NOR flash support

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x18F4

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x0002

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x18F2

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x0002

gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0

gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002

  


@@ -228,6 +232,7 @@

NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf

BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

}

+  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf

  


# ACPI Support

MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf 
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 07118725f168..7b7eda51c70c 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -90,6 +90,7 @@ READ_LOCK_STATUS   = TRUE
INF MdeModulePkg/Universal/Metronome/Metronome.inf

INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf

INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

+  INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf

INF 
MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf




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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 13/14] Platform/ARM/N1Sdp: Persistent storage for N1Sdp

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Enable persistent storage on QSPI flash device.

Signed-off-by: sahil 
---
  Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 19 ++-
  Platform/ARM/N1Sdp/N1SdpPlatform.fdf |  2 ++
  2 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc 
b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index 46412bff7d78..fd630fa08c35 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -161,11 +161,9 @@
# ACPI Table Version

gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiExposedTableVersions|0x20

  


-  # Runtime Variable storage

-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0

-  gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvModeEnable|TRUE

-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000

-  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800

+  # NOR flash support

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x18F0

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x0002

  


  


  #

@@ -197,6 +195,16 @@
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x800F

}

  


+  # NOR flash support

+  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf {

+

+  
NorFlashDeviceLib|Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf

+  
NorFlashPlatformLib|Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

+

+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x1C0C

+  }

+

# Architectural Protocols

ArmPkg/Drivers/CpuDxe/CpuDxe.inf

ArmPkg/Drivers/ArmGic/ArmGicDxe.inf

@@ -217,6 +225,7 @@
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {

  

NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf

+  
NULL|EmbeddedPkg/Library/NvVarStoreFormattedLib/NvVarStoreFormattedLib.inf

BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

}

  


diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf 
b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index 7aae8e6a753b..07118725f168 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -140,6 +140,8 @@ READ_LOCK_STATUS   = TRUE
INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf

INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf

  


+  INF Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf

+

INF Platform/ARM/Drivers/BootMonFs/BootMonFs.inf

INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf

  




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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 12/14] Platform/ARM: Add CadenceQspiNorFlashDeviceLib for NorFlashDxe

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

Please find my response inline marked [SAMI].

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil

In N1Sdp platform, the SoC is connected to IOFPGA which has a
Cadence Quad SPI (QSPI) controller. This QSPI controller manages
the flash chip device via QSPI bus.

This patch adds CadenceQspiNorFlashDeviceLib which is used to
manage and access the above configuration.

Signed-off-by: sahil
---
  
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 |   32 +
  
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
   |   44 +
  
Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
   | 1011 
  3 files changed, 1087 insertions(+)

diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
new file mode 100644
index ..506876b62285
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.inf
@@ -0,0 +1,32 @@
+#/** @file

+#

+#  Component description file for CadenceQspiNorFlashDeviceLib Library

+#

+#  Copyright (c) 2024, Arm Limited. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+#**/

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = CadenceQspiNorFlashDeviceLib

+  FILE_GUID  = ed172366-066b-4998-9b5e-ca7f385a170b

+  MODULE_TYPE= DXE_RUNTIME_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashDeviceLib

+

+[Sources.common]

+  CadenceQspiNorFlashDeviceLib.c

+  CadenceQspiNorFlashDeviceLib.h

+

+[Packages]

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+

+[LibraryClasses]

+  BaseLib

+  BaseMemoryLib

+  DebugLib

+  IoLib

+  TimerLib

diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
new file mode 100644
index ..d43d27fe5eb4
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.h
@@ -0,0 +1,44 @@
+/** @file

+

+  Copyright (c) 2024, ARM Limited. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_

+#define CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_

+

+#define NOR_FLASH_ERASE_RETRY  10

+

+// QSPI Controller defines

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OFFSET 0x90

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_EXECUTE0x01

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_ENABLE0x01

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BIT_POS   19

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS  16

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_STATUS_BIT 0x02

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_OPCODE_BIT_POS 24

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_ENABLE0x01

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READ_BYTE_3B   0x02

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READEN_BIT_POS 23

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS   20

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_8C   0x8

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_DUMMY_BIT_POS  7

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_DATA_BYTES(x)  ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_READBYTE_BIT_POS)

+#define CDNS_QSPI_FLASH_CMD_CTRL_REG_NUM_ADDR_BYTES(x)  ((x - 1) << 
CDNS_QSPI_FLASH_CMD_CTRL_REG_ADDR_BYTE_BIT_POS)

+

+#define CDNS_QSPI_FLASH_CMD_READ_DATA_REG_OFFSET  0xA0

+

+#define CDNS_QSPI_FLASH_CMD_ADDR_REG_OFFSET  0x94

+

+#define SPINOR_SR_WIP  BIT0 // Write in progress

+

+#define SPINOR_OP_WREN   0x06   // Write enable

+#define SPINOR_OP_BE_4K  0x20   // Erase 4KiB block

+#define SPINOR_OP_RDID   0x9f   // Read JEDEC ID

+#define SPINOR_OP_RDSR   0x05   // Read status register

+

+#define SPINOR_SR_WIP_POLL_TIMEOUT_MS  1000u // Status Register read timeout

+

+#endif /* CADENCE_QSPI_NOR_FLASH_DEVICE_LIB_H_ */

diff --git 
a/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
new file mode 100644
index ..8a416e07f15e
--- /dev/null
+++ 
b/Platform/ARM/Library/CadenceQspiNorFlashDeviceLib/CadenceQspiNorFlashDeviceLib.c
@@ -0,0 +1,1011 @@
+/** @file

+

+  Copyright (c) 2024 ARM Limited. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+#include 

+

+#include "CadenceQspiNorFlashDeviceLib.h"

+

+/**

+  Execute Flash cmd ctrl and Read Status.

+

+  @param[in]  Instance

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 11/14] Silicon/ARM/NeoverseN1Soc: NOR flash library for N1Sdp

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

I have some suggestions marked inline below, otherwise this patch looks 
good to me.


With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil

Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.


[SAMI] I think the information in the commit message of patch 10/14 
would be more useful here.


Not mandatory, but it may be useful to have an ASCII diagram to explain 
the flash partitioning.


[/SAMI]


Signed-off-by: sahil
---
  Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf | 34 ++
  Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c   | 65 

  2 files changed, 99 insertions(+)

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
new file mode 100644
index ..fad3bca79d3a
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.inf
@@ -0,0 +1,34 @@
+## @file

+#  NOR flash lib for ARM Neoverse N1 platform.

+#

+#  Copyright (c) 2024, ARM Limited. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+##

+

+[Defines]

+  INF_VERSION= 0x0001001B

+  BASE_NAME  = NorFlashNeoverseN1SocLib

+  FILE_GUID  = 7006fcf1-a585-4272-92e3-b286b1dff5bb

+  MODULE_TYPE= DXE_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashPlatformLib

+

+[Sources.common]

+  NorFlashLib.c

+

+[Packages]

+  MdeModulePkg/MdeModulePkg.dec

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+  Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec

+

+[LibraryClasses]

+  BaseLib

+

+[FixedPcd]

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c 
b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
new file mode 100644
index ..a48db9c74548
--- /dev/null
+++ b/Silicon/ARM/NeoverseN1Soc/Library/NorFlashLib/NorFlashLib.c
@@ -0,0 +1,65 @@
+/** @file

+*  NOR flash lib for ARM Neoverse N1 platform

+*

+*  Copyright (c) 2024, ARM Limited. All rights reserved.

+*

+*  SPDX-License-Identifier: BSD-2-Clause-Patent

+*

+**/

+

+#include 

+#include 

+#include 

+

+#define FW_ENV_REGION_BASE  FixedPcdGet32 (PcdFlashNvStorageVariableBase)

+#define FW_ENV_REGION_SIZE  (FixedPcdGet32 (PcdFlashNvStorageVariableSize) + \

+FixedPcdGet32 (PcdFlashNvStorageFtwWorkingSize) + \

+FixedPcdGet32 (PcdFlashNvStorageFtwSpareSize))


[SAMI] Would it be an issue if someone were to increase the storage 
variable sizes above?


How can you prevent someone overwriting the flash region used by the SCP?

Would it make sense to add a check in NorFlashPlatformInitialization() ?

[/SAMI]



+

+STATIC NOR_FLASH_DESCRIPTION  mNorFlashDevices[] = {

+  {

+/// Environment variable region

+NEOVERSEN1SOC_SCP_QSPI_AHB_BASE,///< device base

+FW_ENV_REGION_BASE, ///< region base

+FW_ENV_REGION_SIZE, ///< region size

+SIZE_4KB,   ///< block size

+  },

+};

+

+/**

+  Dummy implementation of NorFlashPlatformInitialization to

+  comply with NorFlashPlatformLib structure.

+

+  @retvalEFI_SUCCESSSuccess.

+**/

+EFI_STATUS

+NorFlashPlatformInitialization (

+  VOID

+  )

+{

+  return EFI_SUCCESS;

+}

+

+/**

+  Get NOR flash region info

+

+  @param[out]NorFlashDevicesNOR flash regions info.

+  @param[out]Count  number of flash instance.

+

+  @retvalEFI_SUCCESSSuccess.

+  @retvalEFI_INVALID_PARAMETER  The parameters specified are not valid.

+**/

+EFI_STATUS

+NorFlashPlatformGetDevices (

+  OUT NOR_FLASH_DESCRIPTION  **NorFlashDevices,

+  OUT UINT32 *Count

+  )

+{

+  if ((NorFlashDevices == NULL) || (Count == NULL)) {

+return EFI_INVALID_PARAMETER;

+  }

+

+  *NorFlashDevices = mNorFlashDevices;

+  *Count   = ARRAY_SIZE (mNorFlashDevices);

+  return EFI_SUCCESS;

+}




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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 10/14] Silicon/ARM/NeoverseN1Soc: Enable SCP QSPI flash region

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Enable SCP QSPI flash region access by adding it in the PlatformLibMem.
This flash is shared between AP core and System Control Processor. The
lower addresses are used to store SCP and AP boot images and higher
addresses will be used for variable storage.

Signed-off-by: sahil 
---
  Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h  | 7 +++
  Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 8 +++-
  2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h 
b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 5483e7bc5f68..2dae57a0f01a 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -4,6 +4,9 @@
  *

  * SPDX-License-Identifier: BSD-2-Clause-Patent

  *

+* Arm Neoverse N1 System Development Platform Technical Reference Manual

+* https://developer.arm.com/documentation/101489//?lang=en

+*

  **/

  


  #ifndef NEOVERSEN1SOC_PLATFORM_H_

@@ -41,6 +44,10 @@
  #define NEOVERSEN1SOC_EXP_PERIPH_BASE0   0x1C00

  #define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ0x130

  


+// SCP QSPI flash device

+#define NEOVERSEN1SOC_SCP_QSPI_AHB_BASE  0x1800

+#define NEOVERSEN1SOC_SCP_QSPI_AHB_SZ0x200

+

  /*

   * Platform information structure stored in Non-secure SRAM. Platform

   * information are passed from the trusted firmware with the below structure

diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c 
b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index 80daedb33416..282bfbc81736 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -14,7 +14,7 @@
  #include 

  


  // The total number of descriptors, including the final "end-of-table" 
descriptor.

-#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 19

+#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 20

  


  /**

Returns the Virtual Memory Map of the platform.

@@ -203,6 +203,12 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length  = 
NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ;

VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;

  


+  // SCP QSPI flash device

+  VirtualMemoryTable[++Index].PhysicalBase  = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;

+  VirtualMemoryTable[Index].VirtualBase = NEOVERSEN1SOC_SCP_QSPI_AHB_BASE;

+  VirtualMemoryTable[Index].Length  = NEOVERSEN1SOC_SCP_QSPI_AHB_SZ;

+  VirtualMemoryTable[Index].Attributes  = 
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;

+

if (PlatInfo->MultichipMode == 1) {

  //Remote DDR (2GB)

  VirtualMemoryTable[++Index].PhysicalBase  = PcdGet64 (PcdExtMemorySpace) +




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Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 09/14] Platform/ARM: Add optional provision to fetch and print NOR Flash info

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

Please find my feedback inline marked [SAMI].

Regards,

Sami Mujawarnd

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil

This patch adds an optional functionality in NorFlashDxe to fetch and
print NOR Flash information from NorFlashInfoLib using its JEDEC ID.

NOR Flash libraries will implement a function "NorFlashReadID" which
will fetch and return JEDEC ID. This JEDEC ID can be then used to
print NOR Flash info using NorFlashInfoLib. If this functionality is


[SAMI] Can you explain how this information is useful, please? Is it 
just for debugging or it can be used for some other purpose.


If it is just for printing the information, then maybe the above 
sentence could be silghtly modified, e.g.


This JEDEC ID can be then printed along with the NOR Flash info by 
NorFlashInfoLib.

[/SAMI]


not needed then the function can just return EFI_UNSUPPORTED.

Signed-off-by: sahil
---
  Platform/ARM/SgiPkg/SgiPlatform.dsc.inc  |  2 ++
  Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc|  2 ++
  Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc |  2 ++
  Platform/ARM/JunoPkg/ArmJuno.dsc |  2 ++
  Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc|  2 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf |  1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf|  1 +
  Platform/ARM/Include/Library/NorFlashDeviceLib.h |  6 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c   | 19 
+++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c  | 19 
+++
  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c | 18 
++
  11 files changed, 74 insertions(+)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 3dcf422eab4b..aef7cba5449e 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -36,6 +36,8 @@
LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf


NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf


ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

TimerLib|ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf

diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index ab0e2a957a1b..02d684adaebd 100644
--- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
@@ -65,6 +65,8 @@
IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf


NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf

RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf


PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf

diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc 
b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
index 70ff049d3248..4e208c539a88 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
@@ -95,6 +95,8 @@

ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf


NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf


ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

  


# ARM PL031 RTC Driver

diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 81d2cbe4359f..946b8680c8c2 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -42,6 +42,8 @@
  



NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf

+  # NOR flash support

+  NorFlashInfoLib|EmbeddedPkg/Library/NorFlashInfoLib/NorFlashInfoLib.inf

  


CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf


CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf

diff --git 

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 08/14] Platform/ARM: Add HostRegisterBaseAddress variable

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

I have a minor comment marked inline as [SAMI].

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

This variable holds the QSPI controller's base address.
It is defined in ARM.dec as well with the default value of 0x0.
In case a platform is not using it, they can just ignore this
variable and the default value of 0x0 will be propogated and
the variable will not be used.

Signed-off-by: sahil 
---
  Platform/ARM/ARM.dec  |  3 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |  3 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |  2 ++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h |  1 +
  Platform/ARM/Include/Library/NorFlashDeviceLib.h  |  1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c| 34 
+---
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   | 12 ---
  7 files changed, 48 insertions(+), 8 deletions(-)

diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index 86d1fcb4878e..a5e28c372903 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -26,3 +26,6 @@
  


  [PcdsFeatureFlag.common]


gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked|FALSE|BOOLEAN|0x001

+

+[PcdsFixedAtBuild.common]

+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress|0x0|UINT32|0x0002

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index de160025b632..6522968d6c5a 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -65,5 +65,8 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase

gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

  


+[FixedPcd]

+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress

+

  [Depex]

gEfiCpuArchProtocolGuid

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index d9e7de07165c..eb86d423f106 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -59,5 +59,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase

gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

  


+  gPlatformArmTokenSpaceGuid.PcdNorFlashRegBaseAddress

+

  [Depex]

TRUE

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index 7fcb949843e8..98464e4868b1 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -34,6 +34,7 @@
  //

  EFI_STATUS

  NorFlashCreateInstance (

+  IN UINTNHostRegisterBase,

IN UINTNNorFlashDeviceBase,

IN UINTNNorFlashRegionBase,

IN UINTNNorFlashSize,

diff --git a/Platform/ARM/Include/Library/NorFlashDeviceLib.h 
b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
index e5017130a091..29b8b8901525 100644
--- a/Platform/ARM/Include/Library/NorFlashDeviceLib.h
+++ b/Platform/ARM/Include/Library/NorFlashDeviceLib.h
@@ -29,6 +29,7 @@ struct _NOR_FLASH_INSTANCE {
UINT32 Signature;

EFI_HANDLE Handle;

  


+  UINTN  HostRegisterBaseAddress;
[SAMI] HostControllerBaseAddress ? Also, can you add doxygen 
documentation for this field, please? Also mention that this is optional 
if there is no Host Controller present.


UINTN  DeviceBaseAddress;

UINTN  RegionBaseAddress;

UINTN  Size;

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index 1c12572ab663..f5c0dadf84e0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -1,6 +1,6 @@
  /** @file  NorFlashDxe.c

  


-  Copyright (c) 2011 - 2021, Arm Limited. All rights reserved.

+  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.

  


SPDX-License-Identifier: BSD-2-Clause-Patent

  


@@ -30,6 +30,7 @@ NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
NOR_FLASH_SIGNATURE, // Signature

NULL,// Handle ... NEED TO BE FILLED

  


+  0, // HostRegisterBaseAddress  ... NEED TO BE FILLED

[SAMI] Should the documentation also say that this is optional?


0, // DeviceBaseAddress ... NEED TO BE FILLED

0, // RegionBaseAddress ... NEED TO BE FILLED

0, // Size ... NEED TO BE FILLED

@@ -99,6 +100,7 @@ NOR_FLASH_INSTANCE  mNorFlashInstanceTemplate = {
  


  EFI_STATUS

  NorFlashCreateInstance (

+  IN UINTNHostRegisterBase,

[SAMI] 

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 07/14] Platform/ARM/NorFlashDxe: Switch from NorFlash.c to NorFlashDeviceLib

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.

This patch adds the following major changes:

1. Adds changes in NorFlashDxe to look for NorFlashDeviceLib instead of
NorFlash.c for flash specific implementation

2. Remove NorFlash.c and NorFlash.h as they are no longer required.

3. Add changes to platform description files to provide
P30NorFlashDeviceLib as NorFlashDeviceLib

Signed-off-by: sahil 
---
  Platform/ARM/SgiPkg/SgiPlatform.dsc.inc   |   1 +
  Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc |   1 +
  Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc  |   1 +
  Platform/ARM/JunoPkg/ArmJuno.dsc  |   1 +
  Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |   5 +-
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |   6 +-
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 108 ---
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   | 953 

  Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c |   1 -
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c|   1 -
  Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c|   1 -
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   |   1 -
  13 files changed, 7 insertions(+), 1074 deletions(-)

diff --git a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
index 1bf489ffeb39..3dcf422eab4b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
@@ -34,6 +34,7 @@
BasePathLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf

LcdHwLib|ArmPlatformPkg/Library/HdLcd/HdLcd.inf

LcdPlatformLib|Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgiLib.inf

+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf

NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf

HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf


ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

diff --git a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc 
b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
index 0dd9ebbfc16c..ab0e2a957a1b 100644
--- a/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
+++ b/Platform/ARM/SgiPkg/SgiPlatformMm.dsc.inc
@@ -63,6 +63,7 @@
AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf

BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf

IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf

+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/SgiPkg/Library/NorFlashLib/StandaloneMmNorFlashLib.inf

OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf

RngLib|MdePkg/Library/BaseRngLibTimerLib/BaseRngLibTimerLib.inf

diff --git a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc 
b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
index 9f51e05af561..70ff049d3248 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
+++ b/Platform/ARM/VExpressPkg/ArmVExpress.dsc.inc
@@ -93,6 +93,7 @@
# Versatile Express Specific Libraries

PlatformPeiLib|ArmPlatformPkg/PlatformPei/PlatformPeiLib.inf


ArmPlatformSysConfigLib|Platform/ARM/VExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf

+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/VExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf


ResetSystemLib|ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf

  


diff --git a/Platform/ARM/JunoPkg/ArmJuno.dsc b/Platform/ARM/JunoPkg/ArmJuno.dsc
index 7fe796a53433..81d2cbe4359f 100644
--- a/Platform/ARM/JunoPkg/ArmJuno.dsc
+++ b/Platform/ARM/JunoPkg/ArmJuno.dsc
@@ -40,6 +40,7 @@
ArmPlatformLib|Platform/ARM/JunoPkg/Library/ArmJunoLib/ArmJunoLib.inf

ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf

  


+  
NorFlashDeviceLib|Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf


NorFlashPlatformLib|Platform/ARM/JunoPkg/Library/NorFlashJunoLib/NorFlashJunoLib.inf

  


CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf

diff --git a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc 
b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
index 0e77b76cae69..a5805da49c92 100644
--- a/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
+++ b/Platform/ARM/VExpressPkg/PlatformStandaloneMm.dsc
@@ -100,6 +100,7 @@
  


# STMM for Variable runtime service.

  !if 

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 06/14] Platform/ARM: Add P30NorFlashDeviceLib Library

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

Please find my response inline marked [SAMI].

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

This patch implements functions to interact with P30 NOR Flash.
The code is taken from Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
file.

Signed-off-by: sahil 
---
  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf |  35 +
  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h   |  98 ++
  Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.c   | 949 

  3 files changed, 1082 insertions(+)

diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf 
b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
new file mode 100644
index ..0707edb54442
--- /dev/null
+++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.inf
@@ -0,0 +1,35 @@
+#/** @file

+#

+#  Component description file for P30NorFlashDeviceLib library

+#

+#  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.

+#  Copyright (c) 2020, Linaro, Ltd. All rights reserved.

+#

+#  SPDX-License-Identifier: BSD-2-Clause-Patent

+#

+#**/

+

+[Defines]

+  INF_VERSION= 0x00010005

+  BASE_NAME  = P30NorFlashDeviceLib

+  FILE_GUID  = ed172366-066b-4998-9b5e-ca7f385a1709

+  MODULE_TYPE= DXE_DRIVER

+  VERSION_STRING = 1.0

+  LIBRARY_CLASS  = NorFlashDeviceLib

+

+[Sources.common]

+  P30NorFlashDeviceLib.c

+  P30NorFlashDeviceLib.h

+

+[Packages]

+  MdePkg/MdePkg.dec

+  Platform/ARM/ARM.dec

+

+[LibraryClasses]

+  BaseLib

+  BaseMemoryLib

+  DebugLib

+  IoLib

+

+[Pcd.common]

+  gPlatformArmTokenSpaceGuid.PcdNorFlashCheckBlockLocked

diff --git a/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h 
b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h
new file mode 100644
index ..c310b2310d62
--- /dev/null
+++ b/Platform/ARM/Library/P30NorFlashDeviceLib/P30NorFlashDeviceLib.h
@@ -0,0 +1,98 @@
+/** @file  P30NorFlashDeviceLib.h

+

+  Copyright (c) 2011 - 2024, Arm Limited. All rights reserved.

+  Copyright (c) 2020, Linaro, Ltd. All rights reserved.

+

+  SPDX-License-Identifier: BSD-2-Clause-Patent

+

+**/

+

+#ifndef P30_NOR_FLASH_DEVICE_LIB_H_

+#define P30_NOR_FLASH_DEVICE_LIB_H_

+

+#define NOR_FLASH_ERASE_RETRY  10

+

+// Device access macros

+// These are necessary because we use 2 x 16bit parts to make up 32bit data

+

+#define HIGH_16_BITS  0x

+#define LOW_16_BITS   0x

+#define LOW_8_BITS0x00FF

+

+#define FOLD_32BIT_INTO_16BIT(value)  ( ( value >> 16 ) | ( value & 
LOW_16_BITS ) )

+

+#define GET_LOW_BYTE(value)   ( value & LOW_8_BITS )

+#define GET_HIGH_BYTE(value)  ( GET_LOW_BYTE( value >> 16 ) )

+

+// Each command must be sent simultaneously to both chips,

+// i.e. at the lower 16 bits AND at the higher 16 bits

+#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr)  ((BaseAddr) + ((OffsetAddr) 
<< 2))

+#define CREATE_DUAL_CMD(Cmd)  ( ( Cmd << 16) | ( Cmd & 
LOW_16_BITS) )

+#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)   MmioWrite32 
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))

+

+#define BOTH_ALIGNED(a, b, align)  UINTN)(a) | (UINTN)(b)) & ((align) - 
1)) == 0)

+

+// Status Register Bits

+#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)

+#define P30_SR_BIT_ERASE_SUSPEND(BIT6 << 16 | BIT6)

+#define P30_SR_BIT_ERASE(BIT5 << 16 | BIT5)

+#define P30_SR_BIT_PROGRAM  (BIT4 << 16 | BIT4)

+#define P30_SR_BIT_VPP  (BIT3 << 16 | BIT3)

+#define P30_SR_BIT_PROGRAM_SUSPEND  (BIT2 << 16 | BIT2)

+#define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)

+#define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)

+

+// Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family

+

+// On chip buffer size for buffered programming operations

+// There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each 
word is 2 bytes.

+// Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes

+#define P30_MAX_BUFFER_SIZE_IN_BYTES  ((UINTN)128)

+#define P30_MAX_BUFFER_SIZE_IN_WORDS  (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))

+#define MAX_BUFFERED_PROG_ITERATIONS  1000

+#define BOUNDARY_OF_32_WORDS  0x7F

+

+// CFI Addresses

+#define P30_CFI_ADDR_QUERY_UNIQUE_QRY  0x10

+#define P30_CFI_ADDR_VENDOR_ID 0x13

+

+// CFI Data

+#define CFI_QRY  0x00595251

+

+// READ Commands

+#define P30_CMD_READ_DEVICE_ID 0x0090

+#define P30_CMD_READ_STATUS_REGISTER   0x0070

+#define P30_CMD_CLEAR_STATUS_REGISTER  0x0050

+#define P30_CMD_READ_ARRAY 0x00FF

+#define P30_CMD_READ_CFI_QUERY 0x0098

+

+// WRITE Commands

+#define P30_CMD_WORD_PROGRAM_SETUP0x0040

+#define 

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 05/14] Platform/ARM: Create NorFlashDeviceLib library interface for flash specific functions

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

I have some feedback marked inline as [SAMI].

Other than that, is is possible to add documentation header for the functions 
and data streuctures in this file, please?

With that fixed,

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

NorFlashDeviceLib can be used to provide implementations of different
NOR Flash to NorFlashDxe, i.e. NorFlashDxe links with NorFlashDeviceLib
and the platforms can specify their respective NorFlashDeviceLib
instances.

This patch splits NorFlash.h and moves out the function prototypes and
macros that are expected by NorFlashDxe to be implemented by any
Nor Flash implementation to NorFlashDeviceLib.h file.

Signed-off-by: sahil 
---
Platform/ARM/ARM.dec  |   1 +
Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 143 +-
Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h |   1 +
Platform/ARM/Include/Library/NorFlashDeviceLib.h  | 156 
4 files changed, 159 insertions(+), 142 deletions(-)

diff --git a/Platform/ARM/ARM.dec b/Platform/ARM/ARM.dec
index be7e6dc83fde..86d1fcb4878e 100644
--- a/Platform/ARM/ARM.dec
+++ b/Platform/ARM/ARM.dec
@@ -17,6 +17,7 @@


[LibraryClasses]

  BdsLib|Include/Library/BdsLib.h

+  NorFlashDeviceLib|Include/Library/NorFlashDeviceLib.h

  NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h



[Guids]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index bd5c6a949cf0..6cb1f64b9875 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,6 +20,7 @@


#include 

#include 

+#include 



#define NOR_FLASH_ERASE_RETRY  10



@@ -40,7 +41,6 @@
#define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr)   ((BaseAddr) + ((OffsetAddr) 
<< 2))

#define CREATE_DUAL_CMD(Cmd)   ( ( Cmd << 16) | ( Cmd & 
LOW_16_BITS) )

#define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd)MmioWrite32 
(CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))

-#define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize)  ( BaseAddr + 
(UINTN)((Lba) * LbaSize) )



// Status Register Bits

#define P30_SR_BIT_WRITE(BIT7 << 16 | BIT7)

@@ -105,145 +105,4 @@
#define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP  0x0060

#define P30_CMD_READ_CONFIGURATION_REGISTER0x0003



-typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;

-

-#pragma pack (1)

-typedef struct {

-  VENDOR_DEVICE_PATH  Vendor;

-  UINT8   Index;

-  EFI_DEVICE_PATH_PROTOCOLEnd;

-} NOR_FLASH_DEVICE_PATH;

-#pragma pack ()

-

-struct _NOR_FLASH_INSTANCE {

-  UINT32 Signature;

-  EFI_HANDLE Handle;

-

-  UINTN  DeviceBaseAddress;

-  UINTN  RegionBaseAddress;

-  UINTN  Size;

-  EFI_LBAStartLba;

-

-  EFI_BLOCK_IO_PROTOCOL  BlockIoProtocol;

-  EFI_BLOCK_IO_MEDIA Media;

-  EFI_DISK_IO_PROTOCOL   DiskIoProtocol;

-

-  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOLFvbProtocol;

-  VOID   *ShadowBuffer;

-

-  NOR_FLASH_DEVICE_PATH  DevicePath;

-};

-

-EFI_STATUS

-NorFlashReadCfiData (

-  IN  UINTN   DeviceBaseAddress,

-  IN  UINTN   CFI_Offset,

-  IN  UINT32  NumberOfBytes,

-  OUT UINT32  *Data

-  );

[SAMI] Where is this function implemented ?



-

-EFI_STATUS

-NorFlashWriteBuffer (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN UINTN   TargetAddress,

-  IN UINTN   BufferSizeInBytes,

-  IN UINT32  *Buffer

-  );

-

-//

-// NorFlash.c

-//

-EFI_STATUS

-NorFlashWriteSingleBlock (

-  INNOR_FLASH_INSTANCE  *Instance,

-  INEFI_LBA Lba,

-  INUINTN   Offset,

-  IN OUTUINTN   *NumBytes,

-  INUINT8   *Buffer

-  );

-

-EFI_STATUS

-NorFlashWriteBlocks (

-  IN  NOR_FLASH_INSTANCE  *Instance,

-  IN  EFI_LBA Lba,

-  IN  UINTN   BufferSizeInBytes,

-  IN  VOID*Buffer

-  );

-

-EFI_STATUS

-NorFlashReadBlocks (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN EFI_LBA Lba,

-  IN UINTN   BufferSizeInBytes,

-  OUT VOID   *Buffer

-  );

-

-EFI_STATUS

-NorFlashRead (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN EFI_LBA Lba,

-  IN UINTN   Offset,

-  IN UINTN   BufferSizeInBytes,

-  OUT VOID   *Buffer

-  );

-

-EFI_STATUS

-NorFlashWrite (

-  INNOR_FLASH_INSTANCE  *Instance,

-  INEFI_LBA Lba,

-  INUINTN   Offset,

-  

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 04/14] Platform/ARM/NorFlashDxe: Move flash specific functions to NorFlash.c

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Refactoring done in this patch has two major parts:

1. Moving out NorFlashUnlockAndEraseSingleBlock and
NorFlashWriteFullBlock functions from NorFlashDxe.c and
NorFlashStandaloneMm.c to NorFlash.c files.

2. At the same time, we are adding NorFlashLock and NorFlashUnlock
functions which will take care of TPL related operations needed by
functions mentioned in point 1. These functions are implemented
in NorFlashDxe.c but are just dummy placeholder functions in
NorFlashStandaloneMm.c file.

Signed-off-by: sahil 
---
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.h |  26 +++
  Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h   |  14 --
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c | 136 +-
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c  | 193 

  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c | 151 +++
  5 files changed, 225 insertions(+), 295 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index e0ebb1e2fd35..bd5c6a949cf0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -220,4 +220,30 @@ NorFlashWriteSingleWord (
IN UINT32  WriteData

);

  


+EFI_STATUS

+NorFlashWriteFullBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN EFI_LBA Lba,

+  IN UINT32  *DataBuffer,

+  IN UINT32  BlockSizeInWords

+  );

+

+EFI_STATUS

+NorFlashUnlockAndEraseSingleBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN UINTN   BlockAddress

+  );

+

+VOID

+EFIAPI

+NorFlashLock (

+  IN EFI_TPL  *OriginalTPL

+  );

+

+VOID

+EFIAPI

+NorFlashUnlock (

+  IN EFI_TPL OriginalTPL

+  );

+

  #endif /* __NOR_FLASH_H__ */

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
index e329e0727617..c0a3b5861532 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h
@@ -31,20 +31,6 @@
  //

  // NorFlashDxe.c

  //

-EFI_STATUS

-NorFlashWriteFullBlock (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN EFI_LBA Lba,

-  IN UINT32  *DataBuffer,

-  IN UINT32  BlockSizeInWords

-  );

-

-EFI_STATUS

-NorFlashUnlockAndEraseSingleBlock (

-  IN NOR_FLASH_INSTANCE  *Instance,

-  IN UINTN   BlockAddress

-  );

-

  EFI_STATUS

  NorFlashCreateInstance (

IN UINTNNorFlashDeviceBase,

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 4e5a97c83c7b..15000a692b02 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -10,7 +10,6 @@
  #include 

  


  #include "NorFlash.h"

-#include "NorFlashCommon.h"

  


  //

  // Global variable declarations

@@ -817,3 +816,138 @@ NorFlashReset (
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);

return EFI_SUCCESS;

  }

+

+/**

+ * This function unlock and erase an entire NOR Flash block.

+**/

+EFI_STATUS

+NorFlashUnlockAndEraseSingleBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN UINTN   BlockAddress

+  )

+{

+  EFI_STATUS  Status;

+  UINTN   Index;

+  EFI_TPL OriginalTPL;

+

+  NorFlashLock ();

+

+  Index = 0;

+  // The block erase might fail a first time (SW bug ?). Retry it ...

+  do {

+// Unlock the block if we have to

+Status = NorFlashUnlockSingleBlockIfNecessary (Instance, BlockAddress);

+if (EFI_ERROR (Status)) {

+  break;

+}

+

+Status = NorFlashEraseSingleBlock (Instance, BlockAddress);

+Index++;

+  } while ((Index < NOR_FLASH_ERASE_RETRY) && (Status == EFI_WRITE_PROTECTED));

+

+  if (Index == NOR_FLASH_ERASE_RETRY) {

+DEBUG ((DEBUG_ERROR, "EraseSingleBlock(BlockAddress=0x%08x: Block Locked Error 
(try to erase %d times)\n", BlockAddress, Index));

+  }

+

+  NorFlashUnlock (OriginalTPL);

+

+  return Status;

+}

+

+EFI_STATUS

+NorFlashWriteFullBlock (

+  IN NOR_FLASH_INSTANCE  *Instance,

+  IN EFI_LBA Lba,

+  IN UINT32  *DataBuffer,

+  IN UINT32  BlockSizeInWords

+  )

+{

+  EFI_STATUS  Status;

+  UINTN   WordAddress;

+  UINT32  WordIndex;

+  UINTN   BufferIndex;

+  UINTN   BlockAddress;

+  UINTN   BuffersInBlock;

+  UINTN   RemainingWords;

+  EFI_TPL OriginalTPL;

+  UINTN   Cnt;

+

+  Status = EFI_SUCCESS;

+

+  // Get the physical address of the block

+  BlockAddress = GET_NOR_BLOCK_ADDRESS (Instance->RegionBaseAddress, Lba, 
BlockSizeInWords * 4);

+

+  // Start writing from the first address at the start of the block

+  

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 03/14] Platform/ARM/NorFlashDxe: Add NorFlashCommon.h header file

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

This patch splits NorFlash.h and adds NorFlashCommon.h which
will have all the flash independent functions and macros.
Whereas all the flash specific functions will be in NorFlash.h
header file.

Signed-off-by: sahil 
---
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf  |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.h   | 199 
--
  Platform/ARM/Drivers/NorFlashDxe/NorFlashCommon.h | 221 

  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c |   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c|   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashFvb.c|   1 +
  Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.c   |   1 +
  9 files changed, 228 insertions(+), 199 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
index cdf1f5c27f35..18e99bac 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.inf
@@ -21,6 +21,7 @@
NorFlash.h

NorFlashBlockIoDxe.c

NorFlashDxe.c

+  NorFlashCommon.h

NorFlashFvb.c

  


  [Packages]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
index 001f281220f2..69c40ccf9c27 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashStandaloneMm.inf
@@ -22,6 +22,7 @@
NorFlash.c

NorFlash.h

NorFlashFvb.c

+  NorFlashCommon.h

NorFlashStandaloneMm.c

  


  [Packages]

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index d4d97bd22cc5..e0ebb1e2fd35 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -20,9 +20,6 @@
  


  #include 

  #include 

-#include 

-#include 

-#include 

  


  #define NOR_FLASH_ERASE_RETRY  10

  


@@ -108,11 +105,6 @@
  #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP  0x0060

  #define P30_CMD_READ_CONFIGURATION_REGISTER0x0003

  


-#define NOR_FLASH_SIGNATURE  SIGNATURE_32('n', 'o', 'r', '0')

-#define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, 
NOR_FLASH_SIGNATURE)

-#define INSTANCE_FROM_BLKIO_THIS(a)   CR(a, NOR_FLASH_INSTANCE, 
BlockIoProtocol, NOR_FLASH_SIGNATURE)

-#define INSTANCE_FROM_DISKIO_THIS(a)  CR(a, NOR_FLASH_INSTANCE, 
DiskIoProtocol, NOR_FLASH_SIGNATURE)

-

  typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;

  


  #pragma pack (1)

@@ -158,197 +150,6 @@ NorFlashWriteBuffer (
IN UINT32  *Buffer

);

  


-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoReset (

-  IN EFI_BLOCK_IO_PROTOCOL  *This,

-  IN BOOLEANExtendedVerification

-  );

-

-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoReadBlocks (

-  IN  EFI_BLOCK_IO_PROTOCOL  *This,

-  IN  UINT32 MediaId,

-  IN  EFI_LBALba,

-  IN  UINTN  BufferSizeInBytes,

-  OUT VOID   *Buffer

-  );

-

-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoWriteBlocks (

-  IN  EFI_BLOCK_IO_PROTOCOL  *This,

-  IN  UINT32 MediaId,

-  IN  EFI_LBALba,

-  IN  UINTN  BufferSizeInBytes,

-  IN  VOID   *Buffer

-  );

-

-//

-// BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks

-//

-EFI_STATUS

-EFIAPI

-NorFlashBlockIoFlushBlocks (

-  IN EFI_BLOCK_IO_PROTOCOL  *This

-  );

-

-//

-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk

-//

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoReadDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64Offset,

-  IN UINTN BufferSize,

-  OUT VOID *Buffer

-  );

-

-//

-// DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk

-//

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoWriteDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64Offset,

-  IN UINTN BufferSize,

-  IN VOID  *Buffer

-  );

-

-//

-// NorFlashFvbDxe.c

-//

-

-EFI_STATUS

-EFIAPI

-FvbGetAttributes (

-  IN CONST  EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL  *This,

-  OUT   EFI_FVB_ATTRIBUTES_2 *Attributes

-  );

-

-EFI_STATUS

-EFIAPI

-FvbSetAttributes (

-  IN CONST  

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 02/14] Platform/ARM/NorFlashDxe: Move NorFlashVirtualNotifyEvent

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Moving this function from NorFlash.c to NorFlashDxe.c as it is not
dependent on any particular flash implementation.

Signed-off-by: sahil 
---
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.h| 14 +++
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c| 44 
  Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c | 44 
  3 files changed, 51 insertions(+), 51 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
index c83032e87d9c..d4d97bd22cc5 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.h
@@ -342,6 +342,13 @@ NorFlashFvbInitialize (
IN NOR_FLASH_INSTANCE  *Instance

);

  


+VOID

+EFIAPI

+NorFlashVirtualNotifyEvent (

+  IN EFI_EVENT  Event,

+  IN VOID   *Context

+  );

+

  //

  // NorFlash.c

  //

@@ -412,11 +419,4 @@ NorFlashWriteSingleWord (
IN UINT32  WriteData

);

  


-VOID

-EFIAPI

-NorFlashVirtualNotifyEvent (

-  IN EFI_EVENT  Event,

-  IN VOID   *Context

-  );

-

  #endif /* __NOR_FLASH_H__ */

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 60854ef2a7d0..55f6abd0eef3 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -816,47 +816,3 @@ NorFlashReset (
SEND_NOR_COMMAND (Instance->DeviceBaseAddress, 0, P30_CMD_READ_ARRAY);

return EFI_SUCCESS;

  }

-

-/**

-  Fixup internal data so that EFI can be call in virtual mode.

-  Call the passed in Child Notify event and convert any pointers in

-  lib to virtual mode.

-

-  @param[in]Event   The Event that is being processed

-  @param[in]Context Event Context

-**/

-VOID

-EFIAPI

-NorFlashVirtualNotifyEvent (

-  IN EFI_EVENT  Event,

-  IN VOID   *Context

-  )

-{

-  UINTN  Index;

-

-  for (Index = 0; Index < mNorFlashDeviceCount; Index++) {

-EfiConvertPointer (0x0, (VOID 
**)[Index]->DeviceBaseAddress);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->RegionBaseAddress);

-

-// Convert BlockIo protocol

-EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.FlushBlocks);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.ReadBlocks);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.Reset);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.WriteBlocks);

-

-// Convert Fvb

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.EraseBlocks);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetAttributes);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetBlockSize);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetPhysicalAddress);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.Read);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.SetAttributes);

-EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.Write);

-

-if (mNorFlashInstances[Index]->ShadowBuffer != NULL) {

-  EfiConvertPointer (0x0, (VOID 
**)[Index]->ShadowBuffer);

-}

-  }

-

-  return;

-}

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
index f7b92de21a57..963af7dcf435 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlashDxe.c
@@ -504,3 +504,47 @@ NorFlashFvbInitialize (
  


return Status;

  }

+

+/**

+  Fixup internal data so that EFI can be call in virtual mode.

+  Call the passed in Child Notify event and convert any pointers in

+  lib to virtual mode.

+

+  @param[in]Event   The Event that is being processed

+  @param[in]Context Event Context

+**/

+VOID

+EFIAPI

+NorFlashVirtualNotifyEvent (

+  IN EFI_EVENT  Event,

+  IN VOID   *Context

+  )

+{

+  UINTN  Index;

+

+  for (Index = 0; Index < mNorFlashDeviceCount; Index++) {

+EfiConvertPointer (0x0, (VOID 
**)[Index]->DeviceBaseAddress);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->RegionBaseAddress);

+

+// Convert BlockIo protocol

+EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.FlushBlocks);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.ReadBlocks);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.Reset);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->BlockIoProtocol.WriteBlocks);

+

+// Convert Fvb

+EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.EraseBlocks);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetAttributes);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetBlockSize);

+EfiConvertPointer (0x0, (VOID 
**)[Index]->FvbProtocol.GetPhysicalAddress);

+

Re: [edk2-devel] [PATCH RESEND edk2-platforms][PATCH V2 01/14] Platform/ARM/NorFlashDxe: Move DiskIo related functions out of NorFlash.c

[Sami Mujawar]

Hi Sahil,

Thank you for this patch.

These changes look good to me.

Reviewed-by: Sami Mujawar 

Regards,

Sami Mujawar

On 23/04/2024 06:56 am, Sahil Kaushal wrote:

From: sahil 

Moving these functions from NorFlash.c to NorFlashBlockIoDxe.c as
they are not dependent on any particular flash implementation.

Signed-off-by: sahil 
---
  Platform/ARM/Drivers/NorFlashDxe/NorFlash.c   | 129 

  Platform/ARM/Drivers/NorFlashDxe/NorFlashBlockIoDxe.c | 129 

  2 files changed, 129 insertions(+), 129 deletions(-)

diff --git a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c 
b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
index 1b431073ee93..60854ef2a7d0 100644
--- a/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
+++ b/Platform/ARM/Drivers/NorFlashDxe/NorFlash.c
@@ -807,135 +807,6 @@ NorFlashWriteSingleBlock (
return EFI_SUCCESS;

  }

  


-/*

-  Although DiskIoDxe will automatically install the DiskIO protocol whenever

-  we install the BlockIO protocol, its implementation is sub-optimal as it 
reads

-  and writes entire blocks using the BlockIO protocol. In fact we can access

-  NOR flash with a finer granularity than that, so we can improve performance

-  by directly producing the DiskIO protocol.

-*/

-

-/**

-  Read BufferSize bytes from Offset into Buffer.

-

-  @param  This  Protocol instance pointer.

-  @param  MediaId   Id of the media, changes every time the media 
is replaced.

-  @param  OffsetThe starting byte offset to read from

-  @param  BufferSizeSize of Buffer

-  @param  BufferBuffer containing read data

-

-  @retval EFI_SUCCESS   The data was read correctly from the device.

-  @retval EFI_DEVICE_ERROR  The device reported an error while performing 
the read.

-  @retval EFI_NO_MEDIA  There is no media in the device.

-  @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.

-  @retval EFI_INVALID_PARAMETER The read request contains device addresses 
that are not

-valid for the device.

-

-**/

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoReadDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64DiskOffset,

-  IN UINTN BufferSize,

-  OUT VOID *Buffer

-  )

-{

-  NOR_FLASH_INSTANCE  *Instance;

-  UINT32  BlockSize;

-  UINT32  BlockOffset;

-  EFI_LBA Lba;

-

-  Instance = INSTANCE_FROM_DISKIO_THIS (This);

-

-  if (MediaId != Instance->Media.MediaId) {

-return EFI_MEDIA_CHANGED;

-  }

-

-  BlockSize = Instance->Media.BlockSize;

-  Lba   = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, 
);

-

-  return NorFlashRead (Instance, Lba, BlockOffset, BufferSize, Buffer);

-}

-

-/**

-  Writes a specified number of bytes to a device.

-

-  @param  This   Indicates a pointer to the calling context.

-  @param  MediaIdID of the medium to be written.

-  @param  Offset The starting byte offset on the logical block I/O device 
to write.

-  @param  BufferSize The size in bytes of Buffer. The number of bytes to write 
to the device.

-  @param  Buffer A pointer to the buffer containing the data to be written.

-

-  @retval EFI_SUCCESS   The data was written correctly to the device.

-  @retval EFI_WRITE_PROTECTED   The device can not be written to.

-  @retval EFI_DEVICE_ERROR  The device reported an error while performing 
the write.

-  @retval EFI_NO_MEDIA  There is no media in the device.

-  @retval EFI_MEDIA_CHANGED The MediaId does not match the current device.

-  @retval EFI_INVALID_PARAMETER The write request contains device addresses 
that are not

- valid for the device.

-

-**/

-EFI_STATUS

-EFIAPI

-NorFlashDiskIoWriteDisk (

-  IN EFI_DISK_IO_PROTOCOL  *This,

-  IN UINT32MediaId,

-  IN UINT64DiskOffset,

-  IN UINTN BufferSize,

-  IN VOID  *Buffer

-  )

-{

-  NOR_FLASH_INSTANCE  *Instance;

-  UINT32  BlockSize;

-  UINT32  BlockOffset;

-  EFI_LBA Lba;

-  UINTN   RemainingBytes;

-  UINTN   WriteSize;

-  EFI_STATUS  Status;

-

-  Instance = INSTANCE_FROM_DISKIO_THIS (This);

-

-  if (MediaId != Instance->Media.MediaId) {

-return EFI_MEDIA_CHANGED;

-  }

-

-  BlockSize = Instance->Media.BlockSize;

-  Lba   = (EFI_LBA)DivU64x32Remainder (DiskOffset, BlockSize, 
);

-

-  RemainingBytes = BufferSize;

-

-  // Write either all the remaining bytes, or the number of bytes that bring

-  // us up to a block boundary, whichever is less.

-  // (DiskOffset | (BlockSize - 1)) + 1) rounds DiskOffset up to the next

-  // block boundary (even if it is already on one).

-  WriteSize = MIN (RemainingBytes, ((DiskOffset | (BlockSize - 

Re: [edk2-devel] [edk2-redfish-client][PATCH] RedfishClientPkg: introduce RedfishBootstrapAccountDxe

[Igor Kulchytskyy via groups.io]

We can have some protocol where all Redfish clients register saying that they 
are using the bootstrap credentials.
And when they finish their job they notify RedfishBootstrapAccountDxe driver 
and when all of registered modules finish their job RedfishBootstrapAccountDxe 
driver delete the account.
Thank you,
Igor

-Original Message-
From: Nickle Wang 
Sent: Wednesday, May 15, 2024 11:10 PM
To: Chang, Abner ; Igor Kulchytskyy ; 
devel@edk2.groups.io
Cc: Nick Ramirez 
Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH] 
RedfishClientPkg: introduce RedfishBootstrapAccountDxe

> RedfishFeatureCore could be one of the Redfish clients, delete the credential 
> from
> Redfish account service in RedfishFeatureCore lifecycle may impact other 
> Redfish
> clients that still need the communication with Redfish service, right?

When all Redfish clients are managed by RedfishFeatureCore, I think we don't 
have such case. And this may be a good reason to keep it in RedfishClientPkg. 
This driver offers a way for BIOS to delete bootstrapping account at BMC after 
everything is done. Platform owner can decide to include this driver or not 
depending on the Redfish design in system.

Regards,
Nickle

> -Original Message-
> From: Chang, Abner 
> Sent: Thursday, May 16, 2024 10:41 AM
> To: Nickle Wang ; Igor Kulchytskyy ;
> devel@edk2.groups.io
> Cc: Nick Ramirez 
> Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH]
> RedfishClientPkg: introduce RedfishBootstrapAccountDxe
>
> External email: Use caution opening links or attachments
>
>
> [AMD Official Use Only - General]
>
> I think we probably overlook some use cases. Multiple edk2 Redfish 
> applications
> running simultaneously is allowed from the design perspective. However, we
> centralized GetAuthInfo in RedfishPlatformCredentialLib for all of edk2 
> Redfish
> client entities to leverage the same credential stored in EFI variable. This 
> way we
> can limit the process of acquiring credential to only one time Redfish IPMI
> bootstrap command sent to BMC.
> RedfishFeatureCore could be one of the Redfish clients, delete the credential 
> from
> Redfish account service in RedfishFeatureCore lifecycle may impact other 
> Redfish
> clients that still need the communication with Redfish service, right?
>
> Thanks
> Abner
>
> > -Original Message-
> > From: Nickle Wang 
> > Sent: Thursday, May 16, 2024 9:38 AM
> > To: Chang, Abner ; Igor Kulchytskyy
> > ; devel@edk2.groups.io
> > Cc: Nick Ramirez 
> > Subject: RE: [EXTERNAL] RE: [edk2-devel] [edk2-redfish-client][PATCH]
> > RedfishClientPkg: introduce RedfishBootstrapAccountDxe
> >
> > [AMD Official Use Only - General]
> >
> > Caution: This message originated from an External Source. Use proper
> > caution when opening attachments, clicking links, or responding.
> >
> >
> > Hi Igor, Abner,
> >
> > > Maybe we should consider moving RedfishBootstrapAccountDxe driver to
> > RedfishPkg and have some register mechanism which will be used by
> > interested drivers to notify that they finished their job and after
> > that RedfishBootstrapAccountDxe driver would delete an account.
> >
> > You are saying the mechanism in runtime, right? In current design,
> > RedfishFeatureCore driver will send "after provisioning" signal to
> > notify this driver to delete bootstrapping account. This makes sure
> > that all feature drivers are done with their jobs, so this driver is
> > safe to delete bootstrapping account at BMC.
> >
> > If we move it to RedfishPkg, there is no such centralized Redfish
> > driver managing Redfish stuff. How does a particular driver know that
> > there is no other driver running Redfish stuff after it? The way I can
> > think of now is to rely on EDK2 ready-to-boot event as the signal to
> > do the notification, since there is not supposed to have Redfish driver 
> > running
> jobs after this event...
> >
> > Regards,
> > Nickle
> >
> > > -Original Message-
> > > From: Chang, Abner 
> > > Sent: Thursday, May 16, 2024 9:06 AM
> > > To: Igor Kulchytskyy ; Nickle Wang
> > > ; devel@edk2.groups.io
> > > Cc: Nick Ramirez 
> > > Subject: RE: [EXTERNAL] RE: [edk2-devel]
> > > [edk2-redfish-client][PATCH]
> > > RedfishClientPkg: introduce RedfishBootstrapAccountDxe
> > >
> > > External email: Use caution opening links or attachments
> > >
> > >
> > > [AMD Official Use Only - General]
> > >
> > > HI Igor,
> > > This sounds to me reasonable to me. As you mentioned, RedfishPkg was
> > designed
> > > to support multiple Redfish applications and RedfishClientPkg is
> > > just one of
> > them. I
> > > think we can review the implementation of acquiring/deleting credential.
> > >
> > > Thanks
> > > Abner
> > >
> > >
> > > > -Original Message-
> > > > From: Igor Kulchytskyy 
> > > > Sent: Wednesday, May 15, 2024 11:02 PM
> > > > To: Nickle Wang ; devel@edk2.groups.io; Chang,
> > > > Abner 
> > > > Cc: Nick Ramirez 
> > > > Subject: RE: [EXTERNAL] RE: 

Re: [edk2-devel] [PATCH] OvmfPkg: Update VMM Hob list check to support new resource attributes

[Yao, Jiewen]

Reviewed-by: Jiewen Yao 

> -Original Message-
> From: devel@edk2.groups.io  On Behalf Of Lin, Du
> Sent: Thursday, May 9, 2024 1:27 PM
> To: devel@edk2.groups.io
> Cc: Lin, Du ; Ard Biesheuvel ;
> Gerd Hoffmann ; Yao, Jiewen 
> Subject: [edk2-devel] [PATCH] OvmfPkg: Update VMM Hob list check to support
> new resource attributes
> 
> Encrypted and Special Purpose resource attributes are introduced in
> PI 1.8 Specification. This patch is to update VMM Hob list integrity
> check to recognise these resource attributes.
> 
> Cc: Ard Biesheuvel 
> Cc: Gerd Hoffmann 
> Cc: Jiewen Yao 
> Signed-off-by: Du Lin 
> ---
>  OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c
> b/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c
> index b6085eab44..19e9b1bf54 100644
> --- a/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c
> +++ b/OvmfPkg/IntelTdx/TdxHelperLib/SecTdxHelper.c
> @@ -643,6 +643,8 @@ ValidateHobList (
>  
> EFI_RESOURCE_ATTRIBUTE_PERSISTABLE |
> 
> EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTED |
> 
> EFI_RESOURCE_ATTRIBUTE_READ_ONLY_PROTECTABLE |
> +
> EFI_RESOURCE_ATTRIBUTE_ENCRYPTED|
> +
> EFI_RESOURCE_ATTRIBUTE_SPECIAL_PURPOSE |
> 
> EFI_RESOURCE_ATTRIBUTE_MORE_RELIABLE))) != 0)
>  {
>DEBUG ((DEBUG_ERROR, "HOB: Unknow ResourceDescriptor
> ResourceAttribute type. Type: 0x%08x\n", Hob.ResourceDescriptor-
> >ResourceAttribute));
> --
> 2.44.0.windows.1
> 
> 
> 
> 
> 



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Re: [edk2-devel] [PATCH V3 1/1] CryptoPkg: Remove deprecated code related to SHA-1

[Li, Yi]

Looks good to me.
Reviewed-by: Yi Li 

We are in Hard Freeze phase, will push it after freeze. Thanks.

-Original Message-
From: devel@edk2.groups.io  On Behalf Of Qingyu
Sent: Thursday, May 16, 2024 3:35 PM
To: devel@edk2.groups.io
Cc: Yao, Jiewen ; Li, Yi1 
Subject: [edk2-devel] [PATCH V3 1/1] CryptoPkg: Remove deprecated code related 
to SHA-1

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4698

The default drbg type of randlib has been switched to aes_256_ctr in 
openssl1.1.1, so sha1 is not really used in RandomSeed(). Remove related code 
which do SHA-1 support checking in CryptRand.c and CryptRandTsc.c to avoid 
potential compatibility errors.

Signed-off-by: Shang Qingyu 
Cc: Jiewen Yao 
Cc: Yi Li 
---
 CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c| 8 
 CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c | 8 
 2 files changed, 16 deletions(-)

diff --git a/CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c 
b/CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c
index 9e2fcefe084e..51c7435898c7 100644
--- a/CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c
+++ b/CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c
@@ -42,14 +42,6 @@ RandomSeed (
 return FALSE;
   }
 
-  //
-  // The software PRNG implementation built in OpenSSL depends on message 
digest algorithm.
-  // Make sure SHA-1 digest algorithm is available here.
-  //
-  if (EVP_add_digest (EVP_sha1 ()) == 0) {
-return FALSE;
-  }
-
   //
   // Seed the pseudorandom number generator with user-supplied value.
   // NOTE: A cryptographic PRNG must be seeded with unpredictable data.
diff --git a/CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c 
b/CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c
index 30454bf10f9b..b94c16de562d 100644
--- a/CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c
+++ b/CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c
@@ -40,14 +40,6 @@ RandomSeed (
 return FALSE;
   }
 
-  //
-  // The software PRNG implementation built in OpenSSL depends on message 
digest algorithm.
-  // Make sure SHA-1 digest algorithm is available here.
-  //
-  if (EVP_add_digest (EVP_sha1 ()) == 0) {
-return FALSE;
-  }
-
   //
   // Seed the pseudorandom number generator with user-supplied value.
   // NOTE: A cryptographic PRNG must be seeded with unpredictable data.
--
2.44.0.windows.1








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Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol

[Chang, Abner via groups.io]

[AMD Official Use Only - AMD Internal Distribution Only]

That is awesome!  Thank you!

Abner

> -Original Message-
> From: Nhi Pham 
> Sent: Thursday, May 16, 2024 4:50 PM
> To: Chang, Abner ; devel@edk2.groups.io;
> nick...@nvidia.com; Rebecca Cran 
> Cc: Isaac Oram ; Attar, AbdulLateef (Abdul Lateef)
> ; Tinh Nguyen
> 
> Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add
> support for the phosphor ipmi blob transfer protocol
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> On 5/16/2024 3:44 PM, Chang, Abner wrote:
> > [AMD Official Use Only - AMD Internal Distribution Only]
> >
> > Hi Nhi,
> > Are you using SSIF as the transport interface based on the ManabeabilityPkg
> framework? If yes, will you contribute that driver?
> >
>
> yes, we are. I will need to update the SSIF driver to be compatible with
> the ManabeabilityPkg and upstream it.
>
> Regards,
> Nhi


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Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol

[Nhi Pham via groups.io]

On 5/16/2024 3:44 PM, Chang, Abner wrote:

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Nhi,
Are you using SSIF as the transport interface based on the ManabeabilityPkg 
framework? If yes, will you contribute that driver?



yes, we are. I will need to update the SSIF driver to be compatible with 
the ManabeabilityPkg and upstream it.


Regards,
Nhi


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Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol

[Chang, Abner via groups.io]

[AMD Official Use Only - AMD Internal Distribution Only]

Hi Nhi,
Are you using SSIF as the transport interface based on the ManabeabilityPkg 
framework? If yes, will you contribute that driver?

Thanks
Abner

> -Original Message-
> From: Nhi Pham 
> Sent: Thursday, May 16, 2024 4:40 PM
> To: devel@edk2.groups.io; nick...@nvidia.com; Chang, Abner
> ; Rebecca Cran 
> Cc: Isaac Oram ; Attar, AbdulLateef (Abdul Lateef)
> ; Tinh Nguyen
> 
> Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add
> support for the phosphor ipmi blob transfer protocol
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Thanks Nickle. I'm reviewing and testing it. Will get back to you soon.
>
> On 5/15/2024 10:14 PM, Nickle Wang via groups.io wrote:
> > Hi Nhi,
> >
> > Version 2 patch files are sent for review here:
> https://edk2.groups.io/g/devel/message/118914 and
> https://edk2.groups.io/g/devel/message/118922
> >
> > For your convenience, below are two pull requests if you would like to test
> them.
> >
> > 1) https://github.com/tianocore/edk2/pull/5660
> > 2) https://github.com/tianocore/edk2-platforms/pull/76
> >
> > I had tried to address review comments as much as I can. Please feel free to
> let me know if you see any issue in this version of patch set.
> >
> > Thanks,
> > Nickle
> >
> >> -Original Message-
> >> From: Nhi Pham 
> >> Sent: Tuesday, May 14, 2024 10:26 AM
> >> To: Nickle Wang ; devel@edk2.groups.io;
> >> abner.ch...@amd.com; Rebecca Cran 
> >> Cc: Isaac Oram ; Attar, AbdulLateef (Abdul
> Lateef)
> >> ; Tinh Nguyen
> >> 
> >> Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add
> >> support for the phosphor ipmi blob transfer protocol
> >>
> >> External email: Use caution opening links or attachments
> >>
> >>
> >> Thanks Nickle. I will help review and verify your patch.
> >>
> >> On 5/14/2024 8:56 AM, Nickle Wang wrote:
> >>> Hi Nhi,
> >>>
> >>> This task is on my list but with lower priority. I will try to provide 
> >>> version 2
> patch
> >> for review here by the end of this week.
> >>>
> >>> Thanks,
> >>> Nickle
> >>>
>  -Original Message-
>  From: Nhi Pham 
>  Sent: Monday, May 13, 2024 5:02 PM
>  To: devel@edk2.groups.io; abner.ch...@amd.com; Nickle Wang
>  ; Rebecca Cran 
>  Cc: Isaac Oram ; Attar, AbdulLateef (Abdul
>  Lateef) ; Tinh Nguyen
>  
>  Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg:
>  add support for the phosphor ipmi blob transfer protocol
> 
>  External email: Use caution opening links or attachments
> 
> 
>  On 2/9/2024 11:37 PM, Chang, Abner via groups.io wrote:
> > [AMD Official Use Only - General]
> >
> > Yeah, I forget this patch set and seems we don't have any follow up
> > conversation
>  after below feedbacks from community.
> >
> >
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fed
> >
> >>
> k2%2F=05%7C02%7Cnicklew%40nvidia.com%7Cdc53be8f0cf24ccfd35
> 108d
> >> c
> >
> >>
> 73bd2d45%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C63851
> 25035
> >> 6068
> >
> >>
> 8708%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2l
> uMzIi
> >> LCJ
> >
> >>
> BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=%2BCkaU%2Fcd
> G1v
> >> r6uPsA
> > 7fqrvhvxg%2FX5FqcmJ6fizaa9fA%3D=0
> > .groups.io%2Fg%2Fdevel%2Fmessage%2F103116=05%7C02%7
> Cnickle
> >> w
>  %40nvi
> >
> 
> >>
> dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c
> 1b7db
>  39efd
> >
> 
> >>
> 9ccc17a%7C0%7C0%7C638511877469561600%7CUnknown%7CTWFpbGZs
> b3d8
>  eyJWIjoiM
> >
> 
> >>
> C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7
> C%7
>  C%7C
> >
> =N4eDH668lBSFxq9r81QrhMgpULvht8isrrEI9lipVKc%3D=0
> >
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fed
> >
> >>
> k2%2F=05%7C02%7Cnicklew%40nvidia.com%7Cdc53be8f0cf24ccfd35
> 108d
> >> c
> >
> >>
> 73bd2d45%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C63851
> 25035
> >> 6070
> >
> >>
> 0897%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2l
> uMzIi
> >> LCJ
> >
> >>
> BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=KFd86NhmrQeG
> qEB
> >> 8%2FJy
> > 0qnbMkb%2Furpo8YCsVbVsOxNk%3D=0
> > .groups.io%2Fg%2Fdevel%2Fmessage%2F103087=05%7C02%7
> Cnickle
> >> w
>  %40nvi
> >
> 
> >>
> dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c
> 1b7db
>  39efd
> >
> 
> >>
> 9ccc17a%7C0%7C0%7C638511877469569817%7CUnknown%7CTWFpbGZs
> b3d8
>  eyJWIjoiM
> >
> 
> >>
> C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7
> C%7
>  C%7C
> >
> 
> >>
> =7p0BHb8RFRapFyygr35u0hQBK2bQwKPSypBaUi6cMIQ%3D
> d=0
> >
> > So Nickle, does NV still has the plan to upstream IPMI blob edk2
>  implementation? We should keep driving 

Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add support for the phosphor ipmi blob transfer protocol

[Nhi Pham via groups.io]

Thanks Nickle. I'm reviewing and testing it. Will get back to you soon.

On 5/15/2024 10:14 PM, Nickle Wang via groups.io wrote:

Hi Nhi,

Version 2 patch files are sent for review here: 
https://edk2.groups.io/g/devel/message/118914 and 
https://edk2.groups.io/g/devel/message/118922

For your convenience, below are two pull requests if you would like to test 
them.

1) https://github.com/tianocore/edk2/pull/5660
2) https://github.com/tianocore/edk2-platforms/pull/76

I had tried to address review comments as much as I can. Please feel free to 
let me know if you see any issue in this version of patch set.

Thanks,
Nickle


-Original Message-
From: Nhi Pham 
Sent: Tuesday, May 14, 2024 10:26 AM
To: Nickle Wang ; devel@edk2.groups.io;
abner.ch...@amd.com; Rebecca Cran 
Cc: Isaac Oram ; Attar, AbdulLateef (Abdul Lateef)
; Tinh Nguyen

Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg: add
support for the phosphor ipmi blob transfer protocol

External email: Use caution opening links or attachments


Thanks Nickle. I will help review and verify your patch.

On 5/14/2024 8:56 AM, Nickle Wang wrote:

Hi Nhi,

This task is on my list but with lower priority. I will try to provide version 
2 patch

for review here by the end of this week.


Thanks,
Nickle


-Original Message-
From: Nhi Pham 
Sent: Monday, May 13, 2024 5:02 PM
To: devel@edk2.groups.io; abner.ch...@amd.com; Nickle Wang
; Rebecca Cran 
Cc: Isaac Oram ; Attar, AbdulLateef (Abdul
Lateef) ; Tinh Nguyen

Subject: Re: [edk2-devel] [edk2-platforms][PATCH] ManageabilityPkg:
add support for the phosphor ipmi blob transfer protocol

External email: Use caution opening links or attachments


On 2/9/2024 11:37 PM, Chang, Abner via groups.io wrote:

[AMD Official Use Only - General]

Yeah, I forget this patch set and seems we don't have any follow up
conversation

after below feedbacks from community.


https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fed


k2%2F=05%7C02%7Cnicklew%40nvidia.com%7Cdc53be8f0cf24ccfd35108d
c



73bd2d45%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C6385125035
6068



8708%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi
LCJ



BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=%2BCkaU%2FcdG1v
r6uPsA

7fqrvhvxg%2FX5FqcmJ6fizaa9fA%3D=0
.groups.io%2Fg%2Fdevel%2Fmessage%2F103116=05%7C02%7Cnickle

w

%40nvi





dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c1b7db

39efd





9ccc17a%7C0%7C0%7C638511877469561600%7CUnknown%7CTWFpbGZsb3d8

eyJWIjoiM





C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7

C%7C

=N4eDH668lBSFxq9r81QrhMgpULvht8isrrEI9lipVKc%3D=0
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fed


k2%2F=05%7C02%7Cnicklew%40nvidia.com%7Cdc53be8f0cf24ccfd35108d
c



73bd2d45%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C6385125035
6070



0897%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi
LCJ



BTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C=KFd86NhmrQeGqEB
8%2FJy

0qnbMkb%2Furpo8YCsVbVsOxNk%3D=0
.groups.io%2Fg%2Fdevel%2Fmessage%2F103087=05%7C02%7Cnickle

w

%40nvi





dia.com%7C8b9e1a8a8d044208f8d608dc732b678d%7C43083d15727340c1b7db

39efd





9ccc17a%7C0%7C0%7C638511877469569817%7CUnknown%7CTWFpbGZsb3d8

eyJWIjoiM





C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7

C%7C





=7p0BHb8RFRapFyygr35u0hQBK2bQwKPSypBaUi6cMIQ%3D=0


So Nickle, does NV still has the plan to upstream IPMI blob edk2

implementation? We should keep driving upstream the implementation as
industry needs it to incorporate with OpenBMC.


Hi Rebessa,
As we are on Chinese New Year holidays now, please expect the delay

response.

Thanks
Abner



Hi Nickle and Abner,

May I know the status of upstreaming the IPMI Blob Transfer Protocol?
I'm planning to upstream the SMBIOS transfer to OpenBMC by leveraging
this protocol.

Thanks,
Nhi









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[edk2-devel] [PATCH V3 1/1] CryptoPkg: Remove deprecated code related to SHA-1

[Qingyu]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4698

The default drbg type of randlib has been switched to aes_256_ctr in
openssl1.1.1, so sha1 is not really used in RandomSeed(). Remove related code
which do SHA-1 support checking in CryptRand.c and CryptRandTsc.c to avoid
potential compatibility errors.

Signed-off-by: Shang Qingyu 
Cc: Jiewen Yao 
Cc: Yi Li 
---
 CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c| 8 
 CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c | 8 
 2 files changed, 16 deletions(-)

diff --git a/CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c 
b/CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c
index 9e2fcefe084e..51c7435898c7 100644
--- a/CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c
+++ b/CryptoPkg/Library/BaseCryptLib/Rand/CryptRand.c
@@ -42,14 +42,6 @@ RandomSeed (
 return FALSE;
   }
 
-  //
-  // The software PRNG implementation built in OpenSSL depends on message 
digest algorithm.
-  // Make sure SHA-1 digest algorithm is available here.
-  //
-  if (EVP_add_digest (EVP_sha1 ()) == 0) {
-return FALSE;
-  }
-
   //
   // Seed the pseudorandom number generator with user-supplied value.
   // NOTE: A cryptographic PRNG must be seeded with unpredictable data.
diff --git a/CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c 
b/CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c
index 30454bf10f9b..b94c16de562d 100644
--- a/CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c
+++ b/CryptoPkg/Library/BaseCryptLib/Rand/CryptRandTsc.c
@@ -40,14 +40,6 @@ RandomSeed (
 return FALSE;
   }
 
-  //
-  // The software PRNG implementation built in OpenSSL depends on message 
digest algorithm.
-  // Make sure SHA-1 digest algorithm is available here.
-  //
-  if (EVP_add_digest (EVP_sha1 ()) == 0) {
-return FALSE;
-  }
-
   //
   // Seed the pseudorandom number generator with user-supplied value.
   // NOTE: A cryptographic PRNG must be seeded with unpredictable data.
-- 
2.44.0.windows.1



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[edk2-devel] [PATCH] NetworkPkg:UefiPxeBcDxe:CoverityIssues

[Santhosh Kumar V via groups.io]

Resolved Coverity Issues in UefiPxeBcDxe
1.PxeBcHandleDhcp4Offer
Expression "Private->SelectIndex - 1", where "Private->SelectIndex" is known to 
be equal to 0, underflows the type that receives it.
2.PxeBcDhcp4Discover
Directly dereferencing pointer "Token.Packet" which might have NULL .As 
Token.Packet is checked against NULL in the function Exit line no 1587.
3.PxeBcDns6
Coverity reports dead loop error since IsDone is always false ,In Some scenario 
it might not update the to true
4.PxeBcHandleDhcp6Offer
Expression "Private->SelectIndex - 1", where "Private->SelectIndex" is known to 
be equal to 0, underflows the type that receives it.
5.PxeBcDhcp6Sarr
Potentially overflowing expression "1000U * 
DadXmits.DupAddrDetectTransmits" with type "unsigned int" (32 bits, unsigned)
6.PxeBcDriver.c
Private Data might be dereferencing the NULL pointer in some scenario.And also 
private is checked against null in function's Exit.
For Example: below code checked private with NULL pointer in PxeBcStart()
  if (FirstStart && Private != NULL) {
FreePool (Private);


Cc: Saloni Kasbekar 
Cc: Zachary Clark-williams 

Signed-off-by: SanthoshKumarV 
---
 NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c  |  8 ++--
 NetworkPkg/UefiPxeBcDxe/PxeBcDhcp6.c  |  8 +---
 NetworkPkg/UefiPxeBcDxe/PxeBcDriver.c | 11 +--
 3 files changed, 20 insertions(+), 7 deletions(-)

diff --git a/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c 
b/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c
index 91146b78cb..cfb7fe2301 100644
--- a/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c
+++ b/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp4.c
@@ -1024,9 +1024,11 @@ PxeBcHandleDhcp4Offer (
   EFI_STATUSStatus;

   EFI_PXE_BASE_CODE_MODE*Mode;

   EFI_DHCP4_PACKET  *Ack;

+  SelectIndex = 0;



   ASSERT (Private->SelectIndex > 0);

-  SelectIndex = (UINT32)(Private->SelectIndex - 1);

+  if (Private->SelectIndex > 0)

+SelectIndex = (UINT32)(Private->SelectIndex - 1);

   ASSERT (SelectIndex < PXEBC_OFFER_MAX_NUM);

   Cache4  = >OfferBuffer[SelectIndex].Dhcp4;

   Options = Cache4->OptList;

@@ -1455,7 +1457,9 @@ PxeBcDhcp4Discover (
   if (EFI_ERROR (Status)) {

 return Status;

   }

-

+  if (Token.Packet == NULL) {

+  return EFI_NOT_FOUND;

+  }

   if (Mode->SendGUID) {

 if (EFI_ERROR (NetLibGetSystemGuid ((EFI_GUID 
*)Token.Packet->Dhcp4.Header.ClientHwAddr))) {

   //

diff --git a/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp6.c 
b/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp6.c
index 7fd1281c11..11c89bcaa0 100644
--- a/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp6.c
+++ b/NetworkPkg/UefiPxeBcDxe/PxeBcDhcp6.c
@@ -293,8 +293,7 @@ PxeBcDns6 (
   if (EFI_ERROR (Status)) {

 goto Exit;

   }

-

-  while (!IsDone) {

+  while (!IsDone && (Dns6->Poll != NULL)) {

 Dns6->Poll (Dns6);

   }



@@ -1422,9 +1421,12 @@ PxeBcHandleDhcp6Offer (
   UINT32ProxyIndex;

   UINT32SelectIndex;

   UINT32Index;

+  SelectIndex = 0;



   ASSERT (Private != NULL);

   ASSERT (Private->SelectIndex > 0);

+  if (Private->SelectIndex > 0)

+  SelectIndex = (UINT32)(Private->SelectIndex - 1);

   SelectIndex = (UINT32)(Private->SelectIndex - 1);

   ASSERT (SelectIndex < PXEBC_OFFER_MAX_NUM);

   Cache6 = >OfferBuffer[SelectIndex].Dhcp6;

@@ -2430,8 +2432,8 @@ PxeBcDhcp6Sarr (
   Dhcp6->Configure (Dhcp6, NULL);

   return Status;

 }

+GetMappingTimeOut = TICKS_PER_SECOND * 
(UINT64)DadXmits.DupAddrDetectTransmits + PXEBC_DAD_ADDITIONAL_DELAY;



-GetMappingTimeOut = TICKS_PER_SECOND * DadXmits.DupAddrDetectTransmits + 
PXEBC_DAD_ADDITIONAL_DELAY;

 Status= gBS->SetTimer (Timer, TimerRelative, 
GetMappingTimeOut);

 if (EFI_ERROR (Status)) {

   gBS->CloseEvent (Timer);

diff --git a/NetworkPkg/UefiPxeBcDxe/PxeBcDriver.c 
b/NetworkPkg/UefiPxeBcDxe/PxeBcDriver.c
index d84aca7e85..4d0afd62f3 100644
--- a/NetworkPkg/UefiPxeBcDxe/PxeBcDriver.c
+++ b/NetworkPkg/UefiPxeBcDxe/PxeBcDriver.c
@@ -109,7 +109,9 @@ PxeBcDestroyIp4Children (
   )

 {

   ASSERT (Private != NULL);

-

+  if (Private == NULL){

+  return;

+  }

   if (Private->ArpChild != NULL) {

 //

 // Close Arp for PxeBc->Arp and destroy the instance.

@@ -291,7 +293,9 @@ PxeBcDestroyIp6Children (
   )

 {

   ASSERT (Private != NULL);

-

+  if (Private == NULL){

+  return;

+  }

   if (Private->Ip6Child != NULL) {

 //

 // Close Ip6 for Ip6->Ip6Config and destroy the instance.

@@ -561,6 +565,9 @@ PxeBcCreateIp4Children (
   PXEBC_PRIVATE_PROTOCOL   *Id;

   EFI_SIMPLE_NETWORK_PROTOCOL  *Snp;



+  if (Private == NULL){

+  return EFI_INVALID_PARAMETER;

+  }

   if (Private->Ip4Nic != NULL) {

 //

 // Already created before.

--
2.42.0.windows.2
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