[edk2-devel] [PATCH v2 2/2] CorebootPayloadPkg: Fix non - CRLF line endings
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1658 Replaced non CRLF line endings with CRLF Cc: Maurice Ma Cc: Benjamin You Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Agyeman --- .../PlatformHookLib/PlatformHookLib.inf| 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf index 3230105901..c16911fe96 100644 --- a/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf +++ b/CorebootPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf @@ -19,7 +19,7 @@ MODULE_TYPE= BASE VERSION_STRING = 1.0 LIBRARY_CLASS = PlatformHookLib - CONSTRUCTOR= PlatformHookSerialPortInitialize + CONSTRUCTOR= PlatformHookSerialPortInitialize [Sources] PlatformHookLib.c @@ -27,7 +27,7 @@ [LibraryClasses] CbParseLib PcdLib - PciLib + PciLib [Packages] MdePkg/MdePkg.dec @@ -35,10 +35,10 @@ CorebootModulePkg/CorebootModulePkg.dec [Pcd] - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## PRODUCES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase## PRODUCES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate## PRODUCES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## PRODUCES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## PRODUCES - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate ## PRODUCES - gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## PRODUCES + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate ## PRODUCES + gEfiMdeModulePkgTokenSpaceGuid.PcdPciSerialParameters ## PRODUCES -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#64): https://edk2.groups.io/g/devel/message/64 Mute This Topic: https://groups.io/mt/30897542/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [PATCH v2 1/2] CorebootModulePkg: Fix non - CRLF line endings
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1658
Replaced non CRLF line endings with CRLF
Cc: Maurice Ma
Cc: Benjamin You
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Agyeman
---
CorebootModulePkg/Include/Coreboot.h | 32 +-
.../BaseSerialPortLib16550.c | 2178 -
.../SataControllerDxe/SataController.h| 1082
CorebootModulePkg/SecCore/Ia32/Stack.S| 138 +-
4 files changed, 1715 insertions(+), 1715 deletions(-)
diff --git a/CorebootModulePkg/Include/Coreboot.h
b/CorebootModulePkg/Include/Coreboot.h
index 784e0b128a..b622e6f17e 100644
--- a/CorebootModulePkg/Include/Coreboot.h
+++ b/CorebootModulePkg/Include/Coreboot.h
@@ -80,7 +80,7 @@ struct imd_root {
UINT32 max_entries;
UINT32 num_entries;
UINT32 flags;
- UINT32 entry_align;
+ UINT32 entry_align;
UINT32 max_offset;
struct imd_entry entries[0];
};
@@ -165,21 +165,21 @@ struct cb_serial {
UINT32 type;
UINT32 baseaddr;
UINT32 baud;
- UINT32 regwidth;
-
- // Crystal or input frequency to the chip containing the UART.
- // Provide the board specific details to allow the payload to
- // initialize the chip containing the UART and make independent
- // decisions as to which dividers to select and their values
- // to eventually arrive at the desired console baud-rate.
- UINT32 input_hertz;
-
- // UART PCI address: bus, device, function
- // 1 << 31 - Valid bit, PCI UART in use
- // Bus << 20
- // Device << 15
- // Function << 12
- UINT32 uart_pci_addr;
+ UINT32 regwidth;
+
+ // Crystal or input frequency to the chip containing the UART.
+ // Provide the board specific details to allow the payload to
+ // initialize the chip containing the UART and make independent
+ // decisions as to which dividers to select and their values
+ // to eventually arrive at the desired console baud-rate.
+ UINT32 input_hertz;
+
+ // UART PCI address: bus, device, function
+ // 1 << 31 - Valid bit, PCI UART in use
+ // Bus << 20
+ // Device << 15
+ // Function << 12
+ UINT32 uart_pci_addr;
};
#define CB_TAG_CONSOLE 0x00010
diff --git
a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
index a5e1755a44..804b948906 100644
--- a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
+++ b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c
@@ -1,1095 +1,1095 @@
-/** @file
- 16550 UART Serial Port library functions
-
- (C) Copyright 2014 Hewlett-Packard Development Company, L.P.
- Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD
License
- which accompanies this distribution. The full text of the license may be
found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-//
+/** @file
+ 16550 UART Serial Port library functions
+
+ (C) Copyright 2014 Hewlett-Packard Development Company, L.P.
+ Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD
License
+ which accompanies this distribution. The full text of the license may be
found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+//
// PCI Definitions.
-//
-#define PCI_BRIDGE_32_BIT_IO_SPACE 0x01
-
-//
-// 16550 UART register offsets and bitfields
-//
-#define R_UART_RXBUF 0
-#define R_UART_TXBUF 0
-#define R_UART_BAUD_LOW 0
-#define R_UART_BAUD_HIGH 1
-#define R_UART_FCR2
-#define B_UART_FCR_FIFOEBIT0
-#define B_UART_FCR_FIFO64 BIT5
-#define R_UART_LCR3
-#define B_UART_LCR_DLAB BIT7
-#define R_UART_MCR4
-#define B_UART_MCR_DTRC BIT0
-#define B_UART_MCR_RTS BIT1
-#define R_UART_LSR5
-#define B_UART_LSR_RXRDYBIT0
-#define B_UART_LSR_TXRDYBIT5
-#define B_UART_LSR_TEMT BIT6
-#define R_UART_MSR6
-#define B_UART_MSR_CTS BIT4
-#define B_UART_MSR_DSR BIT5
-#define B_UART_MSR_RI BIT6
-#define B_UART_MSR_DCD BIT7
-
-//
-// 4-byte structure for each PCI node in PcdSerialPciDeviceInfo
-//
-typedef struct {
- UINT8 Device;
- UINT8 Function;
- UINT16 PowerManage
[edk2-devel] [PATCH v2 0/2] Fixed CorebootModulePkg and CorebootPayloadPkg incorrect line endings
Resending to new mailing list Fixed files with incorrect line endings in CorebootModulePkg to pass PatchCheck.py Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1658 v1 : fixed CRLF line endings v2: Removed trailing white spaces Agyeman (2): CorebootModulePkg: Fix non - CRLF line endings CorebootPayloadPkg: Fix non - CRLF line endings CorebootModulePkg/Include/Coreboot.h | 32 +- .../BaseSerialPortLib16550.c | 2178 - .../SataControllerDxe/SataController.h| 1082 CorebootModulePkg/SecCore/Ia32/Stack.S| 138 +- .../PlatformHookLib/PlatformHookLib.inf | 18 +- 5 files changed, 1724 insertions(+), 1724 deletions(-) -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#63): https://edk2.groups.io/g/devel/message/63 Mute This Topic: https://groups.io/mt/30897541/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms/devel-MinPlatform] [PATCH v2 2/3] ReadMe.md: Update the build instructions
Updated the build instructions to include the python script build instructions Cc: Michael Kubacki Cc: Michael D Kinney Cc: Nate DeSimone Cc: Liming Gao Cc: Ankit Sinha Cc: Bowen Zhou Cc: Shifei A Lu Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Agyeman --- ReadMe.md | 37 + 1 file changed, 37 insertions(+) diff --git a/ReadMe.md b/ReadMe.md index 72e332a476..a94d8051d6 100644 --- a/ReadMe.md +++ b/ReadMe.md @@ -105,6 +105,43 @@ return back to the minimum platform caller. ### Build +**Building with the python script** + +1. Open command window, go to the workspace directory, e.g. c:\Kabylake. +2. Type "cd edk2-platforms\Platform\Intel +3. Type "python BuildBios.py -p REPLACE_WITH_BOARD_NAME" + +* BuildBios.py Arguments: + + | Argument | Function| + | --|-| + | -h, --help| Show this help message and exit | + | --platform, -p| The platform to build | + | --toolchain, -t | Tool Chain to use in build process | + | --DEBUG, -d | Debug flag | + | --RELEASE, -r | Release flag| + | --TEST_RELEASE, -tr | Test Release flag | + | --RELEASE_PDB, -rp| Release flag| + | --list, -l| Lists available platforms | + | --cleanall| Cleans all | + | --capsule | Capsule build enabled | + | --silent | Silent build enabled| + | --performance | Performance build enabled | + | --fsp | Fsp build enabled | + | | + +* For more information on build options + * ``Type "python BuildBios.py -h"`` + +* Configuration Files + * ``The edk2-platforms\Platform\Intel\Build.json file contains the default settings used by BuildBios.py`` + * ``The default settings are under the DEFAULT_CONFIG field`` + * ``Each board can have a settings JSON file that will override the edk2-platforms\Platform\Intel\Build.json settings`` + * ``An example of a board specific settings:`` +* ``edk2-platforms\Platform\Intel\KabylakeOpenBoardPkg\KabylakeRvp3\BuildConfig.json`` + + +**Building with the batch scripts** For KabylakeOpenBoardPkg 1. Open command window, go to the workspace directory, e.g. c:\Kabylake. 2. Type "cd edk2-platforms\Platform\Intel\KabylakeOpenBoardPkg\KabylakeRvp3". -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#39273): https://edk2.groups.io/g/devel/message/39273 Mute This Topic: https://groups.io/mt/31217732/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms/devel-MinPlatform] [PATCH v2 1/3] Platform/Intel: Added python build script.
This change allows building all the platforms in Platform/Intel with a single python script. This script works with python 2.7 and python 3.7 Files Added: * BuildBios.py: the main build script build.cfg: contains general/default build settings * ClevoOpenBoardPkg/N1xxWU/buildConfig.cfg: contains N1xxWU specific build settings * KabylakeOpenBoardPkg/KabylakeRvp3/BuildEx.py : contains KabylakeRvp3 custom build script * KabylakeOpenBoardPkg/KabylakeRvp3/buildConfig.cfg: contains KabylakeRvp3 build settings * PurleyOpenBoardPkg/BoardMtOlympus/BuildBoard.py: contains BoardMtOlympus custom build script * PurleyOpenBoardPkg/BoardMtOlympus/buildConfig.cfg: contains BoardMtOlympus custom build settings Cc: Michael Kubacki Cc: Nate DeSimone Cc: Ankit Sinha Cc: Michael D Kinney Cc: Isaac W Oram Cc: Liming Gao Cc: Bowen Zhou Cc: Shifei A Lu Contributed-under: TianoCore Contribution Agreement 0.1 Signed-off-by: Agyeman --- Platform/Intel/Build.cfg | 60 ++ Platform/Intel/BuildBios.py | 990 ++ .../ClevoOpenBoardPkg/N1xxWU/BuildConfig.cfg | 40 + .../KabylakeRvp3/BuildConfig.cfg | 27 + .../KabylakeRvp3/BuildEx.py | 72 ++ .../BoardMtOlympus/BuildBoard.py | 177 .../BoardMtOlympus/BuildConfig.cfg| 44 + 7 files changed, 1410 insertions(+) create mode 100644 Platform/Intel/Build.cfg create mode 100644 Platform/Intel/BuildBios.py create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/BuildConfig.cfg create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BuildConfig.cfg create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BuildEx.py create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/BuildBoard.py create mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/BuildConfig.cfg diff --git a/Platform/Intel/Build.cfg b/Platform/Intel/Build.cfg new file mode 100644 index 00..d6584f0448 --- /dev/null +++ b/Platform/Intel/Build.cfg @@ -0,0 +1,60 @@ +# @ Build.cfg +# This is the main/default build configuration file +# +# Copyright (c) 2019, Intel Corporation. All rights reserved. +# This program and the accompanying materials are +# licensed and made available under the terms and +# conditions of the BSD License that accompanies this distribution. +# The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, +# EITHER EXPRESS OR IMPLIED. +# + +[DEFAULT_CONFIG] +WORKSPACE = +WORKSPACE_FSP_BIN = FSP +EDK_TOOLS_BIN = edk2-BaseTools-win32 +EDK_BASETOOLS = BaseTools +WORKSPACE_PLATFORM = edk2-platforms/Platform/Intel +WORKSPACE_SILICON = edk2-platforms/Silicon/Intel +WORKSPACE_PLATFORM_BIN = WORKSPACE_PLATFORM_BIN +WORKSPACE_SILICON_BIN = edk2-non-osi/Silicon/Intel +MIN_PACKAGE_TOOLS = edk2-platforms/Platform/Intel/MinPlatformPkg/Tools +PACKAGES_PATH = +EDK_SETUP_OPTION = +BASE_TOOLS_PATH = edk2/BaseTools +EDK_TOOLS_PATH = edk2/BaseTools +openssl_path = +PLATFORM_BOARD_PACKAGE = KabylakeOpenBoardPkg +BIOS_SIZE_OPTION = -DBIOS_SIZE_OPTION=SIZE_70 +WORKSPACE_CORE = edk2 +EFI_SOURCE = edk2 +PATHEXT = .COM;.EXE;.BAT;.CMD;.VBS;.JS;.WS;.MSC +PROMPT = $P$G +PLATFORM_PACKAGE = MinPlatformPkg +BOARD = KabylakeRvp3 +PrepRELEASE = DEBUG +SILENT_MODE = FALSE +EXT_CONFIG_CLEAR = +CapsuleBuild = FALSE +EXT_BUILD_FLAGS = +CAPSULE_BUILD = 0 +TARGET = DEBUG +TARGET_SHORT = D +PERFORMANCE_BUILD = FALSE +FSP_WRAPPER_BUILD = TRUE +FSP_BIN_PKG = KabylakeFspBinPkg +FSP_BINARY_BUILD = FALSE +FSP_TEST_RELEASE = FALSE +SECURE_BOOT_ENABLE = FALSE +REBUILD_MODE = +BUILD_ROM_ONLY = +NUMBER_OF_PROCESSORS = 1 + +[PLATFORMS] +KabylakeRvp3 = KabylakeOpenBoardPkg/KabylakeRvp3/BuildConfig.cfg +N1xxWU = ClevoOpenBoardPkg/N1xxWU/BuildConfig.cfg +BoardMtOlympus = PurleyOpenBoardPkg/BoardMtOlympus/BuildConfig.cfg diff --git a/Platform/Intel/BuildBios.py b/Platform/Intel/BuildBios.py new file mode 100644 index 00..aa663a1c27 --- /dev/null +++ b/Platform/Intel/BuildBios.py @@ -0,0 +1,990 @@ +# @ BuildBios.py +# Builds BIOS using configuration files and dynamically +# imported functions from board directory +# +# Copyright (c) 2019, Intel Corporation. All rights reserved. +# +# This program and the accompanying materials are licensed and made +# available under the terms and conditions of the BSD License which +# accompanies this distribution. The full text of the license may be +# found at http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" +# BASIS, WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER +# EXPRESS OR IMPLIED. + +import os +import re +import
[edk2-devel] [edk2-platforms/devel-MinPlatform] [PATCH v2 0/3] Added python build scipts to minplaform
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[edk2-devel] [edk2-platforms/devel-MinPlatform] [PATCH v2 3/3] Removing build batch files from ClevoOpenBoardPkg, KabylakeOpenBoardPkg and PurleyOpenBoardPkg
These are being removed as they have been replaced with the python build scripts Cc: Michael Kubacki Cc: Nate DeSimone Cc: Ankit Sinha Cc: Michael D Kinney Cc: Isaac W Oram Cc: Liming Gao Cc: Bowen Zhou Cc: Shifei A Lu Contributed-under: TianoCore Contribution Agreement 0.1 Signed-off-by: Agyeman --- .../ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat | 85 --- .../Intel/ClevoOpenBoardPkg/N1xxWU/bld.bat| 165 - .../Intel/ClevoOpenBoardPkg/N1xxWU/cln.bat| 54 - .../ClevoOpenBoardPkg/N1xxWU/postbuild.bat| 45 .../ClevoOpenBoardPkg/N1xxWU/prebuild.bat | 220 - .../Intel/ClevoOpenBoardPkg/N1xxWU/prep.bat | 85 --- .../KabylakeRvp3/GitEdk2MinKabylake.bat | 85 --- .../KabylakeOpenBoardPkg/KabylakeRvp3/bld.bat | 165 - .../KabylakeOpenBoardPkg/KabylakeRvp3/cln.bat | 54 - .../KabylakeRvp3/postbuild.bat| 45 .../KabylakeRvp3/prebuild.bat | 221 -- .../KabylakeRvp3/prep.bat | 85 --- .../BoardMtOlympus/GitEdk2MinMtOlympus.bat| 86 --- .../PurleyOpenBoardPkg/BoardMtOlympus/bld.bat | 144 .../BoardMtOlympus/postbuild.bat | 101 .../BoardMtOlympus/prebuild.bat | 203 ReadMe.md | 27 --- 17 files changed, 1870 deletions(-) delete mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat delete mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/bld.bat delete mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/cln.bat delete mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/postbuild.bat delete mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat delete mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prep.bat delete mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/GitEdk2MinKabylake.bat delete mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/bld.bat delete mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/cln.bat delete mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/postbuild.bat delete mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/prebuild.bat delete mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/prep.bat delete mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/GitEdk2MinMtOlympus.bat delete mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/bld.bat delete mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/postbuild.bat delete mode 100644 Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/prebuild.bat diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat deleted file mode 100644 index 9a34a9a2d2..00 --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/GitEdk2Clevo.bat +++ /dev/null @@ -1,85 +0,0 @@ -@REM @file -@REM -@REM Copyright (c) 2019, Intel Corporation. All rights reserved. -@REM This program and the accompanying materials -@REM are licensed and made available under the terms and conditions of the BSD License -@REM which accompanies this distribution. The full text of the license may be found at -@REM http://opensource.org/licenses/bsd-license.php -@REM -@REM THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -@REM WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -@REM - -@echo off - -pushd ..\..\..\..\..\ - -@REM Set WORKSPACE environment. -set WORKSPACE=%cd% -echo. -echo Set WORKSPACE as: %WORKSPACE% -echo. - -@REM Check whether Git has been installed and been added to system path. -git --help >nul 2>nul -if %ERRORLEVEL% NEQ 0 ( - echo. - echo The 'git' command is not recognized. - echo Please make sure that Git is installed and has been added to system path. - echo. - goto :EOF -) - -@REM Create the Conf directory under WORKSPACE -if not exist %WORKSPACE%\Conf ( - mkdir Conf -) - -@REM Set other environments. -@REM Basic Rule: -@REM Platform override Silicon override Core -@REM Source override Binary - -set PACKAGES_PATH=%WORKSPACE%\edk2-platforms\Platform\Intel;%WORKSPACE%\edk2-platforms\Silicon\Intel;%WORKSPACE%\edk2-non-osi\Silicon\Intel;%WORKSPACE%\FSP;%WORKSPACE%\edk2;%WORKSPACE% -set EDK_TOOLS_BIN=%WORKSPACE%\edk2-BaseTools-win32 - -@if not defined PYTHON_HOME ( - @if exist C:\Python27 ( -set PYTHON_HOME=C:\Python27 - ) -) - -set EDK_SETUP_OPTION= -@rem if python is installed, disable the binary base tools. -if defined PYTHON_HOME ( - set EDK_TOOLS_BIN= - set EDK_SETUP_OPTION=--nt32 -) -pushd %WORKSPACE%\edk2 -call edksetup.bat %EDK_SETUP_OPTION% -popd -pushd %WORKSPACE% -@rem if python is installed, nmake BaseTools source and enable BaseTools source build -@if defined PYTHON_HOME ( - nmake -f %BASE_TOOLS_PATH%\Makefile -) -popd - -set openssl_path=%WORKSPACE% - -popd - -goto :EOF - -:Help -echo. -echo Usage: -e
[edk2-devel] [edk2-platforms/devel-MinPlatform] [PATCH] Added an optional SplitFspBin.py path argument
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1691
What was done:
- an optional 7th argument was added to RebaseAndPatchFspBinBaseAddress.py
- updated lincense on RebaseAndPatchFspBinBaseAddress.py
- replace \\ with os independent os.sep
Cc: Michael Kubacki
Cc: Nate DeSimone
Cc: Ankit Sinha
Cc: Michael D Kinney
Contributed-under: TianoCore Contribution Agreement 0.1
Signed-off-by: Agyeman
---
.../Fsp/RebaseAndPatchFspBinBaseAddress.py| 34 ++-
1 file changed, 18 insertions(+), 16 deletions(-)
diff --git
a/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py
b/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py
index 4cdbe017e9..496b977c1f 100644
--- a/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py
+++ b/Platform/Intel/MinPlatformPkg/Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py
@@ -1,23 +1,18 @@
## @ RebaseAndPatchFspBinBaseAddress.py
#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
-# This program and the accompanying materials are licensed and made available
under
-# the terms and conditions of the BSD License that accompanies this
distribution.
-# The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
+# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
+
import os
import sys
import re
import subprocess
-if len(sys.argv) != 6:
+if len(sys.argv) not in [6,7]:
print "RebaseAndPatchFspBinBaseAddress.py - Error in number of arguments
received"
- print "Usage - RebaseAndPatchFspBinBaseAddress.py
"
+ print "Usage - RebaseAndPatchFspBinBaseAddress.py
\
+"
exit(1)
flashMapName = sys.argv[1]
@@ -26,6 +21,10 @@ fspBinFile= sys.argv[3]
targetDscFile = sys.argv[4]
fvOffset = long(sys.argv[5], 16)
fspBinFileRebased = "Fsp_Rebased.fd"
+splitFspBinPath =
os.path.join("edk2","IntelFsp2Pkg","Tools","SplitFspBin.py")
+
+if len(sys.argv) == 7:
+ splitFspBinPath = sys.argv[6]
#
# Make sure argument passed or valid
@@ -33,7 +32,7 @@ fspBinFileRebased = "Fsp_Rebased.fd"
if not os.path.exists(flashMapName):
print "WARNING! " + str(flashMapName) + " is not found."
exit(1)
-fspBinFilePath = fspBinPath + "\\" + fspBinFile
+fspBinFilePath = fspBinPath + os.sep + fspBinFile
if not os.path.exists(fspBinFilePath):
print "WARNING! " + str(fspBinFilePath) + " is not found."
exit(1)
@@ -44,6 +43,9 @@ ext_file = str(os.path.splitext(targetDscFile)[-1]).lower()
if ext_file != ".dsc":
print "WARNING! " + str(targetDscFile) + " is not a dsc file"
exit(1)
+if not os.path.exists(splitFspBinPath):
+ print "WARNING! " + str(splitFspBinPath) + " is not found."
+ exit(1)
#
# Get the FSP-S / FSP-M-T FV Base Address from Flash Map
@@ -74,7 +76,7 @@ file.close()
pythontool = 'python'
if 'PYTHON_HOME' in os.environ:
pythontool = os.environ['PYTHON_HOME'] + os.sep + 'python'
-Process = subprocess.Popen(pythontool + "
edk2\IntelFsp2Pkg\Tools\SplitFspBin.py info -f" + fspBinFilePath,
stdout=subprocess.PIPE)
+Process = subprocess.Popen(pythontool + " " + splitFspBinPath + " info -f" +
fspBinFilePath, stdout=subprocess.PIPE)
Output = Process.communicate()[0]
FsptInfo = Output.rsplit("FSP_M", 1);
for line in FsptInfo[1].split("\n"):
@@ -91,13 +93,13 @@ fspTBaseAddress = flashBase + fspTBaseOffset
# Re-base FSP bin file to new address and save it as fspBinFileRebased using
SplitFspBin.py
#
rebaseArguments = fspBinFilePath + " -c s m t -b " +
str(hex(fspSBaseAddress).rstrip("L")) + " " +
str(hex(fspMBaseAddress).rstrip("L")) + " " +
str(hex(fspTBaseAddress).rstrip("L")) + " -o" + fspBinPath + " -n " +
fspBinFileRebased
-os.system(pythontool + " edk2\IntelFsp2Pkg\Tools\SplitFspBin.py rebase -f" +
rebaseArguments)
+os.system(pythontool + " " + splitFspBinPath + " rebase -f" + rebaseArguments)
#
# Split FSP bin to FSP-S/M/T segments
#
-splitArguments = fspBinPath +"\\" + fspBinFileRebased + " -o " + fspBinPath +
" -n Fsp_Rebased.fd"
-os.system(pythontool + " edk2\IntelFsp2Pkg\Tools\SplitFspBin.py split -f" +
splitArguments)
+splitArguments = fspBinPath + os.sep + fspBinFileRebased + " -o " + fspBinPath
+ " -n Fsp_Rebased.fd"
+os.system(pythontool + " " + splitFspBinPath + " split -f" + splitArguments)
#
# Patch dsc file with the re-based FSP-S/M/T address, so internally build will
use the same.
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms/devel-MinPlatform] [PATCH v3 2/2] Updated the build instructions to include the python script build instructions
Cc: Michael Kubacki Cc: Michael D Kinney Cc: Nate DeSimone Cc: Liming Gao Cc: Ankit Sinha Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Agyeman --- ReadMe.md | 76 +++ 1 file changed, 76 insertions(+) diff --git a/ReadMe.md b/ReadMe.md index 72e332a476..fbf735173f 100644 --- a/ReadMe.md +++ b/ReadMe.md @@ -105,6 +105,82 @@ return back to the minimum platform caller. ### Build +**Building with the python script** + +1. Open command window, go to the workspace directory, e.g. c:\Kabylake. +2. Type "cd edk2-platforms\Platform\Intel +3. Type "python build_bios.py -p REPLACE_WITH_BOARD_NAME" + +* build_bios.py arguments: + + | Argument | Function| + | --|-| + | -h, --help| show this help message and exit | + | --platform, -p| the platform to build | + | --toolchain, -t | tool Chain to use in build process | + | --DEBUG, -d | debug flag | + | --RELEASE, -r | release flag| + | --TEST_RELEASE, -tr | test Release flag | + | --RELEASE_PDB, -rp| release flag| + | --list, -l| lists available platforms | + | --cleanall| cleans all | + | --clean | cleans specified platform | + | --capsule | capsule build enabled | + | --silent | silent build enabled| + | --performance | performance build enabled | + | --fsp | fsp build enabled | + | | + +* For more information on build options + * ``Type "python build_bios.py -h"`` + +* Note + * ``Python 2.7.16 and Python 3.7.3 compatible`` + * ``These python build scripts have been tested on Windows due to`` [cross-platform limitations](#Known-limitations) + +* Configuration Files + * ``The edk2-platforms\Platform\Intel\build.cfg file contains the default settings used by build_bios.py`` + * ``The default settings are under the DEFAULT_CONFIG section`` + * ``Each board can have a settings file that will override the edk2-platforms\Platform\Intel\build.cfg settings`` + * ``An example of a board specific settings:`` +* ``edk2-platforms\Platform\Intel\KabylakeOpenBoardPkg\KabylakeRvp3\build_config.cfg`` + +* Workspace view of the build scripts + * +WORKSPACE + |--edk2 + |--edk2-non-osi + |--edk2-platforms + | |---Platform + | ||--Intel + | ||--build.cfg: Default build settings. These are overridden by + | || platform specific settings (build_config.cfg) and + | || then command-line settings. + | || + | ||--build_bios.py: Main build script. Generic pre-build, build, + | || post-build, and clean functions. + | || + | ||--ClevoOpenBoardPkg + | |||--N1xxWU + | |||---build_config.cfg: N1xxWU specific build + | || settings environment variables. + | || + | ||--KabylakeOpenBoardPkg + | |||--KabylakeRvp3 + | || |---build_config.cfg: KabylakeRvp3 specific + | || | build settings, environment variables. + | || |---build_board.py: Optional board-specific pre-build, build + | || and clean post-build functions. + | ||--PurleyOpenBoardPkg + | || |--BoardMtOlympus + | |||---build_config.cfg: BoardMtOlympus specific + | ||| build settings, environment variables. + | |||---build_board.py: Optional board-specific pre-build, + | ||| build, post-build and clean functions. + |--FSP + + +**Building with the batch scripts** For KabylakeOpenBoardPkg 1. Open command window, go to the workspace directory, e.g. c:\Kabylake. 2. Type "cd edk2-platforms\Platform\Intel\KabylakeOpenBoardPkg\KabylakeRvp3". -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messag
[edk2-devel] [edk2-platforms/devel-MinPlatform] [PATCH v3 0/2] Adding python build script.
Cc: Michael Kubacki Cc: Nate DeSimone Cc: Ankit Sinha Cc: Michael D Kinney Cc: Isaac W Oram Cc: Liming Gao Contributed-under: TianoCore Contribution Agreement 0.1 Signed-off-by: Agyeman changes from v2: - fixed pep8 violations - implemented v2 review recommendations - added clean flag to clean specified platform Overview: WORKSPACE | |--edk2 |--edk2-non-osi |--edk2-platforms | |--Platform | |---Intel | ||--build.cfg: Default build settings. These are overridden by | || platform specific settings (build_config.cfg) and | || then command-line settings. | || | ||--build_bios.py: Main build script. Generic pre-build, build, | || post-build, and clean functions. | || | ||--ClevoOpenBoardPkg | |||--N1xxWU | |||---build_config.cfg: N1xxWU specific build | || settings environment variables. | || | ||--KabylakeOpenBoardPkg | |||--KabylakeRvp3 | || |---build_config.cfg: KabylakeRvp3 specific | || | build settings, environment variables. | || |---build_board.py: Optional board-specific pre-build, build | || and clean post-build functions. | ||--PurleyOpenBoardPkg | || |--BoardMtOlympus | |||---build_config.cfg: BoardMtOlympus specific | || build settings, environment variables. | |||---build_board.py: Optional board-specific pre-build, | ||| build, post-build and clean functions. |--FSP --- Details: --- What it is -- These patches add python BIOS build scripts and build configuration files to build platforms under Intel/Platform. Why The reason behind this implementation is to use a cross platform build script to build minplaform BIOS. How it is done The python files: - build_bios.py: The main build file. This script sets up the edk2 build enviroment using the default build.cfg settings and platform specific settings. It uses the configurations found in the build.cfg file to locate the platforms that are configured to use this build script. The path to each of the platform settings can be found under the "PLATFORMS" field within the build.cfg file. The platform specific settings are located in the platform's main directory. Example edk2-platforms/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/build_config.cfg. The build_bios.py script contains the four main functions: - pre_build: Sets up the edk2 build enviroment variables, target.txt file - build: Uses the configurations to Build BIOS - post_build: Does post build processes like cleaning up files generated during the build process - clean: Cleans up the build directory. There are four addtional functions that dynamically import functions from the board's Optional/Additional python script if specified in board settings file's ADDITIONAL_SCRIPTS These four functions are the pre_build_board, build_board, post_build_board, clean_ex functions Board additional (Optional) python build script: These are python scripts located in the board's main directory, An example Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_board.py If added, its path must be specified in board's settings file, under the field ADDITIONAL_SCRIPTS. Example ADDITIONAL_SCRIPTS = PurleyOpenBoardPkg/BoardMtOlympus/build_board.py If specified, the build_board, pre_build_board, post_build_board, clean_ex must be defined even if they are not use The config files - build.cfg: --- This is file contains the default BIOS build configuration. The default configurations are defined under the "DEFAULT_CONFIG" section of the file. Each of these can be overridden by the board specific setting as defined in the board's build config file. All paths must be separated by forward slashes. All the paths in the main build.cfg are relative to the minplaform WORKSPACE. Example: [DEFAULT_CONFIG] MIN_PACKAGE_TOOLS = edk2-platforms/Platform/Intel/MinPlatformPkg/Tools The PLATFORMS field in the build.cfg file informs build_bios.py about the available platforms that can be built with the build_bios.py. The path to the board specific config file must be relative to location of build_b
[edk2-devel] [edk2-platforms/devel-MinPlatform] [PATCH v3 1/2] Platform/Intel: Added python build script.
This change allows building all the platforms in Platform/Intel with
a single python script. This script works with python 2.7
and python 3.7
Files Added:
* build_bios.py: the main build script
build.cfg: contains general/default build settings
* ClevoOpenBoardPkg/N1xxWU/build_config.cfg: contains N1xxWU specific
build settings
* KabylakeOpenBoardPkg/KabylakeRvp3/build_board.py : contains sample
custom build script
* KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg: contains
KabylakeRvp3 build settings
* PurleyOpenBoardPkg/BoardMtOlympus/build_board.py: contains
BoardMtOlympus custom build script
* PurleyOpenBoardPkg/BoardMtOlympus/build_config.cfg: contains
BoardMtOlympus custom build settings
Cc: Michael Kubacki
Cc: Nate DeSimone
Cc: Ankit Sinha
Cc: Michael D Kinney
Cc: Isaac W Oram
Cc: Liming Gao
Cc: Bowen Zhou
Cc: Shifei A Lu
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Agyeman
---
.../ClevoOpenBoardPkg/N1xxWU/build_config.cfg | 33 +
.../KabylakeRvp3/build_board.py | 68 ++
.../KabylakeRvp3/build_config.cfg | 34 +
.../BoardMtOlympus/build_board.py | 177
.../BoardMtOlympus/build_config.cfg | 32 +
Platform/Intel/build.cfg | 56 +
Platform/Intel/build_bios.py | 976 ++
7 files changed, 1376 insertions(+)
create mode 100644 Platform/Intel/ClevoOpenBoardPkg/N1xxWU/build_config.cfg
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_board.py
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
create mode 100644
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_board.py
create mode 100644
Platform/Intel/PurleyOpenBoardPkg/BoardMtOlympus/build_config.cfg
create mode 100644 Platform/Intel/build.cfg
create mode 100644 Platform/Intel/build_bios.py
diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/build_config.cfg
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/build_config.cfg
new file mode 100644
index 00..ee1261e700
--- /dev/null
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/build_config.cfg
@@ -0,0 +1,33 @@
+# @ build_config.cfg
+# This is the N1xxWU board specific build settings
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+
+[CONFIG]
+WORKSPACE_PLATFORM_BIN = WORKSPACE_PLATFORM_BIN
+EDK_SETUP_OPTION =
+openssl_path =
+PLATFORM_BOARD_PACKAGE = ClevoOpenBoardPkg
+PROJECT = ClevoOpenBoardPkg/N1xxWU
+BOARD = N1xxWU
+FLASH_MAP_FDF = ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude.fdf
+PROJECT_DSC = ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc
+BOARD_PKG_PCD_DSC = ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgPcd.dsc
+PrepRELEASE = DEBUG
+SILENT_MODE = FALSE
+EXT_CONFIG_CLEAR =
+CapsuleBuild = FALSE
+EXT_BUILD_FLAGS =
+CAPSULE_BUILD = 0
+TARGET = DEBUG
+TARGET_SHORT = D
+PERFORMANCE_BUILD = FALSE
+FSP_WRAPPER_BUILD = TRUE
+FSP_BIN_PKG = KabylakeFspBinPkg
+FSP_PKG_NAME = KabylakeFspPkg
+FSP_BINARY_BUILD = FALSE
+FSP_TEST_RELEASE = FALSE
+SECURE_BOOT_ENABLE = FALSE
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_board.py
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_board.py
new file mode 100644
index 00..726ad85874
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_board.py
@@ -0,0 +1,68 @@
+# @ build_board.py
+# This is a sample code provides Optional dynamic imports
+# of build functions to the BuildBios.py script
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+"""
+This module serves as a sample implementation of the build extension
+scripts
+"""
+
+
+def pre_build_ex(config, functions):
+"""Additional Pre BIOS build function
+
+:param config: The environment variables to be used in the build process
+:type config: Dictionary
+:param functions: A dictionary of function pointers
+:type functions: Dictionary
+:returns: nothing
+"""
+print("pre_build_ex")
+return None
+
+
+def build_ex(config, functions):
+"""Additional BIOS build function
+
+:param config: The environment variables to be used in the build process
+:type config: Dictionary
+:param functions: A dictionary of function pointers
+:type functions: Dictionary
+:returns: config dictionary
+:rtype: Dictionary
+"""
+print("build_ex")
+return None
+
+
+def post_build_ex(config, functions):
+"""Additional Post BIOS build function
+
+:param config: The environment variables to be used in the post
+build process
+:type config: Dictionary
+:param functions: A dictionary of function pointers
+:type functions: Dictionary
+:returns: config dictionary
+:rtype: Dictionary
+"""
+print("post_build_ex")
+return None
+
+
+def clean_ex(config, functions):
+"""Additional clean function
+
+:param config
[edk2-devel] [edk2-platforms] [PATCH 2/5] KabylakeSiliconPkg: Casting functions to EFIAPI
From: Prince Agyeman
This fixes the calling convension issues in gcc
Gcc build was tested on Ubuntu 16.04.5 LTS
with gcc version 5.4.0, nasm version 2.11.08
Cc: Michael Kubacki
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Liming Gao
Cc: Ankit Sinha
Signed-off-by: Prince Agyeman
---
.../Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h| 11 +++
.../Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c| 11 +++
.../KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h | 12
.../KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmmCore.c | 12
4 files changed, 14 insertions(+), 32 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h
b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h
index 58ef567..666340e 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h
@@ -1,14 +1,8 @@
/** @file
Header file for PCH Init SMM Handler
-Copyright (c) 2017, Intel Corporation. All rights reserved.
-This program and the accompanying materials are licensed and made available
under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -211,6 +205,7 @@ PchPcieLinkEqHandlerFunction (
**/
VOID
+EFIAPI
PchPcieIoTrapSmiCallback (
IN EFI_HANDLE DispatchHandle,
IN EFI_SMM_IO_TRAP_CONTEXT*CallbackContext,
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c
b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c
index b4234f6..847fbfb 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c
@@ -1,14 +1,8 @@
/** @file
PCH Pcie SMM Driver Entry
-Copyright (c) 2017, Intel Corporation. All rights reserved.
-This program and the accompanying materials are licensed and made available
under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include "PchInitSmm.h"
@@ -244,6 +238,7 @@ PchPciePmIoTrapSmiCallback (
**/
VOID
+EFIAPI
PchPcieIoTrapSmiCallback (
IN EFI_HANDLEDispatchHandle,
IN EFI_SMM_IO_TRAP_CONTEXT*CallbackContext,
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h
b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h
index 3eebdc1..a9f0664 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h
@@ -1,14 +1,8 @@
/** @file
Prototypes and defines for the PCH SMM Dispatcher.
-Copyright (c) 2017, Intel Corporation. All rights reserved.
-This program and the accompanying materials are licensed and made available
under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#ifndef PCH_SMM_H
@@ -516,6 +510,7 @@ typedef struct {
registered and the SMI source has been
enabled.
**/
EFI_STATUS
+EFIAPI
PchSmmCoreRegister (
IN PCH_SMM_GENERIC_PROTOCOL *This,
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,
@@ -536,6 +531,7 @@ PchSmmCoreRegister (
@retval EFI_INVALID_PARAMETER Handle is invalid.
**/
EFI_STATUS
+EFIAPI
PchSmmCoreUnRegister (
IN PCH_SMM_GENERIC_PROTOCOL *This,
IN EFI_HANDLE *DispatchHandle
diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmmCore.c
b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmmCore.c
index 77f0561..cb3bfba 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmmCore.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/Pc
[edk2-devel] [edk2-platforms] [PATCH 5/5] Intel/Readme.md: Updated readme with linux build instructions
From: Prince Agyeman Signed-off-by: Prince Agyeman --- Platform/Intel/Readme.md | 31 +++ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index fbf7351..972a1b0 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -107,9 +107,13 @@ return back to the minimum platform caller. **Building with the python script** -1. Open command window, go to the workspace directory, e.g. c:\Kabylake. -2. Type "cd edk2-platforms\Platform\Intel -3. Type "python build_bios.py -p REPLACE_WITH_BOARD_NAME" +1. Open command window, go to the workspace directory, e.g. c:\Kabylake or ~/Kabylake in the case of a linux OS +2. If using a linux OS + * Type "cd edk2" + * Type "source edksetup.sh" + * Type "cd ../" to go back to the workspace directory +3. Type "cd edk2-platforms/Platform/Intel +4. Type "python build_bios.py -p REPLACE_WITH_BOARD_NAME" * build_bios.py arguments: @@ -132,18 +136,19 @@ return back to the minimum platform caller. | | * For more information on build options - * ``Type "python build_bios.py -h"`` + * Type "python build_bios.py -h" * Note - * ``Python 2.7.16 and Python 3.7.3 compatible`` - * ``These python build scripts have been tested on Windows due to`` [cross-platform limitations](#Known-limitations) + * Python 2.7.16 and Python 3.7.3 compatible + * This python build script has been tested on Windows 10 and Ubuntu 16.04.5 LTS + * See [cross-platform limitations](#Known-limitations) * Configuration Files - * ``The edk2-platforms\Platform\Intel\build.cfg file contains the default settings used by build_bios.py`` - * ``The default settings are under the DEFAULT_CONFIG section`` - * ``Each board can have a settings file that will override the edk2-platforms\Platform\Intel\build.cfg settings`` - * ``An example of a board specific settings:`` -* ``edk2-platforms\Platform\Intel\KabylakeOpenBoardPkg\KabylakeRvp3\build_config.cfg`` + * The edk2-platforms\Platform\Intel\build.cfg file contains the default settings used by build_bios.py + * The default settings are under the DEFAULT_CONFIG section + * Each board can have a settings file that will override the edk2-platforms\Platform\Intel\build.cfg settings + * An example of a board specific settings: +* edk2-platforms\Platform\Intel\KabylakeOpenBoardPkg\KabylakeRvp3\build_config.cfg * Workspace view of the build scripts * @@ -212,8 +217,10 @@ Users can also flash the UEFI firmware image to the highest area of the flash re ### **Known limitations** -* All firmware projects can only build on Windows with the validated configuration below. +* All firmware projects can build on Windows with the validated configuration below. * Cross-platform build support is work-in-progress. +* KabylakeOpenBoardPkg and ClevoOpenBoardPkg can build on Ubuntu 16.04.5 LTS +with gcc version 5.4.0 and nasm version 2.11.08 with the build_bios.py script **KabylakeOpenBoardPkg** 1. This firmware project has only been tested on the Intel KabylakeRvp3 board. -- 2.7.4 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#40708): https://edk2.groups.io/g/devel/message/40708 Mute This Topic: https://groups.io/mt/31632307/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH 0/5] Added GCC5 build support
From: Prince Agyeman
This patch series adds GCC 5 build support to
ClevoOpenBoardPkg and KabylakeOpenBoardPkg
Cc: Michael Kubacki
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Liming Gao
Cc: Ankit Sinha
Prince Agyeman (5):
MinPlatformPkg: Added GCC5 build support
KabylakeSiliconPkg: Casting functions to EFIAPI
KabylakeOpenBoardPkg: Added GCC5 build support
ClevoOpenBoardPkg: Added GCC5 build support
Intel/Readme.md: Updated readme with linux build instructions
.../N1xxWU/OpenBoardPkgBuildOption.dsc | 2 +
Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec | 4 +-
.../KabylakeRvp3/OpenBoardPkgBuildOption.dsc | 12 +-
.../Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec| 14 +-
.../Ia32/PeiCoreEntry.S| 123
.../Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} | 52 ++-
.../SecFspWrapperPlatformSecLib/Ia32/SecEntry.S| 348 -
.../Ia32/{SecEntry.asm => SecEntry.nasm} | 138
.../SecFspWrapperPlatformSecLib/Ia32/Stack.S | 73 -
.../Ia32/{Stack.asm => Stack.nasm} | 45 ++-
.../SecFspWrapperPlatformSecLib.inf| 18 +-
.../MinPlatformPkg/Include/Fdf/RuleInclude.fdf | 19 +-
.../Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py | 2 +-
.../MinPlatformPkg/Tools/PatchFv/PatchBinFv.py | 16 +-
.../MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py| 23 +-
Platform/Intel/Readme.md | 31 +-
Platform/Intel/build_bios.py | 25 +-
.../Pch/PchInit/Smm/PchInitSmm.h | 11 +-
.../Pch/PchInit/Smm/PchPcieSmm.c | 11 +-
.../Pch/PchSmiDispatcher/Smm/PchSmm.h | 12 +-
.../Pch/PchSmiDispatcher/Smm/PchSmmCore.c | 12 +-
21 files changed, 197 insertions(+), 794 deletions(-)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{PeiCoreEntry.asm
=> PeiCoreEntry.nasm} (59%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/SecEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{SecEntry.asm
=> SecEntry.nasm} (69%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/Stack.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{Stack.asm
=> Stack.nasm} (50%)
--
2.7.4
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[edk2-devel] [edk2-platforms] [PATCH 4/5] ClevoOpenBoardPkg: Added GCC5 build support
From: Prince Agyeman
Fixes:
* include file paths
* gcc build options
Gcc build was tested on Ubuntu 16.04.5 LTS
with gcc version 5.4.0, nasm version 2.11.08
Signed-off-by: Prince Agyeman
---
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc | 2 ++
Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec | 4 ++--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
index 92c7571..8d91d90 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
@@ -108,6 +108,7 @@ DEFINE DSC_PLTPKG_FEATURE_BUILD_OPTIONS =
$(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(
# For IA32 Specific Build Flag
#
GCC: *_*_IA32_PP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
+GCC: *_*_IA32_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) -D
PI_SPECIFICATION_VERSION=0x00010015 -Wno-unused -Wl,--allow-multiple-definition
MSFT: *_*_IA32_ASM_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
MSFT: *_*_IA32_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
$(OPTIMIZE_DISABLE_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 -DASF_PEI
MSFT: *_*_IA32_VFRPP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
$(OPTIMIZE_DISABLE_OPTIONS)
@@ -130,6 +131,7 @@ MSFT: *_*_IA32_ASLCC_FLAGS =
$(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_D
# For X64 Specific Build Flag
#
GCC: *_*_X64_PP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
+GCC: *_*_X64_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) -D
PI_SPECIFICATION_VERSION=0x00010015 -Wno-unused -Wl,--allow-multiple-definition
MSFT: *_*_X64_ASM_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
MSFT: *_*_X64_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
$(OPTIMIZE_DISABLE_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015
MSFT: *_*_X64_VFRPP_FLAGS= $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
$(OPTIMIZE_DISABLE_OPTIONS)
diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
index aa457e6..f1d29f7 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
@@ -24,8 +24,8 @@ PACKAGE_GUID = D04CCA80-5F71-478D-9A26-72BC751D0106
[Includes]
Include
-N1xxWU\Include
-Features\Tbt\Include
+N1xxWU/Include
+Features/Tbt/Include
[Guids]
gBoardModuleTokenSpaceGuid= {0x72d1fff7, 0xa42a, 0x4219, {0xb9,
0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
--
2.7.4
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[edk2-devel] [edk2-platforms] [PATCH 3/5] KabylakeOpenBoardPkg: Added GCC5 build support
From: Prince Agyeman Fixed: * Include file paths in dec * Gcc build options Gcc build was tested on Ubuntu 16.04.5 LTS with gcc version 5.4.0, nasm version 2.11.08 Signed-off-by: Prince Agyeman --- .../KabylakeRvp3/OpenBoardPkgBuildOption.dsc | 12 Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec | 14 -- 2 files changed, 8 insertions(+), 18 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgBuildOption.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgBuildOption.dsc index 318b057..19d81f7 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgBuildOption.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgBuildOption.dsc @@ -1,15 +1,9 @@ ## @file # platform build option configuration file. # -# Copyright (c) 2017, Intel Corporation. All rights reserved. +# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved. # -# This program and the accompanying materials are licensed and made available under -# the terms and conditions of the BSD License which accompanies this distribution. -# The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +#SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -108,6 +102,7 @@ DEFINE DSC_PLTPKG_FEATURE_BUILD_OPTIONS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $( # For IA32 Specific Build Flag # GCC: *_*_IA32_PP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) +GCC: *_*_IA32_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 -DASF_PEI -Wno-unused -Wl,--allow-multiple-definition MSFT: *_*_IA32_ASM_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) MSFT: *_*_IA32_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_DISABLE_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 -DASF_PEI MSFT: *_*_IA32_VFRPP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_DISABLE_OPTIONS) @@ -130,6 +125,7 @@ MSFT: *_*_IA32_ASLCC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_D # For X64 Specific Build Flag # GCC: *_*_X64_PP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) +GCC: *_*_X64_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 -Wno-unused -Wl,--allow-multiple-definition MSFT: *_*_X64_ASM_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) MSFT: *_*_X64_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_DISABLE_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 MSFT: *_*_X64_VFRPP_FLAGS= $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_DISABLE_OPTIONS) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec b/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec index d0fdb10..ddd8b40 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec +++ b/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec @@ -5,15 +5,9 @@ # INF files to generate AutoGen.c and AutoGen.h files # for the build infrastructure. # -# Copyright (c) 2017, Intel Corporation. All rights reserved. +# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved. # -# This program and the accompanying materials are licensed and made available under -# the terms and conditions of the BSD License which accompanies this distribution. -# The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +#SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -26,8 +20,8 @@ PACKAGE_GUID = 0A8BA6E8-C8AC-4AC1-87AC-52772FA6AE5E [Includes] Include -KabylakeRvp3\Include -Features\Tbt\Include +KabylakeRvp3/Include +Features/Tbt/Include [Guids] -- 2.7.4 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#40706): https://edk2.groups.io/g/devel/message/40706 Mute This Topic: https://groups.io/mt/31632305/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH 1/5] MinPlatformPkg: Added GCC5 build support
From: Prince Agyeman
Fixes:
* Replacing .asm and .S with nasm in SecFspWrapperPlatformSecLib
for cross-platform build support
* Modified RuleInclude.fdf
* Modified python files to be OS independent
Gcc build was tested on Ubuntu 16.04.5 LTS with gcc version 5.4.0,
nasm version 2.11.08
Cc: Michael Kubacki
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Liming Gao
Cc: Ankit Sinha
TianoCore Contribution Agreement 1.1
Signed-off-by: Prince Agyeman
---
.../Ia32/PeiCoreEntry.S| 123
.../Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} | 52 ++-
.../SecFspWrapperPlatformSecLib/Ia32/SecEntry.S| 348 -
.../Ia32/{SecEntry.asm => SecEntry.nasm} | 138
.../SecFspWrapperPlatformSecLib/Ia32/Stack.S | 73 -
.../Ia32/{Stack.asm => Stack.nasm} | 45 ++-
.../SecFspWrapperPlatformSecLib.inf| 18 +-
.../MinPlatformPkg/Include/Fdf/RuleInclude.fdf | 19 +-
.../Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py | 2 +-
.../MinPlatformPkg/Tools/PatchFv/PatchBinFv.py | 16 +-
.../MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py| 23 +-
Platform/Intel/build_bios.py | 25 +-
12 files changed, 152 insertions(+), 730 deletions(-)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{PeiCoreEntry.asm
=> PeiCoreEntry.nasm} (59%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/SecEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{SecEntry.asm
=> SecEntry.nasm} (69%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/Stack.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{Stack.asm
=> Stack.nasm} (50%)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
deleted file mode 100644
index 8923577..000
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
+++ /dev/null
@@ -1,123 +0,0 @@
-## @file
-# Find and call SecStartup
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
-# This program and the accompanying materials are licensed and made available
under
-# the terms and conditions of the BSD License that accompanies this
distribution.
-# The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php.
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-##
-
-ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
-ASM_PFX(CallPeiCoreEntryPoint):
- #
- # Obtain the hob list pointer
- #
- movl0x4(%esp), %eax
- #
- # Obtain the stack information
- # ECX: start of range
- # EDX: end of range
- #
- movl0x8(%esp), %ecx
- movl0xC(%esp), %edx
-
- #
- # Platform init
- #
- pushal
- pushl %edx
- pushl %ecx
- pushl %eax
- call ASM_PFX(PlatformInit)
- popl %eax
- popl %eax
- popl %eax
- popal
-
- #
- # Set stack top pointer
- #
- movl%edx, %esp
-
- #
- # Push the hob list pointer
- #
- pushl %eax
-
- #
- # Save the value
- # ECX: start of range
- # EDX: end of range
- #
- movl%esp, %ebp
- pushl %ecx
- pushl %edx
-
- #
- # Push processor count to stack first, then BIST status (AP then BSP)
- #
- movl$1, %eax
- cpuid
- shr $16, %ebx
- andl$0x00FF, %ebx
- cmp $1, %bl
- jae PushProcessorCount
-
- #
- # Some processors report 0 logical processors. Effectively 0 = 1.
- # So we fix up the processor count
- #
- inc %ebx
-
-PushProcessorCount:
- pushl %ebx
-
- #
- # We need to implement a long-term solution for BIST capture. For now, we
just copy BSP BIST
- # for all processor threads
- #
- xorl%ecx, %ecx
- movb%bl, %cl
-PushBist:
- movd%mm0, %eax
- pushl %eax
- loopPushBist
-
- # Save Time-Stamp Counter
- movd %mm5, %eax
- pushl %eax
-
- movd %mm6, %eax
- pushl %eax
-
- #
- # Pass entry point of the PEI core
- #
- movl$0xFFE0, %edi
- pushl %ds:(%edi)
-
- #
- # Pass BFV into the PEI Core
- #
- movl$0xFFFC, %edi
- pushl %ds:(%edi)
-
- #
- # Pass stack size into the PEI Core
- #
- movl-4(%ebp), %ecx
- movl-8(%ebp), %edx
- pushl %ecx # RamBase
-
- subl%ecx, %edx
- pushl %edx # RamSize
-
- #
- # Pass Control into the PEI Core
- #
- call ASM_PFX(SecStartup)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.asm
b/Platfor
[edk2-devel] [edk2-platforms] [PATCH v2 5/5] Intel/Readme.md: Updated readme with linux build instructions
From: Prince Agyeman Signed-off-by: Prince Agyeman --- Platform/Intel/Readme.md | 42 -- 1 file changed, 24 insertions(+), 18 deletions(-) diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index 1da5d0a..443fb40 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -107,9 +107,13 @@ return back to the minimum platform caller. **Building with the python script** -1. Open command window, go to the workspace directory, e.g. c:\Kabylake. -2. Type "cd edk2-platforms\Platform\Intel -3. Type "python build_bios.py -p REPLACE_WITH_BOARD_NAME" +1. Open command window, go to the workspace directory, e.g. c:\Kabylake or ~/Kabylake in the case of a linux OS +2. If using a linux OS + * Type "cd edk2" + * Type "source edksetup.sh" + * Type "cd ../" to go back to the workspace directory +3. Type "cd edk2-platforms/Platform/Intel +4. Type "python build_bios.py -p REPLACE_WITH_BOARD_NAME" * build_bios.py arguments: @@ -132,18 +136,19 @@ return back to the minimum platform caller. | | * For more information on build options - * ``Type "python build_bios.py -h"`` + * Type "python build_bios.py -h" * Note - * ``Python 2.7.16 and Python 3.7.3 compatible`` - * ``These python build scripts have been tested on Windows due to`` [cross-platform limitations](#Known-limitations) + * Python 2.7.16 and Python 3.7.3 compatible + * This python build script has been tested on Windows 10 and Ubuntu 16.04.5 LTS + * See [cross-platform limitations](#Known-limitations) * Configuration Files - * ``The edk2-platforms\Platform\Intel\build.cfg file contains the default settings used by build_bios.py`` - * ``The default settings are under the DEFAULT_CONFIG section`` - * ``Each board can have a settings file that will override the edk2-platforms\Platform\Intel\build.cfg settings`` - * ``An example of a board specific settings:`` -* ``edk2-platforms\Platform\Intel\KabylakeOpenBoardPkg\KabylakeRvp3\build_config.cfg`` + * The edk2-platforms\Platform\Intel\build.cfg file contains the default settings used by build_bios.py + * The default settings are under the DEFAULT_CONFIG section + * Each board can have a settings file that will override the edk2-platforms\Platform\Intel\build.cfg settings + * An example of a board specific settings: +* edk2-platforms\Platform\Intel\KabylakeOpenBoardPkg\KabylakeRvp3\build_config.cfg * Workspace view of the build scripts * @@ -212,14 +217,13 @@ Users can also flash the UEFI firmware image to the highest area of the flash re ### **Known limitations** -* All firmware projects can only build on Windows with the validated configuration below. - * Cross-platform build support is work-in-progress. - **KabylakeOpenBoardPkg** 1. This firmware project has only been tested on the Intel KabylakeRvp3 board. 2. This firmware project has only been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic Device. -3. This firmware project build has only been tested using the Microsoft Visual Studio 2015 compiler. +3. The Windows build was tested on Windows 10 with Microsoft Visual Studio 2015. +4. The Linux build was tested on Ubuntu 16.04.5 LTS with GCC version 5.4.0. +5. The build was tested with NASM version 2.11.08. **PurleyOpenBoardPkg** 1. This firmware project has only been tested on the Microsoft MtOlympus board. @@ -228,9 +232,11 @@ Users can also flash the UEFI firmware image to the highest area of the flash re **ClevoOpenBoardPkg** 1. Currently, support is only being added for the N1xxWU series of boards. -2. The firmware project build has only been tested using the Microsoft Visual Studio 2015 compiler. -3. The firmware project has not been tested on an actual board, it *should not* be expected to boot. -4. The firmware project applies to all Clevo supported board configurations but is only being tested on System 76 Galago +2. The Windows build was tested on Windows 10 with Microsoft Visual Studio 2015 compiler. +3. The Linux build was tested on Ubuntu 16.04.5 LTS with GCC version 5.4.0. +4. The build was tested with NASM version 2.11.08. +5. The firmware project has not been tested on an actual board, it *should not* be expected to boot. +6. The firmware project applies to all Clevo supported board configurations but is only being tested on System 76 Galago Pro devices. ### **Planned Activities** -- 2.7.4 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#41105): https://edk2.groups.io/g/devel/message/41105 Mute This Topic: https://groups.io/mt/31693032/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH v2 3/5] KabylakeOpenBoardPkg: Added GCC5 build support
From: Prince Agyeman Fixed: * Include file paths in dec * Gcc build options Gcc build was tested on Ubuntu 16.04.5 LTS with gcc version 5.4.0, nasm version 2.11.08 Signed-off-by: Prince Agyeman --- .../KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgBuildOption.dsc | 4 +++- Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec| 6 +++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgBuildOption.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgBuildOption.dsc index 04c5786..8e885cc 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgBuildOption.dsc +++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgBuildOption.dsc @@ -1,7 +1,7 @@ ## @file # platform build option configuration file. # -# Copyright (c) 2017, Intel Corporation. All rights reserved. +# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -102,6 +102,7 @@ DEFINE DSC_PLTPKG_FEATURE_BUILD_OPTIONS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $( # For IA32 Specific Build Flag # GCC: *_*_IA32_PP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) +GCC: *_*_IA32_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 -DASF_PEI -Wno-unused -Wl,--allow-multiple-definition MSFT: *_*_IA32_ASM_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) MSFT: *_*_IA32_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_DISABLE_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 -DASF_PEI MSFT: *_*_IA32_VFRPP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_DISABLE_OPTIONS) @@ -124,6 +125,7 @@ MSFT: *_*_IA32_ASLCC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_D # For X64 Specific Build Flag # GCC: *_*_X64_PP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) +GCC: *_*_X64_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 -Wno-unused -Wl,--allow-multiple-definition MSFT: *_*_X64_ASM_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) MSFT: *_*_X64_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_DISABLE_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 MSFT: *_*_X64_VFRPP_FLAGS= $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_DISABLE_OPTIONS) diff --git a/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec b/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec index e326598..68977d0 100644 --- a/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec +++ b/Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec @@ -5,7 +5,7 @@ # INF files to generate AutoGen.c and AutoGen.h files # for the build infrastructure. # -# Copyright (c) 2017, Intel Corporation. All rights reserved. +# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -20,8 +20,8 @@ PACKAGE_GUID = 0A8BA6E8-C8AC-4AC1-87AC-52772FA6AE5E [Includes] Include -KabylakeRvp3\Include -Features\Tbt\Include +KabylakeRvp3/Include +Features/Tbt/Include [Guids] -- 2.7.4 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#41107): https://edk2.groups.io/g/devel/message/41107 Mute This Topic: https://groups.io/mt/31693034/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH v2 1/5] MinPlatformPkg: Added GCC5 build support
From: Prince Agyeman
Fixes:
* Replacing .asm and .S with nasm in SecFspWrapperPlatformSecLib
for cross-platform build support
* Modified RuleInclude.fdf
* Modified python files to be OS independent
Gcc build was tested on Ubuntu 16.04.5 LTS with gcc version 5.4.0,
nasm version 2.11.08
Cc: Michael Kubacki
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Liming Gao
Cc: Ankit Sinha
Signed-off-by: Prince Agyeman
---
.../Ia32/PeiCoreEntry.S| 117 ---
.../Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} | 46 +--
.../SecFspWrapperPlatformSecLib/Ia32/SecEntry.S| 342 -
.../Ia32/{SecEntry.asm => SecEntry.nasm} | 132
.../SecFspWrapperPlatformSecLib/Ia32/Stack.S | 67
.../Ia32/{Stack.asm => Stack.nasm} | 39 ++-
.../SecFspWrapperPlatformSecLib.inf| 12 +-
.../MinPlatformPkg/Include/Fdf/RuleInclude.fdf | 6 +-
.../Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py | 2 +-
.../MinPlatformPkg/Tools/PatchFv/PatchBinFv.py | 8 +-
.../MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py| 15 +-
Platform/Intel/build_bios.py | 28 +-
12 files changed, 143 insertions(+), 671 deletions(-)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{PeiCoreEntry.asm
=> PeiCoreEntry.nasm} (66%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/SecEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{SecEntry.asm
=> SecEntry.nasm} (72%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/Stack.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{Stack.asm
=> Stack.nasm} (59%)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
deleted file mode 100644
index 8c8356f..000
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
+++ /dev/null
@@ -1,117 +0,0 @@
-## @file
-# Find and call SecStartup
-#
-# Copyright (c) 2017, Intel Corporation. All rights reserved.
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-ASM_GLOBAL ASM_PFX(CallPeiCoreEntryPoint)
-ASM_PFX(CallPeiCoreEntryPoint):
- #
- # Obtain the hob list pointer
- #
- movl0x4(%esp), %eax
- #
- # Obtain the stack information
- # ECX: start of range
- # EDX: end of range
- #
- movl0x8(%esp), %ecx
- movl0xC(%esp), %edx
-
- #
- # Platform init
- #
- pushal
- pushl %edx
- pushl %ecx
- pushl %eax
- call ASM_PFX(PlatformInit)
- popl %eax
- popl %eax
- popl %eax
- popal
-
- #
- # Set stack top pointer
- #
- movl%edx, %esp
-
- #
- # Push the hob list pointer
- #
- pushl %eax
-
- #
- # Save the value
- # ECX: start of range
- # EDX: end of range
- #
- movl%esp, %ebp
- pushl %ecx
- pushl %edx
-
- #
- # Push processor count to stack first, then BIST status (AP then BSP)
- #
- movl$1, %eax
- cpuid
- shr $16, %ebx
- andl$0x00FF, %ebx
- cmp $1, %bl
- jae PushProcessorCount
-
- #
- # Some processors report 0 logical processors. Effectively 0 = 1.
- # So we fix up the processor count
- #
- inc %ebx
-
-PushProcessorCount:
- pushl %ebx
-
- #
- # We need to implement a long-term solution for BIST capture. For now, we
just copy BSP BIST
- # for all processor threads
- #
- xorl%ecx, %ecx
- movb%bl, %cl
-PushBist:
- movd%mm0, %eax
- pushl %eax
- loopPushBist
-
- # Save Time-Stamp Counter
- movd %mm5, %eax
- pushl %eax
-
- movd %mm6, %eax
- pushl %eax
-
- #
- # Pass entry point of the PEI core
- #
- movl$0xFFE0, %edi
- pushl %ds:(%edi)
-
- #
- # Pass BFV into the PEI Core
- #
- movl$0xFFFC, %edi
- pushl %ds:(%edi)
-
- #
- # Pass stack size into the PEI Core
- #
- movl-4(%ebp), %ecx
- movl-8(%ebp), %edx
- pushl %ecx # RamBase
-
- subl%ecx, %edx
- pushl %edx # RamSize
-
- #
- # Pass Control into the PEI Core
- #
- call ASM_PFX(SecStartup)
diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.asm
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.nasm
similarity index 66%
rename from
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.asm
rename to
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.nasm
index c854067..5c5b788 100644
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Li
[edk2-devel] [edk2-platforms] [PATCH v2 4/5] ClevoOpenBoardPkg: Added GCC5 build support
From: Prince Agyeman
Fixes:
* include file paths
* gcc build options
Gcc build was tested on Ubuntu 16.04.5 LTS
with gcc version 5.4.0, nasm version 2.11.08
Signed-off-by: Prince Agyeman
---
Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc | 2 ++
Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec | 4 ++--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
index 2cfcfdf..31e7f41 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
+++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkgBuildOption.dsc
@@ -102,6 +102,7 @@ DEFINE DSC_PLTPKG_FEATURE_BUILD_OPTIONS =
$(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(
# For IA32 Specific Build Flag
#
GCC: *_*_IA32_PP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
+GCC: *_*_IA32_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) -D
PI_SPECIFICATION_VERSION=0x00010015 -Wno-unused -Wl,--allow-multiple-definition
MSFT: *_*_IA32_ASM_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
MSFT: *_*_IA32_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
$(OPTIMIZE_DISABLE_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015 -DASF_PEI
MSFT: *_*_IA32_VFRPP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
$(OPTIMIZE_DISABLE_OPTIONS)
@@ -124,6 +125,7 @@ MSFT: *_*_IA32_ASLCC_FLAGS =
$(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) $(OPTIMIZE_D
# For X64 Specific Build Flag
#
GCC: *_*_X64_PP_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
+GCC: *_*_X64_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS) -D
PI_SPECIFICATION_VERSION=0x00010015 -Wno-unused -Wl,--allow-multiple-definition
MSFT: *_*_X64_ASM_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
MSFT: *_*_X64_CC_FLAGS = $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
$(OPTIMIZE_DISABLE_OPTIONS) -D PI_SPECIFICATION_VERSION=0x00010015
MSFT: *_*_X64_VFRPP_FLAGS= $(DSC_PLTPKG_FEATURE_BUILD_OPTIONS)
$(OPTIMIZE_DISABLE_OPTIONS)
diff --git a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
index 29816e3..28aedfe 100644
--- a/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec
@@ -18,8 +18,8 @@ PACKAGE_GUID = D04CCA80-5F71-478D-9A26-72BC751D0106
[Includes]
Include
-N1xxWU\Include
-Features\Tbt\Include
+N1xxWU/Include
+Features/Tbt/Include
[Guids]
gBoardModuleTokenSpaceGuid= {0x72d1fff7, 0xa42a, 0x4219, {0xb9,
0x95, 0x5a, 0x67, 0x53, 0x6e, 0xa4, 0x2a}}
--
2.7.4
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[edk2-devel] [edk2-platforms] [PATCH v2 0/5] Added GCC5 build support
From: Prince Agyeman
This patch series adds GCC 5 build support to
ClevoOpenBoardPkg and KabylakeOpenBoardPkg
Changes in v2:
- Updated Readme.md
- Updated python path in build_bios.py
- Fixed spelling error in Stack.nasm
- Fixed copyright data in SecFspWrapperPlatformSecLib
- Removed TE Rule from RuleInclude.fdf, updated PE32 alignment to 64
Prince Agyeman (5):
MinPlatformPkg: Added GCC5 build support
KabylakeSiliconPkg: Casting functions to EFIAPI
KabylakeOpenBoardPkg: Added GCC5 build support
ClevoOpenBoardPkg: Added GCC5 build support
Intel/Readme.md: Updated readme with linux build instructions
.../N1xxWU/OpenBoardPkgBuildOption.dsc | 2 +
Platform/Intel/ClevoOpenBoardPkg/OpenBoardPkg.dec | 4 +-
.../KabylakeRvp3/OpenBoardPkgBuildOption.dsc | 4 +-
.../Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec| 6 +-
.../Ia32/PeiCoreEntry.S| 117 ---
.../Ia32/{PeiCoreEntry.asm => PeiCoreEntry.nasm} | 46 +--
.../SecFspWrapperPlatformSecLib/Ia32/SecEntry.S| 342 -
.../Ia32/{SecEntry.asm => SecEntry.nasm} | 132
.../SecFspWrapperPlatformSecLib/Ia32/Stack.S | 67
.../Ia32/{Stack.asm => Stack.nasm} | 39 ++-
.../SecFspWrapperPlatformSecLib.inf| 12 +-
.../MinPlatformPkg/Include/Fdf/RuleInclude.fdf | 6 +-
.../Tools/Fsp/RebaseAndPatchFspBinBaseAddress.py | 2 +-
.../MinPlatformPkg/Tools/PatchFv/PatchBinFv.py | 8 +-
.../MinPlatformPkg/Tools/PatchFv/RebaseBinFv.py| 15 +-
Platform/Intel/Readme.md | 42 +--
Platform/Intel/build_bios.py | 28 +-
.../Pch/PchInit/Smm/PchInitSmm.h | 3 +-
.../Pch/PchInit/Smm/PchPcieSmm.c | 3 +-
.../Pch/PchSmiDispatcher/Smm/PchSmm.h | 4 +-
.../Pch/PchSmiDispatcher/Smm/PchSmmCore.c | 4 +-
21 files changed, 187 insertions(+), 699 deletions(-)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/PeiCoreEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{PeiCoreEntry.asm
=> PeiCoreEntry.nasm} (66%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/SecEntry.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{SecEntry.asm
=> SecEntry.nasm} (72%)
delete mode 100644
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/Stack.S
rename
Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatformSecLib/Ia32/{Stack.asm
=> Stack.nasm} (59%)
--
2.7.4
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[edk2-devel] [edk2-platforms] [PATCH v2 2/5] KabylakeSiliconPkg: Casting functions to EFIAPI
From: Prince Agyeman
This fixes the calling convension issues in gcc
Gcc build was tested on Ubuntu 16.04.5 LTS
with gcc version 5.4.0, nasm version 2.11.08
Cc: Michael Kubacki
Cc: Michael D Kinney
Cc: Nate DeSimone
Cc: Liming Gao
Cc: Ankit Sinha
Signed-off-by: Prince Agyeman
---
Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h | 3 ++-
Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c | 3 ++-
Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h| 4 +++-
.../Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmmCore.c| 4 +++-
4 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h
b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h
index 44f151c..666340e 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchInitSmm.h
@@ -1,7 +1,7 @@
/** @file
Header file for PCH Init SMM Handler
-Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -205,6 +205,7 @@ PchPcieLinkEqHandlerFunction (
**/
VOID
+EFIAPI
PchPcieIoTrapSmiCallback (
IN EFI_HANDLE DispatchHandle,
IN EFI_SMM_IO_TRAP_CONTEXT*CallbackContext,
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c
b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c
index aed33bb..847fbfb 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchInit/Smm/PchPcieSmm.c
@@ -1,7 +1,7 @@
/** @file
PCH Pcie SMM Driver Entry
-Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -238,6 +238,7 @@ PchPciePmIoTrapSmiCallback (
**/
VOID
+EFIAPI
PchPcieIoTrapSmiCallback (
IN EFI_HANDLEDispatchHandle,
IN EFI_SMM_IO_TRAP_CONTEXT*CallbackContext,
diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h
b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h
index 508832e..a9f0664 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmm.h
@@ -1,7 +1,7 @@
/** @file
Prototypes and defines for the PCH SMM Dispatcher.
-Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -510,6 +510,7 @@ typedef struct {
registered and the SMI source has been
enabled.
**/
EFI_STATUS
+EFIAPI
PchSmmCoreRegister (
IN PCH_SMM_GENERIC_PROTOCOL *This,
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,
@@ -530,6 +531,7 @@ PchSmmCoreRegister (
@retval EFI_INVALID_PARAMETER Handle is invalid.
**/
EFI_STATUS
+EFIAPI
PchSmmCoreUnRegister (
IN PCH_SMM_GENERIC_PROTOCOL *This,
IN EFI_HANDLE *DispatchHandle
diff --git
a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmmCore.c
b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmmCore.c
index 0c494bf..cb3bfba 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmmCore.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/PchSmiDispatcher/Smm/PchSmmCore.c
@@ -2,7 +2,7 @@
This driver is responsible for the registration of child drivers
and the abstraction of the PCH SMI sources.
-Copyright (c) 2017, Intel Corporation. All rights reserved.
+Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -325,6 +325,7 @@ SmiInputValueDuplicateCheck (
registered and the SMI source has been
enabled.
**/
EFI_STATUS
+EFIAPI
PchSmmCoreRegister (
IN PCH_SMM_GENERIC_PROTOCOL *This,
IN EFI_SMM_HANDLER_ENTRY_POINT2 DispatchFunction,
@@ -596,6 +597,7 @@ Error:
@retval EFI_INVALID_PARAMETER Handle is invalid.
**/
EFI_STATUS
+EFIAPI
PchSmmCoreUnRegister (
IN PCH_SMM_GENERIC_PROTOCOL *This,
IN EFI_HANDLE *DispatchHandle
--
2.7.4
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Re: [edk2-devel] [PATCH v1] Maintainers.txt: Change SimicsOpenBoardPkg Maintainer
Reviewed-by: Prince Agyeman Prince -Original Message- From: devel@edk2.groups.io On Behalf Of Desimone, Nathaniel L Sent: Tuesday, November 2, 2021 3:07 PM To: devel@edk2.groups.io Cc: Agyeman, Prince ; Leif Lindholm ; Kinney, Michael D Subject: [edk2-devel] [PATCH v1] Maintainers.txt: Change SimicsOpenBoardPkg Maintainer To help keep edk2-platforms healthy, I would like to offer to maintain SimicsOpenBoardPkg, SimicsX58SktPkg, and SimicsIch10Pkg. The current maintainer for those packages has changed jobs and is no longer active in the community. Cc: Agyeman Prince Cc: Leif Lindholm Cc: Michael D Kinney Signed-off-by: Nate DeSimone --- Maintainers.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Maintainers.txt b/Maintainers.txt index c839c71b22..8d9d454347 100644 --- a/Maintainers.txt +++ b/Maintainers.txt @@ -235,7 +235,7 @@ M: Chasel Chiu Platform/Intel/SimicsOpenBoardPkg F: Platform/Intel/SimicsOpenBoardPkg/ -M: Agyeman Prince +M: Nate DeSimone Platform/Intel/Tools F: Platform/Intel/Tools/ @@ -301,11 +301,11 @@ M: Chasel Chiu Silicon/Intel/SimicsX58SktPkg F: Silicon/Intel/SimicsX58SktPkg/ -M: Agyeman Prince +M: Nate DeSimone Silicon/Intel/SimicsIch10Pkg F: Silicon/Intel/SimicsIch10Pkg/ -M: Agyeman Prince +M: Nate DeSimone Silicon/Intel/Tools F: Silicon/Intel/Tools/ -- 2.27.0.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#83358): https://edk2.groups.io/g/devel/message/83358 Mute This Topic: https://groups.io/mt/86778275/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH] SimicsOpenBoardPkg: Update usage of functions to be removed
Reviewed-by: Prince Agyeman
-Original Message-
From: Zhang, Shenglei
Sent: Tuesday, July 28, 2020 8:34 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince
Subject: [PATCH] SimicsOpenBoardPkg: Update usage of functions to be removed
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2777
With some functions to be deprecated, their usage in platforms should also be
updated.
Cc: Agyeman Prince
Signed-off-by: Shenglei Zhang
---
.../Library/BoardBdsHookLib/BoardBdsHookLib.c| 2 +-
.../Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c| 4 ++--
.../Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 6 +++---
.../Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c| 12 ++--
4 files changed, 12 insertions(+), 12 deletions(-)
diff --git
a/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c
b/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c
index 1058dbf3..ba4d2b02 100644
---
a/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBdsHookLib.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/Library/BoardBdsHookLib/BoardBds
+++ HookLib.c
@@ -1206,7 +1206,7 @@ VisitingFileSystemInstance (
NULL,
&mEmuVariableEventReg
);
- PcdSet64 (PcdEmuVariableEvent, (UINT64)(UINTN) mEmuVariableEvent);
+ PcdSet64S (PcdEmuVariableEvent, (UINT64)(UINTN) mEmuVariableEvent);
return EFI_SUCCESS;
}
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c
index b7fd4d1f..c856ff44 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsDxe/Platform.c
@@ -669,9 +669,9 @@ ExecutePlatformConfig (
//
// Pass the preferred resolution to GraphicsConsoleDxe via dynamic PCDs.
//
-PcdSet32 (PcdVideoHorizontalResolution,
+PcdSet32S (PcdVideoHorizontalResolution,
PlatformConfig.HorizontalResolution);
-PcdSet32 (PcdVideoVerticalResolution,
+PcdSet32S (PcdVideoVerticalResolution,
PlatformConfig.VerticalResolution);
}
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
index 60aa54be..127afffc 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
@@ -155,7 +155,7 @@ GetFirstNonAddress (
if (mBootMode != BOOT_ON_S3_RESUME) {
DEBUG ((EFI_D_INFO, "%a: disabling 64-bit PCI host aperture\n",
__FUNCTION__));
- PcdSet64 (PcdPciMmio64Size, 0);
+ PcdSet64S (PcdPciMmio64Size, 0);
}
//
@@ -187,8 +187,8 @@ GetFirstNonAddress (
// the GCD memory space map through our PciHostBridgeLib instance; here we
// only need to set the PCDs.
//
-PcdSet64 (PcdPciMmio64Base, Pci64Base);
-PcdSet64 (PcdPciMmio64Size, Pci64Size);
+PcdSet64S (PcdPciMmio64Base, Pci64Base);
+PcdSet64S (PcdPciMmio64Size, Pci64Size);
DEBUG ((EFI_D_INFO, "%a: Pci64Base=0x%Lx Pci64Size=0x%Lx\n",
__FUNCTION__, Pci64Base, Pci64Size));
}
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c
index 0bec76e4..6963f39a 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c
@@ -257,8 +257,8 @@ MemMapInitialization (
//
PciSize = 0xFC00 - PciBase;
AddIoMemoryBaseSizeHob (PciBase, PciSize);
- PcdSet64 (PcdPciMmio32Base, PciBase);
- PcdSet64 (PcdPciMmio32Size, PciSize);
+ PcdSet64S (PcdPciMmio32Base, PciBase); PcdSet64S (PcdPciMmio32Size,
+ PciSize);
AddIoMemoryBaseSizeHob (0xFEC0, SIZE_4KB);
AddIoMemoryBaseSizeHob (0xFED0, SIZE_1KB);
if (mHostBridgeDevId == INTEL_ICH10_DEVICE_ID) { @@ -300,8 +300,8 @@
MemMapInitialization (
PciIoBase,
PciIoSize
);
- PcdSet64 (PcdPciIoBase, PciIoBase);
- PcdSet64 (PcdPciIoSize, PciIoSize);
+ PcdSet64S (PcdPciIoBase, PciIoBase);
+ PcdSet64S (PcdPciIoSize, PciIoSize);
//
// Add flash range.
@@ -367,7 +367,7 @@ MiscInitialization (
ASSERT (FALSE);
return;
}
- PcdSet16 (PcdSimicsX58HostBridgePciDevId, mHostBridgeDevId);
+ PcdSet16S (PcdSimicsX58HostBridgePciDevId, mHostBridgeDevId);
//
// If the appropriate IOspace enable bit is set, assume the ACPI PMBA @@
-483,7 +483,7 @@ ReserveEmuVariableNvStore (
VariableStore,
(2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024
));
- PcdSet64 (PcdEmuVariableNvStoreReserved, VariableStore);
+ PcdSet64S (PcdEmuVariableNvStoreReserved, VariableStore);
}
--
2.18.0.windows.1
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Re: [edk2-devel] IsaBus driver's usage
+ Ray and Hao who are the MdeModulePkg/Bus/ maintainers -Original Message- From: Philippe Mathieu-Daudé Sent: Thursday, May 28, 2020 1:28 AM To: devel@edk2.groups.io; tiger...@zhaoxin.com; Agyeman, Prince Subject: Re: [edk2-devel] IsaBus driver's usage +Agyeman Prince On 5/28/20 9:58 AM, Tiger Liu(BJ-RD) wrote: > Hi, expert: > I have a question about IsaBus driver. > > There is a isa bus driver in MdeModulePkg\Bus\Isa\IsaBusDxe. > But i find nobody use it anymore. > > Based on current edk2-platform samples, they just use SioDxe driver > plus Ps2Keyboard driver, not use IsaBus driver anymore. > > So when to use IsaBus driver? The Intel Simics platform maybe? -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#60459): https://edk2.groups.io/g/devel/message/60459 Mute This Topic: https://groups.io/mt/74517611/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [PATCH 1/5] Platform/Intel/SimicsOpenBoardPkg: Change PCDs type about status code
Reviewed-by: Prince Agyeman -Original Message- From: Tan, Ming Sent: Tuesday, June 9, 2020 4:24 AM To: devel@edk2.groups.io Cc: Agyeman, Prince Subject: [PATCH 1/5] Platform/Intel/SimicsOpenBoardPkg: Change PCDs type about status code REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2791 Since the type of PcdStatusCodeUseSerial and PcdStatusCodeUseMemory in MdeModulePkg.dec are changed, so change them from PcdsFeatureFlag to PcdsFixedAtBuild in dsc files. Cc: Agyeman Prince Signed-off-by: Ming Tan --- .../BoardX58Ich10/OpenBoardPkgPcd.dsc | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc index cd98d09f01..52cdf9ec0f 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds +++ c @@ -1,7 +1,7 @@ ## @file # PCD configuration build description file for the X58Ich10 board. #-# Copyright (c) 2019 Intel Corporation. All rights reserved. +# Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent #@@ -37,12 +37,6 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE gEfiMdeModulePkgTokenSpaceGuid.PcdPciBusHotplugDeviceSupport|FALSE- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|TRUE-!if $(TARGET) == RELEASE- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE-!else- gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE-!endif gEfiMdeModulePkgTokenSpaceGuid.PcdSupportUpdateCapsuleReset|FALSE gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|FALSE@@ -128,6 +122,12 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1 gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0xc000 gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|TRUE+!if $(TARGET) == RELEASE+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE+!else+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE+!endif # DEBUG_INIT 0x0001 // Initialization # DEBUG_WARN 0x0002 // Warnings # DEBUG_LOAD 0x0004 // Load events-- 2.24.0.windows.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#61002): https://edk2.groups.io/g/devel/message/61002 Mute This Topic: https://groups.io/mt/74771803/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-staging/EdkRepo] [PATCH V2 2/3] EdkRepo: Add edkrepo/common/workspace_maitenance/manifest_repos_maitenance
Hi Ashley,
Comment below
Prince
-Original Message-
From: Desimone, Ashley E
Sent: Wednesday, April 22, 2020 2:35 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Pandya, Puja
; Bjorge, Erik C ; Bret
Barkelew ; Agyeman, Prince
Subject: [edk2-staging/EdkRepo] [PATCH V2 2/3] EdkRepo: Add
edkrepo/common/workspace_maitenance/manifest_repos_maitenance
Add a directory to edkrepo/common to store workspace maitenance functionatlity.
Add edkrepo/common/workspace_matenance/humble directory to store related
strings and included manifest_repos_maitenance_humble.py
Add edkrepo/common/workspace_maitenance/manifest_repos_maitenance.py
to support the maitenance of multiple manifest repositories.
Added pull_single_manifest_repo() to manifest_repos_maitenance.py Updated
setup.py to include the new directories.
Signed-off-by: Ashley E Desimone
Cc: Nate DeSimone
Cc: Puja Pandya
Cc: Erik Bjorge
Cc: Bret Barkelew
Cc: Prince Agyeman
---
.../humble/manifest_repos_maitenance_humble.py | 23 +
.../manifest_repos_maitenance.py | 59 ++
setup.py | 5 +-
3 files changed, 85 insertions(+), 2 deletions(-) create mode 100644
edkrepo/common/workspace_maitenance/humble/manifest_repos_maitenance_humble.py
create mode 100644
edkrepo/common/workspace_maitenance/manifest_repos_maitenance.py
diff --git
a/edkrepo/common/workspace_maitenance/humble/manifest_repos_maitenance_humble.py
b/edkrepo/common/workspace_maitenance/humble/manifest_repos_maitenance_humble.py
new file mode 100644
index 000..ee7b4bb
--- /dev/null
+++ b/edkrepo/common/workspace_maitenance/humble/manifest_repos_maitenan
+++ ce_humble.py
@@ -0,0 +1,23 @@
+#!/usr/bin/env python3
+#
+## @file
+# manifest_repos_mgmt_humble.py
+#
+# Copyright (c) 2017- 2020, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent #
+
+''' Contains user facing strings for manifest_repos_mgmt.py '''
+
+from colorama import Fore
+from colorama import Style
+
+CLONE_SINGLE_MAN_REPO = 'Cloning global manifest repository to: {} from: {}'
+SYNC_SINGLE_MAN_REPO = 'Syncing the global manifest repository: {}'
+SINGLE_MAN_REPO_DIRTY = ('Uncommited changes present in the global manifest '
+ 'repository: {} Resolve these changes and attempt
your'
+ ' operation again.')
+SINGLE_MAN_REPO_NOT_CFG_BRANCH = ('The current active branch, {}, is not the '
+ 'specified branch for global manifst
+repository: {}') SINGLE_MAN_REPO_CHECKOUT_CFG_BRANCH = 'Checking out the
specified branch: {} prior to syncing'
+SINGLE_MAN_REPO_MOVED = '{}{}WARNING:{}{} The global manifest
+repository has moved. Backing up previous global manifest repository
+to: {{}}{}\n'.format(Style.BRIGHT, Fore.RED, Style.RESET_ALL, Fore.RED,
+Style.RESET_ALL)
\ No newline at end of file
diff --git a/edkrepo/common/workspace_maitenance/manifest_repos_maitenance.py
b/edkrepo/common/workspace_maitenance/manifest_repos_maitenance.py
new file mode 100644
index 000..8944492
--- /dev/null
+++ b/edkrepo/common/workspace_maitenance/manifest_repos_maitenance.py
@@ -0,0 +1,59 @@
+#!/usr/bin/env python3
+#
+## @file
+# manifest_repos_mgmt.py
+#
+# Copyright (c) 2017- 2020, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent #
+
+import os
+import traceback
+import shutil
+
+import git
+from git import Repo
+
+import edkrepo.config.config_factory as cfg from
+edkrepo.common.edkrepo_exception import
+EdkrepoUncommitedChangesException from edkrepo.common.progress_handler
+import GitProgressHandler import
+edkrepo.common.workspace_maitenance.humble.manifest_repos_maitenance_hu
+mble as humble from
+edkrepo.common.workspace_maitenance.workspace_maitenance import
+generate_name_for_obsolete_backup
+
+
+def pull_single_manifest_repo(url, branch, local_path, reset_hard=False):
+'''
+Clones or syncs a single global manifest repository as defined in either
+the edkrepo.cfg or the edkrepo_user.cfg
+'''
+# If a relative path is used join to the edkrepo global data directory path
+if not os.path.isabs(local_path):
+local_path = os.path.join(cfg.get_edkrepo_global_data_directory(),
local_path)
+# Clone the repository if it does not exist locally
+if not os.path.exists(local_path):
+print(humble.CLONE_SINGLE_MAN_REPO.format(local_path, url))
+repo = Repo.clone_from(url, local_path, progress=GitProgressHandler(),
branch=branch)
+# Sync the repository if it exists locally
+else:
+repo = Repo(local_path)
+if url in repo.remotes['origin'].urls:
+if repo.is_dirty(untracked_files=True) and not reset_hard:
+
Re: [edk2-devel] [edk2-staging/EdkRepo] [PATCH] EdkRepo: Update return values of manifest_repo_list
Reviewed-by: Prince Agyeman
-Original Message-
From: Desimone, Ashley E
Sent: Tuesday, May 12, 2020 11:45 AM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Pandya, Puja
; Bjorge, Erik C ; Bret
Barkelew ; Agyeman, Prince
Subject: [edk2-staging/EdkRepo] [PATCH] EdkRepo: Update return values of
manifest_repo_list
Update the manifest_repo_list property to return an empty list if no
[manifest-repos] section was present in the config file.
Signed-off-by: Ashley E Desimone
Cc: Nate DeSimone
Cc: Puja Pandya
Cc: Erik Bjorge
Cc: Bret Barkelew
Cc: Prince Agyeman
---
edkrepo/config/config_factory.py | 2 ++
1 file changed, 2 insertions(+)
diff --git a/edkrepo/config/config_factory.py b/edkrepo/config/config_factory.py
index c0b9f68..116cb24 100644
--- a/edkrepo/config/config_factory.py
+++ b/edkrepo/config/config_factory.py
@@ -119,6 +119,8 @@ class BaseConfig():
"""Returns a list of available manifest repos"""
if self.cfg.has_section('manifest-repos'):
return self.cfg.options('manifest-repos')
+else:
+return []
def manifest_repo_props(self, manifest_repo):
"""
--
2.16.2.windows.1
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[edk2-devel] [edk2-platforms] [PATCH] BoardModulePkg: Fix ECC Coding Style Issues
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2453
Fixed coding style issues as reported by the ECC tool
Cc: Shenglei Zhang
Cc: Chasel Chiu
Cc: Nate DeSimone
Cc: Michael Kubacki
Signed-off-by: Prince Agyeman
---
.../BoardModulePkg/LegacySioDxe/ComponentName.h | 5 +
.../BoardModulePkg/LegacySioDxe/LegacySioDxe.inf | 2 ++
.../Intel/BoardModulePkg/LegacySioDxe/SioChip.c | 5 +++--
.../Intel/BoardModulePkg/LegacySioDxe/SioDriver.c | 15 ---
.../Library/BdsPs2KbcLib/BdsPs2KbcLib.c | 6 +++---
.../Library/BdsPs2KbcLib/BdsPs2KbcLib.h | 4 ++--
6 files changed, 23 insertions(+), 14 deletions(-)
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
index 85ca348701..91bc245f3a 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
@@ -6,6 +6,9 @@
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
+#ifndef _LEGACY_SIO_DXE_COMPONENT_NAME_H_
+#define _LEGACY_SIO_DXE_COMPONENT_NAME_H_
+
/**
Retrieves a Unicode string that is the user-readable name of the EFI Driver.
@@ -85,3 +88,5 @@ SioComponentNameGetControllerName (
IN CHAR8 *Language,
OUT CHAR16**ControllerName
);
+
+#endif
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
index 1d7cd92604..698d406450 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
@@ -44,6 +44,8 @@
SioDriver.c
SioDriver.h
ComponentName.c
+ ComponentName.h
+ Register.h
[Pcd]
gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
index b9a84ca51c..846dddf739 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
@@ -145,7 +145,7 @@ DEVICE_INFOmDeviceInfo[] = {
/**
- Gets the number of devices in Table of SIO Controllers mDeviceInfo
+ Gets the number of devices in Table of SIO Controllers mDeviceInfo.
@retval Number of enabled devices in Table of SIO Controllers.
**/
@@ -153,7 +153,8 @@ UINTN
EFIAPI
GetDeviceCount (
VOID
-){
+ )
+{
UINTNCount;
// Get mDeviceInfo item count
// -1 to account for for the end device info
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioDriver.c
b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioDriver.c
index 5bfdc94681..484c53e953 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioDriver.c
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioDriver.c
@@ -118,13 +118,14 @@ BOOLEAN
EFIAPI
SioDeviceEnabled (
IN SIO_PCI_ISA_BRIDGE_DEVICE_INFO *CurrentDevice
-){
-SIO_PCI_ISA_BRIDGE_DEVICE_INFO *Device = \
- (SIO_PCI_ISA_BRIDGE_DEVICE_INFO *) FixedPcdGetPtr
(PcdSuperIoPciIsaBridgeDevice);
-if(CompareMem (Device, CurrentDevice, sizeof
(SIO_PCI_ISA_BRIDGE_DEVICE_INFO)) == 0) {
- return TRUE;
-}
-return FALSE;
+ )
+{
+ SIO_PCI_ISA_BRIDGE_DEVICE_INFO *Device;
+ Device = (SIO_PCI_ISA_BRIDGE_DEVICE_INFO *) FixedPcdGetPtr
(PcdSuperIoPciIsaBridgeDevice);
+ if(CompareMem (Device, CurrentDevice, sizeof
(SIO_PCI_ISA_BRIDGE_DEVICE_INFO)) == 0) {
+return TRUE;
+ }
+ return FALSE;
}
/**
diff --git a/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.c
b/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.c
index eff10bddb4..0cf4c4d262 100644
--- a/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.c
+++ b/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.c
@@ -65,7 +65,7 @@ DetectPs2Keyboard (
MicroSecondDelay (30);
}
- if (FoundPs2Kbc == FALSE) {
+ if (!FoundPs2Kbc) {
return FALSE;
}
@@ -126,7 +126,7 @@ IsPs2KeyboardConnected (
BOOLEAN Result;
Result = DetectPs2Keyboard ();
- if (Result == FALSE) {
+ if (!Result) {
//
// If there is no ps2 keyboard detected for the 1st time, retry again.
//
@@ -138,7 +138,7 @@ IsPs2KeyboardConnected (
/**
Updates the ConIn variable with Ps2 Keyboard device path,
- if it doesn't already exists in ConIn and ConInDev
+ if it doesn't already exists in ConIn and ConInDev.
**/
VOID
AddPs2Keyboard (
diff --git a/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.h
b/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.h
index d9a27e6681..a96d53b98d 100644
--- a/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.h
+++ b/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.h
@@ -6,8 +6,8 @@
**/
-#ifndef _PS2_KBC_LIB_H
-#define _PS2_KBC_LIB_H
+#ifndef _PS2_KBC_LIB_H_
+#define _PS2_KBC_LIB_H_
#include
#include
--
2.19.1.windows.1
[edk2-devel] [edk2-platforms] [PATCH 1/4] WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove BoardFuncInit
Removes BoardFuncInit related functionality in WhiskeylakeURvp.
Co-authored-by: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../Library/BoardInitLib/BoardFunc.c | 19
.../Library/BoardInitLib/BoardFunc.h | 20 -
.../Library/BoardInitLib/BoardFuncInit.c | 26 -
.../BoardInitLib/BoardFuncInitPreMem.c| 29 +--
.../BoardInitLib/BoardPchInitPreMemLib.c | 3 +-
.../PeiMultiBoardInitPostMemLib.inf | 4 ---
.../PeiWhiskeylakeURvpInitPostMemLib.c| 8 -
.../PeiWhiskeylakeURvpInitPreMemLib.c | 10 +--
8 files changed, 9 insertions(+), 110 deletions(-)
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
deleted file mode 100644
index 7a2fed9904..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/** @file
- Board's PCD function hook.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include
-
-EFI_STATUS
-PeiBoardSpecificInitPostMemNull (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
deleted file mode 100644
index 9e0ff8d033..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/** @file
- Header file for Board Hook function intance.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _BOARD_FUNC_H_
-#define _BOARD_FUNC_H_
-
-#include
-
-EFI_STATUS
-PeiBoardSpecificInitPostMemNull (
- VOID
- );
-
-#endif // _BOARD_FUNC_H_
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
deleted file mode 100644
index b8c69166ed..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/** @file
- Source code for the board configuration init function in Post Memory init
phase.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "BoardFunc.h"
-
-/**
- Board's PCD function hook init function for PEI post memory phase.
-
- @param[in] BoardId An unsigned integrer represent the board id.
-
- @retval EFI_SUCCESS The function completed successfully.
-**/
-EFI_STATUS
-BoardFunctionInit (
- IN UINT16 BoardId
-)
-{
-
- return EFI_SUCCESS;
-}
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
index 1944a02bf1..06ff64da8d 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
+++
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
@@ -2,39 +2,24 @@
Source code for the board configuration init function in Post Memory init
phase.
- Copyright (c) 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include
+
//
// Null function for nothing GOP VBT update.
//
VOID
-GopVbtSpecificUpdateNull(
+GopVbtSpecificUpdateNull (
IN CHILD_STRUCT **ChildStructPtr
-);
+ );
+
//
// for CFL U DDR4
//
VOID
-CflUDdr4GopVbtSpecificUpdate(
+CflUDdr4GopVbtSpecificUpdate (
IN CHILD_STRUCT **ChildStructPtr
-);
-/**
- Board's PCD function hook init function for PEI post memory phase.
-
- @param[in] BoardId An unsigned integrer represent the board id.
-
- @retval EFI_SUCCESS The function completed successfully.
-**/
-EFI_STATUS
-BoardFunctionInitPreMem (
- IN UINT16 BoardId
- )
-{
-
- return EFI_SUCCESS;
-}
-
-
+ );
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c
index 5305ec7f7c..1f778c4f7e 100644
---
a/Platfo
[edk2-devel] [edk2-platforms] [PATCH 2/4] WhiskeylakeOpenBoardPkg: Add UpXtreme board ID
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2191 Co-authored-by: Michael Kubacki Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- .../Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h b/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h index 3545b2a05c..4e8288b1f1 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h @@ -1,8 +1,8 @@ /** @file -Defines Platform BoardIds + Defines Whiskey Lake Platform Board IDs - Copyright (c) 2019, Intel Corporation. All rights reserved. + Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -21,6 +21,7 @@ Defines Platform BoardIds #define TypeTrad0x1 #define TypeUltUlx 0x2 +#define BoardIdUpXtreme 0x10 #define BoardIdWhiskeyLakeRvp 0x60 #define BoardIdUnknown1 0x -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54321): https://edk2.groups.io/g/devel/message/54321 Mute This Topic: https://groups.io/mt/71230115/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH 0/4] Add Initial Support for UP Xtreme
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2191 This patch series add the initial Up Xtreme board support to the WhiskeylakeOpenBoardPkg Current Status: 1. Basic boot to windows 10 (Home) and Ubuntu 18.04 from NVMe * UpXtreme: - Intel(R) Core(TM) i3-8145UE CPU @ 2.20GHz - Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz 2. UpXtreme Intel(R) Celeron(R) CPU 4305UE @ 2.00GHz hangs during memory training 3. USB mass storage devices not detected in UEFI shell Prince Agyeman (4): WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove BoardFuncInit WhiskeylakeOpenBoardPkg: Add UpXtreme board ID WhiskeylakeOpenBoardPkg/UpXtreme: Add Includes and Libraries WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files Platform/Intel/Readme.md | 12 + .../Include/PlatformBoardId.h |5 +- .../PeiFspMiscUpdUpdateLib.c | 110 + .../PeiFspPolicyUpdateLib.c | 126 + .../PeiMiscPolicyUpdate.h | 25 + .../PeiPchPolicyUpdate.c | 300 ++ .../PeiPchPolicyUpdate.h | 28 + .../PeiPchPolicyUpdatePreMem.c| 39 + .../PeiSaPolicyUpdate.c | 158 + .../PeiSaPolicyUpdate.h | 45 + .../PeiSaPolicyUpdatePreMem.c | 124 + .../PeiSiliconPolicyUpdateLibFsp.inf | 144 + .../FspWrapperPlatformSecLib.c| 186 + .../SecFspWrapperPlatformSecLib/FsptCoreUpd.h | 40 + .../SecFspWrapperPlatformSecLib/Ia32/Fsp.h| 42 + .../Ia32/PeiCoreEntry.nasm| 130 + .../Ia32/SecEntry.nasm| 361 ++ .../Ia32/Stack.nasm | 72 + .../PlatformInit.c| 47 + .../SecFspWrapperPlatformSecLib.inf | 105 + .../SecGetPerformance.c | 89 + .../SecPlatformInformation.c | 78 + .../SecRamInitData.c | 55 + .../SecTempRamDone.c | 93 + .../UpXtreme/Include/Fdf/FlashMapInclude.fdf | 51 + .../Include/Library/PeiPlatformHookLib.h | 131 + .../UpXtreme/Include/Library/PeiPlatformLib.h | 38 + .../UpXtreme/Include/PlatformBoardConfig.h| 103 + .../UpXtreme/Include/PlatformInfo.h | 42 + .../Library/BaseFuncLib/BaseFuncLib.inf | 33 + .../UpXtreme/Library/BaseFuncLib/Gop.c| 38 + .../BaseGpioCheckConflictLib.c| 137 + .../BaseGpioCheckConflictLib.inf | 35 + .../BaseGpioCheckConflictLibNull.c| 37 + .../BaseGpioCheckConflictLibNull.inf | 32 + .../BasePlatformHookLib/BasePlatformHookLib.c | 143 + .../BasePlatformHookLib.inf | 45 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 63 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.inf| 50 + .../SmmMultiBoardAcpiSupportLib.c | 82 + .../SmmMultiBoardAcpiSupportLib.inf | 50 + .../BoardAcpiLib/SmmSiliconAcpiEnableLib.c| 170 + .../BoardAcpiLib/SmmUpXtremeAcpiEnableLib.c | 40 + .../BoardInitLib/BoardFuncInitPreMem.c| 25 + .../Library/BoardInitLib/BoardInitLib.h | 20 + .../BoardInitLib/BoardPchInitPreMemLib.c | 383 +++ .../BoardInitLib/BoardSaConfigPreMem.h| 79 + .../BoardInitLib/BoardSaInitPreMemLib.c | 298 ++ .../Library/BoardInitLib/GpioTableDefault.c | 213 ++ .../Library/BoardInitLib/GpioTableUpXtreme.c | 217 ++ .../Library/BoardInitLib/PchHdaVerbTables.h | 3014 + .../BoardInitLib/PeiBoardInitPostMemLib.c | 40 + .../BoardInitLib/PeiBoardInitPostMemLib.inf | 57 + .../BoardInitLib/PeiBoardInitPreMemLib.c | 106 + .../BoardInitLib/PeiBoardInitPreMemLib.inf| 124 + .../PeiMultiBoardInitPostMemLib.c | 41 + .../PeiMultiBoardInitPostMemLib.inf | 202 ++ .../BoardInitLib/PeiMultiBoardInitPreMemLib.c | 83 + .../PeiMultiBoardInitPreMemLib.inf| 301 ++ .../Library/BoardInitLib/PeiUpXtremeDetect.c | 192 ++ .../BoardInitLib/PeiUpXtremeInitPostMemLib.c | 416 +++ .../BoardInitLib/PeiUpXtremeInitPreMemLib.c | 619 .../BoardInitLib/UpXtremeHsioPtssTables.c | 32 + .../Library/BoardInitLib/UpXtremeInit.h | 44 + .../Library/BoardInitLib/UpXtremeSpdTable.c | 87 + .../DxePolicyBoardConfig.h| 19 + .../DxePolicyBoardConfigLib.inf | 45 + .../DxeSaPolicyBoardConfig.c | 36 + .../PeiPlatformHookLib/PeiPlatformHookLib.c | 298 ++ .../PeiPlatformHookLib/PeiPlatformHookLib.inf | 95 + .../PeiCpuPolicyBoardConfig.c | 49 + .../PeiCpuPolicyBoardConfigPreMem.c | 29 + .../PeiMePolicyBoardConfig.c | 36 + .../PeiMePolicyBoardConfigPreMem.c| 37 + .../PeiPchPolicyBoardConfig.c | 36 + .../PeiPchPolicyBoard
[edk2-devel] [edk2-platforms] [PATCH 4/4] WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2191 Adds the DSC and build files necessary to build the UpXtreme board instance. Key files = * build_config.cfg - Board-specific build configuration file. * OpenBoardPkg.dsc - The UpXtreme board description file. * OpenBoardPkgPcd.dsc - Used for other PCD customization. * OpenBoardPkg.fdf - The UpXtreme board flash file. * OpenBoardPkgBuildOption.dsc - Sets build options Based on PCD values. Co-authored-by: Michael Kubacki Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- Platform/Intel/Readme.md | 12 + .../UpXtreme/OpenBoardPkg.dsc | 448 +++ .../UpXtreme/OpenBoardPkg.fdf | 708 ++ .../UpXtreme/OpenBoardPkgBuildOption.dsc | 154 .../UpXtreme/OpenBoardPkgPcd.dsc | 409 ++ .../UpXtreme/build_config.cfg | 35 + Platform/Intel/build.cfg | 1 + 7 files changed, 1767 insertions(+) create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgBuildOption.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/build_config.cfg diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index 02d9517d19..81092633f7 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -59,6 +59,12 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol ### **Supported Hardware** + AAEON + +| Machine Name | Supported Chipsets | BoardPkg | Board Name | +||--|| +| UP Xtreme | Whiskey Lake | WhiskeylakeOpenBoardPkg | UpXtreme | + Intel ***Intel Reference and Validation Platform*** @@ -233,6 +239,9 @@ return back to the minimum platform caller. | || build settings, environment variables. | || | ||--WhiskeylakeOpenBoardPkg + | || |--UpXtreme + | || |---build_config.cfg: UpXtreme specific build + | || settings environment variables. | || |--WhiskeylakeURvp | || |---build_config.cfg: WhiskeylakeURvp specific build | || settings environment variables. @@ -256,6 +265,9 @@ return back to the minimum platform caller. **WhiskeylakeOpenBoardPkg** 1. This firmware project has only been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic Device. +2. UP Xtreme boards might hang during Windows 10 boot. +3. Not all UP Xtreme boards are supported at this time, only the XXX model has been tested. Board-specific memory + settings are needed to enable other models. ### **Package Builds** diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc new file mode 100644 index 00..2ab9cb03ea --- /dev/null +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc @@ -0,0 +1,448 @@ +## @file +# The main build description file for the UpXtreme board. +# +# Copyright (c) 2020, Intel Corporation. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + DEFINE PLATFORM_PACKAGE = MinPlatformPkg + DEFINE PLATFORM_SI_PACKAGE = CoffeelakeSiliconPkg + DEFINE PLATFORM_SI_BIN_PACKAGE = CoffeelakeSiliconBinPkg + DEFINE PLATFORM_FSP_BIN_PACKAGE = CoffeeLakeFspBinPkg + DEFINE PLATFORM_BOARD_PACKAGE= WhiskeylakeOpenBoardPkg + DEFINE BOARD = UpXtreme + DEFINE PROJECT = $(PLATFORM_BOARD_PACKAGE)/$(BOARD) + DEFINE PEI_ARCH = IA32 + DEFINE DXE_ARCH = X64 + DEFINE TOP_MEMORY_ADDRESS= 0x0 + + # + # Default value for OpenBoardPkg.fdf use + # + DEFINE BIOS_SIZE_OPTION = SIZE_80 + + PLATFORM_NAME = $(PLATFORM_PACKAGE) + PLATFORM_GUID = A12B2802-BF37-4886-A307-C060F7929F8F + PLATFORM_VERSION= 0.1 + DSC_SPECIFICATION = 0x00010005 + OUTPUT_DIRECTORY= Build/$(PROJECT) + SUPPORTED_A
[edk2-devel] [edk2-platforms] [PATCH v2 1/4] WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove BoardFuncInit
Removes BoardFuncInit related functionality in WhiskeylakeURvp.
Co-authored-by: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../Library/BoardInitLib/BoardFunc.c | 19
.../Library/BoardInitLib/BoardFunc.h | 20 -
.../Library/BoardInitLib/BoardFuncInit.c | 26 -
.../BoardInitLib/BoardFuncInitPreMem.c| 29 +--
.../BoardInitLib/BoardPchInitPreMemLib.c | 3 +-
.../PeiMultiBoardInitPostMemLib.inf | 4 ---
.../PeiWhiskeylakeURvpInitPostMemLib.c| 8 -
.../PeiWhiskeylakeURvpInitPreMemLib.c | 10 +--
8 files changed, 9 insertions(+), 110 deletions(-)
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
deleted file mode 100644
index 7a2fed9904..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/** @file
- Board's PCD function hook.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include
-
-EFI_STATUS
-PeiBoardSpecificInitPostMemNull (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
deleted file mode 100644
index 9e0ff8d033..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/** @file
- Header file for Board Hook function intance.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _BOARD_FUNC_H_
-#define _BOARD_FUNC_H_
-
-#include
-
-EFI_STATUS
-PeiBoardSpecificInitPostMemNull (
- VOID
- );
-
-#endif // _BOARD_FUNC_H_
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
deleted file mode 100644
index b8c69166ed..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/** @file
- Source code for the board configuration init function in Post Memory init
phase.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "BoardFunc.h"
-
-/**
- Board's PCD function hook init function for PEI post memory phase.
-
- @param[in] BoardId An unsigned integrer represent the board id.
-
- @retval EFI_SUCCESS The function completed successfully.
-**/
-EFI_STATUS
-BoardFunctionInit (
- IN UINT16 BoardId
-)
-{
-
- return EFI_SUCCESS;
-}
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
index 1944a02bf1..06ff64da8d 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
+++
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
@@ -2,39 +2,24 @@
Source code for the board configuration init function in Post Memory init
phase.
- Copyright (c) 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include
+
//
// Null function for nothing GOP VBT update.
//
VOID
-GopVbtSpecificUpdateNull(
+GopVbtSpecificUpdateNull (
IN CHILD_STRUCT **ChildStructPtr
-);
+ );
+
//
// for CFL U DDR4
//
VOID
-CflUDdr4GopVbtSpecificUpdate(
+CflUDdr4GopVbtSpecificUpdate (
IN CHILD_STRUCT **ChildStructPtr
-);
-/**
- Board's PCD function hook init function for PEI post memory phase.
-
- @param[in] BoardId An unsigned integrer represent the board id.
-
- @retval EFI_SUCCESS The function completed successfully.
-**/
-EFI_STATUS
-BoardFunctionInitPreMem (
- IN UINT16 BoardId
- )
-{
-
- return EFI_SUCCESS;
-}
-
-
+ );
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c
index 5305ec7f7c..1f778c4f7e 100644
---
a/Platfo
[edk2-devel] [edk2-platforms] [PATCH v2 0/4] Add Initial Support for UP Xtreme
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2191 This patch series add the initial Up Xtreme board support to the WhiskeylakeOpenBoardPkg V2 Changes: - Updated Readme.md to reflect the Current Status Current Status: 1. Basic boot to windows 10 (Home) and Ubuntu 18.04 from NVMe * UpXtreme: - Intel(R) Core(TM) i3-8145UE CPU @ 2.20GHz - Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz 2. UpXtreme Intel(R) Celeron(R) CPU 4305UE @ 2.00GHz hangs during memory training 3. USB mass storage devices not detected in UEFI shell Prince Agyeman (4): WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove BoardFuncInit WhiskeylakeOpenBoardPkg: Add UpXtreme board ID WhiskeylakeOpenBoardPkg/UpXtreme: Add Includes and Libraries WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files Platform/Intel/Readme.md | 19 +- .../Include/PlatformBoardId.h |5 +- .../PeiFspMiscUpdUpdateLib.c | 110 + .../PeiFspPolicyUpdateLib.c | 126 + .../PeiMiscPolicyUpdate.h | 25 + .../PeiPchPolicyUpdate.c | 300 ++ .../PeiPchPolicyUpdate.h | 28 + .../PeiPchPolicyUpdatePreMem.c| 39 + .../PeiSaPolicyUpdate.c | 158 + .../PeiSaPolicyUpdate.h | 45 + .../PeiSaPolicyUpdatePreMem.c | 124 + .../PeiSiliconPolicyUpdateLibFsp.inf | 144 + .../FspWrapperPlatformSecLib.c| 186 + .../SecFspWrapperPlatformSecLib/FsptCoreUpd.h | 40 + .../SecFspWrapperPlatformSecLib/Ia32/Fsp.h| 42 + .../Ia32/PeiCoreEntry.nasm| 130 + .../Ia32/SecEntry.nasm| 361 ++ .../Ia32/Stack.nasm | 72 + .../PlatformInit.c| 47 + .../SecFspWrapperPlatformSecLib.inf | 105 + .../SecGetPerformance.c | 89 + .../SecPlatformInformation.c | 78 + .../SecRamInitData.c | 55 + .../SecTempRamDone.c | 93 + .../UpXtreme/Include/Fdf/FlashMapInclude.fdf | 51 + .../Include/Library/PeiPlatformHookLib.h | 131 + .../UpXtreme/Include/Library/PeiPlatformLib.h | 38 + .../UpXtreme/Include/PlatformBoardConfig.h| 103 + .../UpXtreme/Include/PlatformInfo.h | 42 + .../Library/BaseFuncLib/BaseFuncLib.inf | 33 + .../UpXtreme/Library/BaseFuncLib/Gop.c| 38 + .../BaseGpioCheckConflictLib.c| 137 + .../BaseGpioCheckConflictLib.inf | 35 + .../BaseGpioCheckConflictLibNull.c| 37 + .../BaseGpioCheckConflictLibNull.inf | 32 + .../BasePlatformHookLib/BasePlatformHookLib.c | 143 + .../BasePlatformHookLib.inf | 45 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 63 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.inf| 50 + .../SmmMultiBoardAcpiSupportLib.c | 82 + .../SmmMultiBoardAcpiSupportLib.inf | 50 + .../BoardAcpiLib/SmmSiliconAcpiEnableLib.c| 170 + .../BoardAcpiLib/SmmUpXtremeAcpiEnableLib.c | 40 + .../BoardInitLib/BoardFuncInitPreMem.c| 25 + .../Library/BoardInitLib/BoardInitLib.h | 20 + .../BoardInitLib/BoardPchInitPreMemLib.c | 383 +++ .../BoardInitLib/BoardSaConfigPreMem.h| 79 + .../BoardInitLib/BoardSaInitPreMemLib.c | 298 ++ .../Library/BoardInitLib/GpioTableDefault.c | 213 ++ .../Library/BoardInitLib/GpioTableUpXtreme.c | 217 ++ .../Library/BoardInitLib/PchHdaVerbTables.h | 3014 + .../BoardInitLib/PeiBoardInitPostMemLib.c | 40 + .../BoardInitLib/PeiBoardInitPostMemLib.inf | 57 + .../BoardInitLib/PeiBoardInitPreMemLib.c | 106 + .../BoardInitLib/PeiBoardInitPreMemLib.inf| 124 + .../PeiMultiBoardInitPostMemLib.c | 41 + .../PeiMultiBoardInitPostMemLib.inf | 202 ++ .../BoardInitLib/PeiMultiBoardInitPreMemLib.c | 83 + .../PeiMultiBoardInitPreMemLib.inf| 301 ++ .../Library/BoardInitLib/PeiUpXtremeDetect.c | 192 ++ .../BoardInitLib/PeiUpXtremeInitPostMemLib.c | 416 +++ .../BoardInitLib/PeiUpXtremeInitPreMemLib.c | 619 .../BoardInitLib/UpXtremeHsioPtssTables.c | 32 + .../Library/BoardInitLib/UpXtremeInit.h | 44 + .../Library/BoardInitLib/UpXtremeSpdTable.c | 87 + .../DxePolicyBoardConfig.h| 19 + .../DxePolicyBoardConfigLib.inf | 45 + .../DxeSaPolicyBoardConfig.c | 36 + .../PeiPlatformHookLib/PeiPlatformHookLib.c | 298 ++ .../PeiPlatformHookLib/PeiPlatformHookLib.inf | 95 + .../PeiCpuPolicyBoardConfig.c | 49 + .../PeiCpuPolicyBoardConfigPreMem.c | 29 + .../PeiMePolicyBoardConfig.c | 36 + .../PeiMePolicyBoardConfigPreMem.c| 37 + .../PeiPch
[edk2-devel] [edk2-platforms] [PATCH v2 4/4] WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2191 Adds the DSC and build files necessary to build the UpXtreme board instance. Key files = * build_config.cfg - Board-specific build configuration file. * OpenBoardPkg.dsc - The UpXtreme board description file. * OpenBoardPkgPcd.dsc - Used for other PCD customization. * OpenBoardPkg.fdf - The UpXtreme board flash file. * OpenBoardPkgBuildOption.dsc - Sets build options Based on PCD values. Co-authored-by: Michael Kubacki Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- Platform/Intel/Readme.md | 19 +- .../UpXtreme/OpenBoardPkg.dsc | 448 +++ .../UpXtreme/OpenBoardPkg.fdf | 708 ++ .../UpXtreme/OpenBoardPkgBuildOption.dsc | 154 .../UpXtreme/OpenBoardPkgPcd.dsc | 409 ++ .../UpXtreme/build_config.cfg | 35 + Platform/Intel/build.cfg | 1 + 7 files changed, 1772 insertions(+), 2 deletions(-) create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgBuildOption.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/build_config.cfg diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index 02d9517d19..55cf02a8ca 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -59,6 +59,12 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol ### **Supported Hardware** + AAEON + +| Machine Name | Supported Chipsets | BoardPkg | Board Name | +||--|| +| UP Xtreme | Whiskey Lake | WhiskeylakeOpenBoardPkg | UpXtreme | + Intel ***Intel Reference and Validation Platform*** @@ -233,6 +239,9 @@ return back to the minimum platform caller. | || build settings, environment variables. | || | ||--WhiskeylakeOpenBoardPkg + | || |--UpXtreme + | || |---build_config.cfg: UpXtreme specific build + | || settings environment variables. | || |--WhiskeylakeURvp | || |---build_config.cfg: WhiskeylakeURvp specific build | || settings environment variables. @@ -254,8 +263,14 @@ return back to the minimum platform caller. 1. This firmware project has only been tested booting to Microsoft Windows 10 x64 and Ubuntu 17.10 with AHCI mode. **WhiskeylakeOpenBoardPkg** -1. This firmware project has only been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic +1. This firmware project has mainly been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic Device. +2. UP Xtreme boards might hang during Windows 10 boot. +3. Not all UP Xtreme boards are supported at this time. +* The model below boots to x64 windows 10 home edition and Ubuntu 18.04 + * Xtreme Intel(R) Core(TM) i3-8145UE CPU @ 2.20GHz with 8GB RAM + * Xtreme Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz with 16GB RAM +* Intel(R) Celeron(R) CPU 4305UE @ 2.00GHz with 4GB RAM hangs during memory initialization ### **Package Builds** @@ -293,5 +308,5 @@ If you would like to help but are not sure where to start some areas currently i * Adding board ports for more motherboards and systems * Adding Clang support -Please feel free to contact Michael Kubacki (michael.a.kubacki at intel.com) and Isaac Oram (isaac.w.oram at intel.com) +Please feel free to contact Isaac Oram (isaac.w.oram at intel.com) if you would like to discuss contribution ideas. diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc new file mode 100644 index 00..2ab9cb03ea --- /dev/null +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc @@ -0,0 +1,448 @@ +## @file +# The main build description file for the UpXtreme board. +# +# Copyright (c) 2020, Intel Corporation. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + DEFINE PLATFORM_PACKAGE = MinPlatformPkg + DEFINE PLATFORM_SI_PACKAGE
[edk2-devel] [edk2-platforms] [PATCH v2 2/4] WhiskeylakeOpenBoardPkg: Add UpXtreme board ID
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2191 Co-authored-by: Michael Kubacki Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- .../Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h b/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h index 3545b2a05c..4e8288b1f1 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h @@ -1,8 +1,8 @@ /** @file -Defines Platform BoardIds + Defines Whiskey Lake Platform Board IDs - Copyright (c) 2019, Intel Corporation. All rights reserved. + Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -21,6 +21,7 @@ Defines Platform BoardIds #define TypeTrad0x1 #define TypeUltUlx 0x2 +#define BoardIdUpXtreme 0x10 #define BoardIdWhiskeyLakeRvp 0x60 #define BoardIdUnknown1 0x -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54378): https://edk2.groups.io/g/devel/message/54378 Mute This Topic: https://groups.io/mt/71247731/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms] [PATCH 4/4] WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files
Thanks Chasel, I have updated the readme.md in my v2 patch set and the BZ with the current status Prince -Original Message- From: Chiu, Chasel Sent: Thursday, February 13, 2020 12:22 AM To: Agyeman, Prince ; devel@edk2.groups.io Cc: Desimone, Nathaniel L Subject: RE: [edk2-platforms] [PATCH 4/4] WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files Hi Prince, Please see my comments inline. Thanks, Chasel > -Original Message- > From: Agyeman, Prince > Sent: Thursday, February 13, 2020 9:38 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > Subject: [edk2-platforms] [PATCH 4/4] WhiskeylakeOpenBoardPkg/UpXtreme: > Add DSC and build files > > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2191 > > Adds the DSC and build files necessary to build the > UpXtreme board instance. > > Key files > = > * build_config.cfg - Board-specific build configuration file. > * OpenBoardPkg.dsc - The UpXtreme board description file. > * OpenBoardPkgPcd.dsc - Used for other PCD customization. > * OpenBoardPkg.fdf - The UpXtreme board flash file. > * OpenBoardPkgBuildOption.dsc - Sets build options Based > on PCD values. > > Co-authored-by: Michael Kubacki > Cc: Chasel Chiu > Cc: Nate DeSimone > Signed-off-by: Prince Agyeman > --- > Platform/Intel/Readme.md | 12 + > .../UpXtreme/OpenBoardPkg.dsc | 448 +++ > .../UpXtreme/OpenBoardPkg.fdf | 708 > ++ > .../UpXtreme/OpenBoardPkgBuildOption.dsc | 154 > .../UpXtreme/OpenBoardPkgPcd.dsc | 409 ++ > .../UpXtreme/build_config.cfg | 35 + > Platform/Intel/build.cfg | 1 + > 7 files changed, 1767 insertions(+) > create mode 100644 > Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc > create mode 100644 > Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf > create mode 100644 > Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgBuildOpt > ion.dsc > create mode 100644 > Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc > create mode 100644 > Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/build_config.cfg > > diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md > index 02d9517d19..81092633f7 100644 > --- a/Platform/Intel/Readme.md > +++ b/Platform/Intel/Readme.md > @@ -59,6 +59,12 @@ A UEFI firmware implementation using MinPlatformPkg > is constructed using the fol > > ### **Supported Hardware** > > + AAEON > + > +| Machine Name | Supported Chipsets > | BoardPkg | Board Name | > +|| > --|| > +| UP Xtreme | Whiskey Lake > | WhiskeylakeOpenBoardPkg | UpXtreme | > + > Intel > > ***Intel Reference and Validation Platform*** > @@ -233,6 +239,9 @@ return back to the minimum platform caller. >| || > build settings, environment variables. >| || >| ||--WhiskeylakeOpenBoardPkg > + | || |--UpXtreme > + | || |---build_config.cfg: > UpXtreme specific build > + | || > settings environment variables. >| || |--WhiskeylakeURvp >| || |---build_config.cfg: > WhiskeylakeURvp specific build >| || > settings environment variables. > @@ -256,6 +265,9 @@ return back to the minimum platform caller. > **WhiskeylakeOpenBoardPkg** > 1. This firmware project has only been tested booting to Microsoft Windows > 10 x64 with AHCI mode and Integrated Graphic > Device. > +2. UP Xtreme boards might hang during Windows 10 boot. > +3. Not all UP Xtreme boards are supported at this time, only the XXX model Basing on BZ, this XXX should be "SK Hynix memory", would you double check? > has been tested. Board-specific memory > + settings are needed to enable other models. > > ### **Package Builds** > > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc > new file mode 100644 > index 00..2ab9cb03ea > --- /dev/null > +++ > b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc > @@ -0,0 +1,448 @@ > +## @file > +# The main build description file for the UpX
Re: [edk2-devel] [edk2-platforms] Building a platform: which edk2 revision to choose?
Hi Felix, Can you include a log or details of the build error you're seeing ? Also what are the FSP , edk2-non-osi, edk2-platform and edk2 commit IDs you are using ? Thanks Prince Prince From: devel@edk2.groups.io On Behalf Of Felix Polyudov Sent: Thursday, February 13, 2020 3:11 PM To: devel@edk2.groups.io Cc: Kubacki, Michael A Subject: [edk2-devel] [edk2-platforms] Building a platform: which edk2 revision to choose? I'm trying to build one of the board packages from the edk2-platform repository. (I'm building WhiskeylakeOpenBoardPkg, but I suspect the problem exists for most of the board packages). The build process fails (I'm using build instructions from https://github.com/tianocore/edk2-platforms/tree/master/Platform/Intel). I suspect this is happening because tip of the board package is not compatible with tip of the edk2 repo. Is there a defined way for me to figure out the latest working revisions of the edk2 repo (or the other 2 repos that are part of the project) that I should use? Thanks Felix P Please consider the environment before printing this email The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54400): https://edk2.groups.io/g/devel/message/54400 Mute This Topic: https://groups.io/mt/71255367/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms] Building a platform: which edk2 revision to choose?
Hi Felix, Try building with VS2015. There's a known issue with VS2017 builds as documented here https://bugzilla.tianocore.org/show_bug.cgi?id=2408 Thanks Prince From: devel@edk2.groups.io On Behalf Of Felix Polyudov Sent: Friday, February 14, 2020 8:01 AM To: Agyeman, Prince ; devel@edk2.groups.io Cc: Kubacki, Michael A ; Gao, Liming Subject: Re: [edk2-devel] [edk2-platforms] Building a platform: which edk2 revision to choose? I'm using the latest version for all the repositories: ed2 : f1d78c489a399 edk2-platofrms: 41c1d9ba33046637e edk2-non-osi: c10580aea501ee FSP : e6177bb3bb57747d I'm building the project using command "build_bios.py -p WhiskeylakeURvp -t VS2017 -r" Here is the error I'm getting: PeiPolicyUpdateLib.lib(PeiSaPolicyUpdatePreMem.obj) : error LNK2001: unresolved external symbol _gEfiMemoryTypeInformationGuid From: Agyeman, Prince [mailto:prince.agye...@intel.com] Sent: Thursday, February 13, 2020 8:16 PM To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; Felix Polyudov Cc: Kubacki, Michael A Subject: RE: [edk2-platforms] Building a platform: which edk2 revision to choose? Hi Felix, Can you include a log or details of the build error you're seeing ? Also what are the FSP , edk2-non-osi, edk2-platform and edk2 commit IDs you are using ? Thanks Prince Prince From: devel@edk2.groups.io<mailto:devel@edk2.groups.io> mailto:devel@edk2.groups.io>> On Behalf Of Felix Polyudov Sent: Thursday, February 13, 2020 3:11 PM To: devel@edk2.groups.io<mailto:devel@edk2.groups.io> Cc: Kubacki, Michael A mailto:michael.a.kuba...@intel.com>> Subject: [edk2-devel] [edk2-platforms] Building a platform: which edk2 revision to choose? I'm trying to build one of the board packages from the edk2-platform repository. (I'm building WhiskeylakeOpenBoardPkg, but I suspect the problem exists for most of the board packages). The build process fails (I'm using build instructions from https://github.com/tianocore/edk2-platforms/tree/master/Platform/Intel). I suspect this is happening because tip of the board package is not compatible with tip of the edk2 repo. Is there a defined way for me to figure out the latest working revisions of the edk2 repo (or the other 2 repos that are part of the project) that I should use? Thanks Felix P Please consider the environment before printing this email The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission. P Please consider the environment before printing this email The information contained in this message may be confidential and proprietary to American Megatrends (AMI). This communication is intended to be read only by the individual or entity to whom it is addressed or by their designee. If the reader of this message is not the intended recipient, you are on notice that any distribution of this message, in any form, is strictly prohibited. Please promptly notify the sender by reply e-mail or by telephone at 770-246-8600, and then delete or destroy all copies of the transmission. -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54460): https://edk2.groups.io/g/devel/message/54460 Mute This Topic: https://groups.io/mt/71255367/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH 3/5] KabylakeOpenBoardPkg/GalagoPro3: Add BiosInfo PEIM
Added BiosInfo PEIM to publish the
Bios Info HOB. Currently this PEIM publishes
one Bios Info entry which is the microcode
region information.
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../GalagoPro3/BiosInfo/BiosInfo.c| 92 +++
.../GalagoPro3/BiosInfo/BiosInfo.inf | 48 ++
.../GalagoPro3/OpenBoardPkg.dsc | 2 +
.../GalagoPro3/OpenBoardPkg.fdf | 1 +
4 files changed, 143 insertions(+)
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.c
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.c
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.c
new file mode 100644
index 00..4db9d4685c
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.c
@@ -0,0 +1,92 @@
+/** @file
+ Driver for BIOS Info support.
+
+Copyright (c) 2019, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define INDEXPORT_TO_ADDRESS(x) (x)
+#define DATAPORT_TO_ADDRESS(x) ((x) << 16)
+#define PORTWIDTH_TO_ADDRESS(x) ((x) << 32)
+#define PORTBITNUMBER_TO_ADDRESS(x) ((x) << 40)
+#define PORTINDEXNUMBER_TO_ADDRESS(x) ((x) << 48)
+
+//
+// Internal
+//
+#pragma pack (1)
+
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[1];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+1,
+0,
+ },
+ {
+{
+ FIT_TYPE_01_MICROCODE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashMicrocodeFvSize),
+ FixedPcdGet32 (PcdFlashMicrocodeFvBase)
+}
+ }
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mBiosInfoPpiList = {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gBiosInfoGuid,
+ &mBiosInfo
+};
+
+/**
+ Installs BiosInfo Ppi.
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS Install the BiosInfo Ppi successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+BiosInfoEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ VOID*HobData;
+
+ //
+ // Install PPI, so that other PEI module can add dependency.
+ //
+ Status = PeiServicesInstallPpi (&mBiosInfoPpiList);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build hob, so that DXE module can also get the data.
+ //
+ HobData = BuildGuidHob (&gBiosInfoGuid, sizeof (mBiosInfo));
+ ASSERT (HobData != NULL);
+ if (HobData == NULL) {
+return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem (HobData, &mBiosInfo, sizeof (mBiosInfo));
+
+ return EFI_SUCCESS;
+}
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.inf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.inf
new file mode 100644
index 00..a0e18cff9c
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.inf
@@ -0,0 +1,48 @@
+### @file
+# Module Information description file for BIOS Info Driver
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+###
+
+[Defines]
+ INF_VERSION= 0x00010017
+ BASE_NAME = BiosInfo
+ FILE_GUID = 3132E669-D16B-4AA7-B09B-BC0EB5F40E1F
+ VERSION_STRING = 1.0
+ MODULE_TYPE= PEIM
+ ENTRY_POINT= BiosInfoEntryPoint
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES IA32 X64
+#
+
+[LibraryClasses]
+ PeimEntryPoint
+ PeiServicesLib
+ HobLib
+ BaseMemoryLib
+ DebugLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+ KabylakeSiliconPkg/SiPkg.dec
+ KabylakeFspBinPkg/KabylakeFspBinPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+
+[Sources]
+ BiosInfo.c
+
+[Guids]
+ gBiosInfoGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index d67e0cc000..64e25168c7 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg
[edk2-devel] [edk2-platforms] [PATCH 1/5] BoardModulePkg: Add bios info HOB
Added gBiosInfoGuid to be used to
publish BIOS information HOB which
is needed in FIT generation
Also added the Bios Info header
file BiosInfo.h
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../Intel/BoardModulePkg/BoardModulePkg.dec | 3 +
.../BoardModulePkg/Include/Library/BiosInfo.h | 62 +++
2 files changed, 65 insertions(+)
create mode 100644 Platform/Intel/BoardModulePkg/Include/Library/BiosInfo.h
diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
index 6f13945ca8..035427b2f5 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
@@ -36,3 +36,6 @@
[Guids]
## Include Include/Guid/BiosId.h
gBiosIdGuid = { 0xC3E36D09, 0x8294, 0x4b97, { 0xA8, 0x57, 0xD5, 0x28, 0x8F,
0xE3, 0x3E, 0x28 } }
+
+ ## GUID to publish BIOS information HOB
+ gBiosInfoGuid = { 0x09d0d15c, 0xe9f0, 0x4dfc, {0x9e, 0x0b, 0x39, 0x33, 0x1f,
0xca, 0x66, 0x85} }
diff --git a/Platform/Intel/BoardModulePkg/Include/Library/BiosInfo.h
b/Platform/Intel/BoardModulePkg/Include/Library/BiosInfo.h
new file mode 100644
index 00..bba1c07bff
--- /dev/null
+++ b/Platform/Intel/BoardModulePkg/Include/Library/BiosInfo.h
@@ -0,0 +1,62 @@
+/** @file
+
+ Driver for BIOS Info support.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _BIOS_INFO_H_
+#define _BIOS_INFO_H_
+
+//
+// BIOS INFO data structure
+// This is self contained data structure for BIOS info for TXT
+//
+#pragma pack (1)
+#define BIOS_INFO_SIGNATURE SIGNATURE_64 ('$', 'B', 'I', 'O', 'S', 'I', 'F',
'$')
+typedef struct {
+ UINT64Signature;
+ UINT32EntryCount;
+ UINT32Reserved;
+//BIOS_INFO_STRUCT Struct[EntryCount];
+} BIOS_INFO_HEADER;
+
+//
+// BIOS_INFO_STRUCT attributes
+// bits[0:3] means general attributes
+// bits[4:7] means type specific attributes
+//
+#define BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT 0x01
+#define BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION0x10
+#define BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB 0x10
+#define BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_NON_IBB 0x20
+
+typedef struct {
+ //
+ // FitTable entry type
+ //
+ UINT8Type;
+ //
+ // BIOS_INFO_STRUCT attributes
+ //
+ UINT8Attributes;
+ //
+ // FitTable entry version
+ //
+ UINT16 Version;
+ //
+ // FitTable entry real size
+ //
+ UINT32 Size;
+ //
+ // FitTable entry address
+ //
+ UINT64 Address;
+} BIOS_INFO_STRUCT;
+
+extern EFI_GUID gBiosInfoGuid;
+
+#pragma pack ()
+
+#endif
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [PATCH 0/5] Add FIT support using FitGen
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2210 REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2211 This series of patches 1. Add the generation of the FitGen tool to build_bios.py 2. Add Firmware Interface Table (FIT) to the final images of: a. KabylakeOpenBoardPkg/KabylakeRvp3 b. KabylakeOpenBoardPkg/GalagoPro3 c. WhiskeylakeOpenBoardPkg/WhiskeylakeURvp What each patch does: 0001-BoardModulePkg-Add-bios-info-HOB: Adds the gBiosInfoGuid and the Bios Info struct for the Bios info HOB 0002-KabylakeOpenBoardPkg-KabylakeRvp3-Add-BIOS-Info-PEIM, 0003-KabylakeOpenBoardPkg-GalagoPro3-Add-BiosInfo-PEIM, 0004-WhiskeylakeOpenBoardPkg-Add-BIOS-INFO-PEIM: Patches 0002,0003,0004 add bios info PEIM to KabylakeRvp3, GalagoPro3 and WhiskeylakeURvp boards respectively 0005-Platform-Intel-Add-FIT-generation-tool Adds the FitGen tool binary and FIT generation to the BIOS build process. Prince Agyeman (5): BoardModulePkg: Add bios info HOB KabylakeOpenBoardPkg/KabylakeRvp3: Add BIOS Info PEIM KabylakeOpenBoardPkg/GalagoPro3: Add BiosInfo PEIM WhiskeylakeOpenBoardPkg: Add BIOS INFO PEIM Platform/Intel: Add FIT generation tool .../Intel/BoardModulePkg/BoardModulePkg.dec | 3 + .../BoardModulePkg/Include/Library/BiosInfo.h | 62 + .../GalagoPro3/BiosInfo/BiosInfo.c| 92 ++ .../GalagoPro3/BiosInfo/BiosInfo.inf | 48 ++ .../GalagoPro3/OpenBoardPkg.dsc | 2 + .../GalagoPro3/OpenBoardPkg.fdf | 1 + .../GalagoPro3/build_config.cfg | 1 + .../KabylakeRvp3/BiosInfo/BiosInfo.c | 93 +++ .../KabylakeRvp3/BiosInfo/BiosInfo.inf| 48 ++ .../KabylakeRvp3/OpenBoardPkg.dsc | 2 + .../KabylakeRvp3/OpenBoardPkg.fdf | 1 + .../KabylakeRvp3/build_config.cfg | 1 + .../WhiskeylakeURvp/BiosInfo/BiosInfo.c | 93 +++ .../WhiskeylakeURvp/BiosInfo/BiosInfo.inf | 48 ++ .../WhiskeylakeURvp/OpenBoardPkg.dsc | 2 + .../WhiskeylakeURvp/OpenBoardPkg.fdf | 1 + .../WhiskeylakeURvp/build_config.cfg | 1 + Platform/Intel/build.cfg | 1 + Platform/Intel/build_bios.py | 57 19 files changed, 557 insertions(+) create mode 100644 Platform/Intel/BoardModulePkg/Include/Library/BiosInfo.h create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.c create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/BiosInfo/BiosInfo.inf create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.c create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.inf -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#48454): https://edk2.groups.io/g/devel/message/48454 Mute This Topic: https://groups.io/mt/34386696/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH 4/5] WhiskeylakeOpenBoardPkg: Add BIOS INFO PEIM
Added BIOS info PEIM to publish Bios Info
HOB. This PEIM currently publishes the microcode
FV info.
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../WhiskeylakeURvp/BiosInfo/BiosInfo.c | 93 +++
.../WhiskeylakeURvp/BiosInfo/BiosInfo.inf | 48 ++
.../WhiskeylakeURvp/OpenBoardPkg.dsc | 2 +
.../WhiskeylakeURvp/OpenBoardPkg.fdf | 1 +
4 files changed, 144 insertions(+)
create mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.c
create mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.inf
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.c
new file mode 100644
index 00..6a058a0fc2
--- /dev/null
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.c
@@ -0,0 +1,93 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define INDEXPORT_TO_ADDRESS(x) (x)
+#define DATAPORT_TO_ADDRESS(x) ((x) << 16)
+#define PORTWIDTH_TO_ADDRESS(x) ((x) << 32)
+#define PORTBITNUMBER_TO_ADDRESS(x) ((x) << 40)
+#define PORTINDEXNUMBER_TO_ADDRESS(x) ((x) << 48)
+
+//
+// Internal
+//
+#pragma pack (1)
+
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[1];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+1,
+0,
+ },
+ {
+{
+ FIT_TYPE_01_MICROCODE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashMicrocodeFvSize),
+ FixedPcdGet32 (PcdFlashMicrocodeFvBase)
+}
+ }
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mBiosInfoPpiList = {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gBiosInfoGuid,
+ &mBiosInfo
+};
+
+/**
+ Installs BiosInfo Ppi.
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS Install the BiosInfo Ppi successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+BiosInfoEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ VOID*HobData;
+
+ //
+ // Install PPI, so that other PEI module can add dependency.
+ //
+ Status = PeiServicesInstallPpi (&mBiosInfoPpiList);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build hob, so that DXE module can also get the data.
+ //
+ HobData = BuildGuidHob (&gBiosInfoGuid, sizeof (mBiosInfo));
+ ASSERT (HobData != NULL);
+ if (HobData == NULL) {
+return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem (HobData, &mBiosInfo, sizeof (mBiosInfo));
+
+ return EFI_SUCCESS;
+}
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.inf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.inf
new file mode 100644
index 00..f268de00f5
--- /dev/null
+++
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/BiosInfo/BiosInfo.inf
@@ -0,0 +1,48 @@
+### @file
+# Module Information description file for BIOS Info Driver
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+###
+
+[Defines]
+ INF_VERSION= 0x00010017
+ BASE_NAME = BiosInfo
+ FILE_GUID = A842B2D2-5C88-44E9-A9E2-4830F26662B7
+ VERSION_STRING = 1.0
+ MODULE_TYPE= PEIM
+ ENTRY_POINT= BiosInfoEntryPoint
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES IA32 X64
+#
+
+[LibraryClasses]
+ PeimEntryPoint
+ PeiServicesLib
+ HobLib
+ BaseMemoryLib
+ DebugLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+ CoffeelakeSiliconPkg/SiPkg.dec
+ CoffeeLakeFspBinPkg/CoffeeLakeFspBinPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+
+[Sources]
+ BiosInfo.c
+
+[Guids]
+ gBiosInfoGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index eea809140c..00a89f4507 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b
[edk2-devel] [edk2-platforms] [PATCH 2/5] KabylakeOpenBoardPkg/KabylakeRvp3: Add BIOS Info PEIM
Added BIOS Info PEIM to KabylakeRvp3 to publish
the BIOS info HOB. This PEIM currently publishs
the board's microcode region info.
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../KabylakeRvp3/BiosInfo/BiosInfo.c | 93 +++
.../KabylakeRvp3/BiosInfo/BiosInfo.inf| 48 ++
.../KabylakeRvp3/OpenBoardPkg.dsc | 2 +
.../KabylakeRvp3/OpenBoardPkg.fdf | 1 +
4 files changed, 144 insertions(+)
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.c
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.inf
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.c
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.c
new file mode 100644
index 00..6a058a0fc2
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.c
@@ -0,0 +1,93 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define INDEXPORT_TO_ADDRESS(x) (x)
+#define DATAPORT_TO_ADDRESS(x) ((x) << 16)
+#define PORTWIDTH_TO_ADDRESS(x) ((x) << 32)
+#define PORTBITNUMBER_TO_ADDRESS(x) ((x) << 40)
+#define PORTINDEXNUMBER_TO_ADDRESS(x) ((x) << 48)
+
+//
+// Internal
+//
+#pragma pack (1)
+
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[1];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+1,
+0,
+ },
+ {
+{
+ FIT_TYPE_01_MICROCODE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashMicrocodeFvSize),
+ FixedPcdGet32 (PcdFlashMicrocodeFvBase)
+}
+ }
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mBiosInfoPpiList = {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gBiosInfoGuid,
+ &mBiosInfo
+};
+
+/**
+ Installs BiosInfo Ppi.
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS Install the BiosInfo Ppi successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+BiosInfoEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ VOID*HobData;
+
+ //
+ // Install PPI, so that other PEI module can add dependency.
+ //
+ Status = PeiServicesInstallPpi (&mBiosInfoPpiList);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build hob, so that DXE module can also get the data.
+ //
+ HobData = BuildGuidHob (&gBiosInfoGuid, sizeof (mBiosInfo));
+ ASSERT (HobData != NULL);
+ if (HobData == NULL) {
+return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem (HobData, &mBiosInfo, sizeof (mBiosInfo));
+
+ return EFI_SUCCESS;
+}
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.inf
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.inf
new file mode 100644
index 00..94543408b1
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/BiosInfo/BiosInfo.inf
@@ -0,0 +1,48 @@
+### @file
+# Module Information description file for BIOS Info Driver
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+###
+
+[Defines]
+ INF_VERSION= 0x00010017
+ BASE_NAME = BiosInfo
+ FILE_GUID = C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929
+ VERSION_STRING = 1.0
+ MODULE_TYPE= PEIM
+ ENTRY_POINT= BiosInfoEntryPoint
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES IA32 X64
+#
+
+[LibraryClasses]
+ PeimEntryPoint
+ PeiServicesLib
+ HobLib
+ BaseMemoryLib
+ DebugLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+ KabylakeSiliconPkg/SiPkg.dec
+ KabylakeFspBinPkg/KabylakeFspBinPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+
+[Sources]
+ BiosInfo.c
+
+[Guids]
+ gBiosInfoGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
index 7090852192..ef69a19aa4 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Kabyla
[edk2-devel] [edk2-platforms] [PATCH 5/5] Platform/Intel: Add FIT generation tool
Added fit generation tool to the build
process.
What was done:
Added BIOS_INFO_GUID to the build.cfg
Added BIOS_INFO_GUID to GalagoPro3,
KabylakeRvp3 and WhiskeylakeURvp build_config.cfg
This allows the boards to specify the GUID
associated with the its Bios Info PEIM
BIOS_INFO_GUID is passed as an argument to
FitGen in the FIT table generation process
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Michael Kubacki
Signed-off-by: Prince Agyeman
---
.../GalagoPro3/build_config.cfg | 1 +
.../KabylakeRvp3/build_config.cfg | 1 +
.../WhiskeylakeURvp/build_config.cfg | 1 +
Platform/Intel/build.cfg | 1 +
Platform/Intel/build_bios.py | 57 +++
5 files changed, 61 insertions(+)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
index 8c6c51abb4..3f64239a29 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
@@ -31,3 +31,4 @@ FSP_PKG_NAME = KabylakeFspPkg
FSP_BINARY_BUILD = FALSE
FSP_TEST_RELEASE = FALSE
SECURE_BOOT_ENABLE = FALSE
+BIOS_INFO_GUID = 3132E669-D16B-4AA7-B09B-BC0EB5F40E1F
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
index 78f808bfaf..f6ae4b342a 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
@@ -33,3 +33,4 @@ FSP_PKG_NAME = AmberLakeFspPkg
FSP_BINARY_BUILD = FALSE
FSP_TEST_RELEASE = FALSE
SECURE_BOOT_ENABLE = FALSE
+BIOS_INFO_GUID = C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
index 1b0619bc1c..1dfe5ffd10 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
@@ -31,3 +31,4 @@ FSP_PKG_NAME = CoffeelakeSiliconPkg
FSP_BINARY_BUILD = FALSE
FSP_TEST_RELEASE = FALSE
SECURE_BOOT_ENABLE = FALSE
+BIOS_INFO_GUID = A842B2D2-5C88-44E9-A9E2-4830F26662B7
diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg
index 2040774d1b..6aee96694c 100644
--- a/Platform/Intel/build.cfg
+++ b/Platform/Intel/build.cfg
@@ -48,6 +48,7 @@ SECURE_BOOT_ENABLE = FALSE
REBUILD_MODE =
BUILD_ROM_ONLY =
NUMBER_OF_PROCESSORS = 0
+BIOS_INFO_GUID =
[PLATFORMS]
diff --git a/Platform/Intel/build_bios.py b/Platform/Intel/build_bios.py
index 46285df19a..ea098de705 100644
--- a/Platform/Intel/build_bios.py
+++ b/Platform/Intel/build_bios.py
@@ -196,6 +196,31 @@ def pre_build(build_config, build_type="DEBUG",
silent=False, toolchain=None):
if return_code != 0:
build_failed(config)
+#
+# build platform silicon tools
+#
+# save the current workspace
+saved_work_directory = config["WORKSPACE"]
+# change the workspace to silicon tools directory
+config["WORKSPACE"] = os.path.join(config["WORKSPACE_SILICON"], "Tools")
+
+command = ["nmake"]
+if os.name == "posix": # linux
+command = ["make"]
+# add path to generated FitGen binary to
+# environment path variable
+config["PATH"] += os.pathsep + \
+ os.path.join(config["BASE_TOOLS_PATH"],
+ "Source", "C", "bin")
+
+# build the silicon tools
+_, _, result, return_code = execute_script(command, config, shell=shell)
+if return_code != 0:
+build_failed(config)
+
+# restore WORKSPACE environment variable
+config["WORKSPACE"] = saved_work_directory
+
config["SILENT_MODE"] = 'TRUE' if silent else 'FALSE'
print("==")
@@ -404,6 +429,35 @@ def post_build(config):
:returns: nothing
"""
print("Running post_build to complete the build process.")
+board_fd = config["BOARD"].upper()
+final_fd = os.path.join(config["BUILD_DIR_PATH"], "FV",
+"{}.fd".format(board_fd))
+
+if config["BIOS_INFO_GUID"]:
+# Generate the fit table
+print("Generating FIT ...")
+if os.path.isfile(final_fd):
+temp_fd = os.path.join(config["BUILD_DIR_PATH"], "FV",
+ "{}_.fd".format(board_fd))
+shell = True
+command = ["FitGen", "-D",
+ final_fd, temp_fd, "-NA",
+ "-I", config["BIOS_INFO_GUID"]]
+
+if os.name == "posix": # linux
+shell = False
+
+_, _, result, return_code = execute_script(command, config,
shell=shell)
+if return_code != 0:
+print("Error while generating fit")
+else:
+
Re: [edk2-devel] [edk2-platforms][PATCH V1 14/17] SimicsOpenBoardPkg/BoardX58Ich10: Relocate DSC includes
Reviewed-by: Prince Agyeman
-Original Message-
From: Kubacki, Michael A
Sent: Monday, October 7, 2019 10:17 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince ; Wei, David Y
Subject: [edk2-platforms][PATCH V1 14/17] SimicsOpenBoardPkg/BoardX58Ich10:
Relocate DSC includes
This change moves the following DSC file includes to the top of the
OpenBoardPkg.dsc file. This is to improve visibility and align placement of the
include with other board DSC files.
* OpenBoardPkgConfig.dsc
* OpenBoardPkgPcd.dsc
* CorePeiLib.dsc
* CoreDxeLib.dsc
Cc: Agyeman Prince
Cc: Wei David Y
Signed-off-by: Michael Kubacki
---
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 21
+++-
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 59e13154a7..be29737c16 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -39,7 +39,11 @@
DEFINE NETWORK_TLS_ENABLE = FALSE
DEFINE NETWORK_ISCSI_ENABLE = FALSE
DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE
+
+ !include $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkgConfig.dsc
+ !include $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkgPcd.dsc
!include NetworkPkg/NetworkDefines.dsc.inc
+
#
# SKU Identification section - list of all SKU IDs supported by this Platform.
@@ -54,12 +58,9 @@
#
-[PcdsFeatureFlag]
- #
- # Platform On/Off features are defined here
- #
- !include $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkgConfig.dsc
!include MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc
+ !include MinPlatformPkg/Include/Dsc/CorePeiLib.dsc
+ !include MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc
!include $(PCH_PKG)/IchCommonLib.dsc
[LibraryClasses]
@@ -76,17 +77,13 @@
SiliconPolicyInitLib|$(BOARD_PKG)/Policy/Library/SiliconPolicyInitLib/SiliconPolicyInitLib.inf
SiliconPolicyUpdateLib|$(BOARD_PKG)/Policy/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.inf
PciSegmentInfoLib|MinPlatformPkg/Pci/Library/PciSegmentInfoLibSimple/PciSegmentInfoLibSimple.inf
-
- !include MinPlatformPkg/Include/Dsc/CorePeiLib.dsc
-
S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf
AslUpdateLib|MinPlatformPkg/Acpi/Library/DxeAslUpdateLib/DxeAslUpdateLib.inf
LogoLib|$(BOARD_PKG)/Library/DxeLogoLib/DxeLogoLib.inf
+
[LibraryClasses.common.SEC]
ExtractGuidedSectionLib|MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf
-[LibraryClasses.common.PEI_CORE]
-
[LibraryClasses.common.PEIM]
PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf
MpInitLib|UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -97,16 +94,12 @@
!endif
TestPointLib|MinPlatformPkg/Test/Library/TestPointLib/PeiTestPointLib.inf
- !include MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc
-
[LibraryClasses.common.DXE_DRIVER]
PlatformBootManagerLib|$(BOARD_PKG)/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
[LibraryClasses.common.DXE_SMM_DRIVER]
SpiFlashCommonLib|$(PCH_PKG)/Library/SmmSpiFlashCommonLib/SmmSpiFlashCommonLib.inf
- !include $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkgPcd.dsc
-
[Components.IA32]
$(BOARD_PKG)/SecCore/SecMain.inf {
--
2.16.2.windows.1
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Re: [edk2-devel] [edk2-platforms][PATCH V1 15/17] SimicsOpenBoardPkg/BoardX58Ich10: Remove OpenBoardPkgConfig.dsc
Reviewed-by: Prince Agyeman -Original Message- From: Kubacki, Michael A Sent: Monday, October 7, 2019 10:17 PM To: devel@edk2.groups.io Cc: Agyeman, Prince ; Wei, David Y Subject: [edk2-platforms][PATCH V1 15/17] SimicsOpenBoardPkg/BoardX58Ich10: Remove OpenBoardPkgConfig.dsc REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2244 The location for PCD configuration is currently inconsistent in SimicsOpenBoardPkg. A large set of FeaturePCD definitions are in OpenBoardPkgConfig.dsc while other PCD definitions (including FeaturePCD) are located in OpenBoardPkgPcd.dsc. This change consolidates PCD configuration for the BoardX58Ich10 board to OpenBoardPkgPcd.dsc and removes OpenBoardPkgConfig.dsc. Cc: Agyeman Prince Cc: Wei David Y Signed-off-by: Michael Kubacki --- Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 1 - Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgConfig.dsc | 56 Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc| 43 +++ 3 files changed, 43 insertions(+), 57 deletions(-) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc index be29737c16..40f864ae17 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc @@ -40,7 +40,6 @@ DEFINE NETWORK_ISCSI_ENABLE = FALSE DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE - !include $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkgConfig.dsc !include $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkgPcd.dsc !include NetworkPkg/NetworkDefines.dsc.inc diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgConfig.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgConfig.dsc deleted file mode 100644 index 75de60e5bc..00 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgConfig.dsc +++ /dev/null @@ -1,56 +0,0 @@ -## @file -# -# Copyright (c) 2019 Intel Corporation. All rights reserved. -# -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -# -# TRUE is ENABLE. FALSE is DISABLE. -# - -[PcdsFixedAtBuild] - gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4 - -[PcdsFeatureFlag] - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 1 - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE -!endif - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 2 - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|TRUE -!endif - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 3 - gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|TRUE -!endif - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 4 - gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE -!endif - -!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 5 - gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|TRUE - gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|TRUE -!endif - - !if $(TARGET) == DEBUG -gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|TRUE - !else -gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE - !endif - - gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable|FALSE - - gAdvancedFeaturePkgTokenSpaceGuid.PcdNetworkEnable|TRUE - gAdvancedFeaturePkgTokenSpaceGuid.PcdSmbiosEnable|TRUE - diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc index 3bf10ee524..ad5e0c5a38 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.ds +++ c @@ -11,7 +11,50 @@ # Pcd Section - list of all EDK II PCD Entries defined by this Platform # +[PcdsFixedAtBuild] + gMinPlatformPkgTokenSpaceGuid.PcdBootStage|4 + [PcdsFeatureFlag.common] + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable|FALSE + +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 1 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|TRUE +!endif + +!if gMinPlatformPkgTokenSpaceGuid.PcdBootStage >= 2 + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit|FALSE + gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemIni
Re: [edk2-devel] [edk2-platforms][PATCH V1 16/17] SimicsOpenBoardPkg/BoardX58Ich10: DSC cleanup
Reviewed-by: Prince Agyeman -Original Message- From: Kubacki, Michael A Sent: Monday, October 7, 2019 10:17 PM To: devel@edk2.groups.io Cc: Agyeman, Prince ; Wei, David Y Subject: [edk2-platforms][PATCH V1 16/17] SimicsOpenBoardPkg/BoardX58Ich10: DSC cleanup REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2244 This change refactors OpenBoardPkg.dsc and OpenBoardPkgPcd.dsc to consolidate redundant sections and better group file content to improve maintainability and readability. The same pattern made in this change for BoardX58Ich10 is being applied to all existing board packages in Platform/Intel to improve overall consistency. Cc: Agyeman Prince Cc: Wei David Y Signed-off-by: Michael Kubacki --- Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc| 282 +++-- Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc | 418 +--- 2 files changed, 361 insertions(+), 339 deletions(-) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc index 40f864ae17..4f8ab4170d 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc @@ -1,6 +1,7 @@ ## @file +# The main build description file for the X58Ich10 board. # -# Copyright (c) 2019 Intel Corporation. All rights reserved. +# Copyright (c) 2019, Intel Corporation. All rights reserved. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -33,7 +34,7 @@ DEFINE SMM_REQUIRE = TRUE # - #PLATFORMX64_ENABLE is set to TRUE when PEI is IA32 and DXE is X64 platform + # PLATFORMX64_ENABLE is set to TRUE when PEI is IA32 and DXE is X64 + platform # DEFINE PLATFORMX64_ENABLE = TRUE DEFINE NETWORK_TLS_ENABLE = FALSE @@ -45,7 +46,7 @@ # -# SKU Identification section - list of all SKU IDs supported by this Platform. +# SKU Identification section - list of all SKU IDs supported by this board. # [SkuIds] @@ -53,173 +54,232 @@ # -# Library Class section - list of all Library Classes needed by this Platform. +# Includes section - other DSC file contents included for this board build. # - !include MinPlatformPkg/Include/Dsc/CoreCommonLib.dsc - !include MinPlatformPkg/Include/Dsc/CorePeiLib.dsc - !include MinPlatformPkg/Include/Dsc/CoreDxeLib.dsc - !include $(PCH_PKG)/IchCommonLib.dsc +### +# Library Includes +### +!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreCommonLib.dsc +!include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiLib.dsc +!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeLib.dsc +!include $(PCH_PKG)/IchCommonLib.dsc + +### +# Component Includes +### +[Components.IA32] +!include $(PLATFORM_PACKAGE)/Include/Dsc/CorePeiInclude.dsc +!include $(SKT_PKG)/SktPkgPei.dsc + +[Components.X64] +!include $(PLATFORM_PACKAGE)/Include/Dsc/CoreDxeInclude.dsc +!include AdvancedFeaturePkg/Include/Dsc/CoreAdvancedDxeInclude.dsc + +### +# Build Option Includes +### +!include $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkgBuildOption.dsc + +### +# +# +# Library Class section - list of all Library Classes needed by this board. +# +### +# [LibraryClasses] - ReportFvLib|$(BOARD_PKG)/Library/PeiReportFvLib/PeiReportFvLib.inf + ### + # Edk2 Packages + ### BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf + + CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull + /CpuExceptionHandlerLibNull.inf + S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScr + iptLib.inf SerialPortLib|PcAtChipsetPkg/Library/SerialIoLib/SerialIoLib.inf + + # + # Platform Package + # + + AslUpdateLib|$(PLATFORM_PACKAGE)/Acpi/Library/DxeAslUpdateLib/DxeAslUp + dateLib.inf + BoardInitLib|$(PLATFORM_PACKAGE)/PlatformInit/Library/BoardInitLibNull + /BoardInitLibNull.inf + PciSegmentInfoLib|$(PLATFORM_PACKAGE)/Pci/Library/PciSegmentInfoLibSim + ple/PciSegmentInfoLibSimple.inf + TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLibNu + ll/TestPointCheckLibNull.inf
Re: [edk2-devel] [edk2-platforms][PATCH V1 17/17] SimicsOpenBoardPkg: Assign unique token namespace
Reviewed-by: Prince Agyeman
-Original Message-
From: Kubacki, Michael A
Sent: Monday, October 7, 2019 10:17 PM
To: devel@edk2.groups.io
Cc: Agyeman, Prince ; Wei, David Y
Subject: [edk2-platforms][PATCH V1 17/17] SimicsOpenBoardPkg: Assign unique
token namespace
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2249
PCDs declared in the SimicsOpenBoardPkg currently use the GUID
gBoardModuleTokenSpaceGuid. The same name is used in other board packages and a
package has been added called BoardModulePkg so this name is now misleading.
This change assigns a unique GUID value and a name specific to the package to
provide differentiation from PCDs in other board packages.
Cc: Agyeman Prince
Cc: Wei David Y
Signed-off-by: Michael Kubacki
---
Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
| 72 ++--
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
| 14 ++--
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
| 12 ++--
Platform/Intel/SimicsOpenBoardPkg/Library/PciHostBridgeLib/PciHostBridgeLib.inf
| 14 ++--
Platform/Intel/SimicsOpenBoardPkg/Library/PeiReportFvLib/PeiReportFvLib.inf
| 10 +--
Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
| 10 +--
Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.inf
| 18 ++---
Platform/Intel/SimicsOpenBoardPkg/SimicsPei/SimicsPei.inf
| 36 +-
Platform/Intel/SimicsOpenBoardPkg/SimicsVideoDxe/SimicsVideoDxe.inf
| 2 +-
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/DecomprScratchEnd.fdf.inc
| 6 +-
Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf.inc
| 16 ++---
11 files changed, 105 insertions(+), 105 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
index 40487820fa..421c464023 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/SimicsOpenBoardPkg/OpenBoardPkg.dec
@@ -17,57 +17,57 @@
Include
[Guids]
- gBoardModuleTokenSpaceGuid = {0xeed35f57, 0x4ff2, 0x4244, {0xb8, 0x3a,
0xea, 0x71, 0x5f, 0xd3, 0x59, 0xa5}}
+ gSimicsOpenBoardPkgTokenSpaceGuid = {0x75fd61da, 0x3931, 0x49aa,
+ {0x8f, 0x11, 0x18, 0x25, 0xf6, 0x31, 0x21, 0xd2}}
gSimicsBoardConfigGuid = {0xeed35f57, 0x4ff2, 0x4244, {0xb8, 0x3a, 0xea,
0x71, 0x5f, 0xd3, 0x59, 0xa5}}
[PcdsFixedAtBuild]
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvBase|0x0|UINT32|0
- gBoardModuleTokenSpaceGuid.PcdSimicsPeiMemFvSize|0x0|UINT32|1
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvBase|0x0|UINT32|0x15
- gBoardModuleTokenSpaceGuid.PcdSimicsDxeMemFvSize|0x0|UINT32|0x16
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvBase|0x0|UINT32|0
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsPeiMemFvSize|0x0|UINT32|1
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvBase|0x0|UINT32|0x1
+ 5
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsDxeMemFvSize|0x0|UINT32|0x1
+ 6
#TODO: Remove these two when we integrate new PlatformPei
- gBoardModuleTokenSpaceGuid.PcdSimicsMemFvBase|0x0080|UINT32|2
- gBoardModuleTokenSpaceGuid.PcdSimicsMemFvSize|0x0050|UINT32|3
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsMemFvBase|0x0080|UINT32
+ |2
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsMemFvSize|0x0050|UINT32
+ |3
- gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogBase|0x0|UINT32|0x8
- gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogSize|0x0|UINT32|0x9
- gBoardModuleTokenSpaceGuid.PcdSimicsFirmwareFdSize|0x0|UINT32|0xa
- gBoardModuleTokenSpaceGuid.PcdSimicsFirmwareBlockSize|0|UINT32|0xb
- gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageVariableBase|0x0|UINT32|0xc
- gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageFtwSpareBase|0x0|UINT32|0xd
-
gBoardModuleTokenSpaceGuid.PcdSimicsFlashNvStorageFtwWorkingBase|0x0|UINT32|0xe
- gBoardModuleTokenSpaceGuid.PcdSimicsFdBaseAddress|0x0|UINT32|0xf
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPageTablesBase|0x0|UINT32|0x11
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPageTablesSize|0x0|UINT32|0x12
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamBase|0x0|UINT32|0x13
- gBoardModuleTokenSpaceGuid.PcdSimicsSecPeiTempRamSize|0x0|UINT32|0x14
- gBoardModuleTokenSpaceGuid.PcdSimicsLockBoxStorageBase|0x0|UINT32|0x18
- gBoardModuleTokenSpaceGuid.PcdSimicsLockBoxStorageSize|0x0|UINT32|0x19
- gBoardModuleTokenSpaceGuid.PcdGuidedExtractHandlerTableSize|0x0|UINT32|0x1a
- gBoardModuleTokenSpaceGuid.PcdSimicsDecompressionScratchEnd|0x0|UINT32|0x1f
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogBase|
+ 0x0|UINT32|0x8
+
+ gSimicsOpenBoardPkgTokenSpaceGuid.PcdSimicsFlashNvStorageEventLogSize|
+ 0x0|UINT32|0x9
[edk2-devel] [edk2-platforms] [PATCH v2 2/4] KabylakeOpenBoardPkg: Add BIOS Info PEIM
Added BIOS Info PEIM to KabylakeRvp3 and GalagoPro3
to publish the BIOS info HOB. This PEIM currently publishes
the board's microcode region information.
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c | 93 +++
.../BiosInfo/BiosInfo.inf | 48 ++
.../GalagoPro3/OpenBoardPkg.dsc | 3 +
.../GalagoPro3/OpenBoardPkg.fdf | 1 +
.../KabylakeRvp3/OpenBoardPkg.dsc | 2 +
.../KabylakeRvp3/OpenBoardPkg.fdf | 1 +
6 files changed, 148 insertions(+)
create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c
create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c
b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..578e66149e
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,93 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define INDEXPORT_TO_ADDRESS(x) (x)
+#define DATAPORT_TO_ADDRESS(x) ((x) << 16)
+#define PORTWIDTH_TO_ADDRESS(x) ((x) << 32)
+#define PORTBITNUMBER_TO_ADDRESS(x) ((x) << 40)
+#define PORTINDEXNUMBER_TO_ADDRESS(x) ((x) << 48)
+
+//
+// Internal
+//
+#pragma pack (1)
+
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[1];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+1,
+0,
+ },
+ {
+{
+ FIT_TYPE_01_MICROCODE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashMicrocodeFvSize),
+ FixedPcdGet32 (PcdFlashMicrocodeFvBase)
+}
+ }
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mBiosInfoPpiList = {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gBiosInfoGuid,
+ &mBiosInfo
+};
+
+/**
+ Installs BiosInfo Ppi and builds BiosInfo HOB .
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS Install the BiosInfo Ppi and HOB successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+BiosInfoEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ VOID*HobData;
+
+ //
+ // Install PPI, so that other PEI module can add dependency.
+ //
+ Status = PeiServicesInstallPpi (&mBiosInfoPpiList);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build hob, so that DXE module can also get the data.
+ //
+ HobData = BuildGuidHob (&gBiosInfoGuid, sizeof (mBiosInfo));
+ ASSERT (HobData != NULL);
+ if (HobData == NULL) {
+return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem (HobData, &mBiosInfo, sizeof (mBiosInfo));
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
new file mode 100644
index 00..94543408b1
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -0,0 +1,48 @@
+### @file
+# Module Information description file for BIOS Info Driver
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+###
+
+[Defines]
+ INF_VERSION= 0x00010017
+ BASE_NAME = BiosInfo
+ FILE_GUID = C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929
+ VERSION_STRING = 1.0
+ MODULE_TYPE= PEIM
+ ENTRY_POINT= BiosInfoEntryPoint
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES IA32 X64
+#
+
+[LibraryClasses]
+ PeimEntryPoint
+ PeiServicesLib
+ HobLib
+ BaseMemoryLib
+ DebugLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+ KabylakeSiliconPkg/SiPkg.dec
+ KabylakeFspBinPkg/KabylakeFspBinPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+
+[Sources]
+ BiosInfo.c
+
+[Guids]
+ gBiosInfoGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index b6f9807e7e..665597f79e 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.ds
[edk2-devel] [edk2-platforms] [PATCH v2 4/4] Platform/Intel: Add FIT generation tool
Added FitGen tool build and FIT generation
to the BIOS build process.
What was done:
- Build the FIT generation tool
- Added default/empty BIOS_INFO_GUID to the build.cfg
- Added BIOS_INFO_GUID to GalagoPro3,KabylakeRvp3
and WhiskeylakeURvp's build_config.cfg
This allows a board to specify the GUID
associated with the BIOS Info PEIM to be used
in the board's FIT generation.
BIOS_INFO_GUID is passed as an argument to
FitGen tool which allow the tool to locate
the BIOS Info module to be used in FIT generation.
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Michael Kubacki
Signed-off-by: Prince Agyeman
---
.../GalagoPro3/build_config.cfg | 1 +
.../KabylakeRvp3/build_config.cfg | 1 +
.../WhiskeylakeURvp/build_config.cfg | 1 +
Platform/Intel/build.cfg | 1 +
Platform/Intel/build_bios.py | 57 +++
5 files changed, 61 insertions(+)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
index 8c6c51abb4..458fe3d35d 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
@@ -31,3 +31,4 @@ FSP_PKG_NAME = KabylakeFspPkg
FSP_BINARY_BUILD = FALSE
FSP_TEST_RELEASE = FALSE
SECURE_BOOT_ENABLE = FALSE
+BIOS_INFO_GUID = C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
index 78f808bfaf..f6ae4b342a 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
@@ -33,3 +33,4 @@ FSP_PKG_NAME = AmberLakeFspPkg
FSP_BINARY_BUILD = FALSE
FSP_TEST_RELEASE = FALSE
SECURE_BOOT_ENABLE = FALSE
+BIOS_INFO_GUID = C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
index 1b0619bc1c..1dfe5ffd10 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
@@ -31,3 +31,4 @@ FSP_PKG_NAME = CoffeelakeSiliconPkg
FSP_BINARY_BUILD = FALSE
FSP_TEST_RELEASE = FALSE
SECURE_BOOT_ENABLE = FALSE
+BIOS_INFO_GUID = A842B2D2-5C88-44E9-A9E2-4830F26662B7
diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg
index 2040774d1b..6aee96694c 100644
--- a/Platform/Intel/build.cfg
+++ b/Platform/Intel/build.cfg
@@ -48,6 +48,7 @@ SECURE_BOOT_ENABLE = FALSE
REBUILD_MODE =
BUILD_ROM_ONLY =
NUMBER_OF_PROCESSORS = 0
+BIOS_INFO_GUID =
[PLATFORMS]
diff --git a/Platform/Intel/build_bios.py b/Platform/Intel/build_bios.py
index 46285df19a..ea098de705 100644
--- a/Platform/Intel/build_bios.py
+++ b/Platform/Intel/build_bios.py
@@ -196,6 +196,31 @@ def pre_build(build_config, build_type="DEBUG",
silent=False, toolchain=None):
if return_code != 0:
build_failed(config)
+#
+# build platform silicon tools
+#
+# save the current workspace
+saved_work_directory = config["WORKSPACE"]
+# change the workspace to silicon tools directory
+config["WORKSPACE"] = os.path.join(config["WORKSPACE_SILICON"], "Tools")
+
+command = ["nmake"]
+if os.name == "posix": # linux
+command = ["make"]
+# add path to generated FitGen binary to
+# environment path variable
+config["PATH"] += os.pathsep + \
+ os.path.join(config["BASE_TOOLS_PATH"],
+ "Source", "C", "bin")
+
+# build the silicon tools
+_, _, result, return_code = execute_script(command, config, shell=shell)
+if return_code != 0:
+build_failed(config)
+
+# restore WORKSPACE environment variable
+config["WORKSPACE"] = saved_work_directory
+
config["SILENT_MODE"] = 'TRUE' if silent else 'FALSE'
print("==")
@@ -404,6 +429,35 @@ def post_build(config):
:returns: nothing
"""
print("Running post_build to complete the build process.")
+board_fd = config["BOARD"].upper()
+final_fd = os.path.join(config["BUILD_DIR_PATH"], "FV",
+"{}.fd".format(board_fd))
+
+if config["BIOS_INFO_GUID"]:
+# Generate the fit table
+print("Generating FIT ...")
+if os.path.isfile(final_fd):
+temp_fd = os.path.join(config["BUILD_DIR_PATH"], "FV",
+ "{}_.fd".format(board_fd))
+shell = True
+command = ["FitGen", "-D",
+ final_fd, temp_fd, "-NA",
+ "-I", config["BIOS_INFO_GUID"]]
+
+if os.name == "posix": # linux
+shell = False
+
+_, _, result, return_code =
[edk2-devel] [edk2-platforms] [PATCH v2 0/4] Add FIT support using FitGen
Changes in v2: - Moved BIOS Info PEIM to KabylakeOpenBoardPkg shared by both KabylakeRvp3, GalagoPro3 - Moved BIOS Info PEIM to WhiskeylakeOpenBoardPkg used by WhiskeylakeURvp - Moved BiosInfo.h to BoardModulePkg/Include/Guid - Fixed typos, cleaned up commit messages and comments Prince Agyeman (4): BoardModulePkg: Add BIOS Info HOB KabylakeOpenBoardPkg: Add BIOS Info PEIM WhiskeylakeOpenBoardPkg: Add BIOS Info PEIM Platform/Intel: Add FIT generation tool .../Intel/BoardModulePkg/BoardModulePkg.dec | 3 + .../BoardModulePkg/Include/Guid/BiosInfo.h| 61 .../KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c | 93 +++ .../BiosInfo/BiosInfo.inf | 48 ++ .../GalagoPro3/OpenBoardPkg.dsc | 3 + .../GalagoPro3/OpenBoardPkg.fdf | 1 + .../GalagoPro3/build_config.cfg | 1 + .../KabylakeRvp3/OpenBoardPkg.dsc | 2 + .../KabylakeRvp3/OpenBoardPkg.fdf | 1 + .../KabylakeRvp3/build_config.cfg | 1 + .../BiosInfo/BiosInfo.c | 93 +++ .../BiosInfo/BiosInfo.inf | 48 ++ .../WhiskeylakeURvp/OpenBoardPkg.dsc | 2 + .../WhiskeylakeURvp/OpenBoardPkg.fdf | 1 + .../WhiskeylakeURvp/build_config.cfg | 1 + Platform/Intel/build.cfg | 1 + Platform/Intel/build_bios.py | 57 17 files changed, 417 insertions(+) create mode 100644 Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#49029): https://edk2.groups.io/g/devel/message/49029 Mute This Topic: https://groups.io/mt/34551480/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH v2 3/4] WhiskeylakeOpenBoardPkg: Add BIOS Info PEIM
Added BIOS Info PEIM to publish Bios Info
HOB. This PEIM currently publishes the microcode
FV information.
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../BiosInfo/BiosInfo.c | 93 +++
.../BiosInfo/BiosInfo.inf | 48 ++
.../WhiskeylakeURvp/OpenBoardPkg.dsc | 2 +
.../WhiskeylakeURvp/OpenBoardPkg.fdf | 1 +
4 files changed, 144 insertions(+)
create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c
create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..578e66149e
--- /dev/null
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,93 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define INDEXPORT_TO_ADDRESS(x) (x)
+#define DATAPORT_TO_ADDRESS(x) ((x) << 16)
+#define PORTWIDTH_TO_ADDRESS(x) ((x) << 32)
+#define PORTBITNUMBER_TO_ADDRESS(x) ((x) << 40)
+#define PORTINDEXNUMBER_TO_ADDRESS(x) ((x) << 48)
+
+//
+// Internal
+//
+#pragma pack (1)
+
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[1];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+1,
+0,
+ },
+ {
+{
+ FIT_TYPE_01_MICROCODE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashMicrocodeFvSize),
+ FixedPcdGet32 (PcdFlashMicrocodeFvBase)
+}
+ }
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mBiosInfoPpiList = {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gBiosInfoGuid,
+ &mBiosInfo
+};
+
+/**
+ Installs BiosInfo Ppi and builds BiosInfo HOB .
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS Install the BiosInfo Ppi and HOB successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+BiosInfoEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ VOID*HobData;
+
+ //
+ // Install PPI, so that other PEI module can add dependency.
+ //
+ Status = PeiServicesInstallPpi (&mBiosInfoPpiList);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build hob, so that DXE module can also get the data.
+ //
+ HobData = BuildGuidHob (&gBiosInfoGuid, sizeof (mBiosInfo));
+ ASSERT (HobData != NULL);
+ if (HobData == NULL) {
+return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem (HobData, &mBiosInfo, sizeof (mBiosInfo));
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
new file mode 100644
index 00..f268de00f5
--- /dev/null
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -0,0 +1,48 @@
+### @file
+# Module Information description file for BIOS Info Driver
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+###
+
+[Defines]
+ INF_VERSION= 0x00010017
+ BASE_NAME = BiosInfo
+ FILE_GUID = A842B2D2-5C88-44E9-A9E2-4830F26662B7
+ VERSION_STRING = 1.0
+ MODULE_TYPE= PEIM
+ ENTRY_POINT= BiosInfoEntryPoint
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES IA32 X64
+#
+
+[LibraryClasses]
+ PeimEntryPoint
+ PeiServicesLib
+ HobLib
+ BaseMemoryLib
+ DebugLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+ CoffeelakeSiliconPkg/SiPkg.dec
+ CoffeeLakeFspBinPkg/CoffeeLakeFspBinPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+
+[Sources]
+ BiosInfo.c
+
+[Guids]
+ gBiosInfoGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index 423fa88c12..3690069df4 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
@@ -314,6 +314,8 @@
[edk2-devel] [edk2-platforms] [PATCH v2 1/4] BoardModulePkg: Add BIOS Info HOB
Added gBiosInfoGuid to be used in
publishing the BIOS information HOB
which is needed in FIT generation
Also added the BIOS Info header
file BiosInfo.h that defines the
BIOS info struct and GUID
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../Intel/BoardModulePkg/BoardModulePkg.dec | 3 +
.../BoardModulePkg/Include/Guid/BiosInfo.h| 61 +++
2 files changed, 64 insertions(+)
create mode 100644 Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h
diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
index f96fb09aa1..f461cc7cab 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
@@ -39,3 +39,6 @@
[Guids]
## Include Include/Guid/BiosId.h
gBiosIdGuid = { 0xC3E36D09, 0x8294, 0x4b97, { 0xA8, 0x57, 0xD5, 0x28, 0x8F,
0xE3, 0x3E, 0x28 } }
+
+ ## GUID to publish BIOS information HOB
+ gBiosInfoGuid = { 0x09d0d15c, 0xe9f0, 0x4dfc, {0x9e, 0x0b, 0x39, 0x33, 0x1f,
0xca, 0x66, 0x85} }
diff --git a/Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h
b/Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h
new file mode 100644
index 00..d73409ea6f
--- /dev/null
+++ b/Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h
@@ -0,0 +1,61 @@
+/** @file
+ Definitions and GUID for BIOS INFO.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _BIOS_INFO_H_
+#define _BIOS_INFO_H_
+
+//
+// BIOS INFO data structure
+// This is self contained data structure for BIOS info for TXT
+//
+#pragma pack (1)
+#define BIOS_INFO_SIGNATURE SIGNATURE_64 ('$', 'B', 'I', 'O', 'S', 'I', 'F',
'$')
+typedef struct {
+ UINT64Signature;
+ UINT32EntryCount;
+ UINT32Reserved;
+//BIOS_INFO_STRUCT Struct[EntryCount];
+} BIOS_INFO_HEADER;
+
+//
+// BIOS_INFO_STRUCT attributes
+// bits[0:3] means general attributes
+// bits[4:7] means type specific attributes
+//
+#define BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT 0x01
+#define BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION0x10
+#define BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB 0x10
+#define BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_NON_IBB 0x20
+
+typedef struct {
+ //
+ // FitTable entry type
+ //
+ UINT8Type;
+ //
+ // BIOS_INFO_STRUCT attributes
+ //
+ UINT8Attributes;
+ //
+ // FitTable entry version
+ //
+ UINT16 Version;
+ //
+ // FitTable entry real size
+ //
+ UINT32 Size;
+ //
+ // FitTable entry address
+ //
+ UINT64 Address;
+} BIOS_INFO_STRUCT;
+
+extern EFI_GUID gBiosInfoGuid;
+
+#pragma pack ()
+
+#endif
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [PATCH v3 4/4] Platform/Intel: Add FIT generation tool
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2210
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2211
Added FitGen tool build and FIT generation
to the BIOS build process.
What was done:
- Build the FIT generation tool
- Added default/empty BIOS_INFO_GUID to the build.cfg
- Added BIOS_INFO_GUID to GalagoPro3,KabylakeRvp3
and WhiskeylakeURvp's build_config.cfg
This allows a board to specify the GUID
associated with the BIOS Info PEIM to be used
in the board's FIT generation.
BIOS_INFO_GUID is passed as an argument to
FitGen tool which allow the tool to locate
the BIOS Info module to be used in FIT generation.
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Michael Kubacki
Signed-off-by: Prince Agyeman
---
.../GalagoPro3/build_config.cfg | 1 +
.../KabylakeRvp3/build_config.cfg | 1 +
.../WhiskeylakeURvp/build_config.cfg | 1 +
Platform/Intel/build.cfg | 1 +
Platform/Intel/build_bios.py | 57 +++
5 files changed, 61 insertions(+)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
index 8c6c51abb4..458fe3d35d 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/build_config.cfg
@@ -31,3 +31,4 @@ FSP_PKG_NAME = KabylakeFspPkg
FSP_BINARY_BUILD = FALSE
FSP_TEST_RELEASE = FALSE
SECURE_BOOT_ENABLE = FALSE
+BIOS_INFO_GUID = C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
index 78f808bfaf..f6ae4b342a 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/build_config.cfg
@@ -33,3 +33,4 @@ FSP_PKG_NAME = AmberLakeFspPkg
FSP_BINARY_BUILD = FALSE
FSP_TEST_RELEASE = FALSE
SECURE_BOOT_ENABLE = FALSE
+BIOS_INFO_GUID = C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
index 1b0619bc1c..1dfe5ffd10 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/build_config.cfg
@@ -31,3 +31,4 @@ FSP_PKG_NAME = CoffeelakeSiliconPkg
FSP_BINARY_BUILD = FALSE
FSP_TEST_RELEASE = FALSE
SECURE_BOOT_ENABLE = FALSE
+BIOS_INFO_GUID = A842B2D2-5C88-44E9-A9E2-4830F26662B7
diff --git a/Platform/Intel/build.cfg b/Platform/Intel/build.cfg
index 2040774d1b..6aee96694c 100644
--- a/Platform/Intel/build.cfg
+++ b/Platform/Intel/build.cfg
@@ -48,6 +48,7 @@ SECURE_BOOT_ENABLE = FALSE
REBUILD_MODE =
BUILD_ROM_ONLY =
NUMBER_OF_PROCESSORS = 0
+BIOS_INFO_GUID =
[PLATFORMS]
diff --git a/Platform/Intel/build_bios.py b/Platform/Intel/build_bios.py
index 46285df19a..ea098de705 100644
--- a/Platform/Intel/build_bios.py
+++ b/Platform/Intel/build_bios.py
@@ -196,6 +196,31 @@ def pre_build(build_config, build_type="DEBUG",
silent=False, toolchain=None):
if return_code != 0:
build_failed(config)
+#
+# build platform silicon tools
+#
+# save the current workspace
+saved_work_directory = config["WORKSPACE"]
+# change the workspace to silicon tools directory
+config["WORKSPACE"] = os.path.join(config["WORKSPACE_SILICON"], "Tools")
+
+command = ["nmake"]
+if os.name == "posix": # linux
+command = ["make"]
+# add path to generated FitGen binary to
+# environment path variable
+config["PATH"] += os.pathsep + \
+ os.path.join(config["BASE_TOOLS_PATH"],
+ "Source", "C", "bin")
+
+# build the silicon tools
+_, _, result, return_code = execute_script(command, config, shell=shell)
+if return_code != 0:
+build_failed(config)
+
+# restore WORKSPACE environment variable
+config["WORKSPACE"] = saved_work_directory
+
config["SILENT_MODE"] = 'TRUE' if silent else 'FALSE'
print("==")
@@ -404,6 +429,35 @@ def post_build(config):
:returns: nothing
"""
print("Running post_build to complete the build process.")
+board_fd = config["BOARD"].upper()
+final_fd = os.path.join(config["BUILD_DIR_PATH"], "FV",
+"{}.fd".format(board_fd))
+
+if config["BIOS_INFO_GUID"]:
+# Generate the fit table
+print("Generating FIT ...")
+if os.path.isfile(final_fd):
+temp_fd = os.path.join(config["BUILD_DIR_PATH"], "FV",
+ "{}_.fd".format(board_fd))
+shell = True
+command = ["FitGen", "-D",
+ final_fd, temp_fd, "-NA",
+ "-I", config["BIOS_INFO_GUID"]]
+
+
[edk2-devel] [edk2-platforms] [PATCH v3 0/4] Add FIT support using FitGen
Changes in v3: - Added PcdLib to BiosInfo.inf's LibraryClasses section - Cleaned up OpenBoardPkg.dscs for all three platforms - Added bugzilla references Changes in v2: - Moved BIOS Info PEIM to KabylakeOpenBoardPkg shared by both KabylakeRvp3, GalagoPro3 - Moved BIOS Info PEIM to WhiskeylakeOpenBoardPkg used by WhiskeylakeURvp - Moved BiosInfo.h to BoardModulePkg/Include/Guid - Fixed typos, cleaned up commit messages and comments Prince Agyeman (4): BoardModulePkg: Add BIOS Info HOB KabylakeOpenBoardPkg: Add BIOS Info PEIM WhiskeylakeOpenBoardPkg: Add BIOS Info PEIM Platform/Intel: Add FIT generation tool .../Intel/BoardModulePkg/BoardModulePkg.dec | 3 + .../BoardModulePkg/Include/Guid/BiosInfo.h| 61 .../KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c | 93 +++ .../BiosInfo/BiosInfo.inf | 49 ++ .../GalagoPro3/OpenBoardPkg.dsc | 1 + .../GalagoPro3/OpenBoardPkg.fdf | 1 + .../GalagoPro3/build_config.cfg | 1 + .../KabylakeRvp3/OpenBoardPkg.dsc | 1 + .../KabylakeRvp3/OpenBoardPkg.fdf | 1 + .../KabylakeRvp3/build_config.cfg | 1 + .../BiosInfo/BiosInfo.c | 93 +++ .../BiosInfo/BiosInfo.inf | 49 ++ .../WhiskeylakeURvp/OpenBoardPkg.dsc | 2 + .../WhiskeylakeURvp/OpenBoardPkg.fdf | 1 + .../WhiskeylakeURvp/build_config.cfg | 1 + Platform/Intel/build.cfg | 1 + Platform/Intel/build_bios.py | 57 17 files changed, 416 insertions(+) create mode 100644 Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#49194): https://edk2.groups.io/g/devel/message/49194 Mute This Topic: https://groups.io/mt/34950128/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH v3 2/4] KabylakeOpenBoardPkg: Add BIOS Info PEIM
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2210
Added BIOS Info PEIM to KabylakeRvp3 and GalagoPro3
to publish the BIOS info HOB. This PEIM currently publishes
the board's microcode region information.
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c | 93 +++
.../BiosInfo/BiosInfo.inf | 49 ++
.../GalagoPro3/OpenBoardPkg.dsc | 1 +
.../GalagoPro3/OpenBoardPkg.fdf | 1 +
.../KabylakeRvp3/OpenBoardPkg.dsc | 1 +
.../KabylakeRvp3/OpenBoardPkg.fdf | 1 +
6 files changed, 146 insertions(+)
create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c
create mode 100644 Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c
b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..578e66149e
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,93 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define INDEXPORT_TO_ADDRESS(x) (x)
+#define DATAPORT_TO_ADDRESS(x) ((x) << 16)
+#define PORTWIDTH_TO_ADDRESS(x) ((x) << 32)
+#define PORTBITNUMBER_TO_ADDRESS(x) ((x) << 40)
+#define PORTINDEXNUMBER_TO_ADDRESS(x) ((x) << 48)
+
+//
+// Internal
+//
+#pragma pack (1)
+
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[1];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+1,
+0,
+ },
+ {
+{
+ FIT_TYPE_01_MICROCODE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashMicrocodeFvSize),
+ FixedPcdGet32 (PcdFlashMicrocodeFvBase)
+}
+ }
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mBiosInfoPpiList = {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gBiosInfoGuid,
+ &mBiosInfo
+};
+
+/**
+ Installs BiosInfo Ppi and builds BiosInfo HOB .
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS Install the BiosInfo Ppi and HOB successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+BiosInfoEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ VOID*HobData;
+
+ //
+ // Install PPI, so that other PEI module can add dependency.
+ //
+ Status = PeiServicesInstallPpi (&mBiosInfoPpiList);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build hob, so that DXE module can also get the data.
+ //
+ HobData = BuildGuidHob (&gBiosInfoGuid, sizeof (mBiosInfo));
+ ASSERT (HobData != NULL);
+ if (HobData == NULL) {
+return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem (HobData, &mBiosInfo, sizeof (mBiosInfo));
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
new file mode 100644
index 00..e5e40144a6
--- /dev/null
+++ b/Platform/Intel/KabylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -0,0 +1,49 @@
+### @file
+# Module Information description file for BIOS Info Driver
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+###
+
+[Defines]
+ INF_VERSION= 0x00010017
+ BASE_NAME = BiosInfo
+ FILE_GUID = C83BCE0E-6F16-4D3C-8D9F-4D6F5A032929
+ VERSION_STRING = 1.0
+ MODULE_TYPE= PEIM
+ ENTRY_POINT= BiosInfoEntryPoint
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES IA32 X64
+#
+
+[LibraryClasses]
+ PeimEntryPoint
+ PeiServicesLib
+ HobLib
+ BaseMemoryLib
+ DebugLib
+ PcdLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+ KabylakeSiliconPkg/SiPkg.dec
+ KabylakeFspBinPkg/KabylakeFspBinPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+
+[Sources]
+ BiosInfo.c
+
+[Guids]
+ gBiosInfoGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index b6f9807e7e..f59248bba4 100644
[edk2-devel] [edk2-platforms] [PATCH v3 3/4] WhiskeylakeOpenBoardPkg: Add BIOS Info PEIM
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2211
Added BIOS Info PEIM to publish Bios Info
HOB. This PEIM currently publishes the microcode
FV information.
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../BiosInfo/BiosInfo.c | 93 +++
.../BiosInfo/BiosInfo.inf | 49 ++
.../WhiskeylakeURvp/OpenBoardPkg.dsc | 2 +
.../WhiskeylakeURvp/OpenBoardPkg.fdf | 1 +
4 files changed, 145 insertions(+)
create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c
create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c
new file mode 100644
index 00..578e66149e
--- /dev/null
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.c
@@ -0,0 +1,93 @@
+/** @file
+ Driver for BIOS Info support.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define INDEXPORT_TO_ADDRESS(x) (x)
+#define DATAPORT_TO_ADDRESS(x) ((x) << 16)
+#define PORTWIDTH_TO_ADDRESS(x) ((x) << 32)
+#define PORTBITNUMBER_TO_ADDRESS(x) ((x) << 40)
+#define PORTINDEXNUMBER_TO_ADDRESS(x) ((x) << 48)
+
+//
+// Internal
+//
+#pragma pack (1)
+
+typedef struct {
+ BIOS_INFO_HEADER Header;
+ BIOS_INFO_STRUCT Entry[1];
+} BIOS_INFO;
+#pragma pack ()
+
+GLOBAL_REMOVE_IF_UNREFERENCED BIOS_INFO mBiosInfo = {
+ {
+BIOS_INFO_SIGNATURE,
+1,
+0,
+ },
+ {
+{
+ FIT_TYPE_01_MICROCODE,
+ BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION,
+ 0x0100,
+ FixedPcdGet32 (PcdFlashMicrocodeFvSize),
+ FixedPcdGet32 (PcdFlashMicrocodeFvBase)
+}
+ }
+};
+
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_PPI_DESCRIPTOR mBiosInfoPpiList = {
+ EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
+ &gBiosInfoGuid,
+ &mBiosInfo
+};
+
+/**
+ Installs BiosInfo Ppi and builds BiosInfo HOB .
+
+ @param FileHandle Handle of the file being invoked.
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS Install the BiosInfo Ppi and HOB successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+BiosInfoEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ VOID*HobData;
+
+ //
+ // Install PPI, so that other PEI module can add dependency.
+ //
+ Status = PeiServicesInstallPpi (&mBiosInfoPpiList);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Build hob, so that DXE module can also get the data.
+ //
+ HobData = BuildGuidHob (&gBiosInfoGuid, sizeof (mBiosInfo));
+ ASSERT (HobData != NULL);
+ if (HobData == NULL) {
+return EFI_OUT_OF_RESOURCES;
+ }
+ CopyMem (HobData, &mBiosInfo, sizeof (mBiosInfo));
+
+ return EFI_SUCCESS;
+}
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
new file mode 100644
index 00..a9687d93de
--- /dev/null
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/BiosInfo/BiosInfo.inf
@@ -0,0 +1,49 @@
+### @file
+# Module Information description file for BIOS Info Driver
+#
+# Copyright (c) 2019, Intel Corporation. All rights reserved.
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+###
+
+[Defines]
+ INF_VERSION= 0x00010017
+ BASE_NAME = BiosInfo
+ FILE_GUID = A842B2D2-5C88-44E9-A9E2-4830F26662B7
+ VERSION_STRING = 1.0
+ MODULE_TYPE= PEIM
+ ENTRY_POINT= BiosInfoEntryPoint
+#
+# The following information is for reference only and not required by the
build tools.
+#
+# VALID_ARCHITECTURES IA32 X64
+#
+
+[LibraryClasses]
+ PeimEntryPoint
+ PeiServicesLib
+ HobLib
+ BaseMemoryLib
+ DebugLib
+ PcdLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelSiliconPkg/IntelSiliconPkg.dec
+ CoffeelakeSiliconPkg/SiPkg.dec
+ CoffeeLakeFspBinPkg/CoffeeLakeFspBinPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
+ MinPlatformPkg/MinPlatformPkg.dec
+
+[Pcd]
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvBase## CONSUMES
+ gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize## CONSUMES
+
+[Sources]
+ BiosInfo.c
+
+[Guids]
+ gBiosInfoGuid ## PRODUCES
+
+[Depex]
+ TRUE
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index 423fa88c12..8e0ea2d5ce 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/Whiskeyla
[edk2-devel] [edk2-platforms] [PATCH v3 1/4] BoardModulePkg: Add BIOS Info HOB
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2210
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2211
Added gBiosInfoGuid to be used in
publishing the BIOS information HOB
which is needed in FIT generation
Also added the BIOS Info header
file BiosInfo.h that defines the
BIOS info struct and GUID
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../Intel/BoardModulePkg/BoardModulePkg.dec | 3 +
.../BoardModulePkg/Include/Guid/BiosInfo.h| 61 +++
2 files changed, 64 insertions(+)
create mode 100644 Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h
diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
index f96fb09aa1..f461cc7cab 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
@@ -39,3 +39,6 @@
[Guids]
## Include Include/Guid/BiosId.h
gBiosIdGuid = { 0xC3E36D09, 0x8294, 0x4b97, { 0xA8, 0x57, 0xD5, 0x28, 0x8F,
0xE3, 0x3E, 0x28 } }
+
+ ## GUID to publish BIOS information HOB
+ gBiosInfoGuid = { 0x09d0d15c, 0xe9f0, 0x4dfc, {0x9e, 0x0b, 0x39, 0x33, 0x1f,
0xca, 0x66, 0x85} }
diff --git a/Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h
b/Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h
new file mode 100644
index 00..d73409ea6f
--- /dev/null
+++ b/Platform/Intel/BoardModulePkg/Include/Guid/BiosInfo.h
@@ -0,0 +1,61 @@
+/** @file
+ Definitions and GUID for BIOS INFO.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#ifndef _BIOS_INFO_H_
+#define _BIOS_INFO_H_
+
+//
+// BIOS INFO data structure
+// This is self contained data structure for BIOS info for TXT
+//
+#pragma pack (1)
+#define BIOS_INFO_SIGNATURE SIGNATURE_64 ('$', 'B', 'I', 'O', 'S', 'I', 'F',
'$')
+typedef struct {
+ UINT64Signature;
+ UINT32EntryCount;
+ UINT32Reserved;
+//BIOS_INFO_STRUCT Struct[EntryCount];
+} BIOS_INFO_HEADER;
+
+//
+// BIOS_INFO_STRUCT attributes
+// bits[0:3] means general attributes
+// bits[4:7] means type specific attributes
+//
+#define BIOS_INFO_STRUCT_ATTRIBUTE_GENERAL_EXCLUDE_FROM_FIT 0x01
+#define BIOS_INFO_STRUCT_ATTRIBUTE_MICROCODE_WHOLE_REGION0x10
+#define BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_POST_IBB 0x10
+#define BIOS_INFO_STRUCT_ATTRIBUTE_BIOS_NON_IBB 0x20
+
+typedef struct {
+ //
+ // FitTable entry type
+ //
+ UINT8Type;
+ //
+ // BIOS_INFO_STRUCT attributes
+ //
+ UINT8Attributes;
+ //
+ // FitTable entry version
+ //
+ UINT16 Version;
+ //
+ // FitTable entry real size
+ //
+ UINT32 Size;
+ //
+ // FitTable entry address
+ //
+ UINT64 Address;
+} BIOS_INFO_STRUCT;
+
+extern EFI_GUID gBiosInfoGuid;
+
+#pragma pack ()
+
+#endif
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [PATCH] SimicsOpenBoardPkg: Change Build Output Directory
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2250
Changed BoardX558ich10's build directory to
Build/SimicsOpenBoardPkg/BoardX58Ich10 to align it with
align with the other Intel board packages
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../BoardX58Ich10/OpenBoardPkg.dsc | 13 +++--
.../BoardX58Ich10/OpenBoardPkg.fdf | 2 +-
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 4f8ab4170d..78f1e80990 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -20,16 +20,17 @@
DEFINE PCH_PKG = SimicsIch10Pkg
DEFINE DXE_ARCH = X64
DEFINE PEI_ARCH = IA32
+ DEFINE PROJECT = $(BOARD_PKG)/$(BOARD_NAME)
PLATFORM_NAME = SimicsX58
PLATFORM_GUID = EE8EBB5A-CC95-412f-9987-2AF70F88B69A
PLATFORM_VERSION = 0.1
DSC_SPECIFICATION = 0x00010005
- OUTPUT_DIRECTORY = Build/SimicsX58Ia32X64
+ OUTPUT_DIRECTORY = Build/$(PROJECT)
SUPPORTED_ARCHITECTURES= IA32|X64
BUILD_TARGETS = DEBUG|RELEASE|NOOPT
SKUID_IDENTIFIER = DEFAULT
- FLASH_DEFINITION = $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkg.fdf
+ FLASH_DEFINITION = $(PROJECT)/OpenBoardPkg.fdf
DEFINE SMM_REQUIRE = TRUE
@@ -41,7 +42,7 @@
DEFINE NETWORK_ISCSI_ENABLE = FALSE
DEFINE NETWORK_ALLOW_HTTP_CONNECTIONS = TRUE
- !include $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkgPcd.dsc
+ !include $(PROJECT)/OpenBoardPkgPcd.dsc
!include NetworkPkg/NetworkDefines.dsc.inc
@@ -80,7 +81,7 @@
###
# Build Option Includes
###
-!include $(BOARD_PKG)/$(BOARD_NAME)/OpenBoardPkgBuildOption.dsc
+!include $(PROJECT)/OpenBoardPkgBuildOption.dsc
#
@@ -175,11 +176,11 @@
#
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPreMem.inf {
-
BoardInitLib|$(BOARD_PKG)/$(BOARD_NAME)/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
+ BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPreMemLib.inf
}
$(PLATFORM_PACKAGE)/PlatformInit/PlatformInitPei/PlatformInitPostMem.inf {
-
BoardInitLib|$(BOARD_PKG)/$(BOARD_NAME)/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
+ BoardInitLib|$(PROJECT)/Library/BoardInitLib/PeiBoardInitPostMemLib.inf
}
$(PLATFORM_PACKAGE)/PlatformInit/ReportFv/ReportFvPei.inf
$(PLATFORM_PACKAGE)/PlatformInit/SiliconPolicyPei/SiliconPolicyPeiPreMem.inf
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 0c27cb0ef2..39226251a7 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -13,7 +13,7 @@
# Build the variable store and the firmware code as one unified flash device
# image.
#
-[FD.SIMICSX58IA32X64]
+[FD.BOARDX58ICH10]
BaseAddress = $(FW_BASE_ADDRESS)
Size = $(FW_SIZE)
ErasePolarity = 1
--
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[edk2-devel] [edk2-platforms] [PATCH] SimicsOpenBoardPkg: Add CmosAccessLib to BoardX58Ich10
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2164
Replaced Cmos.c and Cmos.h with BoardModulePkg's
Cmos library CmosAccessLib
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../BoardX58Ich10/OpenBoardPkg.dsc| 2 +
.../Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c | 57 ---
.../Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h | 50
.../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 4 +-
.../SimicsOpenBoardPkg/SimicsPei/Platform.c | 4 +-
.../SimicsPei/SimicsPei.inf | 3 +-
6 files changed, 8 insertions(+), 112 deletions(-)
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 4f8ab4170d..67f1680a4f 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -115,6 +115,8 @@
SerializeVariablesLib|$(BOARD_PKG)/Library/SerializeVariablesLib/SerializeVariablesLib.inf
SiliconPolicyInitLib|$(BOARD_PKG)/Policy/Library/SiliconPolicyInitLib/SiliconPolicyInitLib.inf
SiliconPolicyUpdateLib|$(BOARD_PKG)/Policy/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.inf
+
PlatformCmosAccessLib|BoardModulePkg/Library/PlatformCmosAccessLibNull/PlatformCmosAccessLibNull.inf
+ CmosAccessLib|BoardModulePkg/Library/CmosAccessLib/CmosAccessLib.inf
[LibraryClasses.common.SEC]
###
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
deleted file mode 100644
index b34ba9283b..00
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/** @file
- PC/AT CMOS access routines
-
- Copyright (c) 2006 - 2019 Intel Corporation. All rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "Cmos.h"
-#include "Library/IoLib.h"
-
-/**
- Reads 8-bits of CMOS data.
-
- Reads the 8-bits of CMOS data at the location specified by Index.
- The 8-bit read value is returned.
-
- @param Index The CMOS location to read.
-
- @return The value read.
-
-**/
-UINT8
-EFIAPI
-CmosRead8 (
- IN UINTN Index
- )
-{
- IoWrite8 (0x70, (UINT8) Index);
- return IoRead8 (0x71);
-}
-
-
-/**
- Writes 8-bits of CMOS data.
-
- Writes 8-bits of CMOS data to the location specified by Index
- with the value specified by Value and returns Value.
-
- @param Index The CMOS location to write.
- @param Value The value to write to CMOS.
-
- @return The value written to CMOS.
-
-**/
-UINT8
-EFIAPI
-CmosWrite8 (
- IN UINTN Index,
- IN UINT8 Value
- )
-{
- IoWrite8 (0x70, (UINT8) Index);
- IoWrite8 (0x71, Value);
- return Value;
-}
-
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
deleted file mode 100644
index 07fa2e2d11..00
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/** @file
- PC/AT CMOS access routines
-
- Copyright (c) 2006 - 2019 Intel Corporation. All rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef __CMOS_H__
-#define __CMOS_H__
-
-/**
- Reads 8-bits of CMOS data.
-
- Reads the 8-bits of CMOS data at the location specified by Index.
- The 8-bit read value is returned.
-
- @param Index The CMOS location to read.
-
- @return The value read.
-
-**/
-UINT8
-EFIAPI
-CmosRead8 (
- IN UINTN Index
- );
-
-/**
- Writes 8-bits of CMOS data.
-
- Writes 8-bits of CMOS data to the location specified by Index
- with the value specified by Value and returns Value.
-
- @param Index The CMOS location to write.
- @param Value The value to write to CMOS.
-
- @return The value written to CMOS.
-
-**/
-UINT8
-EFIAPI
-CmosWrite8 (
- IN UINTN Index,
- IN UINT8 Value
- );
-
-
-#endif
-
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
index ee0eead5a8..4d16fd2fac 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
+++ b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/MemDetect.c
@@ -22,11 +22,11 @@
#include
#include
#include
+#include
#include
#include
#include "Platform.h"
-#include "Cmos.h"
UINT8 mPhysMemAddressWidth;
@@ -105,7 +105,7 @@ GetSystemMemorySizeAbove4gb (
)
{
UINT32 Size;
- UINTN CmosIndex;
+ UINT8 CmosIndex;
//
// CMOS 0x5b-0x5d specifies the system memory above 4GB MB.
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Platform.c
b/Platform/Intel/SimicsOpenBoardPkg/Simi
[edk2-devel] [edk2-platforms] [PATCH] SimicsOpenBoardPkg: Fix gcc build failure
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2225
Currently, gcc 5 encounters an error "unused-but-set-variable" in
BdsPlatform.c as a result of a Status variable not being used
after it's set.
This was fixed by printing the Status variable when
EfiBootManagerDeleteLoadOptionVariable function encounters an error
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../Library/PlatformBootManagerLib/BdsPlatform.c | 4
1 file changed, 4 insertions(+)
diff --git
a/Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/BdsPlatform.c
b/Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/BdsPlatform.c
index 7aa3860f75..a4b010be63 100644
---
a/Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/BdsPlatform.c
+++
b/Platform/Intel/SimicsOpenBoardPkg/Library/PlatformBootManagerLib/BdsPlatform.c
@@ -348,6 +348,10 @@ PlatformBootManagerBeforeConsole (
NvBootOptions = EfiBootManagerGetLoadOptions (&NvBootOptionCount,
LoadOptionTypeBoot);
for (Index = 0; Index < NvBootOptionCount; Index++) {
Status = EfiBootManagerDeleteLoadOptionVariable
(NvBootOptions[Index].OptionNumber, LoadOptionTypeBoot);
+if(EFI_ERROR (Status)){
+ DEBUG ((DEBUG_ERROR,
+ "%a: removing Boot#%04x %r\n", __FUNCTION__,
(UINT32)NvBootOptions[Index].OptionNumber, Status));
+}
}
InstallDevicePathCallback ();
--
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Re: [edk2-devel] [edk2-platforms: PATCH v3 6/6] SimicsOpenBoardPkg/BoardX58Ich10: Add SetCacheMtrrLib library class.
Reviewed-by: Prince Agyeman -Original Message- From: Chiu, Chasel Sent: Thursday, October 31, 2019 3:28 AM To: devel@edk2.groups.io Cc: Wei, David Y ; Agyeman, Prince Subject: [edk2-platforms: PATCH v3 6/6] SimicsOpenBoardPkg/BoardX58Ich10: Add SetCacheMtrrLib library class. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2314 Include SetCacheMtrrLib from MinPlatformPkg. Cc: Wei David Y Cc: Agyeman Prince Signed-off-by: Chasel Chiu --- Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 1 + 1 file changed, 1 insertion(+) diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc index 4f8ab4170d..8cad7b5b69 100644 --- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc +++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc @@ -136,6 +136,7 @@ TestPointCheckLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointCheckLib/PeiTestPointCheckLib.inf !endif TestPointLib|$(PLATFORM_PACKAGE)/Test/Library/TestPointLib/PeiTestPointLib.inf + SetCacheMtrrLib|$(PLATFORM_PACKAGE)/Library/SetCacheMtrrLib/SetCacheMtrrLib.inf [LibraryClasses.common.DXE_DRIVER] ### -- 2.13.3.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#49778): https://edk2.groups.io/g/devel/message/49778 Mute This Topic: https://groups.io/mt/40108822/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH 3/5] BoardModulePkg: Added Pcds Sio Driver
Included PCDs to the Sio dxe driver,
to allow the enable/disable of Ps2 keyboard/mouse,
UART1 and UART2 com ports.
Renamed the Sio driver's base name
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../LegacySioDxe/LegacySioDxe.inf | 15 +++-
.../BoardModulePkg/LegacySioDxe/SioChip.c | 69 +--
.../BoardModulePkg/LegacySioDxe/SioChip.h | 10 +++
.../BoardModulePkg/LegacySioDxe/SioDriver.c | 42 ++-
.../BoardX58Ich10/OpenBoardPkgPcd.dsc | 6 ++
5 files changed, 133 insertions(+), 9 deletions(-)
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
index d606ba43dc..4ab01a6098 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
@@ -10,7 +10,7 @@
[Defines]
INF_VERSION= 0x00010017
- BASE_NAME = HitachiH8s2113Dxe
+ BASE_NAME = LegacySioDxe
FILE_GUID = 7807E404-8281-4FF1-8457-0B54BABE263F
VERSION_STRING = 1.0
MODULE_TYPE= UEFI_DRIVER
@@ -34,6 +34,7 @@
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
+ BoardModulePkg/BoardModulePkg.dec
[Sources]
SioChip.c
@@ -44,6 +45,18 @@
SioDriver.h
ComponentName.c
+[Pcd]
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
+ gBoardModulePkgTokenSpaceGuid.PcdUart1Enable
+ gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask
+ gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort
+ gBoardModulePkgTokenSpaceGuid.PcdUart1Length
+ gBoardModulePkgTokenSpaceGuid.PcdUart2Enable
+ gBoardModulePkgTokenSpaceGuid.PcdUart2IrqMask
+ gBoardModulePkgTokenSpaceGuid.PcdUart2IoPort
+ gBoardModulePkgTokenSpaceGuid.PcdUart2Length
+ gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice
+
[Protocols]
gEfiPciIoProtocolGuid ## CONSUMES
gEfiDevicePathProtocolGuid## PRODUCES
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
index 81efe3c38b..09403a7354 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
@@ -19,12 +19,31 @@
ACPI_SIO_RESOURCES_IO_IRQ mCom1Resources = {
{
{ ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR },
-0x3f8,
-8
+ FixedPcdGet16 (PcdUart1IoPort),
+ FixedPcdGet8 (PcdUart1Length)
+},
+{
+ { ACPI_IRQ_NOFLAG_DESCRIPTOR },
+ FixedPcdGet16 (PcdUart1IrqMask)
+},
+{
+ ACPI_END_TAG_DESCRIPTOR,
+ 0
+}
+};
+
+//
+// COM 2 UART Controller
+//
+ACPI_SIO_RESOURCES_IO_IRQ mCom2Resources = {
+ {
+{ ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR },
+FixedPcdGet16 (PcdUart2IoPort),
+FixedPcdGet8 (PcdUart2Length)
},
{
{ ACPI_IRQ_NOFLAG_DESCRIPTOR },
-BIT4// IRQ4
+FixedPcdGet16 (PcdUart2IrqMask),
},
{
ACPI_END_TAG_DESCRIPTOR,
@@ -70,10 +89,12 @@ ACPI_SIO_RESOURCES_IO_IRQ mMouseResources = {
}
};
+
//
// Table of SIO Controllers
//
DEVICE_INFOmDeviceInfo[] = {
+#if FixedPcdGet8 (PcdUart1Enable) == DEVICE_ENABLED
{
{
EISA_PNP_ID(0x501),
@@ -84,6 +105,20 @@ DEVICE_INFOmDeviceInfo[] = {
{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources },
{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources }
}, // COM 1 UART Controller
+#endif
+#if FixedPcdGet8 (PcdUart2Enable) == DEVICE_ENABLED
+ {
+{
+ EISA_PNP_ID(0x501),
+ 0
+},
+0,
+RESOURCE_IO | RESOURCE_IRQ,
+{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources },
+{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources }
+ }, // COM 2 UART Controller
+#endif
+#if FixedPcdGet8 (PcdPs2KbMsEnable) == DEVICE_ENABLED
{
{
EISA_PNP_ID(0x303),
@@ -103,10 +138,28 @@ DEVICE_INFOmDeviceInfo[] = {
0, // Cannot change resource
{ (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources },
{ (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources }
- } // PS/2 Mouse Controller
+ }, // PS/2 Mouse Controller
+#endif
+ DEVICE_INFO_END
};
+
+/**
+ Gets the number of devices in Table of SIO Controllers mDeviceInfo
+
+ @retval Number of enabled devices in Table of SIO Controllers.
+**/
+UINTN
+EFIAPI
+GetDeviceCount(
+ VOID
+){
+ UINTNCount;
+ Count = ARRAY_SIZE(mDeviceInfo) - 1; // -1 to account for for the end
device info
+ return Count;
+}
+
/**
Return the supported devices.
@@ -128,7 +181,7 @@ DeviceGetList (
//
// Allocate enough memory for simplicity
//
- DeviceCount = sizeof (mDeviceInfo) / sizeof (mDeviceInfo[0]);
+ DeviceCount = GetDeviceCount();
LocalDevices = AllocatePool (sizeof (EFI_SIO_ACPI_DEVICE_ID) * DeviceCount);
ASSERT (LocalDevices != NULL);
if (LocalDevices == NULL) {
@@ -157,7 +210,6 @@ SioInit
[edk2-devel] [edk2-platforms] [PATCH 5/5] KabylakeOpenBoardPkg: Add Ps2 Keyboard Support
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2228
Added Ps2Keyboard DXE driver.
Added Sio dxe driver to publish the SIO protocol
needed by the Ps2Keyboard DXE driver.
Included a Ps2 null Library to BdsDxe driver
to add the Ps2 device path to ConIn and ConInDev
variables
Configured the Super I/O Pci to Isa bridge bus,
device, function device info PCD. This will help the Super I/O
driver identify which bridge the Super I/O is connected to.
Signed-off-by: Prince Agyeman
---
.../Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 7 +++
.../Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 2 ++
.../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc| 1 +
3 files changed, 10 insertions(+)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index f59248bba4..c6a0749458 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -311,6 +311,11 @@
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+ MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf{
+
+ NULL|$(PROJECT)/Library/Ps2KbcLib/Ps2KbcLib.inf
+ }
UefiCpuPkg/CpuDxe/CpuDxe.inf
ShellPkg/Application/Shell/Shell.inf {
@@ -408,3 +413,5 @@
!endif
}
!endif
+
+ BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index 80efab1aad..d58466d390 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -335,6 +335,8 @@ INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
INF MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+INF BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+INF MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
INF ShellPkg/Application/Shell/Shell.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
index 4550a4e0b5..c6f5ae7534 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
@@ -312,6 +312,7 @@
# Board Configuration
##
gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|1
+ gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x00, 0x00,
0x1F, 0x00}
[PcdsFixedAtBuild.IA32]
##
--
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[edk2-devel] [edk2-platforms] [PATCH 4/5] KabylakeOpenBoardPkg: Add Ps2 keyboard Null Library
Added GalagoPro3 board ps2 keyboard library
that adds ps2 device path to ConIn and ConInDev
Uefi variables
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c | 202 ++
.../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h | 65 ++
.../Library/Ps2KbcLib/Ps2KbcLib.inf | 39
3 files changed, 306 insertions(+)
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.inf
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
new file mode 100644
index 00..ac1563d3cd
--- /dev/null
+++
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
@@ -0,0 +1,202 @@
+/** @file
+ Main file for NULL named library for Ps2 keyboard controller librarr.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "Ps2KbcLib.h"
+
+GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_KEYBOARD_DEVICE_PATH
gKeyboardDevicePath = {
+ gPciRootBridge,
+ {
+{
+ HARDWARE_DEVICE_PATH,
+ HW_PCI_DP,
+ {
+(UINT8) (sizeof (PCI_DEVICE_PATH)),
+(UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8)
+ }
+},
+0, // Function, patched in EnumPs2Keyboard
+0 // Device, patched in EnumPs2Keyboard
+ },
+ {
+{
+ ACPI_DEVICE_PATH,
+ ACPI_DP,
+ {
+(UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
+(UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
+ }
+},
+EISA_PNP_ID(0x0303),
+0
+ },
+ gEndEntire
+};
+
+/**
+ Check if PS2 keyboard is conntected, by sending ECHO command.
+ @retval TRUE if connected FALSE otherwise
+**/
+BOOLEAN
+DetectPs2Keyboard (
+ VOID
+ )
+{
+ UINT32TimeOut;
+ UINT32RegEmptied;
+ UINT8 Data;
+ UINT32SumTimeOut;
+ BOOLEAN FoundPs2Kbc;
+
+ TimeOut = 0;
+ RegEmptied = 0;
+ FoundPs2Kbc = FALSE;
+
+ //
+ // Wait for input buffer empty
+ //
+ for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30) {
+if ((IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x02) == 0) {
+ FoundPs2Kbc = TRUE;
+ break;
+}
+MicroSecondDelay (30);
+ }
+
+ if (FoundPs2Kbc == FALSE) {
+return FALSE;
+ }
+
+ //
+ // Send echo command
+ //
+ IoWrite8 (KEYBOARD_8042_DATA_REGISTER, KBC_INPBUF_VIA60_KBECHO);
+
+ //
+ // Init variables
+ //
+ FoundPs2Kbc = FALSE;
+ TimeOut = 0;
+ SumTimeOut = 0;
+ Data = 0;
+
+ //
+ // Read from 8042 (multiple times if needed)
+ // until the expected value appears
+ // use SumTimeOut to control the iteration
+ //
+ while (1) {
+//
+// Perform a read
+//
+for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30) {
+ if (IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x01) {
+Data = IoRead8 (KEYBOARD_8042_DATA_REGISTER);
+break;
+ }
+ MicroSecondDelay (30);
+}
+
+SumTimeOut += TimeOut;
+
+if (Data == KBC_INPBUF_VIA60_KBECHO) {
+ FoundPs2Kbc = TRUE;
+ break;
+}
+
+if (SumTimeOut >= PS2_KEYBOARD_WAITFORVALUE_TIMEOUT) {
+ break;
+}
+ }
+ return FoundPs2Kbc;
+}
+
+/**
+ Check if PS2 keyboard is conntected. If the result of first time is
+ error, it will retry again.
+ @retval TRUE if connected FALSE otherwise
+**/
+BOOLEAN
+IsPs2KeyboardConnected (
+ VOID
+ )
+{
+ BOOLEAN Result;
+ Result = DetectPs2Keyboard ();
+
+ if (Result == FALSE) {
+//
+// If there is no ps2 keyboard detected for the 1st time, retry again.
+//
+Result = DetectPs2Keyboard ();
+ }
+ return Result;
+}
+
+
+/**
+ Updates the ConIn variable with Ps2 Keyboard device path,
+ if it doesn't already exists in ConIn and ConInDev
+**/
+VOID
+AddPs2Keyboard (
+ VOID
+ )
+{
+ SIO_PCI_ISA_BRIDGE_DEVICE_INFO *SioIsaInfo;
+
+ DEBUG ((DEBUG_INFO, "[AddPs2Keyboard]\n"));
+
+ SioIsaInfo = (SIO_PCI_ISA_BRIDGE_DEVICE_INFO*) FixedPcdGetPtr
(PcdSuperIoPciIsaBridgeDevice);
+
+ //
+ // patch IsaBridge device and and function
+ //
+ gKeyboardDevicePath.IsaBridge.Device = SioIsaInfo->Device;
+ gKeyboardDevicePath.IsaBridge.Function = SioIsaInfo->Funtion;
+
+ //
+ // Append Ps2 Keyboard into "ConIn"
+ //
+ EfiBootManagerUpdateConsoleVariable (ConIn, (EFI_DEVICE_PATH_PROTOCOL *)
&gKeyboardDevicePath, NULL);
+
+ //
+ // Append Ps2 Keyboard into "ConInDev"
+ //
+ EfiBootManagerUpdateConsoleVariable (ConInDev, (EFI_DEVICE_PATH_PROTOCOL *)
&gKeyboardDevicePath, NULL);
+}
+
+
+/**
+ Constructor for the Ps2 keyboard controller l
[edk2-devel] [edk2-platforms] [PATCH 0/5] Enable Ps2 keyboard
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2228
This patch series enables BIOS Ps2 keyboard in GalagoPro3
What was done:
Patch 0001 adds PCDs to BoardModulePkg that will enable/disable,
describe Super I/O , Ps2 keyboard/mouse, uart1 and uart2 com ports
Patch 0002 moves the generic Super I/O driver from SimicsOpenBoardPkg to
BoardModulePkg in order for it to be shared. This driver publishes the
gEfiSioProtocolGuid consumed by edk2's MdeModulePkg/Bus/Isa/Ps2KeyboardDxe
driver to enable Ps2 keyboard functions in BIOS
Patch 0003 adds PCDs defined in patch 0001 to enable/disable devices in the
Super I/O driver added in patch 0002
Patch 0004 adds a Null Ps2 Library that adds Ps2 keyboard device path to
ConIn and ConInDev
Patch 0005 enables Ps2 keyboard in BIOS by setting Ps2 keyboard related PCDs
Prince Agyeman (5):
Platform/Intel: Add gBoardModulePkgTokenSpaceGuid
Platform/Intel: Move Sio Dxe Driver
BoardModulePkg: Added Pcds Sio Driver
KabylakeOpenBoardPkg: Add Ps2 keyboard Null Library
KabylakeOpenBoardPkg: Add Ps2 Keyboard Support
.../Intel/BoardModulePkg/BoardModulePkg.dec | 25 +++
.../Intel/BoardModulePkg/BoardModulePkg.dsc | 1 +
.../LegacySioDxe/ComponentName.c | 0
.../LegacySioDxe/ComponentName.h | 0
.../LegacySioDxe/LegacySioDxe.inf | 18 +-
.../LegacySioDxe/Register.h | 0
.../LegacySioDxe/SioChip.c| 71 +-
.../LegacySioDxe/SioChip.h| 18 +-
.../LegacySioDxe/SioDriver.c | 42 +++-
.../LegacySioDxe/SioDriver.h | 1 -
.../LegacySioDxe/SioService.c | 0
.../LegacySioDxe/SioService.h | 0
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 3 +-
.../DxeMultiBoardAcpiSupportLib.inf | 3 +-
.../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c | 202 ++
.../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h | 65 ++
.../Library/Ps2KbcLib/Ps2KbcLib.inf | 39
.../GalagoPro3/OpenBoardPkg.dsc | 7 +
.../GalagoPro3/OpenBoardPkg.fdf | 2 +
.../GalagoPro3/OpenBoardPkgPcd.dsc| 6 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 3 +-
.../DxeMultiBoardAcpiSupportLib.inf | 3 +-
.../KabylakeRvp3/OpenBoardPkgPcd.dsc | 5 +
.../KabylakeOpenBoardPkg/OpenBoardPkg.dec | 2 -
.../BoardX58Ich10/OpenBoardPkg.dsc| 2 +-
.../BoardX58Ich10/OpenBoardPkg.fdf| 2 +-
.../BoardX58Ich10/OpenBoardPkgPcd.dsc | 6 +
.../WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec | 1 -
.../WhiskeylakeURvp/OpenBoardPkgPcd.dsc | 5 +
29 files changed, 499 insertions(+), 33 deletions(-)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/ComponentName.c (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/ComponentName.h (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/LegacySioDxe.inf (63%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/Register.h (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioChip.c (75%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioChip.h (90%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioDriver.c (88%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioDriver.h (95%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioService.c (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioService.h (100%)
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h
create mode 100644
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.inf
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [PATCH 1/5] Platform/Intel: Add gBoardModulePkgTokenSpaceGuid
Added gBoardModulePkgTokenSpaceGuid to BoardModulePkg
Added ps2 keyboard and Uart enable PCDs.
Added PCDs to define IO ports for Uart1 and Uart2
Enabled KabylakeOpenBoardPkg and WhiskeylakeOpenBoardPkg
boards to use the ps2 keyboard enable PCD.
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../Intel/BoardModulePkg/BoardModulePkg.dec | 25 +++
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 3 ++-
.../DxeMultiBoardAcpiSupportLib.inf | 3 ++-
.../GalagoPro3/OpenBoardPkgPcd.dsc| 5
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 3 ++-
.../DxeMultiBoardAcpiSupportLib.inf | 3 ++-
.../KabylakeRvp3/OpenBoardPkgPcd.dsc | 5
.../KabylakeOpenBoardPkg/OpenBoardPkg.dec | 2 --
.../WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec | 1 -
.../WhiskeylakeURvp/OpenBoardPkgPcd.dsc | 5
10 files changed, 48 insertions(+), 7 deletions(-)
diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
index f461cc7cab..26e662f711 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
@@ -42,3 +42,28 @@
## GUID to publish BIOS information HOB
gBiosInfoGuid = { 0x09d0d15c, 0xe9f0, 0x4dfc, {0x9e, 0x0b, 0x39, 0x33, 0x1f,
0xca, 0x66, 0x85} }
+
+ ## {7F4EE1A3-C1F3-43E4-BA1A-39DCDE46C343}
+ gBoardModulePkgTokenSpaceGuid = { 0x7f4ee1a3, 0xc1f3, 0x43e4, { 0xba, 0x1a,
0x39, 0xdc, 0xde, 0x46, 0xc3, 0x43 } }
+
+[PcdsFixedAtBuild]
+ ## PcdPs2KbMsEnable 0x0:Disable, 0x1:Enable
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|0x00|UINT8|0x0001
+
+ ## SuperIo Pci ISA Bridge info. It is an array that contains the Segment,
Bus, Device and Function
+ # information describing the PCI Device Info. The first byte is the segment
number,
+ # the second is the bus number, third byte is the device number, the fourth
byte
+ # is the Function.
+ gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0xFF, 0xFF,
0xFF, 0xFF}|VOID*|0x0002
+
+ ## PcdUart1Enable 0x0:Disable, 0x1:Enable
+ gBoardModulePkgTokenSpaceGuid.PcdUart1Enable|0x00|UINT8|0x0003
+ gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask|0x0010|UINT16|0x0004
+ gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort|0x03F8|UINT16|0x0005
+ gBoardModulePkgTokenSpaceGuid.PcdUart1Length|0x08|UINT8|0x0006
+
+ ## PcdUart2Enable 0x0:Disable, 0x1:Enable
+ gBoardModulePkgTokenSpaceGuid.PcdUart2Enable|0x00|UINT8|0x0007
+ gBoardModulePkgTokenSpaceGuid.PcdUart2IrqMask|0x0008|UINT16|0x0008
+ gBoardModulePkgTokenSpaceGuid.PcdUart2IoPort|0x02F8|UINT16|0x0009
+ gBoardModulePkgTokenSpaceGuid.PcdUart2Length|0x08|UINT8|0x000A
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
index a79bdcdbc6..35cd5c8fdb 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
+++
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
@@ -33,9 +33,10 @@
MinPlatformPkg/MinPlatformPkg.dec
KabylakeOpenBoardPkg/OpenBoardPkg.dec
KabylakeSiliconPkg/SiPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
[Pcd]
- gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPs2KbMsEnable
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative
gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable
gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
index db8ba7a822..9fe27f9fda 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
+++
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
@@ -34,9 +34,10 @@
MinPlatformPkg/MinPlatformPkg.dec
KabylakeOpenBoardPkg/OpenBoardPkg.dec
KabylakeSiliconPkg/SiPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
[Pcd]
- gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPs2KbMsEnable
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPciExpNative
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdNativeAspmEnable
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLowPowerS0Idle
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
index c68b8a49cf..4550a4e0b5 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
@@ -308,6 +308,11 @@
gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x
[edk2-devel] [edk2-platforms] [PATCH 2/5] Platform/Intel: Move Sio Dxe Driver
Moved LegacySioDxe from SimicsOpenBoardPkg
to BoardModulePkg as LegacySioDxe is generic
and can be shared between open board packages
Removed unused libraries and functions in LegacySioDxe
Pointed BoardX58Ich10 to the current LegacySioDxe
location
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
Platform/Intel/BoardModulePkg/BoardModulePkg.dsc | 1 +
.../LegacySioDxe/ComponentName.c | 0
.../LegacySioDxe/ComponentName.h | 0
.../LegacySioDxe/LegacySioDxe.inf | 3 ---
.../LegacySioDxe/Register.h| 0
.../LegacySioDxe/SioChip.c | 2 --
.../LegacySioDxe/SioChip.h | 10 --
.../LegacySioDxe/SioDriver.c | 0
.../LegacySioDxe/SioDriver.h | 1 -
.../LegacySioDxe/SioService.c | 0
.../LegacySioDxe/SioService.h | 0
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 2 +-
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 2 +-
13 files changed, 3 insertions(+), 18 deletions(-)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/ComponentName.c (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/ComponentName.h (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/LegacySioDxe.inf (92%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/Register.h (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioChip.c (94%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioChip.h (93%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioDriver.c (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioDriver.h (95%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioService.c (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioService.h (100%)
diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
index 5ec68ceebf..fffc135d75 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
@@ -76,6 +76,7 @@
[Components]
BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMediaInfoPei.inf
+ BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
BoardModulePkg/Library/CmosAccessLib/CmosAccessLib.inf
BoardModulePkg/Library/PlatformCmosAccessLibNull/PlatformCmosAccessLibNull.inf
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c
b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
similarity index 100%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.h
b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
similarity index 100%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.h
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf
b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
similarity index 92%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
index 275f36ca47..d606ba43dc 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
@@ -28,11 +28,8 @@
MemoryAllocationLib
PcdLib
DevicePathLib
- IoLib
UefiDriverEntryPoint
UefiBootServicesTableLib
- S3BootScriptLib
- S3IoLib
[Packages]
MdePkg/MdePkg.dec
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/Register.h
b/Platform/Intel/BoardModulePkg/LegacySioDxe/Register.h
similarity index 100%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/Register.h
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/Register.h
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c
b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
similarity index 94%
rename from Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c
rename to Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
index b9a7b9cd24..81efe3c38b 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
@@ -7,9 +7,7 @@
**/
#include "SioDriver.h"
-#include
-LOCAL_IO_WRITE8mIoWrite8 = IoWrite8;
//
// System configuration (setup) information
//
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.h
b/Platform/Intel/BoardModulePkg/Le
[edk2-devel] [edk2-platforms] [PATCH v2] SimicsOpenBoardPkg: Add CmosAccessLib to BoardX58Ich10
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2164
Replaced Cmos.c and Cmos.h with BoardModulePkg's
Cmos library CmosAccessLib
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Kubacki Michael A
Signed-off-by: Prince Agyeman
---
.../BoardInitLib/PeiX58Ich10InitPreMemLib.c | 46 ---
.../BoardX58Ich10/OpenBoardPkg.dsc| 2 +
.../Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c | 57 ---
.../Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h | 50
.../SimicsOpenBoardPkg/SimicsPei/MemDetect.c | 19 +--
.../SimicsOpenBoardPkg/SimicsPei/Platform.c | 4 +-
.../SimicsPei/SimicsPei.inf | 3 +-
.../SmbiosPlatformDxe/SmbiosPlatformDxe.c | 38 +
.../SmbiosPlatformDxe/SmbiosPlatformDxe.h | 1 +
.../SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 2 +
10 files changed, 14 insertions(+), 208 deletions(-)
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
diff --git
a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/Library/BoardInitLib/PeiX58Ich10InitPreMemLib.c
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/Library/BoardInitLib/PeiX58Ich10InitPreMemLib.c
index c3a31ed426..325a341cdf 100644
---
a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/Library/BoardInitLib/PeiX58Ich10InitPreMemLib.c
+++
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/Library/BoardInitLib/PeiX58Ich10InitPreMemLib.c
@@ -20,52 +20,6 @@
#include "PeiX58Ich10InitLib.h"
#include
-/**
- Reads 8-bits of CMOS data.
-
- Reads the 8-bits of CMOS data at the location specified by Index.
- The 8-bit read value is returned.
-
- @param Index The CMOS location to read.
-
- @return The value read.
-
-**/
-UINT8
-EFIAPI
-CmosRead8(
- IN UINTN Index
- )
-{
- IoWrite8 (0x70, (UINT8)Index);
- return IoRead8(0x71);
-}
-
-
-/**
- Writes 8-bits of CMOS data.
-
- Writes 8-bits of CMOS data to the location specified by Index
- with the value specified by Value and returns Value.
-
- @param Index The CMOS location to write.
- @param Value The value to write to CMOS.
-
- @return The value written to CMOS.
-
-**/
-UINT8
-EFIAPI
-CmosWrite8(
- IN UINTN Index,
- IN UINT8 Value
- )
-{
- IoWrite8 (0x70, (UINT8)Index);
- IoWrite8 (0x71, Value);
- return Value;
-}
-
EFI_STATUS
EFIAPI
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 78f1e80990..9b9e088cbe 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -116,6 +116,8 @@
SerializeVariablesLib|$(BOARD_PKG)/Library/SerializeVariablesLib/SerializeVariablesLib.inf
SiliconPolicyInitLib|$(BOARD_PKG)/Policy/Library/SiliconPolicyInitLib/SiliconPolicyInitLib.inf
SiliconPolicyUpdateLib|$(BOARD_PKG)/Policy/Library/SiliconPolicyUpdateLib/SiliconPolicyUpdateLib.inf
+
PlatformCmosAccessLib|BoardModulePkg/Library/PlatformCmosAccessLibNull/PlatformCmosAccessLibNull.inf
+ CmosAccessLib|BoardModulePkg/Library/CmosAccessLib/CmosAccessLib.inf
[LibraryClasses.common.SEC]
###
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
deleted file mode 100644
index b34ba9283b..00
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/** @file
- PC/AT CMOS access routines
-
- Copyright (c) 2006 - 2019 Intel Corporation. All rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "Cmos.h"
-#include "Library/IoLib.h"
-
-/**
- Reads 8-bits of CMOS data.
-
- Reads the 8-bits of CMOS data at the location specified by Index.
- The 8-bit read value is returned.
-
- @param Index The CMOS location to read.
-
- @return The value read.
-
-**/
-UINT8
-EFIAPI
-CmosRead8 (
- IN UINTN Index
- )
-{
- IoWrite8 (0x70, (UINT8) Index);
- return IoRead8 (0x71);
-}
-
-
-/**
- Writes 8-bits of CMOS data.
-
- Writes 8-bits of CMOS data to the location specified by Index
- with the value specified by Value and returns Value.
-
- @param Index The CMOS location to write.
- @param Value The value to write to CMOS.
-
- @return The value written to CMOS.
-
-**/
-UINT8
-EFIAPI
-CmosWrite8 (
- IN UINTN Index,
- IN UINT8 Value
- )
-{
- IoWrite8 (0x70, (UINT8) Index);
- IoWrite8 (0x71, Value);
- return Value;
-}
-
diff --git a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
b/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
deleted file mode 100644
index 07fa2e2d11..00
--- a/Platform/Intel/SimicsOpenBoardPkg/SimicsPei/Cmos.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/** @file
- PC/AT CMOS access routines
-
- Co
Re: [edk2-devel] [edk2-platforms] [PATCH 4/5] KabylakeOpenBoardPkg: Add Ps2 keyboard Null Library
Hi Chasel,
I will fix the descriptions and typos as suggested in my v2 patch series.
Thanks for the feedback!
Prince
-Original Message-
From: Chiu, Chasel
Sent: Monday, November 4, 2019 1:04 AM
To: Agyeman, Prince ; devel@edk2.groups.io
Cc: Kubacki, Michael A ; Desimone, Nathaniel L
Subject: RE: [edk2-platforms] [PATCH 4/5] KabylakeOpenBoardPkg: Add Ps2
keyboard Null Library
Hi Prince,
I added 3 questions below inline, please help to check them. Thanks!
> -Original Message-
> From: Agyeman, Prince
> Sent: Saturday, November 2, 2019 3:51 AM
> To: devel@edk2.groups.io
> Cc: Kubacki, Michael A ; Chiu, Chasel
> ; Desimone, Nathaniel L
>
> Subject: [edk2-platforms] [PATCH 4/5] KabylakeOpenBoardPkg: Add Ps2
> keyboard Null Library
>
> Added GalagoPro3 board ps2 keyboard library that adds ps2 device path
> to ConIn and ConInDev Uefi variables
>
> Cc: Michael Kubacki
> Cc: Chasel Chiu
> Cc: Nate DeSimone
>
> Signed-off-by: Prince Agyeman
> ---
> .../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.c | 202
> ++ .../GalagoPro3/Library/Ps2KbcLib/Ps2KbcLib.h |
> 65 ++
> .../Library/Ps2KbcLib/Ps2KbcLib.inf | 39
> 3 files changed, 306 insertions(+)
> create mode 100644
> Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2Kb
> cLib.c
> create mode 100644
> Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2Kb
> cLib.h
> create mode 100644
> Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2Kb
> cLib.inf
>
> diff --git
> a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2
> K
> bcLib.c
> b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/Ps2
> KbcLib.c
> new file mode 100644
> index 00..ac1563d3cd
> --- /dev/null
> +++
> b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/Ps2KbcLib/P
> +++ s2KbcLib.c
> @@ -0,0 +1,202 @@
> +/** @file
> + Main file for NULL named library for Ps2 keyboard controller librarr.
I think this is not really a NULL library right? It actually does a lot real
functionality.
Also the typo "librarr"
> +
> + Copyright (c) 2019, Intel Corporation. All rights reserved.
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include "Ps2KbcLib.h"
> +
> +GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_KEYBOARD_DEVICE_PATH
> +gKeyboardDevicePath = {
> + gPciRootBridge,
> + {
> +{
> + HARDWARE_DEVICE_PATH,
> + HW_PCI_DP,
> + {
> +(UINT8) (sizeof (PCI_DEVICE_PATH)),
> +(UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8)
> + }
> +},
> +0, // Function, patched in EnumPs2Keyboard
> +0 // Device, patched in EnumPs2Keyboard
> + },
> + {
> +{
> + ACPI_DEVICE_PATH,
> + ACPI_DP,
> + {
> +(UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
> +(UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
> + }
> +},
> +EISA_PNP_ID(0x0303),
> +0
> + },
> + gEndEntire
> +};
> +
> +/**
> + Check if PS2 keyboard is conntected, by sending ECHO command.
> + @retval TRUE if connected FALSE otherwise
> +**/
> +BOOLEAN
> +DetectPs2Keyboard (
> + VOID
> + )
> +{
> + UINT32TimeOut;
> + UINT32RegEmptied;
> + UINT8 Data;
> + UINT32SumTimeOut;
> + BOOLEAN FoundPs2Kbc;
> +
> + TimeOut = 0;
> + RegEmptied = 0;
> + FoundPs2Kbc = FALSE;
> +
> + //
> + // Wait for input buffer empty
> + //
> + for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30) {
> +if ((IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x02) == 0) {
> + FoundPs2Kbc = TRUE;
> + break;
> +}
> +MicroSecondDelay (30);
> + }
> +
> + if (FoundPs2Kbc == FALSE) {
> +return FALSE;
> + }
> +
> + //
> + // Send echo command
> + //
> + IoWrite8 (KEYBOARD_8042_DATA_REGISTER,
> KBC_INPBUF_VIA60_KBECHO);
> +
> + //
> + // Init variables
> + //
> + FoundPs2Kbc = FALSE;
> + TimeOut = 0;
> + SumTimeOut = 0;
> + Data = 0;
> +
> + //
> + // Read from 8042 (multiple times if needed) // until the expected
> + value appears // use SumTimeOut to control the iteration // while
> + (1) {
> +//
> +// Perform a read
> +//
> +for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30)
> {
> + if (IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x01) {
> +Data = IoRead8 (KEYBOARD_8042_DATA_REGISTER);
> +break;
> + }
&g
[edk2-devel] [edk2-platforms] [Patch v2 9/9] WhiskeylakeOpenBoardPkg: Add Ps2 Keyboard Support
What was done:
* Added BDS Ps2 keyboard DXE driver.
* Included Super I/O DXE driver to publish the SIO protocol
needed by the Ps2 keyboard DXE driver.
* Included a Ps2 Library to BdsDxe driver
to add the Ps2 device path to ConIn and ConInDev
variables
* Configured the Super I/O Pci to Isa bridge bus,
device, function device info PCD. This will help the Super I/O
driver identify which bridge the Super I/O is connected to.
* Removed duplicate Ps2 enable PCDs
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
Platform/Intel/WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec | 1 -
.../WhiskeylakeURvp/OpenBoardPkg.dsc| 6 ++
.../WhiskeylakeURvp/OpenBoardPkg.fdf| 2 ++
.../WhiskeylakeURvp/OpenBoardPkgPcd.dsc | 6 ++
4 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec
b/Platform/Intel/WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec
index 34494d0168..fbb9549e44 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec
@@ -271,7 +271,6 @@
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiHibernate|1|UINT8|0x4003
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdLowPowerS0Idle|0|UINT8|0x4004
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPciExpNative|0|UINT8|0x4005
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdNativeAspmEnable|1|UINT8|0x4006
-gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdPs2KbMsEnable|0|UINT8|0x4009
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDisableActiveTripPoints|1|UINT8|0x400A
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDisablePassiveTripPoints|0|UINT8|0x400B
gWhiskeylakeOpenBoardPkgTokenSpaceGuid.PcdDisableCriticalTripPoints|1|UINT8|0x400C
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
index 8e0ea2d5ce..1c7c12696c 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.dsc
@@ -335,6 +335,11 @@
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+ MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf{
+
+ NULL|BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.inf
+ }
UefiCpuPkg/CpuDxe/CpuDxe.inf
ShellPkg/Application/Shell/Shell.inf {
@@ -428,3 +433,4 @@
!if gMinPlatformPkgTokenSpaceGuid.PcdBootToShellOnly == FALSE
$(PLATFORM_BOARD_PACKAGE)/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
!endif
+ BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
index 140e6260c9..8a4fd973b4 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkg.fdf
@@ -340,6 +340,8 @@ INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
INF MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+INF BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+INF MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
INF ShellPkg/Application/Shell/Shell.inf
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
index adbd48f6d7..52471cb25b 100644
--- a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/OpenBoardPkgPcd.dsc
@@ -296,6 +296,12 @@
gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F,
0x07, 0x1F, 0x1F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00}
!endif
+ ##
+ # Board Configuration
+ ##
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|1
+ gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x00, 0x00,
0x1F, 0x00}
+
[PcdsFixedAtBuild.IA32]
##
# Edk2 Configuration
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [Patch v2 6/9] BoardModulePkg: Add Ps2 Keyboard Library
Added a generic Ps2 keyboard library
that adds ps2 device path to ConIn and ConInDev
Uefi variables
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../Intel/BoardModulePkg/BoardModulePkg.dsc | 1 +
.../Library/BdsPs2KbcLib/BdsPs2KbcLib.c | 202 ++
.../Library/BdsPs2KbcLib/BdsPs2KbcLib.h | 65 ++
.../Library/BdsPs2KbcLib/BdsPs2KbcLib.inf | 38
4 files changed, 306 insertions(+)
create mode 100644
Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.c
create mode 100644
Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.h
create mode 100644
Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.inf
diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
index 5af26eb97e..bcc2dfbfeb 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
@@ -88,3 +88,4 @@
BoardModulePkg/Library/BiosIdLib/PeiBiosIdLib.inf
BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/PeiFirmwareBootMediaInfoLib.inf
+ BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.inf
diff --git a/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.c
b/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.c
new file mode 100644
index 00..3a885e0d71
--- /dev/null
+++ b/Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.c
@@ -0,0 +1,202 @@
+/** @file
+ Main file for Ps2 keyboard controller library.
+
+ Copyright (c) 2019, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "BdsPs2KbcLib.h"
+
+GLOBAL_REMOVE_IF_UNREFERENCED PLATFORM_KEYBOARD_DEVICE_PATH
gKeyboardDevicePath = {
+ gPciRootBridge,
+ {
+{
+ HARDWARE_DEVICE_PATH,
+ HW_PCI_DP,
+ {
+(UINT8) (sizeof (PCI_DEVICE_PATH)),
+(UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8)
+ }
+},
+0, // Function, patched in EnumPs2Keyboard
+0 // Device, patched in EnumPs2Keyboard
+ },
+ {
+{
+ ACPI_DEVICE_PATH,
+ ACPI_DP,
+ {
+(UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
+(UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
+ }
+},
+EISA_PNP_ID(0x0303),
+0
+ },
+ gEndEntire
+};
+
+/**
+ Check if PS2 keyboard is conntected, by sending ECHO command.
+ @retval TRUE if connected FALSE otherwise
+**/
+BOOLEAN
+DetectPs2Keyboard (
+ VOID
+ )
+{
+ UINT32TimeOut;
+ UINT32RegEmptied;
+ UINT8 Data;
+ UINT32SumTimeOut;
+ BOOLEAN FoundPs2Kbc;
+
+ TimeOut = 0;
+ RegEmptied = 0;
+ FoundPs2Kbc = FALSE;
+
+ //
+ // Wait for input buffer empty
+ //
+ for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30) {
+if ((IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x02) == 0) {
+ FoundPs2Kbc = TRUE;
+ break;
+}
+MicroSecondDelay (30);
+ }
+
+ if (FoundPs2Kbc == FALSE) {
+return FALSE;
+ }
+
+ //
+ // Send echo command
+ //
+ IoWrite8 (KEYBOARD_8042_DATA_REGISTER, KBC_INPBUF_VIA60_KBECHO);
+
+ //
+ // Init variables
+ //
+ FoundPs2Kbc = FALSE;
+ TimeOut = 0;
+ SumTimeOut = 0;
+ Data = 0;
+
+ //
+ // Read from 8042 (multiple times if needed)
+ // until the expected value appears
+ // use SumTimeOut to control the iteration
+ //
+ while (1) {
+//
+// Perform a read
+//
+for (TimeOut = 0; TimeOut < PS2_KEYBOARD_TIMEOUT; TimeOut += 30) {
+ if (IoRead8 (KEYBOARD_8042_STATUS_REGISTER) & 0x01) {
+Data = IoRead8 (KEYBOARD_8042_DATA_REGISTER);
+break;
+ }
+ MicroSecondDelay (30);
+}
+
+SumTimeOut += TimeOut;
+
+if (Data == KBC_INPBUF_VIA60_KBECHO) {
+ FoundPs2Kbc = TRUE;
+ break;
+}
+
+if (SumTimeOut >= PS2_KEYBOARD_WAITFORVALUE_TIMEOUT) {
+ break;
+}
+ }
+ return FoundPs2Kbc;
+}
+
+/**
+ Check if PS2 keyboard is conntected. If the result of first time is
+ error, it will retry again.
+ @retval TRUE if connected FALSE otherwise
+**/
+BOOLEAN
+IsPs2KeyboardConnected (
+ VOID
+ )
+{
+ BOOLEAN Result;
+ Result = DetectPs2Keyboard ();
+
+ if (Result == FALSE) {
+//
+// If there is no ps2 keyboard detected for the 1st time, retry again.
+//
+Result = DetectPs2Keyboard ();
+ }
+ return Result;
+}
+
+
+/**
+ Updates the ConIn variable with Ps2 Keyboard device path,
+ if it doesn't already exists in ConIn and ConInDev
+**/
+VOID
+AddPs2Keyboard (
+ VOID
+ )
+{
+ SIO_PCI_ISA_BRIDGE_DEVICE_INFO *SioIsaInfo;
+
+ DEBUG ((DEBUG_INFO, "[AddPs2Keyboard]\n"));
+
+ SioIsaInfo = (SIO_PCI_ISA_BRIDGE_DEVICE_INFO*) FixedPcdGetPtr
(PcdSuperIoPciIsaBridgeDevice);
+
+ //
+ // patch IsaBridge device and and function
+ //
+ gKeyboardDevicePath.IsaBridge.Device = SioIsaInfo->Device;
+ gKeyboardD
[edk2-devel] [edk2-platforms] [Patch v2 1/9] BoardModulePkg: Add gBoardModulePkgTokenSpaceGuid
Added gBoardModulePkgTokenSpaceGuid to BoardModulePkg
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
Platform/Intel/BoardModulePkg/BoardModulePkg.dec | 4
1 file changed, 4 insertions(+)
diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
index f461cc7cab..8a811602e6 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
@@ -42,3 +42,7 @@
## GUID to publish BIOS information HOB
gBiosInfoGuid = { 0x09d0d15c, 0xe9f0, 0x4dfc, {0x9e, 0x0b, 0x39, 0x33, 0x1f,
0xca, 0x66, 0x85} }
+
+ ## {7F4EE1A3-C1F3-43E4-BA1A-39DCDE46C343}
+ gBoardModulePkgTokenSpaceGuid = { 0x7f4ee1a3, 0xc1f3, 0x43e4, { 0xba, 0x1a,
0x39, 0xdc, 0xde, 0x46, 0xc3, 0x43 } }
+
--
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[edk2-devel] [edk2-platforms] [Patch v2 2/9] SimicsOpenBoardPkg: Remove Super I/O DXE driver
Removed the Super I/O DXE driver from SimicsOpenBoardPkg.
This driver will be added to the BoardModulePky as it is
generic and can be shared by other open board packages
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../BoardX58Ich10/OpenBoardPkg.dsc| 1 -
.../BoardX58Ich10/OpenBoardPkg.fdf| 1 -
.../LegacySioDxe/ComponentName.c | 173 -
.../LegacySioDxe/ComponentName.h | 87 ---
.../LegacySioDxe/LegacySioDxe.inf | 54 --
.../LegacySioDxe/Register.h | 15 -
.../SimicsOpenBoardPkg/LegacySioDxe/SioChip.c | 272
.../SimicsOpenBoardPkg/LegacySioDxe/SioChip.h | 195 --
.../LegacySioDxe/SioDriver.c | 600 --
.../LegacySioDxe/SioDriver.h | 134
.../LegacySioDxe/SioService.c | 249
.../LegacySioDxe/SioService.h | 143 -
12 files changed, 1924 deletions(-)
delete mode 100644
Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c
delete mode 100644
Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.h
delete mode 100644
Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/LegacySioDxe.inf
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/Register.h
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.c
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioChip.h
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioDriver.c
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioDriver.h
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioService.c
delete mode 100644 Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/SioService.h
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index 78f1e80990..e0a02b4efc 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -280,7 +280,6 @@
###
$(BOARD_PKG)/AcpiTables/AcpiTables.inf
$(BOARD_PKG)/AcpiTables/MinPlatformAcpiTables/AcpiPlatform.inf
- $(BOARD_PKG)/LegacySioDxe/LegacySioDxe.inf
$(BOARD_PKG)/SimicsDxe/SimicsDxe.inf
$(BOARD_PKG)/SimicsVideoDxe/SimicsVideoDxe.inf
$(BOARD_PKG)/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 39226251a7..6dc7b4aa56 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -213,7 +213,6 @@ INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
INF MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
-INF $(BOARD_PKG)/LegacySioDxe/LegacySioDxe.inf
INF MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
INF $(BOARD_PKG)/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
diff --git a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c
b/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c
deleted file mode 100644
index 4ba02f92c0..00
--- a/Platform/Intel/SimicsOpenBoardPkg/LegacySioDxe/ComponentName.c
+++ /dev/null
@@ -1,173 +0,0 @@
-/** @file
- Install Base and Size Info Ppi for Firmware Volume Recovery.
-
- Copyright (c) 2013 - 2019 Intel Corporation. All rights reserved.
-
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "SioDriver.h"
-
-///
-/// Component Name Protocol instance
-///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL mSioComponentName =
{
- SioComponentNameGetDriverName,
- SioComponentNameGetControllerName,
- "eng"
-};
-
-///
-/// Component Name 2 Protocol instance
-///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL mSioComponentName2
= {
- (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)SioComponentNameGetDriverName,
- (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)SioComponentNameGetControllerName,
- "en"
-};
-
-///
-/// Table of driver names
-///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSioDriverNameTable[] =
{
- {
-"eng;en",
-L"Super I/O Driver"
- },
- {
-NULL,
-NULL
- }
-};
-
-///
-/// Table of Controller names
-///
-GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE
mSioControllerNameTable[] = {
- {
-"eng;en",
-L"Super I/O Controller"
- },
- {
-NULL,
-NULL
- }
-};
-
-/**
- Retrieves a Unicode string that is the user-readable name of the EFI Driver.
-
- @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.
- @param Language A pointer to a three-character ISO 639-2 language
identifier.
- This is the language of the driver name that that the
caller
-
[edk2-devel] [edk2-platforms] [Patch v2 4/9] BoardModulePkg: Add fix at build Pcds
* Added ps2 keyboard and Uart enable PCDs.
* Added PCDs to define IO ports for Uart1 and Uart2
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../Intel/BoardModulePkg/BoardModulePkg.dec | 21 +++
1 file changed, 21 insertions(+)
diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
index 8a811602e6..26e662f711 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dec
@@ -46,3 +46,24 @@
## {7F4EE1A3-C1F3-43E4-BA1A-39DCDE46C343}
gBoardModulePkgTokenSpaceGuid = { 0x7f4ee1a3, 0xc1f3, 0x43e4, { 0xba, 0x1a,
0x39, 0xdc, 0xde, 0x46, 0xc3, 0x43 } }
+[PcdsFixedAtBuild]
+ ## PcdPs2KbMsEnable 0x0:Disable, 0x1:Enable
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|0x00|UINT8|0x0001
+
+ ## SuperIo Pci ISA Bridge info. It is an array that contains the Segment,
Bus, Device and Function
+ # information describing the PCI Device Info. The first byte is the segment
number,
+ # the second is the bus number, third byte is the device number, the fourth
byte
+ # is the Function.
+ gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0xFF, 0xFF,
0xFF, 0xFF}|VOID*|0x0002
+
+ ## PcdUart1Enable 0x0:Disable, 0x1:Enable
+ gBoardModulePkgTokenSpaceGuid.PcdUart1Enable|0x00|UINT8|0x0003
+ gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask|0x0010|UINT16|0x0004
+ gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort|0x03F8|UINT16|0x0005
+ gBoardModulePkgTokenSpaceGuid.PcdUart1Length|0x08|UINT8|0x0006
+
+ ## PcdUart2Enable 0x0:Disable, 0x1:Enable
+ gBoardModulePkgTokenSpaceGuid.PcdUart2Enable|0x00|UINT8|0x0007
+ gBoardModulePkgTokenSpaceGuid.PcdUart2IrqMask|0x0008|UINT16|0x0008
+ gBoardModulePkgTokenSpaceGuid.PcdUart2IoPort|0x02F8|UINT16|0x0009
+ gBoardModulePkgTokenSpaceGuid.PcdUart2Length|0x08|UINT8|0x000A
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [Patch v2 3/9] BoardModulePkg: Add Super I/O driver
Added a generic Super I/O driver that produces the
Sio protocol. This driver was moved from the
SimicsOpenBoardPkg.
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../Intel/BoardModulePkg/BoardModulePkg.dsc | 5 +
.../LegacySioDxe/ComponentName.c | 173 +
.../LegacySioDxe/ComponentName.h | 87 +++
.../LegacySioDxe/LegacySioDxe.inf | 51 ++
.../BoardModulePkg/LegacySioDxe/Register.h| 15 +
.../BoardModulePkg/LegacySioDxe/SioChip.c | 270
.../BoardModulePkg/LegacySioDxe/SioChip.h | 185 ++
.../BoardModulePkg/LegacySioDxe/SioDriver.c | 600 ++
.../BoardModulePkg/LegacySioDxe/SioDriver.h | 133
.../BoardModulePkg/LegacySioDxe/SioService.c | 249
.../BoardModulePkg/LegacySioDxe/SioService.h | 143 +
11 files changed, 1911 insertions(+)
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.h
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/Register.h
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.h
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/SioDriver.c
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/SioDriver.h
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/SioService.c
create mode 100644 Platform/Intel/BoardModulePkg/LegacySioDxe/SioService.h
diff --git a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
index 5ec68ceebf..5af26eb97e 100644
--- a/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
+++ b/Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
@@ -32,6 +32,10 @@
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+
UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
[LibraryClasses.common.PEIM]
FirmwareBootMediaLib|IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareBootMediaLib.inf
@@ -76,6 +80,7 @@
[Components]
BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMediaInfoPei.inf
+ BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
BoardModulePkg/Library/CmosAccessLib/CmosAccessLib.inf
BoardModulePkg/Library/PlatformCmosAccessLibNull/PlatformCmosAccessLibNull.inf
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
new file mode 100644
index 00..c9b3df0473
--- /dev/null
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/ComponentName.c
@@ -0,0 +1,173 @@
+/** @file
+ Component Name functions implementation for the Super I/O DXE driver.
+
+ Copyright (c) 2013 - 2019 Intel Corporation. All rights reserved.
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+
+#include "SioDriver.h"
+
+///
+/// Component Name Protocol instance
+///
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL mSioComponentName =
{
+ SioComponentNameGetDriverName,
+ SioComponentNameGetControllerName,
+ "eng"
+};
+
+///
+/// Component Name 2 Protocol instance
+///
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL mSioComponentName2
= {
+ (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)SioComponentNameGetDriverName,
+ (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)SioComponentNameGetControllerName,
+ "en"
+};
+
+///
+/// Table of driver names
+///
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE mSioDriverNameTable[] =
{
+ {
+"eng;en",
+L"Super I/O Driver"
+ },
+ {
+NULL,
+NULL
+ }
+};
+
+///
+/// Table of Controller names
+///
+GLOBAL_REMOVE_IF_UNREFERENCED EFI_UNICODE_STRING_TABLE
mSioControllerNameTable[] = {
+ {
+"eng;en",
+L"Super I/O Controller"
+ },
+ {
+NULL,
+NULL
+ }
+};
+
+/**
+ Retrieves a Unicode string that is the user-readable name of the EFI Driver.
+
+ @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.
+ @param Language A pointer to a three-character ISO 639-2 language
identifier.
+ This is the language of the driver name that that the
caller
+ is requesting, and it must match one of the languages
specified
+ in SupportedLanguages. The number of languages supported
by a
+ driver is up to the driver writer.
+ @param DriverName A pointer to the Unicode string to return. This Unicode
string
+
[edk2-devel] [edk2-platforms] [Patch v2 0/9] Enable Ps2 keyboard
This patch series enables BIOS Ps2 keyboard in GalagoPro3
Changes in v2:
* fixed typos
* fixed discriptions
* broke patches down as per recommendation from Michael Kubacki
* renamed the Ps2KbcLib to BdsPs2KbcLib
* moved BdsPs2KbcLib to BoardModulePkg as it is generic and can be
shared
What was done in v1:
Patch 0001 adds PCDs to BoardModulePkg that will enable/disable,
describe Super I/O , Ps2 keyboard/mouse, uart1 and uart2 com ports
Patch 0002 moves the generic Super I/O driver from SimicsOpenBoardPkg to
BoardModulePkg in order for it to be shared. This driver publishes the
gEfiSioProtocolGuid consumed by edk2's MdeModulePkg/Bus/Isa/Ps2KeyboardDxe
driver to enable Ps2 keyboard functions in BIOS
Patch 0003 adds PCDs defined in patch 0001 to enable/disable devices in the
Super I/O driver added in patch 0002
Patch 0004 adds a Null Ps2 Library that adds Ps2 keyboard device path to
ConIn and ConInDev
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Patch 0005 enables Ps2 keyboard in BIOS by setting Ps2 keyboard related PCDs
Prince Agyeman (9):
BoardModulePkg: Add gBoardModulePkgTokenSpaceGuid
SimicsOpenBoardPkg: Remove Super I/O DXE driver
BoardModulePkg: Add Super I/O driver
BoardModulePkg: Add fix at build Pcds
BoardModulePkg: Added Pcds to Super I/O driver
BoardModulePkg: Add Ps2 Keyboard Library
KabylakeOpenBoardPkg: Add Ps2 Keyboard Support
SimicsOpenBoardPkg: Add Ps2 keyboard Support
WhiskeylakeOpenBoardPkg: Add Ps2 Keyboard Support
.../Intel/BoardModulePkg/BoardModulePkg.dec | 25 +++
.../Intel/BoardModulePkg/BoardModulePkg.dsc | 6 +
.../LegacySioDxe/ComponentName.c | 2 +-
.../LegacySioDxe/ComponentName.h | 2 +-
.../LegacySioDxe/LegacySioDxe.inf | 17 +-
.../LegacySioDxe/Register.h | 0
.../LegacySioDxe/SioChip.c| 70 +-
.../LegacySioDxe/SioChip.h| 18 +-
.../LegacySioDxe/SioDriver.c | 40
.../LegacySioDxe/SioDriver.h | 1 -
.../LegacySioDxe/SioService.c | 0
.../LegacySioDxe/SioService.h | 2 +-
.../Library/BdsPs2KbcLib/BdsPs2KbcLib.c | 202 ++
.../Library/BdsPs2KbcLib/BdsPs2KbcLib.h | 65 ++
.../Library/BdsPs2KbcLib/BdsPs2KbcLib.inf | 38
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 3 +-
.../DxeMultiBoardAcpiSupportLib.inf | 3 +-
.../GalagoPro3/OpenBoardPkg.dsc | 7 +
.../GalagoPro3/OpenBoardPkg.fdf | 2 +
.../GalagoPro3/OpenBoardPkgPcd.dsc| 6 +
.../BoardAcpiLib/DxeBoardAcpiTableLib.inf | 3 +-
.../DxeMultiBoardAcpiSupportLib.inf | 3 +-
.../KabylakeRvp3/OpenBoardPkg.dsc | 6 +
.../KabylakeRvp3/OpenBoardPkg.fdf | 2 +
.../KabylakeRvp3/OpenBoardPkgPcd.dsc | 7 +
.../KabylakeOpenBoardPkg/OpenBoardPkg.dec | 2 -
.../BoardX58Ich10/OpenBoardPkg.dsc| 3 +-
.../BoardX58Ich10/OpenBoardPkg.fdf| 2 +-
.../BoardX58Ich10/OpenBoardPkgPcd.dsc | 6 +
.../WhiskeylakeOpenBoardPkg/OpenBoardPkg.dec | 1 -
.../WhiskeylakeURvp/OpenBoardPkg.dsc | 6 +
.../WhiskeylakeURvp/OpenBoardPkg.fdf | 2 +
.../WhiskeylakeURvp/OpenBoardPkgPcd.dsc | 6 +
33 files changed, 523 insertions(+), 35 deletions(-)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/ComponentName.c (96%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/ComponentName.h (96%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/LegacySioDxe.inf (63%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/Register.h (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioChip.c (75%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioChip.h (90%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioDriver.c (88%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioDriver.h (95%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioService.c (100%)
rename Platform/Intel/{SimicsOpenBoardPkg =>
BoardModulePkg}/LegacySioDxe/SioService.h (97%)
create mode 100644
Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.c
create mode 100644
Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.h
create mode 100644
Platform/Intel/BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.inf
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [Patch v2 7/9] KabylakeOpenBoardPkg: Add Ps2 Keyboard Support
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2228
What was done:
* Added BDS Ps2 keyboard DXE driver.
* Added Super I/O DXE driver to publish the SIO protocol
needed by the Ps2 keyboard DXE driver.
* Included a Ps2 Library to BdsDxe driver
to add the Ps2 device path to ConIn and ConInDev
variables
* Configured the Super I/O Pci to Isa bridge bus,
device, function device info PCD. This will help the Super I/O
driver identify which bridge the Super I/O is connected to.
* Removed duplicate Ps2 enable PCDs
* Updated libraries to use Ps2 enable PCD defined in BoardModulePkg
Signed-off-by: Prince Agyeman
---
.../Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf | 3 ++-
.../Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf | 3 ++-
.../Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 7 +++
.../Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf | 2 ++
.../KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc| 6 ++
.../Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf | 3 ++-
.../Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf | 3 ++-
.../KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.dsc | 6 ++
.../KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkg.fdf | 2 ++
.../KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc | 7 +++
Platform/Intel/KabylakeOpenBoardPkg/OpenBoardPkg.dec | 2 --
11 files changed, 38 insertions(+), 6 deletions(-)
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
index a79bdcdbc6..35cd5c8fdb 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
+++
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeBoardAcpiTableLib.inf
@@ -33,9 +33,10 @@
MinPlatformPkg/MinPlatformPkg.dec
KabylakeOpenBoardPkg/OpenBoardPkg.dec
KabylakeSiliconPkg/SiPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
[Pcd]
- gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPs2KbMsEnable
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative
gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable
gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle
diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
index db8ba7a822..9fe27f9fda 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
+++
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Library/BoardAcpiLib/DxeMultiBoardAcpiSupportLib.inf
@@ -34,9 +34,10 @@
MinPlatformPkg/MinPlatformPkg.dec
KabylakeOpenBoardPkg/OpenBoardPkg.dec
KabylakeSiliconPkg/SiPkg.dec
+ BoardModulePkg/BoardModulePkg.dec
[Pcd]
- gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPs2KbMsEnable
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdPciExpNative
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdNativeAspmEnable
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdLowPowerS0Idle
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index f59248bba4..55edc1a2f8 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -311,6 +311,11 @@
MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridgeDxe.inf
MdeModulePkg/Bus/Pci/SataControllerDxe/SataControllerDxe.inf
MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+ MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf{
+
+ NULL|BoardModulePkg/Library/BdsPs2KbcLib/BdsPs2KbcLib.inf
+ }
UefiCpuPkg/CpuDxe/CpuDxe.inf
ShellPkg/Application/Shell/Shell.inf {
@@ -408,3 +413,5 @@
!endif
}
!endif
+ BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
index 80efab1aad..d58466d390 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.fdf
@@ -335,6 +335,8 @@ INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
INF MdeModulePkg/Universal/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+INF BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+INF MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
INF ShellPkg/Application/Shell/Shell.inf
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkgPcd.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/Galag
[edk2-devel] [edk2-platforms] [Patch v2 5/9] BoardModulePkg: Added Pcds to Super I/O driver
Included PCDs to the Super I/O DXE driver,
to allow the enable/disable of Ps2 keyboard/mouse,
UART1 and UART2 ports.
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../LegacySioDxe/LegacySioDxe.inf | 12
.../BoardModulePkg/LegacySioDxe/SioChip.c | 68 +--
.../BoardModulePkg/LegacySioDxe/SioChip.h | 8 +++
.../BoardModulePkg/LegacySioDxe/SioDriver.c | 40 +++
4 files changed, 122 insertions(+), 6 deletions(-)
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
index f01f63e69e..ccddc97e91 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
@@ -34,6 +34,7 @@
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
+ BoardModulePkg/BoardModulePkg.dec
[Sources]
SioChip.c
@@ -44,6 +45,17 @@
SioDriver.h
ComponentName.c
+[Pcd]
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable
+ gBoardModulePkgTokenSpaceGuid.PcdUart1Enable
+ gBoardModulePkgTokenSpaceGuid.PcdUart1IrqMask
+ gBoardModulePkgTokenSpaceGuid.PcdUart1IoPort
+ gBoardModulePkgTokenSpaceGuid.PcdUart1Length
+ gBoardModulePkgTokenSpaceGuid.PcdUart2Enable
+ gBoardModulePkgTokenSpaceGuid.PcdUart2IrqMask
+ gBoardModulePkgTokenSpaceGuid.PcdUart2IoPort
+ gBoardModulePkgTokenSpaceGuid.PcdUart2Length
+ gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice
[Protocols]
gEfiPciIoProtocolGuid ## CONSUMES
gEfiDevicePathProtocolGuid## PRODUCES
diff --git a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
index 81efe3c38b..e63977be60 100644
--- a/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
+++ b/Platform/Intel/BoardModulePkg/LegacySioDxe/SioChip.c
@@ -19,12 +19,31 @@
ACPI_SIO_RESOURCES_IO_IRQ mCom1Resources = {
{
{ ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR },
-0x3f8,
-8
+ FixedPcdGet16 (PcdUart1IoPort),
+ FixedPcdGet8 (PcdUart1Length)
+},
+{
+ { ACPI_IRQ_NOFLAG_DESCRIPTOR },
+ FixedPcdGet16 (PcdUart1IrqMask)
+},
+{
+ ACPI_END_TAG_DESCRIPTOR,
+ 0
+}
+};
+
+//
+// COM 2 UART Controller
+//
+ACPI_SIO_RESOURCES_IO_IRQ mCom2Resources = {
+ {
+{ ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR },
+FixedPcdGet16 (PcdUart2IoPort),
+FixedPcdGet8 (PcdUart2Length)
},
{
{ ACPI_IRQ_NOFLAG_DESCRIPTOR },
-BIT4// IRQ4
+FixedPcdGet16 (PcdUart2IrqMask),
},
{
ACPI_END_TAG_DESCRIPTOR,
@@ -74,6 +93,7 @@ ACPI_SIO_RESOURCES_IO_IRQ mMouseResources = {
// Table of SIO Controllers
//
DEVICE_INFOmDeviceInfo[] = {
+#if FixedPcdGet8 (PcdUart1Enable) == DEVICE_ENABLED
{
{
EISA_PNP_ID(0x501),
@@ -84,6 +104,20 @@ DEVICE_INFOmDeviceInfo[] = {
{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources },
{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom1Resources }
}, // COM 1 UART Controller
+#endif
+#if FixedPcdGet8 (PcdUart2Enable) == DEVICE_ENABLED
+ {
+{
+ EISA_PNP_ID(0x501),
+ 0
+},
+0,
+RESOURCE_IO | RESOURCE_IRQ,
+{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources },
+{ (ACPI_SMALL_RESOURCE_HEADER *) &mCom2Resources }
+ }, // COM 2 UART Controller
+#endif
+#if FixedPcdGet8 (PcdPs2KbMsEnable) == DEVICE_ENABLED
{
{
EISA_PNP_ID(0x303),
@@ -103,10 +137,30 @@ DEVICE_INFOmDeviceInfo[] = {
0, // Cannot change resource
{ (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources },
{ (ACPI_SMALL_RESOURCE_HEADER *) &mMouseResources }
- } // PS/2 Mouse Controller
+ }, // PS/2 Mouse Controller
+#endif
+ DEVICE_INFO_END
};
+
+/**
+ Gets the number of devices in Table of SIO Controllers mDeviceInfo
+
+ @retval Number of enabled devices in Table of SIO Controllers.
+**/
+UINTN
+EFIAPI
+GetDeviceCount (
+ VOID
+){
+ UINTNCount;
+ // Get mDeviceInfo item count
+ // -1 to account for for the end device info
+ Count = ARRAY_SIZE (mDeviceInfo) - 1;
+ return Count;
+}
+
/**
Return the supported devices.
@@ -128,7 +182,7 @@ DeviceGetList (
//
// Allocate enough memory for simplicity
//
- DeviceCount = sizeof (mDeviceInfo) / sizeof (mDeviceInfo[0]);
+ DeviceCount = GetDeviceCount ();
LocalDevices = AllocatePool (sizeof (EFI_SIO_ACPI_DEVICE_ID) * DeviceCount);
ASSERT (LocalDevices != NULL);
if (LocalDevices == NULL) {
@@ -175,8 +229,10 @@ DeviceSearch (
)
{
UINTN Index;
+ UINTN DeviceCount;
- for (Index = 0; Index < sizeof (mDeviceInfo) / sizeof (mDeviceInfo[0]);
Index++) {
+ DeviceCount = GetDeviceCount ();
+ for (Index = 0; Index < DeviceCount; Index++) {
if (CompareMem (Device, &mDeviceInfo[Index].Device, sizeof (*Device)) ==
0) {
return &mDeviceInfo[Index];
}
diff --git a/Platform/Intel/BoardModulePkg/
[edk2-devel] [edk2-platforms] [Patch v2 8/9] SimicsOpenBoardPkg: Add Ps2 keyboard Support
Added BIOS keyboard support to BoardX58Ich10
* Included BoardModulePkg's generic Super I/O DXE driver
* Configured Super I/O and Ps2 keyboard related PCD
to enable Ps2 keyboard
Cc: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc | 2 ++
.../Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf | 1 +
.../SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc| 6 ++
3 files changed, 9 insertions(+)
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
index e0a02b4efc..7329b19e8e 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.dsc
@@ -283,3 +283,5 @@
$(BOARD_PKG)/SimicsDxe/SimicsDxe.inf
$(BOARD_PKG)/SimicsVideoDxe/SimicsVideoDxe.inf
$(BOARD_PKG)/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+ BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
+
diff --git a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
index 6dc7b4aa56..ef6b35c92f 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkg.fdf
@@ -212,6 +212,7 @@ INF
MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
INF MinPlatformPkg/Flash/SpiFvbService/SpiFvbServiceSmm.inf
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+INF BoardModulePkg/LegacySioDxe/LegacySioDxe.inf
INF MdeModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2KeyboardDxe.inf
diff --git
a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
index 0298e4b12d..cd95755f91 100644
--- a/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/SimicsOpenBoardPkg/BoardX58Ich10/OpenBoardPkgPcd.dsc
@@ -196,6 +196,12 @@
gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|4
gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000
+ ##
+ # Board Configuration
+ ##
+ gBoardModulePkgTokenSpaceGuid.PcdPs2KbMsEnable|1
+ gBoardModulePkgTokenSpaceGuid.PcdSuperIoPciIsaBridgeDevice|{0x00, 0x00,
0x1F, 0x00}
+
[PcdsFixedAtBuild.X64]
##
# Edk2 Configuration
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [PATCH v3 1/4] WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove BoardFuncInit
Removes BoardFuncInit related functionality in WhiskeylakeURvp.
Co-authored-by: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../Library/BoardInitLib/BoardFunc.c | 19
.../Library/BoardInitLib/BoardFunc.h | 20 -
.../Library/BoardInitLib/BoardFuncInit.c | 26 -
.../BoardInitLib/BoardFuncInitPreMem.c| 29 +--
.../BoardInitLib/BoardPchInitPreMemLib.c | 3 +-
.../PeiMultiBoardInitPostMemLib.inf | 4 ---
.../PeiWhiskeylakeURvpInitPostMemLib.c| 8 -
.../PeiWhiskeylakeURvpInitPreMemLib.c | 10 +--
8 files changed, 9 insertions(+), 110 deletions(-)
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
deleted file mode 100644
index 7a2fed9904..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/** @file
- Board's PCD function hook.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include
-
-EFI_STATUS
-PeiBoardSpecificInitPostMemNull (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
deleted file mode 100644
index 9e0ff8d033..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/** @file
- Header file for Board Hook function intance.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _BOARD_FUNC_H_
-#define _BOARD_FUNC_H_
-
-#include
-
-EFI_STATUS
-PeiBoardSpecificInitPostMemNull (
- VOID
- );
-
-#endif // _BOARD_FUNC_H_
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
deleted file mode 100644
index b8c69166ed..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/** @file
- Source code for the board configuration init function in Post Memory init
phase.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "BoardFunc.h"
-
-/**
- Board's PCD function hook init function for PEI post memory phase.
-
- @param[in] BoardId An unsigned integrer represent the board id.
-
- @retval EFI_SUCCESS The function completed successfully.
-**/
-EFI_STATUS
-BoardFunctionInit (
- IN UINT16 BoardId
-)
-{
-
- return EFI_SUCCESS;
-}
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
index 1944a02bf1..06ff64da8d 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
+++
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
@@ -2,39 +2,24 @@
Source code for the board configuration init function in Post Memory init
phase.
- Copyright (c) 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include
+
//
// Null function for nothing GOP VBT update.
//
VOID
-GopVbtSpecificUpdateNull(
+GopVbtSpecificUpdateNull (
IN CHILD_STRUCT **ChildStructPtr
-);
+ );
+
//
// for CFL U DDR4
//
VOID
-CflUDdr4GopVbtSpecificUpdate(
+CflUDdr4GopVbtSpecificUpdate (
IN CHILD_STRUCT **ChildStructPtr
-);
-/**
- Board's PCD function hook init function for PEI post memory phase.
-
- @param[in] BoardId An unsigned integrer represent the board id.
-
- @retval EFI_SUCCESS The function completed successfully.
-**/
-EFI_STATUS
-BoardFunctionInitPreMem (
- IN UINT16 BoardId
- )
-{
-
- return EFI_SUCCESS;
-}
-
-
+ );
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c
index 5305ec7f7c..1f778c4f7e 100644
---
a/Platfo
[edk2-devel] [edk2-platforms] [PATCH v3 0/4] Add Initial Support for UP Xtreme
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2191 This patch series add the initial Up Xtreme board support to the WhiskeylakeOpenBoardPkg V3 Changes: - Updated copyright year - Added function to increase cache code size - Uncommmented the GPIO group tier configuration - Updated SPD table - Updated Readme.md reflect the Current Status V2 Changes: - Updated Readme.md to reflect the Current Status Current Status: 1. Basic boot to windows 10 (Home) and Ubuntu 18.04 from NVMe * UpXtreme: - Intel(R) Core(TM) i3-8145UE CPU @ 2.20GHz - Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz 3. USB mass storage devices not detected in UEFI shell Cc: Chasel Chiu Cc: Nate DeSimone Prince Agyeman (4): WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove BoardFuncInit WhiskeylakeOpenBoardPkg: Add UpXtreme board ID WhiskeylakeOpenBoardPkg/UpXtreme: Add Includes and Libraries WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files Platform/Intel/Readme.md | 19 +- .../Include/PlatformBoardId.h |5 +- .../PeiFspMiscUpdUpdateLib.c | 110 + .../PeiFspPolicyUpdateLib.c | 126 + .../PeiMiscPolicyUpdate.h | 25 + .../PeiPchPolicyUpdate.c | 300 ++ .../PeiPchPolicyUpdate.h | 28 + .../PeiPchPolicyUpdatePreMem.c| 39 + .../PeiSaPolicyUpdate.c | 158 + .../PeiSaPolicyUpdate.h | 45 + .../PeiSaPolicyUpdatePreMem.c | 124 + .../PeiSiliconPolicyUpdateLibFsp.inf | 144 + .../FspWrapperPlatformSecLib.c| 186 + .../SecFspWrapperPlatformSecLib/FsptCoreUpd.h | 40 + .../SecFspWrapperPlatformSecLib/Ia32/Fsp.h| 42 + .../Ia32/PeiCoreEntry.nasm| 130 + .../Ia32/SecEntry.nasm| 361 ++ .../Ia32/Stack.nasm | 72 + .../PlatformInit.c| 47 + .../SecFspWrapperPlatformSecLib.inf | 105 + .../SecGetPerformance.c | 89 + .../SecPlatformInformation.c | 78 + .../SecRamInitData.c | 55 + .../SecTempRamDone.c | 93 + .../UpXtreme/Include/Fdf/FlashMapInclude.fdf | 51 + .../Include/Library/PeiPlatformHookLib.h | 131 + .../UpXtreme/Include/Library/PeiPlatformLib.h | 38 + .../UpXtreme/Include/PlatformBoardConfig.h| 103 + .../UpXtreme/Include/PlatformInfo.h | 42 + .../Library/BaseFuncLib/BaseFuncLib.inf | 33 + .../UpXtreme/Library/BaseFuncLib/Gop.c| 38 + .../BaseGpioCheckConflictLib.c| 137 + .../BaseGpioCheckConflictLib.inf | 35 + .../BaseGpioCheckConflictLibNull.c| 37 + .../BaseGpioCheckConflictLibNull.inf | 32 + .../BasePlatformHookLib/BasePlatformHookLib.c | 143 + .../BasePlatformHookLib.inf | 45 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 63 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.inf| 50 + .../SmmMultiBoardAcpiSupportLib.c | 82 + .../SmmMultiBoardAcpiSupportLib.inf | 50 + .../BoardAcpiLib/SmmSiliconAcpiEnableLib.c| 170 + .../BoardAcpiLib/SmmUpXtremeAcpiEnableLib.c | 40 + .../BoardInitLib/BoardFuncInitPreMem.c| 25 + .../Library/BoardInitLib/BoardInitLib.h | 20 + .../BoardInitLib/BoardPchInitPreMemLib.c | 375 ++ .../BoardInitLib/BoardSaConfigPreMem.h| 79 + .../BoardInitLib/BoardSaInitPreMemLib.c | 298 ++ .../Library/BoardInitLib/GpioTableDefault.c | 213 ++ .../Library/BoardInitLib/GpioTableUpXtreme.c | 217 ++ .../Library/BoardInitLib/PchHdaVerbTables.h | 3014 + .../BoardInitLib/PeiBoardInitPostMemLib.c | 40 + .../BoardInitLib/PeiBoardInitPostMemLib.inf | 57 + .../BoardInitLib/PeiBoardInitPreMemLib.c | 106 + .../BoardInitLib/PeiBoardInitPreMemLib.inf| 124 + .../PeiMultiBoardInitPostMemLib.c | 41 + .../PeiMultiBoardInitPostMemLib.inf | 202 ++ .../BoardInitLib/PeiMultiBoardInitPreMemLib.c | 83 + .../PeiMultiBoardInitPreMemLib.inf| 308 ++ .../Library/BoardInitLib/PeiUpXtremeDetect.c | 192 ++ .../BoardInitLib/PeiUpXtremeInitPostMemLib.c | 416 +++ .../BoardInitLib/PeiUpXtremeInitPreMemLib.c | 659 .../BoardInitLib/UpXtremeHsioPtssTables.c | 32 + .../Library/BoardInitLib/UpXtremeInit.h | 44 + .../Library/BoardInitLib/UpXtremeSpdTable.c | 86 + .../DxePolicyBoardConfig.h| 19 + .../DxePolicyBoardConfigLib.inf | 45 + .../DxeSaPolicyBoardConfig.c | 36 + .../PeiPlatformHookLib/PeiPlatformHookLib.c | 298 ++ .../PeiPlatformHookLib/PeiPlatformHookLib.inf | 95 + .../PeiCpuPolicyBoardConfig.c | 49 + .../PeiCpuPolicyBoa
[edk2-devel] [edk2-platforms] [PATCH v3 4/4] WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2191 Adds the DSC and build files necessary to build the UpXtreme board instance. Key files = * build_config.cfg - Board-specific build configuration file. * OpenBoardPkg.dsc - The UpXtreme board description file. * OpenBoardPkgPcd.dsc - Used for other PCD customization. * OpenBoardPkg.fdf - The UpXtreme board flash file. * OpenBoardPkgBuildOption.dsc - Sets build options Based on PCD values. Co-authored-by: Michael Kubacki Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- Platform/Intel/Readme.md | 19 +- .../UpXtreme/OpenBoardPkg.dsc | 448 +++ .../UpXtreme/OpenBoardPkg.fdf | 708 ++ .../UpXtreme/OpenBoardPkgBuildOption.dsc | 154 .../UpXtreme/OpenBoardPkgPcd.dsc | 409 ++ .../UpXtreme/build_config.cfg | 35 + Platform/Intel/build.cfg | 3 +- 7 files changed, 1773 insertions(+), 3 deletions(-) create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgBuildOption.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/build_config.cfg diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index 02d9517d19..4f68ed9737 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -59,6 +59,12 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol ### **Supported Hardware** + AAEON + +| Machine Name | Supported Chipsets | BoardPkg | Board Name | +||--|| +| UP Xtreme | Whiskey Lake | WhiskeylakeOpenBoardPkg | UpXtreme | + Intel ***Intel Reference and Validation Platform*** @@ -233,6 +239,9 @@ return back to the minimum platform caller. | || build settings, environment variables. | || | ||--WhiskeylakeOpenBoardPkg + | || |--UpXtreme + | || |---build_config.cfg: UpXtreme specific build + | || settings environment variables. | || |--WhiskeylakeURvp | || |---build_config.cfg: WhiskeylakeURvp specific build | || settings environment variables. @@ -254,8 +263,14 @@ return back to the minimum platform caller. 1. This firmware project has only been tested booting to Microsoft Windows 10 x64 and Ubuntu 17.10 with AHCI mode. **WhiskeylakeOpenBoardPkg** -1. This firmware project has only been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic +1. This firmware project has mainly been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic Device. +2. UP Xtreme boards might hang during Windows 10 boot. +3. The UP Xtreme boards below boot to x64 windows 10 home edition and Ubuntu 18.04 + * UP Xtreme Intel(R) Core(TM) i3-8145UE CPU @ 2.20GHz with 8GB RAM + * UP Xtreme Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz with 16GB RAM + * UP Xtreme Intel(R) Core(TM) i7-8665UE CPU @ 1.70GHz with 16GB RAM + * UP Xtreme Intel(R) Celeron(R) CPU 4305UE @ 2.00GHz with 4GB RAM ### **Package Builds** @@ -293,5 +308,5 @@ If you would like to help but are not sure where to start some areas currently i * Adding board ports for more motherboards and systems * Adding Clang support -Please feel free to contact Michael Kubacki (michael.a.kubacki at intel.com) and Isaac Oram (isaac.w.oram at intel.com) +Please feel free to contact Isaac Oram (isaac.w.oram at intel.com) if you would like to discuss contribution ideas. diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc new file mode 100644 index 00..2ab9cb03ea --- /dev/null +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc @@ -0,0 +1,448 @@ +## @file +# The main build description file for the UpXtreme board. +# +# Copyright (c) 2020, Intel Corporation. All rights reserved. +# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + DEFINE PLATFORM_PACKAGE = MinPlatformPkg + DEFINE PLATFORM_SI_PACK
[edk2-devel] [edk2-platforms] [PATCH v3 2/4] WhiskeylakeOpenBoardPkg: Add UpXtreme board ID
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2191 Co-authored-by: Michael Kubacki Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- .../Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h b/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h index 3545b2a05c..4e8288b1f1 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h @@ -1,8 +1,8 @@ /** @file -Defines Platform BoardIds + Defines Whiskey Lake Platform Board IDs - Copyright (c) 2019, Intel Corporation. All rights reserved. + Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -21,6 +21,7 @@ Defines Platform BoardIds #define TypeTrad0x1 #define TypeUltUlx 0x2 +#define BoardIdUpXtreme 0x10 #define BoardIdWhiskeyLakeRvp 0x60 #define BoardIdUnknown1 0x -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54687): https://edk2.groups.io/g/devel/message/54687 Mute This Topic: https://groups.io/mt/71441916/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH v4 4/4] WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2191 Adds the DSC and build files necessary to build the UpXtreme board instance. Key files = * build_config.cfg - Board-specific build configuration file. * OpenBoardPkg.dsc - The UpXtreme board description file. * OpenBoardPkgPcd.dsc - Used for other PCD customization. * OpenBoardPkg.fdf - The UpXtreme board flash file. * OpenBoardPkgBuildOption.dsc - Sets build options Based on PCD values. Co-authored-by: Michael Kubacki Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- Platform/Intel/Readme.md | 19 +- .../UpXtreme/OpenBoardPkg.dsc | 448 +++ .../UpXtreme/OpenBoardPkg.fdf | 708 ++ .../UpXtreme/OpenBoardPkgBuildOption.dsc | 156 .../UpXtreme/OpenBoardPkgPcd.dsc | 409 ++ .../UpXtreme/build_config.cfg | 35 + Platform/Intel/build.cfg | 3 +- 7 files changed, 1775 insertions(+), 3 deletions(-) create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.fdf create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgBuildOption.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkgPcd.dsc create mode 100644 Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/build_config.cfg diff --git a/Platform/Intel/Readme.md b/Platform/Intel/Readme.md index 2e66b4ce72..f7bfc7aad2 100644 --- a/Platform/Intel/Readme.md +++ b/Platform/Intel/Readme.md @@ -60,6 +60,12 @@ A UEFI firmware implementation using MinPlatformPkg is constructed using the fol ### **Supported Hardware** + AAEON + +| Machine Name | Supported Chipsets | BoardPkg | Board Name | +||--|| +| UP Xtreme | Whiskey Lake | WhiskeylakeOpenBoardPkg | UpXtreme | + Intel ***Intel Reference and Validation Platform*** @@ -235,6 +241,9 @@ return back to the minimum platform caller. | || build settings, environment variables. | || | ||--WhiskeylakeOpenBoardPkg + | || |--UpXtreme + | || |---build_config.cfg: UpXtreme specific build + | || settings environment variables. | || |--WhiskeylakeURvp | || |---build_config.cfg: WhiskeylakeURvp specific build | || settings environment variables. @@ -261,8 +270,14 @@ return back to the minimum platform caller. 1. This firmware project has only been tested booting to Microsoft Windows 10 x64 and Ubuntu 17.10 with AHCI mode. **WhiskeylakeOpenBoardPkg** -1. This firmware project has only been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic +1. This firmware project has mainly been tested booting to Microsoft Windows 10 x64 with AHCI mode and Integrated Graphic Device. +2. UP Xtreme boards might hang during Windows 10 boot. +3. The UP Xtreme boards below boot to x64 windows 10 home edition and Ubuntu 18.04 + * UP Xtreme Intel(R) Core(TM) i3-8145UE CPU @ 2.20GHz with 8GB RAM + * UP Xtreme Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz with 16GB RAM + * UP Xtreme Intel(R) Core(TM) i7-8665UE CPU @ 1.70GHz with 16GB RAM + * UP Xtreme Intel(R) Celeron(R) CPU 4305UE @ 2.00GHz with 4GB RAM **CometlakeOpenBoardPkg** 1. This firmware project has been tested booting to Microsoft Windows 10 x64 with AHCI mode and External Graphic Device. @@ -304,5 +319,5 @@ If you would like to help but are not sure where to start some areas currently i * Adding board ports for more motherboards and systems * Adding Clang support -Please feel free to contact Michael Kubacki (michael.a.kubacki at intel.com) and Isaac Oram (isaac.w.oram at intel.com) +Please feel free to contact Isaac Oram (isaac.w.oram at intel.com) if you would like to discuss contribution ideas. diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc new file mode 100644 index 00..2ab9cb03ea --- /dev/null +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/UpXtreme/OpenBoardPkg.dsc @@ -0,0 +1,448 @@ +## @file +# The main build description file for the UpXtreme board. +# +# Copyright (c) 2020, Intel Corporation. All rights reserved. +# +# SPDX-License-Identifier: BSD-2
[edk2-devel] [edk2-platforms] [PATCH v4 1/4] WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove BoardFuncInit
Removes BoardFuncInit related functionality in WhiskeylakeURvp.
Co-authored-by: Michael Kubacki
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: Prince Agyeman
---
.../Library/BoardInitLib/BoardFunc.c | 19
.../Library/BoardInitLib/BoardFunc.h | 20 -
.../Library/BoardInitLib/BoardFuncInit.c | 26 -
.../BoardInitLib/BoardFuncInitPreMem.c| 29 +--
.../BoardInitLib/BoardPchInitPreMemLib.c | 3 +-
.../PeiMultiBoardInitPostMemLib.inf | 4 ---
.../PeiWhiskeylakeURvpInitPostMemLib.c| 8 -
.../PeiWhiskeylakeURvpInitPreMemLib.c | 10 +--
8 files changed, 9 insertions(+), 110 deletions(-)
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
delete mode 100644
Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
deleted file mode 100644
index 7a2fed9904..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/** @file
- Board's PCD function hook.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include
-
-EFI_STATUS
-PeiBoardSpecificInitPostMemNull (
- VOID
- )
-{
- return EFI_SUCCESS;
-}
-
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
deleted file mode 100644
index 9e0ff8d033..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFunc.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/** @file
- Header file for Board Hook function intance.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#ifndef _BOARD_FUNC_H_
-#define _BOARD_FUNC_H_
-
-#include
-
-EFI_STATUS
-PeiBoardSpecificInitPostMemNull (
- VOID
- );
-
-#endif // _BOARD_FUNC_H_
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
deleted file mode 100644
index b8c69166ed..00
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInit.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/** @file
- Source code for the board configuration init function in Post Memory init
phase.
-
-
- Copyright (c) 2019, Intel Corporation. All rights reserved.
- SPDX-License-Identifier: BSD-2-Clause-Patent
-**/
-
-#include "BoardFunc.h"
-
-/**
- Board's PCD function hook init function for PEI post memory phase.
-
- @param[in] BoardId An unsigned integrer represent the board id.
-
- @retval EFI_SUCCESS The function completed successfully.
-**/
-EFI_STATUS
-BoardFunctionInit (
- IN UINT16 BoardId
-)
-{
-
- return EFI_SUCCESS;
-}
-
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
index 1944a02bf1..06ff64da8d 100644
---
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
+++
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardFuncInitPreMem.c
@@ -2,39 +2,24 @@
Source code for the board configuration init function in Post Memory init
phase.
- Copyright (c) 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
#include
+
//
// Null function for nothing GOP VBT update.
//
VOID
-GopVbtSpecificUpdateNull(
+GopVbtSpecificUpdateNull (
IN CHILD_STRUCT **ChildStructPtr
-);
+ );
+
//
// for CFL U DDR4
//
VOID
-CflUDdr4GopVbtSpecificUpdate(
+CflUDdr4GopVbtSpecificUpdate (
IN CHILD_STRUCT **ChildStructPtr
-);
-/**
- Board's PCD function hook init function for PEI post memory phase.
-
- @param[in] BoardId An unsigned integrer represent the board id.
-
- @retval EFI_SUCCESS The function completed successfully.
-**/
-EFI_STATUS
-BoardFunctionInitPreMem (
- IN UINT16 BoardId
- )
-{
-
- return EFI_SUCCESS;
-}
-
-
+ );
diff --git
a/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c
b/Platform/Intel/WhiskeylakeOpenBoardPkg/WhiskeylakeURvp/Library/BoardInitLib/BoardPchInitPreMemLib.c
index 5305ec7f7c..1f778c4f7e 100644
---
a/Platfo
[edk2-devel] [edk2-platforms] [PATCH v4 0/4] Add Initial Support for UP Xtreme
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2191 This patch series add the initial Up Xtreme board support to the WhiskeylakeOpenBoardPkg V4 Changes: - Removed MTRR configuration function - Rearranged FVs to improve boot time V3 Changes: - Updated copyright year - Added function to increase cache code size - Uncommmented the GPIO group tier configuration - Updated SPD table - Updated Readme.md reflect the Current Status V2 Changes: - Updated Readme.md to reflect the Current Status Current Status: 1. Basic boot to windows 10 (Home) and Ubuntu 18.04 from NVMe * UpXtreme: - Intel(R) Core(TM) i3-8145UE CPU @ 2.20GHz - Intel(R) Core(TM) i7-8565U CPU @ 1.80GHz - Intel(R) Celeron(R) CPU 4305UE 2. USB mass storage devices not detected in UEFI shell 3. Current builds on VS2015 Cc: Chasel Chiu Cc: Nate DeSimone Prince Agyeman (4): WhiskeylakeOpenBoardPkg/WhiskeylakeURvp: Remove BoardFuncInit WhiskeylakeOpenBoardPkg: Add UpXtreme board ID WhiskeylakeOpenBoardPkg/UpXtreme: Add Includes and Libraries WhiskeylakeOpenBoardPkg/UpXtreme: Add DSC and build files Platform/Intel/Readme.md | 19 +- .../Include/PlatformBoardId.h |6 +- .../PeiFspMiscUpdUpdateLib.c | 110 + .../PeiFspPolicyUpdateLib.c | 126 + .../PeiMiscPolicyUpdate.h | 25 + .../PeiPchPolicyUpdate.c | 300 ++ .../PeiPchPolicyUpdate.h | 28 + .../PeiPchPolicyUpdatePreMem.c| 39 + .../PeiSaPolicyUpdate.c | 158 + .../PeiSaPolicyUpdate.h | 45 + .../PeiSaPolicyUpdatePreMem.c | 124 + .../PeiSiliconPolicyUpdateLibFsp.inf | 144 + .../FspWrapperPlatformSecLib.c| 186 + .../SecFspWrapperPlatformSecLib/FsptCoreUpd.h | 40 + .../SecFspWrapperPlatformSecLib/Ia32/Fsp.h| 42 + .../Ia32/PeiCoreEntry.nasm| 130 + .../Ia32/SecEntry.nasm| 361 ++ .../Ia32/Stack.nasm | 72 + .../PlatformInit.c| 47 + .../SecFspWrapperPlatformSecLib.inf | 105 + .../SecGetPerformance.c | 89 + .../SecPlatformInformation.c | 78 + .../SecRamInitData.c | 55 + .../SecTempRamDone.c | 93 + .../UpXtreme/Include/Fdf/FlashMapInclude.fdf | 50 + .../Include/Library/PeiPlatformHookLib.h | 131 + .../UpXtreme/Include/Library/PeiPlatformLib.h | 38 + .../UpXtreme/Include/PlatformBoardConfig.h| 103 + .../UpXtreme/Include/PlatformInfo.h | 42 + .../Library/BaseFuncLib/BaseFuncLib.inf | 33 + .../UpXtreme/Library/BaseFuncLib/Gop.c| 38 + .../BaseGpioCheckConflictLib.c| 137 + .../BaseGpioCheckConflictLib.inf | 35 + .../BaseGpioCheckConflictLibNull.c| 37 + .../BaseGpioCheckConflictLibNull.inf | 32 + .../BasePlatformHookLib/BasePlatformHookLib.c | 143 + .../BasePlatformHookLib.inf | 45 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.c | 63 + .../BoardAcpiLib/SmmBoardAcpiEnableLib.inf| 50 + .../SmmMultiBoardAcpiSupportLib.c | 82 + .../SmmMultiBoardAcpiSupportLib.inf | 50 + .../BoardAcpiLib/SmmSiliconAcpiEnableLib.c| 170 + .../BoardAcpiLib/SmmUpXtremeAcpiEnableLib.c | 40 + .../BoardInitLib/BoardFuncInitPreMem.c| 25 + .../Library/BoardInitLib/BoardInitLib.h | 20 + .../BoardInitLib/BoardPchInitPreMemLib.c | 375 ++ .../BoardInitLib/BoardSaConfigPreMem.h| 79 + .../BoardInitLib/BoardSaInitPreMemLib.c | 298 ++ .../Library/BoardInitLib/GpioTableDefault.c | 213 ++ .../Library/BoardInitLib/GpioTableUpXtreme.c | 217 ++ .../Library/BoardInitLib/PchHdaVerbTables.h | 3014 + .../BoardInitLib/PeiBoardInitPostMemLib.c | 40 + .../BoardInitLib/PeiBoardInitPostMemLib.inf | 57 + .../BoardInitLib/PeiBoardInitPreMemLib.c | 106 + .../BoardInitLib/PeiBoardInitPreMemLib.inf| 124 + .../PeiMultiBoardInitPostMemLib.c | 41 + .../PeiMultiBoardInitPostMemLib.inf | 202 ++ .../BoardInitLib/PeiMultiBoardInitPreMemLib.c | 83 + .../PeiMultiBoardInitPreMemLib.inf| 308 ++ .../Library/BoardInitLib/PeiUpXtremeDetect.c | 192 ++ .../BoardInitLib/PeiUpXtremeInitPostMemLib.c | 416 +++ .../BoardInitLib/PeiUpXtremeInitPreMemLib.c | 625 .../BoardInitLib/UpXtremeHsioPtssTables.c | 32 + .../Library/BoardInitLib/UpXtremeInit.h | 44 + .../Library/BoardInitLib/UpXtremeSpdTable.c | 86 + .../DxePolicyBoardConfig.h| 19 + .../DxePolicyBoardConfigLib.inf | 45 + .../DxeSaPolicyBoardConfig.c | 36 + .../PeiPlatformHookLib/PeiP
[edk2-devel] [edk2-platforms] [PATCH v4 2/4] WhiskeylakeOpenBoardPkg: Add UpXtreme board ID
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2191 Co-authored-by: Michael Kubacki Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- .../Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h b/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h index 3545b2a05c..a8ed470bcc 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Include/PlatformBoardId.h @@ -1,8 +1,8 @@ /** @file -Defines Platform BoardIds + Defines Whiskey Lake Platform Board IDs - Copyright (c) 2019, Intel Corporation. All rights reserved. + Copyright (c) 2019 - 2020, Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -21,9 +21,11 @@ Defines Platform BoardIds #define TypeTrad0x1 #define TypeUltUlx 0x2 +#define BoardIdUpXtreme 0x10 #define BoardIdWhiskeyLakeRvp 0x60 #define BoardIdUnknown1 0x #endif + -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54815): https://edk2.groups.io/g/devel/message/54815 Mute This Topic: https://groups.io/mt/71545526/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH 0/2] Add VS2017 Support
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2408 The patch series add VS2017 build support to the edk2-plaforms/Intel boards Cc: Chasel Chiu Cc: Nate DeSimone Prince Agyeman (2): CoffeelakeSiliconPkg: Add Missing GUID CoffeelakeSiliconPkg: Add missing library .../PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 + .../Pch/Include/Library/GbeMdiLib.h | 53 ++- .../Pch/Include/Register/PchRegsLan.h | 14 +- .../Library/PeiDxeSmmGbeMdiLib/GbeMdiLib.c| 391 ++ .../PeiDxeSmmGbeMdiLib/PeiDxeSmmGbeMdiLib.inf | 32 ++ .../Pch/PchInit/Smm/PchInitSmm.inf| 1 + .../CoffeelakeSiliconPkg/SiPkgCommonLib.dsc | 4 +- 7 files changed, 493 insertions(+), 3 deletions(-) create mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmGbeMdiLib/GbeMdiLib.c create mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmGbeMdiLib/PeiDxeSmmGbeMdiLib.inf -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54825): https://edk2.groups.io/g/devel/message/54825 Mute This Topic: https://groups.io/mt/71545948/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[edk2-devel] [edk2-platforms] [PATCH 2/2] CoffeelakeSiliconPkg: Add Missing Library
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2408 Added GbeMdiLib implementation and added additional registers definitions needed by GbeMdilib. This fixes the linker errors seen during VS2017 builds Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- .../Pch/Include/Library/GbeMdiLib.h | 53 ++- .../Pch/Include/Register/PchRegsLan.h | 14 +- .../Library/PeiDxeSmmGbeMdiLib/GbeMdiLib.c| 391 ++ .../PeiDxeSmmGbeMdiLib/PeiDxeSmmGbeMdiLib.inf | 32 ++ .../Pch/PchInit/Smm/PchInitSmm.inf| 1 + .../CoffeelakeSiliconPkg/SiPkgCommonLib.dsc | 4 +- 6 files changed, 492 insertions(+), 3 deletions(-) create mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmGbeMdiLib/GbeMdiLib.c create mode 100644 Silicon/Intel/CoffeelakeSiliconPkg/Pch/Library/PeiDxeSmmGbeMdiLib/PeiDxeSmmGbeMdiLib.inf diff --git a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/GbeMdiLib.h b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/GbeMdiLib.h index a6ce032eba..280dee411f 100644 --- a/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/GbeMdiLib.h +++ b/Silicon/Intel/CoffeelakeSiliconPkg/Pch/Include/Library/GbeMdiLib.h @@ -21,7 +21,7 @@ - Registers / bits of new devices introduced in a PCH generation will be just named as "_PCH_" without [generation_name] inserted. - Copyright (c) 2019 Intel Corporation. All rights reserved. + Copyright (c) 2019 - 2020 Intel Corporation. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -29,7 +29,35 @@ #ifndef _GBE_MDI_LIB_H_ #define _GBE_MDI_LIB_H_ + +#define GBE_MAX_LOOP_TIME 4000 +#define GBE_ACQUIRE_MDIO_DELAY 50 +#define GBE_MDI_SET_PAGE_DELAY 4000 // 4 mSec delay after setting page + + +// +// Custom Mode Control PHY Address 01, Page 769, Register 16 +// +#define R_PHY_MDI_PAGE_769_REGISETER_16_CMC0x0010 +// +// Custom Mode Control +// Page 769, Register 16, BIT 10 +// 0 - normal MDIO frequency access +// 1 - reduced MDIO frequency access (slow mdio) +// required for read during cable disconnect +// +#define B_PHY_MDI_PAGE_769_REGISETER_16_CMC_MDIO_FREQ_ACCESSBIT10 + // +// LAN PHY MDI settings +// +#define B_PHY_MDI_READYBIT28 +#define B_PHY_MDI_READ BIT27 +#define B_PHY_MDI_WRITEBIT26 +// +// PHY SPECIFIC registers +// +#define B_PHY_MDI_PHY_ADDRESS_02 BIT22 // // PHY GENERAL registers // Registers 0 to 15 are defined by the specification @@ -37,8 +65,22 @@ // #define B_PHY_MDI_PHY_ADDRESS_01 BIT21 #define B_PHY_MDI_PHY_ADDRESS_MASK(BIT25 | BIT24 | BIT23 | BIT22 | BIT21) +// +// PHY Identifier Register 2 +// Bits [15:10] - PHY ID Number - The PHY identifier composed of bits 3 through 18 +// of the Organizationally Unique Identifier (OUI) +// Bits [9:4] - Device Model Number +// Bits [3:0] - Device Revision Number +// +#define R_PHY_MDI_GENEREAL_REGISTER_03_PHY_IDENTIFIER_2 0x0003 + #define MDI_REG_SHIFT(x) (x << 16) +#define B_PHY_MDI_PHY_REGISTER_MASK (BIT20 | BIT19 | BIT18 | BIT17 | BIT16) +#define R_PHY_MDI_PHY_REG_SET_ADDRESS 0x0011 // Used after new page setting #define R_PHY_MDI_PHY_REG_DATA_READ_WRITE 0x0012 +#define R_PHY_MDI_PHY_REG_SET_PAGE0x001F + +// // LAN PHY MDI registers and bits // @@ -131,6 +173,7 @@ **/ VOID +EFIAPI GbeMdiForceMACtoSMB ( IN UINT32 GbeBar ); @@ -144,6 +187,7 @@ GbeMdiForceMACtoSMB ( @retval EFI_TIMEOUT **/ EFI_STATUS +EFIAPI GbeMdiWaitReady ( IN UINT32 GbeBar ); @@ -160,6 +204,7 @@ GbeMdiWaitReady ( @retval EFI_TIMEOUT **/ EFI_STATUS +EFIAPI GbeMdiAcquireMdio ( IN UINT32 GbeBar ); @@ -170,6 +215,7 @@ GbeMdiAcquireMdio ( @param [in] GbeBar GbE MMIO space **/ VOID +EFIAPI GbeMdiReleaseMdio ( IN UINT32 GbeBar ); @@ -186,6 +232,7 @@ GbeMdiReleaseMdio ( @retval EFI_DEVICE_ERROR Returned if both attermps of setting page failed **/ EFI_STATUS +EFIAPI GbeMdiSetPage ( IN UINT32 GbeBar, IN UINT32 Page @@ -200,6 +247,7 @@ GbeMdiSetPage ( @return EFI_STATUS **/ EFI_STATUS +EFIAPI GbeMdiSetRegister ( IN UINT32 GbeBar, IN UINT32 Register @@ -219,6 +267,7 @@ GbeMdiSetRegister ( @retval EFI_INVALID_PARAMETER If Phy Address or Register validaton failed **/ EFI_STATUS +EFIAPI GbeMdiRead ( IN UINT32 GbeBar, IN UINT32 PhyAddress, @@ -239,6 +288,7 @@ GbeMdiRead ( @retval EFI_INVALID_PARAMETER If Phy Address or Register validaton failed **/ EFI_STATUS +EFIAPI GbeMdiWrite ( IN UINT32 GbeBar, IN UINT32 PhyAddress, @@ -257,6 +307,7 @@ GbeMdiWrite ( @return EFI_INVALID_PARAMETER When GbeBar is incorrect **/ EFI_STATUS +EFIAPI GbeMdiGetLanPhyRevision ( IN UINT
[edk2-devel] [edk2-platforms] [PATCH 1/2] CoffeelakeSiliconPkg: Add Missing GUID
Added missing GUID gEfiMemoryTypeInformationGuid to PeiPolicyUpdateLib.inf to fix VS2017 build issue Cc: Chasel Chiu Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- .../Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 + 1 file changed, 1 insertion(+) diff --git a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf index e95c1b15c5..478e2d0512 100644 --- a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf @@ -271,3 +271,4 @@ [Guids] gTianoLogoGuid## CONSUMES gSiConfigGuid ## CONSUMES + gEfiMemoryTypeInformationGuid ## CONSUMES -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54826): https://edk2.groups.io/g/devel/message/54826 Mute This Topic: https://groups.io/mt/71545949/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-platforms] [PATCH 1/2] CoffeelakeSiliconPkg: Add Missing GUID
Hi Chasel, No specific BZ was filed for the missing GUID issue, though reported on this mailing list. Thanks Prince -Original Message- From: devel@edk2.groups.io On Behalf Of Chiu, Chasel Sent: Wednesday, February 26, 2020 1:16 AM To: Agyeman, Prince ; devel@edk2.groups.io Cc: Desimone, Nathaniel L Subject: Re: [edk2-devel] [edk2-platforms] [PATCH 1/2] CoffeelakeSiliconPkg: Add Missing GUID Please add BZ in commit message, with this update: Reviewed-by: Chasel Chiu > -Original Message- > From: Agyeman, Prince > Sent: Wednesday, February 26, 2020 8:59 AM > To: devel@edk2.groups.io > Cc: Chiu, Chasel ; Desimone, Nathaniel L > > Subject: [edk2-platforms] [PATCH 1/2] CoffeelakeSiliconPkg: Add > Missing GUID > > Added missing GUID gEfiMemoryTypeInformationGuid to > PeiPolicyUpdateLib.inf to fix VS2017 build issue > > Cc: Chasel Chiu > Cc: Nate DeSimone > > Signed-off-by: Prince Agyeman > --- > .../Policy/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf | 1 + > 1 file changed, 1 insertion(+) > > diff --git > a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdat > eLi > b/PeiPolicyUpdateLib.inf > b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdat > eLi > b/PeiPolicyUpdateLib.inf > index e95c1b15c5..478e2d0512 100644 > --- > a/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyUpdat > eLi > b/PeiPolicyUpdateLib.inf > +++ b/Platform/Intel/WhiskeylakeOpenBoardPkg/Policy/Library/PeiPolicyU > +++ pd > +++ ateLib/PeiPolicyUpdateLib.inf > @@ -271,3 +271,4 @@ > [Guids] >gTianoLogoGuid## CONSUMES >gSiConfigGuid ## CONSUMES > + gEfiMemoryTypeInformationGuid ## CONSUMES > -- > 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#54891): https://edk2.groups.io/g/devel/message/54891 Mute This Topic: https://groups.io/mt/71545949/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
Re: [edk2-devel] [edk2-staging/EdkRepo] [PATCH] EdkRepo: Add missing import definition
Reviewed-by: Prince Agyeman
-Original Message-
From: Desimone, Ashley E
Sent: Thursday, March 26, 2020 2:26 PM
To: devel@edk2.groups.io
Cc: Desimone, Nathaniel L ; Pandya, Puja
; Bjorge, Erik C ; Bret
Barkelew ; Agyeman, Prince
Subject: [edk2-staging/EdkRepo] [PATCH] EdkRepo: Add missing import definition
Add the definition of PIN_FILE_HELP to
checkout_pin_args.py to fix import error.
Signed-off-by: Ashley E Desimone
Cc: Nate DeSimone
Cc: Puja Pandya
Cc: Erik Bjorge
Cc: Bret Barkelew
Cc: Prince Agyeman
---
edkrepo/commands/arguments/checkout_pin_args.py | 1 +
1 file changed, 1 insertion(+)
diff --git a/edkrepo/commands/arguments/checkout_pin_args.py
b/edkrepo/commands/arguments/checkout_pin_args.py
index abd01b3..6020145 100644
--- a/edkrepo/commands/arguments/checkout_pin_args.py
+++ b/edkrepo/commands/arguments/checkout_pin_args.py
@@ -9,3 +9,4 @@
COMMAND_DESCRIPTION = ('Checks out the revisions described in a PIN file in '
'an existing workpace of the same project')
+PIN_FILE_HELP = ('The name of the pin file to checkout.')
--
2.16.2.windows.1
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[edk2-devel] [edk2-platforms] ClevoOpenBoardPkg: Update board gpios
Updated board GPIOS
Cc: Liming Gao
Cc: David Y Wei
Cc: Michael Kubacki
Cc: Nate DeSimone
Cc: Chasel Chiu
Signed-off-by: Agyeman
---
.../Library/BoardInitLib/N1xxWUGpioTable.c| 329 +-
1 file changed, 165 insertions(+), 164 deletions(-)
diff --git
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
index d055fda8c3..c99b83753f 100644
---
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
+++
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
@@ -20,170 +20,171 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
GPIO_INIT_CONFIG mGpioTableN1xxWU[] =
{
-//skip for eSPI function {GPIO_SKL_LP_GPP_A0, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermNone}},//H_RCIN_N
-//skip for eSPI function {GPIO_SKL_LP_GPP_A1, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermWpd20K}},//LPC_AD0_ESPI_IO0
-//skip for eSPI function {GPIO_SKL_LP_GPP_A2, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermWpd20K}},//LPC_AD1_ESPI_IO1
-//skip for eSPI function {GPIO_SKL_LP_GPP_A3, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermWpd20K}},//LPC_AD2_ESPI_IO2
-//skip for eSPI function {GPIO_SKL_LP_GPP_A4, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermWpd20K}},//LPC_AD3_ESPI_IO3
-//skip for eSPI function {GPIO_SKL_LP_GPP_A5, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermNone}},//LPC_FRAME_ESPI_CS_N
-//skip for eSPI function {GPIO_SKL_LP_GPP_A6, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermNone}},//INT_SERIRQ
- {GPIO_SKL_LP_GPP_A7, {GpioPadModeGpio,GpioHostOwnGpio, GpioDirOut,
GpioOutHigh,GpioIntDis, GpioHostDeepReset, GpioTermNone}},//PM_SLP_S0ix_R_N
-// skip for PM_CLKRUN_N {GPIO_SKL_LP_GPP_A8, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermNone}},//PM_CLKRUN_N
-//skip for eSPI function{GPIO_SKL_LP_GPP_A9, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermWpd20K}},//LPC_CLK_ESPI_CLK
-// skip for PCH_CLK_PCI_TPM {GPIO_SKL_LP_GPP_A10, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermWpd20K}},//PCH_CLK_PCI_TPM
- {GPIO_SKL_LP_GPP_A11, {GpioPadModeGpio,GpioHostOwnGpio, GpioDirIn,
GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset,
GpioTermNone}},//EC_HID_INTR
- {GPIO_SKL_LP_GPP_A12, {GpioPadModeGpio,GpioHostOwnGpio, GpioDirOut,
GpioOutLow,GpioIntDis, GpioResumeReset,
GpioTermNone}},//M.2_WWAN_GNSS_UART_RST_N
-//skip for SUS_PWR_ACK_R {GPIO_SKL_LP_GPP_A13, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermNone}},//SUS_PWR_ACK_R
-//skip for eSPI function{GPIO_SKL_LP_GPP_A14, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermNone}},//PM_SUS_STAT_ESPI_RST_N
-//skip for SUSACK_R_N {GPIO_SKL_LP_GPP_A15, {GpioPadModeNative1,
GpioHostOwnGpio, GpioDirNone, GpioOutDefault, GpioIntDis, GpioHostDeepReset,
GpioTermWpd20K}},//SUSACK_R_N
- {GPIO_SKL_LP_GPP_A16, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirIn,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_1P8_SEL
- {GPIO_SKL_LP_GPP_A17, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//SD_PWR_EN_N
- {GPIO_SKL_LP_GPP_A18, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_GP_0_SENSOR
- {GPIO_SKL_LP_GPP_A19, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_GP_1_SENSOR
- {GPIO_SKL_LP_GPP_A20, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//ISH_GP_2_SENSOR
- {GPIO_SKL_LP_GPP_A21, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},//GNSS_CHUB_IRQ
- {GPIO_SKL_LP_GPP_A22, {GpioPadModeGpio,GpioHostOwnGpio, GpioDirOut,
GpioOutHigh,GpioIntDis, GpioHostDeepReset, GpioTermNone}},//FPS_SLP_N
- {GPIO_SKL_LP_GPP_A23, {GpioPadModeGpio,GpioHostOwnGpio, GpioDirIn,
GpioOutDefault, GpioIntLevel | GpioIntApic, GpioHostDeepReset,
GpioTermNone}},//FPS_DRDY
- {GPIO_SKL_LP_GPP_B0, {GpioPadModeNative1, GpioHostOwnGpio, GpioDirNone,
Gpi
[edk2-devel] [edk2-platforms] [PATCH] ClevoOpenBoardPkg: Fix GCC5 build issue
From: Agyeman
Fixed GPIO table missing curly brackets
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Michael Kubacki
Cc: Chasel Chiu
CC: Dandan Bi
Signed-off-by: Prince Agyeman
---
.../N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
index c99b83753f..aa2c770729 100644
---
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
+++
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
@@ -155,7 +155,7 @@ GPIO_INIT_CONFIG mGpioTableN1xxWU[] =
{GPIO_SKL_LP_GPP_C16, {GpioPadModeGpio,GpioHostOwnGpio,GpioDirOut,
GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C0_SDA
{GPIO_SKL_LP_GPP_C17, {GpioPadModeGpio,GpioHostOwnGpio,GpioDirOut,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C0_SCL
{GPIO_SKL_LP_GPP_C18, {GpioPadModeGpio,GpioHostOwnGpio,GpioDirOut,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C1_SDA
- {GPIO_SKL_LP_GPP_C19, GpioPadModeGpio, GpioHostOwnAcpi,GpioDirInInv,
GpioOutDefault, GpioIntLevel | GpioIntSci, GpioHostDeepReset, GpioTermNone},
//I2C1_SCL
+ {GPIO_SKL_LP_GPP_C19, {GpioPadModeGpio, GpioHostOwnAcpi,
GpioDirInInv, GpioOutDefault, GpioIntLevel | GpioIntSci, GpioHostDeepReset,
GpioTermNone}}, //I2C1_SCL
{GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnDefault,
GpioDirDefault, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}},
//UART2_RXD
{GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnDefault,
GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},
//UART2_TXD
{GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART2_RTSB
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [PATCH v2] ClevoOpenBoardPkg: Fix GCC5 build issue
From: Agyeman
Fixed GPIO table missing curly brackets
Cc: Ankit Sinha
Cc: Nate DeSimone
Cc: Michael Kubacki
Cc: Chasel Chiu
CC: Dandan Bi
Signed-off-by: Agyeman
---
.../N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
index c99b83753f..27f70df001 100644
---
a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
+++
b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Library/BoardInitLib/N1xxWUGpioTable.c
@@ -155,7 +155,7 @@ GPIO_INIT_CONFIG mGpioTableN1xxWU[] =
{GPIO_SKL_LP_GPP_C16, {GpioPadModeGpio,GpioHostOwnGpio,GpioDirOut,
GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C0_SDA
{GPIO_SKL_LP_GPP_C17, {GpioPadModeGpio,GpioHostOwnGpio,GpioDirOut,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C0_SCL
{GPIO_SKL_LP_GPP_C18, {GpioPadModeGpio,GpioHostOwnGpio,GpioDirOut,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //I2C1_SDA
- {GPIO_SKL_LP_GPP_C19, GpioPadModeGpio, GpioHostOwnAcpi,GpioDirInInv,
GpioOutDefault, GpioIntLevel | GpioIntSci, GpioHostDeepReset, GpioTermNone},
//I2C1_SCL
+ {GPIO_SKL_LP_GPP_C19, {GpioPadModeGpio,GpioHostOwnAcpi,GpioDirInInv,
GpioOutDefault, GpioIntLevel | GpioIntSci, GpioHostDeepReset, GpioTermNone}},
//I2C1_SCL
{GPIO_SKL_LP_GPP_C20, {GpioPadModeNative1, GpioHostOwnDefault,
GpioDirDefault, GpioOutLow, GpioIntDis, GpioHostDeepReset, GpioTermNone}},
//UART2_RXD
{GPIO_SKL_LP_GPP_C21, {GpioPadModeNative1, GpioHostOwnDefault,
GpioDirDefault, GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}},
//UART2_TXD
{GPIO_SKL_LP_GPP_C22, {GpioPadModeNative1, GpioHostOwnDefault, GpioDirNone,
GpioOutDefault, GpioIntDis, GpioHostDeepReset, GpioTermNone}}, //UART2_RTSB
--
2.19.1.windows.1
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[edk2-devel] [edk2-platforms] [PATCH 1/3] AdvancedFeaturePkg: Fix GCC build
Cc: David Wei Cc: Liming Gao Cc: Ankit Sinha Cc: Agyeman Prince Cc: Kubacki Michael A Cc: Nate DeSimone Signed-off-by: Prince Agyeman --- .../AdvancedFeaturePkg/Smbios/SmbiosBasicDxe/SmbiosBasic.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Platform/Intel/AdvancedFeaturePkg/Smbios/SmbiosBasicDxe/SmbiosBasic.h b/Platform/Intel/AdvancedFeaturePkg/Smbios/SmbiosBasicDxe/SmbiosBasic.h index e278a4ed18..944946b5b8 100644 --- a/Platform/Intel/AdvancedFeaturePkg/Smbios/SmbiosBasicDxe/SmbiosBasic.h +++ b/Platform/Intel/AdvancedFeaturePkg/Smbios/SmbiosBasicDxe/SmbiosBasic.h @@ -11,7 +11,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include -#include +#include #include #include #include -- 2.19.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#47056): https://edk2.groups.io/g/devel/message/47056 Mute This Topic: https://groups.io/mt/34086417/21656 Group Owner: devel+ow...@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
